Re: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add Stratix 10 platform support

2019-05-29 Thread Loh, Tien Hock
Leif, thanks for reviewing, a question inlined.

> -Original Message-
> From: Leif Lindholm 
> Sent: Wednesday, May 29, 2019 10:43 PM
> To: Loh, Tien Hock 
> Cc: devel@edk2.groups.io; thlo...@gmail.com; Ard Biesheuvel
> ; Kinney, Michael D
> 
> Subject: Re: [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add Stratix 10
> platform support
> 
> Urgh, sorry, saw this was still stuck in my review queue.
> 
No problem, thanks for reviewing. 

> Mike, one question for you inline below.
> Oh, and one here - what's your take on maintainership for ARM-based
> Intel platforms? Fall back to top-level maintainers and add Tien Hock
> as reviewer?
> 
> On Thu, May 09, 2019 at 04:55:47PM +0800, tien.hock@intel.com wrote:
> > From: "Tien Hock, Loh" 
> >
> > Adds support for Intel Stratix 10 Platform.
> >
> > Signed-off-by: "Tien Hock, Loh" 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> 
> Yeah, so amusingly we've now updated the license, so we don't need
> this tag any longer...
> 
> > Cc: Ard Biesheuvel 
> > Cc: Leif Lindholm 
> > Cc: Michael D Kinney 
> >
> > --
> > v4
> > - Removed LibC
> > - Added NOOPT to BUILD_TARGETS
> > - Removed ARM from SUPPORTED_ARCHITECTURE
> > v3
> > - Updated Pcd with updated name
> > v2
> > - Updates ShellBinPkg with ShellPkg
> 
> Revision history goes below --- or in cover letter.
> 
> > ---
> >  Platform/Intel/Stratix10/Stratix10SoCPkg.dec   
> >|  30 ++
> >  Platform/Intel/Stratix10/Stratix10SoCPkg.dsc   
> >| 546
> 
> >  Platform/Intel/Stratix10/Stratix10SoCPkg.fdf   
> >| 270
> ++
> >  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
> |  49 ++
> >  Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf 
> >|
> 49 ++
> >  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c
> |  43 ++
> >  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c   
> >|
> 155 ++
> >  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c
> | 167 ++
> >
> Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelp
> er.S |  51 ++
> >  Platform/Intel/Stratix10/Readme.md 
> >|  61 +++
> >  Platform/Intel/Stratix10/ShellScript/startup.nsh   
> >|   2 +
> >  11 files changed, 1423 insertions(+)
> >
> > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> > new file mode 100755
> > index ..5677ac7676d5
> > --- /dev/null
> > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> > @@ -0,0 +1,30 @@
> > +#/** @file
> > +#  Intel Stratix 10 SoC FPGA Package
> > +#
> > +# Copyright (c) 2019, Intel All rights reserved.
> > +#
> > +#This program and the accompanying materials are licensed and made
> available under
> > +#the terms and conditions of the BSD License which accompanies this
> distribution.
> > +#The full text of the license may be found at
> > +#http://opensource.org/licenses/bsd-license.php
> > +#
> > +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> > +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> 
> ... and as a result of the license change, could you also please
> replace these
> 
> Mike Kinney may actually have some scripts that would help with this?
OK noted. If there are scripts that can automate the license header changes I'd 
love to use it :)

> 
> > +#
> > +#**/
> > +
> > +[Defines]
> > +  DEC_SPECIFICATION  = 0x00010005
> 
> We could probably bump this to the current DSC specification format?
> I think we're on 0x0001001B? (1.27)
OK noted. 
> 
> > +  PACKAGE_NAME   = IntelSoCFpgaPkg
> 
> Should this be Stratix10SoCPkg?
> 
> > +  PACKAGE_GUID   = 45533DD0-C41F-4ab6-A5DF-65B52684AC60
> > +  PACKAGE_VERSION= 0.1
> > +
> > +[Includes.common]
> 
> Add "Include" here, and you won't need to add manual -I flags below.
> 
OK

> > +
> > +[Guids.common]
> > +  gIntelSocFpgaTokenSpaceGuid =  { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba,
> 0xa, 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } }
> 
> This sounds like a very generic TokenSpaceGuid name that perhaps
> belongs in a package shared by many platforms. Should this one just be
> called gStratix10SoCTokenSpaceGuid?
> 
OK I'll regenerate a Guid here.

> Please add a blank line before next section header.
> 

OK

> > +[PcdsFeatureFlag.common]
> > +
> > +[PcdsFixedAtBuild.common]
> > +
> > +
> > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> > new file mode 100755
> > index ..5665ac6c8982
> > --- /dev/null
> > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> > @@ -0,0 +1,546 @@
> > +#/** @file
> > +#  Intel Stratix 10 SoC FPGA Package
> > +#
> 

Re: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei

2019-05-29 Thread Wu, Hao A
> -Original Message-
> From: Gao, Zhichao
> Sent: Thursday, May 30, 2019 11:21 AM
> To: Wu, Hao A; devel@edk2.groups.io
> Cc: Bret Barkelew; Wang, Jian J; Ni, Ray; Zeng, Star; Gao, Liming; Sean 
> Brogan;
> Michael Turner
> Subject: RE: [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei
> 
> 
> 
> > -Original Message-
> > From: Wu, Hao A
> > Sent: Wednesday, May 29, 2019 2:55 PM
> > To: Gao, Zhichao ; devel@edk2.groups.io
> > Cc: Bret Barkelew ; Wang, Jian J
> > ; Ni, Ray ; Zeng, Star
> > ; Gao, Liming ; Sean Brogan
> > ; Michael Turner
> > 
> > Subject: RE: [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei
> >
> > > -Original Message-
> > > From: Gao, Zhichao
> > > Sent: Wednesday, May 29, 2019 8:46 AM
> > > To: devel@edk2.groups.io
> > > Cc: Bret Barkelew; Wang, Jian J; Wu, Hao A; Ni, Ray; Zeng, Star; Gao,
> > > Liming; Sean Brogan; Michael Turner; Gao, Zhichao
> > > Subject: [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei
> > >
> > > From: Bret Barkelew 
> > >
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1853
> > >
> > > Sperate the capsule check function from GetCapsuleDescriptors
> >
> > Sperate -> Separate
> >
> > > and name it to AreCapsulesStaged.
> > > Rename GetCapsuleDescriptors to GetScatterGatherHeadEntries.
> > > And optimize its to remove the duplicated code.
> > >
> > > Cc: Jian J Wang 
> > > Cc: Hao A Wu 
> > > Cc: Ray Ni 
> > > Cc: Star Zeng 
> > > Cc: Liming Gao 
> > > Cc: Sean Brogan 
> > > Cc: Michael Turner 
> > > Cc: Bret Barkelew 
> > > Signed-off-by: Zhichao gao 
> > > ---
> > >  MdeModulePkg/Universal/CapsulePei/Capsule.h   |   3 +-
> > >  .../Universal/CapsulePei/CapsulePei.inf   |   3 +-
> > >  .../Universal/CapsulePei/UefiCapsule.c| 357 ++
> > >  3 files changed, 194 insertions(+), 169 deletions(-)
> >
> > I am a bit confused for the purpose of this patch.
> >
> > My understanding is that this patch will refine this driver to remove
> > duplicated code by abstract common codes into a new function. And there
> > will be no functional impact.
> >
> > However, after the change, the line of codes of this driver increased by
> > 20+ lines.
> >
> > Did I miss something for the purpose of this patch?
> 
> The commit message should be update:
> I view the code change again, here is the purpose of this patch:
> 1. separate the check function from GetCapsuleDescriptors. The original logic
> GetCapsuleDescriptors in  is unclear.

Understood, thanks for the clarification.

> 2. avoid calling query capsule variable twice, first time to get the SG list
> number and allocate buffer to save it, second time to copy the SG list to the
> buffer.
> After the patch it would put the SG list data into a template buffer and count
> the number. Then allocate the memory and copy data.

Agree.

Best Regards,
Hao Wu

> 
> I would update the above info to next patch. And remove the incorrect
> description.
> 
> >
> > Some additional comments below.
> >
> > >
> > > diff --git a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > index baf40423af..fc20dd8b92 100644
> > > --- a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > +++ b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > @@ -1,6 +1,6 @@
> > >  /** @file
> > >
> > > -Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > > reserved.
> > > +Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > > +reserved.
> > >
> > >  SPDX-License-Identifier: BSD-2-Clause-Patent
> > >
> > > @@ -30,6 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > > #include   #include 
> > > #include 
> > > +#include 
> > >  #include   #include
> > > "Common/CommonHeader.h"
> > >
> > > diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > index 5d43df3075..9c88b3986f 100644
> > > --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > @@ -6,7 +6,7 @@
> > >  #  This external input must be validated carefully to avoid security
> > > issue like  #  buffer overflow, integer overflow.
> > >  #
> > > -# Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > > reserved.
> > > +# Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > > +reserved.
> > >  # Copyright (c) 2017, AMD Incorporated. All rights reserved.  #
> > > # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -43,6 +43,7 @@
> > >BaseLib
> > >HobLib
> > >BaseMemoryLib
> > > +  MemoryAllocationLib
> > >PeiServicesLib
> > >PeimEntryPoint
> > >DebugLib
> > > diff --git a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > > b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > > index e967599e96..2d003369ca 100644
> > > --- a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > > +++ b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > > @@ -1,7 +1,7 @@
> > >  /** @file
> > >Capsule update PEIM for 

Re: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add Stratix 10 platform support

2019-05-29 Thread Loh, Tien Hock
> -Original Message-
> From: Wu, Hao A
> Sent: Thursday, May 30, 2019 9:03 AM
> To: devel@edk2.groups.io; Loh, Tien Hock ;
> thlo...@gmail.com
> Cc: Ard Biesheuvel ; Leif Lindholm
> ; Kinney, Michael D
> 
> Subject: RE: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add
> Stratix 10 platform support
> 
> > -Original Message-
> > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> > Loh, Tien Hock
> > Sent: Thursday, May 09, 2019 4:56 PM
> > To: devel@edk2.groups.io; thlo...@gmail.com
> > Cc: Loh, Tien Hock; Ard Biesheuvel; Leif Lindholm; Kinney, Michael D
> > Subject: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add
> > Stratix 10 platform support
> >
> > From: "Tien Hock, Loh" 
> >
> > Adds support for Intel Stratix 10 Platform.
> >
> > Signed-off-by: "Tien Hock, Loh" 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Cc: Ard Biesheuvel 
> > Cc: Leif Lindholm 
> > Cc: Michael D Kinney 
> >
> > --
> > v4
> > - Removed LibC
> > - Added NOOPT to BUILD_TARGETS
> > - Removed ARM from SUPPORTED_ARCHITECTURE
> 
> Hello Tien Hock,
> 
> Could you help to remove the IntelFrameworkModulePkg dependency on the
> platform? The package will be removed in the near future.
> 
> More specifically, for:
> 
> *
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBd
> sLib.inf
> I do not see the library is being consumed by any module and I think it
> can be dropped. Could you help to double-confirm on this?
> 
> *
> ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusC
> odeLibFramework/DxeReportStatusCodeLib.inf
> The platform seems do not have a status code router, so could you help to
> use
> MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull
> .inf
> for ReportStatusCodeLib instances?

OK noted. I'll fix this and resubmit a new version. Thanks!

> 
> Thanks in advance.
> 
> Best Regards,
> Hao Wu
> 
> > v3
> > - Updated Pcd with updated name
> > v2
> > - Updates ShellBinPkg with ShellPkg
> > ---
> >  Platform/Intel/Stratix10/Stratix10SoCPkg.dec   
> >|  30 ++
> >  Platform/Intel/Stratix10/Stratix10SoCPkg.dsc   
> >| 546
> > 
> >  Platform/Intel/Stratix10/Stratix10SoCPkg.fdf   
> >| 270
> > ++
> >  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
> > |  49 ++
> >  Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf 
> >|
> > 49 ++
> >  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c
> |
> > 43 ++
> >  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c   
> >|
> > 155 ++
> >  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c
> |
> > 167 ++
> >
> >
> Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelp
> > er.S |  51 ++
> >  Platform/Intel/Stratix10/Readme.md 
> >|  61 +++
> >  Platform/Intel/Stratix10/ShellScript/startup.nsh   
> >|   2 +
> >  11 files changed, 1423 insertions(+)
> >
> > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> > new file mode 100755
> > index ..5677ac7676d5
> > --- /dev/null
> > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> > @@ -0,0 +1,30 @@
> > +#/** @file
> > +#  Intel Stratix 10 SoC FPGA Package
> > +#
> > +# Copyright (c) 2019, Intel All rights reserved.
> > +#
> > +#This program and the accompanying materials are licensed and made
> > available under
> > +#the terms and conditions of the BSD License which accompanies this
> > distribution.
> > +#The full text of the license may be found at
> > +#http://opensource.org/licenses/bsd-license.php
> > +#
> > +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> > BASIS,
> > +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> > EXPRESS OR IMPLIED.
> > +#
> > +#**/
> > +
> > +[Defines]
> > +  DEC_SPECIFICATION  = 0x00010005
> > +  PACKAGE_NAME   = IntelSoCFpgaPkg
> > +  PACKAGE_GUID   = 45533DD0-C41F-4ab6-A5DF-65B52684AC60
> > +  PACKAGE_VERSION= 0.1
> > +
> > +[Includes.common]
> > +
> > +[Guids.common]
> > +  gIntelSocFpgaTokenSpaceGuid =  { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba,
> 0xa,
> > 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } }
> > +[PcdsFeatureFlag.common]
> > +
> > +[PcdsFixedAtBuild.common]
> > +
> > +
> > diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> > b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> > new file mode 100755
> > index ..5665ac6c8982
> > --- /dev/null
> > +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> > @@ -0,0 +1,546 @@
> > +#/** @file
> > +#  Intel Stratix 10 SoC FPGA Package
> > +#
> > +# Copyright (c) 2019, Intel All rights reserved.
> > +#
> > 

[edk2-devel] [PATCH v2] IntelFsp2Pkg/SplitFspBin.py: Support rebasing 1.x binary.

2019-05-29 Thread Chiu, Chasel
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1308

Support rebasing FSP 1.x binary.
FSP 1.x has single component in binary so not supported
by split command and rebase can be done with the same
command for rebasing FSP-T component in FSP 2.x image.

Test: both FSP 2.x (Kabylake) and FSP 1.x (BroadwellDE) binary
  can be rebased successfully.

Cc: Maurice Ma 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/Tools/SplitFspBin.py   | 21 
+
 IntelFsp2Pkg/Tools/UserManuals/SplitFspBinUserManual.md | 47 
+--
 2 files changed, 38 insertions(+), 30 deletions(-)

diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py 
b/IntelFsp2Pkg/Tools/SplitFspBin.py
index 2458231d09..15c8bebee2 100644
--- a/IntelFsp2Pkg/Tools/SplitFspBin.py
+++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
@@ -1,6 +1,6 @@
 ## @ FspTool.py
 #
-# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -14,12 +14,12 @@ import argparse
 from   ctypes import *
 
 """
-This utility supports some operations for Intel FSP 2.0 image.
+This utility supports some operations for Intel FSP 1.x/2.x image.
 It supports:
-- Display FSP 2.0 information header
-- Split FSP 2.0 image into individual FSP-T/M/S/O component
-- Rebase FSP 2.0 components to a different base address
-- Generate FSP mapping C header file
+- Display FSP 1.x/2.x information header
+- Split FSP 2.x image into individual FSP-T/M/S/O component
+- Rebase FSP 1.x/2.x components to a different base address
+- Generate FSP 1.x/2.x mapping C header file
 """
 
 CopyRightHeaderFile = """/*
@@ -500,8 +500,6 @@ class FirmwareDevice:
 
 fih = None
 for fsp in self.FspList:
-if fsp.Fih.HeaderRevision < 3:
-raise Exception("ERROR: FSP 1.x is not supported by this tool 
!")
 if not fih:
 fih = fsp.Fih
 else:
@@ -713,6 +711,8 @@ def SplitFspBin (fspfile, outdir, nametemplate):
 fd.ParseFsp ()
 
 for fsp in fd.FspList:
+if fsp.Fih.HeaderRevision < 3:
+raise Exception("ERROR: FSP 1.x is not supported by the split 
command !")
 ftype = fsp.Type
 if not nametemplate:
 nametemplate = fspfile
@@ -742,6 +742,11 @@ def RebaseFspBin (FspBinary, FspComponent, FspBase, 
OutputDir, OutputFile):
 
 found = False
 for fsp in fd.FspList:
+# Is this FSP 1.x single binary?
+if fsp.Fih.HeaderRevision < 3:
+found = True
+ftype = 'X'
+break
 ftype = fsp.Type.lower()
 if ftype == fspcomp:
 found = True
diff --git a/IntelFsp2Pkg/Tools/UserManuals/SplitFspBinUserManual.md 
b/IntelFsp2Pkg/Tools/UserManuals/SplitFspBinUserManual.md
index 064e0ac845..06d87bbb2e 100644
--- a/IntelFsp2Pkg/Tools/UserManuals/SplitFspBinUserManual.md
+++ b/IntelFsp2Pkg/Tools/UserManuals/SplitFspBinUserManual.md
@@ -1,68 +1,71 @@
-# SplitFspBin.py is a python script to support some operations on Intel FSP 
2.0 image.
+# SplitFspBin.py is a python script to support some operations on Intel FSP 
1.x/2.x image.
 
 It supports:
 
-- Split Intel FSP 2.0 image into individual FSP-T/M/S/O component
+- Split Intel FSP 2.x image into individual FSP-T/M/S/O component
 
-- Rebase Intel FSP 2.0 components to different base addresses
+- Rebase Intel FSP 1.x/2.x components to different base addresses
 
-- Generate Intel FSP 2.0 C header file
+- Generate Intel FSP 1.x/2.x C header file
 
-- Display Intel FSP 2.0 information header for each FSP component
+- Display Intel FSP 1.x/2.x information header for each FSP component
 
-## Split Intel FSP 2.0 image
+## Split Intel FSP 2.x image
 
-To split individual FSP component in Intel FSP 2.0 image, the following
+FSP 1.x image is not supported by split command.
+To split individual FSP component in Intel FSP 2.x image, the following
 command can be used:
 
**python SplitFspBin.py split [-h] -f FSPBINARY [-o OUTPUTDIR] [-n 
NAMETEMPLATE]**
 
-For example:  
+For example:
 
`python SplitFspBin.py split -f FSP.bin`
 
It will create FSP_T.bin, FSP_M.bin and FSP_S.bin in current directory.
 
-## Rebase Intel FSP 2.0 components
+## Rebase Intel FSP 1.x/2.x components
 
-To rebase one or multiple FSP components in Intel FSP 2.0 image, the following
+To rebase one or multiple FSP components in Intel FSP 1.x/2.x image, the 
following
 command can be used:
 
**python SplitFspBin.py rebase [-h] -f FSPBINARY -c {t,m,s,o} [{t,m,s,o} 
...] -b FSPBASE [FSPBASE ...] [-o OUTPUTDIR] [-n OUTPUTFILE]**
 
-For example:  
+For example:
 
-   `python SplitFspBin.py rebase -f FSP.bin –c t –b 0xFFF0 –n FSP_new.bin`
+   `python SplitFspBin.py rebase -f FSP.bin -c t -b 0xFFF0 -n 

Re: [edk2-devel] [PATCH v2 0/5] Implement SM3 measured boot

2019-05-29 Thread Wang, Jian J
Hi Imran,

You're using non-existing api in this patch series. The openssl upgrading
patch (BZ1089) won't provide them as well. Please wait for another patch.
Xiaoyu is working on it.

Regards,
Jian


> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Imran
> Desai
> Sent: Wednesday, May 29, 2019 4:41 AM
> To: devel@edk2.groups.io
> Subject: [edk2-devel] [PATCH v2 0/5] Implement SM3 measured boot
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1781
> 
> EDK2 Support for SM3 digest algorithm is needed to enable TPM with SM3 PCR
> banks. This digest algorithm is part of the China Crypto algorithm suite.
> This integration has dependency on the openssl_1_1_1b integration into
> edk2.
> 
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Chao Zhang 
> Cc: Jiewen Yao 
> Cc: Jian Wang 
> Cc: Jordan Justen 
> Cc: Laszlo Ersek 
> Cc: Ard Biesheuvel 
> Cc: Marc-André Lureau 
> Cc: Stefan Berger 
> 
> 
> Imran Desai (5):
>   MdePkg/Protocol/Hash: introduce GUID for SM3 digest algorithm
>   SecurityPkg: introduce the SM3 digest algorithm
>   SecurityPkg/HashLibBaseCryptoRouter: recognize the SM3 digest
> algorithm
>   SecurityPkg: set SM3 bit in TPM 2.0 hash mask by default
>   OvmfPkg: link SM3 support into Tcg2Pei and Tcg2Dxe
> 
>  SecurityPkg/SecurityPkg.dec   |   5 +-
>  OvmfPkg/OvmfPkgIa32.dsc   |   2 +
>  OvmfPkg/OvmfPkgIa32X64.dsc|   2 +
>  OvmfPkg/OvmfPkgX64.dsc|   2 +
>  SecurityPkg/SecurityPkg.dsc   |   3 +
>  .../HashInstanceLibSm3/HashInstanceLibSm3.inf |  46 ++
>  MdePkg/Include/Protocol/Hash.h|   5 +
>  SecurityPkg/Include/Library/HashLib.h |   1 +
>  .../HashInstanceLibSm3/HashInstanceLibSm3.c   | 155 ++
>  .../HashLibBaseCryptoRouterCommon.c   |   1 +
>  .../HashInstanceLibSm3/HashInstanceLibSm3.uni |  21 +++
>  11 files changed, 241 insertions(+), 2 deletions(-)
>  create mode 100644
> SecurityPkg/Library/HashInstanceLibSm3/HashInstanceLibSm3.inf
>  create mode 100644
> SecurityPkg/Library/HashInstanceLibSm3/HashInstanceLibSm3.c
>  create mode 100644
> SecurityPkg/Library/HashInstanceLibSm3/HashInstanceLibSm3.uni
> 
> --
> 2.17.0
> 
> 
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41658): https://edk2.groups.io/g/devel/message/41658
Mute This Topic: https://groups.io/mt/31826560/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei

2019-05-29 Thread Gao, Zhichao



> -Original Message-
> From: Wu, Hao A
> Sent: Wednesday, May 29, 2019 2:55 PM
> To: Gao, Zhichao ; devel@edk2.groups.io
> Cc: Bret Barkelew ; Wang, Jian J
> ; Ni, Ray ; Zeng, Star
> ; Gao, Liming ; Sean Brogan
> ; Michael Turner
> 
> Subject: RE: [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei
> 
> > -Original Message-
> > From: Gao, Zhichao
> > Sent: Wednesday, May 29, 2019 8:46 AM
> > To: devel@edk2.groups.io
> > Cc: Bret Barkelew; Wang, Jian J; Wu, Hao A; Ni, Ray; Zeng, Star; Gao,
> > Liming; Sean Brogan; Michael Turner; Gao, Zhichao
> > Subject: [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei
> >
> > From: Bret Barkelew 
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1853
> >
> > Sperate the capsule check function from GetCapsuleDescriptors
> 
> Sperate -> Separate
> 
> > and name it to AreCapsulesStaged.
> > Rename GetCapsuleDescriptors to GetScatterGatherHeadEntries.
> > And optimize its to remove the duplicated code.
> >
> > Cc: Jian J Wang 
> > Cc: Hao A Wu 
> > Cc: Ray Ni 
> > Cc: Star Zeng 
> > Cc: Liming Gao 
> > Cc: Sean Brogan 
> > Cc: Michael Turner 
> > Cc: Bret Barkelew 
> > Signed-off-by: Zhichao gao 
> > ---
> >  MdeModulePkg/Universal/CapsulePei/Capsule.h   |   3 +-
> >  .../Universal/CapsulePei/CapsulePei.inf   |   3 +-
> >  .../Universal/CapsulePei/UefiCapsule.c| 357 ++
> >  3 files changed, 194 insertions(+), 169 deletions(-)
> 
> I am a bit confused for the purpose of this patch.
> 
> My understanding is that this patch will refine this driver to remove
> duplicated code by abstract common codes into a new function. And there
> will be no functional impact.
> 
> However, after the change, the line of codes of this driver increased by
> 20+ lines.
> 
> Did I miss something for the purpose of this patch?

The commit message should be update:
I view the code change again, here is the purpose of this patch:
1. separate the check function from GetCapsuleDescriptors. The original logic 
GetCapsuleDescriptors in  is unclear.
2. avoid calling query capsule variable twice, first time to get the SG list 
number and allocate buffer to save it, second time to copy the SG list to the 
buffer.
After the patch it would put the SG list data into a template buffer and count 
the number. Then allocate the memory and copy data.

I would update the above info to next patch. And remove the incorrect 
description.

> 
> Some additional comments below.
> 
> >
> > diff --git a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > index baf40423af..fc20dd8b92 100644
> > --- a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > +++ b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > @@ -1,6 +1,6 @@
> >  /** @file
> >
> > -Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > reserved.
> > +Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > +reserved.
> >
> >  SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > @@ -30,6 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #include   #include 
> > #include 
> > +#include 
> >  #include   #include
> > "Common/CommonHeader.h"
> >
> > diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > index 5d43df3075..9c88b3986f 100644
> > --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > @@ -6,7 +6,7 @@
> >  #  This external input must be validated carefully to avoid security
> > issue like  #  buffer overflow, integer overflow.
> >  #
> > -# Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > reserved.
> > +# Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > +reserved.
> >  # Copyright (c) 2017, AMD Incorporated. All rights reserved.  #
> > # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -43,6 +43,7 @@
> >BaseLib
> >HobLib
> >BaseMemoryLib
> > +  MemoryAllocationLib
> >PeiServicesLib
> >PeimEntryPoint
> >DebugLib
> > diff --git a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > index e967599e96..2d003369ca 100644
> > --- a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > +++ b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
> > @@ -1,7 +1,7 @@
> >  /** @file
> >Capsule update PEIM for UEFI2.0
> >
> > -Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > reserved.
> > +Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > +reserved.
> >  Copyright (c) 2017, AMD Incorporated. All rights reserved.
> >
> >  SPDX-License-Identifier: BSD-2-Clause-Patent @@ -10,6 +10,8 @@
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >  #include "Capsule.h"
> >
> > +#define DEFAULT_SG_LIST_HEADS   (20)
> > +
> >  #ifdef MDE_CPU_IA32
> >  //
> >  // Global Descriptor Table (GDT)
> > @@ -791,30 +793,89 @@ BuildMemoryResourceDescriptor (  }
> >
> >  /**
> > -  Checks for the presence of capsule 

Re: [edk2-devel] [PATCH v3 1/1] BaseTools:Extend the binary cache to support library cache

2019-05-29 Thread Bob Feng
The "entend" should be "extend", right? I can fix it when I push this patch.

Reviewed-by: Bob Feng 

-Original Message-
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Steven Shi
Sent: Thursday, May 30, 2019 10:31 AM
To: devel@edk2.groups.io
Cc: Gao, Liming ; Feng, Bob C ; 
Rodriguez, Christian ; Fan, ZhijuX 

Subject: [edk2-devel] [PATCH v3 1/1] BaseTools:Extend the binary cache to 
support library cache

https://bugzilla.tianocore.org/show_bug.cgi?id=1797

Current binary cache doesn't support to save and restore the library module. If 
a driver module cache miss happen, all its dependency library modules need 
rebuild which is very time-consuming. This patch is to entend the binary cache 
to support library.

Cc: Liming Gao 
Cc: Bob Feng 
Cc: Christian Rodriguez 
Signed-off-by: Steven Shi 
---
 BaseTools/Source/Python/AutoGen/AutoGen.py | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index a5bef4f7c6..7b35f837f5 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -3906,6 +3906,12 @@ class ModuleAutoGen(AutoGen):
 ModuleFile = path.join(self.OutputDir, self.Name + '.inf')
 if os.path.exists(ModuleFile):
 shutil.copy2(ModuleFile, FileDir)
+else:
+OutputDir = self.OutputDir.replace('\\', '/').strip('/')
+DebugDir = self.DebugDir.replace('\\', '/').strip('/')
+for Item in self.CodaTargetList:
+File = Item.Target.Path.replace('\\', 
'/').strip('/').replace(DebugDir, '').replace(OutputDir, '').strip('/')
+self.OutputFile.add(File)
 if not self.OutputFile:
 Ma = self.BuildDatabase[self.MetaFile, self.Arch, 
self.BuildTarget, self.ToolChain]
 self.OutputFile = Ma.Binaries
--
2.17.1.windows.2





-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41656): https://edk2.groups.io/g/devel/message/41656
Mute This Topic: https://groups.io/mt/31843505/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v3 1/1] BaseTools:Extend the binary cache to support library cache

2019-05-29 Thread Steven Shi
https://bugzilla.tianocore.org/show_bug.cgi?id=1797

Current binary cache doesn't support to save and restore
the library module. If a driver module cache miss happen,
all its dependency library modules need rebuild which
is very time-consuming. This patch is to entend the binary
cache to support library.

Cc: Liming Gao 
Cc: Bob Feng 
Cc: Christian Rodriguez 
Signed-off-by: Steven Shi 
---
 BaseTools/Source/Python/AutoGen/AutoGen.py | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index a5bef4f7c6..7b35f837f5 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -3906,6 +3906,12 @@ class ModuleAutoGen(AutoGen):
 ModuleFile = path.join(self.OutputDir, self.Name + '.inf')
 if os.path.exists(ModuleFile):
 shutil.copy2(ModuleFile, FileDir)
+else:
+OutputDir = self.OutputDir.replace('\\', '/').strip('/')
+DebugDir = self.DebugDir.replace('\\', '/').strip('/')
+for Item in self.CodaTargetList:
+File = Item.Target.Path.replace('\\', 
'/').strip('/').replace(DebugDir, '').replace(OutputDir, '').strip('/')
+self.OutputFile.add(File)
 if not self.OutputFile:
 Ma = self.BuildDatabase[self.MetaFile, self.Arch, 
self.BuildTarget, self.ToolChain]
 self.OutputFile = Ma.Binaries
-- 
2.17.1.windows.2


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41655): https://edk2.groups.io/g/devel/message/41655
Mute This Topic: https://groups.io/mt/31843505/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v3 0/1] BaseTools:Extend the binary cache to support library

2019-05-29 Thread Steven Shi
V3 change:
Update the commit message and move the change notices in cover letter

V2 change:
Simplify the library cache implementation and remove
CacheRestored flag based filter. Use the current
CanSkipbyHash() filter in AddDependency() instead

V1: Initial version to enable the library cache

Steven Shi (1):
  BaseTools:Extend the binary cache to support library cache

 BaseTools/Source/Python/AutoGen/AutoGen.py | 6 ++
 1 file changed, 6 insertions(+)

-- 
2.17.1.windows.2


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41654): https://edk2.groups.io/g/devel/message/41654
Mute This Topic: https://groups.io/mt/31843504/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH v2] BaseTools:Extend the binary cache to support library cache

2019-05-29 Thread Steven Shi
OK, will move the change notices from commit message to cover letter.


Thanks
Steven Shi

> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Wednesday, May 29, 2019 7:14 PM
> To: devel@edk2.groups.io; Shi, Steven 
> Cc: Gao, Liming ; Feng, Bob C ;
> Rodriguez, Christian ; Fan, ZhijuX
> 
> Subject: Re: [edk2-devel] [PATCH v2] BaseTools:Extend the binary cache to
> support library cache
> 
> On Wed, May 29, 2019 at 09:46:54AM +0800, Steven Shi wrote:
> > V2 change:
> > Simplify the library cache implementation and remove
> > CacheRestored flag based filter. Use the current
> > CanSkipbyHash() filter in AddDependency() instead.
> >
> > V1 change:
> 
> Please don't put change notices in the commit message. These go below
> ---, or in a cover letter.
> 
> /
> Leif
> 
> >
> > https://bugzilla.tianocore.org/show_bug.cgi?id=1797
> >
> > Current binary cache doesn't support to save and restore
> > the library module. If a driver module cache miss happen,
> > all its dependency library modules need rebuild which
> > is very time-consuming. This patch is to entend the binary
> > cache to support library.
> >
> > Cc: Liming Gao 
> > Cc: Bob Feng 
> > Cc: Christian Rodriguez 
> > Signed-off-by: Steven Shi 
> > ---
> >  BaseTools/Source/Python/AutoGen/AutoGen.py | 6 ++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py
> b/BaseTools/Source/Python/AutoGen/AutoGen.py
> > index a5bef4f7c6..7b35f837f5 100644
> > --- a/BaseTools/Source/Python/AutoGen/AutoGen.py
> > +++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
> > @@ -3906,6 +3906,12 @@ class ModuleAutoGen(AutoGen):
> >  ModuleFile = path.join(self.OutputDir, self.Name + '.inf')
> >  if os.path.exists(ModuleFile):
> >  shutil.copy2(ModuleFile, FileDir)
> > +else:
> > +OutputDir = self.OutputDir.replace('\\', '/').strip('/')
> > +DebugDir = self.DebugDir.replace('\\', '/').strip('/')
> > +for Item in self.CodaTargetList:
> > +File = Item.Target.Path.replace('\\', 
> > '/').strip('/').replace(DebugDir,
> '').replace(OutputDir, '').strip('/')
> > +self.OutputFile.add(File)
> >  if not self.OutputFile:
> >  Ma = self.BuildDatabase[self.MetaFile, self.Arch, 
> > self.BuildTarget,
> self.ToolChain]
> >  self.OutputFile = Ma.Binaries
> > --
> > 2.17.1.windows.2
> >
> >
> > 
> >

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41653): https://edk2.groups.io/g/devel/message/41653
Mute This Topic: https://groups.io/mt/31829360/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] BaseTools:Update binary cache restore time to current time

2019-05-29 Thread Bob Feng
Reviewed-by: Bob Feng 


-Original Message-
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Steven Shi
Sent: Tuesday, May 28, 2019 4:35 PM
To: devel@edk2.groups.io
Cc: Gao, Liming ; Feng, Bob C ; 
Rodriguez, Christian ; Fan, ZhijuX 

Subject: [edk2-devel] [PATCH] BaseTools:Update binary cache restore time to 
current time

https://bugzilla.tianocore.org/show_bug.cgi?id=1742

Current Binary Cache doesn't update the restored file creation and modification 
times to the current time.
Preserve the new restored file creation time as old cached time might has 
potential issue to block the make to build updated files based on the time 
stamp.
Enhance to update the restored file creation time to current time.

Cc: Liming Gao 
Cc: Bob Feng 
Cc: Zhiju Fan 
Signed-off-by: Steven Shi 
---
 BaseTools/Source/Python/AutoGen/AutoGen.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index a5bef4f7c6..57ca67f692 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -3941,14 +3941,14 @@ class ModuleAutoGen(AutoGen):
 for root, dir, files in os.walk(FileDir):
 for f in files:
 if self.Name + '.hash' in f:
-shutil.copy2(HashFile, self.BuildDir)
+shutil.copy(HashFile, self.BuildDir)
 else:
 File = path.join(root, f)
 sub_dir = os.path.relpath(File, FileDir)
 destination_file = 
os.path.join(self.OutputDir, sub_dir)
 destination_dir = 
os.path.dirname(destination_file)
 CreateDirectory(destination_dir)
-shutil.copy2(File, destination_dir)
+shutil.copy(File, destination_dir)
 if self.Name == "PcdPeim" or self.Name == "PcdDxe":
 CreatePcdDatabaseCode(self, TemplateString(), 
TemplateString())
 return True
--
2.17.1.windows.2





-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41652): https://edk2.groups.io/g/devel/message/41652
Mute This Topic: https://groups.io/mt/31819590/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH V5] BaseTools:Make BaseTools support new rules to generate RAW FFS FILE

2019-05-29 Thread Bob Feng
OK. For this patch, Reviewed-by: Bob Feng 


-Original Message-
From: Fan, ZhijuX 
Sent: Wednesday, May 29, 2019 4:25 PM
To: Feng, Bob C ; devel@edk2.groups.io
Cc: Gao, Liming 
Subject: RE: [PATCH V5] BaseTools:Make BaseTools support new rules to generate 
RAW FFS FILE

The Dict parameter is not used in this function, I will enter an BZ: 
https://bugzilla.tianocore.org/show_bug.cgi?id=1858  to clean up the unused 
parameters



Any question, please let me know. Thanks.

Best Regards
Fan Zhiju



> -Original Message-
> From: Feng, Bob C
> Sent: Wednesday, May 29, 2019 3:16 PM
> To: Fan, ZhijuX ; devel@edk2.groups.io
> Cc: Gao, Liming 
> Subject: RE: [PATCH V5] BaseTools:Make BaseTools support new rules to 
> generate RAW FFS FILE
> 
> Hi Zhiju,
> 
> For the changes,
> 
> -def __InfParse__(self, Dict = {}):
> +def __InfParse__(self, Dict = None, IsGenFfs=False):
> 
> and
> 
> -def GetFileList(FfsInf, FileType, FileExtension, Dict = {}, 
> IsMakefile=False):
> +def GetFileList(FfsInf, FileType, FileExtension, Dict = None,
> IsMakefile=False, SectionType=None):
> 
> I think you need to add
> If Dict is None:
> Dict = {}
> 
> In the function body.
> 
> 
> Thanks,
> Bob
> 
> -Original Message-
> From: Fan, ZhijuX
> Sent: Wednesday, May 29, 2019 1:30 PM
> To: devel@edk2.groups.io
> Cc: Gao, Liming ; Feng, Bob C 
> 
> Subject: [PATCH V5] BaseTools:Make BaseTools support new rules to 
> generate RAW FFS FILE
> 
> BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1765
> 
> If RAW FFS File Rule has no section for its data.For RAW FFS File, 
> directly call GenFfs tool to generate FFS file.
> 
> Ffs Rule:
> [Rule.Common.USER_DEFINED.MicroCode]
>   FILE RAW = $(NAMED_GUID) {
> $(INF_OUTPUT)/$(MODULE_NAME).bin
>   }
> [Rule.Common.USER_DEFINED.LOGO]
>   FILE RAW = $(NAMED_GUID) {
>|.bmp
>   }
> 
> As shown in the rule above,if SectionType and FileType not defined, 
> FFS files are generated directly, and no other type of file is generated.
> 
> The patch is to make the BaseTools support these two rules
> 
> Cc: Bob Feng 
> Cc: Liming Gao 
> Signed-off-by: Zhiju.Fan 
> ---
>  BaseTools/Source/Python/Common/DataType.py|  1 +
>  BaseTools/Source/Python/GenFds/EfiSection.py  | 22
> +-
>  BaseTools/Source/Python/GenFds/FdfParser.py   | 14 --
>  BaseTools/Source/Python/GenFds/FfsInfStatement.py |  9 ++---
>  BaseTools/Source/Python/GenFds/Section.py |  7 ++-
>  5 files changed, 46 insertions(+), 7 deletions(-)
> 
> diff --git a/BaseTools/Source/Python/Common/DataType.py
> b/BaseTools/Source/Python/Common/DataType.py
> index 7cd67bc01a..83ec36c235 100644
> --- a/BaseTools/Source/Python/Common/DataType.py
> +++ b/BaseTools/Source/Python/Common/DataType.py
> @@ -122,6 +122,7 @@ BINARY_FILE_TYPE_VER = 'VER'
>  BINARY_FILE_TYPE_UI = 'UI'
>  BINARY_FILE_TYPE_BIN = 'BIN'
>  BINARY_FILE_TYPE_FV = 'FV'
> +BINARY_FILE_TYPE_RAW = 'RAW_BINARY'
> 
>  PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
>  PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
> diff --git a/BaseTools/Source/Python/GenFds/EfiSection.py
> b/BaseTools/Source/Python/GenFds/EfiSection.py
> index 302f244faf..74f176cfef 100644
> --- a/BaseTools/Source/Python/GenFds/EfiSection.py
> +++ b/BaseTools/Source/Python/GenFds/EfiSection.py
> @@ -93,7 +93,7 @@ class EfiSection (EfiSectionClassObject):
>  if '.depex' in SuffixMap:
>  FileList.append(Filename)
>  else:
> -FileList, IsSect = Section.Section.GetFileList(FfsInf, 
> self.FileType,
> self.FileExtension, Dict, IsMakefile=IsMakefile)
> +FileList, IsSect = Section.Section.GetFileList(FfsInf,
> + self.FileType, self.FileExtension, Dict, IsMakefile=IsMakefile,
> + SectionType=SectionType)
>  if IsSect :
>  return FileList, self.Alignment
> 
> @@ -217,6 +217,26 @@ class EfiSection (EfiSectionClassObject):
>   Ui=StringData, 
> IsMakefile=IsMakefile)
>  OutputFileList.append(OutputFile)
> 
> +#
> +# If Section Type is BINARY_FILE_TYPE_RAW
> +#
> +elif SectionType == BINARY_FILE_TYPE_RAW:
> +"""If File List is empty"""
> +if FileList == []:
> +if self.Optional == True:
> +GenFdsGlobalVariable.VerboseLogger("Optional 
> + Section don't
> exist!")
> +return [], None
> +else:
> +EdkLogger.error("GenFds", GENFDS_ERROR, "Output 
> + file for %s section could not be found for %s" % (SectionType,
> + InfFileName))
> +
> +elif len(FileList) > 1:
> +EdkLogger.error("GenFds", GENFDS_ERROR,
> +"Files suffixed with %s are not 
> + allowed to have more than
> one file in %s[Binaries] section" % (
> +

[edk2-devel] RFC for edk2-tools-library v2 previously known as RFC for Edk2-Library

2019-05-29 Thread Sean via Groups.Io
RFC  edk2-tools-library creation

Create a new tianocore owned repository to host a python library package in 
support of UEFI development.  This package will allow easy sharing of python 
library code to facilitate reuse.  Inclusion of this package and dependency 
management should be managed using Pip/Pypi.   This is a supplemental package 
and is not required to be used for edk2 builds. To avoid conflicting 
dependencies on your host platform it is strongly suggested to leverage python 
virtual environments.

Examples of content here

* Edk2 file type parsing
* UEFI structure encode/decode in python
* Packaging tools (Capsules generation, signing, INF gen, Cat gen)
* TPM support code
* No command line tools/interface

Maintainers

* Sean Brogan
* Bret Barkelew
* Placeholder for existing maintainer from the basetools

License

* BSD + Patent (edk2 aligned)

Contribution process and issue tracking

* Follow Github PR process for contributions and issue tracking
* Contributor forks repo in github
* Contributor creates branch for work
* Contributor updates release notes to indicate change (if necessary)
* Contributor submits PR to master branch of tianocore/edk2-tools-library repo
* Review feedback is given in PR
* Python Tests are run on the repo (new contributions need unit tests)
* Python Style (flake8) must pass
* All review feedback must be completed, maintainers approved, and tests run 
successfully before PR is squash merged into master. Since squash merge is used 
there is no support for patchsets. The PR should be sized appropriately.

Documentation

* Use Github IO documentation/wiki hosting
* Example content
* https://microsoft.github.io/mu/dyn/mu_pip_python_library/developing/ ( 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fmicrosoft.github.io%2Fmu%2Fdyn%2Fmu_pip_python_library%2Fdeveloping%2F=01%7C01%7Csean.brogan%40microsoft.com%7C47c4ca03e19b4fffc8ad08d6d314774a%7C72f988bf86f141af91ab2d7cd011db47%7C1=fKIb1Pfj4AqoGVOWudcyFMxMypJk%2FHTts9aMxZ8HukI%3D=0
 )
* https://microsoft.github.io/mu/dyn/mu_pip_python_library/publishing/ ( 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fmicrosoft.github.io%2Fmu%2Fdyn%2Fmu_pip_python_library%2Fpublishing%2F=01%7C01%7Csean.brogan%40microsoft.com%7C47c4ca03e19b4fffc8ad08d6d314774a%7C72f988bf86f141af91ab2d7cd011db47%7C1=QJMUMB1hIusaRVJhgsi9kF9KIbgdhS0WRnIXVkGeBCM%3D=0
 )
* Readme at root of repo
* Example: https://github.com/Microsoft/mu_pip_python_library ( 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2FMicrosoft%2Fmu_pip_python_library=01%7C01%7Csean.brogan%40microsoft.com%7C47c4ca03e19b4fffc8ad08d6d314774a%7C72f988bf86f141af91ab2d7cd011db47%7C1=DiuPnNMagvYYf0XXxDycSVHqijBBcDT0fXHzVY9U6%2Fw%3D=0
 )
* API documentation
* Figure out autogenerated pydocs

CI Builds

* CI build process using dev ops (new TianoCore organization created in Azure 
devops)
* Validation is done thru build process
* Release publication done thru manual CI Build
* Examples from Mu-Python-Library
* Windows CI - https://dev.azure.com/projectmu/mu%20pip/_build?definitionId=13 
( 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev.azure.com%2Fprojectmu%2Fmu%2520pip%2F_build%3FdefinitionId%3D13=01%7C01%7Csean.brogan%40microsoft.com%7C47c4ca03e19b4fffc8ad08d6d314774a%7C72f988bf86f141af91ab2d7cd011db47%7C1=jQCCZo2u8JVisCchOoMLSgKJbG3YEk%2FG1JP9fI4g2JY%3D=0
 )
* Linux CI - https://dev.azure.com/projectmu/mu%20pip/_build?definitionId=12 ( 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev.azure.com%2Fprojectmu%2Fmu%2520pip%2F_build%3FdefinitionId%3D12=01%7C01%7Csean.brogan%40microsoft.com%7C47c4ca03e19b4fffc8ad08d6d314774a%7C72f988bf86f141af91ab2d7cd011db47%7C1=CILlTdeEGpsi%2BCQNiZdIqd2Vt2RQV6L3qjz2rWEARYE%3D=0
 )
* Publishing - https://dev.azure.com/projectmu/mu%20pip/_build?definitionId=16 
( 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev.azure.com%2Fprojectmu%2Fmu%2520pip%2F_build%3FdefinitionId%3D16=01%7C01%7Csean.brogan%40microsoft.com%7C47c4ca03e19b4fffc8ad08d6d314774a%7C72f988bf86f141af91ab2d7cd011db47%7C1=hkpzn9P6RBjduYBWjN56Y2qRBWyOG32mFkP%2BwtY7KBQ%3D=0
 )

Release

* Release to Pypi as edk2-tools-library for easy usage in product environment
* Versioned follows: Aa.bb.cc and is based on tags in git
* AA == Major version.  Changes don’t need to be backward compatible
* BB == Minor version.  Significant new features.  Backward compatibility 
maintained
* CC == Bug fix/patch/small optional feature
* Package on Pypi will be owned by Tianocore group
* Example for mu-python-library: https://pypi.org/project/mu-python-library/ ( 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpypi.org%2Fproject%2Fmu-python-library%2F=01%7C01%7Csean.brogan%40microsoft.com%7C47c4ca03e19b4fffc8ad08d6d314774a%7C72f988bf86f141af91ab2d7cd011db47%7C1=5nTb93dDnAo%2FsWyfv1zYEIkJF8L58YY5P3BkzKi4Ivc%3D=0
 )

Other Notes

* Only support Python 3 (prefer 3.7+)
* This 

Re: [edk2-devel] Maintainers.txt: update UEFI payload information

2019-05-29 Thread Liming Gao
Reviewed-by: Liming Gao 

>-Original Message-
>From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
>Guo Dong
>Sent: Thursday, May 30, 2019 3:07 AM
>To: devel@edk2.groups.io
>Cc: Ma, Maurice ; You, Benjamin
>; Dong, Guo ; Agyeman,
>Prince 
>Subject: [edk2-devel] Maintainers.txt: update UEFI payload information
>
>Remove CorebootModulePkg and CorebootPayloadPkg, and add
>UefiPayloadPkg to reflect recently change in UEFI payload.
>wiki link for UefiPayloadPkg would be available soon.
>
>Signed-off-by: Guo Dong 
>---
> Maintainers.txt | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
>diff --git a/Maintainers.txt b/Maintainers.txt
>index f3ce5edd8a..010ec31404 100644
>--- a/Maintainers.txt
>+++ b/Maintainers.txt
>@@ -86,13 +86,6 @@ M: Bob Feng 
> M: Liming Gao 
> R: Yonghong Zhu 
>
>-CorebootModulePkg, CorebootPayloadPkg
>-W:
>https://github.com/tianocore/tianocore.github.io/wiki/Coreboot_UEFI_paylo
>ad
>-M: Maurice Ma 
>-M: Prince Agyeman 
>-M: Benjamin You 
>-S: Maintained
>-
> CryptoPkg
> W: https://github.com/tianocore/tianocore.github.io/wiki/CryptoPkg
> M: Jian Wang 
>@@ -238,6 +231,13 @@ M: Eric Dong 
> M: Ray Ni 
> R: Laszlo Ersek 
>
>+UefiPayloadPkg
>+W: https://github.com/tianocore/tianocore.github.io/wiki/UefiPayloadPkg
>+M: Maurice Ma 
>+M: Guo Dong 
>+M: Benjamin You 
>+S: Maintained
>+
> StandaloneMmPkg
> M: Achin Gupta 
> M: Jiewen Yao 
>--
>2.16.2.windows.1
>
>
>


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41649): https://edk2.groups.io/g/devel/message/41649
Mute This Topic: https://groups.io/mt/31837296/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSplitBin.py: Support rebasing 1.x binary.

2019-05-29 Thread Chiu, Chasel


Yes. I will update the document.

Thanks!
Chasel


> -Original Message-
> From: Zeng, Star
> Sent: Wednesday, May 29, 2019 11:20 PM
> To: Chiu, Chasel ; devel@edk2.groups.io
> Cc: Ma, Maurice ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: RE: [PATCH] IntelFsp2Pkg/FspSplitBin.py: Support rebasing 1.x binary.
> 
> Shouldn't the SplitFspBinUserManual.md also be updated?
> 
> 
> Thanks,
> Star
> 
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Wednesday, May 29, 2019 10:33 PM
> > To: devel@edk2.groups.io
> > Cc: Ma, Maurice ; Desimone, Nathaniel L
> > ; Zeng, Star 
> > Subject: [PATCH] IntelFsp2Pkg/FspSplitBin.py: Support rebasing 1.x binary.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1308
> >
> > Support rebasing FSP 1.X binary.
> >
> > Test: both FSP 2.X (Kabylake) and FSP 1.X (BroadwellDE) binary
> >   can be rebased successfully.
> >
> > Cc: Maurice Ma 
> > Cc: Nate DeSimone 
> > Cc: Star Zeng 
> > Signed-off-by: Chasel Chiu 
> > ---
> >  IntelFsp2Pkg/Tools/SplitFspBin.py | 21 +
> >  1 file changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py
> > b/IntelFsp2Pkg/Tools/SplitFspBin.py
> > index 2458231d09..15c8bebee2 100644
> > --- a/IntelFsp2Pkg/Tools/SplitFspBin.py
> > +++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
> > @@ -1,6 +1,6 @@
> >  ## @ FspTool.py
> >  #
> > -# Copyright (c) 2015 - 2018, Intel Corporation. All rights
> > reserved.
> > +# Copyright (c) 2015 - 2019, Intel Corporation. All rights
> > +reserved.
> >  # SPDX-License-Identifier: BSD-2-Clause-Patent  #  ## @@ -14,12
> > +14,12 @@ import argparse
> >  from   ctypes import *
> >
> >  """
> > -This utility supports some operations for Intel FSP 2.0 image.
> > +This utility supports some operations for Intel FSP 1.x/2.x image.
> >  It supports:
> > -- Display FSP 2.0 information header
> > -- Split FSP 2.0 image into individual FSP-T/M/S/O component
> > -- Rebase FSP 2.0 components to a different base address
> > -- Generate FSP mapping C header file
> > +- Display FSP 1.x/2.x information header
> > +- Split FSP 2.x image into individual FSP-T/M/S/O component
> > +- Rebase FSP 1.x/2.x components to a different base address
> > +- Generate FSP 1.x/2.x mapping C header file
> >  """
> >
> >  CopyRightHeaderFile = """/*
> > @@ -500,8 +500,6 @@ class FirmwareDevice:
> >
> >  fih = None
> >  for fsp in self.FspList:
> > -if fsp.Fih.HeaderRevision < 3:
> > -raise Exception("ERROR: FSP 1.x is not supported by this 
> > tool !")
> >  if not fih:
> >  fih = fsp.Fih
> >  else:
> > @@ -713,6 +711,8 @@ def SplitFspBin (fspfile, outdir, nametemplate):
> >  fd.ParseFsp ()
> >
> >  for fsp in fd.FspList:
> > +if fsp.Fih.HeaderRevision < 3:
> > +raise Exception("ERROR: FSP 1.x is not supported by the
> > + split command !")
> >  ftype = fsp.Type
> >  if not nametemplate:
> >  nametemplate = fspfile
> > @@ -742,6 +742,11 @@ def RebaseFspBin (FspBinary, FspComponent,
> > FspBase, OutputDir, OutputFile):
> >
> >  found = False
> >  for fsp in fd.FspList:
> > +# Is this FSP 1.x single binary?
> > +if fsp.Fih.HeaderRevision < 3:
> > +found = True
> > +ftype = 'X'
> > +break
> >  ftype = fsp.Type.lower()
> >  if ftype == fspcomp:
> >  found = True
> > --
> > 2.13.3.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41648): https://edk2.groups.io/g/devel/message/41648
Mute This Topic: https://groups.io/mt/31834320/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add Stratix 10 platform support

2019-05-29 Thread Wu, Hao A
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Loh, Tien Hock
> Sent: Thursday, May 09, 2019 4:56 PM
> To: devel@edk2.groups.io; thlo...@gmail.com
> Cc: Loh, Tien Hock; Ard Biesheuvel; Leif Lindholm; Kinney, Michael D
> Subject: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add
> Stratix 10 platform support
> 
> From: "Tien Hock, Loh" 
> 
> Adds support for Intel Stratix 10 Platform.
> 
> Signed-off-by: "Tien Hock, Loh" 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Cc: Ard Biesheuvel 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> 
> --
> v4
> - Removed LibC
> - Added NOOPT to BUILD_TARGETS
> - Removed ARM from SUPPORTED_ARCHITECTURE

Hello Tien Hock,

Could you help to remove the IntelFrameworkModulePkg dependency on the
platform? The package will be removed in the near future.

More specifically, for:

* GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
I do not see the library is being consumed by any module and I think it
can be dropped. Could you help to double-confirm on this?

* 
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
The platform seems do not have a status code router, so could you help to
use MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
for ReportStatusCodeLib instances?

Thanks in advance.

Best Regards,
Hao Wu

> v3
> - Updated Pcd with updated name
> v2
> - Updates ShellBinPkg with ShellPkg
> ---
>  Platform/Intel/Stratix10/Stratix10SoCPkg.dec 
>  |  30 ++
>  Platform/Intel/Stratix10/Stratix10SoCPkg.dsc 
>  | 546
> 
>  Platform/Intel/Stratix10/Stratix10SoCPkg.fdf 
>  | 270
> ++
>  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf
> |  49 ++
>  Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf   
>  |
> 49 ++
>  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c 
>  |
> 43 ++
>  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c 
>  |
> 155 ++
>  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c 
>  |
> 167 ++
> 
> Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelp
> er.S |  51 ++
>  Platform/Intel/Stratix10/Readme.md   
>  |  61 +++
>  Platform/Intel/Stratix10/ShellScript/startup.nsh 
>  |   2 +
>  11 files changed, 1423 insertions(+)
> 
> diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> new file mode 100755
> index ..5677ac7676d5
> --- /dev/null
> +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> @@ -0,0 +1,30 @@
> +#/** @file
> +#  Intel Stratix 10 SoC FPGA Package
> +#
> +# Copyright (c) 2019, Intel All rights reserved.
> +#
> +#This program and the accompanying materials are licensed and made
> available under
> +#the terms and conditions of the BSD License which accompanies this
> distribution.
> +#The full text of the license may be found at
> +#http://opensource.org/licenses/bsd-license.php
> +#
> +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> +  DEC_SPECIFICATION  = 0x00010005
> +  PACKAGE_NAME   = IntelSoCFpgaPkg
> +  PACKAGE_GUID   = 45533DD0-C41F-4ab6-A5DF-65B52684AC60
> +  PACKAGE_VERSION= 0.1
> +
> +[Includes.common]
> +
> +[Guids.common]
> +  gIntelSocFpgaTokenSpaceGuid =  { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba, 0xa,
> 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } }
> +[PcdsFeatureFlag.common]
> +
> +[PcdsFixedAtBuild.common]
> +
> +
> diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> new file mode 100755
> index ..5665ac6c8982
> --- /dev/null
> +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> @@ -0,0 +1,546 @@
> +#/** @file
> +#  Intel Stratix 10 SoC FPGA Package
> +#
> +# Copyright (c) 2019, Intel All rights reserved.
> +#
> +#This program and the accompanying materials are licensed and made
> available under
> +#the terms and conditions of the BSD License which accompanies this
> distribution.
> +#The full text of the license may be found at
> +#http://opensource.org/licenses/bsd-license.php
> +#
> +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +
> +#
> ###
> +#
> +# Defines Section - statements that will be processed to create a Makefile.

[edk2-devel] Maintainers.txt: update UEFI payload information

2019-05-29 Thread Guo Dong
Remove CorebootModulePkg and CorebootPayloadPkg, and add
UefiPayloadPkg to reflect recently change in UEFI payload.
wiki link for UefiPayloadPkg would be available soon.

Signed-off-by: Guo Dong 
---
 Maintainers.txt | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index f3ce5edd8a..010ec31404 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -86,13 +86,6 @@ M: Bob Feng 
 M: Liming Gao 
 R: Yonghong Zhu 
 
-CorebootModulePkg, CorebootPayloadPkg
-W: https://github.com/tianocore/tianocore.github.io/wiki/Coreboot_UEFI_payload
-M: Maurice Ma 
-M: Prince Agyeman 
-M: Benjamin You 
-S: Maintained
-
 CryptoPkg
 W: https://github.com/tianocore/tianocore.github.io/wiki/CryptoPkg
 M: Jian Wang 
@@ -238,6 +231,13 @@ M: Eric Dong 
 M: Ray Ni 
 R: Laszlo Ersek 
 
+UefiPayloadPkg
+W: https://github.com/tianocore/tianocore.github.io/wiki/UefiPayloadPkg
+M: Maurice Ma 
+M: Guo Dong 
+M: Benjamin You 
+S: Maintained
+
 StandaloneMmPkg
 M: Achin Gupta 
 M: Jiewen Yao 
-- 
2.16.2.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41646): https://edk2.groups.io/g/devel/message/41646
Mute This Topic: https://groups.io/mt/31837296/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] UefiPayloadPkg: Remove legacy PIC 8259 driver

2019-05-29 Thread Guo Dong
Since legacy PIC 8259 driver would be removed from edk2,
update UEFI payload to remove 8259 driver.
If required, bootloader could disable 8259.

Signed-off-by: Guo Dong 
---
 UefiPayloadPkg/UefiPayloadPkg.fdf| 1 -
 UefiPayloadPkg/UefiPayloadPkgIa32.dsc| 1 -
 UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc | 1 -
 3 files changed, 3 deletions(-)

diff --git a/UefiPayloadPkg/UefiPayloadPkg.fdf 
b/UefiPayloadPkg/UefiPayloadPkg.fdf
index ce3b34999b..4cd88a3f85 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.fdf
+++ b/UefiPayloadPkg/UefiPayloadPkg.fdf
@@ -104,7 +104,6 @@ INF 
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
-INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc 
b/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
index 5b6ed36e9c..11cf17ca06 100644
--- a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
@@ -432,7 +432,6 @@
   UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
   MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
   MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
-  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
   MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc 
b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
index d57b5241dc..5b7994a62c 100644
--- a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
@@ -433,7 +433,6 @@
   UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
   MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
   MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
-  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
   MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
-- 
2.16.2.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41645): https://edk2.groups.io/g/devel/message/41645
Mute This Topic: https://groups.io/mt/31837164/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property

2019-05-29 Thread Ard Biesheuvel
On Wed, 29 May 2019 at 16:43, Leif Lindholm  wrote:
>
> On Wed, May 29, 2019 at 03:14:48PM +0200, Ard Biesheuvel wrote:
> > On Wed, 29 May 2019 at 15:06, Leif Lindholm  
> > wrote:
> > >
> > > On Wed, May 29, 2019 at 02:50:19PM +0200, Ard Biesheuvel wrote:
> > > > As opposed to the Secure96's I2C peripherals, whose bus addresses are
> > > > properties of the peripherals themselves, the SPI CS address of the
> > > > TPM is a property of the platform that incorporates the LS connector.
> > > >
> > > > So tweak the macros that emit the CS values and related properties
> > > > to put it under the control of the platform that incorporates the
> > > > driver.
> > > >
> > > > Signed-off-by: Ard Biesheuvel 
> > > > ---
> > > >  Platform/96Boards/Secure96Dxe/Secure96.dts |  2 +-
> > > >  Platform/96Boards/Secure96Dxe/Secure96.h   | 11 ---
> > > >  2 files changed, 9 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts 
> > > > b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > > index d066fcb1933c..0d7d9b3900a4 100644
> > > > --- a/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > > @@ -39,7 +39,7 @@
> > > >  __overlay__ {
> > > >  INFINEON_SLB9670_DT_NODENAME {
> > > >  compatible = "infineon,slb9670";
> > > > -reg = ;
> > > > +reg = ;
> > > >  spi-max-frequency = <2250>;
> > > >  };
> > > >  };
> > > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h 
> > > > b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > > index c34fc5eea046..1d8bf4159209 100644
> > > > --- a/Platform/96Boards/Secure96Dxe/Secure96.h
> > > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > > @@ -1,6 +1,6 @@
> > > >  /** @file
> > > >
> > > > -  Copyright (c) 2018, Linaro, Ltd. All rights reserved.
> > > > +  Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.
> > > >
> > > >SPDX-License-Identifier: BSD-2-Clause-Patent
> > > >  **/
> > > > @@ -8,14 +8,19 @@
> > > >  #ifndef _SECURE96_H_
> > > >  #define _SECURE96_H_
> > > >
> > > > +#define __CONCAT(a,b)   a ## b
> > > > +
> > >
> > > Urgh. We badly need to properly add some official macros for this.
> > > You could possibly use __CONCATENATE from Base.h.
> > >
> >
> > OK, I'll use that instead.
>
> With that, for 1-4/5:
> Reviewed-by: Leif Lindholm 
>


Thanks

Pushed as c587c76bec49..f36ee841e0ec

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41644): https://edk2.groups.io/g/devel/message/41644
Mute This Topic: https://groups.io/mt/31833223/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH for-edk2-stable201905 5/6] OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35

2019-05-29 Thread Philippe Mathieu-Daudé
On 5/29/19 5:12 PM, Laszlo Ersek wrote:
> (This is a replacement for commit 75136b29541b, "OvmfPkg/PlatformPei:
> reorder the 32-bit PCI window vs. the PCIEXBAR on q35", 2019-05-16).
> 
> Commit 7b8fe63561b4 ("OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG
> / ECAM) on Q35", 2016-03-10) claimed that,
> 
>   On Q35 machine types that QEMU intends to support in the long term, QEMU
>   never lets the RAM below 4 GB exceed 2 GB.
> 
> Alas, this statement came from a misunderstanding that occurred while we
> worked out the interface contract. In fact QEMU does allow the 32-bit RAM
> extend up to 0xB000_ (exclusive), in case the RAM size falls in the
> range (0x8000_, 0xB000_) (i.e., the RAM size is greater than
> 2048MB and smaller than 2816MB).
> 
> In turn, such a RAM size (justifiedly) triggers
> 
>   ASSERT (TopOfLowRam <= PciExBarBase);
> 
> in MemMapInitialization(), because we placed the 256MB PCIEXBAR at
> 0x8000_ (2GB) exactly, relying on the interface contract. (And, the
> 32-bit PCI window would follow the PCIEXBAR, covering the [0x9000_,
> 0xFC00_) range.)
> 
> In order to fix this, place the PCIEXBAR at 2816MB (0xB000_), and
> start the 32-bit PCI window at 3 GB (0xC000_). This shrinks the 32-bit
> PCI window to
> 
>   0xFC00_ - 0xC000_ = 0x3C00_ = 960 MB.

This fix is simpler.

Reviewed-by: Philippe Mathieu-Daude 

> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jordan Justen 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
> Signed-off-by: Laszlo Ersek 
> ---
>  OvmfPkg/OvmfPkgIa32.dsc| 4 ++--
>  OvmfPkg/OvmfPkgIa32X64.dsc | 4 ++--
>  OvmfPkg/OvmfPkgX64.dsc | 4 ++--
>  3 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index 578fc6c98ec8..e74a9d5a5149 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -492,8 +492,8 @@ [PcdsFixedAtBuild]
># the PCIEXBAR register.
>#
># On Q35 machine types that QEMU intends to support in the long term, QEMU
> -  # never lets the RAM below 4 GB exceed 2 GB.
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
> +  # never lets the RAM below 4 GB exceed 2816 MB.
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB000
>  
>  !ifdef $(SOURCE_DEBUG_ENABLE)
>gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index eade8f62d3de..67ac015991fd 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -497,8 +497,8 @@ [PcdsFixedAtBuild]
># the PCIEXBAR register.
>#
># On Q35 machine types that QEMU intends to support in the long term, QEMU
> -  # never lets the RAM below 4 GB exceed 2 GB.
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
> +  # never lets the RAM below 4 GB exceed 2816 MB.
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB000
>  
>  !ifdef $(SOURCE_DEBUG_ENABLE)
>gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 733a4c9d8a43..68073ef55b4d 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -497,8 +497,8 @@ [PcdsFixedAtBuild]
># the PCIEXBAR register.
>#
># On Q35 machine types that QEMU intends to support in the long term, QEMU
> -  # never lets the RAM below 4 GB exceed 2 GB.
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
> +  # never lets the RAM below 4 GB exceed 2816 MB.
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB000
>  
>  !ifdef $(SOURCE_DEBUG_ENABLE)
>gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41643): https://edk2.groups.io/g/devel/message/41643
Mute This Topic: https://groups.io/mt/31834720/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [Patch V4 1/2] BaseTools: Add a checking for Sources section in INF file

2019-05-29 Thread Christian Rodriguez
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1804

Add a check to see if [Sources] section lists all the header type
files of a module. Performance impact should be minimal with this patch
since information is already being fetched for Makefile purposes. All
other information is already cached in memory. No extra IO time is needed.

Signed-off-by: Christian Rodriguez 
Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yonghong Zhu 
---
 BaseTools/Source/Python/AutoGen/GenMake.py | 38 
 1 file changed, 38 insertions(+)

diff --git a/BaseTools/Source/Python/AutoGen/GenMake.py 
b/BaseTools/Source/Python/AutoGen/GenMake.py
index 0e0f9fd9b0..5c992d7c26 100644
--- a/BaseTools/Source/Python/AutoGen/GenMake.py
+++ b/BaseTools/Source/Python/AutoGen/GenMake.py
@@ -905,6 +905,44 @@ cleanlib:
 ForceIncludedFile,
 self._AutoGenObject.IncludePathList + 
self._AutoGenObject.BuildOptionIncPathList
 )
+
+# Check if header files are listed in metafile
+# Get a list of unique module header source files from MetaFile
+headerFilesInMetaFileSet = set()
+for aFile in self._AutoGenObject.SourceFileList:
+aFileName = str(aFile)
+if not aFileName.endswith('.h'):
+continue
+headerFilesInMetaFileSet.add(aFileName.lower())
+
+# Get a list of unique module autogen files
+localAutoGenFileSet = set()
+for aFile in self._AutoGenObject.AutoGenFileList:
+localAutoGenFileSet.add(str(aFile).lower())
+
+# Get a list of unique module dependency header files
+# Exclude autogen files and files not in the source directory
+headerFileDependencySet = set()
+localSourceDir = str(self._AutoGenObject.SourceDir).lower()
+for Dependency in FileDependencyDict.values():
+for aFile in Dependency:
+aFileName = str(aFile).lower()
+if not aFileName.endswith('.h'):
+continue
+if aFileName in localAutoGenFileSet:
+continue
+if localSourceDir not in aFileName:
+continue
+headerFileDependencySet.add(aFileName)
+
+# Check if a module dependency header file is missing from the 
module's MetaFile
+for aFile in headerFileDependencySet:
+if aFile in headerFilesInMetaFileSet:
+continue
+EdkLogger.warn("build","Module MetaFile [Sources] is missing local 
header!",
+ExtraData = "Local Header: " + aFile + " not found in 
" + self._AutoGenObject.MetaFile.Path
+)
+
 DepSet = None
 for File,Dependency in FileDependencyDict.items():
 if not Dependency:
-- 
2.21.0.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41641): https://edk2.groups.io/g/devel/message/41641
Mute This Topic: https://groups.io/mt/3183/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [Patch V4 0/2] BaseTools: Add a checking for Sources section and update hashing feature

2019-05-29 Thread Christian Rodriguez
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1804

In V4: Update commit messages.
In V3: Seperate checker and hashing into individual patches
In V2: Enable check for all builds, move conditional to hash invalidation
In the Edk2 INF spec 3.9, it states, All HII Unicode format files
must be listed in [Sources] section. Add a check to see if [Sources]
section lists all the "source" type files of a module. Performance
impact should be minimal with this patch since information is already
being fetched for Makefile purposes. All other information is already
cached in memory. No extra IO time is needed.

Christian Rodriguez (2):
  BaseTools: Add a checking for Sources section in INF file
  BaseTools: Refactor hash tracking after checking for Sources section

 BaseTools/Source/Python/AutoGen/AutoGen.py   |  6 +-
 BaseTools/Source/Python/AutoGen/GenMake.py   | 44 +
 BaseTools/Source/Python/Common/GlobalData.py |  3 +-
 BaseTools/Source/Python/build/build.py   | 65 
 4 files changed, 91 insertions(+), 27 deletions(-)

-- 
2.21.0.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41640): https://edk2.groups.io/g/devel/message/41640
Mute This Topic: https://groups.io/mt/31835554/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [Patch V4 2/2] BaseTools: Refactor hash tracking after checking for Sources section

2019-05-29 Thread Christian Rodriguez
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1804

After adding a check to see if [Sources] section lists all the header
type files of a module, track module and library hashes for --hash
feature. If above check is not in compilance for a library or module,
force hash invalidation on that library or module.

Signed-off-by: Christian Rodriguez 
Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yonghong Zhu 
---
 BaseTools/Source/Python/AutoGen/AutoGen.py   |  6 +-
 BaseTools/Source/Python/AutoGen/GenMake.py   |  6 ++
 BaseTools/Source/Python/Common/GlobalData.py |  3 +-
 BaseTools/Source/Python/build/build.py   | 65 
 4 files changed, 53 insertions(+), 27 deletions(-)

diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index a5bef4f7c6..a376bc24d6 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -3989,7 +3989,8 @@ class ModuleAutoGen(AutoGen):
 for LibraryAutoGen in self.LibraryAutoGenList:
 LibraryAutoGen.CreateMakeFile()
 
-if self.CanSkip():
+# Don't enable if hash feature enabled, CanSkip uses timestamps to 
determine build skipping
+if not GlobalData.gUseHashCache and self.CanSkip():
 return
 
 if len(self.CustomMakefile) == 0:
@@ -4032,7 +4033,8 @@ class ModuleAutoGen(AutoGen):
 for LibraryAutoGen in self.LibraryAutoGenList:
 LibraryAutoGen.CreateCodeFile()
 
-if self.CanSkip():
+# Don't enable if hash feature enabled, CanSkip uses timestamps to 
determine build skipping
+if not GlobalData.gUseHashCache and self.CanSkip():
 return
 
 AutoGenList = []
diff --git a/BaseTools/Source/Python/AutoGen/GenMake.py 
b/BaseTools/Source/Python/AutoGen/GenMake.py
index 5c992d7c26..212ca0fa7f 100644
--- a/BaseTools/Source/Python/AutoGen/GenMake.py
+++ b/BaseTools/Source/Python/AutoGen/GenMake.py
@@ -935,10 +935,16 @@ cleanlib:
 continue
 headerFileDependencySet.add(aFileName)
 
+# Ensure that gModuleBuildTracking has been initialized per 
architecture
+if self._AutoGenObject.Arch not in GlobalData.gModuleBuildTracking:
+GlobalData.gModuleBuildTracking[self._AutoGenObject.Arch] = dict()
+
 # Check if a module dependency header file is missing from the 
module's MetaFile
 for aFile in headerFileDependencySet:
 if aFile in headerFilesInMetaFileSet:
 continue
+if GlobalData.gUseHashCache:
+
GlobalData.gModuleBuildTracking[self._AutoGenObject.Arch][self._AutoGenObject] 
= 'FAIL_METAFILE'
 EdkLogger.warn("build","Module MetaFile [Sources] is missing local 
header!",
 ExtraData = "Local Header: " + aFile + " not found in 
" + self._AutoGenObject.MetaFile.Path
 )
diff --git a/BaseTools/Source/Python/Common/GlobalData.py 
b/BaseTools/Source/Python/Common/GlobalData.py
index 95e28a988f..bd45a43728 100644
--- a/BaseTools/Source/Python/Common/GlobalData.py
+++ b/BaseTools/Source/Python/Common/GlobalData.py
@@ -110,7 +110,8 @@ gEnableGenfdsMultiThread = False
 gSikpAutoGenCache = set()
 
 # Dictionary for tracking Module build status as success or failure
-# False -> Fail : True -> Success
+# Top Dict: Key: Arch Type  Value: Dictionary
+# Second Dict:  Key: AutoGen ObjValue: 'SUCCESS'\'FAIL'\'FAIL_METAFILE'
 gModuleBuildTracking = dict()
 
 # Dictionary of booleans that dictate whether a module or
diff --git a/BaseTools/Source/Python/build/build.py 
b/BaseTools/Source/Python/build/build.py
index 80ceb98310..0855d4561c 100644
--- a/BaseTools/Source/Python/build/build.py
+++ b/BaseTools/Source/Python/build/build.py
@@ -625,8 +625,16 @@ class BuildTask:
 BuildTask._ErrorFlag.set()
 BuildTask._ErrorMessage = "%s broken\n%s [%s]" % \
   (threading.currentThread().getName(), 
Command, WorkingDir)
-if self.BuildItem.BuildObject in GlobalData.gModuleBuildTracking and 
not BuildTask._ErrorFlag.isSet():
-GlobalData.gModuleBuildTracking[self.BuildItem.BuildObject] = True
+
+# Set the value used by hash invalidation flow in 
GlobalData.gModuleBuildTracking to 'SUCCESS'
+# If Module or Lib is being tracked, it did not fail header check 
test, and built successfully
+if (self.BuildItem.BuildObject.Arch in GlobalData.gModuleBuildTracking 
and
+   self.BuildItem.BuildObject in 
GlobalData.gModuleBuildTracking[self.BuildItem.BuildObject.Arch] and
+   
GlobalData.gModuleBuildTracking[self.BuildItem.BuildObject.Arch][self.BuildItem.BuildObject]
 != 'FAIL_METAFILE' and
+   not BuildTask._ErrorFlag.isSet()
+   ):
+
GlobalData.gModuleBuildTracking[self.BuildItem.BuildObject.Arch][self.BuildItem.BuildObject]
 = 'SUCCESS'
+
   

Re: [edk2-devel] contribution of code licensed other than bsd+patent

2019-05-29 Thread Leif Lindholm
Hi Liming,

Yes, the license is not a problem.

My concern is that third party code, regardless of license,
contributed while the TianoCore Contribution agreement was used was
covered by the clause:
* Contributor grants a license (with the right to sublicense) under
  claims of Contributor's patents that Contributor can license that
  are infringed by the Contribution (as delivered by Contributor) to
  make, use, distribute, sell, offer for sale, and import the
  Contribution and derivative works thereof solely to the minimum
  extent necessary for licensee to exercise the granted copyright
  license; this patent license applies solely to those portions of
  the Contribution that are unmodified. No hardware per se is
  licensed.

whereas code that is contributed now under a bsd+patent license is
covered by:
---
Subject to the terms and conditions of this license, each copyright holder
and contributor hereby grants to those receiving rights under this license
a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable
(except for failure to satisfy the conditions of this license) patent
license to make, have made, use, offer to sell, sell, import, and otherwise
transfer this software, where such license applies only to those patent
claims, already acquired or hereafter acquired, licensable by such copyright
holder or contributor that are necessarily infringed by:

(a) their Contribution(s) (the licensed copyrights of copyright holders and
non-copyrightable additions of contributors, in source or binary form)
alone; or

(b) combination of their Contribution(s) with the work of authorship to
which such Contribution(s) was added by such copyright holder or
contributor, if, at the time the Contribution is added, such addition
causes such combination to be necessarily infringed. The patent license
shall not apply to any other combinations which include the
Contribution.

Except as expressly stated above, no rights or licenses from any copyright
holder or contributor is granted under this license, whether expressly, by
implication, estoppel or otherwise.
---

Non-bsd+patent contributions being brought into the tree after we
dropped the contribution agreement is not covered by any such explicit
patent grants.

And I think we need to have an official view on that - whether that
view is
- that's not a problem
- that can be problematic, but we can decide on a case by case basis,
  and may request {extra steps} as part of the contribution
- that is not acceptable

And I think that view should be encoded in Readme.md, next to the list
of licenses we are willing to consider for inclusion.

Best Regards,

Leif

On Wed, May 29, 2019 at 03:24:25PM +, Gao, Liming wrote:
> Leif:
>   I review Readme.md. I think we can add the additional license for
>   SoftFloat-3e like other third party code. The change is as
>   below. Is it OK?
> 
> --- a/Readme.md
> +++ b/Readme.md
> @@ -16,6 +16,7 @@ contains the following components that are covered by 
> additional licenses:
>  * 
> [MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma](MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/README)
>  * [OvmfPkg](OvmfPkg/License.txt)
>  * 
> [CryptoPkg/Library/OpensslLib/openssl](CryptoPkg/Library/OpensslLib/openssl/LICENSE)
> +* 
> [ArmPkg/Library/ArmSoftFloatLib/SoftFloat-3e](ArmPkg/Library/ArmSoftFloatLib/SoftFloat-3e/COPYING.txt)
> 
> Thanks
> Liming
> > -Original Message-
> > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Leif 
> > Lindholm
> > Sent: Tuesday, May 28, 2019 11:32 PM
> > To: devel@edk2.groups.io
> > Cc: Andrew Fish ; Laszlo Ersek ; 
> > Kinney, Michael D ; Ard
> > Biesheuvel 
> > Subject: [edk2-devel] contribution of code licensed other than bsd+patent
> > 
> > Hi stewards, and other interested people.
> > 
> > Readme.md lists a few licenses acceptable but not preferred (this text
> > used to live in Contributions.txt before the bsd+patent relicensing
> > effort). However, it does not explicitly state anything about the gap
> > that was left by the dropping of the TianoCore contribution agreement:
> > the explicit patent grant given by bsd+patent and TianoCore
> > contribution agreement.
> > 
> > As we have what I think is the first bit of code about to go in with a
> > non-bsd+patent license (the new ArmSoftFloat library), is this
> > something we need to worry about?
> > 
> > If nothing else, I think we should form an official opinion and add it
> > to Readme.md.
> > 
> > Best Regards,
> > 
> > Leif
> > 
> > 
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41639): https://edk2.groups.io/g/devel/message/41639
Mute This Topic: https://groups.io/mt/31823110/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH v5 0/9] Crypto: Upgrade OpenSSL to 1.1.1b

2019-05-29 Thread Wang, Jian J
For this patch series,
Reviewed-by: Jian J Wang 

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Xiaoyu Lu
> Sent: Wednesday, May 29, 2019 6:40 PM
> To: devel@edk2.groups.io
> Cc: Lu, XiaoyuX ; Wang, Jian J ;
> Ye, Ting ; Laszlo Ersek 
> Subject: [edk2-devel] [PATCH v5 0/9] Crypto: Upgrade OpenSSL to 1.1.1b
> 
> This series is also avaiable at:
> https://github.com/xiaoyuxlu/edk2/commits/bz_1089_upgrade_to_openssl_1_
> 1_1b_v5
> 
> Change since v4:
> 
> 1. Split "[PATCH v4 6/7] CryptoPkg: Upgrade OpenSSL to 1.1.1b" patch into two.
>a. CryptoPkg/OpensslLib: Add functions for upgrading OpenSSL1_1_1b
>b. CryptoPkg: Upgrade OpenSSL to 1.1.1b
> 
> 2. Add "CryptoPkg: Fix possible build problem with Clang" patch.
>Blow is a link to the problem.
>Ref: https://edk2.groups.io/g/devel/message/41424
>OpenSSL_1_1_1b may build failed with Clang38. So
>add additional build flag to work around it.
> 
> Cc: Jian J Wang 
> Cc: Ting Ye 
> Cc: Laszlo Ersek 
> 
> Laszlo Ersek (1):
>   CryptoPkg/OpensslLib: Fix cross-build problem for AARCH64
> 
> Xiaoyu Lu (8):
>   CryptoPkg/OpensslLib: Modify process_files.pl for upgrading OpenSSL
>   CryptoPkg/OpensslLib: Exclude unnecessary files in process_files.pl
>   CryptoPkg/IntrinsicLib: Fix possible unresolved external symbol issue
>   CryptoPkg/OpensslLib: Prepare for upgrading OpenSSL
>   CryptoPkg: Fix possible build problem with Clang
>   CryptoPkg/OpensslLib: Add functions for upgrading OpenSSL1_1_1b
>   CryptoPkg: Upgrade OpenSSL to 1.1.1b
>   CryptoPkg/BaseCryptLib: Make HMAC_CTX size backward compatible
> 
>  CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf|   2 +
>  CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf |   2 +
>  CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf |   2 +
>  CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf |   2 +
>  CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf|   4 +-
>  CryptoPkg/Library/OpensslLib/OpensslLib.inf|  77 -
>  CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf  |  68 -
>  CryptoPkg/Library/Include/CrtLibSupport.h  |  13 +-
>  CryptoPkg/Library/Include/openssl/opensslconf.h|  54 +++-
>  CryptoPkg/Library/Include/sys/syscall.h|  11 +
>  CryptoPkg/Library/OpensslLib/buildinf.h|   2 +
>  CryptoPkg/Library/OpensslLib/rand_pool_noise.h |  29 ++
>  CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacMd5.c |   8 +-
>  .../Library/BaseCryptLib/Hmac/CryptHmacSha1.c  |   9 +-
>  .../Library/BaseCryptLib/Hmac/CryptHmacSha256.c|   8 +-
>  CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c |  22 ++
>  CryptoPkg/Library/OpensslLib/ossl_store.c  |  17 ++
>  CryptoPkg/Library/OpensslLib/rand_pool.c   | 316
> +
>  CryptoPkg/Library/OpensslLib/rand_pool_noise.c |  29 ++
>  CryptoPkg/Library/OpensslLib/rand_pool_noise_tsc.c |  43 +++
>  CryptoPkg/Library/OpensslLib/openssl   |   2 +-
>  CryptoPkg/Library/OpensslLib/process_files.pl  |  11 +-
>  22 files changed, 679 insertions(+), 52 deletions(-)
>  create mode 100644 CryptoPkg/Library/Include/sys/syscall.h
>  create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise.h
>  create mode 100644 CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c
>  create mode 100644 CryptoPkg/Library/OpensslLib/ossl_store.c
>  create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool.c
>  create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise.c
>  create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise_tsc.c
> 
> --
> 2.7.4
> 
> 
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41638): https://edk2.groups.io/g/devel/message/41638
Mute This Topic: https://groups.io/mt/31832279/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH for-edk2-stable201905 4/6] Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches explicitly"

2019-05-29 Thread Philippe Mathieu-Daudé
On 5/29/19 5:12 PM, Laszlo Ersek wrote:
> This reverts commit 60e95bf5094fbb9b728729ccfaf32184b3662317.
> 
> The original fix for 
> triggered a bug / incorrect assumption in QEMU.
> 
> QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
> it. When the firmware doesn't satisfy this assumption, QEMU generates an
> \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
> firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
> 32-bit MMIO BARs.
> 
> Working around the problem in the firmware looks less problematic than
> fixing QEMU. Revert the original changes first, before implementing an
> alternative fix.
> 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jordan Justen 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
> Signed-off-by: Laszlo Ersek 

Reviewed-by: Philippe Mathieu-Daude 

> ---
>  OvmfPkg/PlatformPei/Platform.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
> index 5e0a15484230..0876316eefbc 100644
> --- a/OvmfPkg/PlatformPei/Platform.c
> +++ b/OvmfPkg/PlatformPei/Platform.c
> @@ -190,10 +190,8 @@ MemMapInitialization (
>ASSERT (TopOfLowRam <= PciExBarBase);
>ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
>PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
> -  PciSize = 0xFC00 - PciBase;
>  } else {
>PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
> -  PciSize = 0xFC00 - PciBase;
>  }
>  
>  //
> @@ -209,6 +207,7 @@ MemMapInitialization (
>  // 0xFED2gap  896 KB
>  // 0xFEE0LAPIC  1 MB
>  //
> +PciSize = 0xFC00 - PciBase;
>  AddIoMemoryBaseSizeHob (PciBase, PciSize);
>  PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase);
>  ASSERT_RETURN_ERROR (PcdStatus);
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41637): https://edk2.groups.io/g/devel/message/41637
Mute This Topic: https://groups.io/mt/31834717/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH for-edk2-stable201905 2/6] Revert "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the PCIEXBAR on q35"

2019-05-29 Thread Philippe Mathieu-Daudé
On 5/29/19 5:12 PM, Laszlo Ersek wrote:
> This reverts commit 75136b29541b0e093a51d2e2c2af8d19855c2b60.
> 
> The original fix for 
> triggered a bug / incorrect assumption in QEMU.
> 
> QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
> it. When the firmware doesn't satisfy this assumption, QEMU generates an
> \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
> firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
> 32-bit MMIO BARs.
> 
> Working around the problem in the firmware looks less problematic than
> fixing QEMU. Revert the original changes first, before implementing an
> alternative fix.
> 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jordan Justen 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
> Signed-off-by: Laszlo Ersek 

Reviewed-by: Philippe Mathieu-Daude 

> ---
>  OvmfPkg/OvmfPkgIa32.dsc| 5 -
>  OvmfPkg/OvmfPkgIa32X64.dsc | 5 -
>  OvmfPkg/OvmfPkgX64.dsc | 5 -
>  OvmfPkg/PlatformPei/Platform.c | 9 +
>  4 files changed, 17 insertions(+), 7 deletions(-)
> 
> diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
> index b3446ece311a..578fc6c98ec8 100644
> --- a/OvmfPkg/OvmfPkgIa32.dsc
> +++ b/OvmfPkg/OvmfPkgIa32.dsc
> @@ -490,7 +490,10 @@ [PcdsFixedAtBuild]
># This PCD is used to set the base address of the PCI express hierarchy. It
># is only consulted when OVMF runs on Q35. In that case it is programmed 
> into
># the PCIEXBAR register.
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
> +  #
> +  # On Q35 machine types that QEMU intends to support in the long term, QEMU
> +  # never lets the RAM below 4 GB exceed 2 GB.
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
>  
>  !ifdef $(SOURCE_DEBUG_ENABLE)
>gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
> diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
> index 679d4eb8dd36..eade8f62d3de 100644
> --- a/OvmfPkg/OvmfPkgIa32X64.dsc
> +++ b/OvmfPkg/OvmfPkgIa32X64.dsc
> @@ -495,7 +495,10 @@ [PcdsFixedAtBuild]
># This PCD is used to set the base address of the PCI express hierarchy. It
># is only consulted when OVMF runs on Q35. In that case it is programmed 
> into
># the PCIEXBAR register.
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
> +  #
> +  # On Q35 machine types that QEMU intends to support in the long term, QEMU
> +  # never lets the RAM below 4 GB exceed 2 GB.
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
>  
>  !ifdef $(SOURCE_DEBUG_ENABLE)
>gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
> diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
> index 56a9560262aa..733a4c9d8a43 100644
> --- a/OvmfPkg/OvmfPkgX64.dsc
> +++ b/OvmfPkg/OvmfPkgX64.dsc
> @@ -495,7 +495,10 @@ [PcdsFixedAtBuild]
># This PCD is used to set the base address of the PCI express hierarchy. It
># is only consulted when OVMF runs on Q35. In that case it is programmed 
> into
># the PCIEXBAR register.
> -  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
> +  #
> +  # On Q35 machine types that QEMU intends to support in the long term, QEMU
> +  # never lets the RAM below 4 GB exceed 2 GB.
> +  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
>  
>  !ifdef $(SOURCE_DEBUG_ENABLE)
>gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
> diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
> index fd8eccaf3e50..9c013613a1a0 100644
> --- a/OvmfPkg/PlatformPei/Platform.c
> +++ b/OvmfPkg/PlatformPei/Platform.c
> @@ -184,13 +184,14 @@ MemMapInitialization (
>  PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
>  if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
>//
> -  // The 32-bit PCI host aperture is expected to fall between the top of
> -  // low RAM and the base of the MMCONFIG area.
> +  // The MMCONFIG area is expected to fall between the top of low RAM and
> +  // the base of the 32-bit PCI host aperture.
>//
>PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress);
> -  ASSERT (PciBase < PciExBarBase);
> +  ASSERT (TopOfLowRam <= PciExBarBase);
>ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
> -  PciSize = (UINT32)(PciExBarBase - PciBase);
> +  PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
> +  PciSize = 0xFC00 - PciBase;
>  } else {
>PciSize = 0xFC00 - PciBase;
>  }
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41635): https://edk2.groups.io/g/devel/message/41635
Mute This Topic: https://groups.io/mt/31834716/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH for-edk2-stable201905 3/6] Revert "OvmfPkg/PlatformPei: hoist PciBase assignment above the i440fx/q35 branching"

2019-05-29 Thread Philippe Mathieu-Daudé
On 5/29/19 5:12 PM, Laszlo Ersek wrote:
> This reverts commit 9a2e8d7c65ef7f39c6754d27e52954b616bc6628.
> 
> The original fix for 
> triggered a bug / incorrect assumption in QEMU.
> 
> QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
> it. When the firmware doesn't satisfy this assumption, QEMU generates an
> \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
> firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
> 32-bit MMIO BARs.
> 
> Working around the problem in the firmware looks less problematic than
> fixing QEMU. Revert the original changes first, before implementing an
> alternative fix.
> 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jordan Justen 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
> Signed-off-by: Laszlo Ersek 

Reviewed-by: Philippe Mathieu-Daude 

> ---
>  OvmfPkg/PlatformPei/Platform.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
> index 9c013613a1a0..5e0a15484230 100644
> --- a/OvmfPkg/PlatformPei/Platform.c
> +++ b/OvmfPkg/PlatformPei/Platform.c
> @@ -181,7 +181,6 @@ MemMapInitialization (
>  
>  TopOfLowRam = GetSystemMemorySizeBelow4gb ();
>  PciExBarBase = 0;
> -PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
>  if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
>//
>// The MMCONFIG area is expected to fall between the top of low RAM and
> @@ -193,6 +192,7 @@ MemMapInitialization (
>PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
>PciSize = 0xFC00 - PciBase;
>  } else {
> +  PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
>PciSize = 0xFC00 - PciBase;
>  }
>  
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41636): https://edk2.groups.io/g/devel/message/41636
Mute This Topic: https://groups.io/mt/31834715/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH for-edk2-stable201905 1/6] Revert "OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many bits clear"

2019-05-29 Thread Philippe Mathieu-Daudé
On 5/29/19 5:12 PM, Laszlo Ersek wrote:
> This reverts commit 39b9a5ffe6618b7870be2a54fe7725000249c33a.
> 
> The original fix for 
> triggered a bug / incorrect assumption in QEMU.
> 
> QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
> it. When the firmware doesn't satisfy this assumption, QEMU generates an
> \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
> firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
> 32-bit MMIO BARs.
> 
> Working around the problem in the firmware looks less problematic than
> fixing QEMU. Revert the original changes first, before implementing an
> alternative fix.
> 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jordan Justen 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
> Signed-off-by: Laszlo Ersek 

Reviewed-by: Philippe Mathieu-Daude 

> ---
>  OvmfPkg/PlatformPei/Platform.h  |  2 --
>  OvmfPkg/PlatformPei/MemDetect.c | 23 +++-
>  OvmfPkg/PlatformPei/Platform.c  |  4 +++-
>  3 files changed, 6 insertions(+), 23 deletions(-)
> 
> diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
> index 4476ddd871cd..81af8b71480f 100644
> --- a/OvmfPkg/PlatformPei/Platform.h
> +++ b/OvmfPkg/PlatformPei/Platform.h
> @@ -114,6 +114,4 @@ extern UINT32 mMaxCpuCount;
>  
>  extern UINT16 mHostBridgeDevId;
>  
> -extern UINT32 mQemuUc32Base;
> -
>  #endif // _PLATFORM_PEI_H_INCLUDED_
> diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
> index ae73c63d27d5..e890e36408a6 100644
> --- a/OvmfPkg/PlatformPei/MemDetect.c
> +++ b/OvmfPkg/PlatformPei/MemDetect.c
> @@ -42,8 +42,6 @@ STATIC UINT32 mS3AcpiReservedMemorySize;
>  
>  STATIC UINT16 mQ35TsegMbytes;
>  
> -UINT32 mQemuUc32Base;
> -
>  VOID
>  Q35TsegMbytesInitialization (
>VOID
> @@ -665,8 +663,6 @@ QemuInitializeRam (
>// cover it exactly.
>//
>if (IsMtrrSupported ()) {
> -UINT32 Uc32Size;
> -
>  MtrrGetAllMtrrs ();
>  
>  //
> @@ -693,24 +689,11 @@ QemuInitializeRam (
>  
>  //
>  // Set memory range from the "top of lower RAM" (RAM below 4GB) to 4GB as
> -// uncacheable. Make sure one variable MTRR suffices by truncating the 
> size
> -// to a whole power of two. This will round the base *up*, and a gap (not
> -// used for either RAM or MMIO) may stay in the middle, marked as
> -// cacheable-by-default.
> +// uncacheable
>  //
> -Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));
> -mQemuUc32Base = (UINT32)(SIZE_4GB - Uc32Size);
> -if (mQemuUc32Base != LowerMemorySize) {
> -  DEBUG ((DEBUG_VERBOSE, "%a: rounded UC32 base from 0x%x up to 0x%x, 
> for "
> -"an UC32 size of 0x%x\n", __FUNCTION__, (UINT32)LowerMemorySize,
> -mQemuUc32Base, Uc32Size));
> -}
> -
> -Status = MtrrSetMemoryAttribute (mQemuUc32Base, Uc32Size,
> -   CacheUncacheable);
> +Status = MtrrSetMemoryAttribute (LowerMemorySize,
> +   SIZE_4GB - LowerMemorySize, CacheUncacheable);
>  ASSERT_EFI_ERROR (Status);
> -  } else {
> -mQemuUc32Base = (UINT32)LowerMemorySize;
>}
>  }
>  
> diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
> index c064b4ed9b8f..fd8eccaf3e50 100644
> --- a/OvmfPkg/PlatformPei/Platform.c
> +++ b/OvmfPkg/PlatformPei/Platform.c
> @@ -174,12 +174,14 @@ MemMapInitialization (
>AddIoMemoryRangeHob (0x0A, BASE_1MB);
>  
>if (!mXen) {
> +UINT32  TopOfLowRam;
>  UINT64  PciExBarBase;
>  UINT32  PciBase;
>  UINT32  PciSize;
>  
> +TopOfLowRam = GetSystemMemorySizeBelow4gb ();
>  PciExBarBase = 0;
> -PciBase = (mQemuUc32Base < BASE_2GB) ? BASE_2GB : mQemuUc32Base;
> +PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
>  if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
>//
>// The 32-bit PCI host aperture is expected to fall between the top of
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41634): https://edk2.groups.io/g/devel/message/41634
Mute This Topic: https://groups.io/mt/31834711/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] contribution of code licensed other than bsd+patent

2019-05-29 Thread Liming Gao
Leif:
  I review Readme.md. I think we can add the additional license for 
SoftFloat-3e like other third party code. The change is as below. Is it OK?

--- a/Readme.md
+++ b/Readme.md
@@ -16,6 +16,7 @@ contains the following components that are covered by 
additional licenses:
 * 
[MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma](MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/README)
 * [OvmfPkg](OvmfPkg/License.txt)
 * 
[CryptoPkg/Library/OpensslLib/openssl](CryptoPkg/Library/OpensslLib/openssl/LICENSE)
+* 
[ArmPkg/Library/ArmSoftFloatLib/SoftFloat-3e](ArmPkg/Library/ArmSoftFloatLib/SoftFloat-3e/COPYING.txt)

Thanks
Liming
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Leif 
> Lindholm
> Sent: Tuesday, May 28, 2019 11:32 PM
> To: devel@edk2.groups.io
> Cc: Andrew Fish ; Laszlo Ersek ; Kinney, 
> Michael D ; Ard
> Biesheuvel 
> Subject: [edk2-devel] contribution of code licensed other than bsd+patent
> 
> Hi stewards, and other interested people.
> 
> Readme.md lists a few licenses acceptable but not preferred (this text
> used to live in Contributions.txt before the bsd+patent relicensing
> effort). However, it does not explicitly state anything about the gap
> that was left by the dropping of the TianoCore contribution agreement:
> the explicit patent grant given by bsd+patent and TianoCore
> contribution agreement.
> 
> As we have what I think is the first bit of code about to go in with a
> non-bsd+patent license (the new ArmSoftFloat library), is this
> something we need to worry about?
> 
> If nothing else, I think we should form an official opinion and add it
> to Readme.md.
> 
> Best Regards,
> 
> Leif
> 
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41633): https://edk2.groups.io/g/devel/message/41633
Mute This Topic: https://groups.io/mt/31823110/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH for-edk2-stable201905 0/6] work around a QEMU issue triggered by the original TianoCore#1814 fix

2019-05-29 Thread Ard Biesheuvel
On Wed, 29 May 2019 at 17:12, Laszlo Ersek  wrote:
>
> Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
> Repo: https://github.com/lersek/edk2.git
> Branch:   exbar_mtrr_bz_1859
>
> The fix (commit range 3b7a897cd8e3..39b9a5ffe661) for
>  is technically
> correct, but it tickles an (arguably unjustified) assumption in QEMU the
> wrong way. For end users, this makes the original fix for TianoCore#1814
> a regression, under certain circumstances.
>
> In theory, the assumption should be eliminated in QEMU, but in practice,
> that could be quite intrusive and/or take long. It seems possible to
> work around the problem in OVMF, satisfying the assumption again; for
> that, OVMF needs a different fix (and a different trade-off) for the
> original problem described in TianoCore#1814.
>
> Please see the detailed problem statement and the workaround's idea in
> TianoCore#1859.
>
> If possible, I'd like to get this into edk2-stable201905 (which we're
> postponing by two weeks anyway, for the sake of the OpenSSL 1.1.1b
> upgrade).
>
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jordan Justen 
>

For the series,

Acked-by: Ard Biesheuvel 

I think the reverts obviously belong in the stable tag, and I don't
see why we shouldn't include the other two patches as well.



> Laszlo Ersek (6):
>   Revert "OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many
> bits clear"
>   Revert "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the
> PCIEXBAR on q35"
>   Revert "OvmfPkg/PlatformPei: hoist PciBase assignment above the
> i440fx/q35 branching"
>   Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35
> branches explicitly"
>   OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35
>   OvmfPkg/PlatformPei: set 32-bit UC area at PciBase / PciExBarBase
> (pc/q35)
>
>  OvmfPkg/OvmfPkgIa32.dsc |  5 +-
>  OvmfPkg/OvmfPkgIa32X64.dsc  |  5 +-
>  OvmfPkg/OvmfPkgX64.dsc  |  5 +-
>  OvmfPkg/PlatformPei/Platform.h  |  5 ++
>  OvmfPkg/PlatformPei/MemDetect.c | 70 +++-
>  OvmfPkg/PlatformPei/Platform.c  | 17 +++--
>  6 files changed, 80 insertions(+), 27 deletions(-)
>
> --
> 2.19.1.3.g30247aa5d201
>

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41632): https://edk2.groups.io/g/devel/message/41632
Mute This Topic: https://groups.io/mt/31834710/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSplitBin.py: Support rebasing 1.x binary.

2019-05-29 Thread Zeng, Star
Shouldn't the SplitFspBinUserManual.md also be updated?


Thanks,
Star

> -Original Message-
> From: Chiu, Chasel
> Sent: Wednesday, May 29, 2019 10:33 PM
> To: devel@edk2.groups.io
> Cc: Ma, Maurice ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [PATCH] IntelFsp2Pkg/FspSplitBin.py: Support rebasing 1.x binary.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1308
> 
> Support rebasing FSP 1.X binary.
> 
> Test: both FSP 2.X (Kabylake) and FSP 1.X (BroadwellDE) binary
>   can be rebased successfully.
> 
> Cc: Maurice Ma 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Chasel Chiu 
> ---
>  IntelFsp2Pkg/Tools/SplitFspBin.py | 21 +
>  1 file changed, 13 insertions(+), 8 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py
> b/IntelFsp2Pkg/Tools/SplitFspBin.py
> index 2458231d09..15c8bebee2 100644
> --- a/IntelFsp2Pkg/Tools/SplitFspBin.py
> +++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
> @@ -1,6 +1,6 @@
>  ## @ FspTool.py
>  #
> -# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2015 - 2019, Intel Corporation. All rights
> +reserved.
>  # SPDX-License-Identifier: BSD-2-Clause-Patent  #  ## @@ -14,12 +14,12 @@
> import argparse
>  from   ctypes import *
> 
>  """
> -This utility supports some operations for Intel FSP 2.0 image.
> +This utility supports some operations for Intel FSP 1.x/2.x image.
>  It supports:
> -- Display FSP 2.0 information header
> -- Split FSP 2.0 image into individual FSP-T/M/S/O component
> -- Rebase FSP 2.0 components to a different base address
> -- Generate FSP mapping C header file
> +- Display FSP 1.x/2.x information header
> +- Split FSP 2.x image into individual FSP-T/M/S/O component
> +- Rebase FSP 1.x/2.x components to a different base address
> +- Generate FSP 1.x/2.x mapping C header file
>  """
> 
>  CopyRightHeaderFile = """/*
> @@ -500,8 +500,6 @@ class FirmwareDevice:
> 
>  fih = None
>  for fsp in self.FspList:
> -if fsp.Fih.HeaderRevision < 3:
> -raise Exception("ERROR: FSP 1.x is not supported by this 
> tool !")
>  if not fih:
>  fih = fsp.Fih
>  else:
> @@ -713,6 +711,8 @@ def SplitFspBin (fspfile, outdir, nametemplate):
>  fd.ParseFsp ()
> 
>  for fsp in fd.FspList:
> +if fsp.Fih.HeaderRevision < 3:
> +raise Exception("ERROR: FSP 1.x is not supported by the
> + split command !")
>  ftype = fsp.Type
>  if not nametemplate:
>  nametemplate = fspfile
> @@ -742,6 +742,11 @@ def RebaseFspBin (FspBinary, FspComponent,
> FspBase, OutputDir, OutputFile):
> 
>  found = False
>  for fsp in fd.FspList:
> +# Is this FSP 1.x single binary?
> +if fsp.Fih.HeaderRevision < 3:
> +found = True
> +ftype = 'X'
> +break
>  ftype = fsp.Type.lower()
>  if ftype == fspcomp:
>  found = True
> --
> 2.13.3.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41631): https://edk2.groups.io/g/devel/message/41631
Mute This Topic: https://groups.io/mt/31834320/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH for-edk2-stable201905 6/6] OvmfPkg/PlatformPei: set 32-bit UC area at PciBase / PciExBarBase (pc/q35)

2019-05-29 Thread Laszlo Ersek
(This is a replacement for commit 39b9a5ffe661 ("OvmfPkg/PlatformPei: fix
MTRR for low-RAM sizes that have many bits clear", 2019-05-16).)

Reintroduce the same logic as seen in commit 39b9a5ffe661 for the pc
(i440fx) board type.

For q35, the same approach doesn't work any longer, given that (a) we'd
like to keep the PCIEXBAR in the platform DSC a fixed-at-build PCD, and
(b) QEMU expects the PCIEXBAR to reside at a lower address than the 32-bit
PCI MMIO aperture.

Therefore, introduce a helper function for determining the 32-bit
"uncacheable" (MMIO) area base address:

- On q35, this function behaves statically. Furthermore, the MTRR setup
  exploits that the range [0xB000_, 0x_] can be marked UC with
  just two variable MTRRs (one at 0xB000_ (size 256MB), another at
  0xC000_ (size 1GB)).

- On pc (i440fx), the function behaves dynamically, implementing the same
  logic as commit 39b9a5ffe661 did. The PciBase value is adjusted to the
  value calculated, similarly to commit 39b9a5ffe661. A further
  simplification is that we show that the UC32 area size truncation to a
  whole power of two automatically guarantees a >=2GB base address.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jordan Justen 
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek 
---
 OvmfPkg/PlatformPei/Platform.h  |  7 +++
 OvmfPkg/PlatformPei/MemDetect.c | 59 ++--
 OvmfPkg/PlatformPei/Platform.c  |  5 +-
 3 files changed, 66 insertions(+), 5 deletions(-)

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index 81af8b71480f..2f3cebcd3a6a 100644
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -62,6 +62,11 @@ GetSystemMemorySizeBelow4gb (
   VOID
   );
 
+VOID
+QemuUc32BaseInitialization (
+  VOID
+  );
+
 VOID
 InitializeRamRegions (
   VOID
@@ -114,4 +119,6 @@ extern UINT32 mMaxCpuCount;
 
 extern UINT16 mHostBridgeDevId;
 
+extern UINT32 mQemuUc32Base;
+
 #endif // _PLATFORM_PEI_H_INCLUDED_
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index e890e36408a6..d451989f31c9 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -14,6 +14,7 @@ Module Name:
 // The package level header files this module uses
 //
 #include 
+#include 
 #include 
 #include 
 
@@ -42,6 +43,8 @@ STATIC UINT32 mS3AcpiReservedMemorySize;
 
 STATIC UINT16 mQ35TsegMbytes;
 
+UINT32 mQemuUc32Base;
+
 VOID
 Q35TsegMbytesInitialization (
   VOID
@@ -98,6 +101,54 @@ Q35TsegMbytesInitialization (
 }
 
 
+VOID
+QemuUc32BaseInitialization (
+  VOID
+  )
+{
+  UINT32 LowerMemorySize;
+  UINT32 Uc32Size;
+
+  if (mXen) {
+return;
+  }
+
+  if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
+//
+// On q35, the 32-bit area that we'll mark as UC, through variable MTRRs,
+// starts at PcdPciExpressBaseAddress. The platform DSC is responsible for
+// setting PcdPciExpressBaseAddress such that describing the
+// [PcdPciExpressBaseAddress, 4GB) range require a very small number of
+// variable MTRRs (preferably 1 or 2).
+//
+ASSERT (FixedPcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
+mQemuUc32Base = (UINT32)FixedPcdGet64 (PcdPciExpressBaseAddress);
+return;
+  }
+
+  ASSERT (mHostBridgeDevId == INTEL_82441_DEVICE_ID);
+  //
+  // On i440fx, start with the [LowerMemorySize, 4GB) range. Make sure one
+  // variable MTRR suffices by truncating the size to a whole power of two,
+  // while keeping the end affixed to 4GB. This will round the base up.
+  //
+  LowerMemorySize = GetSystemMemorySizeBelow4gb ();
+  Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));
+  mQemuUc32Base = (UINT32)(SIZE_4GB - Uc32Size);
+  //
+  // Assuming that LowerMemorySize is at least 1 byte, Uc32Size is at most 2GB.
+  // Therefore mQemuUc32Base is at least 2GB.
+  //
+  ASSERT (mQemuUc32Base >= BASE_2GB);
+
+  if (mQemuUc32Base != LowerMemorySize) {
+DEBUG ((DEBUG_VERBOSE, "%a: rounded UC32 base from 0x%x up to 0x%x, for "
+  "an UC32 size of 0x%x\n", __FUNCTION__, LowerMemorySize, mQemuUc32Base,
+  Uc32Size));
+  }
+}
+
+
 /**
   Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map that start outside
   of the 32-bit address range.
@@ -688,11 +739,11 @@ QemuInitializeRam (
 ASSERT_EFI_ERROR (Status);
 
 //
-// Set memory range from the "top of lower RAM" (RAM below 4GB) to 4GB as
-// uncacheable
+// Set the memory range from the start of the 32-bit MMIO area (32-bit PCI
+// MMIO aperture on i440fx, PCIEXBAR on q35) to 4GB as uncacheable.
 //
-Status = MtrrSetMemoryAttribute (LowerMemorySize,
-   SIZE_4GB - LowerMemorySize, CacheUncacheable);
+Status = MtrrSetMemoryAttribute (mQemuUc32Base, SIZE_4GB - mQemuUc32Base,
+   CacheUncacheable);
 ASSERT_EFI_ERROR (Status);
   }
 }
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 

[edk2-devel] [PATCH for-edk2-stable201905 5/6] OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35

2019-05-29 Thread Laszlo Ersek
(This is a replacement for commit 75136b29541b, "OvmfPkg/PlatformPei:
reorder the 32-bit PCI window vs. the PCIEXBAR on q35", 2019-05-16).

Commit 7b8fe63561b4 ("OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG
/ ECAM) on Q35", 2016-03-10) claimed that,

  On Q35 machine types that QEMU intends to support in the long term, QEMU
  never lets the RAM below 4 GB exceed 2 GB.

Alas, this statement came from a misunderstanding that occurred while we
worked out the interface contract. In fact QEMU does allow the 32-bit RAM
extend up to 0xB000_ (exclusive), in case the RAM size falls in the
range (0x8000_, 0xB000_) (i.e., the RAM size is greater than
2048MB and smaller than 2816MB).

In turn, such a RAM size (justifiedly) triggers

  ASSERT (TopOfLowRam <= PciExBarBase);

in MemMapInitialization(), because we placed the 256MB PCIEXBAR at
0x8000_ (2GB) exactly, relying on the interface contract. (And, the
32-bit PCI window would follow the PCIEXBAR, covering the [0x9000_,
0xFC00_) range.)

In order to fix this, place the PCIEXBAR at 2816MB (0xB000_), and
start the 32-bit PCI window at 3 GB (0xC000_). This shrinks the 32-bit
PCI window to

  0xFC00_ - 0xC000_ = 0x3C00_ = 960 MB.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jordan Justen 
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek 
---
 OvmfPkg/OvmfPkgIa32.dsc| 4 ++--
 OvmfPkg/OvmfPkgIa32X64.dsc | 4 ++--
 OvmfPkg/OvmfPkgX64.dsc | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 578fc6c98ec8..e74a9d5a5149 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -492,8 +492,8 @@ [PcdsFixedAtBuild]
   # the PCIEXBAR register.
   #
   # On Q35 machine types that QEMU intends to support in the long term, QEMU
-  # never lets the RAM below 4 GB exceed 2 GB.
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
+  # never lets the RAM below 4 GB exceed 2816 MB.
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB000
 
 !ifdef $(SOURCE_DEBUG_ENABLE)
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index eade8f62d3de..67ac015991fd 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -497,8 +497,8 @@ [PcdsFixedAtBuild]
   # the PCIEXBAR register.
   #
   # On Q35 machine types that QEMU intends to support in the long term, QEMU
-  # never lets the RAM below 4 GB exceed 2 GB.
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
+  # never lets the RAM below 4 GB exceed 2816 MB.
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB000
 
 !ifdef $(SOURCE_DEBUG_ENABLE)
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 733a4c9d8a43..68073ef55b4d 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -497,8 +497,8 @@ [PcdsFixedAtBuild]
   # the PCIEXBAR register.
   #
   # On Q35 machine types that QEMU intends to support in the long term, QEMU
-  # never lets the RAM below 4 GB exceed 2 GB.
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
+  # never lets the RAM below 4 GB exceed 2816 MB.
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB000
 
 !ifdef $(SOURCE_DEBUG_ENABLE)
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
-- 
2.19.1.3.g30247aa5d201



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41629): https://edk2.groups.io/g/devel/message/41629
Mute This Topic: https://groups.io/mt/31834720/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH for-edk2-stable201905 3/6] Revert "OvmfPkg/PlatformPei: hoist PciBase assignment above the i440fx/q35 branching"

2019-05-29 Thread Laszlo Ersek
This reverts commit 9a2e8d7c65ef7f39c6754d27e52954b616bc6628.

The original fix for 
triggered a bug / incorrect assumption in QEMU.

QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
it. When the firmware doesn't satisfy this assumption, QEMU generates an
\_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
32-bit MMIO BARs.

Working around the problem in the firmware looks less problematic than
fixing QEMU. Revert the original changes first, before implementing an
alternative fix.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jordan Justen 
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek 
---
 OvmfPkg/PlatformPei/Platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 9c013613a1a0..5e0a15484230 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -181,7 +181,6 @@ MemMapInitialization (
 
 TopOfLowRam = GetSystemMemorySizeBelow4gb ();
 PciExBarBase = 0;
-PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
 if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
   //
   // The MMCONFIG area is expected to fall between the top of low RAM and
@@ -193,6 +192,7 @@ MemMapInitialization (
   PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
   PciSize = 0xFC00 - PciBase;
 } else {
+  PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
   PciSize = 0xFC00 - PciBase;
 }
 
-- 
2.19.1.3.g30247aa5d201



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41626): https://edk2.groups.io/g/devel/message/41626
Mute This Topic: https://groups.io/mt/31834715/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH for-edk2-stable201905 4/6] Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches explicitly"

2019-05-29 Thread Laszlo Ersek
This reverts commit 60e95bf5094fbb9b728729ccfaf32184b3662317.

The original fix for 
triggered a bug / incorrect assumption in QEMU.

QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
it. When the firmware doesn't satisfy this assumption, QEMU generates an
\_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
32-bit MMIO BARs.

Working around the problem in the firmware looks less problematic than
fixing QEMU. Revert the original changes first, before implementing an
alternative fix.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jordan Justen 
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek 
---
 OvmfPkg/PlatformPei/Platform.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 5e0a15484230..0876316eefbc 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -190,10 +190,8 @@ MemMapInitialization (
   ASSERT (TopOfLowRam <= PciExBarBase);
   ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
   PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
-  PciSize = 0xFC00 - PciBase;
 } else {
   PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
-  PciSize = 0xFC00 - PciBase;
 }
 
 //
@@ -209,6 +207,7 @@ MemMapInitialization (
 // 0xFED2gap  896 KB
 // 0xFEE0LAPIC  1 MB
 //
+PciSize = 0xFC00 - PciBase;
 AddIoMemoryBaseSizeHob (PciBase, PciSize);
 PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase);
 ASSERT_RETURN_ERROR (PcdStatus);
-- 
2.19.1.3.g30247aa5d201



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41628): https://edk2.groups.io/g/devel/message/41628
Mute This Topic: https://groups.io/mt/31834717/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH for-edk2-stable201905 1/6] Revert "OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many bits clear"

2019-05-29 Thread Laszlo Ersek
This reverts commit 39b9a5ffe6618b7870be2a54fe7725000249c33a.

The original fix for 
triggered a bug / incorrect assumption in QEMU.

QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
it. When the firmware doesn't satisfy this assumption, QEMU generates an
\_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
32-bit MMIO BARs.

Working around the problem in the firmware looks less problematic than
fixing QEMU. Revert the original changes first, before implementing an
alternative fix.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jordan Justen 
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek 
---
 OvmfPkg/PlatformPei/Platform.h  |  2 --
 OvmfPkg/PlatformPei/MemDetect.c | 23 +++-
 OvmfPkg/PlatformPei/Platform.c  |  4 +++-
 3 files changed, 6 insertions(+), 23 deletions(-)

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index 4476ddd871cd..81af8b71480f 100644
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -114,6 +114,4 @@ extern UINT32 mMaxCpuCount;
 
 extern UINT16 mHostBridgeDevId;
 
-extern UINT32 mQemuUc32Base;
-
 #endif // _PLATFORM_PEI_H_INCLUDED_
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index ae73c63d27d5..e890e36408a6 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -42,8 +42,6 @@ STATIC UINT32 mS3AcpiReservedMemorySize;
 
 STATIC UINT16 mQ35TsegMbytes;
 
-UINT32 mQemuUc32Base;
-
 VOID
 Q35TsegMbytesInitialization (
   VOID
@@ -665,8 +663,6 @@ QemuInitializeRam (
   // cover it exactly.
   //
   if (IsMtrrSupported ()) {
-UINT32 Uc32Size;
-
 MtrrGetAllMtrrs ();
 
 //
@@ -693,24 +689,11 @@ QemuInitializeRam (
 
 //
 // Set memory range from the "top of lower RAM" (RAM below 4GB) to 4GB as
-// uncacheable. Make sure one variable MTRR suffices by truncating the size
-// to a whole power of two. This will round the base *up*, and a gap (not
-// used for either RAM or MMIO) may stay in the middle, marked as
-// cacheable-by-default.
+// uncacheable
 //
-Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));
-mQemuUc32Base = (UINT32)(SIZE_4GB - Uc32Size);
-if (mQemuUc32Base != LowerMemorySize) {
-  DEBUG ((DEBUG_VERBOSE, "%a: rounded UC32 base from 0x%x up to 0x%x, for "
-"an UC32 size of 0x%x\n", __FUNCTION__, (UINT32)LowerMemorySize,
-mQemuUc32Base, Uc32Size));
-}
-
-Status = MtrrSetMemoryAttribute (mQemuUc32Base, Uc32Size,
-   CacheUncacheable);
+Status = MtrrSetMemoryAttribute (LowerMemorySize,
+   SIZE_4GB - LowerMemorySize, CacheUncacheable);
 ASSERT_EFI_ERROR (Status);
-  } else {
-mQemuUc32Base = (UINT32)LowerMemorySize;
   }
 }
 
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index c064b4ed9b8f..fd8eccaf3e50 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -174,12 +174,14 @@ MemMapInitialization (
   AddIoMemoryRangeHob (0x0A, BASE_1MB);
 
   if (!mXen) {
+UINT32  TopOfLowRam;
 UINT64  PciExBarBase;
 UINT32  PciBase;
 UINT32  PciSize;
 
+TopOfLowRam = GetSystemMemorySizeBelow4gb ();
 PciExBarBase = 0;
-PciBase = (mQemuUc32Base < BASE_2GB) ? BASE_2GB : mQemuUc32Base;
+PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
 if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
   //
   // The 32-bit PCI host aperture is expected to fall between the top of
-- 
2.19.1.3.g30247aa5d201



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41625): https://edk2.groups.io/g/devel/message/41625
Mute This Topic: https://groups.io/mt/31834711/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH for-edk2-stable201905 2/6] Revert "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the PCIEXBAR on q35"

2019-05-29 Thread Laszlo Ersek
This reverts commit 75136b29541b0e093a51d2e2c2af8d19855c2b60.

The original fix for 
triggered a bug / incorrect assumption in QEMU.

QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above
it. When the firmware doesn't satisfy this assumption, QEMU generates an
\_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the
firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign
32-bit MMIO BARs.

Working around the problem in the firmware looks less problematic than
fixing QEMU. Revert the original changes first, before implementing an
alternative fix.

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jordan Justen 
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Signed-off-by: Laszlo Ersek 
---
 OvmfPkg/OvmfPkgIa32.dsc| 5 -
 OvmfPkg/OvmfPkgIa32X64.dsc | 5 -
 OvmfPkg/OvmfPkgX64.dsc | 5 -
 OvmfPkg/PlatformPei/Platform.c | 9 +
 4 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index b3446ece311a..578fc6c98ec8 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -490,7 +490,10 @@ [PcdsFixedAtBuild]
   # This PCD is used to set the base address of the PCI express hierarchy. It
   # is only consulted when OVMF runs on Q35. In that case it is programmed into
   # the PCIEXBAR register.
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
+  #
+  # On Q35 machine types that QEMU intends to support in the long term, QEMU
+  # never lets the RAM below 4 GB exceed 2 GB.
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
 
 !ifdef $(SOURCE_DEBUG_ENABLE)
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 679d4eb8dd36..eade8f62d3de 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -495,7 +495,10 @@ [PcdsFixedAtBuild]
   # This PCD is used to set the base address of the PCI express hierarchy. It
   # is only consulted when OVMF runs on Q35. In that case it is programmed into
   # the PCIEXBAR register.
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
+  #
+  # On Q35 machine types that QEMU intends to support in the long term, QEMU
+  # never lets the RAM below 4 GB exceed 2 GB.
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
 
 !ifdef $(SOURCE_DEBUG_ENABLE)
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 56a9560262aa..733a4c9d8a43 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -495,7 +495,10 @@ [PcdsFixedAtBuild]
   # This PCD is used to set the base address of the PCI express hierarchy. It
   # is only consulted when OVMF runs on Q35. In that case it is programmed into
   # the PCIEXBAR register.
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000
+  #
+  # On Q35 machine types that QEMU intends to support in the long term, QEMU
+  # never lets the RAM below 4 GB exceed 2 GB.
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x8000
 
 !ifdef $(SOURCE_DEBUG_ENABLE)
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index fd8eccaf3e50..9c013613a1a0 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -184,13 +184,14 @@ MemMapInitialization (
 PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam;
 if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
   //
-  // The 32-bit PCI host aperture is expected to fall between the top of
-  // low RAM and the base of the MMCONFIG area.
+  // The MMCONFIG area is expected to fall between the top of low RAM and
+  // the base of the 32-bit PCI host aperture.
   //
   PciExBarBase = FixedPcdGet64 (PcdPciExpressBaseAddress);
-  ASSERT (PciBase < PciExBarBase);
+  ASSERT (TopOfLowRam <= PciExBarBase);
   ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
-  PciSize = (UINT32)(PciExBarBase - PciBase);
+  PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
+  PciSize = 0xFC00 - PciBase;
 } else {
   PciSize = 0xFC00 - PciBase;
 }
-- 
2.19.1.3.g30247aa5d201



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41627): https://edk2.groups.io/g/devel/message/41627
Mute This Topic: https://groups.io/mt/31834716/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH for-edk2-stable201905 0/6] work around a QEMU issue triggered by the original TianoCore#1814 fix

2019-05-29 Thread Laszlo Ersek
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1859
Repo: https://github.com/lersek/edk2.git
Branch:   exbar_mtrr_bz_1859

The fix (commit range 3b7a897cd8e3..39b9a5ffe661) for
 is technically
correct, but it tickles an (arguably unjustified) assumption in QEMU the
wrong way. For end users, this makes the original fix for TianoCore#1814
a regression, under certain circumstances.

In theory, the assumption should be eliminated in QEMU, but in practice,
that could be quite intrusive and/or take long. It seems possible to
work around the problem in OVMF, satisfying the assumption again; for
that, OVMF needs a different fix (and a different trade-off) for the
original problem described in TianoCore#1814.

Please see the detailed problem statement and the workaround's idea in
TianoCore#1859.

If possible, I'd like to get this into edk2-stable201905 (which we're
postponing by two weeks anyway, for the sake of the OpenSSL 1.1.1b
upgrade).

Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 
Cc: Jordan Justen 

Thanks,
Laszlo

Laszlo Ersek (6):
  Revert "OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many
bits clear"
  Revert "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the
PCIEXBAR on q35"
  Revert "OvmfPkg/PlatformPei: hoist PciBase assignment above the
i440fx/q35 branching"
  Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35
branches explicitly"
  OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35
  OvmfPkg/PlatformPei: set 32-bit UC area at PciBase / PciExBarBase
(pc/q35)

 OvmfPkg/OvmfPkgIa32.dsc |  5 +-
 OvmfPkg/OvmfPkgIa32X64.dsc  |  5 +-
 OvmfPkg/OvmfPkgX64.dsc  |  5 +-
 OvmfPkg/PlatformPei/Platform.h  |  5 ++
 OvmfPkg/PlatformPei/MemDetect.c | 70 +++-
 OvmfPkg/PlatformPei/Platform.c  | 17 +++--
 6 files changed, 80 insertions(+), 27 deletions(-)

-- 
2.19.1.3.g30247aa5d201


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41624): https://edk2.groups.io/g/devel/message/41624
Mute This Topic: https://groups.io/mt/31834710/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei

2019-05-29 Thread Leif Lindholm
On Wed, May 29, 2019 at 03:01:12PM +, Gao, Zhichao wrote:
> I just update the date of copyright. And the code in Mu project didn't add 
> its own copyright.
> If it is required, I would add it for them.

Well, hopefully Microsoft will add their own copyright to the original
:)

Although it would certainly be better to add it here as well anyway.

So what modifications were made to the code on the way from the
project Mu repository? That would be useful to mention in the commit
message.

Regards,

Leif

> And I also make some minor changes on it.
> 
> Thanks,
> Zhichao
> 
> > -Original Message-
> > From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> > Sent: Wednesday, May 29, 2019 7:12 PM
> > To: devel@edk2.groups.io; Gao, Zhichao 
> > Cc: Bret Barkelew ; Wang, Jian J
> > ; Wu, Hao A ; Ni, Ray
> > ; Zeng, Star ; Gao, Liming
> > ; Sean Brogan ;
> > Michael Turner 
> > Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the
> > CapsulePei
> > 
> > On Wed, May 29, 2019 at 08:45:55AM +0800, Gao, Zhichao wrote:
> > > From: Bret Barkelew 
> > 
> > If this code is from Microsoft...
> > 
> > >
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1853
> > >
> > > Sperate the capsule check function from GetCapsuleDescriptors and name
> > > it to AreCapsulesStaged.
> > > Rename GetCapsuleDescriptors to GetScatterGatherHeadEntries.
> > > And optimize its to remove the duplicated code.
> > >
> > > Cc: Jian J Wang 
> > > Cc: Hao A Wu 
> > > Cc: Ray Ni 
> > > Cc: Star Zeng 
> > > Cc: Liming Gao 
> > > Cc: Sean Brogan 
> > > Cc: Michael Turner 
> > > Cc: Bret Barkelew 
> > > Signed-off-by: Zhichao gao 
> > > ---
> > >  MdeModulePkg/Universal/CapsulePei/Capsule.h   |   3 +-
> > >  .../Universal/CapsulePei/CapsulePei.inf   |   3 +-
> > >  .../Universal/CapsulePei/UefiCapsule.c| 357 ++
> > >  3 files changed, 194 insertions(+), 169 deletions(-)
> > >
> > > diff --git a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > index baf40423af..fc20dd8b92 100644
> > > --- a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > +++ b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > @@ -1,6 +1,6 @@
> > >  /** @file
> > >
> > > -Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > > reserved.
> > > +Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > > +reserved.
> > >
> > >  SPDX-License-Identifier: BSD-2-Clause-Patent
> > >
> > > @@ -30,6 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > > #include   #include 
> > > #include 
> > > +#include 
> > >  #include   #include
> > > "Common/CommonHeader.h"
> > >
> > > diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > index 5d43df3075..9c88b3986f 100644
> > > --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > @@ -6,7 +6,7 @@
> > >  #  This external input must be validated carefully to avoid security
> > > issue like  #  buffer overflow, integer overflow.
> > >  #
> > > -# Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > > reserved.
> > > +# Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > > +reserved.
> > 
> > ...why does Intel get the copyright?
> > 
> > /
> > Leif
> 
> 
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41623): https://edk2.groups.io/g/devel/message/41623
Mute This Topic: https://groups.io/mt/31828852/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei

2019-05-29 Thread Liming Gao
No. Please don't touch copyright if you doesn't change the file. 

> -Original Message-
> From: Gao, Zhichao
> Sent: Wednesday, May 29, 2019 11:01 PM
> To: Leif Lindholm ; devel@edk2.groups.io
> Cc: Bret Barkelew ; Wang, Jian J 
> ; Wu, Hao A ; Ni, Ray
> ; Zeng, Star ; Gao, Liming 
> ; Sean Brogan ;
> Michael Turner 
> Subject: RE: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the 
> CapsulePei
> 
> I just update the date of copyright. And the code in Mu project didn't add 
> its own copyright.
> If it is required, I would add it for them.
> And I also make some minor changes on it.
> 
> Thanks,
> Zhichao
> 
> > -Original Message-
> > From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> > Sent: Wednesday, May 29, 2019 7:12 PM
> > To: devel@edk2.groups.io; Gao, Zhichao 
> > Cc: Bret Barkelew ; Wang, Jian J
> > ; Wu, Hao A ; Ni, Ray
> > ; Zeng, Star ; Gao, Liming
> > ; Sean Brogan ;
> > Michael Turner 
> > Subject: Re: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the
> > CapsulePei
> >
> > On Wed, May 29, 2019 at 08:45:55AM +0800, Gao, Zhichao wrote:
> > > From: Bret Barkelew 
> >
> > If this code is from Microsoft...
> >
> > >
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1853
> > >
> > > Sperate the capsule check function from GetCapsuleDescriptors and name
> > > it to AreCapsulesStaged.
> > > Rename GetCapsuleDescriptors to GetScatterGatherHeadEntries.
> > > And optimize its to remove the duplicated code.
> > >
> > > Cc: Jian J Wang 
> > > Cc: Hao A Wu 
> > > Cc: Ray Ni 
> > > Cc: Star Zeng 
> > > Cc: Liming Gao 
> > > Cc: Sean Brogan 
> > > Cc: Michael Turner 
> > > Cc: Bret Barkelew 
> > > Signed-off-by: Zhichao gao 
> > > ---
> > >  MdeModulePkg/Universal/CapsulePei/Capsule.h   |   3 +-
> > >  .../Universal/CapsulePei/CapsulePei.inf   |   3 +-
> > >  .../Universal/CapsulePei/UefiCapsule.c| 357 ++
> > >  3 files changed, 194 insertions(+), 169 deletions(-)
> > >
> > > diff --git a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > index baf40423af..fc20dd8b92 100644
> > > --- a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > +++ b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> > > @@ -1,6 +1,6 @@
> > >  /** @file
> > >
> > > -Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > > reserved.
> > > +Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > > +reserved.
> > >
> > >  SPDX-License-Identifier: BSD-2-Clause-Patent
> > >
> > > @@ -30,6 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > > #include   #include 
> > > #include 
> > > +#include 
> > >  #include   #include
> > > "Common/CommonHeader.h"
> > >
> > > diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > index 5d43df3075..9c88b3986f 100644
> > > --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> > > @@ -6,7 +6,7 @@
> > >  #  This external input must be validated carefully to avoid security
> > > issue like  #  buffer overflow, integer overflow.
> > >  #
> > > -# Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > > reserved.
> > > +# Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > > +reserved.
> >
> > ...why does Intel get the copyright?
> >
> > /
> > Leif

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41622): https://edk2.groups.io/g/devel/message/41622
Mute This Topic: https://groups.io/mt/31828852/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property

2019-05-29 Thread Leif Lindholm
On Wed, May 29, 2019 at 03:14:48PM +0200, Ard Biesheuvel wrote:
> On Wed, 29 May 2019 at 15:06, Leif Lindholm  wrote:
> >
> > On Wed, May 29, 2019 at 02:50:19PM +0200, Ard Biesheuvel wrote:
> > > As opposed to the Secure96's I2C peripherals, whose bus addresses are
> > > properties of the peripherals themselves, the SPI CS address of the
> > > TPM is a property of the platform that incorporates the LS connector.
> > >
> > > So tweak the macros that emit the CS values and related properties
> > > to put it under the control of the platform that incorporates the
> > > driver.
> > >
> > > Signed-off-by: Ard Biesheuvel 
> > > ---
> > >  Platform/96Boards/Secure96Dxe/Secure96.dts |  2 +-
> > >  Platform/96Boards/Secure96Dxe/Secure96.h   | 11 ---
> > >  2 files changed, 9 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts 
> > > b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > index d066fcb1933c..0d7d9b3900a4 100644
> > > --- a/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
> > > @@ -39,7 +39,7 @@
> > >  __overlay__ {
> > >  INFINEON_SLB9670_DT_NODENAME {
> > >  compatible = "infineon,slb9670";
> > > -reg = ;
> > > +reg = ;
> > >  spi-max-frequency = <2250>;
> > >  };
> > >  };
> > > diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h 
> > > b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > index c34fc5eea046..1d8bf4159209 100644
> > > --- a/Platform/96Boards/Secure96Dxe/Secure96.h
> > > +++ b/Platform/96Boards/Secure96Dxe/Secure96.h
> > > @@ -1,6 +1,6 @@
> > >  /** @file
> > >
> > > -  Copyright (c) 2018, Linaro, Ltd. All rights reserved.
> > > +  Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.
> > >
> > >SPDX-License-Identifier: BSD-2-Clause-Patent
> > >  **/
> > > @@ -8,14 +8,19 @@
> > >  #ifndef _SECURE96_H_
> > >  #define _SECURE96_H_
> > >
> > > +#define __CONCAT(a,b)   a ## b
> > > +
> >
> > Urgh. We badly need to properly add some official macros for this.
> > You could possibly use __CONCATENATE from Base.h.
> >
> 
> OK, I'll use that instead.

With that, for 1-4/5:
Reviewed-by: Leif Lindholm 


> > For new macros, we really should avoid leading _.
> >
> 
> True.
> 
> 
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41620): https://edk2.groups.io/g/devel/message/41620
Mute This Topic: https://groups.io/mt/31833223/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [[edk2-platforms]PATCH v4 1/1] Platform: Intel: Add Stratix 10 platform support

2019-05-29 Thread Leif Lindholm
Urgh, sorry, saw this was still stuck in my review queue.

Mike, one question for you inline below.
Oh, and one here - what's your take on maintainership for ARM-based
Intel platforms? Fall back to top-level maintainers and add Tien Hock
as reviewer?

On Thu, May 09, 2019 at 04:55:47PM +0800, tien.hock@intel.com wrote:
> From: "Tien Hock, Loh" 
> 
> Adds support for Intel Stratix 10 Platform.
> 
> Signed-off-by: "Tien Hock, Loh" 
> Contributed-under: TianoCore Contribution Agreement 1.1

Yeah, so amusingly we've now updated the license, so we don't need
this tag any longer...

> Cc: Ard Biesheuvel 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> 
> --
> v4
> - Removed LibC
> - Added NOOPT to BUILD_TARGETS
> - Removed ARM from SUPPORTED_ARCHITECTURE
> v3
> - Updated Pcd with updated name
> v2
> - Updates ShellBinPkg with ShellPkg

Revision history goes below --- or in cover letter.

> ---
>  Platform/Intel/Stratix10/Stratix10SoCPkg.dec 
>  |  30 ++
>  Platform/Intel/Stratix10/Stratix10SoCPkg.dsc 
>  | 546 
>  Platform/Intel/Stratix10/Stratix10SoCPkg.fdf 
>  | 270 ++
>  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.inf   
>  |  49 ++
>  Platform/Intel/Stratix10/Library/IntelPlatformLib/IntelPlatformLib.inf   
>  |  49 ++
>  Platform/Intel/Stratix10/Drivers/IntelPlatformDxe/IntelPlatformDxe.c 
>  |  43 ++
>  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10Mmu.c 
>  | 155 ++
>  Platform/Intel/Stratix10/Library/IntelPlatformLib/Stratix10PlatformLib.c 
>  | 167 ++
>  
> Platform/Intel/Stratix10/Library/IntelPlatformLib/AArch64/ArmPlatformHelper.S 
> |  51 ++
>  Platform/Intel/Stratix10/Readme.md   
>  |  61 +++
>  Platform/Intel/Stratix10/ShellScript/startup.nsh 
>  |   2 +
>  11 files changed, 1423 insertions(+)
> 
> diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dec 
> b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> new file mode 100755
> index ..5677ac7676d5
> --- /dev/null
> +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dec
> @@ -0,0 +1,30 @@
> +#/** @file
> +#  Intel Stratix 10 SoC FPGA Package
> +#
> +# Copyright (c) 2019, Intel All rights reserved.
> +#
> +#This program and the accompanying materials are licensed and made 
> available under
> +#the terms and conditions of the BSD License which accompanies this 
> distribution.
> +#The full text of the license may be found at
> +#http://opensource.org/licenses/bsd-license.php
> +#
> +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
> IMPLIED.

... and as a result of the license change, could you also please
replace these

Mike Kinney may actually have some scripts that would help with this?

> +#
> +#**/
> +
> +[Defines]
> +  DEC_SPECIFICATION  = 0x00010005

We could probably bump this to the current DSC specification format?
I think we're on 0x0001001B? (1.27)

> +  PACKAGE_NAME   = IntelSoCFpgaPkg

Should this be Stratix10SoCPkg?

> +  PACKAGE_GUID   = 45533DD0-C41F-4ab6-A5DF-65B52684AC60
> +  PACKAGE_VERSION= 0.1
> +
> +[Includes.common]

Add "Include" here, and you won't need to add manual -I flags below.

> +
> +[Guids.common]
> +  gIntelSocFpgaTokenSpaceGuid =  { 0xb89b8744, 0x4a1c, 0x4cd6, { 0xba, 0xa, 
> 0x69, 0xb3, 0xfe, 0xe6, 0x91, 0x6b } }

This sounds like a very generic TokenSpaceGuid name that perhaps
belongs in a package shared by many platforms. Should this one just be
called gStratix10SoCTokenSpaceGuid?

Please add a blank line before next section header.

> +[PcdsFeatureFlag.common]
> +
> +[PcdsFixedAtBuild.common]
> +
> +
> diff --git a/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc 
> b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> new file mode 100755
> index ..5665ac6c8982
> --- /dev/null
> +++ b/Platform/Intel/Stratix10/Stratix10SoCPkg.dsc
> @@ -0,0 +1,546 @@
> +#/** @file
> +#  Intel Stratix 10 SoC FPGA Package
> +#
> +# Copyright (c) 2019, Intel All rights reserved.
> +#
> +#This program and the accompanying materials are licensed and made 
> available under
> +#the terms and conditions of the BSD License which accompanies this 
> distribution.
> +#The full text of the license may be found at
> +#http://opensource.org/licenses/bsd-license.php
> +#
> +#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
> IMPLIED.
> +#
> +#**/
> +
> +
> +
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> 

[edk2-devel] [PATCH] IntelFsp2Pkg/FspSplitBin.py: Support rebasing 1.x binary.

2019-05-29 Thread Chiu, Chasel
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1308

Support rebasing FSP 1.X binary.

Test: both FSP 2.X (Kabylake) and FSP 1.X (BroadwellDE) binary
  can be rebased successfully.

Cc: Maurice Ma 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/Tools/SplitFspBin.py | 21 +
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py 
b/IntelFsp2Pkg/Tools/SplitFspBin.py
index 2458231d09..15c8bebee2 100644
--- a/IntelFsp2Pkg/Tools/SplitFspBin.py
+++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
@@ -1,6 +1,6 @@
 ## @ FspTool.py
 #
-# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -14,12 +14,12 @@ import argparse
 from   ctypes import *
 
 """
-This utility supports some operations for Intel FSP 2.0 image.
+This utility supports some operations for Intel FSP 1.x/2.x image.
 It supports:
-- Display FSP 2.0 information header
-- Split FSP 2.0 image into individual FSP-T/M/S/O component
-- Rebase FSP 2.0 components to a different base address
-- Generate FSP mapping C header file
+- Display FSP 1.x/2.x information header
+- Split FSP 2.x image into individual FSP-T/M/S/O component
+- Rebase FSP 1.x/2.x components to a different base address
+- Generate FSP 1.x/2.x mapping C header file
 """
 
 CopyRightHeaderFile = """/*
@@ -500,8 +500,6 @@ class FirmwareDevice:
 
 fih = None
 for fsp in self.FspList:
-if fsp.Fih.HeaderRevision < 3:
-raise Exception("ERROR: FSP 1.x is not supported by this tool 
!")
 if not fih:
 fih = fsp.Fih
 else:
@@ -713,6 +711,8 @@ def SplitFspBin (fspfile, outdir, nametemplate):
 fd.ParseFsp ()
 
 for fsp in fd.FspList:
+if fsp.Fih.HeaderRevision < 3:
+raise Exception("ERROR: FSP 1.x is not supported by the split 
command !")
 ftype = fsp.Type
 if not nametemplate:
 nametemplate = fspfile
@@ -742,6 +742,11 @@ def RebaseFspBin (FspBinary, FspComponent, FspBase, 
OutputDir, OutputFile):
 
 found = False
 for fsp in fd.FspList:
+# Is this FSP 1.x single binary?
+if fsp.Fih.HeaderRevision < 3:
+found = True
+ftype = 'X'
+break
 ftype = fsp.Type.lower()
 if ftype == fspcomp:
 found = True
-- 
2.13.3.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41618): https://edk2.groups.io/g/devel/message/41618
Mute This Topic: https://groups.io/mt/31834320/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [Patch V3 0/2] BaseTools: Add a checking for Sources section in INF file [Part 0/2]

2019-05-29 Thread Liming Gao
Christian:
  I have two comments on the commit messages. 

1.  List the change version only in the cover letter. There is no V2, V3 in 
patch commit message. 
2.  Update patch commit message for this patch change. Don't use Part1, Part2. 

Thanks
Liming
> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of 
> Christian Rodriguez
> Sent: Friday, May 24, 2019 10:40 PM
> To: devel@edk2.groups.io
> Subject: [edk2-devel] [Patch V3 0/2] BaseTools: Add a checking for Sources 
> section in INF file [Part 0/2]
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1804
> 
> In V3: Seperate checker and hashing into individual patches
>Part 1/2: Contains checker.
>Part 2/2: Contains hash feature alignment.
> In V2: Enable check for all builds, move conditional to hash invalidation
> In the Edk2 INF spec 3.9, it states, All HII Unicode format files
> must be listed in [Sources] section. Add a check to see if [Sources]
> section lists all the "source" type files of a module. Performance
> impact should be minimal with this patch since information is already
> being fetched for Makefile purposes. All other information is already
> cached in memory. No extra IO time is needed.
> 
> Christian Rodriguez (2):
>   BaseTools: Add a checking for Sources section in INF file [Part 1/2]
>   BaseTools: Add a checking for Sources section in INF file [Part 2/2]
> 
>  BaseTools/Source/Python/AutoGen/AutoGen.py   |  6 +-
>  BaseTools/Source/Python/AutoGen/GenMake.py   | 44 +
>  BaseTools/Source/Python/Common/GlobalData.py |  3 +-
>  BaseTools/Source/Python/build/build.py   | 65 
>  4 files changed, 91 insertions(+), 27 deletions(-)
> 
> --
> 2.19.1.windows.1
> 
> 
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41617): https://edk2.groups.io/g/devel/message/41617
Mute This Topic: https://groups.io/mt/31745160/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [Patch V3 2/2] BaseTools: Add a checking for Sources section in INF file [Part 2/2]

2019-05-29 Thread Christian Rodriguez
Please review. Bump.

>-Original Message-
>From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
>Christian Rodriguez
>Sent: Friday, May 24, 2019 7:40 AM
>To: devel@edk2.groups.io
>Cc: Feng, Bob C ; Gao, Liming
>; Zhu, Yonghong 
>Subject: [edk2-devel] [Patch V3 2/2] BaseTools: Add a checking for Sources
>section in INF file [Part 2/2]
>
>BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1804
>
>In V3: Seperate checker and hashing into individual patches In V2: Enable
>check for all builds, move conditional to hash invalidation In the Edk2 INF 
>spec
>3.9, it states, All HII Unicode format files must be listed in [Sources] 
>section.
>Add a check to see if [Sources] section lists all the "source" type files of a
>module. Performance impact should be minimal with this patch since
>information is already being fetched for Makefile purposes. All other
>information is already cached in memory. No extra IO time is needed. Part 2 is
>hashing update.
>
>Signed-off-by: Christian Rodriguez 
>Cc: Bob Feng 
>Cc: Liming Gao 
>Cc: Yonghong Zhu 
>---
> BaseTools/Source/Python/AutoGen/AutoGen.py   |  6 +-
> BaseTools/Source/Python/AutoGen/GenMake.py   |  6 ++
> BaseTools/Source/Python/Common/GlobalData.py |  3 +-
> BaseTools/Source/Python/build/build.py   | 65 
> 4 files changed, 53 insertions(+), 27 deletions(-)
>
>diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py
>b/BaseTools/Source/Python/AutoGen/AutoGen.py
>index a843f294b9..0bc27fb2b3 100644
>--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
>+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
>@@ -3989,7 +3989,8 @@ class ModuleAutoGen(AutoGen):
> for LibraryAutoGen in self.LibraryAutoGenList:
> LibraryAutoGen.CreateMakeFile()
>
>-if self.CanSkip():
>+# Don't enable if hash feature enabled, CanSkip uses timestamps to
>determine build skipping
>+if not GlobalData.gUseHashCache and self.CanSkip():
> return
>
> if len(self.CustomMakefile) == 0:
>@@ -4032,7 +4033,8 @@ class ModuleAutoGen(AutoGen):
> for LibraryAutoGen in self.LibraryAutoGenList:
> LibraryAutoGen.CreateCodeFile()
>
>-if self.CanSkip():
>+# Don't enable if hash feature enabled, CanSkip uses timestamps to
>determine build skipping
>+if not GlobalData.gUseHashCache and self.CanSkip():
> return
>
> AutoGenList = []
>diff --git a/BaseTools/Source/Python/AutoGen/GenMake.py
>b/BaseTools/Source/Python/AutoGen/GenMake.py
>index 5c992d7c26..212ca0fa7f 100644
>--- a/BaseTools/Source/Python/AutoGen/GenMake.py
>+++ b/BaseTools/Source/Python/AutoGen/GenMake.py
>@@ -935,10 +935,16 @@ cleanlib:
> continue
> headerFileDependencySet.add(aFileName)
>
>+# Ensure that gModuleBuildTracking has been initialized per 
>architecture
>+if self._AutoGenObject.Arch not in GlobalData.gModuleBuildTracking:
>+GlobalData.gModuleBuildTracking[self._AutoGenObject.Arch] =
>+ dict()
>+
> # Check if a module dependency header file is missing from the 
> module's
>MetaFile
> for aFile in headerFileDependencySet:
> if aFile in headerFilesInMetaFileSet:
> continue
>+if GlobalData.gUseHashCache:
>+
>GlobalData.gModuleBuildTracking[self._AutoGenObject.Arch][self._AutoGen
>Object] = 'FAIL_METAFILE'
> EdkLogger.warn("build","Module MetaFile [Sources] is missing local
>header!",
> ExtraData = "Local Header: " + aFile + " not found in 
> " +
>self._AutoGenObject.MetaFile.Path
> )
>diff --git a/BaseTools/Source/Python/Common/GlobalData.py
>b/BaseTools/Source/Python/Common/GlobalData.py
>index 95e28a988f..bd45a43728 100644
>--- a/BaseTools/Source/Python/Common/GlobalData.py
>+++ b/BaseTools/Source/Python/Common/GlobalData.py
>@@ -110,7 +110,8 @@ gEnableGenfdsMultiThread = False
>gSikpAutoGenCache = set()
>
> # Dictionary for tracking Module build status as success or failure -# False 
> ->
>Fail : True -> Success
>+# Top Dict: Key: Arch Type  Value: Dictionary
>+# Second Dict:  Key: AutoGen ObjValue: 'SUCCESS'\'FAIL'\'FAIL_METAFILE'
> gModuleBuildTracking = dict()
>
> # Dictionary of booleans that dictate whether a module or diff --git
>a/BaseTools/Source/Python/build/build.py
>b/BaseTools/Source/Python/build/build.py
>index 80ceb98310..0855d4561c 100644
>--- a/BaseTools/Source/Python/build/build.py
>+++ b/BaseTools/Source/Python/build/build.py
>@@ -625,8 +625,16 @@ class BuildTask:
> BuildTask._ErrorFlag.set()
> BuildTask._ErrorMessage = "%s broken\n%s [%s]" % \
>   (threading.currentThread().getName(), 
> Command,
>WorkingDir)
>-if self.BuildItem.BuildObject in GlobalData.gModuleBuildTracking and 
>not
>BuildTask._ErrorFlag.isSet():
>-

Re: [edk2-devel] [Patch V3 1/2] BaseTools: Add a checking for Sources section in INF file [Part 1/2]

2019-05-29 Thread Christian Rodriguez
Please review. Bump.

>-Original Message-
>From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
>Christian Rodriguez
>Sent: Friday, May 24, 2019 7:40 AM
>To: devel@edk2.groups.io
>Cc: Feng, Bob C ; Gao, Liming
>; Zhu, Yonghong 
>Subject: [edk2-devel] [Patch V3 1/2] BaseTools: Add a checking for Sources
>section in INF file [Part 1/2]
>
>BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1804
>
>In V3: Seperate checker and hashing into individual patches In V2: Enable
>check for all builds, move conditional to hash invalidation In the Edk2 INF 
>spec
>3.9, it states, All HII Unicode format files must be listed in [Sources] 
>section.
>Add a check to see if [Sources] section lists all the "source" type files of a
>module. Performance impact should be minimal with this patch since
>information is already being fetched for Makefile purposes. All other
>information is already cached in memory. No extra IO time is needed. Part 1 is
>checker only.
>
>Signed-off-by: Christian Rodriguez 
>Cc: Bob Feng 
>Cc: Liming Gao 
>Cc: Yonghong Zhu 
>---
> BaseTools/Source/Python/AutoGen/GenMake.py | 38
>
> 1 file changed, 38 insertions(+)
>
>diff --git a/BaseTools/Source/Python/AutoGen/GenMake.py
>b/BaseTools/Source/Python/AutoGen/GenMake.py
>index 0e0f9fd9b0..5c992d7c26 100644
>--- a/BaseTools/Source/Python/AutoGen/GenMake.py
>+++ b/BaseTools/Source/Python/AutoGen/GenMake.py
>@@ -905,6 +905,44 @@ cleanlib:
> ForceIncludedFile,
> self._AutoGenObject.IncludePathList +
>self._AutoGenObject.BuildOptionIncPathList
> )
>+
>+# Check if header files are listed in metafile
>+# Get a list of unique module header source files from MetaFile
>+headerFilesInMetaFileSet = set()
>+for aFile in self._AutoGenObject.SourceFileList:
>+aFileName = str(aFile)
>+if not aFileName.endswith('.h'):
>+continue
>+headerFilesInMetaFileSet.add(aFileName.lower())
>+
>+# Get a list of unique module autogen files
>+localAutoGenFileSet = set()
>+for aFile in self._AutoGenObject.AutoGenFileList:
>+localAutoGenFileSet.add(str(aFile).lower())
>+
>+# Get a list of unique module dependency header files
>+# Exclude autogen files and files not in the source directory
>+headerFileDependencySet = set()
>+localSourceDir = str(self._AutoGenObject.SourceDir).lower()
>+for Dependency in FileDependencyDict.values():
>+for aFile in Dependency:
>+aFileName = str(aFile).lower()
>+if not aFileName.endswith('.h'):
>+continue
>+if aFileName in localAutoGenFileSet:
>+continue
>+if localSourceDir not in aFileName:
>+continue
>+headerFileDependencySet.add(aFileName)
>+
>+# Check if a module dependency header file is missing from the 
>module's
>MetaFile
>+for aFile in headerFileDependencySet:
>+if aFile in headerFilesInMetaFileSet:
>+continue
>+EdkLogger.warn("build","Module MetaFile [Sources] is missing local
>header!",
>+ExtraData = "Local Header: " + aFile + " not found in 
>" +
>self._AutoGenObject.MetaFile.Path
>+)
>+
> DepSet = None
> for File,Dependency in FileDependencyDict.items():
> if not Dependency:
>--
>2.19.1.windows.1
>
>
>


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41616): https://edk2.groups.io/g/devel/message/41616
Mute This Topic: https://groups.io/mt/31833976/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property

2019-05-29 Thread Leif Lindholm
On Wed, May 29, 2019 at 02:50:19PM +0200, Ard Biesheuvel wrote:
> As opposed to the Secure96's I2C peripherals, whose bus addresses are
> properties of the peripherals themselves, the SPI CS address of the
> TPM is a property of the platform that incorporates the LS connector.
> 
> So tweak the macros that emit the CS values and related properties
> to put it under the control of the platform that incorporates the
> driver.
> 
> Signed-off-by: Ard Biesheuvel 
> ---
>  Platform/96Boards/Secure96Dxe/Secure96.dts |  2 +-
>  Platform/96Boards/Secure96Dxe/Secure96.h   | 11 ---
>  2 files changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts 
> b/Platform/96Boards/Secure96Dxe/Secure96.dts
> index d066fcb1933c..0d7d9b3900a4 100644
> --- a/Platform/96Boards/Secure96Dxe/Secure96.dts
> +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
> @@ -39,7 +39,7 @@
>  __overlay__ {
>  INFINEON_SLB9670_DT_NODENAME {
>  compatible = "infineon,slb9670";
> -reg = ;
> +reg = ;
>  spi-max-frequency = <2250>;
>  };
>  };
> diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h 
> b/Platform/96Boards/Secure96Dxe/Secure96.h
> index c34fc5eea046..1d8bf4159209 100644
> --- a/Platform/96Boards/Secure96Dxe/Secure96.h
> +++ b/Platform/96Boards/Secure96Dxe/Secure96.h
> @@ -1,6 +1,6 @@
>  /** @file
>  
> -  Copyright (c) 2018, Linaro, Ltd. All rights reserved.
> +  Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.
>  
>SPDX-License-Identifier: BSD-2-Clause-Patent
>  **/
> @@ -8,14 +8,19 @@
>  #ifndef _SECURE96_H_
>  #define _SECURE96_H_
>  
> +#define __CONCAT(a,b)   a ## b
> +

Urgh. We badly need to properly add some official macros for this.
You could possibly use __CONCATENATE from Base.h.

For new macros, we really should avoid leading _.

/
Leif

>  #define ATSHA204A_SLAVE_ADDRESS 0x60
>  #define ATSHA204A_DT_NODENAME   atsha204a@60
>  
>  #define ATECC508A_SLAVE_ADDRESS 0x51
>  #define ATECC508A_DT_NODENAME   atecc508a@51
>  
> -#define INFINEON_SLB9670_SPI_CS 0x0
> -#define INFINEON_SLB9670_DT_NODENAMEtpm@0
> +#define INFINEON_SLB9670_DT_NODENAME__CONCAT(tpm@,SECURE96_SPI0_CS)
> +
> +#ifndef SECURE96_SPI0_CS
> +#define SECURE96_SPI0_CS0
> +#endif
>  
>  #ifndef SECURE96_ACPI_GPIO
>  #define SECURE96_ACPI_GPIO  "\\_SB.GPIO"
> -- 
> 2.20.1
> 
> 
> 
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41613): https://edk2.groups.io/g/devel/message/41613
Mute This Topic: https://groups.io/mt/31833223/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH edk2-platforms 3/5] Platform/Secure96Dxe: redefine LS connector CS as platform property

2019-05-29 Thread Ard Biesheuvel
As opposed to the Secure96's I2C peripherals, whose bus addresses are
properties of the peripherals themselves, the SPI CS address of the
TPM is a property of the platform that incorporates the LS connector.

So tweak the macros that emit the CS values and related properties
to put it under the control of the platform that incorporates the
driver.

Signed-off-by: Ard Biesheuvel 
---
 Platform/96Boards/Secure96Dxe/Secure96.dts |  2 +-
 Platform/96Boards/Secure96Dxe/Secure96.h   | 11 ---
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts 
b/Platform/96Boards/Secure96Dxe/Secure96.dts
index d066fcb1933c..0d7d9b3900a4 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.dts
+++ b/Platform/96Boards/Secure96Dxe/Secure96.dts
@@ -39,7 +39,7 @@
 __overlay__ {
 INFINEON_SLB9670_DT_NODENAME {
 compatible = "infineon,slb9670";
-reg = ;
+reg = ;
 spi-max-frequency = <2250>;
 };
 };
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h 
b/Platform/96Boards/Secure96Dxe/Secure96.h
index c34fc5eea046..1d8bf4159209 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.h
+++ b/Platform/96Boards/Secure96Dxe/Secure96.h
@@ -1,6 +1,6 @@
 /** @file
 
-  Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+  Copyright (c) 2018-2019, Linaro, Ltd. All rights reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -8,14 +8,19 @@
 #ifndef _SECURE96_H_
 #define _SECURE96_H_
 
+#define __CONCAT(a,b)   a ## b
+
 #define ATSHA204A_SLAVE_ADDRESS 0x60
 #define ATSHA204A_DT_NODENAME   atsha204a@60
 
 #define ATECC508A_SLAVE_ADDRESS 0x51
 #define ATECC508A_DT_NODENAME   atecc508a@51
 
-#define INFINEON_SLB9670_SPI_CS 0x0
-#define INFINEON_SLB9670_DT_NODENAMEtpm@0
+#define INFINEON_SLB9670_DT_NODENAME__CONCAT(tpm@,SECURE96_SPI0_CS)
+
+#ifndef SECURE96_SPI0_CS
+#define SECURE96_SPI0_CS0
+#endif
 
 #ifndef SECURE96_ACPI_GPIO
 #define SECURE96_ACPI_GPIO  "\\_SB.GPIO"
-- 
2.20.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41610): https://edk2.groups.io/g/devel/message/41610
Mute This Topic: https://groups.io/mt/31833223/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH edk2-platforms 2/5] Silicon/SynQuacer: add ACPI description of second SPI controller

2019-05-29 Thread Ard Biesheuvel
The primary SPI controller on SynQuacer is reserved for the NOR
flash, and is not exposed to the OS. The second SPI controller is
wired to the low speed 96boards connector on DeveloperBox, and so
in order to use it, we must describe it to the OS (like we already
do in the device tree). So add the description to the DSDT as well.

Signed-off-by: Ard Biesheuvel 
---
 Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl  | 19 
+++
 Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h |  4 
 2 files changed, 23 insertions(+)

diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl 
b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index c8d8120d262a..f6ff3988aa91 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -251,5 +251,24 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", 
"SYNQUACR",
 Device (PWRB) {
   Name (_HID, "PNP0C0C")
 }
+
+Device (SPI0) {
+  Name (_HID, "SCX0004")
+  Name (_UID, Zero)
+  Name (_CRS, ResourceTemplate () {
+Memory32Fixed (ReadWrite, SYNQUACER_SPI1_BASE, SYNQUACER_SPI1_SIZE)
+Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 192, 193, 
194 }
+  })
+
+  Name (_DSD, Package ()  // _DSD: Device-Specific Data
+  {
+ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+Package () {
+  Package (2) { "socionext,ihclk-rate", 12500 },
+  Package (2) { "socionext,use-rtm", 1 },
+  Package (2) { "socionext,set-aces", 1 },
+}
+  })
+}
   } // Scope (_SB)
 }
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h 
b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
index deb9c81e82e6..29c5f73f2057 100644
--- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
@@ -78,4 +78,8 @@
 #define SYNQUACER_UART1_BASE0x5104
 #define SYNQUACER_UART1_SIZESIZE_4KB
 
+// SPI controller #1
+#define SYNQUACER_SPI1_BASE 0x5481
+#define SYNQUACER_SPI1_SIZE SIZE_4KB
+
 #endif
-- 
2.20.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41609): https://edk2.groups.io/g/devel/message/41609
Mute This Topic: https://groups.io/mt/31833222/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH edk2-platforms 4/5] Platform/Secure96Dxe: add TPM description to SSDT

2019-05-29 Thread Ard Biesheuvel
Add a description of the Secure96's TPM over SPI to the SSDT that
is exposed to the OS by the Secure96Dxe driver.

Signed-off-by: Ard Biesheuvel 
---
 Platform/96Boards/Secure96Dxe/Secure96.asl | 12 
 Platform/96Boards/Secure96Dxe/Secure96.h   |  4 
 2 files changed, 16 insertions(+)

diff --git a/Platform/96Boards/Secure96Dxe/Secure96.asl 
b/Platform/96Boards/Secure96Dxe/Secure96.asl
index 4018d437246f..64b6e3b2adbe 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.asl
+++ b/Platform/96Boards/Secure96Dxe/Secure96.asl
@@ -105,5 +105,17 @@ DefinitionBlock ("Secure96.aml", "SSDT", 2, "96BRDS", 
"SECURE96", 1)
 I2CSerialBus (ATECC508A_SLAVE_ADDRESS,, 10,, 
SECURE96_ACPI_I2C0)
 })
 }
+
+Device (TP96)
+{
+Name (_ADR, SECURE96_SPI0_CS)
+Name (_CID, "SMO0768")
+Name (_CRS, ResourceTemplate() {
+SpiSerialBus (SECURE96_SPI0_CS, PolarityLow, FourWireMode,
+  8, ControllerInitiated, 500, 
ClockPolarityLow,
+  ClockPhaseFirst, SECURE96_ACPI_SPI0, 0,
+  ResourceConsumer)
+})
+}
 }
 }
diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h 
b/Platform/96Boards/Secure96Dxe/Secure96.h
index 1d8bf4159209..231d8a47ef7b 100644
--- a/Platform/96Boards/Secure96Dxe/Secure96.h
+++ b/Platform/96Boards/Secure96Dxe/Secure96.h
@@ -30,4 +30,8 @@
 #define SECURE96_ACPI_I2C0  "\\_SB.I2C0"
 #endif
 
+#ifndef SECURE96_ACPI_SPI0
+#define SECURE96_ACPI_SPI0  "\\_SB.SPI0"
+#endif
+
 #endif // _SECURE96_H_
-- 
2.20.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41611): https://edk2.groups.io/g/devel/message/41611
Mute This Topic: https://groups.io/mt/31833224/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH edk2-platforms 0/5] SynQuacer SPI/TPM support

2019-05-29 Thread Ard Biesheuvel
This is the first part of a set of changes to support the Secure96
TPM on SynQuacer. This part only concerns usage by the OS of the TPM,
i.e., exposing the SPI controller and TPM peripherals correctly via
DT and ACPI.

Wiring up the TPM into UEFI requires more intrusive changes, and this
is a work in progress.

Note that patch #5 is only included for reference - it adds AML code
to reset the TPM when the device is probed via ACPI. This is necessary
since the firmware does not touch the TPM at all.

Ard Biesheuvel (5):
  Silicon/SynQuacer: add missing SPI controller interrupt lines to DT
  Silicon/SynQuacer: add ACPI description of second SPI controller
  Platform/Secure96Dxe: redefine LS connector CS as platform property
  Platform/Secure96Dxe: add TPM description to SSDT
  DO NOT MERGE - temporary hack to reset the TPM at probe time

 Platform/96Boards/Secure96Dxe/Secure96.asl   | 12 ++
 Platform/96Boards/Secure96Dxe/Secure96.dts   |  2 +-
 Platform/96Boards/Secure96Dxe/Secure96.h | 15 ++--
 Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl  | 40 

 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi|  3 ++
 Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h |  4 ++
 6 files changed, 72 insertions(+), 4 deletions(-)

-- 
2.20.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41607): https://edk2.groups.io/g/devel/message/41607
Mute This Topic: https://groups.io/mt/31833220/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH edk2-platforms 1/5] Silicon/SynQuacer: add missing SPI controller interrupt lines to DT

2019-05-29 Thread Ard Biesheuvel
Update the DT description of the second SPI controller with the TX,
RX and fault interrupt lines as they are assigned on SynQuacer.

Signed-off-by: Ard Biesheuvel 
---
 Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi 
b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index 8559b5b329a7..f124a223816f 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -545,6 +545,9 @@
 spi: spi@5481 {
 compatible = "socionext,synquacer-spi";
 reg = <0x0 0x5481 0x0 0x1000>;
+interrupts = ,
+ ,
+ ;
 clocks = <_alw_1_8>;
 clock-names = "iHCLK";
 socionext,use-rtm;
-- 
2.20.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41608): https://edk2.groups.io/g/devel/message/41608
Mute This Topic: https://groups.io/mt/31833221/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH 1/4] MdeModulePkg: Add SERIAL_DXE_FILE_GUID

2019-05-29 Thread Anthony PERARD
SERIAL_DXE_FILE_GUID is used in different places, create a single
define that other can use.

Suggested-by: Laszlo Ersek 
Signed-off-by: Anthony PERARD 
---

Notes:
Suggested in: Message-ID: <7d6adf5d-baca-7e9c-68ef-2f8479bbd...@redhat.com>

 MdeModulePkg/MdeModulePkg.dec |  3 +++
 MdeModulePkg/Include/Guid/SerialDxe.h | 19 +++
 2 files changed, 22 insertions(+)
 create mode 100644 MdeModulePkg/Include/Guid/SerialDxe.h

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 6cba729982..6c5736618e 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -396,6 +396,9 @@ [Guids]
   ## Include/Guid/S3StorageDeviceInitList.h
   gS3StorageDeviceInitListGuid = { 0x310e9b8c, 0xcf90, 0x421e, { 0x8e, 0x9b, 
0x9e, 0xef, 0xb6, 0x17, 0xc8, 0xef } }
 
+  ## Include/Guid/SerialDxe.h
+  gSerialDxeFileGuid = { 0xD3987D4B, 0x971A, 0x435F, { 0x8C, 0xAF, 0x49, 0x67, 
0xEB, 0x62, 0x72, 0x41 } }
+
 [Ppis]
   ## Include/Ppi/AtaController.h
   gPeiAtaControllerPpiGuid   = { 0xa45e60d1, 0xc719, 0x44aa, { 0xb0, 0x7a, 
0xaa, 0x77, 0x7f, 0x85, 0x90, 0x6d }}
diff --git a/MdeModulePkg/Include/Guid/SerialDxe.h 
b/MdeModulePkg/Include/Guid/SerialDxe.h
new file mode 100644
index 00..4d53f4877f
--- /dev/null
+++ b/MdeModulePkg/Include/Guid/SerialDxe.h
@@ -0,0 +1,19 @@
+/** @file
+  Define the SerialDxe GUID.
+
+  Copyright (c) 2019, Citrix Systems, Inc.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef __SERIAL_DXE_H__
+#define __SERIAL_DXE_H__
+
+#define SERIAL_DXE_FILE_GUID { \
+  0xD3987D4B, 0x971A, 0x435F, \
+  { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
+  }
+
+extern EFI_GUID gSerialDxeFileGuid;
+
+#endif // __SERIAL_DXE_H__
-- 
Anthony PERARD


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41603): https://edk2.groups.io/g/devel/message/41603
Mute This Topic: https://groups.io/mt/31832610/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH 4/4] UefiPayloadPkg/PlatformBootManagerLib: Use SERIAL_DXE_FILE_GUID from MdeModulePkg

2019-05-29 Thread Anthony PERARD
SERIAL_DXE_FILE_GUID is now defined in MdeModulePkg, simply use it.

Signed-off-by: Anthony PERARD 
---
 .../Library/PlatformBootManagerLib/PlatformConsole.c   | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c 
b/UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c
index 80a11d7451..b7c36f37d1 100644
--- a/UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c
+++ b/UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c
@@ -8,6 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 
 #include "PlatformBootManager.h"
 #include "PlatformConsole.h"
+#include 
 
 #define PCI_DEVICE_PATH_NODE(Func, Dev) \
   { \
@@ -53,7 +54,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
   } \
 }, \
-{0xD3987D4B, 0x971A, 0x435F, {0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 
0x41}} \
+SERIAL_DXE_FILE_GUID \
   }
 
 #define gUart \
-- 
Anthony PERARD


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41604): https://edk2.groups.io/g/devel/message/41604
Mute This Topic: https://groups.io/mt/31832611/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH 2/4] ArmVirtPkg/PlatformBootManagerLib: Use SERIAL_DXE_FILE_GUID from MdeModulePkg

2019-05-29 Thread Anthony PERARD
SERIAL_DXE_FILE_GUID is now defined in MdeModulePkg, simply use it.

Signed-off-by: Anthony PERARD 
---
 ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c 
b/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c
index b8f50ea96b..d7697c93c3 100644
--- a/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "PlatformBm.h"
 
@@ -41,11 +42,6 @@ typedef struct {
 } PLATFORM_SERIAL_CONSOLE;
 #pragma pack ()
 
-#define SERIAL_DXE_FILE_GUID { \
-  0xD3987D4B, 0x971A, 0x435F, \
-  { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
-  }
-
 STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
   //
   // VENDOR_DEVICE_PATH SerialDxe
-- 
Anthony PERARD


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41602): https://edk2.groups.io/g/devel/message/41602
Mute This Topic: https://groups.io/mt/31832609/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH 0/4] Define SERIAL_DXE_FILE_GUID only once

2019-05-29 Thread Anthony PERARD
The macro SERIAL_DXE_FILE_GUID is already been defined twice and the GUID is
been used once without defining the macro. This patch series define the macro
in MdeModulePkg where the SerialDxe is, and replace all other use by this new
one.

Note that I haven't build/test those changes, but I have test the first patch
by applying a similar change to a patch series I'm working on.

Patch series available in this git branch:
https://xenbits.xen.org/git-http/people/aperard/ovmf.git br.serial-dxe-guid-v1

Anthony PERARD (4):
  MdeModulePkg: Add SERIAL_DXE_FILE_GUID
  ArmVirtPkg/PlatformBootManagerLib: Use SERIAL_DXE_FILE_GUID from
MdeModulePkg
  ArmPkg/PlatformBootManagerLib: Use SERIAL_DXE_FILE_GUID from
MdeModulePkg
  UefiPayloadPkg/PlatformBootManagerLib: Use SERIAL_DXE_FILE_GUID from
MdeModulePkg

 MdeModulePkg/MdeModulePkg.dec |  3 +++
 MdeModulePkg/Include/Guid/SerialDxe.h | 19 +++
 .../PlatformBootManagerLib/PlatformBm.c   |  6 +-
 .../PlatformBootManagerLib/PlatformBm.c   |  6 +-
 .../PlatformBootManagerLib/PlatformConsole.c  |  3 ++-
 5 files changed, 26 insertions(+), 11 deletions(-)
 create mode 100644 MdeModulePkg/Include/Guid/SerialDxe.h

-- 
Anthony PERARD


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41606): https://edk2.groups.io/g/devel/message/41606
Mute This Topic: https://groups.io/mt/31832613/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] Maintainers.txt: update mailing list information

2019-05-29 Thread Leif Lindholm
On Tue, May 28, 2019 at 02:03:26PM +0200, Laszlo Ersek wrote:
> On 05/28/19 12:22, Leif Lindholm wrote:
> > The devel mailing list has moved from 01.org to groups.io - update
> > the mailing list information to reflect this.
> > 
> > Signed-off-by: Leif Lindholm 
> > ---
> >  Maintainers.txt | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/Maintainers.txt b/Maintainers.txt
> > index aaabe2b52d..f3ce5edd8a 100644
> > --- a/Maintainers.txt
> > +++ b/Maintainers.txt
> > @@ -40,7 +40,7 @@ Descriptions of section entries:
> >  EDK II
> >  --
> >  W: http://www.tianocore.org/edk2/
> > -L: https://lists.01.org/mailman/listinfo/edk2-devel
> > +L: https://edk2.groups.io/g/devel/
> >  T: git - https://github.com/tianocore/edk2.git
> >  T: git (mirror) - https://bitbucket.org/tianocore/edk2.git
> >  T: svn (read-only, deprecated) - 
> > https://svn.code.sf.net/p/edk2/code/trunk/edk2
> > 
> 
> Reviewed-by: Laszlo Ersek 

Thanks - pushed as 5a9e23ceb9.

/
Leif

> 
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41601): https://edk2.groups.io/g/devel/message/41601
Mute This Topic: https://groups.io/mt/31820038/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH v2] BaseTools:Extend the binary cache to support library cache

2019-05-29 Thread Leif Lindholm
On Wed, May 29, 2019 at 09:46:54AM +0800, Steven Shi wrote:
> V2 change:
> Simplify the library cache implementation and remove
> CacheRestored flag based filter. Use the current
> CanSkipbyHash() filter in AddDependency() instead.
> 
> V1 change:

Please don't put change notices in the commit message. These go below
---, or in a cover letter.

/
Leif

> 
> https://bugzilla.tianocore.org/show_bug.cgi?id=1797
> 
> Current binary cache doesn't support to save and restore
> the library module. If a driver module cache miss happen,
> all its dependency library modules need rebuild which
> is very time-consuming. This patch is to entend the binary
> cache to support library.
> 
> Cc: Liming Gao 
> Cc: Bob Feng 
> Cc: Christian Rodriguez 
> Signed-off-by: Steven Shi 
> ---
>  BaseTools/Source/Python/AutoGen/AutoGen.py | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
> b/BaseTools/Source/Python/AutoGen/AutoGen.py
> index a5bef4f7c6..7b35f837f5 100644
> --- a/BaseTools/Source/Python/AutoGen/AutoGen.py
> +++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
> @@ -3906,6 +3906,12 @@ class ModuleAutoGen(AutoGen):
>  ModuleFile = path.join(self.OutputDir, self.Name + '.inf')
>  if os.path.exists(ModuleFile):
>  shutil.copy2(ModuleFile, FileDir)
> +else:
> +OutputDir = self.OutputDir.replace('\\', '/').strip('/')
> +DebugDir = self.DebugDir.replace('\\', '/').strip('/')
> +for Item in self.CodaTargetList:
> +File = Item.Target.Path.replace('\\', 
> '/').strip('/').replace(DebugDir, '').replace(OutputDir, '').strip('/')
> +self.OutputFile.add(File)
>  if not self.OutputFile:
>  Ma = self.BuildDatabase[self.MetaFile, self.Arch, 
> self.BuildTarget, self.ToolChain]
>  self.OutputFile = Ma.Binaries
> -- 
> 2.17.1.windows.2
> 
> 
> 
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41600): https://edk2.groups.io/g/devel/message/41600
Mute This Topic: https://groups.io/mt/31829360/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] MdeModulePkg/CapsulePei: Optimize the CapsulePei

2019-05-29 Thread Leif Lindholm
On Wed, May 29, 2019 at 08:45:55AM +0800, Gao, Zhichao wrote:
> From: Bret Barkelew 

If this code is from Microsoft...

> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1853
> 
> Sperate the capsule check function from GetCapsuleDescriptors
> and name it to AreCapsulesStaged.
> Rename GetCapsuleDescriptors to GetScatterGatherHeadEntries.
> And optimize its to remove the duplicated code.
> 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Cc: Ray Ni 
> Cc: Star Zeng 
> Cc: Liming Gao 
> Cc: Sean Brogan 
> Cc: Michael Turner 
> Cc: Bret Barkelew 
> Signed-off-by: Zhichao gao 
> ---
>  MdeModulePkg/Universal/CapsulePei/Capsule.h   |   3 +-
>  .../Universal/CapsulePei/CapsulePei.inf   |   3 +-
>  .../Universal/CapsulePei/UefiCapsule.c| 357 ++
>  3 files changed, 194 insertions(+), 169 deletions(-)
> 
> diff --git a/MdeModulePkg/Universal/CapsulePei/Capsule.h 
> b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> index baf40423af..fc20dd8b92 100644
> --- a/MdeModulePkg/Universal/CapsulePei/Capsule.h
> +++ b/MdeModulePkg/Universal/CapsulePei/Capsule.h
> @@ -1,6 +1,6 @@
>  /** @file
>  
> -Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> +Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
>  
>  SPDX-License-Identifier: BSD-2-Clause-Patent
>  
> @@ -30,6 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include "Common/CommonHeader.h"
>  
> diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf 
> b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> index 5d43df3075..9c88b3986f 100644
> --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> @@ -6,7 +6,7 @@
>  #  This external input must be validated carefully to avoid security issue 
> like
>  #  buffer overflow, integer overflow.
>  #
> -# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.

...why does Intel get the copyright?

/
Leif

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41599): https://edk2.groups.io/g/devel/message/41599
Mute This Topic: https://groups.io/mt/31828852/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH] Marvell/Armada80x0McBin: Enable usb keyboard, nvme boot

2019-05-29 Thread Leif Lindholm
On Tue, May 28, 2019 at 06:43:13PM -0500, Jeremy Linton wrote:
> Add a USB keyboard flag, which is needed when a graphical console
> is enabled. Also add a nvme boot option for users that choose
> that instead of sata or mmc.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1

Just a note in case you had missed:
We are transitioning the licensing of edk2-platforms to
https://spdx.org/licenses/BSD-2-Clause-Patent
(As of yesterday) we have approval from Marvell to relicense these
files, so future contributions won't need the Contributed-under.
(This one does, though.)

> Signed-off-by: Jeremy Linton 

Reviewed-by: Leif Lindholm 

However, the patch is garbled (lines broken and '=20' all over the
place). Could you have a look at your email setup or point me at a
(public) remote tree?

(It's possible your mail server will stop playing silly if you strip
the CRs - and SMTP eats those anyway, so I have a script to add them
back in.)

((It's also possible it's groups.io that's messing things up - you
could work around that by cc:ing me :))

/
Leif

> ---
>  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 3 +++
>  Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 2 ++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc 
> b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> index 27e52f5af5..89d617fde4 100644
> --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> @@ -90,6 +90,7 @@
>
> UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
>
> UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
>UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
> +  UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
>  
>PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
>  
> @@ -505,6 +506,7 @@
>MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
>MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
>MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
> +  MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
>  
># SD/MMC
>MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
> @@ -516,6 +518,7 @@
>ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
>MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> +  MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
>  
># Console packages
>MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf 
> b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> index 47e3bc4f82..f59cc1f263 100644
> --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> @@ -151,6 +151,7 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
>INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
>INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
>INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
> +  INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
>  
># SD/MMC
>INF MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
> @@ -162,6 +163,7 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
>INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
>INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
>INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
> +  INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
>  
># Multiple Console IO support
>INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> -- 
> 2.13.7
> 
> 
> 
> 

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41598): https://edk2.groups.io/g/devel/message/41598
Mute This Topic: https://groups.io/mt/31828270/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH edk2-platforms 3/3] Maintainers.txt: add reviewer for Marvell platforms

2019-05-29 Thread Leif Lindholm
On Tue, 28 May 2019 at 11:24, Marcin Wojtas  wrote:
>
> Hi Leif,
>
> wt., 28 maj 2019 o 12:20 Leif Lindholm 
napisał(a):
> >
> > Marcin is the author of the majority of the Marvell platform support in
> > the tree, so clarify that he should be cc:d on patches to Marvell Armada
> > SoC/Boards and MacchiatoBIN.
> >
> > Cc: Marcin Wojtas 
> > Signed-off-by: Leif Lindholm 
> > ---
> >  Maintainers.txt | 9 +
> >  1 file changed, 9 insertions(+)
> >
> > diff --git a/Maintainers.txt b/Maintainers.txt
> > index 778eec6fed..54c98e3b22 100644
> > --- a/Maintainers.txt
> > +++ b/Maintainers.txt
> > @@ -86,6 +86,12 @@ M: Shifei A Lu 
> >  M: Xiaohu Zhou 
> >  M: Isaac W Oram 
> >
> > +Platform/Marvell
> > +R: Marcin Wojtas 
> > +
> > +Platform/SolidRun/Armada80x0McBin
> > +R: Marcin Wojtas 
> > +
> >  Silicon
> >  M: Ard Biesheuvel 
> >  M: Leif Lindholm 
> > @@ -118,3 +124,6 @@ Silicon/Intel/PurleySktPkg
> >  M: Gillispie, Thad 
> >  M: Bu, Daocheng 
> >  M: Oram, Isaac W 
> > +
> > +Silicon/Marvell
> > +R: Marcin Wojtas 
> > --
>
> Thank you for the patch, I will be happy to get it merged.

Thanks! And thanks Ard.

Series pushed as 22d5f49913..c587c76bec

/
Leif

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41597): https://edk2.groups.io/g/devel/message/41597
Mute This Topic: https://groups.io/mt/31820030/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v5 9/9] CryptoPkg/BaseCryptLib: Make HMAC_CTX size backward compatible

2019-05-29 Thread Xiaoyu Lu
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

OpenSSL internally redefines the size of HMAC_CTX at
crypto/hmac/hmac_lcl.h(OpenSSL commit e0810e35).
Ref: https://github.com/openssl/openssl/pull/4338

We should not use it directly and should remove relevant
functions(Hmac*GetContextSize).
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1792

But for compatiblility, temporarily change these definition
of HMAC_*_CTX_SIZE.

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Reviewed-by: Laszlo Ersek 
Tested-by: Gary Lin 
---
 CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacMd5.c| 8 ++--
 CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha1.c   | 9 +++--
 CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha256.c | 8 ++--
 3 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacMd5.c 
b/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacMd5.c
index 3134806797f8..19e9fbeae66f 100644
--- a/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacMd5.c
+++ b/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacMd5.c
@@ -9,8 +9,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include "InternalCryptLib.h"
 #include 
 
-#define HMAC_MD5_CTX_SIZEsizeof(void *) * 4 + sizeof(unsigned int) + \
- sizeof(unsigned char) * HMAC_MAX_MD_CBLOCK
+//
+// NOTE: OpenSSL redefines the size of HMAC_CTX at crypto/hmac/hmac_lcl.h
+//   #define HMAC_MAX_MD_CBLOCK_SIZE 144
+//
+#define HMAC_MD5_CTX_SIZE(sizeof(void *) * 4 + sizeof(unsigned int) + \
+ sizeof(unsigned char) * 144)
 
 /**
   Retrieves the size, in bytes, of the context buffer required for HMAC-MD5 
operations.
diff --git a/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha1.c 
b/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha1.c
index bbe3df4d4f70..7d7df9640e7f 100644
--- a/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha1.c
+++ b/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha1.c
@@ -9,8 +9,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include "InternalCryptLib.h"
 #include 
 
-#define HMAC_SHA1_CTX_SIZE   sizeof(void *) * 4 + sizeof(unsigned int) + \
- sizeof(unsigned char) * HMAC_MAX_MD_CBLOCK
+//
+// NOTE: OpenSSL redefines the size of HMAC_CTX at crypto/hmac/hmac_lcl.h
+//   #define HMAC_MAX_MD_CBLOCK_SIZE 144
+//
+//
+#define  HMAC_SHA1_CTX_SIZE   (sizeof(void *) * 4 + sizeof(unsigned int) + \
+ sizeof(unsigned char) * 144)
 
 /**
   Retrieves the size, in bytes, of the context buffer required for HMAC-SHA1 
operations.
diff --git a/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha256.c 
b/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha256.c
index ac9084fa850d..f24443e74552 100644
--- a/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha256.c
+++ b/CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacSha256.c
@@ -9,8 +9,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include "InternalCryptLib.h"
 #include 
 
-#define HMAC_SHA256_CTX_SIZE   sizeof(void *) * 4 + sizeof(unsigned int) + \
-   sizeof(unsigned char) * HMAC_MAX_MD_CBLOCK
+//
+// NOTE: OpenSSL redefines the size of HMAC_CTX at crypto/hmac/hmac_lcl.h
+//   #define HMAC_MAX_MD_CBLOCK_SIZE 144
+//
+#define HMAC_SHA256_CTX_SIZE(sizeof(void *) * 4 + sizeof(unsigned int) + \
+ sizeof(unsigned char) * 144)
 
 /**
   Retrieves the size, in bytes, of the context buffer required for HMAC-SHA256 
operations.
-- 
2.7.4


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41596): https://edk2.groups.io/g/devel/message/41596
Mute This Topic: https://groups.io/mt/31832290/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v5 7/9] CryptoPkg/OpensslLib: Add functions for upgrading OpenSSL1_1_1b

2019-05-29 Thread Xiaoyu Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

* From OpenSSL_1_1_0i(97c0959f27b294fe1eb10b547145ebef2524b896) to
  OpenSSL_1_1_1b(50eaac9f3337667259de725451f201e784599687), OpenSSL
  updated DRBG / RAND to request nonce and additional low entropy
  randomness from system(line 229 openssl/CHANGES).

  Since OpenSSL_1_1_1b doesn't fully implement rand pool functions
  for UEFI. We must provide a method to implenet these method.
  TSC is used as first entropy source if it's availabe otherwise
  fallback to TimerLib. But we are not sure the amount of randomness
  they provide. If you really care about the security, one choice is
  overrided it with hardware generator.

  Add rand_pool.c to implement these functions required by OpenSSL
rand_pool_acquire_entropy
rand_pool_add_nonce_data
rand_pool_add_additional_data
rand_pool_init
rand_pool_cleanup
rand_pool_keep_random_devices_open

  And add rand_pool_noise.* for getting entropy noise from different
  architecture.

* We don't need ossl_store functions. We exclude relative files
  through process_files.pl. And ossl_store_cleanup_int was first
  added in crypto/init.c OpenSSL_1_1_1(71a5516d).
  So add a new file(ossl_store.c) to implement ossl_store_cleanup_int
  function.

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Tested-by: Gary Lin 
---
 CryptoPkg/Library/OpensslLib/rand_pool_noise.h |  29 ++
 CryptoPkg/Library/OpensslLib/ossl_store.c  |  17 ++
 CryptoPkg/Library/OpensslLib/rand_pool.c   | 316 +
 CryptoPkg/Library/OpensslLib/rand_pool_noise.c |  29 ++
 CryptoPkg/Library/OpensslLib/rand_pool_noise_tsc.c |  43 +++
 5 files changed, 434 insertions(+)
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise.h
 create mode 100644 CryptoPkg/Library/OpensslLib/ossl_store.c
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool.c
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise.c
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise_tsc.c

diff --git a/CryptoPkg/Library/OpensslLib/rand_pool_noise.h 
b/CryptoPkg/Library/OpensslLib/rand_pool_noise.h
new file mode 100644
index ..75acc686a9f1
--- /dev/null
+++ b/CryptoPkg/Library/OpensslLib/rand_pool_noise.h
@@ -0,0 +1,29 @@
+/** @file
+  Provide rand noise source.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __RAND_POOL_NOISE_H__
+#define __RAND_POOL_NOISE_H__
+
+#include 
+
+/**
+   Get 64-bit noise source.
+
+   @param[out] Rand Buffer pointer to store 64-bit noise source
+
+   @retval TRUE Get randomness successfully.
+   @retval FALSEFailed to generate
+**/
+BOOLEAN
+EFIAPI
+GetRandomNoise64 (
+  OUT UINT64 *Rand
+  );
+
+
+#endif // __RAND_POOL_NOISE_H__
diff --git a/CryptoPkg/Library/OpensslLib/ossl_store.c 
b/CryptoPkg/Library/OpensslLib/ossl_store.c
new file mode 100644
index ..29e1506048e3
--- /dev/null
+++ b/CryptoPkg/Library/OpensslLib/ossl_store.c
@@ -0,0 +1,17 @@
+/** @file
+  Dummy implement ossl_store(Store retrieval functions) for UEFI.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/*
+ * This function is cleanup ossl store.
+ *
+ * Dummy Implement for UEFI
+ */
+void ossl_store_cleanup_int(void)
+{
+}
+
diff --git a/CryptoPkg/Library/OpensslLib/rand_pool.c 
b/CryptoPkg/Library/OpensslLib/rand_pool.c
new file mode 100644
index ..9d2a4ad13823
--- /dev/null
+++ b/CryptoPkg/Library/OpensslLib/rand_pool.c
@@ -0,0 +1,316 @@
+/** @file
+  OpenSSL_1_1_1b doesn't implement rand_pool_* functions for UEFI.
+  The file implement these functions.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "internal/rand_int.h"
+#include 
+
+#include 
+#include 
+
+#include "rand_pool_noise.h"
+
+/**
+  Get some randomness from low-order bits of GetPerformanceCounter results.
+  And combine them to the 64-bit value
+
+  @param[out] RandBuffer pointer to store the 64-bit random value.
+
+  @retval TRUERandom number generated successfully.
+  @retval FALSE   Failed to generate.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+GetRandNoise64FromPerformanceCounter(
+  OUT UINT64  *Rand
+  )
+{
+  UINT32 Index;
+  UINT32 *RandPtr;
+
+  if (NULL == Rand) {
+return FALSE;
+  }
+
+  RandPtr = (UINT32 *) Rand;
+
+  for (Index = 0; Index < 2; Index ++) {
+*RandPtr = (UINT32) (GetPerformanceCounter () & 0xFF);
+MicroSecondDelay (10);
+RandPtr++;
+  }
+
+  return TRUE;
+}
+
+/**
+  Calls RandomNumber64 to fill
+  a buffer of arbitrary size with random bytes.
+
+  @param[in]   LengthSize of the buffer, in bytes,  to fill with.
+  @param[out]  RandBufferPointer to the buffer to store the random result.
+
+  @retval EFI_SUCCESSRandom bytes generation succeeded.
+  

[edk2-devel] [PATCH v5 3/9] CryptoPkg/IntrinsicLib: Fix possible unresolved external symbol issue

2019-05-29 Thread Xiaoyu Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

This is for the upcoming upgrade to OpenSSL_1_1_1b

Compiler optimization(Visual Studio) may automatically use _ftol2
instead of some type conversion. For example:

 OpensslLib.lib(drbg_lib.obj) : error LNK2001:
unresolved external symbol __ftol2

This patch add _ftol2 function for the compiler intrinsic.

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Tested-by: Gary Lin 
---
 CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf |  4 +++-
 CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c  | 22 ++
 2 files changed, 25 insertions(+), 1 deletion(-)
 create mode 100644 CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c

diff --git a/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf 
b/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
index 5a20967b6cb8..fcbb93316cf7 100644
--- a/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+++ b/CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Intrinsic Routines Wrapper Library Instance.
 #
-#  Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -29,9 +29,11 @@ [Sources.IA32]
 
   Ia32/MathLShiftS64.c  | MSFT
   Ia32/MathRShiftU64.c  | MSFT
+  Ia32/MathFtol.c   | MSFT
 
   Ia32/MathLShiftS64.c  | INTEL
   Ia32/MathRShiftU64.c  | INTEL
+  Ia32/MathFtol.c   | INTEL
 
   Ia32/MathLShiftS64.nasm   | GCC
   Ia32/MathRShiftU64.nasm   | GCC
diff --git a/CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c 
b/CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c
new file mode 100644
index ..147a19a4adb0
--- /dev/null
+++ b/CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c
@@ -0,0 +1,22 @@
+/** @file
+  64-bit Math Worker Function.
+  The 32-bit versions of C compiler generate calls to library routines
+  to handle 64-bit math. These functions use non-standard calling conventions.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+/*
+ * Floating point to integer conversion.
+ */
+__declspec(naked) void _ftol2 (void)
+{
+  _asm {
+fistp qword ptr [esp-8]
+mov   edx, [esp-4]
+mov   eax, [esp-8]
+ret
+  }
+}
-- 
2.7.4


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41590): https://edk2.groups.io/g/devel/message/41590
Mute This Topic: https://groups.io/mt/31832283/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v5 5/9] CryptoPkg/OpensslLib: Fix cross-build problem for AARCH64

2019-05-29 Thread Xiaoyu Lu
From: Laszlo Ersek 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

Thanks Laszlo Ersek .
Ref: https://edk2.groups.io/g/devel/message/40375

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Reviewed-by: Laszlo Ersek 
---
 CryptoPkg/Library/Include/sys/syscall.h | 11 +++
 1 file changed, 11 insertions(+)
 create mode 100644 CryptoPkg/Library/Include/sys/syscall.h

diff --git a/CryptoPkg/Library/Include/sys/syscall.h 
b/CryptoPkg/Library/Include/sys/syscall.h
new file mode 100644
index ..ead0d7b9680d
--- /dev/null
+++ b/CryptoPkg/Library/Include/sys/syscall.h
@@ -0,0 +1,11 @@
+/** @file
+  Include file to support building the third-party cryptographic library.
+
+Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2019, Red Hat, Inc.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
-- 
2.7.4


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41592): https://edk2.groups.io/g/devel/message/41592
Mute This Topic: https://groups.io/mt/31832285/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v5 8/9] CryptoPkg: Upgrade OpenSSL to 1.1.1b

2019-05-29 Thread Xiaoyu Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

* Update OpenSSL submodule to OpenSSL_1_1_1b
   OpenSSL_1_1_1b(50eaac9f3337667259de725451f201e784599687)

* Run process_files.pl script to regenerate OpensslLib[Crypto].inf
  and opensslconf.h

* Remove -DNO_SYSLOG from OPENSSL_FLAGS in OpensslLib[Crypto].inf,
  due to upstream OpenSSL commit cff55b90e95e("Cleaning UEFI
  Build with additional OPENSSL_SYS_UEFI flags", 2017-03-29),
  which was first released as part of OpenSSL_1_1_1.

* Starting with OpenSSL commit 8a8d9e1905(first release in
  OpenSSL_1_1_1), the OpenSSL_version() function can no longer
  return a pointer to the string literal "compiler: information
  not available", in the case CFLAGS macro is not defined.
  Instead, the function now has a hard dependency on the global
  variable 'compiler_flags'. This variable is normally placed
  by "util/mkbuildinf.pl" into "buildinf.h". In edk2 we don't
  run that script whenever we build OpenSSL, therefore we
  must provide our own dummy 'compiler_flags'.

* BUFSIZ is used by crypto/evp/evp_key.c(OpenSSL_1_1_1b)
  And it is declared in stdio.h. So add it to CrtLibSupport.h.
  Here's a discussion about this.
  Ref: https://github.com/openssl/openssl/issues/8904

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Reviewed-by: Laszlo Ersek 
Tested-by: Gary Lin 
---
 CryptoPkg/Library/OpensslLib/OpensslLib.inf   | 60 +++
 CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 51 ---
 CryptoPkg/Library/Include/CrtLibSupport.h | 13 -
 CryptoPkg/Library/Include/openssl/opensslconf.h   | 54 ++--
 CryptoPkg/Library/OpensslLib/buildinf.h   |  2 +
 CryptoPkg/Library/OpensslLib/openssl  |  2 +-
 6 files changed, 150 insertions(+), 32 deletions(-)

diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf 
b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index ce04d441552f..39749518027c 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  This module provides OpenSSL Library implementation.
 #
-#  Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -15,7 +15,7 @@ [Defines]
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = OpensslLib
   DEFINE OPENSSL_PATH= openssl
-  DEFINE OPENSSL_FLAGS   = -DL_ENDIAN -DOPENSSL_SMALL_FOOTPRINT 
-D_CRT_SECURE_NO_DEPRECATE -D_CRT_NONSTDC_NO_DEPRECATE -DNO_SYSLOG
+  DEFINE OPENSSL_FLAGS   = -DL_ENDIAN -DOPENSSL_SMALL_FOOTPRINT 
-D_CRT_SECURE_NO_DEPRECATE -D_CRT_NONSTDC_NO_DEPRECATE
 
 #
 #  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64
@@ -32,6 +32,7 @@ [Sources]
   $(OPENSSL_PATH)/crypto/aes/aes_misc.c
   $(OPENSSL_PATH)/crypto/aes/aes_ofb.c
   $(OPENSSL_PATH)/crypto/aes/aes_wrap.c
+  $(OPENSSL_PATH)/crypto/aria/aria.c
   $(OPENSSL_PATH)/crypto/asn1/a_bitstr.c
   $(OPENSSL_PATH)/crypto/asn1/a_d2i_fp.c
   $(OPENSSL_PATH)/crypto/asn1/a_digest.c
@@ -54,6 +55,7 @@ [Sources]
   $(OPENSSL_PATH)/crypto/asn1/ameth_lib.c
   $(OPENSSL_PATH)/crypto/asn1/asn1_err.c
   $(OPENSSL_PATH)/crypto/asn1/asn1_gen.c
+  $(OPENSSL_PATH)/crypto/asn1/asn1_item_list.c
   $(OPENSSL_PATH)/crypto/asn1/asn1_lib.c
   $(OPENSSL_PATH)/crypto/asn1/asn1_par.c
   $(OPENSSL_PATH)/crypto/asn1/asn_mime.c
@@ -172,6 +174,7 @@ [Sources]
   $(OPENSSL_PATH)/crypto/conf/conf_ssl.c
   $(OPENSSL_PATH)/crypto/cpt_err.c
   $(OPENSSL_PATH)/crypto/cryptlib.c
+  $(OPENSSL_PATH)/crypto/ctype.c
   $(OPENSSL_PATH)/crypto/cversion.c
   $(OPENSSL_PATH)/crypto/des/cbc_cksm.c
   $(OPENSSL_PATH)/crypto/des/cbc_enc.c
@@ -189,7 +192,6 @@ [Sources]
   $(OPENSSL_PATH)/crypto/des/pcbc_enc.c
   $(OPENSSL_PATH)/crypto/des/qud_cksm.c
   $(OPENSSL_PATH)/crypto/des/rand_key.c
-  $(OPENSSL_PATH)/crypto/des/rpc_enc.c
   $(OPENSSL_PATH)/crypto/des/set_key.c
   $(OPENSSL_PATH)/crypto/des/str2key.c
   $(OPENSSL_PATH)/crypto/des/xcbc_enc.c
@@ -206,6 +208,7 @@ [Sources]
   $(OPENSSL_PATH)/crypto/dh/dh_pmeth.c
   $(OPENSSL_PATH)/crypto/dh/dh_prn.c
   $(OPENSSL_PATH)/crypto/dh/dh_rfc5114.c
+  $(OPENSSL_PATH)/crypto/dh/dh_rfc7919.c
   $(OPENSSL_PATH)/crypto/dso/dso_dl.c
   $(OPENSSL_PATH)/crypto/dso/dso_dlfcn.c
   $(OPENSSL_PATH)/crypto/dso/dso_err.c
@@ -228,6 +231,7 @@ [Sources]
   $(OPENSSL_PATH)/crypto/evp/e_aes.c
   $(OPENSSL_PATH)/crypto/evp/e_aes_cbc_hmac_sha1.c
   $(OPENSSL_PATH)/crypto/evp/e_aes_cbc_hmac_sha256.c
+  $(OPENSSL_PATH)/crypto/evp/e_aria.c
   $(OPENSSL_PATH)/crypto/evp/e_bf.c
   $(OPENSSL_PATH)/crypto/evp/e_camellia.c
   $(OPENSSL_PATH)/crypto/evp/e_cast.c
@@ -242,6 +246,7 @@ [Sources]
   $(OPENSSL_PATH)/crypto/evp/e_rc4_hmac_md5.c
   $(OPENSSL_PATH)/crypto/evp/e_rc5.c
   $(OPENSSL_PATH)/crypto/evp/e_seed.c
+  $(OPENSSL_PATH)/crypto/evp/e_sm4.c
   $(OPENSSL_PATH)/crypto/evp/e_xcbc_d.c
   

[edk2-devel] [PATCH v5 2/9] CryptoPkg/OpensslLib: Exclude unnecessary files in process_files.pl

2019-05-29 Thread Xiaoyu Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

When running process_files.py to configure OpenSSL, we can exclude
some unnecessary files. This can reduce porting time, compiling
time and library size.

Upstream OpenSSL commit 71a5516dcc8a which was as part of
OpenSSL_1_1_1b, Add the STORE module(crypto/store/*).
But UEFI don't use them. So exclude these files.

Functions in crypto/rand/randfile.c OpenSSL and edk2 don't
call them. And it requires more crt runtime support.
So exclude it.

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Reviewed-by: Laszlo Ersek 
Tested-by: Gary Lin 
---
 CryptoPkg/Library/OpensslLib/process_files.pl | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/CryptoPkg/Library/OpensslLib/process_files.pl 
b/CryptoPkg/Library/OpensslLib/process_files.pl
index 6c136cca092a..e277108f0734 100755
--- a/CryptoPkg/Library/OpensslLib/process_files.pl
+++ b/CryptoPkg/Library/OpensslLib/process_files.pl
@@ -127,6 +127,12 @@ foreach my $product ((@{$unified_info{libraries}},
 foreach my $s (@{$unified_info{sources}->{$o}}) {
 next if ($unified_info{generate}->{$s});
 next if $s =~ "crypto/bio/b_print.c";
+
+# No need to add unused files in UEFI.
+# So it can reduce porting time, compile time, library size.
+next if $s =~ "crypto/rand/randfile.c";
+next if $s =~ "crypto/store/";
+
 if ($product =~ "libssl") {
 push @sslfilelist, '  $(OPENSSL_PATH)/' . $s . "\r\n";
 next;
-- 
2.7.4


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41589): https://edk2.groups.io/g/devel/message/41589
Mute This Topic: https://groups.io/mt/31832282/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v5 6/9] CryptoPkg: Fix possible build problem with Clang

2019-05-29 Thread Xiaoyu Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

When building CryptoPkg with Clang, blow error may result

* /usr/lib/llvm-3.8/lib/clang/3.8.0/include/stdatomic.h:105:17: error:
unknown type name 'wchar_t'

Since the C native atomics are C11 feature we can explicitly
use C99 to work around it.
add -std=c99 to avoid it

* openssl/crypto/conf/conf_sap.c:71:12: error: variable 'ret' is
  uninitialized
  when used here [-Werror,-Wuninitialized]

Suppress warnings in OpenSSL so we don't break the build with -Werror.
add -Wno-error=uninitialized to disalbe this warning

Cc: Ting Ye 
Cc: Jian J Wang 
Signed-off-by: Xiaoyu Lu 
---
 CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf| 2 ++
 CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf | 2 ++
 CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf | 2 ++
 CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf | 2 ++
 CryptoPkg/Library/OpensslLib/OpensslLib.inf| 1 +
 CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf  | 1 +
 6 files changed, 10 insertions(+)

diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
index 38e25372b4b0..2a581ceac70c 100644
--- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
@@ -96,3 +96,5 @@ [BuildOptions]
   # -JCryptoPkg/Include : To disable the use of the system includes provided 
by RVCT
   # --diag_remark=1 : Reduce severity of "#1-D: last line of file ends 
without a newline"
   RVCT:*_*_ARM_CC_FLAGS = -JCryptoPkg/Include --diag_remark=1
+
+  GCC:*_CLANG38_*_CC_FLAGS = -std=c99
diff --git a/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
index 415dda3078a8..8fdc6920ec2e 100644
--- a/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
@@ -93,3 +93,5 @@ [BuildOptions]
   # -JCryptoPkg/Include : To disable the use of the system includes provided 
by RVCT
   # --diag_remark=1 : Reduce severity of "#1-D: last line of file ends 
without a newline"
   RVCT:*_*_ARM_CC_FLAGS = -JCryptoPkg/Include --diag_remark=1
+
+  GCC:*_CLANG38_*_CC_FLAGS = -std=c99
diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
index 5da5b31947bd..9d639fd01eae 100644
--- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
@@ -101,3 +101,5 @@ [BuildOptions]
   # -JCryptoPkg/Include : To disable the use of the system includes provided 
by RVCT
   # --diag_remark=1 : Reduce severity of "#1-D: last line of file ends 
without a newline"
   RVCT:*_*_ARM_CC_FLAGS = -JCryptoPkg/Include --diag_remark=1
+
+  GCC:*_CLANG38_*_CC_FLAGS = -std=c99
diff --git a/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
index f5dd213d1ba1..c9f4abb22aea 100644
--- a/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
@@ -98,3 +98,5 @@ [BuildOptions]
   MSFT:*_*_*_CC_FLAGS = /wd4090
 
   XCODE:*_*_*_CC_FLAGS = -mmmx -msse
+
+  GCC:*_CLANG38_*_CC_FLAGS = -std=c99
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf 
b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index f4d7772c068c..ce04d441552f 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -559,6 +559,7 @@ [BuildOptions]
   GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) 
-Wno-error=maybe-uninitialized -Wno-error=format -Wno-format 
-Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
   GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized 
-Wno-error=unused-but-set-variable
   GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized 
-Wno-format -Wno-error=unused-but-set-variable
+  GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
 
   # suppress the following warnings in openssl so we don't break the build 
with warnings-as-errors:
   # 1295: Deprecated declaration  - give arg types
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf 
b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
index fd12d112edb2..35430e77d344 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
@@ -520,6 +520,7 @@ [BuildOptions]
   GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) 
-Wno-error=maybe-uninitialized -Wno-error=format -Wno-format 
-Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
   GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized 
-Wno-error=unused-but-set-variable
   GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized 
-Wno-format -Wno-error=unused-but-set-variable
+  GCC:*_CLANG38_*_CC_FLAGS = -std=c99 -Wno-error=uninitialized
 
   # suppress the following warnings in openssl so we don't break the build 
with 

[edk2-devel] [PATCH v5 4/9] CryptoPkg/OpensslLib: Prepare for upgrading OpenSSL

2019-05-29 Thread Xiaoyu Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

Disable warning for building OpenSSL_1_1_1b

add /wd4132 /wd4700 /wd4310 for Visual Studio in OpensslLib[Crypto].inf

add -Wno-error=unused-but-set-variable for GCC in OpensslLib[Crypto].inf
Although this option is set in some build environments by default.
But this is only for OpenSSL compilation, no matter how the
default options change.

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Reviewed-by: Laszlo Ersek 
Tested-by: Gary Lin 
---
 CryptoPkg/Library/OpensslLib/OpensslLib.inf   | 16 ++--
 CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf | 16 ++--
 2 files changed, 20 insertions(+), 12 deletions(-)

diff --git a/CryptoPkg/Library/OpensslLib/OpensslLib.inf 
b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
index 530ac5f11096..f4d7772c068c 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLib.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLib.inf
@@ -530,17 +530,20 @@ [BuildOptions]
   # Disables the following Visual Studio compiler warnings brought by openssl 
source,
   # so we do not break the build with /WX option:
   #   C4090: 'function' : different 'const' qualifiers
+  #   C4132: 'object' : const object should be initialized (tls13_enc.c)
   #   C4244: conversion from type1 to type2, possible loss of data
   #   C4245: conversion from type1 to type2, signed/unsigned mismatch
   #   C4267: conversion from size_t to type, possible loss of data
   #   C4306: 'identifier' : conversion from 'type1' to 'type2' of greater size
+  #   C4310: cast truncates constant value
   #   C4389: 'operator' : signed/unsigned mismatch ()
+  #   C4700: uninitialized local variable 'name' used. (conf_sap.c(71))
   #   C4702: unreachable code
   #   C4706: assignment within conditional expression
   #   C4819: The file contains a character that cannot be represented in the 
current code page
   #
-  MSFT:*_*_IA32_CC_FLAGS   = -U_WIN32 -U_WIN64 -U_MSC_VER $(OPENSSL_FLAGS) 
/wd4090 /wd4244 /wd4245 /wd4267 /wd4389 /wd4702 /wd4706 /wd4819
-  MSFT:*_*_X64_CC_FLAGS= -U_WIN32 -U_WIN64 -U_MSC_VER $(OPENSSL_FLAGS) 
/wd4090 /wd4244 /wd4245 /wd4267 /wd4306 /wd4389 /wd4702 /wd4706 /wd4819
+  MSFT:*_*_IA32_CC_FLAGS   = -U_WIN32 -U_WIN64 -U_MSC_VER $(OPENSSL_FLAGS) 
/wd4090 /wd4132 /wd4244 /wd4245 /wd4267 /wd4310 /wd4389 /wd4700 /wd4702 /wd4706 
/wd4819
+  MSFT:*_*_X64_CC_FLAGS= -U_WIN32 -U_WIN64 -U_MSC_VER $(OPENSSL_FLAGS) 
/wd4090 /wd4132 /wd4244 /wd4245 /wd4267 /wd4306 /wd4310 /wd4700 /wd4389 /wd4702 
/wd4706 /wd4819
 
   INTEL:*_*_IA32_CC_FLAGS  = -U_WIN32 -U_WIN64 -U_MSC_VER -U__ICC 
$(OPENSSL_FLAGS) /w
   INTEL:*_*_X64_CC_FLAGS   = -U_WIN32 -U_WIN64 -U_MSC_VER -U__ICC 
$(OPENSSL_FLAGS) /w
@@ -550,11 +553,12 @@ [BuildOptions]
   #   -Werror=maybe-uninitialized: there exist some other paths for which the 
variable is not initialized.
   #   -Werror=format: Check calls to printf and scanf, etc., to make sure that 
the arguments supplied have
   #   types appropriate to the format string specified.
+  #   -Werror=unused-but-set-variable: Warn whenever a local variable is 
assigned to, but otherwise unused (aside from its declaration).
   #
-  GCC:*_*_IA32_CC_FLAGS= -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) 
-Wno-error=maybe-uninitialized
-  GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) 
-Wno-error=maybe-uninitialized -Wno-error=format -Wno-format -DNO_MSABI_VA_FUNCS
-  GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized
-  GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized 
-Wno-format
+  GCC:*_*_IA32_CC_FLAGS= -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) 
-Wno-error=maybe-uninitialized -Wno-error=unused-but-set-variable
+  GCC:*_*_X64_CC_FLAGS = -U_WIN32 -U_WIN64 $(OPENSSL_FLAGS) 
-Wno-error=maybe-uninitialized -Wno-error=format -Wno-format 
-Wno-error=unused-but-set-variable -DNO_MSABI_VA_FUNCS
+  GCC:*_*_ARM_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized 
-Wno-error=unused-but-set-variable
+  GCC:*_*_AARCH64_CC_FLAGS = $(OPENSSL_FLAGS) -Wno-error=maybe-uninitialized 
-Wno-format -Wno-error=unused-but-set-variable
 
   # suppress the following warnings in openssl so we don't break the build 
with warnings-as-errors:
   # 1295: Deprecated declaration  - give arg types
diff --git a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf 
b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
index 231010098851..fd12d112edb2 100644
--- a/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
+++ b/CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
@@ -491,17 +491,20 @@ [BuildOptions]
   # Disables the following Visual Studio compiler warnings brought by openssl 
source,
   # so we do not break the build with /WX option:
   #   C4090: 'function' : different 'const' qualifiers
+  #   C4132: 'object' : const object should be initialized (tls13_enc.c)
   #   C4244: conversion from type1 to type2, possible loss of data
   #   C4245: conversion from type1 to 

[edk2-devel] [PATCH v5 0/9] Crypto: Upgrade OpenSSL to 1.1.1b

2019-05-29 Thread Xiaoyu Lu
This series is also avaiable at:
https://github.com/xiaoyuxlu/edk2/commits/bz_1089_upgrade_to_openssl_1_1_1b_v5

Change since v4:

1. Split "[PATCH v4 6/7] CryptoPkg: Upgrade OpenSSL to 1.1.1b" patch into two.
   a. CryptoPkg/OpensslLib: Add functions for upgrading OpenSSL1_1_1b
   b. CryptoPkg: Upgrade OpenSSL to 1.1.1b

2. Add "CryptoPkg: Fix possible build problem with Clang" patch.
   Blow is a link to the problem.
   Ref: https://edk2.groups.io/g/devel/message/41424
   OpenSSL_1_1_1b may build failed with Clang38. So
   add additional build flag to work around it.

Cc: Jian J Wang 
Cc: Ting Ye 
Cc: Laszlo Ersek 

Laszlo Ersek (1):
  CryptoPkg/OpensslLib: Fix cross-build problem for AARCH64

Xiaoyu Lu (8):
  CryptoPkg/OpensslLib: Modify process_files.pl for upgrading OpenSSL
  CryptoPkg/OpensslLib: Exclude unnecessary files in process_files.pl
  CryptoPkg/IntrinsicLib: Fix possible unresolved external symbol issue
  CryptoPkg/OpensslLib: Prepare for upgrading OpenSSL
  CryptoPkg: Fix possible build problem with Clang
  CryptoPkg/OpensslLib: Add functions for upgrading OpenSSL1_1_1b
  CryptoPkg: Upgrade OpenSSL to 1.1.1b
  CryptoPkg/BaseCryptLib: Make HMAC_CTX size backward compatible

 CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf|   2 +
 CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf |   2 +
 CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf |   2 +
 CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf |   2 +
 CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf|   4 +-
 CryptoPkg/Library/OpensslLib/OpensslLib.inf|  77 -
 CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf  |  68 -
 CryptoPkg/Library/Include/CrtLibSupport.h  |  13 +-
 CryptoPkg/Library/Include/openssl/opensslconf.h|  54 +++-
 CryptoPkg/Library/Include/sys/syscall.h|  11 +
 CryptoPkg/Library/OpensslLib/buildinf.h|   2 +
 CryptoPkg/Library/OpensslLib/rand_pool_noise.h |  29 ++
 CryptoPkg/Library/BaseCryptLib/Hmac/CryptHmacMd5.c |   8 +-
 .../Library/BaseCryptLib/Hmac/CryptHmacSha1.c  |   9 +-
 .../Library/BaseCryptLib/Hmac/CryptHmacSha256.c|   8 +-
 CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c |  22 ++
 CryptoPkg/Library/OpensslLib/ossl_store.c  |  17 ++
 CryptoPkg/Library/OpensslLib/rand_pool.c   | 316 +
 CryptoPkg/Library/OpensslLib/rand_pool_noise.c |  29 ++
 CryptoPkg/Library/OpensslLib/rand_pool_noise_tsc.c |  43 +++
 CryptoPkg/Library/OpensslLib/openssl   |   2 +-
 CryptoPkg/Library/OpensslLib/process_files.pl  |  11 +-
 22 files changed, 679 insertions(+), 52 deletions(-)
 create mode 100644 CryptoPkg/Library/Include/sys/syscall.h
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise.h
 create mode 100644 CryptoPkg/Library/IntrinsicLib/Ia32/MathFtol.c
 create mode 100644 CryptoPkg/Library/OpensslLib/ossl_store.c
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool.c
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise.c
 create mode 100644 CryptoPkg/Library/OpensslLib/rand_pool_noise_tsc.c

-- 
2.7.4


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41587): https://edk2.groups.io/g/devel/message/41587
Mute This Topic: https://groups.io/mt/31832279/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [PATCH v5 1/9] CryptoPkg/OpensslLib: Modify process_files.pl for upgrading OpenSSL

2019-05-29 Thread Xiaoyu Lu
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089

OpenSSL configure mechanism use --with-rand-seed=xxx option to configure
random number generation.

OpenSSL_1_1_0j(74f2d9c1ec5f5510e1d3da5a9f03c28df0977762)
we use default --with-rand-seed=os option to for building it.

But OpenSSL_1_1_1b(50eaac9f3337667259de725451f201e784599687)
only support seeding NONE for UEFI(rand_unix.c line 93).

This OpenSSL change was introduced in commit
8389ec4b4950 ("Add --with-rand-seed", 2017-07-22).

So add --with-rand-seed=none to process_files.pl.

Cc: Jian J Wang 
Cc: Ting Ye 
Signed-off-by: Xiaoyu Lu 
Reviewed-by: Laszlo Ersek 
Tested-by: Gary Lin 
---
 CryptoPkg/Library/OpensslLib/process_files.pl | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/CryptoPkg/Library/OpensslLib/process_files.pl 
b/CryptoPkg/Library/OpensslLib/process_files.pl
index f6e1f436419b..6c136cca092a 100755
--- a/CryptoPkg/Library/OpensslLib/process_files.pl
+++ b/CryptoPkg/Library/OpensslLib/process_files.pl
@@ -90,7 +90,10 @@ BEGIN {
 "no-threads",
 "no-ts",
 "no-ui",
-"no-whirlpool"
+"no-whirlpool",
+# OpenSSL1_1_1b doesn't support default rand-seed-os for UEFI
+# UEFI only support --with-rand-seed=none
+"--with-rand-seed=none"
 ) == 0 ||
 die "OpenSSL Configure failed!\n";
 
-- 
2.7.4


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41588): https://edk2.groups.io/g/devel/message/41588
Mute This Topic: https://groups.io/mt/31832281/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] OVMF and SMBIOS

2019-05-29 Thread Tomas Pilar (tpilar)
On 28/05/2019 18:06, Laszlo Ersek wrote:
> On 05/28/19 17:18, Tomas Pilar (tpilar) wrote:
>> Hi,
>>
>> I am trying to create kvm instance using libvirt and Qemu and OVMF that also 
>> has SMBIOS included. My current version of Qemu only supports type 0 and 
>> type 1 SMBIOS tables so I specify those. However, when I use smbiosview in 
>> the UEFI shell, I get back "SMBIOS not found".
>>
>> I attach my current libvirt xml specification for the kvm host.
>>
>> Does anyone have any immediate ideas?
> The SMBIOS fw_cfg interface between QEMU and guest firmware was reworked
> in the QEMU v2.1.0 release (primarily in commit c97294ec1b9e, "SMBIOS:
> Build aggregate smbios tables and entry point", 2014-05-05).
>
> If you use an earlier QEMU release, or else you use a machine type
> earlier than pc-i440fx-2.1, then the new SMBIOS fw_cfg interface is not
> exposed to guest firmware.
>
> And, upstream OVMF never gained patches for the "legacy" SMBIOS fw_cfg
> interface. I had posted patches for that in 2013, but they were not
> accepted. The thread starts here:
>
> [edk2] [PATCH 0/3] OvmfPkg: basic SMBIOS support on QEMU
> https://www.mail-archive.com/edk2-devel@lists.sourceforge.net/msg02917.html
>
> We (RH) carried forward these patches for quite some time in RHEL7 and
> (IIRC) Fedora as well, but QEMU v2.1.0 was released in Aug 2014 if I
> read the git log right, and so we too dropped the downstream-only
> patches at some point, in favor of the new interface.
>
> Based on your libvirt domain xml... It looks likely that you use the
> qemu-kvm package that is part of base RHEL7. That package is based on
> upstream QEMU 1.5.3, and so it indeed lacks support for the "new" SMBIOS
> interface. If you can use CentOS, you could try the qemu-kvm-ev package
> instead. (That one is based on upstream 2.12.)
>
> Alternatively, you could check the "OVMF-20160202-2.gitd7c0dfa.el7"
> package (or earlier), which should (a) still include the
> above-referenced patches, and (b) still run on the 1.5.3-based qemu-kvm
> emulator. (Later OVMF packages would only provide the SMM_REQUIRE
> firmware binary, which does not boot on the 1.5.3-based qemu-kvm emulator.)
>
> Thanks
> Laszlo
Thank you Laszlo, that was incredibly thorough! I should be able to work with 
this.

Cheers,
Tom

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41586): https://edk2.groups.io/g/devel/message/41586
Mute This Topic: https://groups.io/mt/31822936/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH V5] BaseTools:Make BaseTools support new rules to generate RAW FFS FILE

2019-05-29 Thread Fan, ZhijuX
The Dict parameter is not used in this function, I will enter an BZ: 
https://bugzilla.tianocore.org/show_bug.cgi?id=1858  to clean up the unused 
parameters



Any question, please let me know. Thanks.

Best Regards
Fan Zhiju



> -Original Message-
> From: Feng, Bob C
> Sent: Wednesday, May 29, 2019 3:16 PM
> To: Fan, ZhijuX ; devel@edk2.groups.io
> Cc: Gao, Liming 
> Subject: RE: [PATCH V5] BaseTools:Make BaseTools support new rules to
> generate RAW FFS FILE
> 
> Hi Zhiju,
> 
> For the changes,
> 
> -def __InfParse__(self, Dict = {}):
> +def __InfParse__(self, Dict = None, IsGenFfs=False):
> 
> and
> 
> -def GetFileList(FfsInf, FileType, FileExtension, Dict = {}, 
> IsMakefile=False):
> +def GetFileList(FfsInf, FileType, FileExtension, Dict = None,
> IsMakefile=False, SectionType=None):
> 
> I think you need to add
> If Dict is None:
> Dict = {}
> 
> In the function body.
> 
> 
> Thanks,
> Bob
> 
> -Original Message-
> From: Fan, ZhijuX
> Sent: Wednesday, May 29, 2019 1:30 PM
> To: devel@edk2.groups.io
> Cc: Gao, Liming ; Feng, Bob C 
> Subject: [PATCH V5] BaseTools:Make BaseTools support new rules to
> generate RAW FFS FILE
> 
> BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1765
> 
> If RAW FFS File Rule has no section for its data.For RAW FFS File, directly 
> call
> GenFfs tool to generate FFS file.
> 
> Ffs Rule:
> [Rule.Common.USER_DEFINED.MicroCode]
>   FILE RAW = $(NAMED_GUID) {
> $(INF_OUTPUT)/$(MODULE_NAME).bin
>   }
> [Rule.Common.USER_DEFINED.LOGO]
>   FILE RAW = $(NAMED_GUID) {
>|.bmp
>   }
> 
> As shown in the rule above,if SectionType and FileType not defined, FFS files
> are generated directly, and no other type of file is generated.
> 
> The patch is to make the BaseTools support these two rules
> 
> Cc: Bob Feng 
> Cc: Liming Gao 
> Signed-off-by: Zhiju.Fan 
> ---
>  BaseTools/Source/Python/Common/DataType.py|  1 +
>  BaseTools/Source/Python/GenFds/EfiSection.py  | 22
> +-
>  BaseTools/Source/Python/GenFds/FdfParser.py   | 14 --
>  BaseTools/Source/Python/GenFds/FfsInfStatement.py |  9 ++---
>  BaseTools/Source/Python/GenFds/Section.py |  7 ++-
>  5 files changed, 46 insertions(+), 7 deletions(-)
> 
> diff --git a/BaseTools/Source/Python/Common/DataType.py
> b/BaseTools/Source/Python/Common/DataType.py
> index 7cd67bc01a..83ec36c235 100644
> --- a/BaseTools/Source/Python/Common/DataType.py
> +++ b/BaseTools/Source/Python/Common/DataType.py
> @@ -122,6 +122,7 @@ BINARY_FILE_TYPE_VER = 'VER'
>  BINARY_FILE_TYPE_UI = 'UI'
>  BINARY_FILE_TYPE_BIN = 'BIN'
>  BINARY_FILE_TYPE_FV = 'FV'
> +BINARY_FILE_TYPE_RAW = 'RAW_BINARY'
> 
>  PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
>  PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
> diff --git a/BaseTools/Source/Python/GenFds/EfiSection.py
> b/BaseTools/Source/Python/GenFds/EfiSection.py
> index 302f244faf..74f176cfef 100644
> --- a/BaseTools/Source/Python/GenFds/EfiSection.py
> +++ b/BaseTools/Source/Python/GenFds/EfiSection.py
> @@ -93,7 +93,7 @@ class EfiSection (EfiSectionClassObject):
>  if '.depex' in SuffixMap:
>  FileList.append(Filename)
>  else:
> -FileList, IsSect = Section.Section.GetFileList(FfsInf, 
> self.FileType,
> self.FileExtension, Dict, IsMakefile=IsMakefile)
> +FileList, IsSect = Section.Section.GetFileList(FfsInf,
> + self.FileType, self.FileExtension, Dict, IsMakefile=IsMakefile,
> + SectionType=SectionType)
>  if IsSect :
>  return FileList, self.Alignment
> 
> @@ -217,6 +217,26 @@ class EfiSection (EfiSectionClassObject):
>   Ui=StringData, 
> IsMakefile=IsMakefile)
>  OutputFileList.append(OutputFile)
> 
> +#
> +# If Section Type is BINARY_FILE_TYPE_RAW
> +#
> +elif SectionType == BINARY_FILE_TYPE_RAW:
> +"""If File List is empty"""
> +if FileList == []:
> +if self.Optional == True:
> +GenFdsGlobalVariable.VerboseLogger("Optional Section 
> don't
> exist!")
> +return [], None
> +else:
> +EdkLogger.error("GenFds", GENFDS_ERROR, "Output
> + file for %s section could not be found for %s" % (SectionType,
> + InfFileName))
> +
> +elif len(FileList) > 1:
> +EdkLogger.error("GenFds", GENFDS_ERROR,
> +"Files suffixed with %s are not allowed to 
> have more than
> one file in %s[Binaries] section" % (
> +self.FileExtension, InfFileName))
> +else:
> +for File in FileList:
> +File = GenFdsGlobalVariable.MacroExtend(File, Dict)
> +OutputFileList.append(File)
> 
>  else:
>  """If File List is empty"""
> 

[edk2-devel] [PATCH V2] BaseTools:add UniTool.py to Edk2\BaseTools\Scripts

2019-05-29 Thread Fan, ZhijuX
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1855

UniTool is one python script to generate UQI (Universal Question
Identifier) unicode string for HII question PROMPT string. UQI
string can be used to identify each HII question.
The scripts function will sync up UQI definitions with uni files
based on vfi/vfr/hfr/sd/sdi in the tree.

This script can be run in both Py2 and Py3.

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Zhiju.Fan 
---
 BaseTools/Scripts/UniTool.py | 485 +++
 1 file changed, 485 insertions(+)
 create mode 100644 BaseTools/Scripts/UniTool.py

diff --git a/BaseTools/Scripts/UniTool.py b/BaseTools/Scripts/UniTool.py
new file mode 100644
index 00..2f76d305cd
--- /dev/null
+++ b/BaseTools/Scripts/UniTool.py
@@ -0,0 +1,485 @@
+## @file
+# generate UQI (Universal Question Identifier) unicode string for HII question 
PROMPT string. UQI string can be used to
+# identify each HII question.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+import re, sys, os, getopt, codecs, fnmatch
+
+# global variable declarations
+questionError = False
+uqiList = re.compile('^#string[ \t]+([A-Z_0-9]+)[ \t]+#language[ \t]+uqi[ 
\t\r\n]+"(?:[x\S]{1,2})([0-9a-fA-F]{4,5})"',re.M).findall
+allUqis = {}
+stringDict = {}
+GlobalVarId = {}
+options = {}
+
+#**
+# description: Prints help information
+#
+# arguments:   none
+#
+# returns: none
+#
+
+def usage () :
+  sys.exit("Syntax:  %s [-b] [-u] [-l] [-x] [-h] [-d 'rootDirectory1'] [-d 
'rootDirectory2'] [-d 'rootDirectory3']... [-q e|w] \
+'rootDirectory0' 'uqiFile'|'uqiFileDirectory' ['excludedDirectory1'] 
['excludedDirectory2'] ['excludedDirectory3']...\n%s" %
+(os.path.basename(sys.argv[0]),
+  """\nFunction will sync up UQI definitions with uni files based on 
vfi/vfr/hfr/sd/sdi in the tree.\n
+Required Arguments:
+  'rootdirectory0'   path to root directory
+  'uqiFileDirectory' path to UQI file(UqiList.uni)
+  'uqiFile'  UQI file
+
+Options:
+  -hShow this help
+  -bBuild option returns error if any new UQI needs 
assigning
+based on vfi/vfr/hfr/sd/sdi when no -u option is 
specified
+  -uCreate new UQIs that does not already exist in uqiFile 
for
+any string requiring a UQI based on vfi/vfr/hfr/sd/sdi
+NOTE: 'uqiFile' cannot be readonly!
+  -lLanguage deletion option (keeps only English and uqi)
+moves all UQIs to 'uqiFile'
+NOTE: Uni files cannot be readonly!
+  -xExclude 'rootDirectory'/'excludedDirectory1' &
+'rootDirectory'/'excludedDirectory2'... from UQI list 
build
+NOTE: Cannot be the same as rootDirectory
+  -dAdd multiple root directories to process
+  -qPrint warning(w) or return error(e) if different HII 
questions
+are referring same string token
+
+Return error if any duplicated UQI string or value in UQI list or if no 
definition
+for any string referred by HII question when -b or -u is specified
+
+NOTE: Options must be specified before parameters
+"""))
+
+#**
+# description: Get uni file encoding
+#
+# arguments:   filename - name of uni file
+#
+# returns: utf-8 or utf-16
+#
+def GetUniFileEncoding(filename):
+  #
+  # Detect Byte Order Mark at beginning of file.  Default to UTF-8
+  #
+  Encoding = 'utf-8'
+
+  #
+  # Read file
+  #
+  try:
+with open(filename, mode='rb') as UniFile:
+  FileIn = UniFile.read()
+  except:
+return Encoding
+
+  if (FileIn.startswith(codecs.BOM_UTF16_BE) or 
FileIn.startswith(codecs.BOM_UTF16_LE)):
+Encoding = 'utf-16'
+
+  return Encoding
+
+# rewrite function os.path.walk
+def Walk(top, func, arg):
+  try:
+names = os.listdir(top)
+  except os.error:
+return
+  func(arg, top, names)
+  for name in names:
+name = os.path.join(top, name)
+if os.path.isdir(name):
+  Walk(name, func, arg)
+
+#**
+# description: Parses commandline arguments and options
+#  Calls function processUni to build dictionary of strings
+#  Calls other functions according to user specified options
+#
+# arguments:   argv - contains all input from command line
+#   - must contain path to root directory
+#   - may contain options -h, -u, -l, -b or -x before path
+#
+# returns: none
+#
+def main(argv) :
+# Read input arguments and options
+  global allUqis, uqiList, questionError
+  try:
+opts, args = getopt.getopt(argv[1:], "hulbxd:q:") # each letter 

[edk2-devel] [Patch v2 1/3] [edk2-platforms] Platform/Intel/DebugFeaturePkg: Add DebugFeaturePkg

2019-05-29 Thread Dong, Eric
Add new package DebugFeaturePkg in Platform/Intel/ folder.
It will keep debug related features in this package.

Signed-off-by: Eric Dong 
Cc: Liming Gao 
---
 Maintainers.txt   |  4 
 .../Intel/DebugFeaturePkg/DebugFeaturePkg.dec | 19 +++
 .../Intel/DebugFeaturePkg/DebugFeaturePkg.dsc | 24 +++
 3 files changed, 47 insertions(+)
 create mode 100644 Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dec
 create mode 100644 Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dsc

diff --git a/Maintainers.txt b/Maintainers.txt
index 2bc4a6c1ca..b72d1f74bb 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -64,6 +64,10 @@ Platform/Intel/BoardModulePkg
 M: Eric Dong 
 R: Liming Gao 
 
+Platform/Intel/DebugFeaturePkg
+M: Eric Dong 
+R: Liming Gao 
+
 Platform/Intel/ClevoOpenBoardPkg
 M: Michael Kubacki 
 M: Ankit Sinha 
diff --git a/Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dec 
b/Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dec
new file mode 100644
index 00..1f9d9134b2
--- /dev/null
+++ b/Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dec
@@ -0,0 +1,19 @@
+## @file
+# This package provides the modules that build for debug feature.
+# This DebugFeaturePkg should only depend on EDKII Core packages and 
MinPlatformPkg.
+#
+# The DEC files are used by the utilities that parse DSC and
+# INF files to generate AutoGen.c and AutoGen.h files
+# for the build infrastructure.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  DEC_SPECIFICATION  = 0x00010005
+  PACKAGE_NAME   = DebugFeaturePkg
+  PACKAGE_GUID   = 58B6F2BB-A94F-4EB9-89DA-2F06ED59CE39
+  PACKAGE_VERSION= 0.1
diff --git a/Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dsc 
b/Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dsc
new file mode 100644
index 00..351d6583d5
--- /dev/null
+++ b/Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dsc
@@ -0,0 +1,24 @@
+## @file
+# This package provides the modules that build for debug feature.
+# This DebugFeaturePkg should only depend on EDKII Core packages and 
MinPlatformPkg.
+#
+# The DEC files are used by the utilities that parse DSC and
+# INF files to generate AutoGen.c and AutoGen.h files
+# for the build infrastructure.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  PLATFORM_NAME  = DebugFeaturePkg
+  PLATFORM_GUID  = 3A0DBEF4-3C16-4F6B-8B55-BABB260D30B9
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x00010005
+  OUTPUT_DIRECTORY   = Build/DebugFeaturePkg
+  SUPPORTED_ARCHITECTURES= IA32|X64
+  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
+  SKUID_IDENTIFIER   = DEFAULT
+
-- 
2.21.0.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41581): https://edk2.groups.io/g/devel/message/41581
Mute This Topic: https://groups.io/mt/31831497/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



[edk2-devel] [Patch v2 3/3] [edk2-platforms] Platform/Intel/DebugFeaturePkg/AcpiDebug: Change AcpiDebug module location.

2019-05-29 Thread Dong, Eric
Move AcpiDebug module from AdvancedFeaturePkg to DebugFeaturePkg.

Signed-off-by: Eric Dong 
Cc: Liming Gao 
---
 .../Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dec  |  6 --
 .../Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc  |  3 ---
 .../AcpiDebug/AcpiDebug.asl  |  0
 .../AcpiDebug/AcpiDebug.c|  0
 .../AcpiDebug/AcpiDebugDxe.inf   |  8 
 .../AcpiDebug/AcpiDebugSmm.inf   |  8 
 .../AcpiDebug/Readme.txt |  0
 Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dsc   | 12 
 8 files changed, 20 insertions(+), 17 deletions(-)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebug.asl (100%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebug.c (100%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebugDxe.inf (79%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebugSmm.inf (80%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/Readme.txt (100%)

diff --git a/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dec 
b/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dec
index b18f81ba39..44e5de64db 100644
--- a/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dec
+++ b/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dec
@@ -140,17 +140,11 @@ gAdvancedFeaturePkgTokenSpaceGuid =  {0xa8514688, 
0x6693, 0x4ab5, {0xaa,
 
 [PcdsFixedAtBuild]
   gAdvancedFeaturePkgTokenSpaceGuid.PcdMaxSOLChannels|0x3|UINT8|0x4009
-  ## This PCD specifies AcpiDebug feature is enable/disable.
-  gAdvancedFeaturePkgTokenSpaceGuid.PcdAcpiDebugEnable|FALSE|BOOLEAN|0x0012
-  ## This PCD specifies AcpiDebug buffer size.
-  
gAdvancedFeaturePkgTokenSpaceGuid.PcdAcpiDebugBufferSize|0x1|UINT32|0x0013
 
 [PcdsDynamic, PcdsDynamicEx]
   
gAdvancedFeaturePkgTokenSpaceGuid.PcdIpmiIoBaseAddress|0xCA2|UINT16|0x9022
   gAdvancedFeaturePkgTokenSpaceGuid.PcdFRB2EnabledFlag|TRUE|BOOLEAN|0x1030
   gAdvancedFeaturePkgTokenSpaceGuid.PcdFRBTimeoutValue|360|UINT16|0x1040
-  ## This PCD specifies AcpiDebug buffer address
-  gAdvancedFeaturePkgTokenSpaceGuid.PcdAcpiDebugAddress|0|UINT32|0x0014
 
 [PcdsFeatureFlag]
   gAdvancedFeaturePkgTokenSpaceGuid.PcdNetworkEnable  
|FALSE|BOOLEAN|0xF0A1
diff --git a/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc 
b/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
index 909e566445..ea1a00725d 100644
--- a/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
+++ b/Platform/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
@@ -148,6 +148,3 @@
   AdvancedFeaturePkg/Ipmi/IpmiFru/IpmiFru.inf
   AdvancedFeaturePkg/Ipmi/BmcElog/BmcElog.inf
   AdvancedFeaturePkg/Ipmi/BmcAcpi/BmcAcpi.inf
-
-  AdvancedFeaturePkg/AcpiDebug/AcpiDebugDxe.inf
-  AdvancedFeaturePkg/AcpiDebug/AcpiDebugSmm.inf
\ No newline at end of file
diff --git a/Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebug.asl 
b/Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebug.asl
similarity index 100%
rename from Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebug.asl
rename to Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebug.asl
diff --git a/Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebug.c 
b/Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebug.c
similarity index 100%
rename from Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebug.c
rename to Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebug.c
diff --git a/Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebugDxe.inf 
b/Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebugDxe.inf
similarity index 79%
rename from Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebugDxe.inf
rename to Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebugDxe.inf
index fd701df3af..7473126b11 100644
--- a/Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebugDxe.inf
+++ b/Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebugDxe.inf
@@ -32,12 +32,12 @@
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
-  AdvancedFeaturePkg/AdvancedFeaturePkg.dec
+  DebugFeaturePkg/DebugFeaturePkg.dec
 
 [Pcd]
-  gAdvancedFeaturePkgTokenSpaceGuid.PcdAcpiDebugEnable  ## CONSUMES
-  gAdvancedFeaturePkgTokenSpaceGuid.PcdAcpiDebugBufferSize  ## CONSUMES
-  gAdvancedFeaturePkgTokenSpaceGuid.PcdAcpiDebugAddress ## PRODUCES
+  gDebugFeaturePkgTokenSpaceGuid.PcdAcpiDebugEnable  ## CONSUMES
+  gDebugFeaturePkgTokenSpaceGuid.PcdAcpiDebugBufferSize  ## CONSUMES
+  gDebugFeaturePkgTokenSpaceGuid.PcdAcpiDebugAddress ## PRODUCES
 
 [Sources]
   AcpiDebug.c
diff --git a/Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebugSmm.inf 
b/Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebugSmm.inf
similarity index 80%
rename from Platform/Intel/AdvancedFeaturePkg/AcpiDebug/AcpiDebugSmm.inf
rename to Platform/Intel/DebugFeaturePkg/AcpiDebug/AcpiDebugSmm.inf
index 

[edk2-devel] [Patch v2 0/3] [edk2-platforms] Add DebugFeaturePkg to keep debug related modules.

2019-05-29 Thread Dong, Eric
Add new package in Platform/Intel/ folder to keep debug related modules.

V2 change:
  Use one gDebugFeaturePkgTokenSpaceGuid for all PCDs in this package.
  Make PCD TokenNumber continuous.

Signed-off-by: Eric Dong 
Cc: Liming Gao 

Eric Dong (3):
  Platform/Intel/DebugFeaturePkg: Add DebugFeaturePkg
  Platform/Intel/DebugFeaturePkg: Add USB3DebugPort related modules.
  Platform/Intel/DebugFeaturePkg/AcpiDebug: Change AcpiDebug module
location.

 Maintainers.txt   |   4 +
 .../AdvancedFeaturePkg/AdvancedFeaturePkg.dec |   6 -
 .../AdvancedFeaturePkg/AdvancedFeaturePkg.dsc |   3 -
 .../AcpiDebug/AcpiDebug.asl   |   0
 .../AcpiDebug/AcpiDebug.c |   0
 .../AcpiDebug/AcpiDebugDxe.inf|   8 +-
 .../AcpiDebug/AcpiDebugSmm.inf|   8 +-
 .../AcpiDebug/Readme.txt  |   0
 .../Intel/DebugFeaturePkg/DebugFeaturePkg.dec |  65 ++
 .../Intel/DebugFeaturePkg/DebugFeaturePkg.dsc |  98 ++
 .../Include/Library/Usb3DebugPortLib.h|  76 ++
 .../Library/Usb3DebugPortParameterLib.h   |  56 ++
 .../Library/Usb3DebugPortLib/MiscServices.c   | 385 
 .../Usb3DebugPortDataTransfer.c   | 892 ++
 .../Usb3DebugPortInitialize.c | 726 ++
 .../Usb3DebugPortLib/Usb3DebugPortLibDxe.c| 454 +
 .../Usb3DebugPortLib/Usb3DebugPortLibDxe.inf  |  55 ++
 .../Usb3DebugPortLibDxeIoMmu.c| 828 
 .../Usb3DebugPortLibDxeIoMmu.inf  |  63 ++
 .../Usb3DebugPortLibInternal.h| 887 +
 .../Usb3DebugPortLib/Usb3DebugPortLibNull.c   | 103 ++
 .../Usb3DebugPortLib/Usb3DebugPortLibNull.inf |  28 +
 .../Usb3DebugPortLib/Usb3DebugPortLibPei.c| 236 +
 .../Usb3DebugPortLib/Usb3DebugPortLibPei.inf  |  48 +
 .../Usb3DebugPortLibPeiIoMmu.c| 440 +
 .../Usb3DebugPortLibPeiIoMmu.inf  |  51 +
 .../Usb3DebugPortParameterLibPcd.c|  58 ++
 .../Usb3DebugPortParameterLibPcd.inf  |  31 +
 28 files changed, 5592 insertions(+), 17 deletions(-)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebug.asl (100%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebug.c (100%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebugDxe.inf (79%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/AcpiDebugSmm.inf (80%)
 rename Platform/Intel/{AdvancedFeaturePkg => 
DebugFeaturePkg}/AcpiDebug/Readme.txt (100%)
 create mode 100644 Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dec
 create mode 100644 Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dsc
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Include/Library/Usb3DebugPortLib.h
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Include/Library/Usb3DebugPortParameterLib.h
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/MiscServices.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortDataTransfer.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortInitialize.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibDxe.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibDxe.inf
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibDxeIoMmu.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibDxeIoMmu.inf
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibInternal.h
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibNull.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibNull.inf
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibPei.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibPei.inf
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibPeiIoMmu.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPortLibPeiIoMmu.inf
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortParameterLibPcd/Usb3DebugPortParameterLibPcd.c
 create mode 100644 
Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortParameterLibPcd/Usb3DebugPortParameterLibPcd.inf

-- 
2.21.0.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41580): https://edk2.groups.io/g/devel/message/41580
Mute This Topic: https://groups.io/mt/31831496/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [FdfSpecification Patch] FDF spec: Fix the issue in Rule section for RAW Type File

2019-05-29 Thread Bob Feng
Patch looks fine.

Reviewed-by: Bob Feng 

-Original Message-
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Liming Gao
Sent: Tuesday, May 28, 2019 11:24 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [FdfSpecification Patch] FDF spec: Fix the issue in Rule 
section for RAW Type File

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1765

FV File Statement clarifies RAW File type with file name only.
But, FFS Rule section doesn't support this syntax. This is an issue in FDF 
spec. Per PI spec, RAW File has no section. It directly includes file data. So, 
FFS Rule section should support this usage.

Signed-off-by: Liming Gao 
---
 3_edk_ii_fdf_file_format/39_[rule]_sections.md | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/3_edk_ii_fdf_file_format/39_[rule]_sections.md 
b/3_edk_ii_fdf_file_format/39_[rule]_sections.md
index 34e767f..d5ec895 100644
--- a/3_edk_ii_fdf_file_format/39_[rule]_sections.md
+++ b/3_edk_ii_fdf_file_format/39_[rule]_sections.md
@@ -125,7 +125,8 @@ Conditional statements may be used anywhere within this 
section.
   ::= ["Fixed" ] ["Checksum" ]
 []
   ::= "Align"   
-  ::= {} {} {}
+  ::= {} {} {} {}
+  ::= "{"  "}"
 ::=  []  
::= {"COMPAT16"} {"PE32"} {"PIC"} {"TE"}
 {"FV_IMAGE"} {"RAW"} {"DXE_DEPEX"} {"UI"}
--
2.13.0.windows.1





-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#41579): https://edk2.groups.io/g/devel/message/41579
Mute This Topic: https://groups.io/mt/31823007/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-



Re: [edk2-devel] [PATCH V5] BaseTools:Make BaseTools support new rules to generate RAW FFS FILE

2019-05-29 Thread Bob Feng
Hi Zhiju,

For the changes,

-def __InfParse__(self, Dict = {}):
+def __InfParse__(self, Dict = None, IsGenFfs=False):

and

-def GetFileList(FfsInf, FileType, FileExtension, Dict = {}, 
IsMakefile=False):
+def GetFileList(FfsInf, FileType, FileExtension, Dict = None, 
IsMakefile=False, SectionType=None):

I think you need to add
If Dict is None:
Dict = {}

In the function body.


Thanks,
Bob

-Original Message-
From: Fan, ZhijuX 
Sent: Wednesday, May 29, 2019 1:30 PM
To: devel@edk2.groups.io
Cc: Gao, Liming ; Feng, Bob C 
Subject: [PATCH V5] BaseTools:Make BaseTools support new rules to generate RAW 
FFS FILE

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1765

If RAW FFS File Rule has no section for its data.For RAW FFS File, directly 
call GenFfs tool to generate FFS file.

Ffs Rule:
[Rule.Common.USER_DEFINED.MicroCode]
  FILE RAW = $(NAMED_GUID) {
$(INF_OUTPUT)/$(MODULE_NAME).bin
  }
[Rule.Common.USER_DEFINED.LOGO]
  FILE RAW = $(NAMED_GUID) {
   |.bmp
  }

As shown in the rule above,if SectionType and FileType not defined, FFS files 
are generated directly, and no other type of file is generated.

The patch is to make the BaseTools support these two rules

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Zhiju.Fan 
---
 BaseTools/Source/Python/Common/DataType.py|  1 +
 BaseTools/Source/Python/GenFds/EfiSection.py  | 22 +-
 BaseTools/Source/Python/GenFds/FdfParser.py   | 14 --
 BaseTools/Source/Python/GenFds/FfsInfStatement.py |  9 ++---
 BaseTools/Source/Python/GenFds/Section.py |  7 ++-
 5 files changed, 46 insertions(+), 7 deletions(-)

diff --git a/BaseTools/Source/Python/Common/DataType.py 
b/BaseTools/Source/Python/Common/DataType.py
index 7cd67bc01a..83ec36c235 100644
--- a/BaseTools/Source/Python/Common/DataType.py
+++ b/BaseTools/Source/Python/Common/DataType.py
@@ -122,6 +122,7 @@ BINARY_FILE_TYPE_VER = 'VER'
 BINARY_FILE_TYPE_UI = 'UI'
 BINARY_FILE_TYPE_BIN = 'BIN'
 BINARY_FILE_TYPE_FV = 'FV'
+BINARY_FILE_TYPE_RAW = 'RAW_BINARY'
 
 PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
 PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
diff --git a/BaseTools/Source/Python/GenFds/EfiSection.py 
b/BaseTools/Source/Python/GenFds/EfiSection.py
index 302f244faf..74f176cfef 100644
--- a/BaseTools/Source/Python/GenFds/EfiSection.py
+++ b/BaseTools/Source/Python/GenFds/EfiSection.py
@@ -93,7 +93,7 @@ class EfiSection (EfiSectionClassObject):
 if '.depex' in SuffixMap:
 FileList.append(Filename)
 else:
-FileList, IsSect = Section.Section.GetFileList(FfsInf, 
self.FileType, self.FileExtension, Dict, IsMakefile=IsMakefile)
+FileList, IsSect = Section.Section.GetFileList(FfsInf, 
+ self.FileType, self.FileExtension, Dict, IsMakefile=IsMakefile, 
+ SectionType=SectionType)
 if IsSect :
 return FileList, self.Alignment
 
@@ -217,6 +217,26 @@ class EfiSection (EfiSectionClassObject):
  Ui=StringData, 
IsMakefile=IsMakefile)
 OutputFileList.append(OutputFile)
 
+#
+# If Section Type is BINARY_FILE_TYPE_RAW
+#
+elif SectionType == BINARY_FILE_TYPE_RAW:
+"""If File List is empty"""
+if FileList == []:
+if self.Optional == True:
+GenFdsGlobalVariable.VerboseLogger("Optional Section don't 
exist!")
+return [], None
+else:
+EdkLogger.error("GenFds", GENFDS_ERROR, "Output 
+ file for %s section could not be found for %s" % (SectionType, 
+ InfFileName))
+
+elif len(FileList) > 1:
+EdkLogger.error("GenFds", GENFDS_ERROR,
+"Files suffixed with %s are not allowed to 
have more than one file in %s[Binaries] section" % (
+self.FileExtension, InfFileName))
+else:
+for File in FileList:
+File = GenFdsGlobalVariable.MacroExtend(File, Dict)
+OutputFileList.append(File)
 
 else:
 """If File List is empty"""
diff --git a/BaseTools/Source/Python/GenFds/FdfParser.py 
b/BaseTools/Source/Python/GenFds/FdfParser.py
index ea1c3eeb30..fb5fd85e0a 100644
--- a/BaseTools/Source/Python/GenFds/FdfParser.py
+++ b/BaseTools/Source/Python/GenFds/FdfParser.py
@@ -3749,8 +3749,19 @@ class FdfParser:
 #
 def _GetEfiSection(self, Obj):
 OldPos = self.GetFileBufferPos()
+EfiSectionObj = EfiSection()
 if not self._GetNextWord():
-return False
+CurrentLine = 
self._CurrentLine()[self.CurrentOffsetWithinLine:].split()[0].strip()
+if self._Token == '{' and Obj.FvFileType == "RAW" and TAB_SPLIT in 
CurrentLine:
+if self._IsToken(TAB_VALUE_SPLIT):
+ 

Re: [edk2-devel] [PATCH V5] BaseTools:Make BaseTools support new rules to generate RAW FFS FILE

2019-05-29 Thread Liming Gao
Tested-by: Liming Gao 

>-Original Message-
>From: Fan, ZhijuX
>Sent: Wednesday, May 29, 2019 1:30 PM
>To: devel@edk2.groups.io
>Cc: Gao, Liming ; Feng, Bob C 
>Subject: [PATCH V5] BaseTools:Make BaseTools support new rules to
>generate RAW FFS FILE
>
>BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1765
>
>If RAW FFS File Rule has no section for its data.For RAW FFS File,
>directly call GenFfs tool to generate FFS file.
>
>Ffs Rule:
>[Rule.Common.USER_DEFINED.MicroCode]
>  FILE RAW = $(NAMED_GUID) {
>$(INF_OUTPUT)/$(MODULE_NAME).bin
>  }
>[Rule.Common.USER_DEFINED.LOGO]
>  FILE RAW = $(NAMED_GUID) {
>   |.bmp
>  }
>
>As shown in the rule above,if SectionType and FileType not defined,
>FFS files are generated directly, and no other type of file is
>generated.
>
>The patch is to make the BaseTools support these two rules
>
>Cc: Bob Feng 
>Cc: Liming Gao 
>Signed-off-by: Zhiju.Fan 
>---
> BaseTools/Source/Python/Common/DataType.py|  1 +
> BaseTools/Source/Python/GenFds/EfiSection.py  | 22
>+-
> BaseTools/Source/Python/GenFds/FdfParser.py   | 14 --
> BaseTools/Source/Python/GenFds/FfsInfStatement.py |  9 ++---
> BaseTools/Source/Python/GenFds/Section.py |  7 ++-
> 5 files changed, 46 insertions(+), 7 deletions(-)
>
>diff --git a/BaseTools/Source/Python/Common/DataType.py
>b/BaseTools/Source/Python/Common/DataType.py
>index 7cd67bc01a..83ec36c235 100644
>--- a/BaseTools/Source/Python/Common/DataType.py
>+++ b/BaseTools/Source/Python/Common/DataType.py
>@@ -122,6 +122,7 @@ BINARY_FILE_TYPE_VER = 'VER'
> BINARY_FILE_TYPE_UI = 'UI'
> BINARY_FILE_TYPE_BIN = 'BIN'
> BINARY_FILE_TYPE_FV = 'FV'
>+BINARY_FILE_TYPE_RAW = 'RAW_BINARY'
>
> PLATFORM_COMPONENT_TYPE_LIBRARY_CLASS = 'LIBRARY_CLASS'
> PLATFORM_COMPONENT_TYPE_MODULE = 'MODULE'
>diff --git a/BaseTools/Source/Python/GenFds/EfiSection.py
>b/BaseTools/Source/Python/GenFds/EfiSection.py
>index 302f244faf..74f176cfef 100644
>--- a/BaseTools/Source/Python/GenFds/EfiSection.py
>+++ b/BaseTools/Source/Python/GenFds/EfiSection.py
>@@ -93,7 +93,7 @@ class EfiSection (EfiSectionClassObject):
> if '.depex' in SuffixMap:
> FileList.append(Filename)
> else:
>-FileList, IsSect = Section.Section.GetFileList(FfsInf, 
>self.FileType,
>self.FileExtension, Dict, IsMakefile=IsMakefile)
>+FileList, IsSect = Section.Section.GetFileList(FfsInf, 
>self.FileType,
>self.FileExtension, Dict, IsMakefile=IsMakefile, SectionType=SectionType)
> if IsSect :
> return FileList, self.Alignment
>
>@@ -217,6 +217,26 @@ class EfiSection (EfiSectionClassObject):
>  Ui=StringData, 
> IsMakefile=IsMakefile)
> OutputFileList.append(OutputFile)
>
>+#
>+# If Section Type is BINARY_FILE_TYPE_RAW
>+#
>+elif SectionType == BINARY_FILE_TYPE_RAW:
>+"""If File List is empty"""
>+if FileList == []:
>+if self.Optional == True:
>+GenFdsGlobalVariable.VerboseLogger("Optional Section don't
>exist!")
>+return [], None
>+else:
>+EdkLogger.error("GenFds", GENFDS_ERROR, "Output file for 
>%s
>section could not be found for %s" % (SectionType, InfFileName))
>+
>+elif len(FileList) > 1:
>+EdkLogger.error("GenFds", GENFDS_ERROR,
>+"Files suffixed with %s are not allowed to 
>have more than
>one file in %s[Binaries] section" % (
>+self.FileExtension, InfFileName))
>+else:
>+for File in FileList:
>+File = GenFdsGlobalVariable.MacroExtend(File, Dict)
>+OutputFileList.append(File)
>
> else:
> """If File List is empty"""
>diff --git a/BaseTools/Source/Python/GenFds/FdfParser.py
>b/BaseTools/Source/Python/GenFds/FdfParser.py
>index ea1c3eeb30..fb5fd85e0a 100644
>--- a/BaseTools/Source/Python/GenFds/FdfParser.py
>+++ b/BaseTools/Source/Python/GenFds/FdfParser.py
>@@ -3749,8 +3749,19 @@ class FdfParser:
> #
> def _GetEfiSection(self, Obj):
> OldPos = self.GetFileBufferPos()
>+EfiSectionObj = EfiSection()
> if not self._GetNextWord():
>-return False
>+CurrentLine =
>self._CurrentLine()[self.CurrentOffsetWithinLine:].split()[0].strip()
>+if self._Token == '{' and Obj.FvFileType == "RAW" and TAB_SPLIT in
>CurrentLine:
>+if self._IsToken(TAB_VALUE_SPLIT):
>+EfiSectionObj.FileExtension = self._GetFileExtension()
>+elif self._GetNextToken():
>+EfiSectionObj.FileName = self._Token
>+EfiSectionObj.SectionType = BINARY_FILE_TYPE_RAW
>+Obj.SectionList.append(EfiSectionObj)
>+  

Re: [edk2-devel] [Patch 0/3] [edk2-platforms] Add DebugFeaturePkg to keep debug related modules.

2019-05-29 Thread Liming Gao
Eric:
  I have some comments. 
1. DebugFeaturePkg DEC/DSC header description should be DebugFeaturePkg instead 
of DebugAdvancedFeaturePkg
2. DebugFeaturePkg can have one gDebugFeaturePkgTokenSpaceGuid for all PCDs . 
You don't need to add another gEfiUsb3DebugPortTokenSpaceGuid. 
3. Please make PCD TokenNumber are continuous. 

Thanks
Liming
>-Original Message-
>From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
>Dong, Eric
>Sent: Wednesday, May 29, 2019 8:48 AM
>To: devel@edk2.groups.io
>Subject: [edk2-devel] [Patch 0/3] [edk2-platforms] Add DebugFeaturePkg to
>keep debug related modules.
>
>Add new package in Platform/Intel/ folder to keep debug related
>modules.
>
>Eric Dong (3):
>  Platform/Intel/DebugFeaturePkg: Add DebugFeaturePkg
>  Platform/Intel/DebugFeaturePkg: Add USB3DebugPort related modules.
>  Platform/Intel/DebugFeaturePkg/AcpiDebug: Change AcpiDebug module
>location.
>
> Maintainers.txt   |   4 +
> .../AdvancedFeaturePkg/AdvancedFeaturePkg.dec |   6 -
> .../AdvancedFeaturePkg/AdvancedFeaturePkg.dsc |   3 -
> .../AcpiDebug/AcpiDebug.asl   |   0
> .../AcpiDebug/AcpiDebug.c |   0
> .../AcpiDebug/AcpiDebugDxe.inf|   8 +-
> .../AcpiDebug/AcpiDebugSmm.inf|   8 +-
> .../AcpiDebug/Readme.txt  |   0
> .../Intel/DebugFeaturePkg/DebugFeaturePkg.dec |  64 ++
> .../Intel/DebugFeaturePkg/DebugFeaturePkg.dsc |  98 ++
> .../Include/Library/Usb3DebugPortLib.h|  76 ++
> .../Library/Usb3DebugPortParameterLib.h   |  56 ++
> .../Library/Usb3DebugPortLib/MiscServices.c   | 385 
> .../Usb3DebugPortDataTransfer.c   | 892 ++
> .../Usb3DebugPortInitialize.c | 726 ++
> .../Usb3DebugPortLib/Usb3DebugPortLibDxe.c| 454 +
> .../Usb3DebugPortLib/Usb3DebugPortLibDxe.inf  |  55 ++
> .../Usb3DebugPortLibDxeIoMmu.c| 828 
> .../Usb3DebugPortLibDxeIoMmu.inf  |  63 ++
> .../Usb3DebugPortLibInternal.h| 887 +
> .../Usb3DebugPortLib/Usb3DebugPortLibNull.c   | 103 ++
> .../Usb3DebugPortLib/Usb3DebugPortLibNull.inf |  28 +
> .../Usb3DebugPortLib/Usb3DebugPortLibPei.c| 236 +
> .../Usb3DebugPortLib/Usb3DebugPortLibPei.inf  |  48 +
> .../Usb3DebugPortLibPeiIoMmu.c| 440 +
> .../Usb3DebugPortLibPeiIoMmu.inf  |  51 +
> .../Usb3DebugPortParameterLibPcd.c|  58 ++
> .../Usb3DebugPortParameterLibPcd.inf  |  31 +
> 28 files changed, 5591 insertions(+), 17 deletions(-)
> rename Platform/Intel/{AdvancedFeaturePkg =>
>DebugFeaturePkg}/AcpiDebug/AcpiDebug.asl (100%)
> rename Platform/Intel/{AdvancedFeaturePkg =>
>DebugFeaturePkg}/AcpiDebug/AcpiDebug.c (100%)
> rename Platform/Intel/{AdvancedFeaturePkg =>
>DebugFeaturePkg}/AcpiDebug/AcpiDebugDxe.inf (79%)
> rename Platform/Intel/{AdvancedFeaturePkg =>
>DebugFeaturePkg}/AcpiDebug/AcpiDebugSmm.inf (80%)
> rename Platform/Intel/{AdvancedFeaturePkg =>
>DebugFeaturePkg}/AcpiDebug/Readme.txt (100%)
> create mode 100644 Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dec
> create mode 100644 Platform/Intel/DebugFeaturePkg/DebugFeaturePkg.dsc
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Include/Library/Usb3DebugPortLib.h
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Include/Library/Usb3DebugPortParameterL
>ib.h
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/MiscServices.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>DataTransfer.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>Initialize.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibDxe.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibDxe.inf
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibDxeIoMmu.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibDxeIoMmu.inf
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibInternal.h
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibNull.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibNull.inf
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibPei.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibPei.inf
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibPeiIoMmu.c
> create mode 100644
>Platform/Intel/DebugFeaturePkg/Library/Usb3DebugPortLib/Usb3DebugPort
>LibPeiIoMmu.inf
> create mode 100644

Re: [edk2-devel] [PATCH] BaseTools/Capsule: Tool to Generate Windows Firmware Update Driver

2019-05-29 Thread Bob Feng
Hi Eric,

Please use "with" statement for the open() calls.

For example,

Replace:
Fd = open("file","w")
Do something
Fd.close

To:
With open("file","w") as fd:
 Do something

Thanks,
Bob

-Original Message-
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Eric Jin
Sent: Tuesday, May 28, 2019 3:11 PM
To: devel@edk2.groups.io
Cc: Feng, Bob C ; Gao, Liming ; 
Kinney, Michael D 
Subject: [edk2-devel] [PATCH] BaseTools/Capsule: Tool to Generate Windows 
Firmware Update Driver

https://bugzilla.tianocore.org/show_bug.cgi?id=1837

The tool is designed to generate Windows Firmware Update Drivers, the input is 
one drivername.cap with related parameters, the output Windows Driver package 
are composed by drivername.cap, drivername.inf and drivername.cat to update the 
single payload in device.

usage: GenerateWindowsDriver [-h] [--output-folder OUTPUTFOLDER]
 [--product-fmp-guid PRODUCTFMPGUID]
 [--capsuleversion-dotstring 
CAPSULEVERSION_DOTSTRING]
 [--capsuleversion-hexstring 
CAPSULEVERSION_HEXSTRING]
 [--product-fw-provider PRODUCTFWPROVIDER]
 [--product-fw-mfg-name PRODUCTFWMFGNAME]
 [--product-fw-desc PRODUCTFWDESC]
 [--capsule-file-name CAPSULEFILENAME]
 [--pfx-file PFXFILE] [--arch ARCH]
 [--operating-system-string OPERATINGSYSTEMSTRING]

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Kinney Michael D 
Signed-off-by: Eric Jin 
---
 BaseTools/Source/Python/Capsule/CatGenerator.py| 155 
+++
 BaseTools/Source/Python/Capsule/GenerateWindowsDriver.py   | 115 
+++
 BaseTools/Source/Python/Capsule/InfGenerator.py| 210 
++
 BaseTools/Source/Python/Capsule/WindowsCapsuleSupportHelper.py | 102 
++
 4 files changed, 582 insertions(+)

diff --git a/BaseTools/Source/Python/Capsule/CatGenerator.py 
b/BaseTools/Source/Python/Capsule/CatGenerator.py
new file mode 100644
index 00..737387c296
--- /dev/null
+++ b/BaseTools/Source/Python/Capsule/CatGenerator.py
@@ -0,0 +1,155 @@
+## @file
+ # Script to generate Cat files for capsule update based on supplied 
+inf file  #  # Copyright (c) 2019, Microsoft Corporation  # Copyright 
+(c) 2019, Intel Corporation. All rights reserved.  # 
+SPDX-License-Identifier: BSD-2-Clause-Patent  #  ##
+
+import os
+import logging
+import datetime
+import subprocess
+import threading
+
+class PropagatingThread(threading.Thread):
+def run(self):
+self.exc = None
+try:
+if hasattr(self, '_Thread__target'):
+# Thread uses name mangling prior to Python 3.
+self.ret = self._Thread__target(*self._Thread__args, 
**self._Thread__kwargs)
+else:
+self.ret = self._target(*self._args, **self._kwargs)
+except BaseException as e:
+self.exc = e
+def join(self, timeout=None):
+super(PropagatingThread, self).join()
+if self.exc:
+ raise self.exc
+return self.ret
+def reader(filepath, outstream, stream):
+f = None
+# open file if caller provided path
+if(filepath):
+f = open(filepath, "w")
+while True:
+s = stream.readline().decode()
+if not s:
+stream.close()
+break
+if(f is not None):
+# write to file if caller provided file
+f.write(s)
+if(outstream is not None):
+# write to stream object if caller provided object
+outstream.write(s)
+logging.info(s.rstrip())
+if(f is not None):
+f.close()
+def RunCmd(cmd, parameters, capture=True, workingdir=None, outfile=None, 
outstream=None, environ=None):
+cmd = cmd.strip('"\'')
+if " " in cmd:
+cmd = '"' + cmd + '"'
+if parameters is not None:
+parameters = parameters.strip()
+cmd += " " + parameters
+starttime = datetime.datetime.now()
+logging.info("Cmd to run is: " + cmd) 
+logging.info("")
+logging.info("--Cmd Output Starting---")
+logging.info("")
+c = subprocess.Popen(cmd, stdout=subprocess.PIPE, 

Re: [edk2-devel] [PATCH] BaseTools:add UniTool.py to Edk2\BaseTools\Scripts

2019-05-29 Thread Bob Feng
Zhiju,

Please use with statement for the open() calling.

Thanks,
Bob

-Original Message-
From: Fan, ZhijuX 
Sent: Wednesday, May 29, 2019 2:09 PM
To: devel@edk2.groups.io
Cc: Gao, Liming ; Feng, Bob C 
Subject: [PATCH] BaseTools:add UniTool.py to Edk2\BaseTools\Scripts

BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1855

UniTool is one python script to generate UQI (Universal Question Identifier) 
unicode string for HII question PROMPT string. UQI string can be used to 
identify each HII question.

This script can be run in both Py2 and Py3.

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Zhiju.Fan 
---
 BaseTools/Scripts/UniTool.py | 490 +++
 1 file changed, 490 insertions(+)
 create mode 100644 BaseTools/Scripts/UniTool.py

diff --git a/BaseTools/Scripts/UniTool.py b/BaseTools/Scripts/UniTool.py new 
file mode 100644 index 00..6faecb9e7e
--- /dev/null
+++ b/BaseTools/Scripts/UniTool.py
@@ -0,0 +1,490 @@
+## @file
+#
+# Function will sync up UQI definitions with uni files based on 
vfi/vfr/hfr/sd/sdi in the tree.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent #
+
+import re, sys, os, getopt, codecs, fnmatch
+
+# global variable declarations
+questionError = False
+uqiList = re.compile('^#string[ \t]+([A-Z_0-9]+)[ \t]+#language[ 
+\t]+uqi[ \t\r\n]+"(?:[x\S]{1,2})([0-9a-fA-F]{4,5})"',re.M).findall
+allUqis = {}
+stringDict = {}
+GlobalVarId = {}
+options = {}
+
+#**
+# description: Prints help information
+#
+# arguments:   none
+#
+# returns: none
+#
+
+def usage () :
+  sys.exit("Syntax:  %s [-b] [-u] [-l] [-x] [-h] [-d 'rootDirectory1'] 
+[-d 'rootDirectory2'] [-d 'rootDirectory3']... [-q e|w] \ 'rootDirectory0' 
'uqiFile'|'uqiFileDirectory' ['excludedDirectory1'] ['excludedDirectory2'] 
['excludedDirectory3']...\n%s" %
+(os.path.basename(sys.argv[0]),
+  """\nFunction will sync up UQI definitions with uni files based 
+on vfi/vfr/hfr/sd/sdi in the tree.\n Required Arguments:
+  'rootdirectory0'   path to root directory
+  'uqiFileDirectory' path to UQI file(UqiList.uni)
+  'uqiFile'  UQI file
+
+Options:
+  -hShow this help
+  -bBuild option returns error if any new UQI needs 
assigning
+based on vfi/vfr/hfr/sd/sdi when no -u option is 
specified
+  -uCreate new UQIs that does not already exist in uqiFile 
for
+any string requiring a UQI based on vfi/vfr/hfr/sd/sdi
+NOTE: 'uqiFile' cannot be readonly!
+  -lLanguage deletion option (keeps only English and uqi)
+moves all UQIs to 'uqiFile'
+NOTE: Uni files cannot be readonly!
+  -xExclude 'rootDirectory'/'excludedDirectory1' &
+'rootDirectory'/'excludedDirectory2'... from UQI list 
build
+NOTE: Cannot be the same as rootDirectory
+  -dAdd multiple root directories to process
+  -qPrint warning(w) or return error(e) if different HII 
questions
+are referring same string token
+
+Return error if any duplicated UQI string or value in UQI list or if no 
+definition for any string referred by HII question when -b or -u is 
+specified
+
+NOTE: Options must be specified before parameters
+"""))
+
+#**
+# description: Get uni file encoding
+#
+# arguments:   filename - name of uni file
+#
+# returns: utf-8 or utf-16
+#
+def GetUniFileEncoding(filename):
+  #
+  # Detect Byte Order Mark at beginning of file.  Default to UTF-8
+  #
+  Encoding = 'utf-8'
+
+  #
+  # Read file
+  #
+  try:
+UniFile = open(filename, mode='rb')
+FileIn = UniFile.read()
+UniFile.close()
+  except:
+return Encoding
+
+  if (FileIn.startswith(codecs.BOM_UTF16_BE) or 
FileIn.startswith(codecs.BOM_UTF16_LE)):
+Encoding = 'utf-16'
+
+  return Encoding
+
+# rewrite function os.path.walk
+def Walk(top, func, arg):
+  try:
+names = os.listdir(top)
+  except os.error:
+return
+  func(arg, top, names)
+  for name in names:
+name = os.path.join(top, name)
+if os.path.isdir(name):
+  Walk(name, func, arg)
+
+#**
+# description: Parses commandline arguments and options
+#  Calls function processUni to build dictionary of strings
+#  Calls other functions according to user specified options
+#
+# arguments:   argv - contains all input from command line
+#   - must contain path to root directory
+#   - may contain options -h, -u, -l, -b or -x before path
+#
+# returns: none
+#
+def main(argv) :
+# Read input 

[edk2-devel] [PATCH] BaseTools:add UniTool.py to Edk2\BaseTools\Scripts

2019-05-29 Thread Fan, ZhijuX
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1855

UniTool is one python script to generate UQI (Universal Question Identifier)
unicode string for HII question PROMPT string. UQI string can be used to
identify each HII question.

This script can be run in both Py2 and Py3.

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Zhiju.Fan 
---
 BaseTools/Scripts/UniTool.py | 490 +++
 1 file changed, 490 insertions(+)
 create mode 100644 BaseTools/Scripts/UniTool.py

diff --git a/BaseTools/Scripts/UniTool.py b/BaseTools/Scripts/UniTool.py
new file mode 100644
index 00..6faecb9e7e
--- /dev/null
+++ b/BaseTools/Scripts/UniTool.py
@@ -0,0 +1,490 @@
+## @file
+#
+# Function will sync up UQI definitions with uni files based on 
vfi/vfr/hfr/sd/sdi in the tree.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+import re, sys, os, getopt, codecs, fnmatch
+
+# global variable declarations
+questionError = False
+uqiList = re.compile('^#string[ \t]+([A-Z_0-9]+)[ \t]+#language[ \t]+uqi[ 
\t\r\n]+"(?:[x\S]{1,2})([0-9a-fA-F]{4,5})"',re.M).findall
+allUqis = {}
+stringDict = {}
+GlobalVarId = {}
+options = {}
+
+#**
+# description: Prints help information
+#
+# arguments:   none
+#
+# returns: none
+#
+
+def usage () :
+  sys.exit("Syntax:  %s [-b] [-u] [-l] [-x] [-h] [-d 'rootDirectory1'] [-d 
'rootDirectory2'] [-d 'rootDirectory3']... [-q e|w] \
+'rootDirectory0' 'uqiFile'|'uqiFileDirectory' ['excludedDirectory1'] 
['excludedDirectory2'] ['excludedDirectory3']...\n%s" %
+(os.path.basename(sys.argv[0]),
+  """\nFunction will sync up UQI definitions with uni files based on 
vfi/vfr/hfr/sd/sdi in the tree.\n
+Required Arguments:
+  'rootdirectory0'   path to root directory
+  'uqiFileDirectory' path to UQI file(UqiList.uni)
+  'uqiFile'  UQI file
+
+Options:
+  -hShow this help
+  -bBuild option returns error if any new UQI needs 
assigning
+based on vfi/vfr/hfr/sd/sdi when no -u option is 
specified
+  -uCreate new UQIs that does not already exist in uqiFile 
for
+any string requiring a UQI based on vfi/vfr/hfr/sd/sdi
+NOTE: 'uqiFile' cannot be readonly!
+  -lLanguage deletion option (keeps only English and uqi)
+moves all UQIs to 'uqiFile'
+NOTE: Uni files cannot be readonly!
+  -xExclude 'rootDirectory'/'excludedDirectory1' &
+'rootDirectory'/'excludedDirectory2'... from UQI list 
build
+NOTE: Cannot be the same as rootDirectory
+  -dAdd multiple root directories to process
+  -qPrint warning(w) or return error(e) if different HII 
questions
+are referring same string token
+
+Return error if any duplicated UQI string or value in UQI list or if no 
definition
+for any string referred by HII question when -b or -u is specified
+
+NOTE: Options must be specified before parameters
+"""))
+
+#**
+# description: Get uni file encoding
+#
+# arguments:   filename - name of uni file
+#
+# returns: utf-8 or utf-16
+#
+def GetUniFileEncoding(filename):
+  #
+  # Detect Byte Order Mark at beginning of file.  Default to UTF-8
+  #
+  Encoding = 'utf-8'
+
+  #
+  # Read file
+  #
+  try:
+UniFile = open(filename, mode='rb')
+FileIn = UniFile.read()
+UniFile.close()
+  except:
+return Encoding
+
+  if (FileIn.startswith(codecs.BOM_UTF16_BE) or 
FileIn.startswith(codecs.BOM_UTF16_LE)):
+Encoding = 'utf-16'
+
+  return Encoding
+
+# rewrite function os.path.walk
+def Walk(top, func, arg):
+  try:
+names = os.listdir(top)
+  except os.error:
+return
+  func(arg, top, names)
+  for name in names:
+name = os.path.join(top, name)
+if os.path.isdir(name):
+  Walk(name, func, arg)
+
+#**
+# description: Parses commandline arguments and options
+#  Calls function processUni to build dictionary of strings
+#  Calls other functions according to user specified options
+#
+# arguments:   argv - contains all input from command line
+#   - must contain path to root directory
+#   - may contain options -h, -u, -l, -b or -x before path
+#
+# returns: none
+#
+def main(argv) :
+# Read input arguments and options
+  global allUqis, uqiList, questionError
+  try:
+opts, args = getopt.getopt(argv[1:], "hulbxd:q:") # each letter is an 
optional argument
+  except getopt.GetoptError:
+usage()
+  try:
+dirNameList = [args[0]]
+QuestionOption = None
+for