Re: [edk2-devel] [PATCH v4] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Ni, Ray
Reviewed-by: Ray Ni 

> -Original Message-
> From: Wu, Hao A 
> Sent: Wednesday, March 25, 2020 1:07 PM
> To: devel@edk2.groups.io
> Cc: Wu, Hao A ; Dong, Eric ; Ni, Ray 
> ; Laszlo Ersek
> ; Kinney, Michael D ; Zeng, 
> Star ; Brian J .
> Johnson 
> Subject: [PATCH v4] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status 
> check interval
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2627
> 
> The commit will introduce a static PCD to specify the periodic interval
> for checking the AP status when MP services StartupAllAPs() and
> StartupThisAP() are being executed in a non-blocking manner. Or in other
> words, specifies the interval for callback function CheckApsStatus().
> 
> The purpose is to provide the platform owners with the ability to choose
> the proper interval value to trigger CheckApsStatus() according to:
> A) The number of processors in the system;
> B) How MP services (StartupAllAPs & StartupThisAP) being used.
> 
> Setting the PCD to a small value means the AP status check callback will
> be trigerred more frequently, it can benefit the performance for the case
> when the BSP uses WaitForEvent() or uses CheckEvent() in a loop to wait
> for AP(s) to complete the task, especially when the task can be finished
> considerably fast on AP(s).
> 
> An example is within function CpuFeaturesInitialize() under
> UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c,
> where BSP will perform the same task with APs and requires all the
> processors to finish the task before BSP proceeds to its next task.
> 
> Setting the PCD to a big value, on the other hand, can reduce the impact
> on BSP by the time being consumed in CheckApsStatus(), especially when the
> number of processors is huge so that the time consumed in CheckApsStatus()
> is not negligible.
> 
> The type of the PCD is UINT32, which means the maximum possible interval
> value can be set to:
> 4,294,967,295 microseconds = 4,295 seconds = 71.58 minutes = 1.19 hours
> which should be sufficient for usage.
> 
> For least impact, the default value of the new PCD will be the same with
> the current interval value. It will be set to 100,000 microseconds, which
> is 100 milliseconds.
> 
> Unitest done:
> A) OS boot successfully;
> B) Use debug message to confirm the 'TriggerTime' parameter for the
>'SetTimer' service is the same before & after this patch.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Laszlo Ersek 
> Cc: Michael D Kinney 
> Cc: Star Zeng 
> Cc: Brian J. Johnson 
> Signed-off-by: Hao A Wu 
> ---
> 
> Notes:
>  V4
>  Avoiding introducing a local variable in InitMpGlobalData().
> 
>  V3
>  A) Use microseconds, instead of milliseconds as the interval unit;
>  B) Use UINT32, instead of UINT64, for the PCD type;
>  C) Address the bug that incorrect 'TriggerTime' parameter was passed into
> the 'SetTimer' service call in V2 patch
> 
>  V2
>  Introduce a PCD to specify the AP status check interval.
> 
> 
>  UefiCpuPkg/UefiCpuPkg.dec |  6 ++
>  UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 20 ++--
>  UefiCpuPkg/Library/MpInitLib/DxeMpLib.c   |  5 +++--
>  UefiCpuPkg/UefiCpuPkg.uni |  5 -
>  4 files changed, 23 insertions(+), 13 deletions(-)
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
> index e91dc68cbe..762badf5d2 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dec
> +++ b/UefiCpuPkg/UefiCpuPkg.dec
> @@ -230,6 +230,12 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
># @Prompt This PCD is the nominal frequency of the core crystal clock in 
> Hz as is CPUID Leaf 0x15:ECX
>
> gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|2400|UINT64|0x32132113
> 
> +  ## Specifies the periodic interval value in microseconds for the status 
> check
> +  #  of APs for StartupAllAPs() and StartupThisAP() executed in non-blocking
> +  #  mode in DXE phase.
> +  # @Prompt Periodic interval value in microseconds for AP status check in 
> DXE.
> +  
> gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckIntervalInMicroSeconds|10|UINT32|0x001E
> +
>  [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
>## Specifies max supported number of Logical Processors.
># @Prompt Configure max supported number of Logical Processors
> diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
> b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> index 45aaa179ff..a51a9ec1d2 100644
> --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> @@ -61,13 +61,13 @@ [Guids]
>gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
> 
>  [Pcd]
> -  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
> CONSUMES
> -  gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## 
> CONSUMES
> -  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## 
> SOMETIMES_CONSUMES
> -  

Re: [edk2-devel] Questions about UEFI MAT / PcdPropertiesTableEnable

2020-03-24 Thread Ni, Ray
> 
> The properties table should not be used. It has been superseded by the memory 
> attributes table, per spec.
> 
> In edk2, the properties table is controlled by the PCD, regardless of the 
> memory attributes table.
> 
> In edk2, the memory attributes table is always produced, regardless of the 
> properties table.
> 
> Please see the discussion under:
> 
> [edk2] [patch 0/7] Add UEFI2.6 MemoryAttributesTable support.
> http://mid.mail-archive.com/1454069539-4056-1-git-send-email-jiewen.yao@intel.com
> 

Laszlo,
I cannot open the URL above. Do you think we could remove properties table?
The existence of both is confusing.

Thanks,
Ray


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Re: [edk2-devel] [edk2-rfc] [RFCv2] code-first process for UEFI-forum specifications

2020-03-24 Thread Ni, Ray
> 
> ## Github
> New repositories will be added for holding the text changes and the source 
> code.
> 
> Specification text changes will be held within the affected source repository,
> in the Github flavour of markdown, in a file (or split across several files)
> with .md suffix.

What's the case when multiple .MD files are needed?

> (This one may break down where we have a specification change affecting 
> multiple
> specifications, but at that point we can track it with multiple BZ entries)

> 
> 
> ## Source code
> In order to ensure draft code does not accidentally leak into production use,
> and to signify when the changeover from draft to final happens, *all* new or
> modified[1] identifiers need to be prefixed with the relevant BZ.
> 
> [1] Modified in a non-backwards-compatible way. If, for example, a statically
> sized array is grown - this does not need to be prefixed. But a tag in a
>   comment would be *highly* recommended.

If a protocol is enhanced to provide more interfaces with increased revision 
number,
would you like the protocol name to be prefixed with BZ?
Or just the new interfaces added to the protocol are prefixed the BZ?
I think just prefixing the new interfaces can meet the purpose.

But the protocol definition is changed, it also needs to be prefixed according 
to this flow.
Can you clarify a bit more?

> 
> ### File names
> New public header files need the prefix. I.e. `Bz1234MyNewProtocol.h`
> Private header files do not need the prefix.
> 
> ### Contents
> 
> The tagging must follow the coding style used by each affected codebase.
> Examples:
> 
> | Released in spec  | Draft version in tree   | Comment   
>  |
> | ---   | --- | ---   
>  |
> | `FunctionName`| `Bz1234FunctionName`|   
>  |
> | `HEADER_MACRO`| `BZ1234_HEADER_MACRO`   |   
>  |

If FunctionName or HEADER_MACRO is defined in non-public header files, I don't
think they require the prefix. Do you agree?
 
> For data structures or enums, any new or non-backwards-compatible structs or
> fields require a prefix. As above, growing an existing array in an existing
> struct requires no prefix.
> 
> | `typedef SOME_STRUCT` | `BZ1234_SOME_STRUCT`| Typedef only [2]  
>  |
> | `StructField` | `Bz1234StructField` | In existing struct[3] 
>  |
> | `typedef SOME_ENUM`   | `BZ1234_SOME_ENUM`  | Typedef only [2]  
>  |
> 
> [2] If the struct or enum definition is separate from the typedef in the 
> public
> header, the definition does not need the prefix.

What does "separate" mean?
Does it mean "struct or enum in the public header BzXXX.h don't need the 
prefix"?
If yes, then I think macros defined in BzXXX.h also don't need the prefix.

> [3] Individual fields in newly added typedefd struct do not need prefix, the
> struct already carried the prefix.
> 
> Variable prefixes indicating global scope ('g' or 'm') go before the BZ 
> prefix.
> 
> | `gSomeGuid`   | `gBz1234SomeGuid`   |   
>  |
> 
> Local identifiers, including module-global ones (m-prefixed) do not require a
> BZ prefix.

I think only the names (struct type name, enum type name, interface name, 
protocol/ppi name)
defined in public header files need the BZ prefix when the public header 
doesn't have prefix.
Right?


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[edk2-devel] [PATCH v4] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Wu, Hao A
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2627

The commit will introduce a static PCD to specify the periodic interval
for checking the AP status when MP services StartupAllAPs() and
StartupThisAP() are being executed in a non-blocking manner. Or in other
words, specifies the interval for callback function CheckApsStatus().

The purpose is to provide the platform owners with the ability to choose
the proper interval value to trigger CheckApsStatus() according to:
A) The number of processors in the system;
B) How MP services (StartupAllAPs & StartupThisAP) being used.

Setting the PCD to a small value means the AP status check callback will
be trigerred more frequently, it can benefit the performance for the case
when the BSP uses WaitForEvent() or uses CheckEvent() in a loop to wait
for AP(s) to complete the task, especially when the task can be finished
considerably fast on AP(s).

An example is within function CpuFeaturesInitialize() under
UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c,
where BSP will perform the same task with APs and requires all the
processors to finish the task before BSP proceeds to its next task.

Setting the PCD to a big value, on the other hand, can reduce the impact
on BSP by the time being consumed in CheckApsStatus(), especially when the
number of processors is huge so that the time consumed in CheckApsStatus()
is not negligible.

The type of the PCD is UINT32, which means the maximum possible interval
value can be set to:
4,294,967,295 microseconds = 4,295 seconds = 71.58 minutes = 1.19 hours
which should be sufficient for usage.

For least impact, the default value of the new PCD will be the same with
the current interval value. It will be set to 100,000 microseconds, which
is 100 milliseconds.

Unitest done:
A) OS boot successfully;
B) Use debug message to confirm the 'TriggerTime' parameter for the
   'SetTimer' service is the same before & after this patch.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Michael D Kinney 
Cc: Star Zeng 
Cc: Brian J. Johnson 
Signed-off-by: Hao A Wu 
---

Notes:
 V4
 Avoiding introducing a local variable in InitMpGlobalData().

 V3
 A) Use microseconds, instead of milliseconds as the interval unit;
 B) Use UINT32, instead of UINT64, for the PCD type;
 C) Address the bug that incorrect 'TriggerTime' parameter was passed into
the 'SetTimer' service call in V2 patch

 V2
 Introduce a PCD to specify the AP status check interval.


 UefiCpuPkg/UefiCpuPkg.dec |  6 ++
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 20 ++--
 UefiCpuPkg/Library/MpInitLib/DxeMpLib.c   |  5 +++--
 UefiCpuPkg/UefiCpuPkg.uni |  5 -
 4 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index e91dc68cbe..762badf5d2 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -230,6 +230,12 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
   # @Prompt This PCD is the nominal frequency of the core crystal clock in Hz 
as is CPUID Leaf 0x15:ECX
   
gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|2400|UINT64|0x32132113
 
+  ## Specifies the periodic interval value in microseconds for the status check
+  #  of APs for StartupAllAPs() and StartupThisAP() executed in non-blocking
+  #  mode in DXE phase.
+  # @Prompt Periodic interval value in microseconds for AP status check in DXE.
+  
gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckIntervalInMicroSeconds|10|UINT32|0x001E
+
 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
   ## Specifies max supported number of Logical Processors.
   # @Prompt Configure max supported number of Logical Processors
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 45aaa179ff..a51a9ec1d2 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -61,13 +61,13 @@ [Guids]
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
 
 [Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## 
SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize  ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode   ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ## 
SOMETIMES_CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## CONSUMES
-
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
CONSUMES
+  

Re: [edk2-devel] [PATCH v3] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Wu, Hao A
> -Original Message-
> From: Ni, Ray
> Sent: Wednesday, March 25, 2020 11:36 AM
> To: Wu, Hao A; devel@edk2.groups.io
> Cc: Dong, Eric; Laszlo Ersek; Kinney, Michael D; Zeng, Star; Brian J . Johnson
> Subject: RE: [PATCH v3] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP
> status check interval
> 
> > +  TriggerTime = EFI_TIMER_PERIOD_MICROSECONDS (
> > +  PcdGet32 (PcdCpuApStatusCheckIntervalInMicroSeconds)
> > +  );
> >Status = gBS->SetTimer (
> >mCheckAllApsEvent,
> >TimerPeriodic,
> > -  AP_CHECK_INTERVAL
> > +  TriggerTime
> >);


Hi Ray,

My intention was to split the logic for easy reading.
So you suggest to avoid adding a local variable, right?

Best Regards,
Hao Wu


> >ASSERT_EFI_ERROR (Status);
> >
> I guess you introduced TriggerTime for debugging purpose.
> But in the final patch, how about removing this local variable TriggerTime?
> 
> Thanks,
> Ray


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Re: [edk2-devel] [PATCH v3] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Ni, Ray
> +  TriggerTime = EFI_TIMER_PERIOD_MICROSECONDS (
> +  PcdGet32 (PcdCpuApStatusCheckIntervalInMicroSeconds)
> +  );
>Status = gBS->SetTimer (
>mCheckAllApsEvent,
>TimerPeriodic,
> -  AP_CHECK_INTERVAL
> +  TriggerTime
>);
>ASSERT_EFI_ERROR (Status);
> 
I guess you introduced TriggerTime for debugging purpose.
But in the final patch, how about removing this local variable TriggerTime?

Thanks,
Ray


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Re: [edk2-devel] Questions about UEFI MAT / PcdPropertiesTableEnable

2020-03-24 Thread Tiger Liu(BJ-RD)
Hi, Laszlo:
Got it.

Thanks

Best wishes,

-邮件原件-
发件人: devel@edk2.groups.io  代表 Laszlo Ersek
发送时间: 2020年3月23日 21:22
收件人: devel@edk2.groups.io; Tiger Liu(BJ-RD) 
主题: Re: [edk2-devel] Questions about UEFI MAT / PcdPropertiesTableEnable

On 03/17/20 10:27, Tiger Liu(BJ-RD) wrote:
> Hi, Experts:
> I have a question about UEFI MAT / PcdPropertiesTableEnable.
> Device protection in Windows Security, standard hardware security requirement 
> is described as below:
> TPM 2.0
> Secure Boot Enabled
> DEP
> UEFI MAT
>
> And UEFI MAT feature is related with PcdPropertiesTableEnable.
>
> But I found the newest UDK kernel, this PCD is still set with FALSE.
>
> So, is there any concerns if setting its default value as TRUE.

The properties table should not be used. It has been superseded by the memory 
attributes table, per spec.

In edk2, the properties table is controlled by the PCD, regardless of the 
memory attributes table.

In edk2, the memory attributes table is always produced, regardless of the 
properties table.

Please see the discussion under:

[edk2] [patch 0/7] Add UEFI2.6 MemoryAttributesTable support.
http://mid.mail-archive.com/1454069539-4056-1-git-send-email-jiewen.yao@intel.com

Thanks
Laszlo






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[edk2-devel] Event: TianoCore Design Meeting - APAC/NAMO - Wednesday, 25 March 2020 #cal-invite

2020-03-24 Thread devel@edk2.groups.io Calendar
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DTSTAMP:20200325T031344Z
ORGANIZER;CN=Ray Ni:mailto:Ray Ni ray...@intel.com
DTSTART:20200325T15Z
DTEND:20200325T16Z
SUMMARY:TianoCore Design Meeting - APAC/NAMO
DESCRIPTION:# TOPIC\n\n* Discuss RISC-V edk2 port (Abner Chang/HPE)\n\n
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 DK2%20Port%20Design%20Architecture.pptx\n\n# Join Zoom Meeting\n\nhttps:/
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[edk2-devel] [PATCH v3] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Wu, Hao A
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2627

The commit will introduce a static PCD to specify the periodic interval
for checking the AP status when MP services StartupAllAPs() and
StartupThisAP() are being executed in a non-blocking manner. Or in other
words, specifies the interval for callback function CheckApsStatus().

The purpose is to provide the platform owners with the ability to choose
the proper interval value to trigger CheckApsStatus() according to:
A) The number of processors in the system;
B) How MP services (StartupAllAPs & StartupThisAP) being used.

Setting the PCD to a small value means the AP status check callback will
be trigerred more frequently, it can benefit the performance for the case
when the BSP uses WaitForEvent() or uses CheckEvent() in a loop to wait
for AP(s) to complete the task, especially when the task can be finished
considerably fast on AP(s).

An example is within function CpuFeaturesInitialize() under
UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c,
where BSP will perform the same task with APs and requires all the
processors to finish the task before BSP proceeds to its next task.

Setting the PCD to a big value, on the other hand, can reduce the impact
on BSP by the time being consumed in CheckApsStatus(), especially when the
number of processors is huge so that the time consumed in CheckApsStatus()
is not negligible.

The type of the PCD is UINT32, which means the maximum possible interval
value can be set to:
4,294,967,295 microseconds = 4,295 seconds = 71.58 minutes = 1.19 hours
which should be sufficient for usage.

For least impact, the default value of the new PCD will be the same with
the current interval value. It will be set to 100,000 microseconds, which
is 100 milliseconds.

Unitest done:
A) OS boot successfully;
B) Use debug message to confirm the 'TriggerTime' parameter for the
   'SetTimer' service is the same before & after this patch.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Michael D Kinney 
Cc: Star Zeng 
Cc: Brian J. Johnson 
Signed-off-by: Hao A Wu 
---

Notes:
 V3
 A) Use microseconds, instead of milliseconds as the interval unit;
 B) Use UINT32, instead of UINT64, for the PCD type;
 C) Address the bug that incorrect 'TriggerTime' parameter was passed into
the 'SetTimer' service call in V2 patch

 V2
 Introduce a PCD to specify the AP status check interval.


 UefiCpuPkg/UefiCpuPkg.dec |  6 ++
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 20 ++--
 UefiCpuPkg/Library/MpInitLib/DxeMpLib.c   |  7 +--
 UefiCpuPkg/UefiCpuPkg.uni |  5 -
 4 files changed, 25 insertions(+), 13 deletions(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index e91dc68cbe..762badf5d2 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -230,6 +230,12 @@ [PcdsFixedAtBuild, PcdsPatchableInModule]
   # @Prompt This PCD is the nominal frequency of the core crystal clock in Hz 
as is CPUID Leaf 0x15:ECX
   
gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency|2400|UINT64|0x32132113
 
+  ## Specifies the periodic interval value in microseconds for the status check
+  #  of APs for StartupAllAPs() and StartupThisAP() executed in non-blocking
+  #  mode in DXE phase.
+  # @Prompt Periodic interval value in microseconds for AP status check in DXE.
+  
gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckIntervalInMicroSeconds|10|UINT32|0x001E
+
 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
   ## Specifies max supported number of Logical Processors.
   # @Prompt Configure max supported number of Logical Processors
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 45aaa179ff..a51a9ec1d2 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -61,13 +61,13 @@ [Guids]
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
 
 [Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds  ## 
SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize  ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode   ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ## 
SOMETIMES_CONSUMES
-  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## CONSUMES
-
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber   ## 
CONSUMES
+  

Re: [edk2-devel] [PATCH v1 1/1] MdeModulePkg/Variable: Return GetVariable() attr if EFI_BUFFER_TOO_SMALL

2020-03-24 Thread Michael Kubacki

Hi Laszlo,

I sent a v2 patch series with that commit reverted as patch 2/2.

Thanks,
Michael

On 3/24/2020 6:57 PM, Laszlo Ersek wrote:

Hello Michael,

On 03/24/20 23:04, Michael Kubacki wrote:

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2062

The UEFI specification v2.8 Errata A Section 8.2 "GetVariable()"
"Attributes" parameter description states:

"If not NULL, a pointer to the memory location to return the
  attributes bitmask for the variable. See 'Related Definitions.'
  If not NULL, then Attributes is set on output both when
  EFI_SUCCESS and when EFI_BUFFER_TOO_SMALL is returned."

The attributes were previously only returned from the implementation
in Variable.c on EFI_SUCCESS. They are now returned on EFI_SUCCESS or
EFI_BUFFER_TOO_SMALL according to spec.

Cc: Bret Barkelew 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Jian J Wang 
Cc: Hao A Wu 
Signed-off-by: Michael Kubacki 
---
  MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c  | 10 
+++---
  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 10 
++
  2 files changed, 13 insertions(+), 7 deletions(-)


per :

Can you please turn this submission into a two-part patch series, and
append a revert of commit 6896efdec270, as second patch?

Thank you,
Laszlo


diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index d23aea4bc712..1e71fc642c76 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -18,6 +18,8 @@
  
  Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.

  (C) Copyright 2015-2018 Hewlett Packard Enterprise Development LP
+Copyright (c) Microsoft Corporation.
+
  SPDX-License-Identifier: BSD-2-Clause-Patent
  
  **/

@@ -2379,9 +2381,6 @@ VariableServiceGetVariable (
  }
  
  CopyMem (Data, GetVariableDataPtr (Variable.CurrPtr, mVariableModuleGlobal->VariableGlobal.AuthFormat), VarDataSize);

-if (Attributes != NULL) {
-  *Attributes = Variable.CurrPtr->Attributes;
-}
  
  *DataSize = VarDataSize;

  UpdateVariableInfo (VariableName, VendorGuid, Variable.Volatile, TRUE, FALSE, 
FALSE, FALSE, );
@@ -2395,6 +2394,11 @@ VariableServiceGetVariable (
}
  
  Done:

+  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
+if (Attributes != NULL && Variable.CurrPtr != NULL) {
+  *Attributes = Variable.CurrPtr->Attributes;
+}
+  }
ReleaseLockOnlyAtBootTime 
(>VariableGlobal.VariableServicesLock);
return Status;
  }
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
index 2cf0ed32ae55..ca833fb0244d 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
@@ -14,6 +14,7 @@
InitCommunicateBuffer() is really function to check the variable data size.
  
  Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.

+Copyright (c) Microsoft Corporation.
  SPDX-License-Identifier: BSD-2-Clause-Patent
  
  **/

@@ -642,10 +643,6 @@ FindVariableInRuntimeCache (
  }
  
  CopyMem (Data, GetVariableDataPtr (RtPtrTrack.CurrPtr, mVariableAuthFormat), TempDataSize);

-if (Attributes != NULL) {
-  *Attributes = RtPtrTrack.CurrPtr->Attributes;
-}
-
  *DataSize = TempDataSize;
  
  UpdateVariableInfo (VariableName, VendorGuid, RtPtrTrack.Volatile, TRUE, FALSE, FALSE, TRUE, );

@@ -661,6 +658,11 @@ FindVariableInRuntimeCache (
}
  
  Done:

+  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
+if (Attributes != NULL && RtPtrTrack.CurrPtr != NULL) {
+  *Attributes = RtPtrTrack.CurrPtr->Attributes;
+}
+  }
mVariableRuntimeCacheReadLock = FALSE;
  
return Status;






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[edk2-devel] [PATCH v2 1/2] MdeModulePkg/Variable: Return GetVariable() attr if EFI_BUFFER_TOO_SMALL

2020-03-24 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2062

The UEFI specification v2.8 Errata A Section 8.2 "GetVariable()"
"Attributes" parameter description states:

"If not NULL, a pointer to the memory location to return the
 attributes bitmask for the variable. See 'Related Definitions.'
 If not NULL, then Attributes is set on output both when
 EFI_SUCCESS and when EFI_BUFFER_TOO_SMALL is returned."

The attributes were previously only returned from the implementation
in Variable.c on EFI_SUCCESS. They are now returned on EFI_SUCCESS or
EFI_BUFFER_TOO_SMALL according to spec.

Cc: Bret Barkelew 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Jian J Wang 
Cc: Hao A Wu 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c  | 10 
+++---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 10 
++
 2 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index d23aea4bc712..1e71fc642c76 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -18,6 +18,8 @@
 
 Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
 (C) Copyright 2015-2018 Hewlett Packard Enterprise Development LP
+Copyright (c) Microsoft Corporation.
+
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -2379,9 +2381,6 @@ VariableServiceGetVariable (
 }
 
 CopyMem (Data, GetVariableDataPtr (Variable.CurrPtr, 
mVariableModuleGlobal->VariableGlobal.AuthFormat), VarDataSize);
-if (Attributes != NULL) {
-  *Attributes = Variable.CurrPtr->Attributes;
-}
 
 *DataSize = VarDataSize;
 UpdateVariableInfo (VariableName, VendorGuid, Variable.Volatile, TRUE, 
FALSE, FALSE, FALSE, );
@@ -2395,6 +2394,11 @@ VariableServiceGetVariable (
   }
 
 Done:
+  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
+if (Attributes != NULL && Variable.CurrPtr != NULL) {
+  *Attributes = Variable.CurrPtr->Attributes;
+}
+  }
   ReleaseLockOnlyAtBootTime 
(>VariableGlobal.VariableServicesLock);
   return Status;
 }
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
index 2cf0ed32ae55..ca833fb0244d 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
@@ -14,6 +14,7 @@
   InitCommunicateBuffer() is really function to check the variable data size.
 
 Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) Microsoft Corporation.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -642,10 +643,6 @@ FindVariableInRuntimeCache (
 }
 
 CopyMem (Data, GetVariableDataPtr (RtPtrTrack.CurrPtr, 
mVariableAuthFormat), TempDataSize);
-if (Attributes != NULL) {
-  *Attributes = RtPtrTrack.CurrPtr->Attributes;
-}
-
 *DataSize = TempDataSize;
 
 UpdateVariableInfo (VariableName, VendorGuid, RtPtrTrack.Volatile, 
TRUE, FALSE, FALSE, TRUE, );
@@ -661,6 +658,11 @@ FindVariableInRuntimeCache (
   }
 
 Done:
+  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
+if (Attributes != NULL && RtPtrTrack.CurrPtr != NULL) {
+  *Attributes = RtPtrTrack.CurrPtr->Attributes;
+}
+  }
   mVariableRuntimeCacheReadLock = FALSE;
 
   return Status;
-- 
2.16.3.windows.1


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[edk2-devel] [PATCH v2 2/2] Revert "NetworkPkg/TlsAuthConfigDxe: fix TlsCaCertificate attributes retrieval"

2020-03-24 Thread Michael Kubacki
From: Michael Kubacki 

This reverts commit 6896efdec2709e530b23c688cf0f31706709a0c5.

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2062

GetVariable() now returns attributes when it fails with
EFI_BUFFER_TOO_SMALL. Therefore, commit 6896efdec270 is
reverted since it is no longer relevant.

Cc: Laszlo Ersek 
Cc: Siyuan Fu 
Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Signed-off-by: Michael Kubacki 
---
 NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigImpl.c | 27 +---
 1 file changed, 1 insertion(+), 26 deletions(-)

diff --git a/NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigImpl.c 
b/NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigImpl.c
index 715bc3a0a941..2481d1098fa3 100644
--- a/NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigImpl.c
+++ b/NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigImpl.c
@@ -657,7 +657,6 @@ EnrollX509toVariable (
   EFI_SIGNATURE_LIST*CACert;
   EFI_SIGNATURE_DATA*CACertData;
   VOID  *Data;
-  VOID  *CurrentData;
   UINTN DataSize;
   UINTN SigDataSize;
   UINT32Attr;
@@ -669,7 +668,6 @@ EnrollX509toVariable (
   CACert= NULL;
   CACertData= NULL;
   Data  = NULL;
-  CurrentData   = NULL;
   Attr  = 0;
 
   Status = ReadFileContent (
@@ -712,30 +710,11 @@ EnrollX509toVariable (
   Status = gRT->GetVariable(
   VariableName,
   ,
-  NULL,
+  ,
   ,
   NULL
   );
   if (Status == EFI_BUFFER_TOO_SMALL) {
-//
-// Per spec, we have to fetch the variable's contents, even though we're
-// only interested in the variable's attributes.
-//
-CurrentData = AllocatePool (DataSize);
-if (CurrentData == NULL) {
-  Status = EFI_OUT_OF_RESOURCES;
-  goto ON_EXIT;
-}
-Status = gRT->GetVariable(
-VariableName,
-,
-,
-,
-CurrentData
-);
-if (EFI_ERROR (Status)) {
-  goto ON_EXIT;
-}
 Attr |= EFI_VARIABLE_APPEND_WRITE;
   } else if (Status == EFI_NOT_FOUND) {
 Attr = TLS_AUTH_CONFIG_VAR_BASE_ATTR;
@@ -766,10 +745,6 @@ ON_EXIT:
 FreePool (Data);
   }
 
-  if (CurrentData != NULL) {
-FreePool (CurrentData);
-  }
-
   if (X509Data != NULL) {
 FreePool (X509Data);
   }
-- 
2.16.3.windows.1


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[edk2-devel] [PATCH v2 0/2] Return GetVariable() attr if EFI_BUFFER_TOO_SMALL

2020-03-24 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2062

This is a two-part patch series to update the GetVariable() implementation
to return Attributes in the case EFI_BUFFER_TOO_SMALL is returned.

* [PATCH v2 1/2] Makes the actual functional change in the variable
  driver implementation.
* [PATCH v2 2/2] Removes a change made in NetworkPkg that worked around the
  previous behavior when EFI_BUFFER_TOO_SMALL is returned.

Cc: Bret Barkelew 
Cc: Laszlo Ersek 
Cc: Siyuan Fu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Maciej Rabeda 
Cc: Jian J Wang 
Cc: Jiaxin Wu 
Cc: Hao A Wu 
Signed-off-by: Michael Kubacki 

Michael Kubacki (2):
  MdeModulePkg/Variable: Return GetVariable() attr if
EFI_BUFFER_TOO_SMALL
  Revert "NetworkPkg/TlsAuthConfigDxe: fix TlsCaCertificate attributes
retrieval"

 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c  | 10 
+---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 10 
+---
 NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigImpl.c| 27 
+---
 3 files changed, 14 insertions(+), 33 deletions(-)

-- 
2.16.3.windows.1


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[edk2-devel] [Patch V2] Features/Intel: Add LogoFeaturePkg to provide logo images and drivers

2020-03-24 Thread Heng Luo
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2584

1. LogoDxe.inf includes a BMP logo in the EFI file,
the driver decodes the BMP file and provide the image
via EDKII_PLATFORM_LOGO_PROTOCOL.
2. JpegLogoDxe.inf includes a JPEG logo in the EFI file,
the driver use EFI_HII_IMAGE_DECODER_PROTOCOL to decode the Jpeg
file and provide the image via EDKII_PLATFORM_LOGO_PROTOCOL.

Cc: Dandan Bi 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Heng Luo 
---

Notes:
v2:
  - Add Cc and Remove Change-Id in commit message

 Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc|   4 +++-
 Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc  |   6 
+-
 Features/Intel/AdvancedFeaturePkg/Include/PostMemory.fdf|   6 
+-
 Features/Intel/AdvancedFeaturePkg/Include/PreMemory.fdf |   6 
+-
 Features/Intel/UserInterface/LogoFeaturePkg/Include/LogoFeature.dsc | 107 
+++
 Features/Intel/UserInterface/LogoFeaturePkg/Include/PostMemory.fdf  |  13 
+
 Features/Intel/UserInterface/LogoFeaturePkg/Include/PreMemory.fdf   |   8 

 Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/JpegLogo.idf|  10 
++
 Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/JpegLogoDxe.inf |  52 

 Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.bmp| Bin 0 -> 
183366 bytes
 Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.c  | 153 
+
 Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.idf|  10 
++
 Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.jpg| Bin 0 -> 
11944 bytes
 Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/LogoDxe.inf |  52 

 Features/Intel/UserInterface/LogoFeaturePkg/LogoFeaturePkg.dec  |  31 
+++
 Features/Intel/UserInterface/LogoFeaturePkg/LogoFeaturePkg.dsc  |  37 
+
 Features/Intel/UserInterface/LogoFeaturePkg/Readme.md   | 129 
+
 17 files changed, 620 insertions(+), 4 deletions(-)

diff --git a/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc 
b/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
index 23e7c6474a..ea879680ba 100644
--- a/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
+++ b/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
@@ -7,7 +7,7 @@
 # 1. Present a consolidated and simplified view of all available advanced 
features to board packages.
 # 2. Provide a simple, single package build for all available advanced 
features.
 #
-# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -46,6 +46,8 @@
   gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable  |TRUE
   gUsb3DebugFeaturePkgTokenSpaceGuid.PcdUsb3DebugFeatureEnable|TRUE
   gUserAuthFeaturePkgTokenSpaceGuid.PcdUserAuthenticationFeatureEnable|TRUE
+  gLogoFeaturePkgTokenSpaceGuid.PcdLogoFeatureEnable  |TRUE
+  gLogoFeaturePkgTokenSpaceGuid.PcdJpgEnable  
|FALSE
 
 #
 # This package builds all advanced features.
diff --git a/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc 
b/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
index 649774edf7..c1bd791525 100644
--- a/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
+++ b/Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc
@@ -4,7 +4,7 @@
 #  This file is intended to be included into another package so advanced 
features
 #  can be conditionally built by enabling the respective feature via its 
FeaturePCD.
 #
-# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -54,3 +54,7 @@
 !if gUserAuthFeaturePkgTokenSpaceGuid.PcdUserAuthenticationFeatureEnable == 
TRUE
   !include UserInterface/UserAuthFeaturePkg/Include/UserAuthFeature.dsc
 !endif
+
+!if gLogoFeaturePkgTokenSpaceGuid.PcdLogoFeatureEnable == TRUE
+  !include UserInterface/LogoFeaturePkg/Include/LogoFeature.dsc
+!endif
diff --git a/Features/Intel/AdvancedFeaturePkg/Include/PostMemory.fdf 
b/Features/Intel/AdvancedFeaturePkg/Include/PostMemory.fdf
index 57b29a42b9..56f6143650 100644
--- a/Features/Intel/AdvancedFeaturePkg/Include/PostMemory.fdf
+++ 

Re: [edk2-devel] [PATCH 1/1] MdePkg/UefiScsiLib: Set FUA bit for synchronous SCSI Write operations

2020-03-24 Thread Zhiguang Liu
Hi Christopher

Could you please give more information about this code change?
For example, which Spec the code change is based on.

Thanks
Zhiguang

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Zurcher, Christopher J
> Sent: Saturday, February 22, 2020 10:12 AM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D ; Wang, Jian J
> ; Gao, Liming 
> Subject: [edk2-devel] [PATCH 1/1] MdePkg/UefiScsiLib: Set FUA bit for
> synchronous SCSI Write operations
> 
> The FUA (Force Unit Access) bit forces data to be written directly to disk
> instead of the write cache. This prevents data from being lost if a shutdown
> or reset is requested immediately after a SCSI write operation.
> 
> Cc: Michael D Kinney 
> Cc: Jian J Wang 
> Cc: Liming Gao 
> Signed-off-by: Christopher J Zurcher 
> ---
>  MdePkg/Library/UefiScsiLib/UefiScsiLib.c | 14 --
>  1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/MdePkg/Library/UefiScsiLib/UefiScsiLib.c
> b/MdePkg/Library/UefiScsiLib/UefiScsiLib.c
> index 13a2a1912c..cf78f131bd 100644
> --- a/MdePkg/Library/UefiScsiLib/UefiScsiLib.c
> +++ b/MdePkg/Library/UefiScsiLib/UefiScsiLib.c
> @@ -1,7 +1,7 @@
>  /** @file
>UEFI SCSI Library implementation
> 
> -  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
> +  Copyright (c) 2006 - 2020, Intel Corporation. All rights
> + reserved.
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
>  **/
> @@ -1055,15 +1055,16 @@ ScsiWrite10Command (
>ZeroMem (, sizeof
> (EFI_SCSI_IO_SCSI_REQUEST_PACKET));
>ZeroMem (Cdb, EFI_SCSI_OP_LENGTH_TEN);
> 
> -  CommandPacket.Timeout = Timeout;
> -  CommandPacket.OutDataBuffer= DataBuffer;
> -  CommandPacket.SenseData   = SenseData;
> -  CommandPacket.OutTransferLength= *DataLength;
> -  CommandPacket.Cdb = Cdb;
> +  CommandPacket.Timeout   = Timeout;
> +  CommandPacket.OutDataBuffer = DataBuffer;
> +  CommandPacket.SenseData = SenseData;
> +  CommandPacket.OutTransferLength = *DataLength;
> +  CommandPacket.Cdb   = Cdb;
>//
>// Fill Cdb for Write (10) Command
>//
>Cdb[0]= EFI_SCSI_OP_WRITE10;
> +  Cdb[1]= BIT3; //FUA bit (Force Unit Access)
>WriteUnaligned32 ((UINT32 *)[2], SwapBytes32 (StartLba));
>WriteUnaligned16 ((UINT16 *)[7], SwapBytes16 ((UINT16)
> SectorSize));
> 
> @@ -1263,6 +1264,7 @@ ScsiWrite16Command (
>// Fill Cdb for Write (16) Command
>//
>Cdb[0]= EFI_SCSI_OP_WRITE16;
> +  Cdb[1]= BIT3; //FUA bit (Force Unit Access)
>WriteUnaligned64 ((UINT64 *)[2], SwapBytes64 (StartLba));
>WriteUnaligned32 ((UINT32 *)[10], SwapBytes32 (SectorSize));
> 
> --
> 2.16.2.windows.1
> 
> 
> 


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Re: [edk2-devel] [PATCH v1 1/1] MdeModulePkg: PcdAcpiExposedTableVersions default for Arm64 platforms

2020-03-24 Thread Samer El-Haj-Mahmoud
Thanks Laszlo,

I will wait for the maintainers to accept the patch, then submit an amended 
version for ArmVirtQemu.

-Original Message-
From: Laszlo Ersek 
Sent: Tuesday, March 24, 2020 7:03 PM
To: Samer El-Haj-Mahmoud ; devel@edk2.groups.io; 
sa...@elhajmahmoud.com
Cc: Dandan Bi ; Liming Gao ; Hao A 
Wu ; Leif Lindholm ; Ard Biesheuvel 

Subject: Re: [edk2-devel] [PATCH v1 1/1] MdeModulePkg: 
PcdAcpiExposedTableVersions default for Arm64 platforms

On 03/23/20 13:53, Samer El-Haj-Mahmoud wrote:
> Thanks Laszlo
>
> I agree. But shouldn't we remove the PCD settings from all Arm64 platforms 
> that have this override value of 0x20?
>
> Namely:
>
> edk2/ArmVirtPkg/ArmVirtQemu.dsc
> edk2-platforms/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> edk2-platforms/Platform/ARM/JunoPkg/ArmJuno.dsc
> edk2-platforms/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> edk2-platforms/Platform/Comcast/RDKQemu/RDKQemu.dsc
> edk2-platforms/Platform/Hisilicon/D06/D06.dsc
> edk2-platforms/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> edk2-platforms/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board
> .dsc edk2-platforms/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> edk2-platforms/Silicon/Socionext/SynQuacer/Acpi.dsc.inc

If you can order the edk2-platforms changes safely after the edk2 DEC file 
change, then yes.

Otherwise, I can't say.

AFAICT, edk2-platforms does not consume edk2 via a git submodule, so the 
ordering looks risky. But I generally don't follow edk2-platforms (which is 
also why I didn't grep its DSC files for the PCD in question), so I really 
don't know how such ordering questions have been dealt with in the past.

Thanks
Laszlo

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[edk2-devel] [PATCH] SecurityPkg/TcgStorageOpalLib: add transaction interface

2020-03-24 Thread chenxia1
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2625

Add the interface OpalStartTransaction.
Add the interface OpalEndTransaction.
Add the interface TcgCreateStartTransaction.
Add the interface TcgCreateEndTransaction.

Change-Id: I9cfa43ce005d65ba65cc6c1ffc8a6b754266189b
Signed-off-by: chenxia1 
---
 SecurityPkg/Include/Library/TcgStorageCoreLib.h|  48 

 SecurityPkg/Library/TcgStorageCoreLib/TcgStorageUtil.c |  72 

 SecurityPkg/Library/TcgStorageOpalLib/TcgStorageOpalCore.c | 114 
++
 3 files changed, 234 insertions(+)

diff --git a/SecurityPkg/Include/Library/TcgStorageCoreLib.h 
b/SecurityPkg/Include/Library/TcgStorageCoreLib.h
index 01a44c667c..451084a01d 100644
--- a/SecurityPkg/Include/Library/TcgStorageCoreLib.h
+++ b/SecurityPkg/Include/Library/TcgStorageCoreLib.h
@@ -1303,6 +1303,54 @@ TcgIsLocked(
   const TCG_LEVEL0_DISCOVERY_HEADER  *Discovery
   );
 
+/**
+
+  Creates ComPacket with StartTransaction.
+
+  @param  [in/out]CreateStructStructure used to add Endsession
+  @param  [in/out]SizeDescribes the size of the entire 
ComPacket (header and payload). Filled out by function.
+  @param  [in]ComId   ComID for the ComPacket
+  @param  [in]ComIdExtension  Extended ComID for the ComPacket
+  @param  [in]HostSessionId Host Session ID for the Packet
+  @param  [in]TpSessionId Tper Session ID for the Packet
+
+**/
+TCG_RESULT
+EFIAPI
+TcgCreateStartTransaction(
+  TCG_CREATE_STRUCT   *CreateStruct,
+  UINT32  *Size,
+  UINT16  ComId,
+  UINT16  ComIdExtension,
+  UINT32  HostSessionId,
+  UINT32  TpSessionId
+  );
+
+/**
+
+  Creates ComPacket with EndTransaction.
+
+  @param  [in/out]CreateStructStructure used to add Endsession
+  @param  [in/out]SizeDescribes the size of the entire 
ComPacket (header and payload). Filled out by function.
+  @param  [in]ComId   ComID for the ComPacket
+  @param  [in]ComIdExtension  Extended ComID for the ComPacket
+  @param  [in]HostSessionId Host Session ID for the Packet
+  @param  [in]TpSessionId Tper Session ID for the Packet
+  @param  [in]Status  Status for the commit or abort action
+
+**/
+TCG_RESULT
+EFIAPI
+TcgCreateEndTransaction(
+  TCG_CREATE_STRUCT   *CreateStruct,
+  UINT32  *Size,
+  UINT16  ComId,
+  UINT16  ComIdExtension,
+  UINT32  HostSessionId,
+  UINT32  TpSessionId,
+  UINT8   Status
+  );
+
 #pragma pack()
 
 
diff --git a/SecurityPkg/Library/TcgStorageCoreLib/TcgStorageUtil.c 
b/SecurityPkg/Library/TcgStorageCoreLib/TcgStorageUtil.c
index ff331bfc8a..503b47 100644
--- a/SecurityPkg/Library/TcgStorageCoreLib/TcgStorageUtil.c
+++ b/SecurityPkg/Library/TcgStorageCoreLib/TcgStorageUtil.c
@@ -899,3 +899,75 @@ TcgIsLocked(
   //
   return FALSE;
 }
+
+/**
+
+  Creates ComPacket with StartTransaction.
+
+  @param  [in/out]CreateStructStructure used to add Endsession
+  @param  [in/out]SizeDescribes the size of the entire 
ComPacket (header and payload). Filled out by function.
+  @param  [in]ComId   ComID for the ComPacket
+  @param  [in]ComIdExtension  Extended ComID for the ComPacket
+  @param  [in]HostSessionId Host Session ID for the Packet
+  @param  [in]TpSessionId Tper Session ID for the Packet
+
+**/
+TCG_RESULT
+EFIAPI
+TcgCreateStartTransaction(
+  TCG_CREATE_STRUCT   *CreateStruct,
+  UINT32  *Size,
+  UINT16  ComId,
+  UINT16  ComIdExtension,
+  UINT32  HostSessionId,
+  UINT32  TpSessionId
+  )
+{
+  ERROR_CHECK(TcgStartComPacket(CreateStruct, ComId, ComIdExtension));
+  ERROR_CHECK(TcgStartPacket(CreateStruct, TpSessionId, HostSessionId, 0x0, 
0x0, 0x0));
+  ERROR_CHECK(TcgStartSubPacket(CreateStruct, 0x0));
+  ERROR_CHECK(TcgAddStartTransaction(CreateStruct));
+  ERROR_CHECK(TcgAddUINT8(CreateStruct, 0x00)); // "Status"
+  ERROR_CHECK(TcgEndSubPacket(CreateStruct));
+  ERROR_CHECK(TcgEndPacket(CreateStruct));
+  ERROR_CHECK(TcgEndComPacket(CreateStruct, Size));
+
+  return TcgResultSuccess;
+}
+
+/**
+
+  Creates ComPacket with EndTransaction.
+
+  @param  [in/out]CreateStructStructure used to add Endsession
+  @param  [in/out]SizeDescribes the size of the entire 
ComPacket (header and payload). Filled out by function.
+  @param  [in]ComId   ComID for the ComPacket
+  @param  [in]ComIdExtension  Extended ComID for the 

Re: [edk2-devel] [PATCH v1 1/1] MdeModulePkg/Variable: Return GetVariable() attr if EFI_BUFFER_TOO_SMALL

2020-03-24 Thread Laszlo Ersek
Hello Michael,

On 03/24/20 23:04, Michael Kubacki wrote:
> From: Michael Kubacki 
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2062
> 
> The UEFI specification v2.8 Errata A Section 8.2 "GetVariable()"
> "Attributes" parameter description states:
> 
> "If not NULL, a pointer to the memory location to return the
>  attributes bitmask for the variable. See 'Related Definitions.'
>  If not NULL, then Attributes is set on output both when
>  EFI_SUCCESS and when EFI_BUFFER_TOO_SMALL is returned."
> 
> The attributes were previously only returned from the implementation
> in Variable.c on EFI_SUCCESS. They are now returned on EFI_SUCCESS or
> EFI_BUFFER_TOO_SMALL according to spec.
> 
> Cc: Bret Barkelew 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Signed-off-by: Michael Kubacki 
> ---
>  MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c  | 10 
> +++---
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 10 
> ++
>  2 files changed, 13 insertions(+), 7 deletions(-)

per :

Can you please turn this submission into a two-part patch series, and
append a revert of commit 6896efdec270, as second patch?

Thank you,
Laszlo

> diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
> b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
> index d23aea4bc712..1e71fc642c76 100644
> --- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
> +++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
> @@ -18,6 +18,8 @@
>  
>  Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
>  (C) Copyright 2015-2018 Hewlett Packard Enterprise Development LP
> +Copyright (c) Microsoft Corporation.
> +
>  SPDX-License-Identifier: BSD-2-Clause-Patent
>  
>  **/
> @@ -2379,9 +2381,6 @@ VariableServiceGetVariable (
>  }
>  
>  CopyMem (Data, GetVariableDataPtr (Variable.CurrPtr, 
> mVariableModuleGlobal->VariableGlobal.AuthFormat), VarDataSize);
> -if (Attributes != NULL) {
> -  *Attributes = Variable.CurrPtr->Attributes;
> -}
>  
>  *DataSize = VarDataSize;
>  UpdateVariableInfo (VariableName, VendorGuid, Variable.Volatile, TRUE, 
> FALSE, FALSE, FALSE, );
> @@ -2395,6 +2394,11 @@ VariableServiceGetVariable (
>}
>  
>  Done:
> +  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
> +if (Attributes != NULL && Variable.CurrPtr != NULL) {
> +  *Attributes = Variable.CurrPtr->Attributes;
> +}
> +  }
>ReleaseLockOnlyAtBootTime 
> (>VariableGlobal.VariableServicesLock);
>return Status;
>  }
> diff --git 
> a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c 
> b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
> index 2cf0ed32ae55..ca833fb0244d 100644
> --- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
> +++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
> @@ -14,6 +14,7 @@
>InitCommunicateBuffer() is really function to check the variable data size.
>  
>  Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
> +Copyright (c) Microsoft Corporation.
>  SPDX-License-Identifier: BSD-2-Clause-Patent
>  
>  **/
> @@ -642,10 +643,6 @@ FindVariableInRuntimeCache (
>  }
>  
>  CopyMem (Data, GetVariableDataPtr (RtPtrTrack.CurrPtr, 
> mVariableAuthFormat), TempDataSize);
> -if (Attributes != NULL) {
> -  *Attributes = RtPtrTrack.CurrPtr->Attributes;
> -}
> -
>  *DataSize = TempDataSize;
>  
>  UpdateVariableInfo (VariableName, VendorGuid, RtPtrTrack.Volatile, 
> TRUE, FALSE, FALSE, TRUE, );
> @@ -661,6 +658,11 @@ FindVariableInRuntimeCache (
>}
>  
>  Done:
> +  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
> +if (Attributes != NULL && RtPtrTrack.CurrPtr != NULL) {
> +  *Attributes = RtPtrTrack.CurrPtr->Attributes;
> +}
> +  }
>mVariableRuntimeCacheReadLock = FALSE;
>  
>return Status;
> 


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Re: [edk2-devel] [PATCH 09/17] OvmfPkg/PvScsiDxe: Backup/Restore PCI attributes on Init/UnInit

2020-03-24 Thread Laszlo Ersek
On 03/24/20 16:35, Liran Alon wrote:
> 
> On 24/03/2020 17:14, Laszlo Ersek wrote:
>> On 03/16/20 16:01, Liran Alon wrote:
>> I'm going to stop reviewing this iteration now; please rework the rest
>> of the series for v2 with this resource management pattern.
>>
>> Thanks!
>> Laszlo
> 
> Thanks for the very detailed review!
> 
> I have read all your comments and understood them. I am working on
> creating a v2 patch-series with all these fixed.
> As the Init/UnInit logic is the only place in which this resource
> management pattern is done, and as patch-series is split
> to small well-defined quite independent patches, can I request that you
> will complete review of all v1 patches?
> 
> I will understand if you are too busy for this, but it will allow me to
> take into account all your aggregated comments on v1
> to hopefully create a perfect v2 patch-series. As I've tried taking into
> account all the comments you gave on Nikita's series.

I ended up doing a superficial run over the rest of the series, before
arriving at this email of yours.

Unfortunately, in the most "meaty" patches, there are many style issues,
and they kept throwing me off. It's difficult to ping-pong between style
remarks and semantics. Basically, in those patches, I'm asking for style
fixes now, so I have a chance at a more substantial review with v2.

Thanks
Laszlo


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Re: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Laszlo Ersek
On 03/24/20 16:59, Kinney, Michael D wrote:
> How was the milliseconds units selected?

I suggested msecs for continuity with the pre-patch unit:

#define  AP_CHECK_INTERVAL (EFI_TIMER_PERIOD_MILLISECONDS (100))

> We have other PCDs that provide timer intervals in 
> 100ns unit and my microseconds.  I would prefer we
> be consistent so platform developers do not have
> to keep track of so many different units for time
> intervals.

Sounds OK to me.

What's more: your suggestion points at a bug in the v2 patch. The patch 
replaces the argument for the gBS->SetTimer() service's "TriggerTime" 
parameter, namely:

   Status = gBS->SetTimer (
   mCheckAllApsEvent,
   TimerPeriodic,
-  AP_CHECK_INTERVAL
+  PcdGet64 (PcdCpuApStatusCheckInterval)
   );

But that parameter is taken in units of 100ns, per spec.

Pre-patch, AP_CHECK_INTERVAL takes that into account:

#define EFI_TIMER_PERIOD_MILLISECONDS(Milliseconds) 
MultU64x32((UINT64)(Milliseconds), 1)

but post-patch, the PCD does not:

+  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStatusCheckInterval|100|UINT64|0x001E

So this patch would shorten the interval by a divisor of 1 at once, namely 
from (100 * 1) * 100ns, to 100 * 100ns.

The fix is to update the PCD comments according to your remark, and to change 
the default PCD value to (100 * 1) = 1000,000.

Thanks,
Laszlo


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Re: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Wu, Hao A
> -Original Message-
> From: Ni, Ray
> Sent: Wednesday, March 25, 2020 8:46 AM
> To: Kinney, Michael D; Zeng, Star; Wu, Hao A; devel@edk2.groups.io
> Cc: Dong, Eric; Laszlo Ersek; Brian J . Johnson
> Subject: RE: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to
> control AP status check interval
> 
> Mike, Hao,
> I searched all edk2 code using regex pattern "Pcd.*Timeout.*", "Pcd.*Timer.*",
> "Pcd.*Delay.*"
> and found below PCDs:
> 
> gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout: in tick unit depending on the
> TimerLib used
> gEfiMdePkgTokenSpaceGuid.PcdUsbTransferTimeoutValue: in 1ms unit
> gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod: in 100ns unit
> 
> gEfiMdeModulePkgTokenSpaceGuid.PcdSataSpinUpDelayInSecForRecoveryPat
> h: in 1s unit
> gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds: in 1us unit
> gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout: in 1us unit
> gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout: in
> 1us unit
> 
> 1 uses timer ticks as unit.
> 1 uses as unit.
> 1 uses ms as unit.
> 3 use us as unit.
> 1 uses 100ns as unit.
> 
> UefiCpuPkg uses us consistently as the unit.
> So how about using us for this PCD as well?
> And don't forget to name the PCD as
> "PcdCpuApStatusCheckIntervalInMicroSeconds" so developers who set the PCD
> can be aware by reading the name.


Hello Ray,

Agree with your suggestion.
I will follow up with this approach and provide a new version of the patch.

Best Regards,
Hao Wu


> 
> Thanks,
> Ray
> 
> > -Original Message-
> > From: Kinney, Michael D 
> > Sent: Tuesday, March 24, 2020 11:59 PM
> > To: Ni, Ray ; Zeng, Star ; Wu, Hao A
> ;
> > devel@edk2.groups.io; Kinney, Michael D 
> > Cc: Dong, Eric ; Laszlo Ersek ;
> Brian J . Johnson 
> > Subject: RE: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to
> control AP status check interval
> >
> > How was the milliseconds units selected?
> >
> > We have other PCDs that provide timer intervals in
> > 100ns unit and my microseconds.  I would prefer we
> > be consistent so platform developers do not have
> > to keep track of so many different units for time
> > intervals.
> >
> > Mike
> >
> > > -Original Message-
> > > From: Ni, Ray 
> > > Sent: Tuesday, March 24, 2020 12:53 AM
> > > To: Zeng, Star ; Wu, Hao A
> > > ; devel@edk2.groups.io
> > > Cc: Dong, Eric ; Laszlo Ersek
> > > ; Kinney, Michael D
> > > ; Brian J . Johnson
> > > 
> > > Subject: RE: [edk2-devel] [PATCH v2]
> > > UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status
> > > check interval
> > >
> > > From the perspective of PCD producer, I agree with Star
> > > to use UINT32.
> > > Internal implementation can be changed to use other
> > > polling methods which don't require UINT64 data type.
> > >
> > > > -Original Message-
> > > > From: Zeng, Star 
> > > > Sent: Tuesday, March 24, 2020 3:29 PM
> > > > To: Wu, Hao A ;
> > > devel@edk2.groups.io
> > > > Cc: Dong, Eric ; Ni, Ray
> > > ; Laszlo Ersek ;
> > > Kinney, Michael D
> > > > ; Brian J . Johnson
> > > ; Zeng, Star
> > > 
> > > > Subject: RE: [edk2-devel] [PATCH v2]
> > > UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status
> > > check interval
> > > >
> > > > > -Original Message-
> > > > > From: Wu, Hao A
> > > > > Sent: Tuesday, March 24, 2020 3:12 PM
> > > > > To: Zeng, Star ;
> > > devel@edk2.groups.io
> > > > > Cc: Dong, Eric ; Ni, Ray
> > > ; Laszlo
> > > > > Ersek ; Kinney, Michael D
> > > > > ; Brian J . Johnson
> > > 
> > > > > Subject: RE: [edk2-devel] [PATCH v2]
> > > UefiCpuPkg/MpInitLib DXE: Add PCD to
> > > > > control AP status check interval
> > > > >
> > > > > > -Original Message-
> > > > > > From: Zeng, Star
> > > > > > Sent: Tuesday, March 24, 2020 3:02 PM
> > > > > > To: devel@edk2.groups.io; Wu, Hao A
> > > > > > Cc: Dong, Eric; Ni, Ray; Laszlo Ersek; Kinney,
> > > Michael D; Brian J .
> > > > > > Johnson; Zeng, Star
> > > > > > Subject: RE: [edk2-devel] [PATCH v2]
> > > UefiCpuPkg/MpInitLib DXE: Add PCD
> > > > > > to control AP status check interval
> > > > > >
> > > > > > The code logic is good to me.
> > > > > > Only minor concern, do we really need the PCD to
> > > be UINT64 type? :)
> > > > >
> > > > >
> > > > > Hi Star,
> > > > >
> > > > > I am thinking the UINT64 type fits with the
> > > parameter for the SetTimer()
> > > > > service in EFI_BOOT_SERVICES when preparing the
> > > patch.
> > > > >
> > > > > If there is concern, I can switch it to other type.
> > > >
> > > > Got your good point.
> > > > For me, UINT32 (h = 4294967295d = 4294967.295
> > > second = 71582.78825 minutes ~=
> > > > 1193.04647083 hours) should be
> > > totally enough.
> > > > I do not insist on that if others think UINT64 is ok.
> > > >
> > > > Thanks,
> > > > Star
> > > >
> > > > >
> > > > > Best Regards,
> > > > > Hao Wu
> > > > >
> > > > >
> > > > > >
> > > > > > Thanks,
> > > > > > Star
> > > > > >
> > > > > > > -Original Message-
> > > > > > 

Re: [edk2-devel] [PATCH 15/17] OvmfPkg/PvScsiDxe: Support sending SCSI request and receive response

2020-03-24 Thread Liran Alon



On 24/03/2020 18:43, Laszlo Ersek wrote:

On 03/16/20 16:01, Liran Alon wrote:

+STATIC
+BOOLEAN
+PvScsiIsReqRingFull (
+  IN CONST PVSCSI_DEV   *Dev
+  )
+{
+  PVSCSI_RINGS_STATE *RingsState;
+  UINT64 ReqNumEntries;
+
+  RingsState = Dev->RingDesc.RingState;
+  ReqNumEntries = 1 << RingsState->ReqNumEntriesLog2;

(5) Wrong for two reasons:

(5a) Based on ReqNumEntries having type UINT64, the shift count may
presumably be larger than 31. But the constant "1" has type "signed int"
(mapping to INT32 in edk2), and so we should never left-shift that by
even 31 positions (we should never shift bits into the sign bit). Let
alone by more than 31 positions.

In other words, the constant should be 1ULL.

(5b) Please use RShiftU64() from BaseLib.
Actually, I have noticed that ReqNumEntries should just be UINT32 and "1 
<<" should be changed to "1U <<".

So I made these changes for v2. Thanks.

@@ -135,7 +492,70 @@ PvScsiPassThru (
IN EFI_EVENT  EventOPTIONAL
)
  {

...

+  Dev->RingDesc.RingState->ReqProdIdx++;
+
+  Status = PvScsiMmioWrite32 (Dev, PVSCSI_REG_OFFSET_KICK_RW_IO, 0);
+  if (EFI_ERROR (Status)) {
+//
+// If kicking the host fails, we must fake a host adapter error.
+// EFI_NOT_READY would save us the effort, but it would also suggest that
+// the caller retry.
+//
+goto FakeHostAdapterError;
+  }

(11) Hmmm. Not really happy about this. It doesn't feel like actual
error handling (= resource release / rollback); we're just factoring out
response composition. That's OK per se, but then it belongs to a helper
function, not a "function epilogue" here.


Ok. I will move it to a helper function in v2.

-Liran



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[edk2-devel] Upcoming Event: TianoCore Bug Triage - APAC / NAMO - Wed, 03/25/2020 9:30am-10:30am #cal-reminder

2020-03-24 Thread devel@edk2.groups.io Calendar
*Reminder:* TianoCore Bug Triage - APAC / NAMO

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Re: [edk2-devel] [PATCH 12/17] OvmfPkg/PvScsiDxe: Reset adapter on init

2020-03-24 Thread Liran Alon



On 24/03/2020 18:00, Laszlo Ersek wrote:

On 03/16/20 16:01, Liran Alon wrote:

+STATIC
+EFI_STATUS
+PvScsiWriteCmdDesc (
+  IN CONST PVSCSI_DEV   *Dev,
+  IN UINT32 Cmd,
+  IN VOID   *Desc,
+  IN UINTN  Length
+  )
+{
+  EFI_STATUS Status;
+  UINTN  LengthInWords;
+  UINT8  *WordPtr;
+  UINT8  *DescEndPtr;
+  UINT32 Word;
+
+  LengthInWords = Length / sizeof (UINT32);

(4) What guarantees that "Length" is a whole multiple of sizeof
(UINT32)?


Nothing.
Besides the fact that all commands passed to this function are indeed 
multiple of sizeof (UINT32).



In this review I have not insisted on including full-blown interface
contracts in the top-level function comment blocks (with @param[in] and
@retval etc).

Thanks for that. I think too it would be an overkill with little value.

But, for this function, it really is unclear.
Will it be sufficient for you if I just replace the prototype with 
something like the following?


/**
  Send PVSCSI command to device
**/
STATIC
EFI_STATUS
PvScsiWriteCmdDesc (
   IN CONST PVSCSI_DEV   *Dev,
   IN UINT32 Cmd,
   IN VOID *Desc,
   IN UINTN   LengthInWords     // Note: Word is UINT32
   )

+
+  if (LengthInWords > PVSCSI_MAX_CMD_DATA_WORDS) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  Status = PvScsiMmioWrite32 (Dev, PVSCSI_REG_OFFSET_COMMAND, Cmd);
+  if (EFI_ERROR (Status)) {
+return Status;
+  }
+
+  WordPtr = Desc;
+  DescEndPtr = WordPtr + Length;
+
+  while (WordPtr != DescEndPtr) {
+//
+// CopyMem() is used to avoid strict-aliasing issues
+//

(5) In edk2, we -- completely intentionally -- disable the enforcement
of the effective type rules / strict aliasing rules. See
"-fno-strict-aliasing" in "BaseTools/Conf/tools_def.template".


+CopyMem (, WordPtr, sizeof (UINT32));
+
+Status = PvScsiMmioWrite32 (Dev, PVSCSI_REG_OFFSET_COMMAND_DATA, Word);
+if (EFI_ERROR (Status)) {
+  return Status;
+}
+
+WordPtr += sizeof (UINT32);
+  }
+
+  return EFI_SUCCESS;
+}

(6) I think the open-coded loop is suboptimal -- the PciIo protocol
seems to offer EfiPciIoWidthFifoUint32 for exactly this purpose (=
advance in the memory buffer, while accessing the same offset in the
BAR).

Have you perhaps tried that?

I actually haven't noticed EfiPciIoWidthFifoUint32 until you mentioned it.
As it seems there isn't even a single line of code in EDK2 that use it. :)
In fact, the only code that use one of the EfiPciIoWidthFifo* is 
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c.

(I can imagine that you ruled it out, due to "Desc" being unaligned. The
UEFI spec does say, "The caller is responsible for any alignment and I/O
width issues which the bus, device, platform, or type of I/O might
require.)

Why is this an issue?
It's easy to document with one-line comment at end of Desc parameter 
deceleration that it must be aligned.
It's also not difficult to modify callers as only a single caller 
actually pass a descriptor (The caller PvScsiInitRings()).
To avoid further style comments, what is the coding convention in EDK2 
to align the "PVSCSI_CMD_DESC_SETUP_RINGS Cmd;" var properly?
In addition, I assume I don't need to add any validation of alignment to 
PvScsiWriteCmdDesc().


-Liran


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[edk2-devel] Updated Event: TianoCore Bug Triage - APAC / NAMO #cal-invite

2020-03-24 Thread devel@edk2.groups.io Calendar
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DTEND;TZID=Asia/Chongqing:20200325T103000
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Re: [edk2-devel] [PATCH] Features/Intel: Add LogoFeaturePkg to provide logo images and drivers

2020-03-24 Thread Heng Luo
Hi Liming,
I have passed build with VS2015, do I have to pass build with GCC5? I have no 
Ubuntu environment so far, is there a easy way to verify the build with GCC5? 

Best Regards
Heng

> -Original Message-
> From: Gao, Liming 
> Sent: Tuesday, March 24, 2020 11:13 PM
> To: devel@edk2.groups.io; Luo, Heng 
> Subject: RE: [edk2-devel] [PATCH] Features/Intel: Add LogoFeaturePkg to
> provide logo images and drivers
> 
> Heng:
>   Please remove Change-Id from the commit message.
> 
>   And, what test have been done for new packages? Do you pass build with
> VS2015 & GCC5?
> 
> Thanks
> Liming
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Heng
> Luo
> > Sent: Thursday, March 19, 2020 11:04 AM
> > To: devel@edk2.groups.io
> > Subject: [edk2-devel] [PATCH] Features/Intel: Add LogoFeaturePkg to
> provide logo images and drivers
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2584
> >
> > 1. LogoDxe.inf includes a BMP logo in the EFI file,
> > the driver decodes the BMP file and provide the image
> > via EDKII_PLATFORM_LOGO_PROTOCOL.
> > 2. JpegLogoDxe.inf includes a JPEG logo in the EFI file,
> > the driver use EFI_HII_IMAGE_DECODER_PROTOCOL to decode the Jpeg
> > file and provide the image via EDKII_PLATFORM_LOGO_PROTOCOL.
> >
> > Change-Id: Ie7b91d34c31b09a86f02634d3a1aa4d39637bb54
> > Signed-off-by: Heng Luo 
> > ---
> >  .../AdvancedFeaturePkg/AdvancedFeaturePkg.dsc |   4 +-
> >  .../Include/AdvancedFeatures.dsc  |   6 +-
> >  .../AdvancedFeaturePkg/Include/PostMemory.fdf |   6 +-
> >  .../AdvancedFeaturePkg/Include/PreMemory.fdf  |   6 +-
> >  .../LogoFeaturePkg/Include/LogoFeature.dsc| 107 
> >  .../LogoFeaturePkg/Include/PostMemory.fdf |  13 ++
> >  .../LogoFeaturePkg/Include/PreMemory.fdf  |   8 +
> >  .../LogoFeaturePkg/LogoDxe/JpegLogo.idf   |  10 ++
> >  .../LogoFeaturePkg/LogoDxe/JpegLogoDxe.inf|  52 ++
> >  .../LogoFeaturePkg/LogoDxe/Logo.bmp   | Bin 0 -> 183366 bytes
> >  .../LogoFeaturePkg/LogoDxe/Logo.c | 153 ++
> >  .../LogoFeaturePkg/LogoDxe/Logo.idf   |  10 ++
> >  .../LogoFeaturePkg/LogoDxe/Logo.jpg   | Bin 0 -> 11944 bytes
> >  .../LogoFeaturePkg/LogoDxe/LogoDxe.inf|  52 ++
> >  .../LogoFeaturePkg/LogoFeaturePkg.dec |  31 
> >  .../LogoFeaturePkg/LogoFeaturePkg.dsc |  37 +
> >  .../UserInterface/LogoFeaturePkg/Readme.md| 129 +++
> >  17 files changed, 620 insertions(+), 4 deletions(-)
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/Include/LogoFeature.dsc
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/Include/PostMemory.fdf
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/Include/PreMemory.fdf
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/JpegLogo.idf
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/JpegLogoDxe.inf
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.bmp
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.c
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.idf
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/Logo.jpg
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoDxe/LogoDxe.inf
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoFeaturePkg.dec
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/LogoFeaturePkg.dsc
> >  create mode 100644
> Features/Intel/UserInterface/LogoFeaturePkg/Readme.md
> >
> > diff --git a/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
> > b/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
> > index 23e7c647..ea879680 100644
> > --- a/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
> > +++ b/Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc
> > @@ -7,7 +7,7 @@
> >  # 1. Present a consolidated and simplified view of all available advanced
> features to board packages.
> >
> >  # 2. Provide a simple, single package build for all available advanced
> features.
> >
> >  #
> >
> > -# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
> >
> > +# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.
> >
> >  #
> >
> >  # SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >  #
> >
> > @@ -46,6 +46,8 @@
> >gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable
> |TRUE
> >
> >gUsb3DebugFeaturePkgTokenSpaceGuid.PcdUsb3DebugFeatureEnable
> |TRUE
> >
> >
> gUserAuthFeaturePkgTokenSpaceGuid.PcdUserAuthenticationFeatureEnable
> |TRUE
> >
> > +  gLogoFeaturePkgTokenSpaceGuid.PcdLogoFeatureEnable
> |TRUE
> >
> > +  gLogoFeaturePkgTokenSpaceGuid.PcdJpgEnable  
> > |FALSE
> >
> >
> >
> >  #
> >
> >  # This package builds all advanced features.
> >
> > diff --git

Re: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status check interval

2020-03-24 Thread Ni, Ray
Mike, Hao,
I searched all edk2 code using regex pattern "Pcd.*Timeout.*", "Pcd.*Timer.*", 
"Pcd.*Delay.*"
and found below PCDs:

gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout: in tick unit depending on the 
TimerLib used
gEfiMdePkgTokenSpaceGuid.PcdUsbTransferTimeoutValue: in 1ms unit
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod: in 100ns unit

gEfiMdeModulePkgTokenSpaceGuid.PcdSataSpinUpDelayInSecForRecoveryPath: in 1s 
unit
gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds: in 1us unit
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout: in 1us unit
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdUsbXhciDebugDetectTimeout: in 1us unit

1 uses timer ticks as unit.
1 uses as unit.
1 uses ms as unit.
3 use us as unit.
1 uses 100ns as unit.

UefiCpuPkg uses us consistently as the unit.
So how about using us for this PCD as well?
And don't forget to name the PCD as "PcdCpuApStatusCheckIntervalInMicroSeconds" 
so developers who set the PCD can be aware by reading the name.

Thanks,
Ray

> -Original Message-
> From: Kinney, Michael D 
> Sent: Tuesday, March 24, 2020 11:59 PM
> To: Ni, Ray ; Zeng, Star ; Wu, Hao A 
> ;
> devel@edk2.groups.io; Kinney, Michael D 
> Cc: Dong, Eric ; Laszlo Ersek ; Brian 
> J . Johnson 
> Subject: RE: [edk2-devel] [PATCH v2] UefiCpuPkg/MpInitLib DXE: Add PCD to 
> control AP status check interval
> 
> How was the milliseconds units selected?
> 
> We have other PCDs that provide timer intervals in
> 100ns unit and my microseconds.  I would prefer we
> be consistent so platform developers do not have
> to keep track of so many different units for time
> intervals.
> 
> Mike
> 
> > -Original Message-
> > From: Ni, Ray 
> > Sent: Tuesday, March 24, 2020 12:53 AM
> > To: Zeng, Star ; Wu, Hao A
> > ; devel@edk2.groups.io
> > Cc: Dong, Eric ; Laszlo Ersek
> > ; Kinney, Michael D
> > ; Brian J . Johnson
> > 
> > Subject: RE: [edk2-devel] [PATCH v2]
> > UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status
> > check interval
> >
> > From the perspective of PCD producer, I agree with Star
> > to use UINT32.
> > Internal implementation can be changed to use other
> > polling methods which don't require UINT64 data type.
> >
> > > -Original Message-
> > > From: Zeng, Star 
> > > Sent: Tuesday, March 24, 2020 3:29 PM
> > > To: Wu, Hao A ;
> > devel@edk2.groups.io
> > > Cc: Dong, Eric ; Ni, Ray
> > ; Laszlo Ersek ;
> > Kinney, Michael D
> > > ; Brian J . Johnson
> > ; Zeng, Star
> > 
> > > Subject: RE: [edk2-devel] [PATCH v2]
> > UefiCpuPkg/MpInitLib DXE: Add PCD to control AP status
> > check interval
> > >
> > > > -Original Message-
> > > > From: Wu, Hao A
> > > > Sent: Tuesday, March 24, 2020 3:12 PM
> > > > To: Zeng, Star ;
> > devel@edk2.groups.io
> > > > Cc: Dong, Eric ; Ni, Ray
> > ; Laszlo
> > > > Ersek ; Kinney, Michael D
> > > > ; Brian J . Johnson
> > 
> > > > Subject: RE: [edk2-devel] [PATCH v2]
> > UefiCpuPkg/MpInitLib DXE: Add PCD to
> > > > control AP status check interval
> > > >
> > > > > -Original Message-
> > > > > From: Zeng, Star
> > > > > Sent: Tuesday, March 24, 2020 3:02 PM
> > > > > To: devel@edk2.groups.io; Wu, Hao A
> > > > > Cc: Dong, Eric; Ni, Ray; Laszlo Ersek; Kinney,
> > Michael D; Brian J .
> > > > > Johnson; Zeng, Star
> > > > > Subject: RE: [edk2-devel] [PATCH v2]
> > UefiCpuPkg/MpInitLib DXE: Add PCD
> > > > > to control AP status check interval
> > > > >
> > > > > The code logic is good to me.
> > > > > Only minor concern, do we really need the PCD to
> > be UINT64 type? :)
> > > >
> > > >
> > > > Hi Star,
> > > >
> > > > I am thinking the UINT64 type fits with the
> > parameter for the SetTimer()
> > > > service in EFI_BOOT_SERVICES when preparing the
> > patch.
> > > >
> > > > If there is concern, I can switch it to other type.
> > >
> > > Got your good point.
> > > For me, UINT32 (h = 4294967295d = 4294967.295
> > second = 71582.78825 minutes ~=
> > > 1193.04647083 hours) should be
> > totally enough.
> > > I do not insist on that if others think UINT64 is ok.
> > >
> > > Thanks,
> > > Star
> > >
> > > >
> > > > Best Regards,
> > > > Hao Wu
> > > >
> > > >
> > > > >
> > > > > Thanks,
> > > > > Star
> > > > >
> > > > > > -Original Message-
> > > > > > From: devel@edk2.groups.io
> > [mailto:devel@edk2.groups.io] On Behalf
> > > > > > Of Wu, Hao A
> > > > > > Sent: Tuesday, March 24, 2020 2:33 PM
> > > > > > To: devel@edk2.groups.io
> > > > > > Cc: Wu, Hao A ; Dong, Eric
> > > > > > ; Ni, Ray
> > ; Laszlo Ersek
> > > > > > ; Kinney, Michael D
> > ;
> > > > Zeng, Star ; Brian J .
> > > > > > Johnson 
> > > > > > Subject: [edk2-devel] [PATCH v2]
> > UefiCpuPkg/MpInitLib DXE: Add PCD
> > > > > > to control AP status check interval
> > > > > >
> > > > > >
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2627
> > > > > >
> > > > > > The commit will introduce a static PCD to
> > specify the periodic
> > > > > > interval for checking the AP status when MP
> > services 

Re: [edk2-devel] Adding Bhyve support into upstream EDK2

2020-03-24 Thread Laszlo Ersek
On 03/24/20 02:34, Rebecca Cran wrote:
> On 3/6/20 6:29 PM, Yao, Jiewen wrote:
>> Can you post the patch? :-)
> 
> Thanks, It's just about ready for review I think. There's perhaps a bit
> more deduplication between BhyvePkg and OvmfPkg to be done.
> 
> Since the patch is 1.7MB, I've uploaded it to
> https://bex.dev/bhyve-edk2-stable202002.diff .

Umm... :) This is way too large, I think.

Just because I indeed recommend creating a separate BhyvePkg, it's
really not advisable to create a complete copy of OvmfPkg, as first
step. I assume most modules can be reused from under OvmfPkg; can't they?

Consider for example ArmVirtPkg. The ArmVirtQemu DSC and FDF files refer
to a bunch of content that resides under OvmfPkg. That's what BhyvePkg
should do too:

- introduce its own DEC, DSC and FDF files,
- reuse everything possible verbatim from under OvmfPkg,
- if changes are necessary:
  - tweak existent OvmfPkg PCDs in the BhyvePkg DSC file,
  - introduce new library instances for library classes,
and link those into OvmfPkg modules (and any other edk2 modules) via
the BhyvePkg DSC file,
  - in the worst case, copy a *small* subset of OvmfPkg modules, and
tweak the source under BhyvePkg.
- add totally BHYVE specific modules (drivers) under BhyvePkg.

Basically any given platform (DSC / FDF) is supposed to cherry-pick
whatever it can reuse from edk2 -- that's why edk2 is a "kit". And
virtual platforms are most welcome to depend on (consume modules from)
OvmfPkg.

Again, it's impossible to tell in advance, but in some cases, the tweaks
might be minimal enough to upstream them into OvmfPkg (conditionally on
a PCD, or conditionally on some small / easy runtime detection of
BHYVE). Then BhyvePkg only has to activate said PCD (or just rely on the
runtme detection). Again, there's no general rule; it depends on how
much the bhyve specifics would complicate the OvmfPkg code.

Thanks,
Laszlo


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Re: [edk2-devel] [PATCH v1 1/1] MdeModulePkg: PcdAcpiExposedTableVersions default for Arm64 platforms

2020-03-24 Thread Laszlo Ersek
On 03/23/20 13:53, Samer El-Haj-Mahmoud wrote:
> Thanks Laszlo
> 
> I agree. But shouldn't we remove the PCD settings from all Arm64 platforms 
> that have this override value of 0x20?
> 
> Namely:
> 
> edk2/ArmVirtPkg/ArmVirtQemu.dsc
> edk2-platforms/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
> edk2-platforms/Platform/ARM/JunoPkg/ArmJuno.dsc
> edk2-platforms/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> edk2-platforms/Platform/Comcast/RDKQemu/RDKQemu.dsc
> edk2-platforms/Platform/Hisilicon/D06/D06.dsc
> edk2-platforms/Platform/LeMaker/CelloBoard/CelloBoard.dsc
> edk2-platforms/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
> edk2-platforms/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> edk2-platforms/Silicon/Socionext/SynQuacer/Acpi.dsc.inc

If you can order the edk2-platforms changes safely after the edk2 DEC
file change, then yes.

Otherwise, I can't say.

AFAICT, edk2-platforms does not consume edk2 via a git submodule, so the
ordering looks risky. But I generally don't follow edk2-platforms (which
is also why I didn't grep its DSC files for the PCD in question), so I
really don't know how such ordering questions have been dealt with in
the past.

Thanks
Laszlo


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[edk2-devel] [PATCH v1 1/1] MdeModulePkg/Variable: Return GetVariable() attr if EFI_BUFFER_TOO_SMALL

2020-03-24 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2062

The UEFI specification v2.8 Errata A Section 8.2 "GetVariable()"
"Attributes" parameter description states:

"If not NULL, a pointer to the memory location to return the
 attributes bitmask for the variable. See 'Related Definitions.'
 If not NULL, then Attributes is set on output both when
 EFI_SUCCESS and when EFI_BUFFER_TOO_SMALL is returned."

The attributes were previously only returned from the implementation
in Variable.c on EFI_SUCCESS. They are now returned on EFI_SUCCESS or
EFI_BUFFER_TOO_SMALL according to spec.

Cc: Bret Barkelew 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Jian J Wang 
Cc: Hao A Wu 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c  | 10 
+++---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 10 
++
 2 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index d23aea4bc712..1e71fc642c76 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -18,6 +18,8 @@
 
 Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
 (C) Copyright 2015-2018 Hewlett Packard Enterprise Development LP
+Copyright (c) Microsoft Corporation.
+
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -2379,9 +2381,6 @@ VariableServiceGetVariable (
 }
 
 CopyMem (Data, GetVariableDataPtr (Variable.CurrPtr, 
mVariableModuleGlobal->VariableGlobal.AuthFormat), VarDataSize);
-if (Attributes != NULL) {
-  *Attributes = Variable.CurrPtr->Attributes;
-}
 
 *DataSize = VarDataSize;
 UpdateVariableInfo (VariableName, VendorGuid, Variable.Volatile, TRUE, 
FALSE, FALSE, FALSE, );
@@ -2395,6 +2394,11 @@ VariableServiceGetVariable (
   }
 
 Done:
+  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
+if (Attributes != NULL && Variable.CurrPtr != NULL) {
+  *Attributes = Variable.CurrPtr->Attributes;
+}
+  }
   ReleaseLockOnlyAtBootTime 
(>VariableGlobal.VariableServicesLock);
   return Status;
 }
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
index 2cf0ed32ae55..ca833fb0244d 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
@@ -14,6 +14,7 @@
   InitCommunicateBuffer() is really function to check the variable data size.
 
 Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) Microsoft Corporation.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -642,10 +643,6 @@ FindVariableInRuntimeCache (
 }
 
 CopyMem (Data, GetVariableDataPtr (RtPtrTrack.CurrPtr, 
mVariableAuthFormat), TempDataSize);
-if (Attributes != NULL) {
-  *Attributes = RtPtrTrack.CurrPtr->Attributes;
-}
-
 *DataSize = TempDataSize;
 
 UpdateVariableInfo (VariableName, VendorGuid, RtPtrTrack.Volatile, 
TRUE, FALSE, FALSE, TRUE, );
@@ -661,6 +658,11 @@ FindVariableInRuntimeCache (
   }
 
 Done:
+  if (Status == EFI_SUCCESS || Status == EFI_BUFFER_TOO_SMALL) {
+if (Attributes != NULL && RtPtrTrack.CurrPtr != NULL) {
+  *Attributes = RtPtrTrack.CurrPtr->Attributes;
+}
+  }
   mVariableRuntimeCacheReadLock = FALSE;
 
   return Status;
-- 
2.16.3.windows.1


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Re: [edk2-devel] [[edk2-platform][PATCH 1/1] Platform/RaspberryPi/RPi4: Enable HTTP Boot

2020-03-24 Thread Samer El-Haj-Mahmoud
Tested with USB NICs (both ASIX AX88772C and Realtek gigabit ethernet). Both 
work pretty well (tested IPv4 and IPv6).

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Ard Biesheuvel 
via Groups.Io
Sent: Tuesday, March 24, 2020 5:55 PM
To: Samer El-Haj-Mahmoud 
Cc: edk2-devel-groups-io ; Leif Lindholm 

Subject: Re: [edk2-devel] [[edk2-platform][PATCH 1/1] 
Platform/RaspberryPi/RPi4: Enable HTTP Boot

On Tue, 24 Mar 2020 at 22:53, Samer El-Haj-Mahmoud  
wrote:
>
> Enable HTTP Boot (with and without TLS) on RPi4
>
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
>
> Signed-off-by: Samer El-Haj-Mahmoud 

Which NIC are you HTTP booting from?

> ---
>  Platform/RaspberryPi/RPi4/RPi4.dsc | 9 +++--
>  1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc
> b/Platform/RaspberryPi/RPi4/RPi4.dsc
> index 2e98c3e16b91..f6b627af279c 100644
> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
> @@ -25,12 +25,6 @@ [Defines]
>SKUID_IDENTIFIER   = DEFAULT
>FLASH_DEFINITION   = 
> Platform/RaspberryPi/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
>
> -  #
> -  # Network definition
> -  #
> -  DEFINE NETWORK_TLS_ENABLE   = FALSE
> -  DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
> -
>#
># Defines for default states.  These can be changed on the command line.
># -D FLAG=VALUE
> @@ -139,6 +133,7 @@ [LibraryClasses.common]
>IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
>BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
>OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
> +  TlsLib|CryptoPkg/Library/TlsLib/TlsLib.inf
>
>#
># Uncomment (and comment out the next line) For RealView Debugger.
> The Standard IO window @@ -358,6 +353,8 @@ [PcdsFixedAtBuild.common]
>
> gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy
> |0x04
>  !endif
>
> +  gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
> +
>  [LibraryClasses.common]
>ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
>ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
> --
> 2.17.1
>



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Re: [edk2-devel] [[edk2-platform][PATCH 1/1] Platform/RaspberryPi/RPi4: Enable HTTP Boot

2020-03-24 Thread Ard Biesheuvel
On Tue, 24 Mar 2020 at 22:53, Samer El-Haj-Mahmoud
 wrote:
>
> Enable HTTP Boot (with and without TLS) on RPi4
>
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
>
> Signed-off-by: Samer El-Haj-Mahmoud 

Which NIC are you HTTP booting from?

> ---
>  Platform/RaspberryPi/RPi4/RPi4.dsc | 9 +++--
>  1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc 
> b/Platform/RaspberryPi/RPi4/RPi4.dsc
> index 2e98c3e16b91..f6b627af279c 100644
> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
> @@ -25,12 +25,6 @@ [Defines]
>SKUID_IDENTIFIER   = DEFAULT
>FLASH_DEFINITION   = 
> Platform/RaspberryPi/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
>
> -  #
> -  # Network definition
> -  #
> -  DEFINE NETWORK_TLS_ENABLE   = FALSE
> -  DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
> -
>#
># Defines for default states.  These can be changed on the command line.
># -D FLAG=VALUE
> @@ -139,6 +133,7 @@ [LibraryClasses.common]
>IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
>BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
>OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
> +  TlsLib|CryptoPkg/Library/TlsLib/TlsLib.inf
>
>#
># Uncomment (and comment out the next line) For RealView Debugger. The 
> Standard IO window
> @@ -358,6 +353,8 @@ [PcdsFixedAtBuild.common]
>gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
>  !endif
>
> +  gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
> +
>  [LibraryClasses.common]
>ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
>ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
> --
> 2.17.1
>

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[edk2-devel] [[edk2-platform][PATCH 1/1] Platform/RaspberryPi/RPi4: Enable HTTP Boot

2020-03-24 Thread Samer El-Haj-Mahmoud
Enable HTTP Boot (with and without TLS) on RPi4

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 

Signed-off-by: Samer El-Haj-Mahmoud 
---
 Platform/RaspberryPi/RPi4/RPi4.dsc | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc 
b/Platform/RaspberryPi/RPi4/RPi4.dsc
index 2e98c3e16b91..f6b627af279c 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -25,12 +25,6 @@ [Defines]
   SKUID_IDENTIFIER   = DEFAULT
   FLASH_DEFINITION   = 
Platform/RaspberryPi/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
 
-  #
-  # Network definition
-  #
-  DEFINE NETWORK_TLS_ENABLE   = FALSE
-  DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
-
   #
   # Defines for default states.  These can be changed on the command line.
   # -D FLAG=VALUE
@@ -139,6 +133,7 @@ [LibraryClasses.common]
   IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
   OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+  TlsLib|CryptoPkg/Library/TlsLib/TlsLib.inf
 
   #
   # Uncomment (and comment out the next line) For RealView Debugger. The 
Standard IO window
@@ -358,6 +353,8 @@ [PcdsFixedAtBuild.common]
   gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
 !endif
 
+  gEfiNetworkPkgTokenSpaceGuid.PcdAllowHttpConnections|TRUE
+
 [LibraryClasses.common]
   ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
   ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
-- 
2.17.1


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Re: [edk2-devel] EDK II Python development process specification -draft

2020-03-24 Thread Purma, Kondal R
Thanks for the feedback and your view points Bob. I totally agree on your 
points and the  base tools issues.
I think together we can fix the issues you mentioned and apply best software 
design principles to  base tools .

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[edk2-devel] [PATCH v1 1/1] ArmPlatformPkg/ArmPlatformPkg.dsc: Add missing components

2020-03-24 Thread Michael Kubacki
From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2575

The following components are currently missing from the [Components]
section of ArmPlatformPkg.dsc:
  * ArmPlatformPkg/Library/HdLcd/HdLcd.inf
  * ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.inf

This commit includes the components in the package DSC build.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Signed-off-by: Michael Kubacki 
---
 ArmPlatformPkg/ArmPlatformPkg.dsc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dsc 
b/ArmPlatformPkg/ArmPlatformPkg.dsc
index 11b1672501ce..b19fa98be0ba 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg.dsc
@@ -4,6 +4,7 @@
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
 # Copyright (c) 2011 - 2018, ARM Ltd. All rights reserved.
 # Copyright (c) 2016 - 2017, Linaro Ltd. All rights reserved.
+# Copyright (c) Microsoft Corporation.
 #
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -95,6 +96,7 @@
 
   ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.inf
   ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
+  ArmPlatformPkg/Library/HdLcd/HdLcd.inf
   ArmPlatformPkg/Library/LcdHwNullLib/LcdHwNullLib.inf
   ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.inf
   ArmPlatformPkg/Library/NorFlashPlatformNullLib/NorFlashPlatformNullLib.inf
@@ -102,6 +104,7 @@
   ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
   ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
   ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.inf
+  ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.inf
   ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
 
   ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
-- 
2.16.3.windows.1


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[edk2-devel] [PATCH v6 35/42] OvmfPkg/Sec: Enable cache early to speed up booting

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Currently, the OVMF code relies on the hypervisor to enable the cache
support on the processor in order to improve the boot speed. However,
with SEV-ES, the hypervisor is not allowed to change the CR0 register
to enable caching.

Update the OVMF Sec support to enable caching in order to improve the
boot speed when running as an SEV-ES guest.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Sec/SecMain.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c
index 1dd185aabc8a..fa66ced816dd 100644
--- a/OvmfPkg/Sec/SecMain.c
+++ b/OvmfPkg/Sec/SecMain.c
@@ -877,6 +877,13 @@ SecCoreStartupWithStack (
 // For non SEV-ES guests, just load the IDTR.
 //
 AsmWriteIdtr ();
+  } else {
+//
+// Under SEV-ES, the hypervisor can't modify CR0 and so can't enable
+// caching in order to speed up the boot. Enable caching early for
+// an SEV-ES guest.
+//
+AsmEnableCache ();
   }
 
   DEBUG ((EFI_D_INFO,
-- 
2.17.1


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[edk2-devel] [PATCH v6 41/42] OvmfPkg: Move the GHCB allocations into reserved memory

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

After having transitioned from UEFI to the OS, the OS will need to boot
the APs. For an SEV-ES guest, the APs will have been parked by UEFI using
GHCB pages allocated by UEFI. The hypervisor will write to the GHCB
SW_EXITINFO2 field of the GHCB when the AP is booted. As a result, the
GHCB pages must be marked reserved so that the OS does not attempt to use
them and experience memory corruption because of the hypervisor write.

Change the GHCB allocation from the default boot services memory to
reserved memory.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/PlatformPei/AmdSev.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
index 38885de359af..2b6c965808e9 100644
--- a/OvmfPkg/PlatformPei/AmdSev.c
+++ b/OvmfPkg/PlatformPei/AmdSev.c
@@ -51,9 +51,11 @@ AmdSevEsInitialize (
 
   //
   // Allocate GHCB and per-CPU variable pages.
+  //   Since the pages must survive across the UEFI to OS transition
+  //   make them reserved.
   //
   GhcbPageCount = mMaxCpuCount * 2;
-  GhcbBase = AllocatePages (GhcbPageCount);
+  GhcbBase = AllocateReservedPages (GhcbPageCount);
   ASSERT (GhcbBase != NULL);
 
   GhcbBasePa = (PHYSICAL_ADDRESS)(UINTN) GhcbBase;
-- 
2.17.1


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[edk2-devel] [PATCH v6 42/42] UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Before UEFI transfers control to the OS, it must park the AP. This is
done using the AsmRelocateApLoop function to transition into 32-bit
non-paging mode. For an SEV-ES guest, a few additional things must be
done:
  - AsmRelocateApLoop must be updated to support SEV-ES. This means
performing a VMGEXIT AP Reset Hold instead of an MWAIT or HLT loop.
  - Since the AP must transition to real mode, a small routine is copied
to the WakeupBuffer area. Since the WakeupBuffer will be used by
the AP during OS booting, it must be placed in reserved memory.
Additionally, the AP stack must be located where it can be accessed
in real mode.
  - Once the AP is in real mode it will transfer control to the
destination specified by the OS in the SEV-ES AP Jump Table. The
SEV-ES AP Jump Table address is saved by the hypervisor for the OS
using the GHCB VMGEXIT AP Jump Table exit code.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/Library/MpInitLib/MpLib.h  |   8 +-
 UefiCpuPkg/Library/MpInitLib/DxeMpLib.c   |  44 +-
 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 131 --
 3 files changed, 166 insertions(+), 17 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h 
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 56bfd9cc253c..0cc92d011bd8 100755
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -292,7 +292,8 @@ struct _CPU_MP_DATA {
   UINT64 GhcbBase;
 };
 
-#define AP_RESET_STACK_SIZE 64
+#define AP_SAFE_STACK_SIZE  128
+#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE
 
 #pragma pack(1)
 
@@ -348,8 +349,11 @@ VOID
   IN BOOLEAN MwaitSupport,
   IN UINTN   ApTargetCState,
   IN UINTN   PmCodeSegment,
+  IN UINTN   Pm16CodeSegment,
   IN UINTN   TopOfApStack,
-  IN UINTN   NumberToFinish
+  IN UINTN   NumberToFinish,
+  IN UINTN   SevEsAPJumpTable,
+  IN UINTN   WakeupBuffer
   );
 
 /**
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c 
b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
index 8510a13145f3..db15f88a3f29 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
@@ -12,13 +12,13 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
 #include 
 
 #define  AP_CHECK_INTERVAL (EFI_TIMER_PERIOD_MILLISECONDS (100))
-#define  AP_SAFE_STACK_SIZE128
 
 CPU_MP_DATA  *mCpuMpData = NULL;
 EFI_EVENTmCheckAllApsEvent = NULL;
@@ -86,6 +86,13 @@ GetWakeupBuffer (
 {
   EFI_STATUS  Status;
   EFI_PHYSICAL_ADDRESSStartAddress;
+  EFI_MEMORY_TYPE MemoryType;
+
+  if (PcdGetBool (PcdSevEsIsEnabled)) {
+MemoryType = EfiReservedMemoryType;
+  } else {
+MemoryType = EfiBootServicesData;
+  }
 
   //
   // Try to allocate buffer below 1M for waking vector.
@@ -98,7 +105,7 @@ GetWakeupBuffer (
   StartAddress = 0x88000;
   Status = gBS->AllocatePages (
   AllocateMaxAddress,
-  EfiBootServicesData,
+  MemoryType,
   EFI_SIZE_TO_PAGES (WakeupBufferSize),
   
   );
@@ -177,6 +184,11 @@ GetSevEsAPMemory (
 
   DEBUG ((DEBUG_INFO, "Dxe: SevEsAPMemory = %lx\n", (UINTN) StartAddress));
 
+  //
+  // Save the SevEsAPMemory as the AP jump table.
+  //
+  VmgExitSetAPJumpTable (StartAddress);
+
   return (UINTN) StartAddress;
 }
 
@@ -331,17 +343,26 @@ RelocateApLoop (
   BOOLEANMwaitSupport;
   ASM_RELOCATE_AP_LOOP   AsmRelocateApLoopFunc;
   UINTN  ProcessorNumber;
+  UINTN  StackStart;
 
   MpInitLibWhoAmI ();
   CpuMpData= GetCpuMpData ();
   MwaitSupport = IsMwaitSupport ();
+  if (CpuMpData->SevEsIsEnabled) {
+StackStart = CpuMpData->SevEsAPResetStackStart;
+  } else {
+StackStart = mReservedTopOfApStack;
+  }
   AsmRelocateApLoopFunc = (ASM_RELOCATE_AP_LOOP) (UINTN) mReservedApLoopFunc;
   AsmRelocateApLoopFunc (
 MwaitSupport,
 CpuMpData->ApTargetCState,
 CpuMpData->PmCodeSegment,
-mReservedTopOfApStack - ProcessorNumber * AP_SAFE_STACK_SIZE,
-(UINTN) 
+CpuMpData->Pm16CodeSegment,
+StackStart - ProcessorNumber * AP_SAFE_STACK_SIZE,
+(UINTN) ,
+CpuMpData->SevEsAPBuffer,
+CpuMpData->WakeupBuffer
 );
   //
   // It should never reach here
@@ -375,6 +396,21 @@ MpInitChangeApLoopCallback (
   while (mNumberToFinish > 0) {
 CpuPause ();
   }
+
+  if (CpuMpData->SevEsIsEnabled && (CpuMpData->WakeupBuffer != (UINTN) -1)) {
+//
+// There are APs present. Re-use reserved memory area below 1MB from
+// WakeupBuffer as the area to be used for transitioning to 16-bit mode
+// in support of booting of the AP by an OS.
+//
+CopyMem (
+  (VOID *) 

Re: [EXTERNAL] [edk2-devel] [PATCH v4 1/3] SecurityPkg: add RpmcLib and VariableKeyLib public headers

2020-03-24 Thread Bret Barkelew via Groups.Io
Is there a reason this needs to be called “VariableKeyLib” rather than any 
other “KeyLib”? It seems general-purpose as an interface.

- Bret


From: devel@edk2.groups.io  on behalf of Wang, Jian J via 
Groups.Io 
Sent: Monday, March 23, 2020 11:35:21 PM
To: devel@edk2.groups.io 
Cc: Jiewen Yao ; Chao Zhang ; 
Nishant C Mistry 
Subject: [EXTERNAL] [edk2-devel] [PATCH v4 1/3] SecurityPkg: add RpmcLib and 
VariableKeyLib public headers

> v4: remove CounterId which should not be exposed

REF: 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2594data=02%7C01%7Cbret.barkelew%40microsoft.com%7C3e34ac4a40d94c82e86b08d7cfbd8b82%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637206285305504454sdata=wCxxsc6cc%2Ffduq88XOZOZv6debpAQMZiIdsFjD0zHXE%3Dreserved=0

RpmcLib.h and VariableKeyLib.h are header files required to access RPMC
device and Key generator from platform. They will be used to ensure the
integrity and confidentiality of NV variables.

Cc: Jiewen Yao 
Cc: Chao Zhang 
Cc: Nishant C Mistry 
Signed-off-by: Jian J Wang 
---
 SecurityPkg/Include/Library/RpmcLib.h| 42 ++
 SecurityPkg/Include/Library/VariableKeyLib.h | 59 
 SecurityPkg/SecurityPkg.dec  |  8 +++
 3 files changed, 109 insertions(+)
 create mode 100644 SecurityPkg/Include/Library/RpmcLib.h
 create mode 100644 SecurityPkg/Include/Library/VariableKeyLib.h

diff --git a/SecurityPkg/Include/Library/RpmcLib.h 
b/SecurityPkg/Include/Library/RpmcLib.h
new file mode 100644
index 00..8e3868516c
--- /dev/null
+++ b/SecurityPkg/Include/Library/RpmcLib.h
@@ -0,0 +1,42 @@
+/** @file

+  Public definitions for the Replay Protected Monotonic Counter (RPMC) Library.

+

+Copyright (c) 2020, Intel Corporation. All rights reserved.

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _RPMC_LIB_H_

+#define _RPMC_LIB_H_

+

+#include 

+

+/**

+  Requests the monotonic counter from the designated RPMC counter.

+

+  @param[out]   CounterValueA pointer to a buffer to store the 
RPMC value.

+

+  @retval   EFI_SUCCESS The operation completed successfully.

+  @retval   EFI_DEVICE_ERRORA device error occurred while 
attempting to update the counter.

+  @retval   EFI_UNSUPPORTED The operation is un-supported.

+**/

+EFI_STATUS

+EFIAPI

+RequestMonotonicCounter (

+  OUT UINT32  *CounterValue

+  );

+

+/**

+  Increments the monotonic counter in the SPI flash device by 1.

+

+  @retval   EFI_SUCCESS The operation completed successfully.

+  @retval   EFI_DEVICE_ERRORA device error occurred while 
attempting to update the counter.

+  @retval   EFI_UNSUPPORTED The operation is un-supported.

+**/

+EFI_STATUS

+EFIAPI

+IncrementMonotonicCounter (

+  VOID

+  );

+

+#endif
\ No newline at end of file
diff --git a/SecurityPkg/Include/Library/VariableKeyLib.h 
b/SecurityPkg/Include/Library/VariableKeyLib.h
new file mode 100644
index 00..fe642b3d66
--- /dev/null
+++ b/SecurityPkg/Include/Library/VariableKeyLib.h
@@ -0,0 +1,59 @@
+/** @file

+  Public definitions for Variable Key Library.

+

+Copyright (c) 2020, Intel Corporation. All rights reserved.

+SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef _VARIABLE_KEY_LIB_H_

+#define _VARIABLE_KEY_LIB_H_

+

+#include 

+

+/**

+  Retrieves the variable root key.

+

+  @param[out] VariableRootKey A pointer to pointer for the 
variable root key buffer.

+  @param[in,out]  VariableRootKeySize The size in bytes of the variable 
root key.

+

+  @retval   EFI_SUCCESS The variable root key was returned.

+  @retval   EFI_DEVICE_ERRORAn error occurred while attempting to 
get the variable root key.

+  @retval   EFI_ACCESS_DENIED   The function was invoked after locking 
the key interface.

+  @retval   EFI_UNSUPPORTED The variable root key is not supported 
in the current boot configuration.

+**/

+EFI_STATUS

+EFIAPI

+GetVariableRootKey (

+  OUT VOID**VariableRootKey,

+  IN  OUT UINTN   *VariableRootKeySize

+  );

+

+/**

+  Regenerates the variable root key.

+

+  @retval   EFI_SUCCESS The variable root key was regenerated 
successfully.

+  @retval   EFI_DEVICE_ERRORAn error occurred while attempting to 
regenerate the root key.

+  @retval   EFI_ACCESS_DENIED   The function was invoked after locking 
the key interface.

+  @retval   EFI_UNSUPPORTED Key regeneration is not supported in 
the current boot configuration.

+**/

+EFI_STATUS

+EFIAPI

+RegenerateKey (

+  VOID

+  );

+

+/**

+  Locks the regenerate key interface.

+

+  @retval   EFI_SUCCESS The key interface was locked 
successfully.

+  @retval   EFI_UNSUPPORTED Locking the key interface is not 
supported in the 

[edk2-devel] [PATCH v6 36/42] OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Bypass flash detection with SEV-ES is enabled

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

The flash detection routine will attempt to determine how the flash
device behaves (e.g. ROM, RAM, Flash). But when SEV-ES is enabled and
the flash device behaves as a ROM device (meaning it is marked read-only
by the hypervisor), this check may result in an infinite nested page fault
because of the attempted write. Since the instruction cannot be emulated
when SEV-ES is enabled, the RIP is never advanced, resulting in repeated
nested page faults.

When SEV-ES is enabled, exit the flash detection early and assume that
the FD behaves as Flash. This will result in QemuFlashWrite() being called
to store EFI variables, which will also result in an infinite nested page
fault when the write is performed. In this case, update QemuFlashWrite()
to use the VmgMmioWrite function from the VmgExitLib library to have the
hypervisor perform the write without having to emulate the instruction.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../FvbServicesRuntimeDxe.inf |  2 ++
 .../QemuFlash.h   |  6 +
 .../QemuFlash.c   | 23 ---
 .../QemuFlashDxe.c| 15 
 .../QemuFlashSmm.c|  9 
 5 files changed, 52 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf 
b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
index 72cabba4357d..8bb2325157ea 100644
--- a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
+++ b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
@@ -38,6 +38,7 @@ [Sources]
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
   OvmfPkg/OvmfPkg.dec
 
 [LibraryClasses]
@@ -52,6 +53,7 @@ [LibraryClasses]
   UefiBootServicesTableLib
   UefiDriverEntryPoint
   UefiRuntimeLib
+  VmgExitLib
 
 [Guids]
   gEfiEventVirtualAddressChangeGuid   # ALWAYS_CONSUMED
diff --git a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.h 
b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.h
index f1afabcbe6ae..19ac1f733279 100644
--- a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.h
+++ b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.h
@@ -89,5 +89,11 @@ QemuFlashBeforeProbe (
   IN  UINTN   FdBlockCount
   );
 
+VOID
+QemuFlashPtrWrite (
+  INvolatile UINT8*Ptr,
+  INUINT8 Value
+  );
+
 #endif
 
diff --git a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c 
b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c
index c81c58972bf2..358bce3336f2 100644
--- a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c
+++ b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include "QemuFlash.h"
@@ -80,6 +81,21 @@ QemuFlashDetected (
 
   DEBUG ((EFI_D_INFO, "QEMU Flash: Attempting flash detection at %p\n", Ptr));
 
+  if (MemEncryptSevEsIsEnabled ()) {
+//
+// When SEV-ES is enabled, the check below can result in an infinite
+// loop with respect to a nested page fault. When the memslot is mapped
+// read-only, the nested page table entry is read-only. The check below
+// will cause a nested page fault that cannot be emulated, causing
+// the instruction to retried over and over. For SEV-ES, acknowledge that
+// the FD appears as ROM and not as FLASH, but report FLASH anyway because
+// FLASH behavior can be simulated using VMGEXIT.
+//
+DEBUG ((DEBUG_INFO,
+  "QEMU Flash: SEV-ES enabled, assuming FD behaves as FLASH\n"));
+return TRUE;
+  }
+
   OriginalUint8 = *Ptr;
   *Ptr = CLEAR_STATUS_CMD;
   ProbeUint8 = *Ptr;
@@ -181,8 +197,9 @@ QemuFlashWrite (
   //
   Ptr = QemuFlashPtr (Lba, Offset);
   for (Loop = 0; Loop < *NumBytes; Loop++) {
-*Ptr = WRITE_BYTE_CMD;
-*Ptr = Buffer[Loop];
+QemuFlashPtrWrite (Ptr, WRITE_BYTE_CMD);
+QemuFlashPtrWrite (Ptr, Buffer[Loop]);
+
 Ptr++;
   }
 
@@ -190,7 +207,7 @@ QemuFlashWrite (
   // Restore flash to read mode
   //
   if (*NumBytes > 0) {
-*(Ptr - 1) = READ_ARRAY_CMD;
+QemuFlashPtrWrite (Ptr - 1, READ_ARRAY_CMD);
   }
 
   return EFI_SUCCESS;
diff --git a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c 
b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c
index 5aabe9d7b59c..83856f575083 100644
--- a/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c
+++ b/OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c
@@ -10,6 +10,8 @@
 **/
 
 #include 
+#include 
+#include 
 
 #include "QemuFlash.h"
 
@@ -32,3 +34,16 @@ QemuFlashBeforeProbe (
   // Do nothing
   //
 }
+
+VOID
+QemuFlashPtrWrite (
+  INvolatile UINT8*Ptr,
+  INUINT8 Value
+  )
+{
+  if (MemEncryptSevEsIsEnabled ()) {
+VmgMmioWrite ((UINT8 *) Ptr, , 1);
+  } else {
+*Ptr = 

[edk2-devel] [PATCH v6 39/42] UefiCpuPkg: Allow AP booting under SEV-ES

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Typically, an AP is booted using the INIT-SIPI-SIPI sequence. This
sequence is intercepted by the hypervisor, which sets the AP's registers
to the values requested by the sequence. At that point, the hypervisor can
start the AP, which will then begin execution at the appropriate location.

Under SEV-ES, AP booting presents some challenges since the hypervisor is
not allowed to alter the AP's register state. In this situation, we have
to distinguish between the AP's first boot and AP's subsequent boots.

First boot:
 Once the AP's register state has been defined (which is before the guest
 is first booted) it cannot be altered. Should the hypervisor attempt to
 alter the register state, the change would be detected by the hardware
 and the VMRUN instruction would fail. Given this, the first boot for the
 AP is required to begin execution with this initial register state, which
 is typically the reset vector. This prevents the BSP from directing the
 AP startup location through the INIT-SIPI-SIPI sequence.

 To work around this, the firmware will provide a build time reserved area
 that can be used as the initial IP value. The hypervisor can extract this
 location value by checking for the SEV-ES reset block GUID that must be
 located 48-bytes from the end of the firmware. The format of the SEV-ES
 reset block area is:

   0x00 - 0x01 - SEV-ES Reset IP
   0x02 - 0x03 - SEV-ES Reset CS Segment Base[31:16]
   0x04 - 0x05 - Size of the SEV-ES reset block
   0x06 - 0x15 - SEV-ES Reset Block GUID
   (00f771de-1a7e-4fcb-890e-68c77e2fb44e)

   The total size is 22 bytes. Any expansion to this block must be done
   by adding new values before existing values.

 The hypervisor will use the IP and CS values obtained from the SEV-ES
 reset block to set as the AP's initial values. The CS Segment Base
 represents the upper 16 bits of the CS segment base and must be left
 shifted by 16 bits to form the complete CS segment base value.

 Before booting the AP for the first time, the BSP must initialize the
 SEV-ES reset area. This consists of programming a FAR JMP instruction
 to the contents of a memory location that is also located in the SEV-ES
 reset area. The BSP must program the IP and CS values for the FAR JMP
 based on values drived from the INIT-SIPI-SIPI sequence.

Subsequent boots:
 Again, the hypervisor cannot alter the AP register state, so a method is
 required to take the AP out of halt state and redirect it to the desired
 IP location. If it is determined that the AP is running in an SEV-ES
 guest, then instead of calling CpuSleep(), a VMGEXIT is issued with the
 AP Reset Hold exit code (0x8004). The hypervisor will put the AP in
 a halt state, waiting for an INIT-SIPI-SIPI sequence. Once the sequence
 is recognized, the hypervisor will resume the AP. At this point the AP
 must transition from the current 64-bit long mode down to 16-bit real
 mode and begin executing at the derived location from the INIT-SIPI-SIPI
 sequence.

 Another change is around the area of obtaining the (x2)APIC ID during AP
 startup. During AP startup, the AP can't take a #VC exception before the
 AP has established a stack. However, the AP stack is set by using the
 (x2)APIC ID, which is obtained through CPUID instructions. A CPUID
 instruction will cause a #VC, so a different method must be used. The
 GHCB protocol supports a method to obtain CPUID information from the
 hypervisor through the GHCB MSR. This method does not require a stack,
 so it is used to obtain the necessary CPUID information to determine the
 (x2)APIC ID.

The new 16-bit protected mode GDT entry is used in order to transition
from 64-bit long mode down to 16-bit real mode.

A new assembler routine is created that takes the AP from 64-bit long mode
to 16-bit real mode.  This is located under 1MB in memory and transitions
from 64-bit long mode to 32-bit compatibility mode to 16-bit protected
mode and finally 16-bit real mode.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |   3 +
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |   3 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h  |  60 
 UefiCpuPkg/Library/MpInitLib/DxeMpLib.c   |  70 -
 UefiCpuPkg/Library/MpInitLib/MpLib.c  | 256 +-
 UefiCpuPkg/Library/MpInitLib/PeiMpLib.c   |  19 ++
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c  |   2 +-
 UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc   |   2 +-
 .../Library/MpInitLib/Ia32/MpFuncs.nasm   |  15 +
 UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc|   4 +-
 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 239 
 11 files changed, 659 insertions(+), 14 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 8b0eb1df9594..12c175608c3a 100644
--- 

[edk2-devel] [PATCH v6 31/42] UefiCpuPkg: Create an SEV-ES workarea PCD

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Create an SEV-ES workarea PCD. This PCD will be used for BSP communication
during SEC and for AP startup during PEI and DXE phases, the latter is the
reason for creating it in the UefiCpuPkg.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/UefiCpuPkg.dec | 8 
 1 file changed, 8 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 795d1c8dedba..c3c2c7bc78de 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -161,6 +161,14 @@ [PcdsFixedAtBuild]
   # @Prompt Specify the count of pre allocated SMM MP tokens per chunk.
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmMpTokenCountPerChunk|64|UINT32|0x30002002
 
+  ## Area of memory where the SEV-ES work area block lives.
+  # @Prompt Configure the SEV-ES work area base
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|0x0|UINT32|0x30002005
+
+  ## Size of teh area of memory where the SEV-ES work area block lives.
+  # @Prompt Configure the SEV-ES work area base
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize|0x0|UINT32|0x30002006
+
 [PcdsFixedAtBuild, PcdsPatchableInModule]
   ## This value is the CPU Local APIC base address, which aligns the address 
on a 4-KByte boundary.
   # @Prompt Configure base address of CPU Local APIC
-- 
2.17.1


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[edk2-devel] [PATCH v6 37/42] UefiCpuPkg: Add a 16-bit protected mode code segment descriptor

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

A hypervisor is not allowed to update an SEV-ES guests register state,
so when booting an SEV-ES guest AP, the hypervisor is not allowed to
set the RIP to the guest requested value. Instead, an SEV-ES AP must be
transition from 64-bit long mode to 16-bit real mode in response to an
INIT-SIPI-SIPI sequence. This requires a 16-bit code segment descriptor.
For PEI, create this descriptor in the reset vector GDT table. For DXE,
create this descriptor from the newly reserved entry at location 0x28.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/CpuDxe/CpuGdt.h  | 4 ++--
 UefiCpuPkg/CpuDxe/CpuGdt.c  | 8 
 UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm | 9 +
 3 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.h b/UefiCpuPkg/CpuDxe/CpuGdt.h
index 3a0210b2f172..1c94487cbee8 100644
--- a/UefiCpuPkg/CpuDxe/CpuGdt.h
+++ b/UefiCpuPkg/CpuDxe/CpuGdt.h
@@ -36,7 +36,7 @@ struct _GDT_ENTRIES {
   GDT_ENTRY LinearCode;
   GDT_ENTRY SysData;
   GDT_ENTRY SysCode;
-  GDT_ENTRY Spare4;
+  GDT_ENTRY SysCode16;
   GDT_ENTRY LinearData64;
   GDT_ENTRY LinearCode64;
   GDT_ENTRY Spare5;
@@ -49,7 +49,7 @@ struct _GDT_ENTRIES {
 #define LINEAR_CODE_SEL   OFFSET_OF (GDT_ENTRIES, LinearCode)
 #define SYS_DATA_SEL  OFFSET_OF (GDT_ENTRIES, SysData)
 #define SYS_CODE_SEL  OFFSET_OF (GDT_ENTRIES, SysCode)
-#define SPARE4_SELOFFSET_OF (GDT_ENTRIES, Spare4)
+#define SYS_CODE16_SELOFFSET_OF (GDT_ENTRIES, SysCode16)
 #define LINEAR_DATA64_SEL OFFSET_OF (GDT_ENTRIES, LinearData64)
 #define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
 #define SPARE5_SELOFFSET_OF (GDT_ENTRIES, Spare5)
diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.c b/UefiCpuPkg/CpuDxe/CpuGdt.c
index 64efadeba601..a1ab543f2da5 100644
--- a/UefiCpuPkg/CpuDxe/CpuGdt.c
+++ b/UefiCpuPkg/CpuDxe/CpuGdt.c
@@ -70,14 +70,14 @@ STATIC GDT_ENTRIES GdtTemplate = {
 0x0,
   },
   //
-  // SPARE4_SEL
+  // SYS_CODE16_SEL
   //
   {
-0x0,// limit 15:0
+0x0,// limit 15:0
 0x0,// base 15:0
 0x0,// base 23:16
-0x0,// type
-0x0,// limit 19:16, flags
+0x09A,  // present, ring 0, code, execute/read
+0x08F,  // page-granular, 16-bit
 0x0,// base 31:24
   },
   //
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm 
b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm
index ce4ebfffb688..0e79a3984b16 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm
@@ -129,5 +129,14 @@ LINEAR_CODE64_SEL   equ $-GDT_BASE
 DB  0; base 31:24
 %endif
 
+; linear code segment descriptor
+LINEAR_CODE16_SEL equ $-GDT_BASE
+DW  0x   ; limit 15:0
+DW  0; base 15:0
+DB  0; base 23:16
+DB  PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
+DB  
GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
+DB  0; base 31:24
+
 GDT_END:
 
-- 
2.17.1


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[edk2-devel] [PATCH v6 30/42] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

The SEV support will clear the C-bit from non-RAM areas.  The early GDT
lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT
will be read as un-encrypted even though it is encrypted. This will result
in a failure to be able to handle the exception.

Move the GDT into RAM so it can be accessed without error when running as
an SEV-ES guest.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/PlatformPei/AmdSev.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
index 5f0946763507..38885de359af 100644
--- a/OvmfPkg/PlatformPei/AmdSev.c
+++ b/OvmfPkg/PlatformPei/AmdSev.c
@@ -39,6 +39,8 @@ AmdSevEsInitialize (
   PHYSICAL_ADDRESS  GhcbBasePa;
   UINTN GhcbPageCount;
   RETURN_STATUS PcdStatus, DecryptStatus;
+  IA32_DESCRIPTOR   Gdtr;
+  VOID  *Gdt;
 
   if (!MemEncryptSevEsIsEnabled ()) {
 return;
@@ -76,6 +78,22 @@ AmdSevEsInitialize (
 (UINT64)GhcbPageCount, GhcbBase));
 
   AsmWriteMsr64 (MSR_SEV_ES_GHCB, GhcbBasePa);
+
+  //
+  // The SEV support will clear the C-bit from non-RAM areas.  The early GDT
+  // lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT
+  // will be read as un-encrypted even though it was created before the C-bit
+  // was cleared (encrypted). This will result in a failure to be able to
+  // handle the exception.
+  //
+  AsmReadGdtr ();
+
+  Gdt = AllocatePages (EFI_SIZE_TO_PAGES ((UINTN) Gdtr.Limit + 1));
+  ASSERT (Gdt != NULL);
+
+  CopyMem (Gdt, (VOID *) Gdtr.Base, Gdtr.Limit + 1);
+  Gdtr.Base = (UINTN) Gdt;
+  AsmWriteGdtr ();
 }
 
 /**
-- 
2.17.1


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[edk2-devel] [PATCH v6 33/42] OvmfPkg/ResetVector: Add support for a 32-bit SEV check

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

During BSP startup, the reset vector code will issue a CPUID instruction
while in 32-bit mode. When running as an SEV-ES guest, this will trigger
a #VC exception.

Add exception handling support to the early reset vector code to catch
these exceptions.  Also, since the guest is in 32-bit mode at this point,
writes to the GHCB will be encrypted and thus not able to be read by the
hypervisor, so use the GHCB CPUID request/response protocol to obtain the
requested CPUID function values and provide these to the guest.

The exception handling support is active during the SEV check and uses the
OVMF temporary RAM space for a stack. After the SEV check is complete, the
exception handling support is removed and the stack pointer cleared.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/ResetVector/ResetVector.inf   |   3 +
 OvmfPkg/ResetVector/Ia32/PageTables64.asm | 275 +-
 OvmfPkg/ResetVector/ResetVector.nasmb |   2 +
 3 files changed, 277 insertions(+), 3 deletions(-)

diff --git a/OvmfPkg/ResetVector/ResetVector.inf 
b/OvmfPkg/ResetVector/ResetVector.inf
index 483fd90fe785..a53ae6c194ae 100644
--- a/OvmfPkg/ResetVector/ResetVector.inf
+++ b/OvmfPkg/ResetVector/ResetVector.inf
@@ -34,9 +34,12 @@ [BuildOptions]
*_*_X64_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/
 
 [Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm 
b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
index 9f86ddf6f08f..7c72128a84d6 100644
--- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
+++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
@@ -36,13 +36,58 @@ BITS32
PAGE_READ_WRITE + \
PAGE_PRESENT)
 
+;
+; SEV-ES #VC exception handler support
+;
+; #VC handler local variable locations
+;
+%define VC_CPUID_RESULT_EAX 0
+%define VC_CPUID_RESULT_EBX 4
+%define VC_CPUID_RESULT_ECX 8
+%define VC_CPUID_RESULT_EDX12
+%define VC_GHCB_MSR_EDX16
+%define VC_GHCB_MSR_EAX20
+%define VC_CPUID_REQUEST_REGISTER  24
+%define VC_CPUID_FUNCTION  28
+
+; #VC handler total local variable size
+;
+%define VC_VARIABLE_SIZE   32
+
+; #VC handler GHCB CPUID request/response protocol values
+;
+%define GHCB_CPUID_REQUEST  4
+%define GHCB_CPUID_RESPONSE 5
+%define GHCB_CPUID_REGISTER_SHIFT  30
+%define CPUID_INSN_LEN  2
+
+
 ; Check if Secure Encrypted Virtualization (SEV) feature is enabled
 ;
-; If SEV is enabled then EAX will be at least 32
+; Modified:  EAX, EBX, ECX, EDX, ESP
+;
+; If SEV is enabled then EAX will be at least 32.
 ; If SEV is disabled then EAX will be zero.
 ;
 CheckSevFeature:
+; Set the first byte of the workarea to zero to communicate to the SEC
+; phase that SEV-ES is not enabled. If SEV-ES is enabled, the CPUID
+; instruction will trigger a #VC exception where the first byte of the
+; workarea will be set to one.
+mov byte[SEV_ES_WORK_AREA], 0
+
+;
+; Set up exception handlers to check for SEV-ES
+;   Load temporary RAM stack based on PCDs (see SevEsIdtVmmComm for
+;   stack usage)
+;   Establish exception handlers
+;
+mov   esp, SEV_ES_VC_TOP_OF_STACK
+mov   eax, ADDR_OF(Idtr)
+lidt  [cs:eax]
+
 ; Check if we have a valid (0x8000_001F) CPUID leaf
+;   CPUID raises a #VC exception if running as an SEV-ES guest
 mov   eax, 0x8000
 cpuid
 
@@ -53,8 +98,8 @@ CheckSevFeature:
 jlNoSev
 
 ; Check for memory encryption feature:
-;  CPUID  Fn8000_001F[EAX] - Bit 1
-;
+; CPUID  Fn8000_001F[EAX] - Bit 1
+;   CPUID raises a #VC exception if running as an SEV-ES guest
 mov   eax,  0x801f
 cpuid
 bteax, 1
@@ -78,6 +123,15 @@ NoSev:
 xor   eax, eax
 
 SevExit:
+;
+; Clear exception handlers and stack
+;
+push  eax
+mov   eax, ADDR_OF(IdtrClear)
+lidt  [cs:eax]
+pop   eax
+mov   esp, 0
+
 OneTimeCallRet CheckSevFeature
 
 ; Check if Secure Encrypted Virtualization - Encrypted State (SEV-ES) feature
@@ -222,3 +276,218 @@ SetCr3:
 mov cr3, eax
 
 OneTimeCallRet SetCr3ForPageTables64
+
+;
+; Start of #VC exception handling routines
+;
+
+SevEsIdtNotCpuid:
+;
+; Use VMGEXIT to request termination.
+;   1 - #VC was not for 

[edk2-devel] [PATCH v6 32/42] OvmfPkg: Reserve a page in memory for the SEV-ES usage

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Reserve a fixed area of memory for SEV-ES use and set a fixed PCD,
PcdSevEsWorkAreaBase, to this value.

This area will be used by SEV-ES support for two purposes:
  1. Communicating the SEV-ES status during BSP boot to SEC:
 Using a byte of memory from the page, the BSP reset vector code can
 communicate the SEV-ES status to SEC for use before exception
 handling can be enabled in SEC. After SEC, this field is no longer
 valid and the standard way of determine if SEV-ES is active should
 be used.

  2. Establishing an area of memory for AP boot support:
 A hypervisor is not allowed to update an SEV-ES guest's register
 state, so when booting an SEV-ES guest AP, the hypervisor is not
 allowed to set the RIP to the guest requested value. Instead an
 SEV-ES AP must be re-directed from within the guest to the actual
 requested staring location as specified in the INIT-SIPI-SIPI
 sequence.

 Use this memory for reset vector code that can be programmed to have
 the AP jump to the desired RIP location after starting the AP. This
 is required for only the very first AP reset.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/OvmfPkgX64.fdf | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
index f218ae10a78d..c0889338803e 100644
--- a/OvmfPkg/OvmfPkgX64.fdf
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -82,6 +82,9 @@ [FD.MEMFD]
 0x009000|0x002000
 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
 
+0x00B000|0x001000
+gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase|gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize
+
 0x01|0x01
 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
 
-- 
2.17.1


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[edk2-devel] [PATCH v6 40/42] OvmfPkg: Use the SEV-ES work area for the SEV-ES AP reset vector

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

A hypervisor is not allowed to update an SEV-ES guest's register state,
so when booting an SEV-ES guest AP, the hypervisor is not allowed to
set the RIP to the guest requested value. Instead an SEV-ES AP must be
re-directed from within the guest to the actual requested staring location
as specified in the INIT-SIPI-SIPI sequence.

Use the SEV-ES work area for the reset vector code that contains support
to jump to the desired RIP location after having been started. This is
required for only the very first AP reset.

This new OVMF source file, ResetVectorVtf0.asm, is used in place of the
original file through the use of the include path order set in
OvmfPkg/ResetVector/ResetVector.inf under "[BuildOptions]".

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 100 +++
 OvmfPkg/ResetVector/ResetVector.nasmb|   1 +
 2 files changed, 101 insertions(+)
 create mode 100644 OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm

diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm 
b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
new file mode 100644
index ..980e0138e7fe
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
@@ -0,0 +1,100 @@
+;--
+; @file
+; First code executed by processor after resetting.
+; Derived from UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
+;
+; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+;--
+
+BITS16
+
+ALIGN   16
+
+;
+; Pad the image size to 4k when page tables are in VTF0
+;
+; If the VTF0 image has page tables built in, then we need to make
+; sure the end of VTF0 is 4k above where the page tables end.
+;
+; This is required so the page tables will be 4k aligned when VTF0 is
+; located just below 0x1 (4GB) in the firmware device.
+;
+%ifdef ALIGN_TOP_TO_4K_FOR_PAGING
+TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0
+%endif
+
+;
+; SEV-ES Processor Reset support
+;
+; sevEsResetBlock:
+;   For the initial boot of an AP under SEV-ES, the "reset" RIP must be
+;   programmed to the RAM area defined by SEV_ES_AP_RESET_IP. A known offset
+;   and GUID will be used to locate this block in the firmware and extract
+;   the build time RIP value. The GUID must always be 48 bytes from the
+;   end of the firmware.
+;
+;   0xffca (-0x36) - IP value
+;   0xffcc (-0x34) - CS segment base [31:16]
+;   0xffce (-0x32) - Size of the SEV-ES reset block
+;   0xffd0 (-0x30) - SEV-ES reset block GUID
+;(00f771de-1a7e-4fcb-890e-68c77e2fb44e)
+;
+;   A hypervisor reads the CS segement base and IP value. The CS segment base
+;   value represents the high order 16-bits of the CS segment base, so the
+;   hypervisor must left shift the value of the CS segement base by 16 bits to
+;   form the full CS segment base for the CS segment register. It would then
+;   program the EIP register with the IP value as read.
+;
+
+TIMES (32 - (sevEsResetBlockEnd - sevEsResetBlockStart)) DB 0
+
+sevEsResetBlockStart:
+DD  SEV_ES_AP_RESET_IP
+DW  sevEsResetBlockEnd - sevEsResetBlockStart
+DB  0xDE, 0x71, 0xF7, 0x00, 0x7E, 0x1A, 0xCB, 0x4F
+DB  0x89, 0x0E, 0x68, 0xC7, 0x7E, 0x2F, 0xB4, 0x4E
+sevEsResetBlockEnd:
+
+ALIGN   16
+
+applicationProcessorEntryPoint:
+;
+; Application Processors entry point
+;
+; GenFv generates code aligned on a 4k boundary which will jump to this
+; location.  (0xffe0)  This allows the Local APIC Startup IPI to be
+; used to wake up the application processors.
+;
+jmp EarlyApInitReal16
+
+ALIGN   8
+
+DD  0
+
+;
+; The VTF signature
+;
+; VTF-0 means that the VTF (Volume Top File) code does not require
+; any fixups.
+;
+vtfSignature:
+DB  'V', 'T', 'F', 0
+
+ALIGN   16
+
+resetVector:
+;
+; Reset Vector
+;
+; This is where the processor will begin execution
+;
+nop
+nop
+jmp EarlyBspInitReal16
+
+ALIGN   16
+
+fourGigabytes:
+
diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb 
b/OvmfPkg/ResetVector/ResetVector.nasmb
index 762661115d50..4913b379a993 100644
--- a/OvmfPkg/ResetVector/ResetVector.nasmb
+++ b/OvmfPkg/ResetVector/ResetVector.nasmb
@@ -82,5 +82,6 @@
 
 %include "Main.asm"
 
+  %define SEV_ES_AP_RESET_IP  FixedPcdGet32 (PcdSevEsWorkAreaBase)
 %include "Ia16/ResetVectorVtf0.asm"
 
-- 
2.17.1


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[edk2-devel] [PATCH v6 34/42] OvmfPkg/Sec: Add #VC exception handling for Sec phase

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

An SEV-ES guest will generate a #VC exception when it encounters a
non-automatic exit (NAE) event. It is expected that the #VC exception
handler will communicate with the hypervisor using the GHCB to handle
the NAE event.

NAE events can occur during the Sec phase, so initialize exception
handling early in the OVMF Sec support.

Before establishing the exception handling, validate that the supported
version of the SEV-ES protocol in OVMF is supported by the hypervisor.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Sec/SecMain.inf |   4 ++
 OvmfPkg/Sec/SecMain.c   | 153 
 2 files changed, 144 insertions(+), 13 deletions(-)

diff --git a/OvmfPkg/Sec/SecMain.inf b/OvmfPkg/Sec/SecMain.inf
index 63ba4cb555fb..7f78dcee2772 100644
--- a/OvmfPkg/Sec/SecMain.inf
+++ b/OvmfPkg/Sec/SecMain.inf
@@ -50,15 +50,19 @@ [LibraryClasses]
   PeCoffExtraActionLib
   ExtractGuidedSectionLib
   LocalApicLib
+  CpuExceptionHandlerLib
 
 [Ppis]
   gEfiTemporaryRamSupportPpiGuid# PPI ALWAYS_PRODUCED
 
 [Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c
index bae9764577f0..1dd185aabc8a 100644
--- a/OvmfPkg/Sec/SecMain.c
+++ b/OvmfPkg/Sec/SecMain.c
@@ -24,6 +24,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
@@ -34,6 +37,10 @@ typedef struct _SEC_IDT_TABLE {
   IA32_IDT_GATE_DESCRIPTOR  IdtTable[SEC_IDT_ENTRY_COUNT];
 } SEC_IDT_TABLE;
 
+typedef struct _SEC_SEV_ES_WORK_AREA {
+  UINT8  SevEsEnabled;
+} SEC_SEV_ES_WORK_AREA;
+
 VOID
 EFIAPI
 SecStartupPhase2 (
@@ -712,6 +719,92 @@ FindAndReportEntryPoints (
   return;
 }
 
+STATIC
+VOID
+SevEsProtocolFailure (
+  IN UINT8  ReasonCode
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+
+  //
+  // Use the GHCB MSR Protocol to request termination by the hypervisor
+  //
+  Msr.GhcbPhysicalAddress = 0;
+  Msr.GhcbTerminate.Function = GHCB_INFO_TERMINATE_REQUEST;
+  Msr.GhcbTerminate.ReasonCodeSet = GHCB_TERMINATE_GHCB;
+  Msr.GhcbTerminate.ReasonCode = ReasonCode;
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  AsmVmgExit ();
+
+  ASSERT (FALSE);
+  CpuDeadLoop ();
+}
+
+STATIC
+VOID
+SevEsProtocolCheck (
+  VOID
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+  GHCB  *Ghcb;
+
+  //
+  // Use the GHCB MSR Protocol to obtain the GHCB SEV-ES Information for
+  // protocol checking
+  //
+  Msr.GhcbPhysicalAddress = 0;
+  Msr.GhcbInfo.Function = GHCB_INFO_SEV_INFO_GET;
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  AsmVmgExit ();
+
+  Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
+
+  if (Msr.GhcbInfo.Function != GHCB_INFO_SEV_INFO) {
+SevEsProtocolFailure (GHCB_TERMINATE_GHCB_GENERAL);
+  }
+
+  if (Msr.GhcbProtocol.SevEsProtocolMin > Msr.GhcbProtocol.SevEsProtocolMax) {
+SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
+  }
+
+  if ((Msr.GhcbProtocol.SevEsProtocolMin > GHCB_VERSION_MAX) ||
+  (Msr.GhcbProtocol.SevEsProtocolMax < GHCB_VERSION_MIN)) {
+SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
+  }
+
+  //
+  // SEV-ES protocol checking succeeded, set the initial GHCB address
+  //
+  Msr.GhcbPhysicalAddress = FixedPcdGet32 (PcdOvmfSecGhcbBase);
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  Ghcb = Msr.Ghcb;
+  SetMem (Ghcb, sizeof (*Ghcb), 0);
+
+  //
+  // Set the version to the maximum that can be supported
+  //
+  Ghcb->ProtocolVersion = MIN (Msr.GhcbProtocol.SevEsProtocolMax, 
GHCB_VERSION_MAX);
+  Ghcb->GhcbUsage = GHCB_STANDARD_USAGE;
+}
+
+STATIC
+BOOLEAN
+SevEsIsEnabled (
+  VOID
+  )
+{
+  SEC_SEV_ES_WORK_AREA  *SevEsWorkArea;
+
+  SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *) FixedPcdGet32 
(PcdSevEsWorkAreaBase);
+
+  return ((SevEsWorkArea != NULL) && (SevEsWorkArea->SevEsEnabled != 0));
+}
+
 VOID
 EFIAPI
 SecCoreStartupWithStack (
@@ -737,8 +830,55 @@ SecCoreStartupWithStack (
 Table[Index] = 0;
   }
 
+  //
+  // Initialize IDT - Since this is before library constructors are called,
+  // we use a loop rather than CopyMem.
+  //
+  IdtTableInStack.PeiService = NULL;
+  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {
+UINT8  *Src, *Dst;
+UINTN  Byte;
+
+Src = (UINT8 *) 
+Dst = (UINT8 *) [Index];
+for (Byte = 0; Byte < sizeof (mIdtEntryTemplate); Byte++) {
+  Dst[Byte] = Src[Byte];
+}
+  }
+

[edk2-devel] [PATCH v6 38/42] UefiCpuPkg/MpInitLib: Add CPU MP data flag to indicate if SEV-ES is enabled

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

When starting APs in an SMP configuration, the AP needs to know if it is
running as an SEV-ES guest in order to assign a GHCB page.

Add a field to the CPU_MP_DATA structure that will indicate if SEV-ES is
enabled. This new field is set during MP library initialization with the
PCD value PcdSevEsIsEnabled. This flag can then be used to determine if
SEV-ES is enabled.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 1 +
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 1 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h  | 2 ++
 UefiCpuPkg/Library/MpInitLib/MpLib.c  | 1 +
 4 files changed, 5 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 45aaa179ff2e..8b0eb1df9594 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -69,5 +69,6 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode   ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ## 
SOMETIMES_CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled  ## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard  ## CONSUMES
 
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index d78d328b4252..b4dc7e69d829 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -60,6 +60,7 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode   ## CONSUMES
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate   ## 
SOMETIMES_CONSUMES
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled  ## CONSUMES
 
 [Ppis]
   gEdkiiPeiShadowMicrocodePpiGuid## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h 
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 0c89f8a6e732..edd936f06396 100755
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -275,6 +275,8 @@ struct _CPU_MP_DATA {
   // driver.
   //
   BOOLEANWakeUpByInitSipiSipi;
+
+  BOOLEANSevEsIsEnabled;
 };
 
 extern EFI_GUID mCpuInitMpLibHobGuid;
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c 
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 64a4c3546e22..81c5b1a5b701 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -1714,6 +1714,7 @@ MpInitLibInitialize (
   CpuMpData->CpuData  = (CPU_AP_DATA *) (CpuMpData + 1);
   CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + 
MaxLogicalProcessorNumber);
   InitializeSpinLock(>MpLock);
+  CpuMpData->SevEsIsEnabled = PcdGetBool (PcdSevEsIsEnabled);
 
   //
   // Make sure no memory usage outside of the allocated buffer.
-- 
2.17.1


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[edk2-devel] [PATCH v6 28/42] OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Protect the memory used by an SEV-ES guest when S3 is supported. This
includes the page table used to break down the 2MB page that contains
the GHCB so that it can be marked un-encrypted, as well as the GHCB
area.

Regarding the lifecycle of the GHCB-related memory areas:
  PcdOvmfSecGhcbPageTableBase
  PcdOvmfSecGhcbBase

(a) when and how it is initialized after first boot of the VM

  If SEV-ES is enabled, the GHCB-related areas are initialized during
  the SEC phase [OvmfPkg/ResetVector/Ia32/PageTables64.asm].

(b) how it is protected from memory allocations during DXE

  If S3 and SEV-ES are enabled, then InitializeRamRegions()
  [OvmfPkg/PlatformPei/MemDetect.c] protects the ranges with an AcpiNVS
  memory allocation HOB, in PEI.

  If S3 is disabled, then these ranges are not protected. DXE's own page
  tables are first built while still in PEI (see HandOffToDxeCore()
  [MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c]). Those tables are
  located in permanent PEI memory. After CR3 is switched over to them
  (which occurs before jumping to the DXE core entry point), we don't have
  to preserve PcdOvmfSecGhcbPageTableBase. PEI switches to GHCB pages in
  permanent PEI memory and DXE will use these PEI GHCB pages, so we don't
  have to preserve PcdOvmfSecGhcbBase.

(c) how it is protected from the OS

  If S3 is enabled, then (b) reserves it from the OS too.

  If S3 is disabled, then the range needs no protection.

(d) how it is accessed on the S3 resume path

  It is rewritten same as in (a), which is fine because (b) reserved it.

(e) how it is accessed on the warm reset path

  It is rewritten same as in (a).

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Anthony Perard 
Cc: Julien Grall 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/PlatformPei/PlatformPei.inf |  4 
 OvmfPkg/PlatformPei/MemDetect.c | 23 +++
 2 files changed, 27 insertions(+)

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf 
b/OvmfPkg/PlatformPei/PlatformPei.inf
index 19fc6002cadb..a9ad3f8ab522 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -73,6 +73,10 @@ [Pcd]
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize
   gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 47dc9c543719..200021098161 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -27,6 +27,7 @@ Module Name:
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -860,6 +861,28 @@ InitializeRamRegions (
   (UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),
   EfiACPIMemoryNVS
   );
+
+if (MemEncryptSevEsIsEnabled ()) {
+  //
+  // If SEV-ES is enabled, reserve the GHCB-related memory area. This
+  // includes the extra page table used to break down the 2MB page
+  // mapping into 4KB page entries where the GHCB resides and the
+  // GHCB area itself.
+  //
+  // Since this memory range will be used by the Reset Vector on S3
+  // resume, it must be reserved as ACPI NVS.
+  //
+  BuildMemoryAllocationHob (
+(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecGhcbPageTableBase),
+(UINT64)(UINTN) PcdGet32 (PcdOvmfSecGhcbPageTableSize),
+EfiACPIMemoryNVS
+);
+  BuildMemoryAllocationHob (
+(EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecGhcbBase),
+(UINT64)(UINTN) PcdGet32 (PcdOvmfSecGhcbSize),
+EfiACPIMemoryNVS
+);
+}
 #endif
   }
 
-- 
2.17.1


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[edk2-devel] [PATCH v6 22/42] UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a MONITOR/MONITORX intercept generates a #VC exception.
VMGEXIT must be used to allow the hypervisor to handle this intercept.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 31 +++
 1 file changed, 31 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index fcd4738b2915..90255cd55e5e 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -591,6 +591,33 @@ MmioExit (
   return Status;
 }
 
+STATIC
+UINT64
+MonitorExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  DecodeModRm (Regs, InstructionData);
+
+  Ghcb->SaveArea.Rax = Regs->Rax;  // Identity mapped, so VA = PA
+  GhcbSetRegValid (Ghcb, GhcbRax);
+  Ghcb->SaveArea.Rcx = Regs->Rcx;
+  GhcbSetRegValid (Ghcb, GhcbRcx);
+  Ghcb->SaveArea.Rdx = Regs->Rdx;
+  GhcbSetRegValid (Ghcb, GhcbRdx);
+
+  Status = VmgExit (Ghcb, SvmExitMonitor, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  return 0;
+}
+
 STATIC
 UINT64
 WbinvdExit (
@@ -1076,6 +1103,10 @@ DoVcCommon (
 NaeExit = WbinvdExit;
 break;
 
+  case SvmExitMonitor:
+NaeExit = MonitorExit;
+break;
+
   case SvmExitNpf:
 NaeExit = MmioExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 24/42] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a DR7 read or write intercept generates a #VC exception.
The #VC handler must provide special support to the guest for this. On
a DR7 write, the #VC handler must cache the value and issue a VMGEXIT
to notify the hypervisor of the write. However, the #VC handler must
not actually set the value of the DR7 register. On a DR7 read, the #VC
handler must return the cached value of the DR7 register to the guest.
VMGEXIT is not invoked for a DR7 register read.

To avoid exception recursion, a #VC exception will not try to read and
push the actual debug registers into the EFI_SYSTEM_CONTEXT_X64 struct
and instead push zeroes. The #VC exception handler does not make use of
the debug registers from saved context.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 68 +++
 .../X64/ExceptionHandlerAsm.nasm  | 17 +
 2 files changed, 85 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 1fdbb122c35d..cca9481e8900 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -13,6 +13,12 @@
 
 #define CR4_OSXSAVE (1 << 18)
 
+#define DR7_RESET_VALUE 0x400
+typedef struct {
+  BOOLEAN  Dr7Cached;
+  UINT64   Dr7;
+} SEV_ES_PER_CPU_DATA;
+
 typedef enum {
   LongMode64Bit= 0,
   LongModeCompat32Bit,
@@ -1076,6 +1082,60 @@ RdtscExit (
   return 0;
 }
 
+STATIC
+UINT64
+Dr7WriteExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  SEV_ES_INSTRUCTION_OPCODE_EXT  *Ext = >Ext;
+  SEV_ES_PER_CPU_DATA*SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 
1);
+  INTN   *Register;
+  UINT64 Status;
+
+  DecodeModRm (Regs, InstructionData);
+
+  /* MOV DRn always treats MOD == 3 no matter how encoded */
+  Register = GetRegisterPointer (Regs, Ext->ModRm.Rm);
+
+  /* Using a value of 0 for ExitInfo1 means RAX holds the value */
+  Ghcb->SaveArea.Rax = *Register;
+  GhcbSetRegValid (Ghcb, GhcbRax);
+
+  Status = VmgExit (Ghcb, SvmExitDr7Write, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  SevEsData->Dr7 = *Register;
+  SevEsData->Dr7Cached = TRUE;
+
+  return 0;
+}
+
+STATIC
+UINT64
+Dr7ReadExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  SEV_ES_INSTRUCTION_OPCODE_EXT  *Ext = >Ext;
+  SEV_ES_PER_CPU_DATA*SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 
1);
+  INTN   *Register;
+
+  DecodeModRm (Regs, InstructionData);
+
+  /* MOV DRn always treats MOD == 3 no matter how encoded */
+  Register = GetRegisterPointer (Regs, Ext->ModRm.Rm);
+  *Register = (SevEsData->Dr7Cached) ? SevEsData->Dr7 : DR7_RESET_VALUE;
+
+  return 0;
+}
+
 UINTN
 DoVcCommon (
   GHCB*Ghcb,
@@ -1092,6 +1152,14 @@ DoVcCommon (
 
   ExitCode = Regs->ExceptionData;
   switch (ExitCode) {
+  case SvmExitDr7Read:
+NaeExit = Dr7ReadExit;
+break;
+
+  case SvmExitDr7Write:
+NaeExit = Dr7WriteExit;
+break;
+
   case SvmExitRdtsc:
 NaeExit = RdtscExit;
 break;
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
index 19198f273137..26cae56cc5cf 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
@@ -18,6 +18,8 @@
 ; CommonExceptionHandler()
 ;
 
+%define VC_EXCEPTION 29
+
 extern ASM_PFX(mErrorCodeFlag); Error code flags for exceptions
 extern ASM_PFX(mDoFarReturnFlag)  ; Do far return flag
 extern ASM_PFX(CommonExceptionHandler)
@@ -225,6 +227,9 @@ HasErrorCode:
 pushrax
 
 ;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
+cmp qword [rbp + 8], VC_EXCEPTION
+je  VcDebugRegs  ; For SEV-ES (#VC) Debug registers ignored
+
 mov rax, dr7
 pushrax
 mov rax, dr6
@@ -237,7 +242,19 @@ HasErrorCode:
 pushrax
 mov rax, dr0
 pushrax
+jmp DrFinish
 
+VcDebugRegs:
+;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7 are skipped for #VC to avoid exception 
recursion
+xor rax, rax
+pushrax
+pushrax
+pushrax
+pushrax
+pushrax
+pushrax
+
+DrFinish:
 ;; FX_SAVE_STATE_X64 FxSaveState;
 sub rsp, 512
 mov rdi, rsp
-- 
2.17.1


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[edk2-devel] [PATCH v6 25/42] OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Create a function that can be used to determine if the VM is running
as an SEV-ES guest.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/Include/Library/MemEncryptSevLib.h| 12 +++
 .../MemEncryptSevLibInternal.c| 75 ---
 2 files changed, 60 insertions(+), 27 deletions(-)

diff --git a/OvmfPkg/Include/Library/MemEncryptSevLib.h 
b/OvmfPkg/Include/Library/MemEncryptSevLib.h
index 64dd6977b0f8..a50a0de9c870 100644
--- a/OvmfPkg/Include/Library/MemEncryptSevLib.h
+++ b/OvmfPkg/Include/Library/MemEncryptSevLib.h
@@ -13,6 +13,18 @@
 
 #include 
 
+/**
+  Returns a boolean to indicate whether SEV-ES is enabled
+
+  @retval TRUE   SEV-ES is enabled
+  @retval FALSE  SEV-ES is not enabled
+**/
+BOOLEAN
+EFIAPI
+MemEncryptSevEsIsEnabled (
+  VOID
+  );
+
 /**
   Returns a boolean to indicate whether SEV is enabled
 
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/MemEncryptSevLibInternal.c 
b/OvmfPkg/Library/BaseMemEncryptSevLib/MemEncryptSevLibInternal.c
index 96a66e373f11..933734fa4427 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/MemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/MemEncryptSevLibInternal.c
@@ -20,19 +20,17 @@
 #include 
 
 STATIC BOOLEAN mSevStatus = FALSE;
+STATIC BOOLEAN mSevEsStatus = FALSE;
 STATIC BOOLEAN mSevStatusChecked = FALSE;
 
 /**
 
-  Returns a boolean to indicate whether SEV is enabled
-
-  @retval TRUE   SEV is enabled
-  @retval FALSE  SEV is not enabled
+  Reads and sets the status of SEV features
   **/
 STATIC
-BOOLEAN
+VOID
 EFIAPI
-InternalMemEncryptSevIsEnabled (
+InternalMemEncryptSevStatus (
   VOID
   )
 {
@@ -56,32 +54,55 @@ InternalMemEncryptSevIsEnabled (
   //
   Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS);
   if (Msr.Bits.SevBit) {
-return TRUE;
+mSevStatus = TRUE;
+  }
+
+  //
+  // Check MSR_0xC0010131 Bit 1 (Sev-Es Enabled)
+  //
+  if (Msr.Bits.SevEsBit) {
+mSevEsStatus = TRUE;
   }
 }
   }
 
-  return FALSE;
-}
-
-/**
-  Returns a boolean to indicate whether SEV is enabled
-
-  @retval TRUE   SEV is enabled
-  @retval FALSE  SEV is not enabled
-**/
-BOOLEAN
-EFIAPI
-MemEncryptSevIsEnabled (
-  VOID
-  )
-{
-  if (mSevStatusChecked) {
-return mSevStatus;
-  }
-
-  mSevStatus = InternalMemEncryptSevIsEnabled();
   mSevStatusChecked = TRUE;
+}
+
+/**
+  Returns a boolean to indicate whether SEV-ES is enabled
+
+  @retval TRUE   SEV-ES is enabled
+  @retval FALSE  SEV-ES is not enabled
+**/
+BOOLEAN
+EFIAPI
+MemEncryptSevEsIsEnabled (
+  VOID
+  )
+{
+  if (!mSevStatusChecked) {
+InternalMemEncryptSevStatus ();
+  }
+
+  return mSevEsStatus;
+}
+
+/**
+  Returns a boolean to indicate whether SEV is enabled
+
+  @retval TRUE   SEV is enabled
+  @retval FALSE  SEV is not enabled
+**/
+BOOLEAN
+EFIAPI
+MemEncryptSevIsEnabled (
+  VOID
+  )
+{
+  if (!mSevStatusChecked) {
+InternalMemEncryptSevStatus ();
+  }
 
   return mSevStatus;
 }
-- 
2.17.1


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[edk2-devel] [PATCH v6 26/42] OvmfPkg: Add support to perform SEV-ES initialization

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

When SEV-ES is enabled, then SEV is also enabled. Add support to the SEV
initialization function to also check for SEV-ES being enabled, and if
enabled, set the SEV-ES enabled PCD (PcdSevEsIsEnabled).

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/OvmfPkgIa32.dsc |  3 +++
 OvmfPkg/OvmfPkgIa32X64.dsc  |  3 +++
 OvmfPkg/OvmfPkgX64.dsc  |  3 +++
 OvmfPkg/PlatformPei/PlatformPei.inf |  1 +
 OvmfPkg/PlatformPei/AmdSev.c| 26 ++
 5 files changed, 36 insertions(+)

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 2701630be8f0..d6bb1f6e795c 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -580,6 +580,9 @@ [PcdsDynamicDefault]
   # Set memory encryption mask
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
 
+  # Set SEV-ES defaults
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
+
 !if $(SMM_REQUIRE) == TRUE
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 671fdfbbd47d..78d2107846a0 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -591,6 +591,9 @@ [PcdsDynamicDefault]
   # Set memory encryption mask
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
 
+  # Set SEV-ES defaults
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
+
 !if $(SMM_REQUIRE) == TRUE
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 5abf83e05480..65dd4c612073 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -590,6 +590,9 @@ [PcdsDynamicDefault]
   # Set memory encryption mask
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
 
+  # Set SEV-ES defaults
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
+
 !if $(SMM_REQUIRE) == TRUE
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
   gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf 
b/OvmfPkg/PlatformPei/PlatformPei.inf
index 8531c63995c1..19fc6002cadb 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -102,6 +102,7 @@ [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
   gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber
   gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled
 
 [FixedPcd]
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
index e484f4b311fe..4dc5340caa7a 100644
--- a/OvmfPkg/PlatformPei/AmdSev.c
+++ b/OvmfPkg/PlatformPei/AmdSev.c
@@ -21,6 +21,27 @@
 
 #include "Platform.h"
 
+/**
+
+  Initialize SEV-ES support if running as an SEV-ES guest.
+
+  **/
+STATIC
+VOID
+AmdSevEsInitialize (
+  VOID
+  )
+{
+  RETURN_STATUS PcdStatus;
+
+  if (!MemEncryptSevEsIsEnabled ()) {
+return;
+  }
+
+  PcdStatus = PcdSetBoolS (PcdSevEsIsEnabled, TRUE);
+  ASSERT_RETURN_ERROR (PcdStatus);
+}
+
 /**
 
   Function checks if SEV support is available, if present then it sets
@@ -103,4 +124,9 @@ AmdSevInitialize (
 );
 }
   }
+
+  //
+  // Check and perform SEV-ES initialization if required.
+  //
+  AmdSevEsInitialize ();
 }
-- 
2.17.1


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[edk2-devel] [PATCH v6 19/42] UefiCpuPkg/CpuExceptionHandler: Add support for INVD NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a INVD intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 22 +++
 1 file changed, 22 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index ea67648d12ff..acba14d995cb 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -856,6 +856,24 @@ IoioExit (
   return 0;
 }
 
+STATIC
+UINT64
+InvdExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  Status = VmgExit (Ghcb, SvmExitInvd, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  return 0;
+}
+
 STATIC
 UINT64
 CpuidExit (
@@ -975,6 +993,10 @@ DoVcCommon (
 NaeExit = CpuidExit;
 break;
 
+  case SvmExitInvd:
+NaeExit = InvdExit;
+break;
+
   case SvmExitIoioProt:
 NaeExit = IoioExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 17/42] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a RDTSC intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 29 +++
 1 file changed, 29 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 55e18c47921e..9de04f6d31f6 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -894,6 +894,31 @@ CpuidExit (
   return 0;
 }
 
+STATIC
+UINT64
+RdtscExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  Status = VmgExit (Ghcb, SvmExitRdtsc, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  if (!GhcbIsRegValid (Ghcb, GhcbRax) ||
+  !GhcbIsRegValid (Ghcb, GhcbRdx)) {
+return UnsupportedExit (Ghcb, Regs, InstructionData);
+  }
+  Regs->Rax = Ghcb->SaveArea.Rax;
+  Regs->Rdx = Ghcb->SaveArea.Rdx;
+
+  return 0;
+}
+
 UINTN
 DoVcCommon (
   GHCB*Ghcb,
@@ -910,6 +935,10 @@ DoVcCommon (
 
   ExitCode = Regs->ExceptionData;
   switch (ExitCode) {
+  case SvmExitRdtsc:
+NaeExit = RdtscExit;
+break;
+
   case SvmExitCpuid:
 NaeExit = CpuidExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 23/42] UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a MWAIT/MWAITX intercept generates a #VC exception.
VMGEXIT must be used to allow the hypervisor to handle this intercept.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 29 +++
 1 file changed, 29 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 90255cd55e5e..1fdbb122c35d 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -591,6 +591,31 @@ MmioExit (
   return Status;
 }
 
+STATIC
+UINT64
+MwaitExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  DecodeModRm (Regs, InstructionData);
+
+  Ghcb->SaveArea.Rax = Regs->Rax;
+  GhcbSetRegValid (Ghcb, GhcbRax);
+  Ghcb->SaveArea.Rcx = Regs->Rcx;
+  GhcbSetRegValid (Ghcb, GhcbRcx);
+
+  Status = VmgExit (Ghcb, SvmExitMwait, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  return 0;
+}
+
 STATIC
 UINT64
 MonitorExit (
@@ -1107,6 +1132,10 @@ DoVcCommon (
 NaeExit = MonitorExit;
 break;
 
+  case SvmExitMwait:
+NaeExit = MwaitExit;
+break;
+
   case SvmExitNpf:
 NaeExit = MmioExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 27/42] OvmfPkg: Create a GHCB page for use during Sec phase

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

A GHCB page is needed during the Sec phase, so this new page must be
created. Since the #VC exception handler routines assume that a per-CPU
variable area is immediately after the GHCB, this per-CPU variable area
must also be created. Since the GHCB must be marked as an un-encrypted,
or shared, page, an additional pagetable page is required to break down
the 2MB region where the GHCB page lives into 4K pagetable entries.

Create a new entry in the OVMF memory layout for the new page table
page and for the SEC GHCB and per-CPU variable pages. After breaking down
the 2MB page, update the GHCB page table entry to remove the encryption
mask.

The GHCB page will be used by the SEC #VC exception handler. The #VC
exception handler will fill in the necessary fields of the GHCB and exit
to the hypervisor using the VMGEXIT instruction. The hypervisor then
accesses the GHCB in order to perform the requested function.

Two new fixed PCDs are needed to support the SEC GHCB page:
  - PcdOvmfSecGhcbBase  UINT64 value that is the base address of the
GHCB used during the SEC phase.
  - PcdOvmfSecGhcbSize  UINT64 value that is the size, in bytes, of the
GHCB area used during the SEC phase.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/OvmfPkg.dec   |  9 +++
 OvmfPkg/OvmfPkgX64.fdf|  6 ++
 OvmfPkg/ResetVector/ResetVector.inf   |  5 ++
 OvmfPkg/ResetVector/Ia32/PageTables64.asm | 76 +++
 OvmfPkg/ResetVector/ResetVector.nasmb | 17 +
 5 files changed, 113 insertions(+)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 913345d49e1f..8d28213629dd 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -241,6 +241,15 @@ [PcdsFixedAtBuild]
   ## Number of page frames to use for storing grant table entries.
   gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33
 
+  ## Specify the extra page table needed to mark the GHCB as unencrypted.
+  #  The value should be a multiple of 4KB for each.
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT32|0x36
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT32|0x37
+
+  ## The base address of the SEC GHCB page used by SEV-ES.
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x38
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x39
+
 [PcdsDynamic, PcdsDynamicEx]
   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
index 0e2a5caaf906..f218ae10a78d 100644
--- a/OvmfPkg/OvmfPkgX64.fdf
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -76,6 +76,12 @@ [FD.MEMFD]
 0x007000|0x001000
 
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
 
+0x008000|0x001000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize
+
+0x009000|0x002000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
+
 0x01|0x01
 
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
 
diff --git a/OvmfPkg/ResetVector/ResetVector.inf 
b/OvmfPkg/ResetVector/ResetVector.inf
index b0ddfa5832a2..483fd90fe785 100644
--- a/OvmfPkg/ResetVector/ResetVector.inf
+++ b/OvmfPkg/ResetVector/ResetVector.inf
@@ -26,6 +26,7 @@ [Sources]
 [Packages]
   OvmfPkg/OvmfPkg.dec
   MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
   UefiCpuPkg/UefiCpuPkg.dec
 
 [BuildOptions]
@@ -33,5 +34,9 @@ [BuildOptions]
*_*_X64_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/
 
 [Pcd]
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm 
b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
index abad009f20f5..9f86ddf6f08f 100644
--- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
+++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
@@ -21,6 +21,11 @@ BITS32
 %define PAGE_2M_MBO0x080
 %define PAGE_2M_PAT  0x01000
 
+%define PAGE_4K_PDE_ATTR (PAGE_ACCESSED + \
+  PAGE_DIRTY + \
+  PAGE_READ_WRITE + \
+  PAGE_PRESENT)
+
 %define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
   PAGE_ACCESSED + \
   PAGE_DIRTY + \
@@ -75,6 +80,37 @@ NoSev:
 SevExit:
 OneTimeCallRet CheckSevFeature
 
+; Check if Secure Encrypted Virtualization - Encrypted State (SEV-ES) 

[edk2-devel] [PATCH v6 20/42] UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a VMMCALL intercept generates a #VC exception. VMGEXIT must
be used to allow the hypervisor to handle this intercept.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 34 +++
 1 file changed, 34 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index acba14d995cb..7b57229a770c 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -609,6 +609,36 @@ WbinvdExit (
   return 0;
 }
 
+STATIC
+UINT64
+VmmCallExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  DecodeModRm (Regs, InstructionData);
+
+  Ghcb->SaveArea.Rax = Regs->Rax;
+  GhcbSetRegValid (Ghcb, GhcbRax);
+  Ghcb->SaveArea.Cpl = (UINT8) (Regs->Cs & 0x3);
+  GhcbSetRegValid (Ghcb, GhcbCpl);
+
+  Status = VmgExit (Ghcb, SvmExitVmmCall, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  if (!GhcbIsRegValid (Ghcb, GhcbRax)) {
+return UnsupportedExit (Ghcb, Regs, InstructionData);
+  }
+  Regs->Rax = Ghcb->SaveArea.Rax;
+
+  return 0;
+}
+
 STATIC
 UINT64
 MsrExit (
@@ -1005,6 +1035,10 @@ DoVcCommon (
 NaeExit = MsrExit;
 break;
 
+  case SvmExitVmmCall:
+NaeExit = VmmCallExit;
+break;
+
   case SvmExitWbinvd:
 NaeExit = WbinvdExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 18/42] UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a RDPMC intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 32 +++
 1 file changed, 32 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 9de04f6d31f6..ea67648d12ff 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -894,6 +894,34 @@ CpuidExit (
   return 0;
 }
 
+STATIC
+UINT64
+RdpmcExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  Ghcb->SaveArea.Rcx = Regs->Rcx;
+  GhcbSetRegValid (Ghcb, GhcbRcx);
+
+  Status = VmgExit (Ghcb, SvmExitRdpmc, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  if (!GhcbIsRegValid (Ghcb, GhcbRax) ||
+  !GhcbIsRegValid (Ghcb, GhcbRdx)) {
+return UnsupportedExit (Ghcb, Regs, InstructionData);
+  }
+  Regs->Rax = Ghcb->SaveArea.Rax;
+  Regs->Rdx = Ghcb->SaveArea.Rdx;
+
+  return 0;
+}
+
 STATIC
 UINT64
 RdtscExit (
@@ -939,6 +967,10 @@ DoVcCommon (
 NaeExit = RdtscExit;
 break;
 
+  case SvmExitRdpmc:
+NaeExit = RdpmcExit;
+break;
+
   case SvmExitCpuid:
 NaeExit = CpuidExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 29/42] OvmfPkg: Create GHCB pages for use during Pei and Dxe phase

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Allocate memory for the GHCB pages and the per-CPU variable pages during
SEV initialization for use during Pei and Dxe phases. The GHCB page(s)
must be shared pages, so clear the encryption mask from the current page
table entries. Upon successful allocation, set the GHCB PCDs (PcdGhcbBase
and PcdGhcbSize).

The per-CPU variable page needs to be unique per AP. Using the page after
the GHCB ensures that it is unique per AP. But, it also ends up being
marked shared/unencrypted when it doesn't need to be. It is possible
during PEI to mark only the GHCB pages as shared (and that is done), but
DXE is not as easy. There needs to be a way to change the pagetables
created for DXE using CreateIdentityMappingPageTables() before switching
to them.

The GHCB pages (one per vCPU) will be used by the PEI and DXE #VC
exception handlers. The #VC exception handler will fill in the necessary
fields of the GHCB and exit to the hypervisor using the VMGEXIT
instruction. The hypervisor then accesses the GHCB associated with the
vCPU in order to perform the requested function.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/OvmfPkgIa32.dsc |  2 ++
 OvmfPkg/OvmfPkgIa32X64.dsc  |  2 ++
 OvmfPkg/OvmfPkgX64.dsc  |  2 ++
 OvmfPkg/PlatformPei/PlatformPei.inf |  2 ++
 OvmfPkg/PlatformPei/AmdSev.c| 38 -
 5 files changed, 45 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index d6bb1f6e795c..8934c7e78610 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -581,6 +581,8 @@ [PcdsDynamicDefault]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
 
   # Set SEV-ES defaults
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
 
 !if $(SMM_REQUIRE) == TRUE
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 78d2107846a0..0bdff7f7db44 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -592,6 +592,8 @@ [PcdsDynamicDefault]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
 
   # Set SEV-ES defaults
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
 
 !if $(SMM_REQUIRE) == TRUE
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 65dd4c612073..6e83a1e2f39d 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -591,6 +591,8 @@ [PcdsDynamicDefault]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0
 
   # Set SEV-ES defaults
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0
   gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
 
 !if $(SMM_REQUIRE) == TRUE
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf 
b/OvmfPkg/PlatformPei/PlatformPei.inf
index a9ad3f8ab522..c0bf4c2ee8b9 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -101,6 +101,8 @@ [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize
   gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy
   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
index 4dc5340caa7a..5f0946763507 100644
--- a/OvmfPkg/PlatformPei/AmdSev.c
+++ b/OvmfPkg/PlatformPei/AmdSev.c
@@ -10,12 +10,15 @@
 // The package level header files this module uses
 //
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -32,7 +35,10 @@ AmdSevEsInitialize (
   VOID
   )
 {
-  RETURN_STATUS PcdStatus;
+  VOID  *GhcbBase;
+  PHYSICAL_ADDRESS  GhcbBasePa;
+  UINTN GhcbPageCount;
+  RETURN_STATUS PcdStatus, DecryptStatus;
 
   if (!MemEncryptSevEsIsEnabled ()) {
 return;
@@ -40,6 +46,36 @@ AmdSevEsInitialize (
 
   PcdStatus = PcdSetBoolS (PcdSevEsIsEnabled, TRUE);
   ASSERT_RETURN_ERROR (PcdStatus);
+
+  //
+  // Allocate GHCB and per-CPU variable pages.
+  //
+  GhcbPageCount = mMaxCpuCount * 2;
+  GhcbBase = AllocatePages (GhcbPageCount);
+  ASSERT (GhcbBase != NULL);
+
+  GhcbBasePa = (PHYSICAL_ADDRESS)(UINTN) GhcbBase;
+
+  DecryptStatus = MemEncryptSevClearPageEncMask (
+0,
+GhcbBasePa,
+GhcbPageCount,
+TRUE
+);
+  ASSERT_RETURN_ERROR (DecryptStatus);
+
+  ZeroMem (GhcbBase, EFI_PAGES_TO_SIZE (GhcbPageCount));
+
+  PcdStatus = PcdSet64S (PcdGhcbBase, 

[edk2-devel] [PATCH v6 05/42] MdePkg/BaseLib: Add support for the XGETBV instruction

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a CPUID instruction requires the current value of the XCR0
register. In order to retrieve that value, the XGETBV instruction needs
to be executed.

Provide the necessary support to execute the XGETBV instruction.

Cc: Michael D Kinney 
Cc: Liming Gao 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Library/BaseLib/BaseLib.inf  |  2 ++
 MdePkg/Include/Library/BaseLib.h| 17 +
 MdePkg/Library/BaseLib/Ia32/GccInline.c | 28 
 MdePkg/Library/BaseLib/X64/GccInline.c  | 30 ++
 MdePkg/Library/BaseLib/Ia32/XGetBv.nasm | 31 ++
 MdePkg/Library/BaseLib/X64/XGetBv.nasm  | 34 +
 6 files changed, 142 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/Ia32/XGetBv.nasm
 create mode 100644 MdePkg/Library/BaseLib/X64/XGetBv.nasm

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 3586beb0ab5c..d7a1dd017e95 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -152,6 +152,7 @@ [Sources.Ia32]
   Ia32/ARShiftU64.c | MSFT
   Ia32/EnableCache.c | MSFT
   Ia32/DisableCache.c | MSFT
+  Ia32/XGetBv.nasm | MSFT
 
 
   Ia32/GccInline.c | GCC
@@ -286,6 +287,7 @@ [Sources.X64]
   X64/ReadCr2.nasm| MSFT
   X64/ReadCr0.nasm| MSFT
   X64/ReadEflags.nasm| MSFT
+  X64/XGetBv.nasm | MSFT
 
 
   X64/Non-existing.c
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index ecadff8b235e..d0cbb52ed8f9 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -7889,6 +7889,23 @@ AsmLfence (
   VOID
   );
 
+/**
+  Executes a XGETBV instruction
+
+  Executes a XGETBV instruction. This function is only available on IA-32 and
+  x64.
+
+  @param[in] IndexExtended control register index
+
+  @retval The current value of the extended control register
+**/
+UINT64
+EFIAPI
+AsmXGetBv (
+  IN UINT32  Index
+  );
+
+
 /**
   Patch the immediate operand of an IA32 or X64 instruction such that the byte,
   word, dword or qword operand is encoded at the end of the instruction's
diff --git a/MdePkg/Library/BaseLib/Ia32/GccInline.c 
b/MdePkg/Library/BaseLib/Ia32/GccInline.c
index 5287200f8754..591f0bb0e097 100644
--- a/MdePkg/Library/BaseLib/Ia32/GccInline.c
+++ b/MdePkg/Library/BaseLib/Ia32/GccInline.c
@@ -1763,3 +1763,31 @@ AsmFlushCacheLine (
 }
 
 
+/**
+  Executes a XGETBV instruction
+
+  Executes a XGETBV instruction. This function is only available on IA-32 and
+  x64.
+
+  @param[in] IndexExtended control register index
+
+  @retval The current value of the extended control register
+**/
+UINT64
+EFIAPI
+AsmXGetBv (
+  IN UINT32 Index
+  )
+{
+  UINT64 Data;
+
+  __asm__ __volatile__ (
+"xgetbv"
+: "=A" (Data)
+: "c"  (Index)
+);
+
+  return Data;
+}
+
+
diff --git a/MdePkg/Library/BaseLib/X64/GccInline.c 
b/MdePkg/Library/BaseLib/X64/GccInline.c
index 154ce1f57e92..3eed1205adb2 100644
--- a/MdePkg/Library/BaseLib/X64/GccInline.c
+++ b/MdePkg/Library/BaseLib/X64/GccInline.c
@@ -1798,3 +1798,33 @@ AsmFlushCacheLine (
 }
 
 
+/**
+  Executes a XGETBV instruction
+
+  Executes a XGETBV instruction. This function is only available on IA-32 and
+  x64.
+
+  @param[in] IndexExtended control register index
+
+  @retval The current value of the extended control register
+**/
+UINT64
+EFIAPI
+AsmXGetBv (
+  IN UINT32 Index
+  )
+{
+  UINT32 LowData;
+  UINT32 HighData;
+
+  __asm__ __volatile__ (
+"xgetbv"
+: "=a" (LowData),
+  "=d" (HighData)
+: "c"  (Index)
+);
+
+  return (((UINT64)HighData) << 32) | LowData;
+}
+
+
diff --git a/MdePkg/Library/BaseLib/Ia32/XGetBv.nasm 
b/MdePkg/Library/BaseLib/Ia32/XGetBv.nasm
new file mode 100644
index ..b6dee38af029
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/XGetBv.nasm
@@ -0,0 +1,31 @@
+;--
+;
+; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+;   XGetBv.Asm
+;
+; Abstract:
+;
+;   AsmXgetBv function
+;
+; Notes:
+;
+;--
+
+SECTION .text
+
+;--
+; UINT64
+; EFIAPI
+; AsmXGetBv (
+;   IN UINT32  Index
+;   );
+;--
+global ASM_PFX(AsmXGetBv)
+ASM_PFX(AsmXGetBv):
+mov ecx, [esp + 4]
+xgetbv
+ret
diff --git a/MdePkg/Library/BaseLib/X64/XGetBv.nasm 
b/MdePkg/Library/BaseLib/X64/XGetBv.nasm
new file mode 100644
index ..f3aec43e6813
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X64/XGetBv.nasm
@@ -0,0 +1,34 @@

[edk2-devel] [PATCH v6 13/42] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a CPUID intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.

Add support to construct the required GHCB values to support a CPUID NAE
event. Additionally, CPUID 0x_000d requires XCR0 to be supplied in
the GHCB, so add support to issue the XGETBV instruction.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 44 +++
 1 file changed, 44 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 24f746f994ca..d57444b50719 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -11,6 +11,8 @@
 #include 
 #include "AMDSevVcCommon.h"
 
+#define CR4_OSXSAVE (1 << 18)
+
 typedef enum {
   LongMode64Bit= 0,
   LongModeCompat32Bit,
@@ -494,6 +496,44 @@ IoioExit (
   return 0;
 }
 
+STATIC
+UINT64
+CpuidExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  Ghcb->SaveArea.Rax = Regs->Rax;
+  GhcbSetRegValid (Ghcb, GhcbRax);
+  Ghcb->SaveArea.Rcx = Regs->Rcx;
+  GhcbSetRegValid (Ghcb, GhcbRcx);
+  if (Regs->Rax == 0x000d) {
+Ghcb->SaveArea.XCr0 = (AsmReadCr4 () & CR4_OSXSAVE) ? AsmXGetBv (0) : 1;
+GhcbSetRegValid (Ghcb, GhcbXCr0);
+  }
+
+  Status = VmgExit (Ghcb, SvmExitCpuid, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  if (!GhcbIsRegValid (Ghcb, GhcbRax) ||
+  !GhcbIsRegValid (Ghcb, GhcbRbx) ||
+  !GhcbIsRegValid (Ghcb, GhcbRcx) ||
+  !GhcbIsRegValid (Ghcb, GhcbRdx)) {
+return UnsupportedExit (Ghcb, Regs, InstructionData);
+  }
+  Regs->Rax = Ghcb->SaveArea.Rax;
+  Regs->Rbx = Ghcb->SaveArea.Rbx;
+  Regs->Rcx = Ghcb->SaveArea.Rcx;
+  Regs->Rdx = Ghcb->SaveArea.Rdx;
+
+  return 0;
+}
+
 UINTN
 DoVcCommon (
   GHCB*Ghcb,
@@ -510,6 +550,10 @@ DoVcCommon (
 
   ExitCode = Regs->ExceptionData;
   switch (ExitCode) {
+  case SvmExitCpuid:
+NaeExit = CpuidExit;
+break;
+
   case SvmExitIoioProt:
 NaeExit = IoioExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 16/42] UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a WBINVD intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 22 +++
 1 file changed, 22 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 3cac613c8889..55e18c47921e 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -591,6 +591,24 @@ MmioExit (
   return Status;
 }
 
+STATIC
+UINT64
+WbinvdExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  Status;
+
+  Status = VmgExit (Ghcb, SvmExitWbinvd, 0, 0);
+  if (Status) {
+return Status;
+  }
+
+  return 0;
+}
+
 STATIC
 UINT64
 MsrExit (
@@ -904,6 +922,10 @@ DoVcCommon (
 NaeExit = MsrExit;
 break;
 
+  case SvmExitWbinvd:
+NaeExit = WbinvdExit;
+break;
+
   case SvmExitNpf:
 NaeExit = MmioExit;
 break;
-- 
2.17.1


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[edk2-devel] [PATCH v6 15/42] UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO)

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a NPF intercept for an NPT entry with a reserved bit set
generates a #VC exception. This condition is assumed to be an MMIO access.
VMGEXIT must be used to allow the hypervisor to handle this intercept.

Add support to construct the required GHCB values to support a NPF NAE
event for MMIO.  Parse the instruction that generated the #VC exception,
setting the required register values in the GHCB and creating the proper
SW_EXIT_INFO1, SW_EXITINFO2 and SW_SCRATCH values in the GHCB.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 305 +-
 1 file changed, 303 insertions(+), 2 deletions(-)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 26de6304a176..3cac613c8889 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -86,8 +86,8 @@ typedef struct {
 UINT8  Scale;
   } Sib;
 
-  UINTN  RegData;
-  UINTN  RmData;
+  INTN  RegData;
+  INTN  RmData;
 } SEV_ES_INSTRUCTION_OPCODE_EXT;
 
 typedef struct {
@@ -159,6 +159,198 @@ GhcbSetRegValid (
   Ghcb->SaveArea.ValidBitmap[RegIndex] |= (1 << RegBit);
 }
 
+STATIC
+INT64 *
+GetRegisterPointer (
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  UINT8Register
+  )
+{
+  UINT64 *Reg;
+
+  switch (Register) {
+  case 0:
+Reg = >Rax;
+break;
+  case 1:
+Reg = >Rcx;
+break;
+  case 2:
+Reg = >Rdx;
+break;
+  case 3:
+Reg = >Rbx;
+break;
+  case 4:
+Reg = >Rsp;
+break;
+  case 5:
+Reg = >Rbp;
+break;
+  case 6:
+Reg = >Rsi;
+break;
+  case 7:
+Reg = >Rdi;
+break;
+  case 8:
+Reg = >R8;
+break;
+  case 9:
+Reg = >R9;
+break;
+  case 10:
+Reg = >R10;
+break;
+  case 11:
+Reg = >R11;
+break;
+  case 12:
+Reg = >R12;
+break;
+  case 13:
+Reg = >R13;
+break;
+  case 14:
+Reg = >R14;
+break;
+  case 15:
+Reg = >R15;
+break;
+  default:
+Reg = NULL;
+  }
+  ASSERT (Reg != NULL);
+
+  return (INT64 *) Reg;
+}
+
+STATIC
+VOID
+UpdateForDisplacement (
+  SEV_ES_INSTRUCTION_DATA  *InstructionData,
+  UINTNSize
+  )
+{
+  InstructionData->DisplacementSize = Size;
+  InstructionData->Immediate += Size;
+  InstructionData->End += Size;
+}
+
+STATIC
+BOOLEAN
+IsRipRelative (
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  SEV_ES_INSTRUCTION_OPCODE_EXT  *Ext = >Ext;
+
+  return ((InstructionData == LongMode64Bit) &&
+  (Ext->ModRm.Mod == 0) &&
+  (Ext->ModRm.Rm == 5)  &&
+  (InstructionData->SibPresent == FALSE));
+}
+
+STATIC
+UINTN
+GetEffectiveMemoryAddress (
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  SEV_ES_INSTRUCTION_OPCODE_EXT  *Ext = >Ext;
+  INTN   EffectiveAddress = 0;
+
+  if (IsRipRelative (InstructionData)) {
+/* RIP-relative displacement is a 32-bit signed value */
+INT32 RipRelative = *(INT32 *) InstructionData->Displacement;
+
+UpdateForDisplacement (InstructionData, 4);
+return (UINTN) ((INTN) Regs->Rip + RipRelative);
+  }
+
+  switch (Ext->ModRm.Mod) {
+  case 1:
+UpdateForDisplacement (InstructionData, 1);
+EffectiveAddress += (INT8) (*(INT8 *) (InstructionData->Displacement));
+break;
+  case 2:
+switch (InstructionData->AddrSize) {
+case Size16Bits:
+  UpdateForDisplacement (InstructionData, 2);
+  EffectiveAddress += (INT16) (*(INT16 *) (InstructionData->Displacement));
+  break;
+default:
+  UpdateForDisplacement (InstructionData, 4);
+  EffectiveAddress += (INT32) (*(INT32 *) (InstructionData->Displacement));
+  break;
+}
+break;
+  }
+
+  if (InstructionData->SibPresent) {
+if (Ext->Sib.Index != 4) {
+  EffectiveAddress += (*GetRegisterPointer (Regs, Ext->Sib.Index) << 
Ext->Sib.Scale);
+}
+
+if ((Ext->Sib.Base != 5) || Ext->ModRm.Mod) {
+  EffectiveAddress += *GetRegisterPointer (Regs, Ext->Sib.Base);
+} else {
+  UpdateForDisplacement (InstructionData, 4);
+  EffectiveAddress += (INT32) (*(INT32 *) (InstructionData->Displacement));
+}
+  } else {
+EffectiveAddress += *GetRegisterPointer (Regs, Ext->ModRm.Rm);
+  }
+
+  return (UINTN) EffectiveAddress;
+}
+
+STATIC
+VOID
+DecodeModRm (
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  SEV_ES_INSTRUCTION_REX_PREFIX  *RexPrefix = >RexPrefix;
+  SEV_ES_INSTRUCTION_OPCODE_EXT  *Ext = >Ext;
+  SEV_ES_INSTRUCTION_MODRM   *ModRm = >ModRm;
+  SEV_ES_INSTRUCTION_SIB *Sib = >Sib;
+
+  InstructionData->ModRmPresent = TRUE;
+  ModRm->Uint8 = *(InstructionData->End);
+
+  InstructionData->Displacement++;
+  

[edk2-devel] [PATCH v6 08/42] OvmfPkg: Prepare OvmfPkg to use the VmgExitLib library

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Various CpuExceptionHandlerLib libraries will updated to use the new
VmgExitLib library. To prevent any build breakage, update the OvmfPkg
DSC files that use a form of the CpuExceptionHandlerLib library to
include the VmgExitLib library.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 OvmfPkg/OvmfPkgIa32.dsc| 1 +
 OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
 OvmfPkg/OvmfPkgX64.dsc | 1 +
 OvmfPkg/OvmfXen.dsc| 1 +
 4 files changed, 4 insertions(+)

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 02ca17db8b2a..2701630be8f0 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -219,6 +219,7 @@ [LibraryClasses]
 
 [LibraryClasses.common]
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
 
 [LibraryClasses.common.SEC]
   TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index d08cf558c6aa..671fdfbbd47d 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -223,6 +223,7 @@ [LibraryClasses]
 
 [LibraryClasses.common]
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
 
 [LibraryClasses.common.SEC]
   TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index b2dccc40a865..5abf83e05480 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -223,6 +223,7 @@ [LibraryClasses]
 
 [LibraryClasses.common]
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
 
 [LibraryClasses.common.SEC]
   TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.inf
diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc
index 85fe39f7896c..4bf6335be767 100644
--- a/OvmfPkg/OvmfXen.dsc
+++ b/OvmfPkg/OvmfXen.dsc
@@ -204,6 +204,7 @@ [LibraryClasses]
 
 [LibraryClasses.common]
   BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
 
 [LibraryClasses.common.SEC]
   QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
-- 
2.17.1


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[edk2-devel] [PATCH v6 02/42] MdePkg: Add the MSR definition for the GHCB register

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

For SEV-ES, the GHCB page address is stored in the GHCB MSR register
(0xc0010130). Define the register and the format used for register
during GHCB protocol negotiation.

Cc: Michael D Kinney 
Cc: Liming Gao 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Include/Register/Amd/Fam17Msr.h | 42 ++
 1 file changed, 42 insertions(+)

diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h 
b/MdePkg/Include/Register/Amd/Fam17Msr.h
index 6ef45a9b21d3..466a3143599c 100644
--- a/MdePkg/Include/Register/Amd/Fam17Msr.h
+++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
@@ -17,6 +17,48 @@
 #ifndef __FAM17_MSR_H__
 #define __FAM17_MSR_H__
 
+/**
+  Secure Encrypted Virtualization - Encrypted State (SEV-ES) GHCB register
+
+**/
+#define MSR_SEV_ES_GHCB0xc0010130
+
+/**
+  MSR information returned for #MSR_SEV_ES_GHCB
+**/
+typedef union {
+  struct {
+UINT64  Function:12;
+  } GhcbInfo;
+
+  struct {
+UINT8   Reserved[3];
+UINT8   SevEncryptionBitPos;
+UINT16  SevEsProtocolMin;
+UINT16  SevEsProtocolMax;
+  } GhcbProtocol;
+
+  struct {
+UINT64  Function:12;
+UINT64  ReasonCodeSet:4;
+UINT64  ReasonCode:8;
+  } GhcbTerminate;
+
+  VOID*Ghcb;
+
+  UINT64  GhcbPhysicalAddress;
+} MSR_SEV_ES_GHCB_REGISTER;
+
+#define GHCB_INFO_SEV_INFO 1
+#define GHCB_INFO_SEV_INFO_GET 2
+#define GHCB_INFO_CPUID_REQUEST4
+#define GHCB_INFO_CPUID_RESPONSE   5
+#define GHCB_INFO_TERMINATE_REQUEST256
+
+#define GHCB_TERMINATE_GHCB0
+#define GHCB_TERMINATE_GHCB_GENERAL0
+#define GHCB_TERMINATE_GHCB_PROTOCOL   1
+
 /**
   Secure Encrypted Virtualization (SEV) status register
 
-- 
2.17.1


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[edk2-devel] [PATCH v6 10/42] UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Add base support to handle #VC exceptions.  This includes a stub routine
to invoke when a #VC exception occurs and special checks in the common
exception handlers to invoke the #VC exception handler routine.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Jordan Justen 
Cc: Ard Biesheuvel 
Cc: Maurice Ma 
Cc: Guo Dong 
Cc: Benjamin You 
Signed-off-by: Tom Lendacky 
---
 .../DxeCpuExceptionHandlerLib.inf |  5 ++
 .../PeiCpuExceptionHandlerLib.inf |  5 ++
 .../SecPeiCpuExceptionHandlerLib.inf  |  5 ++
 .../SmmCpuExceptionHandlerLib.inf |  5 ++
 .../CpuExceptionHandlerLib/AMDSevVcCommon.h   | 26 ++
 .../CpuExceptionCommon.h  |  2 +
 .../CpuExceptionHandlerLib/AMDSevVcHandler.c  | 29 +++
 .../CpuExceptionCommon.c  |  2 +-
 .../Ia32/ArchAMDSevVcHandler.c| 24 +
 .../PeiDxeSmmCpuException.c   | 16 ++
 .../SecPeiCpuException.c  | 16 ++
 .../X64/ArchAMDSevVcHandler.c | 50 +++
 12 files changed, 184 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/AMDSevVcCommon.h
 create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/AMDSevVcHandler.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchAMDSevVcHandler.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
index e41383573043..4d79c4910b18 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
@@ -26,17 +26,21 @@ [Sources.Ia32]
   Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ArchAMDSevVcHandler.c
 
 [Sources.X64]
   X64/ExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/ArchAMDSevVcHandler.c
 
 [Sources.common]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
   PeiDxeSmmCpuException.c
   DxeException.c
+  AMDSevVcHandler.c
+  AMDSevVcCommon.h
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
@@ -57,3 +61,4 @@ [LibraryClasses]
   PeCoffGetEntryPointLib
   MemoryAllocationLib
   DebugLib
+  VmgExitLib
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
index f31423ac0f91..e8445e47eaa3 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
@@ -26,17 +26,21 @@ [Sources.Ia32]
   Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ArchAMDSevVcHandler.c
 
 [Sources.X64]
   X64/ExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/ArchAMDSevVcHandler.c
 
 [Sources.common]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
   PeiCpuException.c
   PeiDxeSmmCpuException.c
+  AMDSevVcHandler.c
+  AMDSevVcCommon.h
 
 [Packages]
   MdePkg/MdePkg.dec
@@ -52,6 +56,7 @@ [LibraryClasses]
   HobLib
   MemoryAllocationLib
   SynchronizationLib
+  VmgExitLib
 
 [Pcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard# CONSUMES
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
index 6d25cafe2ca3..a15bf71b4052 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
@@ -26,16 +26,20 @@ [Sources.Ia32]
   Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ArchAMDSevVcHandler.c
 
 [Sources.X64]
   X64/ExceptionHandlerAsm.nasm
   X64/ArchExceptionHandler.c
   X64/ArchInterruptDefs.h
+  X64/ArchAMDSevVcHandler.c
 
 [Sources.common]
   CpuExceptionCommon.h
   CpuExceptionCommon.c
   SecPeiCpuException.c
+  AMDSevVcHandler.c
+  AMDSevVcCommon.h
 
 [Packages]
   MdePkg/MdePkg.dec
@@ -48,3 +52,4 @@ [LibraryClasses]
   PrintLib
   LocalApicLib
   PeCoffGetEntryPointLib
+  VmgExitLib
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
index 66c7f59e3c91..190d7dfcd42a 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
@@ -26,17 +26,21 @@ [Sources.Ia32]
   Ia32/ExceptionTssEntryAsm.nasm
   Ia32/ArchExceptionHandler.c
   Ia32/ArchInterruptDefs.h
+  Ia32/ArchAMDSevVcHandler.c
 
 [Sources.X64]
   

[edk2-devel] [PATCH v6 14/42] UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a MSR_PROT intercept generates a #VC exception. VMGEXIT must
be used to allow the hypervisor to handle this intercept.

Add support to construct the required GHCB values to support an MSR_PROT
NAE event. Parse the instruction that generated the #VC exception to
determine whether it is RDMSR or WRMSR, setting the required register
register values in the GHCB and creating the proper SW_EXIT_INFO1 value in
the GHCB.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 49 +++
 1 file changed, 49 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index d57444b50719..26de6304a176 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -294,6 +294,51 @@ UnsupportedExit (
   return Status;
 }
 
+STATIC
+UINT64
+MsrExit (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  UINT64  ExitInfo1, Status;
+
+  ExitInfo1 = 0;
+
+  switch (*(InstructionData->OpCodes + 1)) {
+  case 0x30: // WRMSR
+ExitInfo1 = 1;
+Ghcb->SaveArea.Rax = Regs->Rax;
+GhcbSetRegValid (Ghcb, GhcbRax);
+Ghcb->SaveArea.Rdx = Regs->Rdx;
+GhcbSetRegValid (Ghcb, GhcbRdx);
+/* Fallthrough */
+  case 0x32: // RDMSR
+Ghcb->SaveArea.Rcx = Regs->Rcx;
+GhcbSetRegValid (Ghcb, GhcbRcx);
+break;
+  default:
+return UnsupportedExit (Ghcb, Regs, InstructionData);
+  }
+
+  Status = VmgExit (Ghcb, SvmExitMsr, ExitInfo1, 0);
+  if (Status) {
+return Status;
+  }
+
+  if (!ExitInfo1) {
+if (!GhcbIsRegValid (Ghcb, GhcbRax) ||
+!GhcbIsRegValid (Ghcb, GhcbRdx)) {
+  return UnsupportedExit (Ghcb, Regs, InstructionData);
+}
+Regs->Rax = Ghcb->SaveArea.Rax;
+Regs->Rdx = Ghcb->SaveArea.Rdx;
+  }
+
+  return 0;
+}
+
 #define IOIO_TYPE_STR  (1 << 2)
 #define IOIO_TYPE_IN   1
 #define IOIO_TYPE_INS  (IOIO_TYPE_IN | IOIO_TYPE_STR)
@@ -558,6 +603,10 @@ DoVcCommon (
 NaeExit = IoioExit;
 break;
 
+  case SvmExitMsr:
+NaeExit = MsrExit;
+break;
+
   default:
 NaeExit = UnsupportedExit;
   }
-- 
2.17.1


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[edk2-devel] [PATCH v6 06/42] MdePkg/BaseLib: Add support for the VMGEXIT instruction

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

VMGEXIT is a new instruction used for Hypervisor/Guest communication when
running as an SEV-ES guest. A VMGEXIT will cause an automatic exit (AE)
to occur, resulting in a #VMEXIT with an exit code value of 0x403.

Provide the necessary support to execute the VMGEXIT instruction, which
is "rep; vmmcall".

Cc: Michael D Kinney 
Cc: Liming Gao 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Library/BaseLib/BaseLib.inf   |  2 ++
 MdePkg/Include/Library/BaseLib.h | 14 +
 MdePkg/Library/BaseLib/Ia32/GccInline.c  | 17 +++
 MdePkg/Library/BaseLib/X64/GccInline.c   | 17 +++
 MdePkg/Library/BaseLib/Ia32/VmgExit.nasm | 37 
 MdePkg/Library/BaseLib/X64/VmgExit.nasm  | 32 
 6 files changed, 119 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/Ia32/VmgExit.nasm
 create mode 100644 MdePkg/Library/BaseLib/X64/VmgExit.nasm

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index d7a1dd017e95..62a09197b8a8 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -153,6 +153,7 @@ [Sources.Ia32]
   Ia32/EnableCache.c | MSFT
   Ia32/DisableCache.c | MSFT
   Ia32/XGetBv.nasm | MSFT
+  Ia32/VmgExit.nasm | MSFT
 
 
   Ia32/GccInline.c | GCC
@@ -288,6 +289,7 @@ [Sources.X64]
   X64/ReadCr0.nasm| MSFT
   X64/ReadEflags.nasm| MSFT
   X64/XGetBv.nasm | MSFT
+  X64/VmgExit.nasm | MSFT
 
 
   X64/Non-existing.c
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index d0cbb52ed8f9..99fff8af5a3c 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -7906,6 +7906,20 @@ AsmXGetBv (
   );
 
 
+/**
+  Executes a VMGEXIT instruction (VMMCALL with a REP prefix)
+
+  Executes a VMGEXIT instruction. This function is only available on IA-32 and
+  x64.
+
+**/
+VOID
+EFIAPI
+AsmVmgExit (
+  VOID
+  );
+
+
 /**
   Patch the immediate operand of an IA32 or X64 instruction such that the byte,
   word, dword or qword operand is encoded at the end of the instruction's
diff --git a/MdePkg/Library/BaseLib/Ia32/GccInline.c 
b/MdePkg/Library/BaseLib/Ia32/GccInline.c
index 591f0bb0e097..ee8c62c79c93 100644
--- a/MdePkg/Library/BaseLib/Ia32/GccInline.c
+++ b/MdePkg/Library/BaseLib/Ia32/GccInline.c
@@ -1791,3 +1791,20 @@ AsmXGetBv (
 }
 
 
+/**
+  Executes a VMGEXIT instruction.
+
+  Executes a VMGEXIT instruction. This function is only available on IA-32 and
+  X64.
+
+**/
+VOID
+EFIAPI
+AsmVmgExit (
+  VOID
+  )
+{
+  __asm__ __volatile__ ("rep; vmmcall":::"memory");
+}
+
+
diff --git a/MdePkg/Library/BaseLib/X64/GccInline.c 
b/MdePkg/Library/BaseLib/X64/GccInline.c
index 3eed1205adb2..277974eff9ee 100644
--- a/MdePkg/Library/BaseLib/X64/GccInline.c
+++ b/MdePkg/Library/BaseLib/X64/GccInline.c
@@ -1828,3 +1828,20 @@ AsmXGetBv (
 }
 
 
+/**
+  Executes a VMGEXIT instruction.
+
+  Executes a VMGEXIT instruction. This function is only available on IA-32 and
+  X64.
+
+**/
+VOID
+EFIAPI
+AsmVmgExit (
+  VOID
+  )
+{
+  __asm__ __volatile__ ("rep; vmmcall":::"memory");
+}
+
+
diff --git a/MdePkg/Library/BaseLib/Ia32/VmgExit.nasm 
b/MdePkg/Library/BaseLib/Ia32/VmgExit.nasm
new file mode 100644
index ..cdf727825400
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/VmgExit.nasm
@@ -0,0 +1,37 @@
+;--
+;
+; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+;   VmgExit.Asm
+;
+; Abstract:
+;
+;   AsmVmgExit function
+;
+; Notes:
+;
+;--
+
+SECTION .text
+
+;--
+; VOID
+; EFIAPI
+; AsmVmgExit (
+;   VOID
+;   );
+;--
+global ASM_PFX(AsmVmgExit)
+ASM_PFX(AsmVmgExit):
+;
+; NASM doesn't support the vmmcall instruction in 32-bit mode, so work around
+; this by temporarily switching to 64-bit mode.
+;
+BITS64
+rep vmmcall
+BITS32
+ret
+
diff --git a/MdePkg/Library/BaseLib/X64/VmgExit.nasm 
b/MdePkg/Library/BaseLib/X64/VmgExit.nasm
new file mode 100644
index ..6537a97b273c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X64/VmgExit.nasm
@@ -0,0 +1,32 @@
+;--
+;
+; Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Module Name:
+;
+;   VmgExit.Asm
+;
+; Abstract:
+;
+;   AsmVmgExit function
+;
+; Notes:
+;
+;--
+
+DEFAULT REL
+SECTION .text
+
+;--
+; VOID
+; EFIAPI
+; 

[edk2-devel] [PATCH v6 04/42] MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

GHCB pages must be mapped as shared pages, so modify the process of
creating identity mapped pagetable entries so that GHCB entries are
created without the encryption bit set.

Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Dandan Bi 
Cc: Liming Gao 
Signed-off-by: Tom Lendacky 
---
 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf   |  2 +
 .../Core/DxeIplPeim/X64/VirtualMemory.h   | 12 -
 .../Core/DxeIplPeim/Ia32/DxeLoadFunc.c|  4 +-
 .../Core/DxeIplPeim/X64/DxeLoadFunc.c | 11 -
 .../Core/DxeIplPeim/X64/VirtualMemory.c   | 49 ++-
 5 files changed, 62 insertions(+), 16 deletions(-)

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf 
b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index 98bc17fc9d1f..5e6b78e295e6 100644
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -111,6 +111,8 @@ [Pcd.IA32,Pcd.X64]
   gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask   ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard   ## 
CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdUse5LevelPageTable  ## 
SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase## 
CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize## 
CONSUMES
 
 [Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64]
   gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack   ## 
SOMETIMES_CONSUMES
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h 
b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h
index 2d0493f109e8..6b7c38a441d6 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h
@@ -201,6 +201,8 @@ EnableExecuteDisableBit (
   @param[in, out] PageEntry2M   Pointer to 2M page entry.
   @param[in]  StackBase Stack base address.
   @param[in]  StackSize Stack size.
+  @param[in]  GhcbBase  GHCB page area base address.
+  @param[in]  GhcbSize  GHCB page area size.
 
 **/
 VOID
@@ -208,7 +210,9 @@ Split2MPageTo4K (
   IN EFI_PHYSICAL_ADDRESS   PhysicalAddress,
   IN OUT UINT64 *PageEntry2M,
   IN EFI_PHYSICAL_ADDRESS   StackBase,
-  IN UINTN  StackSize
+  IN UINTN  StackSize,
+  IN EFI_PHYSICAL_ADDRESS   GhcbBase,
+  IN UINTN  GhcbSize
   );
 
 /**
@@ -217,6 +221,8 @@ Split2MPageTo4K (
 
   @param[in] StackBase  Stack base address.
   @param[in] StackSize  Stack size.
+  @param[in] GhcbBase   GHCB page area base address.
+  @param[in] GhcbSize   GHCB page area size.
 
   @return The address of 4 level page map.
 
@@ -224,7 +230,9 @@ Split2MPageTo4K (
 UINTN
 CreateIdentityMappingPageTables (
   IN EFI_PHYSICAL_ADDRESS   StackBase,
-  IN UINTN  StackSize
+  IN UINTN  StackSize,
+  IN EFI_PHYSICAL_ADDRESS   GhcbBase,
+  IN UINTN  GhcbkSize
   );
 
 
diff --git a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c 
b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
index 6e8ca824d469..284b34818ca7 100644
--- a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
+++ b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
@@ -123,7 +123,7 @@ Create4GPageTablesIa32Pae (
 //
 // Need to split this 2M page that covers stack range.
 //
-Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry, 
StackBase, StackSize);
+Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry, 
StackBase, StackSize, 0, 0);
   } else {
 //
 // Fill in the Page Directory entries
@@ -282,7 +282,7 @@ HandOffToDxeCore (
 //
 // Create page table and save PageMapLevel4 to CR3
 //
-PageTables = CreateIdentityMappingPageTables (BaseOfStack, STACK_SIZE);
+PageTables = CreateIdentityMappingPageTables (BaseOfStack, STACK_SIZE, 0, 
0);
 
 //
 // End of PEI phase signal
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c 
b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
index f465eb1d8ac4..156a477d8467 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
@@ -35,6 +35,8 @@ HandOffToDxeCore (
   UINT32  Index;
   EFI_VECTOR_HANDOFF_INFO *VectorInfo;
   EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;
+  VOID*GhcbBase;
+  UINTN   GhcbSize;
 
   //
   // Clear page 0 and mark it as allocated if NULL pointer detection is 
enabled.
@@ -81,12 +83,19 @@ HandOffToDxeCore (
   TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) 
* EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
   TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
 
+  //
+  // Get the address and 

[edk2-devel] [PATCH v6 12/42] UefiCpuPkg/CpuExceptionHandler: Support string IO for IOIO_PROT NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Add support to the #VC exception handler to handle string IO. This
requires expanding the IO instruction parsing to recognize string based
IO instructions as well as preparing an un-encrypted buffer to be used
to transfer (either to or from the guest) the string contents for the IO
operation. The SW_EXITINFO2 and SW_SCRATCH fields of the GHCB are set
appropriately for the operation. Multiple VMGEXIT invocations may be
needed to complete the string IO operation.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 78 ---
 1 file changed, 68 insertions(+), 10 deletions(-)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 577dacfb7ca5..24f746f994ca 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -321,6 +321,22 @@ IoioExitInfo (
   UINT64  ExitInfo = 0;
 
   switch (*(InstructionData->OpCodes)) {
+  // INS opcodes
+  case 0x6C:
+  case 0x6D:
+ExitInfo |= IOIO_TYPE_INS;
+ExitInfo |= IOIO_SEG_ES;
+ExitInfo |= ((Regs->Rdx & 0x) << 16);
+break;
+
+  // OUTS opcodes
+  case 0x6E:
+  case 0x6F:
+ExitInfo |= IOIO_TYPE_OUTS;
+ExitInfo |= IOIO_SEG_DS;
+ExitInfo |= ((Regs->Rdx & 0x) << 16);
+break;
+
   // IN immediate opcodes
   case 0xE4:
   case 0xE5:
@@ -358,6 +374,8 @@ IoioExitInfo (
   }
 
   switch (*(InstructionData->OpCodes)) {
+  case 0x6C:
+  case 0x6E:
   case 0xE4:
   case 0xE6:
   case 0xEC:
@@ -404,7 +422,8 @@ IoioExit (
   SEV_ES_INSTRUCTION_DATA  *InstructionData
   )
 {
-  UINT64  ExitInfo1, Status;
+  UINT64   ExitInfo1, ExitInfo2, Status;
+  BOOLEAN  String;
 
   ExitInfo1 = IoioExitInfo (Regs, InstructionData);
   if (!ExitInfo1) {
@@ -421,16 +440,55 @@ IoioExit (
   Ghcb->SaveArea.Rax = Regs->Rax;
   GhcbSetRegValid (Ghcb, GhcbRax);
 
-  Status = VmgExit (Ghcb, SvmExitIoioProt, ExitInfo1, 0);
-  if (Status) {
-return Status;
-  }
-
-  if (ExitInfo1 & IOIO_TYPE_IN) {
-if (!GhcbIsRegValid (Ghcb, GhcbRax)) {
-  return UnsupportedExit (Ghcb, Regs, InstructionData);
+  String = (ExitInfo1 & IOIO_TYPE_STR) ? TRUE : FALSE;
+  if (String) {
+UINTN  IoBytes, VmgExitBytes;
+UINTN  GhcbCount, OpCount;
+
+Status = 0;
+
+IoBytes = (ExitInfo1 >> 4) & 0x7;
+GhcbCount = sizeof (Ghcb->SharedBuffer) / IoBytes;
+
+OpCount = (ExitInfo1 & IOIO_REP) ? Regs->Rcx : 1;
+while (OpCount) {
+  ExitInfo2 = MIN (OpCount, GhcbCount);
+  VmgExitBytes = ExitInfo2 * IoBytes;
+
+  if (!(ExitInfo1 & IOIO_TYPE_IN)) {
+CopyMem (Ghcb->SharedBuffer, (VOID *) Regs->Rsi, VmgExitBytes);
+Regs->Rsi += VmgExitBytes;
+  }
+
+  Ghcb->SaveArea.SwScratch = (UINT64) Ghcb->SharedBuffer;
+  Status = VmgExit (Ghcb, SvmExitIoioProt, ExitInfo1, ExitInfo2);
+  if (Status) {
+return Status;
+  }
+
+  if (ExitInfo1 & IOIO_TYPE_IN) {
+CopyMem ((VOID *) Regs->Rdi, Ghcb->SharedBuffer, VmgExitBytes);
+Regs->Rdi += VmgExitBytes;
+  }
+
+  if (ExitInfo1 & IOIO_REP) {
+Regs->Rcx -= ExitInfo2;
+  }
+
+  OpCount -= ExitInfo2;
+}
+  } else {
+Status = VmgExit (Ghcb, SvmExitIoioProt, ExitInfo1, 0);
+if (Status) {
+  return Status;
+}
+
+if (ExitInfo1 & IOIO_TYPE_IN) {
+  if (!GhcbIsRegValid (Ghcb, GhcbRax)) {
+return UnsupportedExit (Ghcb, Regs, InstructionData);
+  }
+  Regs->Rax = Ghcb->SaveArea.Rax;
 }
-Regs->Rax = Ghcb->SaveArea.Rax;
   }
 
   return 0;
-- 
2.17.1


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[edk2-devel] [PATCH v6 11/42] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Under SEV-ES, a IOIO_PROT intercept generates a #VC exception. VMGEXIT
must be used to allow the hypervisor to handle this intercept.

Add support to construct the required GHCB values to support a IOIO_PROT
NAE event.  Parse the instruction that generated the #VC exception,
setting the required register values in the GHCB and creating the proper
SW_EXITINFO1 value in the GHCB.

Cc: Eric Dong 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Tom Lendacky 
---
 .../X64/ArchAMDSevVcHandler.c | 463 +-
 1 file changed, 449 insertions(+), 14 deletions(-)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
index 7cbf89d9b1aa..577dacfb7ca5 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c
@@ -11,6 +11,431 @@
 #include 
 #include "AMDSevVcCommon.h"
 
+typedef enum {
+  LongMode64Bit= 0,
+  LongModeCompat32Bit,
+  LongModeCompat16Bit,
+} SEV_ES_INSTRUCTION_MODE;
+
+typedef enum {
+  Size8Bits= 0,
+  Size16Bits,
+  Size32Bits,
+  Size64Bits,
+} SEV_ES_INSTRUCTION_SIZE;
+
+typedef enum {
+  SegmentEs= 0,
+  SegmentCs,
+  SegmentSs,
+  SegmentDs,
+  SegmentFs,
+  SegmentGs,
+} SEV_ES_INSTRUCTION_SEGMENT;
+
+typedef enum {
+  RepNone  = 0,
+  RepZ,
+  RepNZ,
+} SEV_ES_INSTRUCTION_REP;
+
+typedef union {
+  struct {
+UINT8  B:1;
+UINT8  X:1;
+UINT8  R:1;
+UINT8  W:1;
+UINT8  REX:4;
+  } Bits;
+
+  UINT8  Uint8;
+} SEV_ES_INSTRUCTION_REX_PREFIX;
+
+typedef union {
+  struct {
+UINT8  Rm:3;
+UINT8  Reg:3;
+UINT8  Mod:2;
+  } Bits;
+
+  UINT8  Uint8;
+} SEV_ES_INSTRUCTION_MODRM;
+
+typedef union {
+  struct {
+UINT8  Base:3;
+UINT8  Index:3;
+UINT8  Scale:2;
+  } Bits;
+
+  UINT8  Uint8;
+} SEV_ES_INSTRUCTION_SIB;
+
+typedef struct {
+  struct {
+UINT8  Rm;
+UINT8  Reg;
+UINT8  Mod;
+  } ModRm;
+
+  struct {
+UINT8  Base;
+UINT8  Index;
+UINT8  Scale;
+  } Sib;
+
+  UINTN  RegData;
+  UINTN  RmData;
+} SEV_ES_INSTRUCTION_OPCODE_EXT;
+
+typedef struct {
+  GHCB   *Ghcb;
+
+  SEV_ES_INSTRUCTION_MODEMode;
+  SEV_ES_INSTRUCTION_SIZEDataSize;
+  SEV_ES_INSTRUCTION_SIZEAddrSize;
+  BOOLEANSegmentSpecified;
+  SEV_ES_INSTRUCTION_SEGMENT Segment;
+  SEV_ES_INSTRUCTION_REP RepMode;
+
+  UINT8  *Begin;
+  UINT8  *End;
+
+  UINT8  *Prefixes;
+  UINT8  *OpCodes;
+  UINT8  *Displacement;
+  UINT8  *Immediate;
+
+  SEV_ES_INSTRUCTION_REX_PREFIX  RexPrefix;
+
+  BOOLEANModRmPresent;
+  SEV_ES_INSTRUCTION_MODRM   ModRm;
+
+  BOOLEANSibPresent;
+  SEV_ES_INSTRUCTION_SIB Sib;
+
+  UINT8  PrefixSize;
+  UINT8  OpCodeSize;
+  UINT8  DisplacementSize;
+  UINT8  ImmediateSize;
+
+  SEV_ES_INSTRUCTION_OPCODE_EXT  Ext;
+} SEV_ES_INSTRUCTION_DATA;
+
+typedef
+UINT64
+(*NAE_EXIT) (
+  GHCB *Ghcb,
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  );
+
+
+STATIC
+BOOLEAN
+GhcbIsRegValid (
+  GHCB*Ghcb,
+  GHCB_REGISTER   Reg
+  )
+{
+  UINT32  RegIndex = Reg / 8;
+  UINT32  RegBit   = Reg & 0x07;
+
+  return (Ghcb->SaveArea.ValidBitmap[RegIndex] & (1 << RegBit));
+}
+
+STATIC
+VOID
+GhcbSetRegValid (
+  GHCB*Ghcb,
+  GHCB_REGISTER   Reg
+  )
+{
+  UINT32  RegIndex = Reg / 8;
+  UINT32  RegBit   = Reg & 0x07;
+
+  Ghcb->SaveArea.ValidBitmap[RegIndex] |= (1 << RegBit);
+}
+
+STATIC
+VOID
+DecodePrefixes (
+  EFI_SYSTEM_CONTEXT_X64   *Regs,
+  SEV_ES_INSTRUCTION_DATA  *InstructionData
+  )
+{
+  SEV_ES_INSTRUCTION_MODE  Mode;
+  SEV_ES_INSTRUCTION_SIZE  ModeDataSize;
+  SEV_ES_INSTRUCTION_SIZE  ModeAddrSize;
+  UINT8*Byte;
+
+  /*TODO: Determine current mode - 64-bit for now */
+  Mode = LongMode64Bit;
+  ModeDataSize = Size32Bits;
+  ModeAddrSize = Size64Bits;
+
+  InstructionData->Mode = Mode;
+  InstructionData->DataSize = ModeDataSize;
+  InstructionData->AddrSize = ModeAddrSize;
+
+  InstructionData->Prefixes = InstructionData->Begin;
+
+  Byte = InstructionData->Prefixes;
+  for ( ; ; Byte++, InstructionData->PrefixSize++) {
+switch (*Byte) {
+case 0x26:
+case 0x2E:
+case 0x36:
+case 0x3E:
+  if (Mode != LongMode64Bit) {
+InstructionData->SegmentSpecified = TRUE;
+InstructionData->Segment = (*Byte >> 3) & 3;
+  }
+  break;
+
+case 0x40 ... 0x4F:
+  InstructionData->RexPrefix.Uint8 = *Byte;
+  if (*Byte & 

[edk2-devel] [PATCH v6 01/42] MdePkg: Create PCDs to be used in support of SEV-ES

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Three new dynamic PCDs are needed to support SEV-ES under OVMF:
  - PcdSevEsIsEnabled: BOOLEAN value used to indicate if SEV-ES is enabled
  - PcdGhcbBase:   UINT64 value that is the base address of the GHCB
   allocation.
  - PcdGhcbSize:   UINT64 value that is the size, in bytes, of the
   GHCB allocation (size is dependent on the number of
   APs).

Cc: Jian J Wang 
Cc: Hao A Wu 
Signed-off-by: Tom Lendacky 
---
 MdeModulePkg/MdeModulePkg.dec | 9 +
 UefiCpuPkg/UefiCpuPkg.dec | 6 ++
 2 files changed, 15 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 91a3c608231c..c144b23233db 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -2071,6 +2071,15 @@ [PcdsDynamic, PcdsDynamicEx]
   # @Prompt If there is any test key used by the platform.
   gEfiMdeModulePkgTokenSpaceGuid.PcdTestKeyUsed|FALSE|BOOLEAN|0x00030003
 
+  ## This dynamic PCD holds the base address of the GHCB pool allocation.
+  # @Prompt GHCB Pool Base Address
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0|UINT64|0x00030007
+
+  ## This dynamic PCD holds the total size of the GHCB pool allocation.
+  #  The amount of memory allocated for GHCBs is dependent on the number of 
APs.
+  # @Prompt GHCB Pool Size
+  gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbSize|0|UINT64|0x00030008
+
 [PcdsDynamicEx]
   ## This dynamic PCD enables the default variable setting.
   #  Its value is the default store ID value. The default value is zero as 
Standard default.
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index e91dc68cbeb2..2f30bf89615f 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -364,5 +364,11 @@ [PcdsDynamic, PcdsDynamicEx]
   # @ValidRange  0x8001 | 0 - 1
   gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme|0x0|UINT8|0x6015
 
+  ## This dynamic PCD indicates whether SEV-ES is enabled
+  #   TRUE  - SEV-ES is enabled
+  #   FALSE - SEV-ES is not enabled
+  # @Prompt SEV-ES Status
+  gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|FALSE|BOOLEAN|0x6016
+
 [UserExtensions.TianoCore."ExtraFiles"]
   UefiCpuPkgExtra.uni
-- 
2.17.1


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[edk2-devel] [PATCH v6 03/42] MdePkg: Add a structure definition for the GHCB

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

The GHCB is used by an SEV-ES guest for communicating between the guest
and the hypervisor. Create the GHCB definition as defined by the GHCB
protocol definition.

Cc: Michael D Kinney 
Cc: Liming Gao 
Signed-off-by: Tom Lendacky 
---
 MdePkg/Include/Register/Amd/Ghcb.h | 136 +
 1 file changed, 136 insertions(+)
 create mode 100644 MdePkg/Include/Register/Amd/Ghcb.h

diff --git a/MdePkg/Include/Register/Amd/Ghcb.h 
b/MdePkg/Include/Register/Amd/Ghcb.h
new file mode 100644
index ..ffad7efd82d9
--- /dev/null
+++ b/MdePkg/Include/Register/Amd/Ghcb.h
@@ -0,0 +1,136 @@
+/** @file
+  Guest-Hypervisor Communication Block (GHCB) Definition.
+
+  Provides data types allowing an SEV-ES guest to interact with the hypervisor
+  using the GHCB protocol.
+
+  Copyright (c) 2020, Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Specification Reference:
+  SEV-ES Guest-Hypervisor Communication Block Standardization
+
+**/
+
+#ifndef __GHCB_H__
+#define __GHCB_H__
+
+#include 
+#include 
+
+#define UD_EXCEPTION  6
+#define GP_EXCEPTION 13
+
+#define GHCB_VERSION_MIN 1
+#define GHCB_VERSION_MAX 1
+
+#define GHCB_STANDARD_USAGE  0
+
+typedef enum {
+  SvmExitDr7Read   = 0x27,
+  SvmExitDr7Write  = 0x37,
+  SvmExitRdtsc = 0x6E,
+  SvmExitRdpmc,
+  SvmExitCpuid = 0x72,
+  SvmExitInvd  = 0x76,
+  SvmExitIoioProt  = 0x7B,
+  SvmExitMsr,
+  SvmExitVmmCall   = 0x81,
+  SvmExitRdtscp= 0x87,
+  SvmExitWbinvd= 0x89,
+  SvmExitMonitor,
+  SvmExitMwait,
+  SvmExitNpf   = 0x400,
+
+  // VMG special exits
+  SvmExitMmioRead  = 0x8001,
+  SvmExitMmioWrite,
+  SvmExitNmiComplete,
+  SvmExitApResetHold,
+  SvmExitApJumpTable,
+
+  SvmExitUnsupported   = 0x8000,
+} SVM_EXITCODE;
+
+typedef enum {
+  GhcbCpl  = 25,
+  GhcbRflags   = 46,
+  GhcbRip,
+  GhcbRsp  = 59,
+  GhcbRax  = 63,
+  GhcbRcx  = 97,
+  GhcbRdx,
+  GhcbRbx,
+  GhcbRbp  = 101,
+  GhcbRsi,
+  GhcbRdi,
+  GhcbR8,
+  GhcbR9,
+  GhcbR10,
+  GhcbR11,
+  GhcbR12,
+  GhcbR13,
+  GhcbR14,
+  GhcbR15,
+  GhcbXCr0 = 125,
+} GHCB_REGISTER;
+
+typedef struct {
+  UINT8  Reserved1[203];
+  UINT8  Cpl;
+  UINT8  Reserved2[148];
+  UINT64 Dr7;
+  UINT8  Reserved3[144];
+  UINT64 Rax;
+  UINT8  Reserved4[264];
+  UINT64 Rcx;
+  UINT64 Rdx;
+  UINT64 Rbx;
+  UINT8  Reserved5[112];
+  UINT64 SwExitCode;
+  UINT64 SwExitInfo1;
+  UINT64 SwExitInfo2;
+  UINT64 SwScratch;
+  UINT8  Reserved6[56];
+  UINT64 XCr0;
+  UINT8  ValidBitmap[16];
+  UINT64 X87StateGpa;
+  UINT8  Reserved7[1016];
+} __attribute__ ((__packed__)) GHCB_SAVE_AREA;
+
+typedef struct {
+  GHCB_SAVE_AREA SaveArea;
+  UINT8  SharedBuffer[2032];
+  UINT8  Reserved1[10];
+  UINT16 ProtocolVersion;
+  UINT32 GhcbUsage;
+} __attribute__ ((__packed__)) __attribute__ ((aligned(SIZE_4KB))) GHCB;
+
+typedef union {
+  struct {
+UINT32  Lower32Bits;
+UINT32  Upper32Bits;
+  } Elements;
+
+  UINT64Uint64;
+} GHCB_EXIT_INFO;
+
+typedef union {
+  struct {
+UINT32  Vector:8;
+UINT32  Type:3;
+UINT32  ErrorCodeValid:1;
+UINT32  Rsvd:19;
+UINT32  Valid:1;
+UINT32  ErrorCode;
+  } Elements;
+
+  UINT64Uint64;
+} GHCB_EVENT_INJECTION;
+
+#define GHCB_EVENT_INJECTION_TYPE_INT0
+#define GHCB_EVENT_INJECTION_TYPE_NMI2
+#define GHCB_EVENT_INJECTION_TYPE_EXCEPTION  3
+#define GHCB_EVENT_INJECTION_TYPE_SOFT_INT   4
+
+#endif
-- 
2.17.1


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[edk2-devel] [PATCH v6 00/42] SEV-ES guest support

2020-03-24 Thread Lendacky, Thomas
This patch series provides support for running EDK2/OVMF under SEV-ES.

Secure Encrypted Virtualization - Encrypted State (SEV-ES) expands on the
SEV support to protect the guest register state from the hypervisor. See
"AMD64 Architecture Programmer's Manual Volume 2: System Programming",
section "15.35 Encrypted State (SEV-ES)" [1].

In order to allow a hypervisor to perform functions on behalf of a guest,
there is architectural support for notifying a guest's operating system
when certain types of VMEXITs are about to occur. This allows the guest to
selectively share information with the hypervisor to satisfy the requested
function. The notification is performed using a new exception, the VMM
Communication exception (#VC). The information is shared through the
Guest-Hypervisor Communication Block (GHCB) using the VMGEXIT instruction.
The GHCB format and the protocol for using it is documented in "SEV-ES
Guest-Hypervisor Communication Block Standardization" [2].

The main areas of the EDK2 code that are updated to support SEV-ES are
around the exception handling support and the AP boot support.

Exception support is required starting in Sec, continuing through Pei
and into Dxe in order to handle #VC exceptions that are generated.  Each
AP requires it's own GHCB page as well as a page to hold values specific
to that AP.

AP booting poses some interesting challenges. The INIT-SIPI-SIPI sequence
is typically used to boot the APs. However, the hypervisor is not allowed
to update the guest registers. The GHCB document [2] talks about how SMP
booting under SEV-ES is performed.

Since the GHCB page must be a shared (unencrypted) page, the processor
must be running in long mode in order for the guest and hypervisor to
communicate with each other. As a result, SEV-ES is only supported under
the X64 architecture.

[1] https://www.amd.com/system/files/TechDocs/24593.pdf
[2] https://developer.amd.com/wp-content/resources/56421.pdf

---

These patches are based on commit:
2f524a745e23 ("BaseTools:Fix build tools print traceback info issue")

Proper execution of SEV-ES relies on Bugzilla 2340 being fixed.

A version of the tree (with an extra patch to workaround Bugzilla 2340) can
be found at:
https://github.com/AMDESE/ovmf/tree/sev-es-v13

Cc: Ard Biesheuvel 
Cc: Benjamin You 
Cc: Dandan Bi 
Cc: Eric Dong 
Cc: Guo Dong 
Cc: Hao A Wu 
Cc: Jian J Wang 
Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Maurice Ma 
Cc: Michael D Kinney 
Cc: Ray Ni 

Changes since v5:
- Remove extraneous VmgExitLib usage
- Miscellaneous changes to address feedback (coding style, etc.)

Changes since v4:
- Move the SEV-ES protocol negotiation out of the SEC exception handler
  and into the SecMain.c file. As a result:
  - Move the SecGhcb related PCDs out of UefiCpuPkg and into OvmfPkg
  - Combine SecAMDSevVcHandler.c and PeiDxeAMDSevVcHandler.c into a
single AMDSevVcHandler.c
- Consolidate VmgExitLib usage into common LibraryClasses sections
- Add documentation comments to the VmgExitLib functions

Changes since v3:
- Remove the need for the MP library finalization routine. The AP
  jump table address will be held by the hypervisor rather than
  communicated via the GHCB MSR. This removes some fragility around
  the UEFI to OS transition.
- Rename the SEV-ES RIP reset area to SEV-ES workarea and use it to
  communicate the SEV-ES status, so that SEC CPU exception handling is
  only established for an SEV-ES guest.
- Fix SMM build breakageAdd around QemuFlashPtrWrite().
- Fix SMM build breakage by adding VC exception support the SMM CPU
  exception handling.
- Add memory fencing around the invocation of AsmVmgExit().
- Clarify comments around the SEV-ES AP reset RIP values and usage.
- Move some PCD definitions from MdeModulePkg to UefiCpuPkg.
- Remove the 16-bit code selector definition from MdeModulePkg

Changes since v2:
- Added a way to locate the SEV-ES fixed AP RIP address for starting
  AP's to avoid updating the actual flash image (build time location
  that is identified with a GUID value).
- Create a VmgExit library to replace static inline functions.
- Move some PCDs to the appropriate packages
- Add support for writing to QEMU flash under SEV-ES
- Add additional MMIO opcode support
- Cleaned up the GHCB MSR CPUID protocol support

Changes since v1:
- Patches reworked to be more specific to the component/area being updated
  and order of definition/usage
- Created a library for VMGEXIT-related functions to replace use of inline
  functions
- Allocation method for GDT changed from AllocatePool to AllocatePages
- Early caching only enabled for SEV-ES guests
- Ensure AP loop mode set to halt loop mode for SEV-ES guests
- Reserved SEC GHCB-related memory areas when S3 is enabled

Tom Lendacky (42):
  MdePkg: Create PCDs to be used in support of SEV-ES
  MdePkg: Add the MSR definition for the GHCB register
  MdePkg: Add a structure definition for the GHCB
  MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page 

[edk2-devel] [PATCH v6 09/42] UefiPayloadPkg: Prepare UefiPayloadPkg to use the VmgExitLib library

2020-03-24 Thread Lendacky, Thomas
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

Various CpuExceptionHandlerLib libraries will updated to use the new
VmgExitLib library. To prevent any build breakage, update the
UefiPayloadPkg DSC files that use a form of the CpuExceptionHandlerLib
library to include the VmgExitLib library.

Cc: Jordan Justen 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Reviewed-by: Guo Dong 
Signed-off-by: Tom Lendacky 
---
 UefiPayloadPkg/UefiPayloadPkgIa32.dsc| 2 ++
 UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc 
b/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
index d52945442e0e..c2f7217c964e 100644
--- a/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkgIa32.dsc
@@ -233,6 +233,7 @@ [LibraryClasses.common.DXE_CORE]
   DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
 !endif
   
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -244,6 +245,7 @@ [LibraryClasses.common.DXE_DRIVER]
   DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
 !endif
   
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
   MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc 
b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
index 0736cd995476..b7cfeeff9b49 100644
--- a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
@@ -234,6 +234,7 @@ [LibraryClasses.common.DXE_CORE]
   DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
 !endif
   
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -245,6 +246,7 @@ [LibraryClasses.common.DXE_DRIVER]
   DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
 !endif
   
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+  VmgExitLib|UefiCpuPkg/Library/VmgExitLib/VmgExitLib.inf
   MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
-- 
2.17.1


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Re: [edk2-devel] [EXTERNAL] [Patch 1/1] BaseTools: Add .map file as a target in makefile

2020-03-24 Thread Bret Barkelew via Groups.Io
Updated the Bugzilla with feedback on this. I don’t think this is a good final 
solution.
It creates two new empty dependencies: one for the binary blob, but one for the 
parent driver. The parent driver dependency causes a warning in compiling.

- Bret

From: Bob Feng
Sent: Monday, March 23, 2020 8:12 PM
To: devel@edk2.groups.io
Cc: Liming Gao; Bret 
Barkelew
Subject: [EXTERNAL] [Patch 1/1] BaseTools: Add .map file as a target in makefile

Ref: 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2624data=02%7C01%7CBret.Barkelew%40microsoft.com%7C9c94983c098f4f1d604708d7cfa13bb2%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637206163707852733sdata=wqLUJ4Chlj%2FPHGbKr8Kfpscf6ZBFn26GGCewpz0RbYo%3Dreserved=0

The .map file may not exist, adding .map as a target
with empty dependency and command will avoid build failure.

Signed-off-by: Bob Feng 
Cc: Liming Gao 
Cc: Bret Barkelew 
---
 BaseTools/Source/Python/AutoGen/GenMake.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/BaseTools/Source/Python/AutoGen/GenMake.py 
b/BaseTools/Source/Python/AutoGen/GenMake.py
index bbb3c29446f5..f09a0b88297e 100755
--- a/BaseTools/Source/Python/AutoGen/GenMake.py
+++ b/BaseTools/Source/Python/AutoGen/GenMake.py
@@ -731,10 +731,11 @@ cleanlib:
 if Dst not in self.ResultFileList:
 self.ResultFileList.append(Dst)
 if '%s :' %(Dst) not in self.BuildTargetList:
 self.BuildTargetList.append("%s : %s" %(Dst,Src))
 self.BuildTargetList.append('\t' + 
self._CP_TEMPLATE_[self._Platform] %{'Src': Src, 'Dst': Dst})
+self.BuildTargetList.append("%s :" %(Src,))

 FfsCmdList = Cmd[0]
 for index, Str in enumerate(FfsCmdList):
 if '-o' == Str:
 OutputFile = FfsCmdList[index + 1]
--
2.20.1.windows.1


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Re: [EXTERNAL] [edk2-devel] [PATCH v4] MdePkg/UnitTestBaseLib: Add check for pointer BinData

2020-03-24 Thread Bret Barkelew via Groups.Io
Reviewed-by: Bret Barkelew 

- Bret


From: devel@edk2.groups.io  on behalf of Guomin Jiang via 
Groups.Io 
Sent: Monday, March 23, 2020 6:42:41 PM
To: devel@edk2.groups.io 
Cc: Kinney, Michael D ; Liming Gao 

Subject: [EXTERNAL] [edk2-devel] [PATCH v4] MdePkg/UnitTestBaseLib: Add check 
for pointer BinData

REF: 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2531data=02%7C01%7Cbret.barkelew%40microsoft.com%7C6522fbf200f848652e0508d7cf94a6e3%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637206109682048750sdata=QwoKvxc7kKhrL0d00VidlcmAUV52ERnXnvjZl%2B30iBo%3Dreserved=0

AllocatePool may fail and BinData may be invalid, check it before use.

Cc: Michael D Kinney 
Cc: Liming Gao 
Signed-off-by: Guomin Jiang 
---
 MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c 
b/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
index 6f7c31cab4..8952f9da6c 100644
--- a/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
+++ b/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
@@ -252,9 +252,11 @@ RfcDecodeTest(
   BinSize = AsciiStrnLenS (binString, MAX_TEST_STRING_SIZE);



   BinData = AllocatePool (BinSize);

-  Btc->BufferToFree = BinData;

+  UT_ASSERT_NOT_NULL(BinData);



+  Btc->BufferToFree = BinData;

   ReturnSize = BinSize;

+

   Status = Base64Decode (b64String, b64StringLen, BinData, );



   UT_ASSERT_STATUS_EQUAL (Status, Btc->ExpectedStatus);

--
2.25.1.windows.1


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Re: [EXTERNAL] [edk2-devel] [edk2-platforms][PATCH] IntelSiliconPkg/IntelPciDeviceSecurityDxe: Replace ASSERT_EFI_ERROR

2020-03-24 Thread Bret Barkelew via Groups.Io
Reviewed-by: Bret Barkelew 

- Bret


From: devel@edk2.groups.io  on behalf of Michael D Kinney 
via Groups.Io 
Sent: Monday, March 23, 2020 1:14:28 PM
To: devel@edk2.groups.io ; Bret Barkelew 
; Jiang, Guomin ; Kinney, 
Michael D 
Subject: Re: [EXTERNAL] [edk2-devel] [edk2-platforms][PATCH] 
IntelSiliconPkg/IntelPciDeviceSecurityDxe: Replace ASSERT_EFI_ERROR


HI Bret,



You reposted the issue in BZ, so your review is very valuable to make sure the 
change proposed addresses the issue reported.



Reviews by Maintainers/Reviewers documented in Maintainers.txt are required to 
do the commit, but we welcome reviews from anyone in the community that wants 
to provide input in any changes.



Thanks,



Mike



From: devel@edk2.groups.io  On Behalf Of Bret Barkelew 
via Groups.Io
Sent: Monday, March 23, 2020 12:50 PM
To: devel@edk2.groups.io; Jiang, Guomin 
Subject: Re: [EXTERNAL] [edk2-devel] [edk2-platforms][PATCH] 
IntelSiliconPkg/IntelPciDeviceSecurityDxe: Replace ASSERT_EFI_ERROR



Looks good to me, but I’m not an official reviewer.



- Bret





From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> on behalf of Guomin Jiang 
via Groups.Io 
mailto:guomin.jiang=intel@groups.io>>
Sent: Wednesday, March 18, 2020 6:33:43 AM
To: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>
Subject: [EXTERNAL] [edk2-devel] [edk2-platforms][PATCH] 
IntelSiliconPkg/IntelPciDeviceSecurityDxe: Replace ASSERT_EFI_ERROR



REF: 
https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2589data=02%7C01%7Cbret.barkelew%40microsoft.com%7C4480a52ff6784232720d08d7ced91c8d%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637205304196996734sdata=PqgTLSHlFecHZWmVyxA1f4BJDiRkOxrBLSpVQV%2B5bcI%3Dreserved=0

According to code logic, it just judge the condition rather than the
status, it should use the ASSERT rather than ASSERT_EFI_ERROR.

Cc: Ray Ni mailto:ray...@intel.com>>
Cc: Rangasai V Chaganty 
mailto:rangasai.v.chaga...@intel.com>>
Signed-off-by: Guomin Jiang 
mailto:guomin.ji...@intel.com>>
---
 .../IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c   | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c
 
b/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c
index 29b6916f61..aa2bf14fa8 100644
--- 
a/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c
+++ 
b/Silicon/Intel/IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciDeviceSecurityDxe.c
@@ -69,7 +69,7 @@ RecordPciDeviceInList(
   ASSERT_EFI_ERROR(Status);



   NewPciDevice = AllocateZeroPool(sizeof(*NewPciDevice));

-  ASSERT_EFI_ERROR(NewPciDevice != NULL);

+  ASSERT(NewPciDevice != NULL);



   NewPciDevice->Signature   = PCI_DEVICE_INSTANCE_SIGNATURE;

   NewPciDevice->PciSegment  = PciSegment;

--
2.25.1.windows.1


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Re: [edk2-devel] [PATCH] UnitTestFrameworkPkg: Invalid index may be used.

2020-03-24 Thread Bret Barkelew via Groups.Io
Reviewed-by: Bret Barkelew 

- Bret


From: devel@edk2.groups.io  on behalf of Michael D Kinney 
via Groups.Io 
Sent: Monday, March 23, 2020 10:32:59 AM
To: Jiang, Guomin ; devel@edk2.groups.io 
; Zhang, Shenglei ; 
newexplor...@gmail.com ; Kinney, Michael D 

Cc: Sean Brogan ; Bret Barkelew 

Subject: [EXTERNAL] Re: [edk2-devel] [PATCH] UnitTestFrameworkPkg: Invalid 
index may be used.

Reviewed-by: Michael D Kinney 

Mike

> -Original Message-
> From: Jiang, Guomin 
> Sent: Sunday, March 22, 2020 10:56 PM
> To: devel@edk2.groups.io; Zhang, Shenglei
> ; newexplor...@gmail.com
> Cc: Kinney, Michael D ;
> sean.bro...@microsoft.com; bret.barke...@microsoft.com
> Subject: RE: [edk2-devel] [PATCH] UnitTestFrameworkPkg:
> Invalid index may be used.
>
> Hi Michael, Sean, Bret,
>
> Could help review the patch?
>
> Thanks
> > -Original Message-
> > From: devel@edk2.groups.io
> [mailto:devel@edk2.groups.io] On Behalf Of
> > Zhang, Shenglei
> > Sent: Wednesday, March 4, 2020 3:59 PM
> > To: devel@edk2.groups.io; newexplor...@gmail.com
> > Subject: Re: [edk2-devel] [PATCH]
> UnitTestFrameworkPkg: Invalid index may
> > be used.
> >
> > Reviewed-by: Shenglei Zhang
> 
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io
> [mailto:devel@edk2.groups.io] On Behalf Of
> > > GuoMinJ
> > > Sent: Thursday, February 20, 2020 9:42 AM
> > > To: devel@edk2.groups.io
> > > Cc: GuoMinJ 
> > > Subject: [edk2-devel] [PATCH] UnitTestFrameworkPkg:
> Invalid index may
> > > be used.
> > >
> > > REF:
> https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2535data=02%7C01%7CBret.Barkelew%40microsoft.com%7C6e119160718c41dd8bea08d7cf503d05%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637205815839534686sdata=G5r02YNEXW3PG%2BJUsOg9A5BrKdqpkdlJHceyK4Gkd1Y%3Dreserved=0
> > >
> > > The UINT_TEST_STATUS and FAILURE_TYPE have used 0
> as status, so use 0
> > > as unknown is confused, remove it from array
> enumeration but keep it
> > > location in the array.
> > >
> > > Signed-off-by: GuoMinJ 
> > > ---
> > >
> .../Library/UnitTestResultReportLib/UnitTestResultRepor
> tLib.c | 4
> > > ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git
> > >
> >
> a/UnitTestFrameworkPkg/Library/UnitTestResultReportLib/
> UnitTestResultR
> > > eportLib.c
> > >
> >
> b/UnitTestFrameworkPkg/Library/UnitTestResultReportLib/
> UnitTestResultR
> > > eportLib.c
> > > index 687a04f55d..eba68e330c 100644
> > > ---
> > >
> >
> a/UnitTestFrameworkPkg/Library/UnitTestResultReportLib/
> UnitTestResultR
> > > eportLib.c
> > > +++
> > >
> >
> b/UnitTestFrameworkPkg/Library/UnitTestResultReportLib/
> UnitTestResultR
> > > eportLib.c
> > > @@ -65,7 +65,7 @@ GetStringForUnitTestStatus (  {
> > >UINTN  Index;
> > >
> > > -  for (Index = 0; Index < ARRAY_SIZE
> (mStatusStrings); Index++) {
> > > +  for (Index = 0; Index < ARRAY_SIZE
> (mStatusStrings) - 1; Index++) {
> > >  if (mStatusStrings[Index].Status == Status) {
> > >//
> > >// Return string from matching entry @@ -
> 87,7 +87,7 @@
> > > GetStringForFailureType (  {
> > >UINTN  Index;
> > >
> > > -  for (Index = 0; Index < ARRAY_SIZE
> (mFailureTypeStrings); Index++)
> > > {
> > > +  for (Index = 0; Index < ARRAY_SIZE
> (mFailureTypeStrings) - 1;
> > > + Index++) {
> > >  if (mFailureTypeStrings[Index].Type ==
> Failure) {
> > >//
> > >// Return string from matching entry
> > > --
> > > 2.17.1
> > >
> > >
> > >
> >
> >
> >





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Re: [edk2-devel] [PATCH 16/17] OvmfPkg/PvScsiDxe: Reset device on ExitBootServices()

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> This causes the device to forget about the request/completion rings.
> We allocated said rings in EfiBootServicesData type memory, and code
> executing after ExitBootServices() is permitted to overwrite it.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 42 +-
>  OvmfPkg/PvScsiDxe/PvScsi.h |  1 +
>  2 files changed, 42 insertions(+), 1 deletion(-)
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index e7d0a23db6ab..33167c177b42 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -1156,6 +1156,30 @@ PvScsiUninit (
>}
>  }
>  
> +//
> +// Event notification called by ExitBootServices()
> +//

(1) Comment style -- please use:

/**
  Blah.
**/

> +STATIC
> +VOID
> +EFIAPI
> +PvScsiExitBoot (
> +  IN  EFI_EVENT Event,
> +  IN  VOID  *Context
> +  )
> +{
> +  PVSCSI_DEV *Dev;
> +
> +  Dev = Context;
> +
> +  //
> +  // Reset the device. This causes the device to forget about the
> +  // request/completion rings. We allocated said rings in EfiBootServicesData
> +  // type memory, and code executing after ExitBootServices() is permitted to
> +  // overwrite it.
> +  //
> +  PvScsiWriteCmdDesc (Dev, PVSCSI_CMD_ADAPTER_RESET, NULL, 0);
> +}
> +

(2) Please log a DEBUG_VERBOSE message here, something like:

  DEBUG ((DEBUG_VERBOSE, "%a: Context=0x%p\n", __FUNCTION__, Context));

Notification functions for EVT_SIGNAL_EXIT_BOOT_SERVICES are very
important, and sometimes obscure bugs can be tracked down somewhat more
easily if the firmware log captures the order in which the handlers are
queued / executed.

>  //
>  // Driver Binding
>  //
> @@ -1249,6 +1273,17 @@ PvScsiDriverBindingStart (
>  goto ClosePciIo;
>}
>  
> +  Status = gBS->CreateEvent (
> +  EVT_SIGNAL_EXIT_BOOT_SERVICES,
> +  TPL_CALLBACK,
> +  ,
> +  Dev,
> +  >ExitBoot
> +  );
> +  if (EFI_ERROR (Status)) {
> +goto UninitDev;
> +  }
> +
>//
>// Setup complete, attempt to export the driver instance's PassThru 
> interface
>//
> @@ -1260,11 +1295,14 @@ PvScsiDriverBindingStart (
>>PassThru
>);
>if (EFI_ERROR (Status)) {
> -goto UninitDev;
> +goto CloseExitBoot;
>}
>  
>return EFI_SUCCESS;
>  
> +CloseExitBoot:
> +  gBS->CloseEvent (Dev->ExitBoot);
> +
>  UninitDev:
>PvScsiUninit (Dev);
>  
> @@ -1319,6 +1357,8 @@ PvScsiDriverBindingStop (
>  return Status;
>}
>  
> +  gBS->CloseEvent (Dev->ExitBoot);
> +
>PvScsiUninit (Dev);
>  
>gBS->CloseProtocol (
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.h b/OvmfPkg/PvScsiDxe/PvScsi.h
> index 08e876b75930..e68a7dedf71f 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.h
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.h
> @@ -41,6 +41,7 @@ typedef struct {
>  typedef struct {
>UINT32  Signature;
>EFI_PCI_IO_PROTOCOL *PciIo;
> +  EFI_EVENT   ExitBoot;
>UINT64  OriginalPciAttributes;
>PVSCSI_RING_DESCRingDesc;
>PVSCSI_DMA_BUFFER   *DmaBuf;
> 

These parts look fine.

With (1) and (2) addressed:

Reviewed-by: Laszlo Ersek 

Thanks,
Laszlo


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Re: [edk2-devel] [PATCH 15/17] OvmfPkg/PvScsiDxe: Support sending SCSI request and receive response

2020-03-24 Thread Laszlo Ersek
There are many style problems with this patch.

I'm going to focus on those, for now. I might not catch everything in a
single review run, though (there are quite a few warts), so please don't
be annoyed if I end up pointing out further style problems under v2.

On 03/16/20 16:01, Liran Alon wrote:
> Implement EXT_SCSI_PASS_THRU.PassThru().
> 
> Machines should be able to boot after this commit.
> Tested with Ubuntu 16.04 guest.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/OvmfPkg.dec  |   6 +
>  OvmfPkg/PvScsiDxe/PvScsi.c   | 423 ++-
>  OvmfPkg/PvScsiDxe/PvScsi.h   |   1 +
>  OvmfPkg/PvScsiDxe/PvScsi.inf |   5 +-
>  4 files changed, 432 insertions(+), 3 deletions(-)
> 
> diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> index 76ce507e8bd0..e78c771f53e9 100644
> --- a/OvmfPkg/OvmfPkg.dec
> +++ b/OvmfPkg/OvmfPkg.dec
> @@ -130,6 +130,12 @@
>gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x40
>gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x41
>  
> +  ## After PvScsiDxe sends a SCSI request to the device, it waits for
> +  #  the request completion in a polling loop.
> +  #  This constant defines how many micro-seconds to wait between each
> +  #  polling loop iteration.
> +  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x42

(1) Please keep the token space condensed.

> +
>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index e48929bf044c..e7d0a23db6ab 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -30,6 +30,26 @@
>  // Ext SCSI Pass Thru utilities
>  //
>  
> +//
> +// Reads a 32-bit value into BAR0 using MMIO
> +//

(2) Please stick with the /** **/ comment style here.

> +STATIC
> +EFI_STATUS
> +PvScsiMmioRead32 (
> +  IN CONST PVSCSI_DEV   *Dev,
> +  IN UINT64 Offset,
> +  OUT UINT32*Value
> +  )
> +{
> +  return Dev->PciIo->Mem.Read(
> +   Dev->PciIo,
> +   EfiPciIoWidthUint32,
> +   0,   // BarIndex

(3) Please use PCI_BAR_IDX0.

> +   Offset,
> +   1,   // Count
> +   Value
> +   );
> +}
>  
>  //
>  // Writes a 32-bit value into BAR0 using MMIO
> @@ -100,6 +120,343 @@ PvScsiWriteCmdDesc (
>  
>return EFI_SUCCESS;
>  }
> +
> +//
> +// Returns if PVSCSI request ring is full
> +//

(4) Same as (2).

Please rework the rest of the function-level comments accordingly.

> +STATIC
> +BOOLEAN
> +PvScsiIsReqRingFull (
> +  IN CONST PVSCSI_DEV   *Dev
> +  )
> +{
> +  PVSCSI_RINGS_STATE *RingsState;
> +  UINT64 ReqNumEntries;
> +
> +  RingsState = Dev->RingDesc.RingState;
> +  ReqNumEntries = 1 << RingsState->ReqNumEntriesLog2;

(5) Wrong for two reasons:

(5a) Based on ReqNumEntries having type UINT64, the shift count may
presumably be larger than 31. But the constant "1" has type "signed int"
(mapping to INT32 in edk2), and so we should never left-shift that by
even 31 positions (we should never shift bits into the sign bit). Let
alone by more than 31 positions.

In other words, the constant should be 1ULL.

(5b) Please use RShiftU64() from BaseLib.

> +  return (RingsState->ReqProdIdx - RingsState->CmpConsIdx) >= ReqNumEntries;
> +}
> +
> +//
> +// Returns pointer to current request descriptor to produce
> +//
> +STATIC
> +PVSCSI_RING_REQ_DESC *
> +PvScsiGetCurrentRequest (
> +  IN CONST PVSCSI_DEV   *Dev
> +  )
> +{
> +  PVSCSI_RINGS_STATE *RingState;
> +  UINT64 ReqNumEntries;
> +
> +  RingState = Dev->RingDesc.RingState;
> +  ReqNumEntries = 1 << RingState->ReqNumEntriesLog2;

(6) Same as (5).

Please rework further occurrences similarly.

> +  return Dev->RingDesc.RingReqs +
> + (RingState->ReqProdIdx & (ReqNumEntries - 1));
> +}
> +
> +//
> +// Returns pointer to current completion descriptor to consume
> +//
> +STATIC
> +PVSCSI_RING_CMP_DESC *
> +PvScsiGetCurrentResponse (
> +  IN CONST PVSCSI_DEV   *Dev
> +  )
> +{
> +  PVSCSI_RINGS_STATE *RingState;
> +  UINT64 CmpNumEntries;
> +
> +  RingState = Dev->RingDesc.RingState;
> +  CmpNumEntries = 1 << RingState->CmpNumEntriesLog2;
> +  return Dev->RingDesc.RingCmps +
> + (RingState->CmpConsIdx & (CmpNumEntries - 1));
> +}
> +
> +//
> +// Wait for device to signal completion of submitted requests
> +//
> +STATIC
> +EFI_STATUS
> +PvScsiWaitForRequestCompletion (
> +  IN CONST PVSCSI_DEV   *Dev
> +  )
> +{
> +  EFI_STATUS Status;
> +  UINT32 IntrStatus;
> +
> +  //
> +  // Note: We don't yet support Timeout according to
> +  // 

Re: [edk2-devel] [PATCH 11/17] OvmfPkg/PvScsiDxe: Define device interface structures and constants

2020-03-24 Thread Laszlo Ersek
On 03/24/20 16:35, Laszlo Ersek wrote:
> On 03/16/20 16:01, Liran Alon wrote:
>> These definitions will be used by the following commits to complete the
>> implementation of PVSCSI device driver.
>>
>> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
>> Reviewed-by: Nikita Leshenko 
>> Signed-off-by: Liran Alon 
>> ---
>>  OvmfPkg/Include/IndustryStandard/PvScsi.h | 162 ++
>>  1 file changed, 162 insertions(+)
>>
>> diff --git a/OvmfPkg/Include/IndustryStandard/PvScsi.h 
>> b/OvmfPkg/Include/IndustryStandard/PvScsi.h
>> index 004c0af84989..7bb6e664dfcd 100644
>> --- a/OvmfPkg/Include/IndustryStandard/PvScsi.h
>> +++ b/OvmfPkg/Include/IndustryStandard/PvScsi.h
>> @@ -18,4 +18,166 @@
>>  #define PCI_VENDOR_ID_VMWARE(0x15ad)
>>  #define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)
>>  
>> +//
>> +// CDB (Command Descriptor Block) with size above this constant
>> +// should be considered out-of-band
>> +//
>> +#define PVSCSI_CDB_MAX_SIZE (16)
>> +
>> +enum PVSCSI_BAR0_OFFSETS {
>> +  PVSCSI_REG_OFFSET_COMMAND=0x0,
>> +  PVSCSI_REG_OFFSET_COMMAND_DATA   =0x4,
>> +  PVSCSI_REG_OFFSET_COMMAND_STATUS =0x8,
>> +  PVSCSI_REG_OFFSET_LAST_STS_0 =  0x100,
>> +  PVSCSI_REG_OFFSET_LAST_STS_1 =  0x104,
>> +  PVSCSI_REG_OFFSET_LAST_STS_2 =  0x108,
>> +  PVSCSI_REG_OFFSET_LAST_STS_3 =  0x10c,
>> +  PVSCSI_REG_OFFSET_INTR_STATUS= 0x100c,
>> +  PVSCSI_REG_OFFSET_INTR_MASK  = 0x2010,
>> +  PVSCSI_REG_OFFSET_KICK_NON_RW_IO = 0x3014,
>> +  PVSCSI_REG_OFFSET_DEBUG  = 0x3018,
>> +  PVSCSI_REG_OFFSET_KICK_RW_IO = 0x4018,
>> +};
> 
> (1) In the edk2 coding style, we introduce typedefs (too). So that, in
> case we need a variable of this type, we don't have to write
> 
>   enum PVSCSI_BAR0_OFFSETS MyVar;
> 
> just
> 
>   PVSCSI_BAR0_OFFSETS MyVar;
> 
> For example:
> 
> typedef enum {
>   Blah
> } PVSCSI_BAR0_OFFSETS;
> 
> 
> (2) Enumeration constants are spelled in CamelCase.
> 
> Example: EfiPciIoAttributeOperationGet. (See the
> EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION typedef in
> "MdePkg/Include/Protocol/PciIo.h".)
> 
>> +
>> +//
>> +// Define Interrupt-Status register flags
>> +//
>> +#define PVSCSI_INTR_CMPL_0  (1 << 0)
>> +#define PVSCSI_INTR_CMPL_1  (1 << 1)
> 
> (3) I suggest using the BIT0 and BIT1 macros, rather than open-coding
> the shifts.
> 
>> +#define PVSCSI_INTR_CMPL_MASK   (PVSCSI_INTR_CMPL_0 | PVSCSI_INTR_CMPL_1)
>> +
>> +enum PVSCSI_COMMANDS {
>> +  PVSCSI_CMD_FIRST = 0,
>> +  PVSCSI_CMD_ADAPTER_RESET = 1,
>> +  PVSCSI_CMD_ISSUE_SCSI= 2,
>> +  PVSCSI_CMD_SETUP_RINGS   = 3,
>> +  PVSCSI_CMD_RESET_BUS = 4,
>> +  PVSCSI_CMD_RESET_DEVICE  = 5,
>> +  PVSCSI_CMD_ABORT_CMD = 6,
>> +  PVSCSI_CMD_CONFIG= 7,
>> +  PVSCSI_CMD_SETUP_MSG_RING= 8,
>> +  PVSCSI_CMD_DEVICE_UNPLUG = 9,
>> +  PVSCSI_CMD_LAST  = 10
>> +};
> 
> (4) Same as (1) and (2).
> 
>> +
>> +#define PVSCSI_SETUP_RINGS_MAX_NUM_PAGES(32)
>> +
>> +#pragma pack (1)
>> +typedef struct {
>> +  UINT32 ReqRingNumPages;
>> +  UINT32 CmpRingNumPages;
>> +  UINT64 RingsStatePPN;
>> +  UINT64 ReqRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
>> +  UINT64 CmpRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
>> +} PVSCSI_CMD_DESC_SETUP_RINGS;
>> +#pragma pack ()
>> +
>> +#define PVSCSI_MAX_CMD_DATA_WORDS   \
>> +  (sizeof (PVSCSI_CMD_DESC_SETUP_RINGS) / sizeof (UINT32))
>> +
>> +#pragma pack (1)
>> +typedef struct {
>> +  UINT32 ReqProdIdx;
>> +  UINT32 ReqConsIdx;
>> +  UINT32 ReqNumEntriesLog2;
>> +
>> +  UINT32 CmpProdIdx;
>> +  UINT32 CmpConsIdx;
>> +  UINT32 CmpNumEntriesLog2;
>> +
>> +  UINT8  Pad[104];
>> +
>> +  UINT32 MsgProdIdx;
>> +  UINT32 MsgConsIdx;
>> +  UINT32 MsgNumEntriesLog2;
>> +} PVSCSI_RINGS_STATE;
>> +#pragma pack ()
>> +
>> +//
>> +// Define PVSCSI request descriptor tags
>> +//
>> +#define PVSCSI_SIMPLE_QUEUE_TAG(0x20)
>> +
>> +//
>> +// Define PVSCSI request descriptor flags
>> +//
>> +#define PVSCSI_FLAG_CMD_WITH_SG_LIST   (1 << 0)
>> +#define PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB(1 << 1)
>> +#define PVSCSI_FLAG_CMD_DIR_NONE   (1 << 2)
>> +#define PVSCSI_FLAG_CMD_DIR_TOHOST (1 << 3)
>> +#define PVSCSI_FLAG_CMD_DIR_TODEVICE   (1 << 4)
> 
> (5) Same as (3).
> 
>> +
>> +#pragma pack (1)
>> +typedef struct {
>> +  UINT64 Context;
>> +  UINT64 DataAddr;
>> +  UINT64 DataLen;
>> +  UINT64 SenseAddr;
>> +  UINT32 SenseLen;
>> +  UINT32 Flags;
>> +  UINT8  Cdb[16];
>> +  UINT8  CdbLen;
>> +  UINT8  Lun[8];
>> +  UINT8  Tag;
>> +  UINT8  Bus;
>> +  UINT8  Target;
>> +  UINT8  vCPUHint;

(8) This should be spelled "VcpuHint", because:

- CamelCase
- the 2nd and further letters in sub-acronyms are lowercased in edk2.

Thanks
Laszlo

>> +  UINT8  Unused[59];
>> +} PVSCSI_RING_REQ_DESC;
>> +#pragma pack ()
>> +
>> +//
>> +// Host adapter status/error codes
>> +//
>> +enum PVSCSI_HOST_BUS_ADAPTER_STATUS {
>> +   BTSTAT_SUCCESS   = 0x00,  // 

Re: [edk2-devel] [PATCH 14/17] OvmfPkg/PvScsiDxe: Introduce DMA communication buffer

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> In case device is constrained by IOMMU or guest is running under AMD SEV,
> input/output buffers provided to device (DataBuffer and SenseData) needs
> to be explicitly mapped to device by PciIo->Map().
> 
> To avoid the overhead of mapping/unmapping the DataBuffer and SenseData
> to the device for every SCSI requst (And to simplify code), introduce a
> single DMA communication buffer that will be mapped to device on
> initialization. When a SCSI request needs to be sent to device, the
> DataBuffer and SenseData will be copied from/to the DMA communication
> buffer as required. This will be done by the following commits.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 24 
>  OvmfPkg/PvScsiDxe/PvScsi.h | 10 ++
>  2 files changed, 34 insertions(+)
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index c3f5d38f3d30..e48929bf044c 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -638,6 +638,20 @@ PvScsiInit (
>  return Status;
>}
>  
> +  //
> +  // Allocate DMA communication buffer
> +  //
> +  Status = PvScsiAllocateSharedPages (
> + Dev,
> + EFI_SIZE_TO_PAGES (sizeof (*Dev->DmaBuf)),
> + EfiPciIoOperationBusMasterCommonBuffer,
> + (VOID **)>DmaBuf,
> + >DmaBufDmaDesc
> + );
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }
> +

(1) Superficial review:

in my set of "resource management comments", just pointing out that here
we both fail to restore the original PCI attributes, and leak the rings.

More careful review of this patch slated for v2.

Thanks
Laszlo

>//
>// Populate the exported interface's attributes
>//
> @@ -676,6 +690,16 @@ PvScsiUninit (
>IN OUT PVSCSI_DEV *Dev
>)
>  {
> +  //
> +  // Free DMA communication buffer
> +  //
> +  PvScsiFreeSharedPages (
> +Dev,
> +EFI_SIZE_TO_PAGES (sizeof (*Dev->DmaBuf)),
> +(VOID **)>DmaBuf,
> +>DmaBufDmaDesc
> +);
> +
>//
>// Free PVSCSI rings
>//
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.h b/OvmfPkg/PvScsiDxe/PvScsi.h
> index 6d23b6e1eccf..7f91d70fec79 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.h
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.h
> @@ -31,6 +31,11 @@ typedef struct {
>PVSCSI_DMA_DESC  RingCmpsDmaDesc;
>  } PVSCSI_RING_DESC;
>  
> +typedef struct {
> +  UINT8 SenseData[MAX_UINT8];
> +  UINT8 Data[0x2000];
> +} PVSCSI_DMA_BUFFER;
> +
>  #define PVSCSI_SIG SIGNATURE_32 ('P', 'S', 'C', 'S')
>  
>  typedef struct {
> @@ -38,6 +43,8 @@ typedef struct {
>EFI_PCI_IO_PROTOCOL *PciIo;
>UINT64  OriginalPciAttributes;
>PVSCSI_RING_DESCRingDesc;
> +  PVSCSI_DMA_BUFFER   *DmaBuf;
> +  PVSCSI_DMA_DESC DmaBufDmaDesc;
>UINT8   MaxTarget;
>UINT8   MaxLun;
>EFI_EXT_SCSI_PASS_THRU_PROTOCOL PassThru;
> @@ -47,4 +54,7 @@ typedef struct {
>  #define PVSCSI_FROM_PASS_THRU(PassThruPointer) \
>CR (PassThruPointer, PVSCSI_DEV, PassThru, PVSCSI_SIG)
>  
> +#define PVSCSI_DMA_BUF_DEV_ADDR(Dev, MemberName) \
> +  (Dev->DmaBufDmaDesc.DeviceAddress + OFFSET_OF(PVSCSI_DMA_BUFFER, 
> MemberName))
> +
>  #endif // __PVSCSI_DXE_H_
> 


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Re: [edk2-devel] [PATCH 13/17] OvmfPkg/PvScsiDxe: Setup requests and completions rings

2020-03-24 Thread Laszlo Ersek
really trivial style comments, for now (I intend to look at this in more
detail in v2):

On 03/16/20 16:01, Liran Alon wrote:
> These rings are shared memory buffers between host and device in which
> a cyclic buffer is managed to send request descriptors from host to
> device and receive completion descriptors from device to host.
> 
> Note that because device may be constrained by IOMMU or guest may be run
> under AMD SEV, we make sure to map these rings to device by using
> PciIo->Map().
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 235 +
>  OvmfPkg/PvScsiDxe/PvScsi.h |  17 +++
>  2 files changed, 252 insertions(+)
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index fb2407d2adb2..c3f5d38f3d30 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -16,6 +16,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include "PvScsi.h"
>  
> @@ -396,6 +397,209 @@ PvScsiSetPCIAttributes (
>return EFI_SUCCESS;
>  }
>  
> +STATIC
> +EFI_STATUS
> +PvScsiAllocatePages (
> +  IN PVSCSI_DEV *Dev,
> +  IN UINTN  Pages,
> +  IN OUT VOID   **HostAddress
> +  )
> +{
> +  return Dev->PciIo->AllocateBuffer (
> +   Dev->PciIo,
> +   AllocateAnyPages,
> +   EfiBootServicesData,
> +   Pages,
> +   HostAddress,
> +   EFI_PCI_ATTRIBUTE_MEMORY_CACHED
> +   );
> +}
> +
> +STATIC
> +VOID
> +PvScsiFreePages (
> +  IN PVSCSI_DEV *Dev,
> +  IN UINTN  Pages,
> +  IN VOID   *HostAddress
> +  )
> +{
> +  Dev->PciIo->FreeBuffer (
> +Dev->PciIo,
> +Pages,
> +HostAddress
> +);
> +}
> +
> +STATIC
> +EFI_STATUS
> +PvScsiMapBuffer (
> +  IN PVSCSI_DEV *Dev,
> +  IN EFI_PCI_IO_PROTOCOL_OPERATION  PciIoOperation,
> +  IN VOID   *HostAddress,
> +  IN UINTN  NumberOfBytes,
> +  OUT PVSCSI_DMA_DESC   *DmaDesc
> +  )
> +{
> +  EFI_STATUS Status;
> +  UINTN  BytesMapped;
> +
> +  BytesMapped = NumberOfBytes;
> +  Status = Dev->PciIo->Map (
> + Dev->PciIo,
> + PciIoOperation,
> + HostAddress,
> + ,
> + >DeviceAddress,
> + >Mapping
> + );
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }
> +
> +  if (BytesMapped != NumberOfBytes) {
> +Status = EFI_OUT_OF_RESOURCES;
> +goto Unmap;
> +  }
> +
> +  return EFI_SUCCESS;
> +
> +Unmap:
> +  Dev->PciIo->Unmap (Dev->PciIo, DmaDesc->Mapping);
> +  DmaDesc->Mapping = NULL;
> +
> +  return Status;
> +}
> +
> +STATIC
> +VOID
> +PvScsiUnmapBuffer (
> +  IN PVSCSI_DEV *Dev,
> +  IN OUT PVSCSI_DMA_DESC*DmaDesc)
> +{
> +  Dev->PciIo->Unmap (Dev->PciIo, DmaDesc->Mapping);
> +}
> +
> +STATIC
> +EFI_STATUS
> +PvScsiAllocateSharedPages (
> +  IN PVSCSI_DEV *Dev,
> +  IN UINTN  Pages,
> +  IN EFI_PCI_IO_PROTOCOL_OPERATION  PciIoOperation,
> +  OUT VOID  **HostAddress,
> +  OUT PVSCSI_DMA_DESC   *DmaDesc
> +  )
> +{
> +  EFI_STATUS Status;
> +
> +  *HostAddress = NULL;
> +  DmaDesc->Mapping = NULL;
> +
> +  Status = PvScsiAllocatePages (Dev, Pages, HostAddress);
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }
> +
> +  Status = PvScsiMapBuffer (
> + Dev,
> + PciIoOperation,
> + *HostAddress,
> + Pages * EFI_PAGE_SIZE,

(1) Please use EFI_PAGES_TO_SIZE(); it's more idiomatic. (The argument
should have type UINTN -- "Pages" is already UINTN, so that's good.)

> + DmaDesc
> + );
> +  if (EFI_ERROR (Status)) {
> +goto FreePages;
> +  }
> +
> +  return EFI_SUCCESS;
> +
> +FreePages:
> +  PvScsiFreePages (Dev, Pages, *HostAddress);
> +  *HostAddress = NULL;
> +
> +  return Status;
> +}
> +
> +STATIC
> +VOID
> +PvScsiFreeSharedPages (
> +  IN PVSCSI_DEV *Dev,
> +  IN UINTN  Pages,
> +  IN OUT VOID   **HostAddress,
> +  IN OUT PVSCSI_DMA_DESC*DmaDesc
> +  )
> +{
> +  if (*HostAddress) {
> +  if (DmaDesc->Mapping) {
> +PvScsiUnmapBuffer (Dev, DmaDesc);
> +DmaDesc->Mapping = NULL;
> +  }
> +
> +  PvScsiFreePages (Dev, Pages, *HostAddress);
> +  *HostAddress = NULL;
> +  }
> +}
> +
> +STATIC
> +EFI_STATUS
> +PvScsiInitRings (
> +  IN OUT PVSCSI_DEV *Dev
> +  )
> +{
> +  EFI_STATUS  Status;
> +  PVSCSI_CMD_DESC_SETUP_RINGS Cmd;
> +
> +  Status = PvScsiAllocateSharedPages (
> + Dev,
> +

Re: [edk2-devel] [PATCH 12/17] OvmfPkg/PvScsiDxe: Reset adapter on init

2020-03-24 Thread Laszlo Ersek
a bit more superficial comments, for now:

On 03/16/20 16:01, Liran Alon wrote:
> The following commits will complete the implementation of
> device initialization.
>
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 77 ++
>  1 file changed, 77 insertions(+)
>
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index ff6b50b7020f..fb2407d2adb2 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -29,6 +29,76 @@
>  // Ext SCSI Pass Thru utilities
>  //
>
> +
> +//
> +// Writes a 32-bit value into BAR0 using MMIO
> +//

(1) Please use the /** **/ comment style for top-level function comment
blocks.

> +STATIC
> +EFI_STATUS
> +PvScsiMmioWrite32 (
> +  IN CONST PVSCSI_DEV   *Dev,
> +  IN UINT64 Offset,
> +  IN UINT32 Value
> +  )
> +{
> +  return Dev->PciIo->Mem.Write(
> +   Dev->PciIo,
> +   EfiPciIoWidthUint32,
> +   0,   // BarIndex

(2) Style improvement: please use the PCI_BAR_IDX0 macro.

> +   Offset,
> +   1,   // Count
> +   
> +   );
> +}
> +
> +//
> +// Send PVSCSI command to device
> +//

(3) Same as (1).

> +STATIC
> +EFI_STATUS
> +PvScsiWriteCmdDesc (
> +  IN CONST PVSCSI_DEV   *Dev,
> +  IN UINT32 Cmd,
> +  IN VOID   *Desc,
> +  IN UINTN  Length
> +  )
> +{
> +  EFI_STATUS Status;
> +  UINTN  LengthInWords;
> +  UINT8  *WordPtr;
> +  UINT8  *DescEndPtr;
> +  UINT32 Word;
> +
> +  LengthInWords = Length / sizeof (UINT32);

(4) What guarantees that "Length" is a whole multiple of sizeof
(UINT32)?

In this review I have not insisted on including full-blown interface
contracts in the top-level function comment blocks (with @param[in] and
@retval etc). But, for this function, it really is unclear.

> +
> +  if (LengthInWords > PVSCSI_MAX_CMD_DATA_WORDS) {
> +return EFI_INVALID_PARAMETER;
> +  }
> +
> +  Status = PvScsiMmioWrite32 (Dev, PVSCSI_REG_OFFSET_COMMAND, Cmd);
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }
> +
> +  WordPtr = Desc;
> +  DescEndPtr = WordPtr + Length;
> +
> +  while (WordPtr != DescEndPtr) {
> +//
> +// CopyMem() is used to avoid strict-aliasing issues
> +//

(5) In edk2, we -- completely intentionally -- disable the enforcement
of the effective type rules / strict aliasing rules. See
"-fno-strict-aliasing" in "BaseTools/Conf/tools_def.template".

> +CopyMem (, WordPtr, sizeof (UINT32));
> +
> +Status = PvScsiMmioWrite32 (Dev, PVSCSI_REG_OFFSET_COMMAND_DATA, Word);
> +if (EFI_ERROR (Status)) {
> +  return Status;
> +}
> +
> +WordPtr += sizeof (UINT32);
> +  }
> +
> +  return EFI_SUCCESS;
> +}

(6) I think the open-coded loop is suboptimal -- the PciIo protocol
seems to offer EfiPciIoWidthFifoUint32 for exactly this purpose (=
advance in the memory buffer, while accessing the same offset in the
BAR).

Have you perhaps tried that?

(I can imagine that you ruled it out, due to "Desc" being unaligned. The
UEFI spec does say, "The caller is responsible for any alignment and I/O
width issues which the bus, device, platform, or type of I/O might
require.)

>  //
>  // Check if Target argument to EXT_SCSI_PASS_THRU.GetNextTarget() and
>  // EXT_SCSI_PASS_THRU.GetNextTargetLun() is initialized
> @@ -348,6 +418,13 @@ PvScsiInit (
>  return Status;
>}
>
> +  //
> +  // Reset adapter
> +  //
> +  Status = PvScsiWriteCmdDesc (Dev, PVSCSI_CMD_ADAPTER_RESET, NULL, 0);
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }
>//
>// Populate the exported interface's attributes
>//
>

OK, so this ties back to my comments on resource management, under
patch#9.

Let me quote the PvScsiInit() function in full, after the present patch
is applied:

> STATIC
> EFI_STATUS
> PvScsiInit (
>   IN OUT PVSCSI_DEV *Dev
>   )
> {
>   EFI_STATUS Status;
>
>   //
>   // Init configuration
>   //
>   Dev->MaxTarget = PcdGet8 (PcdPvScsiMaxTargetLimit);
>   Dev->MaxLun = PcdGet8 (PcdPvScsiMaxLunLimit);
>
>   //
>   // Set PCI Attributes
>   //
>   Status = PvScsiSetPCIAttributes (Dev);
>   if (EFI_ERROR (Status)) {
> return Status;
>   }
>
>   //
>   // Reset adapter
>   //
>   Status = PvScsiWriteCmdDesc (Dev, PVSCSI_CMD_ADAPTER_RESET, NULL, 0);
>   if (EFI_ERROR (Status)) {
> return Status;
>   }

(7) So this is precisely the spot where we have to jump to a new error
handling label -- called "RestorePciAttributes" --, to be introduced at
the end of the function. And we need to call
PvScsiRestorePciAttributes() there.

Otherwise, the original PCI attributes will never be restored.

Thanks!
Laszlo

On 03/16/20 16:01, Liran Alon wrote:
>   //
>   // Populate the exported interface's attributes
>   //

Re: [edk2-devel] [PATCH v4] MdePkg/UnitTestBaseLib: Add check for pointer BinData

2020-03-24 Thread Michael D Kinney
Reviewed-by: Michael D Kinney 

Mike

> -Original Message-
> From: Jiang, Guomin 
> Sent: Monday, March 23, 2020 6:43 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D ;
> Gao, Liming 
> Subject: [PATCH v4] MdePkg/UnitTestBaseLib: Add check
> for pointer BinData
> 
> REF:
> https://bugzilla.tianocore.org/show_bug.cgi?id=2531
> 
> AllocatePool may fail and BinData may be invalid, check
> it before use.
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Signed-off-by: Guomin Jiang 
> ---
>  MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
> | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git
> a/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
> b/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
> index 6f7c31cab4..8952f9da6c 100644
> ---
> a/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
> +++
> b/MdePkg/Test/UnitTest/Library/BaseLib/Base64UnitTest.c
> @@ -252,9 +252,11 @@ RfcDecodeTest(
>BinSize = AsciiStrnLenS (binString,
> MAX_TEST_STRING_SIZE);
> 
> 
> 
>BinData = AllocatePool (BinSize);
> 
> -  Btc->BufferToFree = BinData;
> 
> +  UT_ASSERT_NOT_NULL(BinData);
> 
> 
> 
> +  Btc->BufferToFree = BinData;
> 
>ReturnSize = BinSize;
> 
> +
> 
>Status = Base64Decode (b64String, b64StringLen,
> BinData, );
> 
> 
> 
>UT_ASSERT_STATUS_EQUAL (Status, Btc-
> >ExpectedStatus);
> 
> --
> 2.25.1.windows.1


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Re: [edk2-devel] [PATCH 09/17] OvmfPkg/PvScsiDxe: Backup/Restore PCI attributes on Init/UnInit

2020-03-24 Thread Liran Alon



On 24/03/2020 17:14, Laszlo Ersek wrote:

On 03/16/20 16:01, Liran Alon wrote:
I'm going to stop reviewing this iteration now; please rework the rest
of the series for v2 with this resource management pattern.

Thanks!
Laszlo


Thanks for the very detailed review!

I have read all your comments and understood them. I am working on 
creating a v2 patch-series with all these fixed.
As the Init/UnInit logic is the only place in which this resource 
management pattern is done, and as patch-series is split
to small well-defined quite independent patches, can I request that you 
will complete review of all v1 patches?


I will understand if you are too busy for this, but it will allow me to 
take into account all your aggregated comments on v1
to hopefully create a perfect v2 patch-series. As I've tried taking into 
account all the comments you gave on Nikita's series.


Thanks!
-Liran



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Re: [edk2-devel] [PATCH 11/17] OvmfPkg/PvScsiDxe: Define device interface structures and constants

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> These definitions will be used by the following commits to complete the
> implementation of PVSCSI device driver.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/Include/IndustryStandard/PvScsi.h | 162 ++
>  1 file changed, 162 insertions(+)
> 
> diff --git a/OvmfPkg/Include/IndustryStandard/PvScsi.h 
> b/OvmfPkg/Include/IndustryStandard/PvScsi.h
> index 004c0af84989..7bb6e664dfcd 100644
> --- a/OvmfPkg/Include/IndustryStandard/PvScsi.h
> +++ b/OvmfPkg/Include/IndustryStandard/PvScsi.h
> @@ -18,4 +18,166 @@
>  #define PCI_VENDOR_ID_VMWARE(0x15ad)
>  #define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)
>  
> +//
> +// CDB (Command Descriptor Block) with size above this constant
> +// should be considered out-of-band
> +//
> +#define PVSCSI_CDB_MAX_SIZE (16)
> +
> +enum PVSCSI_BAR0_OFFSETS {
> +  PVSCSI_REG_OFFSET_COMMAND=0x0,
> +  PVSCSI_REG_OFFSET_COMMAND_DATA   =0x4,
> +  PVSCSI_REG_OFFSET_COMMAND_STATUS =0x8,
> +  PVSCSI_REG_OFFSET_LAST_STS_0 =  0x100,
> +  PVSCSI_REG_OFFSET_LAST_STS_1 =  0x104,
> +  PVSCSI_REG_OFFSET_LAST_STS_2 =  0x108,
> +  PVSCSI_REG_OFFSET_LAST_STS_3 =  0x10c,
> +  PVSCSI_REG_OFFSET_INTR_STATUS= 0x100c,
> +  PVSCSI_REG_OFFSET_INTR_MASK  = 0x2010,
> +  PVSCSI_REG_OFFSET_KICK_NON_RW_IO = 0x3014,
> +  PVSCSI_REG_OFFSET_DEBUG  = 0x3018,
> +  PVSCSI_REG_OFFSET_KICK_RW_IO = 0x4018,
> +};

(1) In the edk2 coding style, we introduce typedefs (too). So that, in
case we need a variable of this type, we don't have to write

  enum PVSCSI_BAR0_OFFSETS MyVar;

just

  PVSCSI_BAR0_OFFSETS MyVar;

For example:

typedef enum {
  Blah
} PVSCSI_BAR0_OFFSETS;


(2) Enumeration constants are spelled in CamelCase.

Example: EfiPciIoAttributeOperationGet. (See the
EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION typedef in
"MdePkg/Include/Protocol/PciIo.h".)

> +
> +//
> +// Define Interrupt-Status register flags
> +//
> +#define PVSCSI_INTR_CMPL_0  (1 << 0)
> +#define PVSCSI_INTR_CMPL_1  (1 << 1)

(3) I suggest using the BIT0 and BIT1 macros, rather than open-coding
the shifts.

> +#define PVSCSI_INTR_CMPL_MASK   (PVSCSI_INTR_CMPL_0 | PVSCSI_INTR_CMPL_1)
> +
> +enum PVSCSI_COMMANDS {
> +  PVSCSI_CMD_FIRST = 0,
> +  PVSCSI_CMD_ADAPTER_RESET = 1,
> +  PVSCSI_CMD_ISSUE_SCSI= 2,
> +  PVSCSI_CMD_SETUP_RINGS   = 3,
> +  PVSCSI_CMD_RESET_BUS = 4,
> +  PVSCSI_CMD_RESET_DEVICE  = 5,
> +  PVSCSI_CMD_ABORT_CMD = 6,
> +  PVSCSI_CMD_CONFIG= 7,
> +  PVSCSI_CMD_SETUP_MSG_RING= 8,
> +  PVSCSI_CMD_DEVICE_UNPLUG = 9,
> +  PVSCSI_CMD_LAST  = 10
> +};

(4) Same as (1) and (2).

> +
> +#define PVSCSI_SETUP_RINGS_MAX_NUM_PAGES(32)
> +
> +#pragma pack (1)
> +typedef struct {
> +  UINT32 ReqRingNumPages;
> +  UINT32 CmpRingNumPages;
> +  UINT64 RingsStatePPN;
> +  UINT64 ReqRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
> +  UINT64 CmpRingPPNs[PVSCSI_SETUP_RINGS_MAX_NUM_PAGES];
> +} PVSCSI_CMD_DESC_SETUP_RINGS;
> +#pragma pack ()
> +
> +#define PVSCSI_MAX_CMD_DATA_WORDS   \
> +  (sizeof (PVSCSI_CMD_DESC_SETUP_RINGS) / sizeof (UINT32))
> +
> +#pragma pack (1)
> +typedef struct {
> +  UINT32 ReqProdIdx;
> +  UINT32 ReqConsIdx;
> +  UINT32 ReqNumEntriesLog2;
> +
> +  UINT32 CmpProdIdx;
> +  UINT32 CmpConsIdx;
> +  UINT32 CmpNumEntriesLog2;
> +
> +  UINT8  Pad[104];
> +
> +  UINT32 MsgProdIdx;
> +  UINT32 MsgConsIdx;
> +  UINT32 MsgNumEntriesLog2;
> +} PVSCSI_RINGS_STATE;
> +#pragma pack ()
> +
> +//
> +// Define PVSCSI request descriptor tags
> +//
> +#define PVSCSI_SIMPLE_QUEUE_TAG(0x20)
> +
> +//
> +// Define PVSCSI request descriptor flags
> +//
> +#define PVSCSI_FLAG_CMD_WITH_SG_LIST   (1 << 0)
> +#define PVSCSI_FLAG_CMD_OUT_OF_BAND_CDB(1 << 1)
> +#define PVSCSI_FLAG_CMD_DIR_NONE   (1 << 2)
> +#define PVSCSI_FLAG_CMD_DIR_TOHOST (1 << 3)
> +#define PVSCSI_FLAG_CMD_DIR_TODEVICE   (1 << 4)

(5) Same as (3).

> +
> +#pragma pack (1)
> +typedef struct {
> +  UINT64 Context;
> +  UINT64 DataAddr;
> +  UINT64 DataLen;
> +  UINT64 SenseAddr;
> +  UINT32 SenseLen;
> +  UINT32 Flags;
> +  UINT8  Cdb[16];
> +  UINT8  CdbLen;
> +  UINT8  Lun[8];
> +  UINT8  Tag;
> +  UINT8  Bus;
> +  UINT8  Target;
> +  UINT8  vCPUHint;
> +  UINT8  Unused[59];
> +} PVSCSI_RING_REQ_DESC;
> +#pragma pack ()
> +
> +//
> +// Host adapter status/error codes
> +//
> +enum PVSCSI_HOST_BUS_ADAPTER_STATUS {
> +   BTSTAT_SUCCESS   = 0x00,  // CCB complete normally with no errors
> +   BTSTAT_LINKED_COMMAND_COMPLETED   = 0x0a,
> +   BTSTAT_LINKED_COMMAND_COMPLETED_WITH_FLAG = 0x0b,
> +   BTSTAT_DATA_UNDERRUN = 0x0c,
> +   BTSTAT_SELTIMEO  = 0x11,  // SCSI selection timeout
> +   BTSTAT_DATARUN   = 0x12,  // Data overrun/underrun
> +   BTSTAT_BUSFREE   = 0x13,  // Unexpected bus free
> +   BTSTAT_INVPHASE 

Re: [edk2-devel] [PATCH 17/17] OvmfPkg/PvScsiDxe: Enable device 64-bit DMA addresses

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> Enable PCI dual-address cycle attribute to signal device supports
> 64-bit DMA addresses.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 21 +
>  1 file changed, 21 insertions(+)
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index 33167c177b42..e673ed8ba6a0 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -814,6 +814,27 @@ PvScsiSetPCIAttributes (
>  return Status;
>}
>  
> +  //
> +  // Signal device supports 64-bit DMA addresses
> +  //
> +  Status = Dev->PciIo->Attributes (
> + Dev->PciIo,
> + EfiPciIoAttributeOperationEnable,
> + EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
> + NULL
> + );
> +  if (EFI_ERROR (Status)) {
> +//
> +// Warn user device will only be using 32-bit DMA addresses.
> +//
> +// Note that this does not prevent device/driver from working
> +// and therefore we only warn and continue as usual.
> +//
> +DEBUG ((DEBUG_WARN,
> +"%a: failed to enable 64-bit DMA addresses\n",
> +__FUNCTION__));
> +  }
> +
>return EFI_SUCCESS;
>  }
>  
> 

I've consulted the UEFI spec, and it indeed makes sense to attempt
enabling this attribute in a separate step. So, good idea.

Regarding the DEBUG message:

(1) The indentation of the 2nd and 3rd argument is incorrect. Please pick:

DEBUG ((DEBUG_WARN, "%a: failed to enable 64-bit DMA addresses\n",
  __FUNCTION__));

or:

DEBUG ((
  DEBUG_WARN,
  "%a: failed to enable 64-bit DMA addresses\n",
  __FUNCTION__
  ));

Thanks!
Laszlo


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Re: [edk2-devel] [PATCH 09/17] OvmfPkg/PvScsiDxe: Backup/Restore PCI attributes on Init/UnInit

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> This commit doesn't change semantics.
> It is done as a preparation for future commits which will modify
> PCI attributes.
>
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 53 +-
>  OvmfPkg/PvScsiDxe/PvScsi.h |  1 +
>  2 files changed, 53 insertions(+), 1 deletion(-)
>
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index b6a83d73cead..92e0f4a98965 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -281,18 +281,59 @@ PvScsiGetNextTarget (
>return EFI_NOT_FOUND;
>  }
>
> +STATIC
> +EFI_STATUS
> +PvScsiSetPCIAttributes (

(1) Minor wart: should be spelled "PvScsiSetPciAttributes".

> +  IN OUT PVSCSI_DEV *Dev
> +  )
> +{
> +  EFI_STATUS Status;
> +
> +  //
> +  // Set saved original PCI attirubtes to invalid value
> +  // such that cleanup logic could determine if it should restore
> +  // PCI attributes or not
> +  //
> +  Dev->OriginalPciAttributes = (UINT64)(-1);
> +
> +  //
> +  // Backup original PCI Attributes
> +  //
> +  Status = Dev->PciIo->Attributes (
> + Dev->PciIo,
> + EfiPciIoAttributeOperationGet,
> + 0,
> + >OriginalPciAttributes
> + );
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }

No, this is again going in the wrong direction.

(3) Even if we wanted to go in this direction (and we don't), we should
store the  "invalid value" *after* determining failure status. Because,
I can't find any guarantee in the spec that Attributes() does not modify
"Result" on error.

(4) I don't like the assumption that "all-bits-set" is going to be an
invalid attribute mask forever.

(5) Most importantly, we're again mixing error handling styles. This
problem will be more apparent in later patches in the series, but this
is where it starts.

Saving the original PCI attributes, setting the new attributes, and
restoring the original ones, are *not* optional actions. They are
mandatory. Therefore we do not need "tracker" variables or even tracker
values. Whenever any one of those actions can be performed, then it
*must* be performed -- and that fact is deducible purely from the
control flow.

Looking at the "PvScsi.c" source file at the end of this series, this is
the (partial) call tree that I see:

  PvScsiDriverBindingStart
   PvScsiInit
 PvScsiSetPCIAttributes
 PvScsiWriteCmdDesc (PVSCSI_CMD_ADAPTER_RESET)
 PvScsiInitRings
 PvScsiAllocateSharedPages

Unfortunately, the PvScsiInit() function fails to roll back any of those
construction steps on error. In particular:

- the shared pages are not released,
- the rings are not un-inited,
- the original attributes are not restored.

This causes a bunch of leaks. Also, confusion on the normal teardown
path (initiated from Stop()), as evidenced by the "sentinel" value for
"OriginalPciAttributes".

You need to follow the exact same cascading error handling pattern in
*every* construction function that you follow in
PvScsiDriverBindingStart(). PvScsiInit() *in itself* should be atomic,
meaning that *either* all of its actions should succeed, *or* it should
roll back all partically completed construction steps.

For example, if the PvScsiAllocateSharedPages() call fails in
PvScsiInit(), then the rings need to be uninited, and the original PCI
attributes need to be restored, before we exit PvScsiInit() with a
failure status. Because, in this case (i.e., when PvScsiInit() fails),
PvScsiDriverBindingStart() will also take the error path, and we will
never touch the PCI attributes or the rings ever again.

*Consequently* (and I'm getting to my main point here, at long last), in
the PvScsiUninit() function, you can *unconditionally* restore the
original PCI attributes, because you know that, at that location, the
original attributes will have been saved. Whenever that is not the case,
then PvScsiUninit() is not reached!

This is not complicated. Simply follow the pattern rigorously in *every*
function:

- construct and allocate resources gradually,

- if the very first such step fails, return directly,

- if any one of the subsequent steps fails, jump to an error handling
  label matching the last successful allocation / construction step,

- error handling labels should mirror the construction steps in reverse
  order, and they should release the corresponding (partially
  allocated/constructed) resources,

- every function should be atomic: fully successful, or completely
  rolled back,

- any given "teardown" function should be almost identical to the error
  path of the corresponding "init" function, with two small differences:
  (a) there should be no labels, (b) the final construction step of the
  "init" function should be rolled back too, namely as the first action
  in the 

Re: [edk2-devel] [PATCH] MdeModulePkg/HiiDatabase: Do not modify CONST string

2020-03-24 Thread Dandan Bi
Thanks for the update.
Reviewed-by: Dandan Bi 


Thanks,
Dandan

> -Original Message-
> From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
> Jeff Brasen
> Sent: Friday, March 20, 2020 1:21 AM
> To: devel@edk2.groups.io
> Cc: Bi, Dandan ; Dong, Eric ;
> Jeff Brasen 
> Subject: [edk2-devel] [PATCH] MdeModulePkg/HiiDatabase: Do not modify
> CONST string
> 
> Update function behavior to not modify the incoming string that is marked as
> CONST in the prototype.
> 
> Signed-off-by: Jeff Brasen 
> ---
>  .../Universal/HiiDatabaseDxe/ConfigRouting.c| 13 -
>  1 file changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> b/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> index 2cad6d29f4..e08a62c387 100644
> --- a/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> +++ b/MdeModulePkg/Universal/HiiDatabaseDxe/ConfigRouting.c
> @@ -5497,7 +5497,6 @@ HiiBlockToConfig (
>UINTN   Index;
>UINT8   *TemBuffer;
>CHAR16  *TemString;
> -  CHAR16  TemChar;
> 
>TmpBuffer = NULL;
> 
> @@ -5564,10 +5563,14 @@ HiiBlockToConfig (
>//
>// Copy  and an additional '&' to 
>//
> -  TemChar = *StringPtr;
> -  *StringPtr = '\0';
> -  AppendToMultiString(Config, ConfigRequest);
> -  *StringPtr = TemChar;
> +
> +  TemString = AllocateCopyPool (sizeof (CHAR16) * (StringPtr -
> + ConfigRequest + 1), ConfigRequest);  if (TemString == NULL) {
> +return EFI_OUT_OF_RESOURCES;
> +  }
> +  TemString[StringPtr - ConfigRequest] = '\0';
> + AppendToMultiString(Config, TemString);  FreePool (TemString);
> 
>//
>// Parse each  if exists
> --
> 2.17.1
> 
> 
> 


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Re: [edk2-devel] [PATCH 08/17] OvmfPkg/PvScsiDxe: Open PciIo protocol for later use

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> This will give us an exclusive access to the PciIo of this device
> after it was started and until is will be stopped.

(1) typo: s/is will be/it will be/

> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 29 -
>  OvmfPkg/PvScsiDxe/PvScsi.h |  1 +
>  2 files changed, 29 insertions(+), 1 deletion(-)
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index f613870e80f2..b6a83d73cead 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -410,11 +410,23 @@ PvScsiDriverBindingStart (
>  return EFI_OUT_OF_RESOURCES;
>}
>  
> -  Status = PvScsiInit (Dev);
> +  Status = gBS->OpenProtocol (
> +  ControllerHandle,
> +  ,
> +  (VOID **)>PciIo,
> +  This->DriverBindingHandle,
> +  ControllerHandle,
> +  EFI_OPEN_PROTOCOL_BY_DRIVER
> +  );
>if (EFI_ERROR (Status)) {
>  goto FreePvScsi;
>}
>  
> +  Status = PvScsiInit (Dev);
> +  if (EFI_ERROR (Status)) {
> +goto ClosePciIo;
> +  }
> +
>//
>// Setup complete, attempt to export the driver instance's PassThru 
> interface
>//
> @@ -434,6 +446,14 @@ PvScsiDriverBindingStart (
>  UninitDev:
>PvScsiUninit (Dev);
>  
> +ClosePciIo:
> +  gBS->CloseProtocol (
> + ControllerHandle,
> + ,
> + This->DriverBindingHandle,
> + ControllerHandle
> + );
> +
>  FreePvScsi:
>FreePool (Dev);
>  
> @@ -479,6 +499,13 @@ PvScsiDriverBindingStop (
>  
>PvScsiUninit (Dev);
>  
> +  gBS->CloseProtocol (
> + ControllerHandle,
> + ,
> + This->DriverBindingHandle,
> + ControllerHandle
> + );
> +
>FreePool (Dev);
>  
>return EFI_SUCCESS;
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.h b/OvmfPkg/PvScsiDxe/PvScsi.h
> index dd3e0c68e6da..e1e5ae18ebf2 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.h
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.h
> @@ -19,6 +19,7 @@
>  
>  typedef struct {
>UINT32  Signature;
> +  EFI_PCI_IO_PROTOCOL *PciIo;
>UINT8   MaxTarget;
>UINT8   MaxLun;
>EFI_EXT_SCSI_PASS_THRU_PROTOCOL PassThru;
> 

With (1) fixed up:

Reviewed-by: Laszlo Ersek 

Thanks,
Laszlo


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Re: [edk2-devel] [PATCH 07/17] OvmfPkg/PvScsiDxe: Translate Target & LUN to/from DevicePath

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> Implement EXT_SCSI_PASS_THRU.BuildDevicePath() and
> EXT_SCSI_PASS_THRU.GetTargetLun().
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 60 --
>  1 file changed, 58 insertions(+), 2 deletions(-)
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index 76bb361c7c94..f613870e80f2 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -136,7 +136,38 @@ PvScsiBuildDevicePath (
>IN OUT EFI_DEVICE_PATH_PROTOCOL   **DevicePath
>)
>  {
> -  return EFI_UNSUPPORTED;
> +  UINT8 TargetValue;
> +  PVSCSI_DEV*Dev;
> +  SCSI_DEVICE_PATH  *ScsiDevicePath;
> +
> +  if (DevicePath == NULL) {
> +return EFI_INVALID_PARAMETER;
> +  }
> +
> +  //
> +  // We only use first byte of target identifer
> +  //
> +  TargetValue = *Target;
> +
> +  Dev = PVSCSI_FROM_PASS_THRU (This);
> +  if (TargetValue > Dev->MaxTarget || Lun > Dev->MaxLun) {
> +return EFI_NOT_FOUND;
> +  }
> +
> +  ScsiDevicePath = AllocatePool (sizeof (*ScsiDevicePath));
> +  if (ScsiDevicePath == NULL) {
> +return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  ScsiDevicePath->Header.Type  = MESSAGING_DEVICE_PATH;
> +  ScsiDevicePath->Header.SubType   = MSG_SCSI_DP;
> +  ScsiDevicePath->Header.Length[0] = (UINT8)sizeof (*ScsiDevicePath);
> +  ScsiDevicePath->Header.Length[1] = (UINT8)(sizeof (*ScsiDevicePath) >> 8);
> +  ScsiDevicePath->Pun  = TargetValue;
> +  ScsiDevicePath->Lun  = (UINT16)Lun;
> +
> +  *DevicePath = >Header;
> +  return EFI_SUCCESS;
>  }
>  
>  STATIC
> @@ -149,7 +180,32 @@ PvScsiGetTargetLun (
>OUT UINT64*Lun
>)
>  {
> -  return EFI_UNSUPPORTED;
> +  SCSI_DEVICE_PATH *ScsiDevicePath;
> +  PVSCSI_DEV   *Dev;
> +
> +  if (DevicePath == NULL || Target == NULL || *Target == NULL || Lun == 
> NULL) {
> +return EFI_INVALID_PARAMETER;
> +  }
> +
> +  if (DevicePath->Type!= MESSAGING_DEVICE_PATH ||
> +  DevicePath->SubType != MSG_SCSI_DP) {
> +return EFI_UNSUPPORTED;
> +  }
> +
> +  ScsiDevicePath = (SCSI_DEVICE_PATH *)DevicePath;
> +  Dev = PVSCSI_FROM_PASS_THRU (This);
> +  if (ScsiDevicePath->Pun > Dev->MaxTarget ||
> +  ScsiDevicePath->Lun > Dev->MaxLun) {
> +return EFI_NOT_FOUND;
> +  }
> +
> +  //
> +  // We only use first byte of target identifer
> +  //
> +  **Target = (UINT8)ScsiDevicePath->Pun;

(1) Please add a ZeroMem() call here, for nulling all the other
(TARGET_MAX_BYTES - 1) bytes in the target array. I think:

  ZeroMem (*Target + 1, TARGET_MAX_BYTES - 1);

For two reasons:

- We should be consistent in the target arrays that we output, and the
functions implemented in the previous patch zero out the unused bytes
(which is nice). We should produce similar target arrays here.

- When investigating SCSI problems, sometimes debug patches have to be
written for the generic (device model-independent) SCSI drivers in edk2.
In those cases, we may hexdump the entire target array. And
indeterminate byte values in the target array should not leak into such
logs -- they could complicate textual comparisons etc.

> +  *Lun = ScsiDevicePath->Lun;
> +
> +  return EFI_SUCCESS;
>  }
>  
>  STATIC
> 

With (1) addressed:

Reviewed-by: Laszlo Ersek 

Thanks
Laszlo


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Re: [edk2-devel] [PATCH 06/17] OvmfPkg/PvScsiDxe: Report the number of targets and LUNs

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> Implement EXT_SCSI_PASS_THRU.GetNextTarget() and
> EXT_SCSI_PASS_THRU.GetNextTargetLun().
> 
> ScsiBusDxe scans all MaxTarget * MaxLun possible devices.
> This can take unnecessarily long for large number of targets.
> To deal with this, VirtioScsiDxe has defined PCDs to limit the
> MaxTarget & MaxLun to desired values which gives sufficient
> performance. It is very important in virtio-scsi as it can have
> very big MaxTarget & MaxLun.
> Even though a common PVSCSI device has a default MaxTarget=64 and
> MaxLun=0, we implement similar mechanism as virtio-scsi for completeness.
> This may be useful in the future when PVSCSI will have bigger values
> for MaxTarget and MaxLun.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/OvmfPkg.dec  |   9 +++
>  OvmfPkg/PvScsiDxe/PvScsi.c   | 122 ++-
>  OvmfPkg/PvScsiDxe/PvScsi.h   |   2 +
>  OvmfPkg/PvScsiDxe/PvScsi.inf |   5 ++
>  4 files changed, 136 insertions(+), 2 deletions(-)
> 
> diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
> index 4c5b6511cb97..76ce507e8bd0 100644
> --- a/OvmfPkg/OvmfPkg.dec
> +++ b/OvmfPkg/OvmfPkg.dec
> @@ -121,6 +121,15 @@
>gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
>gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
>  
> +  ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for
> +  # scan by ScsiBusDxe.
> +  # As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * 
> MaxLun
> +  # possible devices, which can take extremely long. Thus, the blow constants
> +  # are used so that scanning the number of devices given by their product
> +  # is still acceptably fast.
> +  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x40
> +  gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x41
> +

Three cosmetic requests:

(1) s/blow/below/


(2) in the comment block, starting with the second line, please use a

  "#  "

prefix, rather than

  "# "

so that the actual text line up with the first line.


(3) As tokens for the new PCDs, please use 0x36 and 0x37, for keeping
the OVMF token space densely populated.


Regarding the UINT8 type for PcdPvScsiMaxTargetLimit -- the QEMU source
indeed seems to #define PVSCSI_MAX_DEVS as 64, so I guess a UINT8 should
suffice.

>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
>gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index 46b430a34a57..76bb361c7c94 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -11,6 +11,7 @@
>  
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -24,6 +25,30 @@
>  //
>  #define PVSCSI_BINDING_VERSION  0x10
>  
> +//
> +// Ext SCSI Pass Thru utilities
> +//

OK.

> +
> +//
> +// Check if Target argument to EXT_SCSI_PASS_THRU.GetNextTarget() and
> +// EXT_SCSI_PASS_THRU.GetNextTargetLun() is initialized
> +//

(4) For leading function comment blocks, please use the following style:

/**
  Blah.
**/

> +STATIC
> +BOOLEAN
> +IsTargetInitialized (
> +  IN UINT8  *Target
> +  )
> +{
> +  UINTN Idx;
> +
> +  for (Idx = 0; Idx < TARGET_MAX_BYTES; ++Idx) {
> +if (Target[Idx] != 0xFF) {
> +  return TRUE;
> +}
> +  }
> +  return FALSE;
> +}
> +
>  //
>  // Ext SCSI Pass Thru
>  //
> @@ -51,7 +76,54 @@ PvScsiGetNextTargetLun (
>IN OUT UINT64 *Lun
>)
>  {
> -  return EFI_UNSUPPORTED;
> +  UINT8  *TargetPtr;
> +  UINT8  LastTarget;
> +  PVSCSI_DEV *Dev;
> +
> +  if (Target == NULL) {
> +return EFI_INVALID_PARAMETER;
> +  }
> +
> +  //
> +  // The TargetPointer input parameter is unnecessarily a pointer-to-pointer
> +  //
> +  TargetPtr = *Target;

(5) Please update the comment: in this function, the subject parameter
is called "Target", not "TargetPointer".

> +
> +  //
> +  // If target not initialized, return first target & LUN
> +  //
> +  if (!IsTargetInitialized (TargetPtr)) {
> +ZeroMem (TargetPtr, TARGET_MAX_BYTES);
> +*Lun = 0;
> +return EFI_SUCCESS;
> +  }
> +
> +  //
> +  // We only use first byte of target identifer
> +  //
> +  LastTarget = *TargetPtr;
> +
> +  //
> +  // Increment (target, LUN) pair if valid on input
> +  //
> +  Dev = PVSCSI_FROM_PASS_THRU (This);
> +  if (LastTarget > Dev->MaxTarget || *Lun > Dev->MaxLun) {
> +return EFI_INVALID_PARAMETER;
> +  }
> +
> +  if (*Lun < Dev->MaxLun) {
> +++*Lun;
> +return EFI_SUCCESS;
> +  }
> +
> +  if (LastTarget < Dev->MaxTarget) {
> +*Lun = 0;
> +++LastTarget;
> +*TargetPtr = LastTarget;
> +return EFI_SUCCESS;
> +  }
> +
> +  return EFI_NOT_FOUND;
>  }

Re: [edk2-devel] [PATCH 05/17] OvmfPkg/PvScsiDxe: Install stubbed EXT_SCSI_PASS_THRU

2020-03-24 Thread Laszlo Ersek
On 03/24/20 13:27, Laszlo Ersek wrote:
> On 03/16/20 16:01, Liran Alon wrote:
>> Support dynamic insertion and removal of the protocol.
>>
>> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
>> Reviewed-by: Nikita Leshenko 
>> Signed-off-by: Liran Alon 
>> ---
>>  OvmfPkg/PvScsiDxe/PvScsi.c   | 209 ++-
>>  OvmfPkg/PvScsiDxe/PvScsi.h   |  29 +
>>  OvmfPkg/PvScsiDxe/PvScsi.inf |   5 +-
>>  3 files changed, 240 insertions(+), 3 deletions(-)
>>  create mode 100644 OvmfPkg/PvScsiDxe/PvScsi.h
>>
>> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
>> index f1fffe962233..46b430a34a57 100644
>> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
>> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
>> @@ -11,16 +11,155 @@
>>  
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>>  
>> +#include "PvScsi.h"
>> +
>>  //
>>  // Higher versions will be used before lower, 0x10-0xffef is the version
>>  // range for IVH (Indie Hardware Vendors)
>>  //
>>  #define PVSCSI_BINDING_VERSION  0x10
>>  
>> +//
>> +// Ext SCSI Pass Thru
>> +//
>> +
>> +STATIC
>> +EFI_STATUS
>> +EFIAPI
>> +PvScsiPassThru (
>> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
>> +  IN UINT8  *Target,
>> +  IN UINT64 Lun,
>> +  IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
>> +  IN EFI_EVENT  EventOPTIONAL
>> +  )
>> +{
>> +  return EFI_UNSUPPORTED;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +EFIAPI
>> +PvScsiGetNextTargetLun (
>> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
>> +  IN OUT UINT8  **Target,
>> +  IN OUT UINT64 *Lun
>> +  )
>> +{
>> +  return EFI_UNSUPPORTED;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +EFIAPI
>> +PvScsiBuildDevicePath (
>> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
>> +  IN UINT8  *Target,
>> +  IN UINT64 Lun,
>> +  IN OUT EFI_DEVICE_PATH_PROTOCOL   **DevicePath
>> +  )
>> +{
>> +  return EFI_UNSUPPORTED;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +EFIAPI
>> +PvScsiGetTargetLun (
>> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
>> +  IN EFI_DEVICE_PATH_PROTOCOL   *DevicePath,
>> +  OUT UINT8 **Target,
>> +  OUT UINT64*Lun
>> +  )
>> +{
>> +  return EFI_UNSUPPORTED;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +EFIAPI
>> +PvScsiResetChannel (
>> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This
>> +  )
>> +{
>> +  return EFI_UNSUPPORTED;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +EFIAPI
>> +PvScsiResetTargetLun (
>> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
>> +  IN UINT8  *Target,
>> +  IN UINT64 Lun
>> +  )
>> +{
>> +  return EFI_UNSUPPORTED;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +EFIAPI
>> +PvScsiGetNextTarget (
>> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
>> +  IN OUT UINT8  **Target
>> +  )
>> +{
>> +  return EFI_UNSUPPORTED;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +PvScsiInit (
>> +  IN OUT PVSCSI_DEV *Dev
>> +  )
>> +{
>> +  //
>> +  // Populate the exported interface's attributes
>> +  //
>> +  Dev->PassThru.Mode = >PassThruMode;
>> +  Dev->PassThru.PassThru = 
>> +  Dev->PassThru.GetNextTargetLun = 
>> +  Dev->PassThru.BuildDevicePath  = 
>> +  Dev->PassThru.GetTargetLun = 
>> +  Dev->PassThru.ResetChannel = 
>> +  Dev->PassThru.ResetTargetLun   = 
>> +  Dev->PassThru.GetNextTarget= 
>> +
>> +  //
>> +  // AdapterId is a target for which no handle will be created during bus 
>> scan.
>> +  // Prevent any conflict with real devices.
>> +  //
>> +  Dev->PassThruMode.AdapterId = MAX_UINT32;
>> +
>> +  //
>> +  // Set both physical and logical attributes for non-RAID SCSI channel
>> +  //
>> +  Dev->PassThruMode.Attributes = EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL 
>> |
>> + EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL;
>> +
>> +  //
>> +  // No restriction on transfer buffer alignment
>> +  //
>> +  Dev->PassThruMode.IoAlign = 0;
>> +
>> +  return EFI_SUCCESS;
>> +}
>> +
>> +STATIC
>> +VOID
>> +PvScsiUninit (
>> +  IN OUT PVSCSI_DEV *Dev
>> +  )
>> +{
>> +  // Currently nothing to do here
>> +}
>> +
>>  //
>>  // Driver Binding
>>  //
>> @@ -89,7 +228,42 @@ PvScsiDriverBindingStart (
>>IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath OPTIONAL
>>)
>>  {
>> -  return EFI_UNSUPPORTED;
>> +  PVSCSI_DEV *Dev;
>> +  EFI_STATUS Status;
>> +
>> +  Dev = (PVSCSI_DEV *) AllocateZeroPool (sizeof (*Dev));
>> +  if (Dev == NULL) {
>> +return EFI_OUT_OF_RESOURCES;
>> +  }
>> +
>> +  Status = 

Re: [edk2-devel] [PATCH 05/17] OvmfPkg/PvScsiDxe: Install stubbed EXT_SCSI_PASS_THRU

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> Support dynamic insertion and removal of the protocol.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c   | 209 ++-
>  OvmfPkg/PvScsiDxe/PvScsi.h   |  29 +
>  OvmfPkg/PvScsiDxe/PvScsi.inf |   5 +-
>  3 files changed, 240 insertions(+), 3 deletions(-)
>  create mode 100644 OvmfPkg/PvScsiDxe/PvScsi.h
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index f1fffe962233..46b430a34a57 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -11,16 +11,155 @@
>  
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  
> +#include "PvScsi.h"
> +
>  //
>  // Higher versions will be used before lower, 0x10-0xffef is the version
>  // range for IVH (Indie Hardware Vendors)
>  //
>  #define PVSCSI_BINDING_VERSION  0x10
>  
> +//
> +// Ext SCSI Pass Thru
> +//
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiPassThru (
> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
> +  IN UINT8  *Target,
> +  IN UINT64 Lun,
> +  IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
> +  IN EFI_EVENT  EventOPTIONAL
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiGetNextTargetLun (
> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
> +  IN OUT UINT8  **Target,
> +  IN OUT UINT64 *Lun
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiBuildDevicePath (
> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
> +  IN UINT8  *Target,
> +  IN UINT64 Lun,
> +  IN OUT EFI_DEVICE_PATH_PROTOCOL   **DevicePath
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiGetTargetLun (
> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
> +  IN EFI_DEVICE_PATH_PROTOCOL   *DevicePath,
> +  OUT UINT8 **Target,
> +  OUT UINT64*Lun
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiResetChannel (
> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiResetTargetLun (
> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
> +  IN UINT8  *Target,
> +  IN UINT64 Lun
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiGetNextTarget (
> +  IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL*This,
> +  IN OUT UINT8  **Target
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_STATUS
> +PvScsiInit (
> +  IN OUT PVSCSI_DEV *Dev
> +  )
> +{
> +  //
> +  // Populate the exported interface's attributes
> +  //
> +  Dev->PassThru.Mode = >PassThruMode;
> +  Dev->PassThru.PassThru = 
> +  Dev->PassThru.GetNextTargetLun = 
> +  Dev->PassThru.BuildDevicePath  = 
> +  Dev->PassThru.GetTargetLun = 
> +  Dev->PassThru.ResetChannel = 
> +  Dev->PassThru.ResetTargetLun   = 
> +  Dev->PassThru.GetNextTarget= 
> +
> +  //
> +  // AdapterId is a target for which no handle will be created during bus 
> scan.
> +  // Prevent any conflict with real devices.
> +  //
> +  Dev->PassThruMode.AdapterId = MAX_UINT32;
> +
> +  //
> +  // Set both physical and logical attributes for non-RAID SCSI channel
> +  //
> +  Dev->PassThruMode.Attributes = EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL |
> + EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL;
> +
> +  //
> +  // No restriction on transfer buffer alignment
> +  //
> +  Dev->PassThruMode.IoAlign = 0;
> +
> +  return EFI_SUCCESS;
> +}
> +
> +STATIC
> +VOID
> +PvScsiUninit (
> +  IN OUT PVSCSI_DEV *Dev
> +  )
> +{
> +  // Currently nothing to do here
> +}
> +
>  //
>  // Driver Binding
>  //
> @@ -89,7 +228,42 @@ PvScsiDriverBindingStart (
>IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath OPTIONAL
>)
>  {
> -  return EFI_UNSUPPORTED;
> +  PVSCSI_DEV *Dev;
> +  EFI_STATUS Status;
> +
> +  Dev = (PVSCSI_DEV *) AllocateZeroPool (sizeof (*Dev));
> +  if (Dev == NULL) {
> +return EFI_OUT_OF_RESOURCES;
> +  }
> +
> +  Status = PvScsiInit (Dev);
> +  if (EFI_ERROR (Status)) {
> +goto FreePvScsi;
> +  }
> +
> +  //
> +  // Setup complete, attempt to export the driver instance's PassThru 
> interface
> +  //
> +  Dev->Signature = PVSCSI_SIG;
> +  

Re: [edk2-devel] [PATCH 04/17] OvmfPkg/PvScsiDxe: Probe PCI devices and look for PvScsi

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:01, Liran Alon wrote:
> PvScsiControllerSupported() is called on handles passed in
> by the ConnectController() boot service and if the handle is the
> PVSCSI controller, the function would return success. A success
> return value will attach our driver to the device.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/Include/IndustryStandard/PvScsi.h | 21 ++
>  OvmfPkg/PvScsiDxe/PvScsi.c| 49 ++-
>  OvmfPkg/PvScsiDxe/PvScsi.inf  |  5 +++
>  3 files changed, 74 insertions(+), 1 deletion(-)
>  create mode 100644 OvmfPkg/Include/IndustryStandard/PvScsi.h
> 
> diff --git a/OvmfPkg/Include/IndustryStandard/PvScsi.h 
> b/OvmfPkg/Include/IndustryStandard/PvScsi.h
> new file mode 100644
> index ..004c0af84989
> --- /dev/null
> +++ b/OvmfPkg/Include/IndustryStandard/PvScsi.h
> @@ -0,0 +1,21 @@
> +/** @file
> +
> +  VMware PVSCSI Device specific type and macro definitions.
> +
> +  Copyright (C) 2020, Oracle and/or its affiliates.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef __PVSCSI_H_
> +#define __PVSCSI_H_
> +
> +//
> +// Device offsets and constants
> +//
> +
> +#define PCI_VENDOR_ID_VMWARE(0x15ad)
> +#define PCI_DEVICE_ID_VMWARE_PVSCSI (0x07c0)
> +
> +#endif // __PVSCSI_H_
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index 0c81e645de08..f1fffe962233 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -9,7 +9,11 @@
>  
>  **/
>  
> +#include 
> +#include 
> +#include 
>  #include 
> +#include 
>  
>  //
>  // Higher versions will be used before lower, 0x10-0xffef is the version
> @@ -30,7 +34,50 @@ PvScsiDriverBindingSupported (
>IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath OPTIONAL
>)
>  {
> -  return EFI_UNSUPPORTED;
> +  EFI_STATUS  Status;
> +  EFI_PCI_IO_PROTOCOL *PciIo;
> +  PCI_TYPE00  Pci;
> +
> +  Status = gBS->OpenProtocol (
> +  ControllerHandle,
> +  ,
> +  (VOID **),
> +  This->DriverBindingHandle,
> +  ControllerHandle,
> +  EFI_OPEN_PROTOCOL_BY_DRIVER
> +  );
> +  if (EFI_ERROR (Status)) {
> +return Status;
> +  }
> +
> +  Status = PciIo->Pci.Read (
> +PciIo,
> +EfiPciIoWidthUint32,
> +0,
> +sizeof(Pci) / sizeof(UINT32),

(1) Please insert a space character before each opening parenthesis.

> +
> +);
> +  if (EFI_ERROR (Status)) {
> +  goto Done;

(2) Wrong indentation.

> +  }
> +
> +  if ((Pci.Hdr.VendorId != PCI_VENDOR_ID_VMWARE) ||
> +  (Pci.Hdr.DeviceId != PCI_DEVICE_ID_VMWARE_PVSCSI)) {
> +  Status = EFI_UNSUPPORTED;
> +  goto Done;

(3) Wrong indentation.

> +  }
> +
> +  Status = EFI_SUCCESS;
> +
> +Done:
> +  gBS->CloseProtocol (
> + ControllerHandle,
> + ,
> + This->DriverBindingHandle,
> + ControllerHandle
> + );
> +
> +  return Status;
>  }
>  
>  STATIC
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.inf b/OvmfPkg/PvScsiDxe/PvScsi.inf
> index d1d0e963f96d..c1f0663832ed 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.inf
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.inf
> @@ -22,7 +22,12 @@
>  
>  [Packages]
>MdePkg/MdePkg.dec
> +  OvmfPkg/OvmfPkg.dec
>  
>  [LibraryClasses]
> +  UefiBootServicesTableLib
>UefiDriverEntryPoint
>UefiLib
> +
> +[Protocols]
> +  gEfiPciIoProtocolGuid## TO_START
> 

With (1) through (3) addressed:

Reviewed-by: Laszlo Ersek 

Thanks
Laszlo


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Re: [edk2-devel] [PATCH 03/17] OvmfPkg/PvScsiDxe: Report name of driver

2020-03-24 Thread Laszlo Ersek
On 03/16/20 16:00, Liran Alon wrote:
> Install Component Name protocols to have a nice display name for the
> driver in places such as UEFI shell.
> 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2567
> Reviewed-by: Nikita Leshenko 
> Signed-off-by: Liran Alon 
> ---
>  OvmfPkg/PvScsiDxe/PvScsi.c | 63 --
>  1 file changed, 61 insertions(+), 2 deletions(-)
> 
> diff --git a/OvmfPkg/PvScsiDxe/PvScsi.c b/OvmfPkg/PvScsiDxe/PvScsi.c
> index bf0c743bad15..0c81e645de08 100644
> --- a/OvmfPkg/PvScsiDxe/PvScsi.c
> +++ b/OvmfPkg/PvScsiDxe/PvScsi.c
> @@ -68,6 +68,65 @@ EFI_DRIVER_BINDING_PROTOCOL mPvScsiDriverBinding = {
>NULL  // DriverBindingHandle, filled as well
>  };
>  
> +//
> +// Component Name
> +//
> +
> +STATIC
> +EFI_UNICODE_STRING_TABLE mDriverNameTable[] = {
> +  { "eng;en", L"PVSCSI Host Driver" },
> +  { NULL, NULL  }
> +};
> +
> +STATIC
> +EFI_COMPONENT_NAME_PROTOCOL mComponentName;
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiGetDriverName (
> +  IN  EFI_COMPONENT_NAME_PROTOCOL *This,
> +  IN  CHAR8   *Language,
> +  OUT CHAR16  **DriverName
> +  )
> +{
> +  return LookupUnicodeString2 (
> +   Language,
> +   This->SupportedLanguages,
> +   mDriverNameTable,
> +   DriverName,
> +   (BOOLEAN)(This == ) // Iso639Language
> +   );
> +}
> +
> +STATIC
> +EFI_STATUS
> +EFIAPI
> +PvScsiGetDeviceName (
> +  IN  EFI_COMPONENT_NAME_PROTOCOL *This,
> +  IN  EFI_HANDLE  DeviceHandle,
> +  IN  EFI_HANDLE  ChildHandle,
> +  IN  CHAR8   *Language,
> +  OUT CHAR16  **ControllerName
> +  )
> +{
> +  return EFI_UNSUPPORTED;
> +}
> +
> +STATIC
> +EFI_COMPONENT_NAME_PROTOCOL mComponentName = {
> +  ,
> +  ,
> +  "eng" // SupportedLanguages, ISO 639-2 language codes
> +};
> +
> +STATIC
> +EFI_COMPONENT_NAME2_PROTOCOL mComponentName2 = {
> +  (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) ,
> +  (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) ,
> +  "en" // SupportedLanguages, RFC 4646 language codes
> +};
> +
>  //
>  // Entry Point
>  //
> @@ -84,7 +143,7 @@ PvScsiEntryPoint (
> SystemTable,
> ,
> ImageHandle,
> -   NULL, // TODO Component name
> -   NULL  // TODO Component name
> +   ,
> +   
> );
>  }
> 

Reviewed-by: Laszlo Ersek 


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