Re: [Intel-gfx] [RFC] [Patch 1/2] [intel-gfx] : Add the CVT algorithm in kernel space

2009-05-06 Thread yakui_zhao
On Wed, 2009-05-06 at 02:17 +0800, Ian Romanick wrote:
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 yakui_zhao wrote:
  Add the CVT algorithm in kernel space. And this function can be called to
  generate the required modeline.
  
  Signed-off-by: Zhao Yakui yakui.z...@intel.com
  ---
   drivers/gpu/drm/drm_modes.c |  210 
  
   include/drm/drm_crtc.h  |3 
   2 files changed, 213 insertions(+)
  
  Index: linux-2.6/drivers/gpu/drm/drm_modes.c
  ===
  --- linux-2.6.orig/drivers/gpu/drm/drm_modes.c  2009-04-21 
  15:48:52.0 +0800
  +++ linux-2.6/drivers/gpu/drm/drm_modes.c   2009-05-05 11:22:09.0 
  +0800
  @@ -59,6 +59,216 @@
   }
   EXPORT_SYMBOL(drm_mode_debug_printmodeline);
   
  +#define HV_FACTOR  1000
  +/
  + * Function: drm_cvt_mode
  + *
  + * Parameters  : dev -drm device
  + *   hdisplay - hdisplay size
  + *   vdisplay - vdisplay size
  + *   vfresh - vfresh rate.
  + *   reduced - whether GTF calculation is simplified
  + *   interlaced -- whether the interlace is supported
  + * Returns : return the display mode
  + *
  + * Function description
  + * : create the display mode according to the CVT 
  algorthim.
  + *   It is based on the file of 
  xserver/hw/xfree86/modes/xf86cvt
  + */
 
 Use kerneldoc function header comment style.  I'd bet that Linus would
 NAK this.
thanks for pointing the issue.
I will change it according to kernel function header comment style.
thanks.
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 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org
 
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Re: [PATCH] drm: speed up EDID detection.

2009-05-06 Thread Keith Packard
On Wed, 2009-05-06 at 03:12 +0100, Dave Airlie wrote:

 Well if you just call the get_edid and ignore all the setscl crap that 
 this code does, then you should be able to just implement a new i2c algo, 
 and have it all just work.

Not completely; the rest of the DDC stack assumes that the underlying
algo is bit-bang. I've got patches in my kernel tree that I'm doing the
DisplayPort work in

ssh://people.freedesktop.org/home/keithp/drm-intel

on the display-port branch.

I had to switch the intel_output-ddc_bus from a 'struct intel_i2c_chan
*' to a 'struct i2c_adapter *' because intel_ddc_probe was using that to
call i2c_transfer.

I'm not happy with that patch yet; the DVO modules need to save the
target i2c address somewhere, and so the patches above pull it out of
the containing intel_i2c_chan when passed an i2c_adapter.

 I've no idea what monitors this picks up on, radeon used to do it, and the 
 kernel fb layer does it but I think got it from radeon originally.
 
 I suspect dropping it might not be a bad idea.

I wouldn't mind having it do this in the VGA stack; I hope to never use
one of those again, and we load-detect before trying DDC, so 'regular'
users should never hit this path.

I do worry about making really old and crufty monitors stop working.

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[Bug 21586] New: [Glean]segfault in glean cases pbo and texCube on mesa 7_5 branch

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21586

   Summary: [Glean]segfault in glean cases pbo and texCube on mesa
7_5 branch
   Product: Mesa
   Version: unspecified
  Platform: Other
OS/Version: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/DRI/i915
AssignedTo: dri-devel@lists.sourceforge.net
ReportedBy: haien@intel.com


Created an attachment (id=25533)
 -- (http://bugs.freedesktop.org/attachment.cgi?id=25533)
xorg.0.log

System Environment:
--
Host:   x-aspire1
Arch:   i386
Platform:   acer aspire1
OSD:Fedora release 10 (Cambridge)
Kernel_version: 2.6.30-rc4-KMS
Libdrm: (master)68103b2758029b3c1fbfcf995baa758bfd2676de
Mesa:   (mesa_7_5_branch)dd4c142e90a0cba5b445990bb522ce9199d7f565
Xserver:(master)1b1b20d6e3e696e4437a9ef56128cde70a485f66
Xf86_video_intel:  
(master)a8a771a853478e5f45f71d0eff3c4d55bf24d0ad
Kernel:   (for-linus)091438dd5668396328a3419abcbc6591159eb8d1

Bug detailed description:
-
glean cases pbo and texCube get segfault in intel_region_buffer
(intel=0x8136e30, region=0x0, flag=2)at intel_regions.c:440 recently because we
switch mesa to 7_5 branch. these two cases worked on mesa 7_4 branch and
master.
the backtrace of pbo from gdb is as below:

#0  intel_region_buffer (intel=0x8136e30, region=0x0, flag=2)
at intel_regions.c:440
#1  0xb7af36d2 in intelClearWithBlit (ctx=0x8136e30, mask=1)
at intel_blit.c:493
#2  0xb7aea75f in intelClear (ctx=0x8136e30, mask=1) at intel_clear.c:365
#3  0xb7b40bae in _mesa_Clear (mask=0) at main/clear.c:182
#4  0x080817a2 in GLEAN::PBOTest::testBitmap (this=0x8105400) at tpbo.cpp:455
#5  0x0807fe05 in GLEAN::PBOTest::testFunctionality (this=0x8105400,
r...@0x816ac88) at tpbo.cpp:1083
#6  0x0807fe71 in GLEAN::PBOTest::runSubTests (this=0x8105400, r...@0x816ac88)
at tpbo.cpp:1219
#7  0x08082996 in GLEAN::PBOTest::runOne (this=0x8105400, r...@0x816ac88,
w...@0xb354) at tpbo.cpp:1236
#8  0x0805ac36 in GLEAN::BaseTestGLEAN::MultiTestResult::run (
this=0x8105400, environme...@0xb3e0) at tbase.h:313
#9  0x0805466b in main (argc=6, argv=0xb524) at main.cpp:129

Reproduce steps:

1. xinit
2. run glean cases


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[Bug 21586] [Glean]segfault in glean cases pbo and texCube on mesa 7_5 branch

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21586





--- Comment #1 from liuhaien haien@intel.com  2009-05-05 23:57:02 PST ---
Created an attachment (id=25534)
 -- (http://bugs.freedesktop.org/attachment.cgi?id=25534)
xorg conf file


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[Bug 21586] [Glean]segfault in glean cases pbo and texCube on mesa 7_5 branch

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21586





--- Comment #2 from Brian Paul brian.p...@tungstengraphics.com  2009-05-06 
07:31:23 PST ---
I just tested mesa_7_5_branch here on my 965 and both pbo and texCube run
correctly for me.

This might be a DRI1 vs. DRI2 thing (I'm still on DRI1) or i915 only.  Though I
don't know of any differences in the 915 code between mesa_7_5_branch and
master.


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[Bug 21354] Better optimize loading constants in VertexShaders

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21354


Brian Paul brian.p...@tungstengraphics.com changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED




--- Comment #3 from Brian Paul brian.p...@tungstengraphics.com  2009-05-06 
07:47:53 PST ---
I've committed my patch (16baef336ddf6c5b9449ffa0555785b4b2b19718).  The
problem should be solved.  Re-open if not.


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[Bug 21582] [radeon-rewrite] crashes server through radeonRefillCurrentDmaRegion

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21582


Tormod Volden bugzi07.fdo.tor...@xoxy.net changed:

   What|Removed |Added

  Component|DRM/Radeon  |Drivers/DRI/Radeon
Product|DRI |Mesa
Version|XOrg CVS|unspecified




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[Bug 21582] [radeon-rewrite] crashes server through radeonRefillCurrentDmaRegion

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21582


Tormod Volden bugzi07.fdo.tor...@xoxy.net changed:

   What|Removed |Added

  Component|Drivers/DRI/Radeon  |Drivers/DRI/r300




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[Bug 21601] New: [radeon-rewrite] don't accidentally enable two-sided stencils

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21601

   Summary: [radeon-rewrite] don't accidentally enable two-sided
stencils
   Product: Mesa
   Version: unspecified
  Platform: Other
OS/Version: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/DRI/r300
AssignedTo: dri-devel@lists.sourceforge.net
ReportedBy: otay...@redhat.com
CC: airl...@freedesktop.org


In radeon_clear_tris(), when clearing the stencil buffer,
pass GL_FRONT_AND_BACK to _mesa_StencilFuncSeparate(), to avoid
triggering a software fallback on r300 and below.


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[Bug 21601] [radeon-rewrite] don't accidentally enable two-sided stencils

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21601





--- Comment #1 from Owen Taylor otay...@redhat.com  2009-05-06 11:48:38 PST 
---
Created an attachment (id=25565)
 -- (http://bugs.freedesktop.org/attachment.cgi?id=25565)
Patch as described


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[Bug 21602] New: Problem with new jglisse kms radeon driver and 2d driver

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21602

   Summary: Problem with new jglisse kms radeon driver and 2d driver
   Product: DRI
   Version: unspecified
  Platform: x86-64 (AMD64)
OS/Version: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: DRM/Radeon
AssignedTo: dri-devel@lists.sourceforge.net
ReportedBy: sob...@wp.pl


Created an attachment (id=25566)
 -- (http://bugs.freedesktop.org/attachment.cgi?id=25566)
Xorg.0.log from failed X start

I have done everything as described here:
http://jglisse.livejournal.com/1822.html
After overconing vesafb and vga16 problem I was able to see console but
starting X failed and I only get error(full log attached):
failed to add fb

After reading some code I found that 2d driver uses drmModeAddFB
with in fact calls ioctl DRM_IOCTL_MODE_ADDFB. Unfortunately it returns -1. So
I checked drm module to find out why the -1 is returned. The drm_mode_addfb
should support this ioctl, but I don't think it was even called once. I have
even added DRM_ERROR line to show if it was used, but I never saw anything
printed from it.


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[Bug 21602] Problem with new jglisse kms radeon driver and 2d driver

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21602





--- Comment #1 from Krzysztof Sobiecki sob...@wp.pl  2009-05-06 11:56:38 PST 
---
Created an attachment (id=25567)
 -- (http://bugs.freedesktop.org/attachment.cgi?id=25567)
dmesg(drm debug=1)  output for yesterday, no visible error from drm_mode_addfb


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[Bug 21601] [radeon-rewrite] don't accidentally enable two-sided stencils

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21601


Alex Deucher ag...@yahoo.com changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution||FIXED




--- Comment #2 from Alex Deucher ag...@yahoo.com  2009-05-06 14:10:55 PST ---
Pushed!


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Re: [RFC] [Patch 1/2] [intel-gfx] : Add the CVT algorithm in kernel space

2009-05-06 Thread Eric Anholt
On Tue, 2009-05-05 at 15:19 +0800, yakui_zhao wrote:
 Add the CVT algorithm in kernel space. And this function can be called to
 generate the required modeline.
 
 Signed-off-by: Zhao Yakui yakui.z...@intel.com

This code appears to be a copy-and-paste with small modifications of
xf86cvt.c, but the license of that code isn't respected.

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Re: [Intel-gfx] [RFC] [Patch 1/2] [intel-gfx] : Add the CVT algorithm in kernel space

2009-05-06 Thread Eric Anholt
On Tue, 2009-05-05 at 11:17 -0700, Ian Romanick wrote:
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 yakui_zhao wrote:
  Add the CVT algorithm in kernel space. And this function can be called to
  generate the required modeline.
  
  Signed-off-by: Zhao Yakui yakui.z...@intel.com
  ---
   drivers/gpu/drm/drm_modes.c |  210 
  
   include/drm/drm_crtc.h  |3 
   2 files changed, 213 insertions(+)
  
  Index: linux-2.6/drivers/gpu/drm/drm_modes.c
  ===
  --- linux-2.6.orig/drivers/gpu/drm/drm_modes.c  2009-04-21 
  15:48:52.0 +0800
  +++ linux-2.6/drivers/gpu/drm/drm_modes.c   2009-05-05 11:22:09.0 
  +0800
  @@ -59,6 +59,216 @@
   }
   EXPORT_SYMBOL(drm_mode_debug_printmodeline);
   
  +#define HV_FACTOR  1000
  +/
  + * Function: drm_cvt_mode
  + *
  + * Parameters  : dev -drm device
  + *   hdisplay - hdisplay size
  + *   vdisplay - vdisplay size
  + *   vfresh - vfresh rate.
  + *   reduced - whether GTF calculation is simplified
  + *   interlaced -- whether the interlace is supported
  + * Returns : return the display mode
  + *
  + * Function description
  + * : create the display mode according to the CVT 
  algorthim.
  + *   It is based on the file of 
  xserver/hw/xfree86/modes/xf86cvt
  + */
 
 Use kerneldoc function header comment style.  I'd bet that Linus would
 NAK this.

The existing style in the code is doxygen, and we've been continuing to
use that so far.  But coming up with your own new style is clearly
wrong.

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[Bug 21586] [Glean]segfault in glean cases pbo and texCube on mesa 7_5 branch

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21586


Gordon Jin gordon@intel.com changed:

   What|Removed |Added

 AssignedTo|dri-|i...@freedesktop.org
   |de...@lists.sourceforge.net |
   Severity|normal  |major
   Priority|medium  |high




--- Comment #3 from Gordon Jin gordon@intel.com  2009-05-06 19:22:57 PST 
---
Yes, this is using UXA/DRI2.
Ian, do you have any clue what's the difference between master and
mesa_7_5_branch here?


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[Bug 21608] New: [radeon-rewrite] ctx-Stencil._Enabled stale when accessed

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21608

   Summary: [radeon-rewrite] ctx-Stencil._Enabled stale when
accessed
   Product: Mesa
   Version: unspecified
  Platform: Other
OS/Version: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/DRI/Radeon
AssignedTo: dri-devel@lists.sourceforge.net
ReportedBy: otay...@redhat.com


Sequence of events:

 radeon_clear_tris() 
   - calls _mesa_Enable(GL_STENCIL_TEST);
 - Changes ctx-Stencil.Enabled
   - draws 
 - ctx-Stencil._Enabled is updated to 1
   - calls _mesa_PopAttrib();
  - Restores ctx.Stencil.Enabled (but not _Enabled)
  - calls _mesa_DrawBuffer()
 - calls radeon_draw_buffer
- accesses ctx-Stencil._Enabled, which is not up-to-date
- Enables stenciling on the hardware

So the hardware is left with stenciling on, and subsequent drawing vanishes.

The patch I'll attach fixes the problem, I'm not sure if it's the best way to
handle it.


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[Bug 21608] [radeon-rewrite] ctx-Stencil._Enabled stale when accessed

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21608





--- Comment #1 from Owen Taylor otay...@redhat.com  2009-05-06 19:59:00 PST 
---
Created an attachment (id=25578)
 -- (http://bugs.freedesktop.org/attachment.cgi?id=25578)
Patch as described


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[Bug 21609] New: [radeon-rewrite] Use correct texture format for RGB textures

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21609

   Summary: [radeon-rewrite] Use correct texture format for RGB
textures
   Product: Mesa
   Version: unspecified
  Platform: Other
OS/Version: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Drivers/DRI/r300
AssignedTo: dri-devel@lists.sourceforge.net
ReportedBy: otay...@redhat.com


r300SetTexBuffer2 looks at the 'cpp' field of the radeon_renderbuffer to decide
what radeon texture format (pp_txformat) to use. The cpp comes the dri2
getBuffers - (see radeon_common_context.c:radeon_update_renderbuffers()) and is
4 even for a depth-24 X server pixmap.

I'll attach a patch that fixes the problem locally; it's definitely a safe fix
since if the GLXPixmap was created with GLX_TEXTURE_FORMAT_EXT attribute of
GLX_TEXTURE_FORMAT_RGB_EXT, it can only be bound to RGB textures and A should
be fixed at 1.

Is it the correct fix? As implemented in the Radeon DDX, the cpp value comes
from drawable.bitsPerPixel, so is 32 for both xRGB and ARGB pixmaps. This seems
reasonable (though the DRI2 spec doesn't define what cpp is!), so the patch is
probably along the right lines as well - but may need some extension:

 - The cpp == 3 case then shouldn't occur, since it would reflect packed
pixels, something that the hardware can't support.

 - The r100/r200 drivers have pretty much identical code paths that would need
the same fix.


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[Bug 21609] [radeon-rewrite] Use correct texture format for RGB textures

2009-05-06 Thread bugzilla-daemon
http://bugs.freedesktop.org/show_bug.cgi?id=21609





--- Comment #1 from Owen Taylor otay...@redhat.com  2009-05-06 20:33:01 PST 
---
Created an attachment (id=25580)
 -- (http://bugs.freedesktop.org/attachment.cgi?id=25580)
Patch as described


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