date:20190515

[Bug target/90500] ICE error in copy_forbiden

2019-05-15 Thread crazylht at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90500

--- Comment #2 from Hongtao.liu  ---
Code in s_tanh.i cause internal error:

extern __typeof (__tanh) tanh __attribute__ ((weak, alias ("__tanh")))
__attribute__ ((__copy__ (__tanh)));; extern __typeof (__tanh) tanhf64
__attribute__ ((weak, alias ("__tanh"))) __attribute__ ((__copy__ (__tanh)));;
extern __typeof (__tanh) tanhf32x __attribute__ ((weak, alias ("__tanh")))
__attribute__ ((__copy__ (__tanh)));

[Bug tree-optimization/37239] peeling last iteration of a <= loop

2019-05-15 Thread egallager at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=37239

Eric Gallager  changed:

   What|Removed |Added

 CC||law at redhat dot com

--- Comment #9 from Eric Gallager  ---
(In reply to Eric Gallager from comment #6)
> (In reply to Andrew Pinski from comment #5)
> > https://gcc.gnu.org/ml/gcc-patches/2015-12/msg00253.html
> 
> This was approved with a minor nit fixed

cc-ing Jeff from that thread

[Bug target/90500] ICE error in copy_forbiden

2019-05-15 Thread crazylht at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90500

--- Comment #1 from Hongtao.liu  ---
command line:

 gcc  -std=gnu11 -fgnu89-inline  -O3 -march=westmere -mtune=skylake -g2 -m64
-Wl,-z,max-page-size=0x1000 -fPIC -Wall -Wwrite-strings -Wundef -Werror
-fmerge-all-constants -frounding-math -fstack-protector-strong
-Wstrict-prototypes -Wold-style-definition -fno-math-errno   
-fno-stack-protector -fcf-protection-D__NO_MATH_INLINES
-D__LIBC_INTERNAL_MATH_INLINES -c s_tanh.i

gcc version: lastest trunk r271275

Using built-in specs.
COLLECT_GCC=/home/liuhongt/work/gcc-trunk/build_gcc-trunck_base/gcc/xgcc
Target: x86_64-pc-linux-gnu
Configured with: ../gcc-trunk_base/configure --enable-languages=c,c++
--disable-bootstrap
Thread model: posix
gcc version 10.0.0 20190516 (experimental) (GCC)

[Bug target/90500] New: ICE error in copy_forbiden

2019-05-15 Thread crazylht at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90500

Bug ID: 90500
   Summary: ICE error in copy_forbiden
   Product: gcc
   Version: 10.0
Status: UNCONFIRMED
  Keywords: ice-on-invalid-code
  Severity: normal
  Priority: P3
 Component: target
  Assignee: unassigned at gcc dot gnu.org
  Reporter: crazylht at gmail dot com
  Target Milestone: ---

Created attachment 46364
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46364=edit
testcase

backtrace:  

#0  copy_forbidden (fun=0x0) at ../../gcc-trunk_base/gcc/tree-inline.c:3695
#1  tree_versionable_function_p (fndecl=0x75c11e00) at
../../gcc-trunk_base/gcc/tree-inline.c:5846
#2  0x015a507b in expand_target_clones (definition=true,
node=0x75c149d8) at ../../gcc-trunk_base/gcc/multiple_target.c:359
#3  ipa_target_clone () at ../../gcc-trunk_base/gcc/multiple_target.c:516
#4  (anonymous namespace)::pass_target_clone::execute (this=) at
../../gcc-trunk_base/gcc/multiple_target.c:552
#5  0x00b2b75a in execute_one_pass (pass=pass@entry=0x21d8dd0) at
../../gcc-trunk_base/gcc/passes.c:2473
#6  0x00b2c7c2 in execute_ipa_pass_list (pass=0x21d8dd0) at
../../gcc-trunk_base/gcc/passes.c:2913
#7  0x0079cc2e in ipa_passes () at
../../gcc-trunk_base/gcc/cgraphunit.c:2484
#8  symbol_table::compile (this=this@entry=0x75dd9100) at
../../gcc-trunk_base/gcc/cgraphunit.c:2620
#9  0x0079fa77 in symbol_table::compile (this=0x75dd9100) at
../../gcc-trunk_base/gcc/cgraphunit.c:2868
#10 symbol_table::finalize_compilation_unit (this=0x75dd9100) at
../../gcc-trunk_base/gcc/cgraphunit.c:2865
#11 0x00c1a1d4 in compile_file () at
../../gcc-trunk_base/gcc/toplev.c:481
#12 0x005cb5c6 in do_compile () at
../../gcc-trunk_base/gcc/toplev.c:2205
#13 toplev::main (this=this@entry=0x7fffd8b6, argc=,
argc@entry=31, argv=, argv@entry=0x7fffd9b8) at
../../gcc-trunk_base/gcc/toplev.c:2340
#14 0x005cf13b in main (argc=31, argv=0x7fffd9b8) at
../../gcc-trunk_base/gcc/main.c:39

[Bug c/86407] Ignore function attributes in function type declarations?

2019-05-15 Thread alexhenrie24 at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86407

--- Comment #6 from Alex Henrie  ---
Created attachment 46363
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46363=edit
[PATCH] Add option to ignore fndecl attributes on function pointers

This patch separates warnings about applying function definition attributes to
function pointers into a separate -Wstrict-function-attributes option. It's the
ideal solution for Wine and it fits well with GCC's existing design. Any
comments before I send it to the mailing list?

[Bug c++/90490] [9/10 Regression] ICE on noexcept with decltype expression

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90490

--- Comment #3 from Marek Polacek  ---
And we also started rejecting this:

struct R { constexpr operator bool() { return false;} };

template 
struct S {
  void g() noexcept(decltype(R{ }) { }) {
  }
};

[Bug fortran/90499] New: ICE during polymorphic assignment

2019-05-15 Thread townsend at astro dot wisc.edu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90499

Bug ID: 90499
   Summary: ICE during polymorphic assignment
   Product: gcc
   Version: 8.3.1
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: fortran
  Assignee: unassigned at gcc dot gnu.org
  Reporter: townsend at astro dot wisc.edu
  Target Milestone: ---

The test program below causes an internal compiler error, that appears to be
linked to the polymorphic assignment:

--
program test

  implicit none

  type f_t
  end type f_t

  type, extends (f_t) :: g_t
  end type g_t

contains

  function func () result (f)

class(f_t), allocatable :: f

f = g_t()

  end function func

end program test
--

When compiling with gfortran -c test.f90, I get:

test.f90:17:0:

 f = g_t()

internal compiler error: in build_function_decl, at fortran/trans-decl.c:2242
libbacktrace could not find executable to open
Please submit a full bug report,
with preprocessed source if appropriate.
See  for instructions.

cheers,

Rich

[Bug bootstrap/90497] [10 Regression] Broken bootstrap on i686-linux

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90497

--- Comment #4 from Jakub Jelinek  ---
spawn -ignore SIGHUP /home/jakub/src/gcc/obj45/gcc/xgcc
-B/home/jakub/src/gcc/obj45/gcc/ -fno-diagnostics-show-caret
-fno-diagnostics-show-line-numbers -fdiagnostics-color=never -O2
-Werror-implicit-function-declaration -m3dnow -c -o 3dnow-1.o
/home/jakub/src/gcc/gcc/testsuite/gcc.target/i386/3dnow-1.c
In file included from
/home/jakub/src/gcc/gcc/testsuite/gcc.target/i386/3dnow-1.c:14:
/home/jakub/src/gcc/obj45/gcc/include/mm3dnow.h: In function '_m_pavgusb':
/home/jakub/src/gcc/obj45/gcc/include/mm3dnow.h:53:1: error: unrecognizable
insn:
(insn 7 4 8 2 (set (reg:V8QI 88)
(truncate:V8QI (lshiftrt:V8HI (plus:V8HI (plus:V8HI (zero_extend:V8HI
(subreg:V8QI (reg/v:V2SI 86 [ __A ]) 0))
(zero_extend:V8HI (subreg:V8QI (reg/v:V2SI 87 [ __B ])
0)))
(const_vector:V8HI [
(const_int 1 [0x1]) repeated x8
]))
(const_int 1 [0x1]
"/home/jakub/src/gcc/obj45/gcc/include/mm3dnow.h":52:17 -1
 (nil))
during RTL pass: vregs
/home/jakub/src/gcc/obj45/gcc/include/mm3dnow.h:53:1: internal compiler error:
in extract_insn, at recog.c:2310
0x82dac28 _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
../../gcc/rtl-error.c:108
0x82daca5 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
../../gcc/rtl-error.c:116
0x82cb6d5 extract_insn(rtx_insn*)
../../gcc/recog.c:2310
0x8848ebd instantiate_virtual_regs_in_insn
../../gcc/function.c:1605
0x8848ebd instantiate_virtual_regs
../../gcc/function.c:1975
0x8848ebd execute
../../gcc/function.c:2024
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See  for instructions.
compiler exited with status 1
FAIL: gcc.target/i386/3dnow-1.c (internal compiler error)
FAIL: gcc.target/i386/3dnow-1.c (test for excess errors)

[Bug bootstrap/90497] [10 Regression] Broken bootstrap on i686-linux

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90497

--- Comment #3 from Jakub Jelinek  ---
With that patch what previously failed bootstrap passes it now.
Compared to a build from 24 hours ago and ignoring FAILs introduces during that
time also on x86_64-linux, I see:
+FAIL: gcc.target/i386/3dnow-1.c (internal compiler error)
+FAIL: gcc.target/i386/3dnow-1.c (test for excess errors)
+FAIL: gcc.target/i386/3dnow-2.c (internal compiler error)
+FAIL: gcc.target/i386/3dnow-2.c (test for excess errors)
that is most likely related either to this patch or more likely to the MMX in
SSE changes.

[Bug middle-end/90478] [10 Regression] ICE in emit_case_dispatch_table at gcc/stmt.c:796

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90478

--- Comment #6 from Jakub Jelinek  ---
Author: jakub
Date: Wed May 15 22:43:47 2019
New Revision: 271271

URL: https://gcc.gnu.org/viewcvs?rev=271271=gcc=rev
Log:
PR middle-end/90478
* gcc.dg/tree-ssa/pr90478.c: Add empty dg-options.  Use long long type
instead of long.

Modified:
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.dg/tree-ssa/pr90478.c

[Bug fortran/90498] New: [8,9 Regression] ICE with select type/associate and derived type argument containing class(*)

2019-05-15 Thread vladimir.fuka at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90498

Bug ID: 90498
   Summary: [8,9 Regression] ICE with select type/associate and
derived type argument containing class(*)
   Product: gcc
   Version: unknown
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: fortran
  Assignee: unassigned at gcc dot gnu.org
  Reporter: vladimir.fuka at gmail dot com
  Target Milestone: ---

subroutine s(a)
  use iso_fortran_env

  type field_names_a
class(*), pointer :: var(:) =>null()
  end type

  type(field_names_a) :: a(:)  

  select type (var => a(1)%var)
class default
  stop
  end select
!   associate (var => a(i)%var)
!   end associate
end

ICEs with 8.3 and 9.1. The associate also ICEs with 7.4.

> gfortran-9 ice2.f90 
ice2.f90:1:0:

1 | subroutine s(a)
  | 
internal compiler error: in fold_convert_loc, at fold-const.c:2429

associate version:

> gfortran-9 ice2.f90 
ice2.f90:14:0:

   14 |   associate (var => a(i)%var)
  | 
internal compiler error: in fold_convert_loc, at fold-const.c:2429

[Bug tree-optimization/90491] simple operation with unsigned integer and conversion to float/double not vectorized

2019-05-15 Thread g.peterh...@t-online.de

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90491

--- Comment #2 from g.peterh...@t-online.de ---
example:

#include 
#include 

int main(const int argc, const char** argv)
{
using value_type = float;
using array_type = std::array;

array_type  a;

for (size_t i=0; i:
0:  55  push   %rbp
1:  48 63 ffmovslq %edi,%rdi
4:  53  push   %rbx
5:  48 8d 64 24 a8  lea-0x58(%rsp),%rsp
a:  48 85 fftest   %rdi,%rdi
d:  0f 88 b9 01 00 00   js 1cc 
   13:  c4 e1 fa 2a c7  vcvtsi2ss %rdi,%xmm0,%xmm0
   18:  c5 fa 11 44 24 10   vmovss %xmm0,0x10(%rsp)
   1e:  48 89 f8mov%rdi,%rax
   21:  48 83 c0 01 add$0x1,%rax
   25:  0f 88 2a 03 00 00   js 355 
   2b:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   30:  c5 fa 11 44 24 14   vmovss %xmm0,0x14(%rsp)
   36:  48 89 f8mov%rdi,%rax
   39:  48 83 c0 02 add$0x2,%rax
   3d:  0f 88 f8 02 00 00   js 33b 
   43:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   48:  c5 fa 11 44 24 18   vmovss %xmm0,0x18(%rsp)
   4e:  48 89 f8mov%rdi,%rax
   51:  48 83 c0 03 add$0x3,%rax
   55:  0f 88 c6 02 00 00   js 321 
   5b:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   60:  c5 fa 11 44 24 1c   vmovss %xmm0,0x1c(%rsp)
   66:  48 89 f8mov%rdi,%rax
   69:  48 83 c0 04 add$0x4,%rax
   6d:  0f 88 94 02 00 00   js 307 
   73:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   78:  c5 fa 11 44 24 20   vmovss %xmm0,0x20(%rsp)
   7e:  48 89 f8mov%rdi,%rax
   81:  48 83 c0 05 add$0x5,%rax
   85:  0f 88 62 02 00 00   js 2ed 
   8b:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   90:  c5 fa 11 44 24 24   vmovss %xmm0,0x24(%rsp)
   96:  48 89 f8mov%rdi,%rax
   99:  48 83 c0 06 add$0x6,%rax
   9d:  0f 88 30 02 00 00   js 2d3 
   a3:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   a8:  c5 fa 11 44 24 28   vmovss %xmm0,0x28(%rsp)
   ae:  48 89 f8mov%rdi,%rax
   b1:  48 83 c0 07 add$0x7,%rax
   b5:  0f 88 fe 01 00 00   js 2b9 
   bb:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   c0:  c5 fa 11 44 24 2c   vmovss %xmm0,0x2c(%rsp)
   c6:  48 89 f8mov%rdi,%rax
   c9:  48 83 c0 08 add$0x8,%rax
   cd:  0f 88 cc 01 00 00   js 29f 
   d3:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   d8:  c5 fa 11 44 24 30   vmovss %xmm0,0x30(%rsp)
   de:  48 89 f8mov%rdi,%rax
   e1:  48 83 c0 09 add$0x9,%rax
   e5:  0f 88 9a 01 00 00   js 285 
   eb:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
   f0:  c5 fa 11 44 24 34   vmovss %xmm0,0x34(%rsp)
   f6:  48 89 f8mov%rdi,%rax
   f9:  48 83 c0 0a add$0xa,%rax
   fd:  0f 88 68 01 00 00   js 26b 
  103:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
  108:  c5 fa 11 44 24 38   vmovss %xmm0,0x38(%rsp)
  10e:  48 89 f8mov%rdi,%rax
  111:  48 83 c0 0b add$0xb,%rax
  115:  0f 88 36 01 00 00   js 251 
  11b:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
  120:  c5 fa 11 44 24 3c   vmovss %xmm0,0x3c(%rsp)
  126:  48 89 f8mov%rdi,%rax
  129:  48 83 c0 0c add$0xc,%rax
  12d:  0f 88 04 01 00 00   js 237 
  133:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
  138:  c5 fa 11 44 24 40   vmovss %xmm0,0x40(%rsp)
  13e:  48 89 f8mov%rdi,%rax
  141:  48 83 c0 0d add$0xd,%rax
  145:  0f 88 d2 00 00 00   js 21d 
  14b:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
  150:  c5 fa 11 44 24 44   vmovss %xmm0,0x44(%rsp)
  156:  48 89 f8mov%rdi,%rax
  159:  48 83 c0 0e add$0xe,%rax
  15d:  0f 88 a0 00 00 00   js 203 
  163:  c4 e1 fa 2a c0  vcvtsi2ss %rax,%xmm0,%xmm0
  168:  c5 fa 11 44 24 48   vmovss %xmm0,0x48(%rsp)
  16e:  48 83 c7 0f add$0xf,%rdi
  172:  78 75   js 1e9 
  174:  c4 e1 fa 2a c7  vcvtsi2ss %rdi,%xmm0,%xmm0
  179:  c5 fa 11 44 24 4c   vmovss %xmm0,0x4c(%rsp)
  17f:  48 8d 5c 24 10  lea0x10(%rsp),%rbx
  184:  48 8d 6c 24 50  lea0x50(%rsp),%rbp
  189:  0f 1f 80 00 00 00 00nopl   0x0(%rax)
  190:  c5 fa 10 03 vmovss (%rbx),%xmm0
  194:  bf 00 00 00 00  mov$0x0,%edi
195: R_X86_64_32std::cout
  199:  c5 fa 5a c0 vcvtss2sd %xmm0,%xmm0,%xmm0
  19d:  48 83 c3 04 add$0x4,%rbx
  1a1:  e8 00 00 00 00  callq  1a6

[Bug debug/90197] [8/9/10 Regression] Cannot step through simple loop at -O -g

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90197

--- Comment #9 from Jakub Jelinek  ---
Author: jakub
Date: Wed May 15 21:41:35 2019
New Revision: 271269

URL: https://gcc.gnu.org/viewcvs?rev=271269=gcc=rev
Log:
PR debug/90197
* cp-gimplify.c (genericize_cp_loop): Emit a DEBUG_BEGIN_STMT
before the condition (or if missing or constant non-zero at the end
of the loop.  Emit a DEBUG_BEGIN_STMT before the increment expression
if any.  Don't call protected_set_expr_location on incr if it already
has a location.

Modified:
trunk/gcc/cp/ChangeLog
trunk/gcc/cp/cp-gimplify.c

[Bug c++/81159] New warning idea: -Wself-move

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81159

Marek Polacek  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |mpolacek at gcc dot 
gnu.org

[Bug bootstrap/90497] [10 Regression] Broken bootstrap on i686-linux

2019-05-15 Thread hjl.tools at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90497

H.J. Lu  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
   Last reconfirmed||2019-05-15
   Assignee|unassigned at gcc dot gnu.org  |hjl.tools at gmail dot 
com
 Ever confirmed|0   |1

--- Comment #2 from H.J. Lu  ---
Created attachment 46362
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46362=edit
A patch

Please try this.

[Bug c++/81862] [C++11][constexpr] Constructor Parenthesized Initialization of Member Array Crash

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81862

--- Comment #2 from Marek Polacek  ---
Reduced.  But the PR86917 is much simpler, so I'd start with fixing that one.

template  struct b;
template  struct g;
template  struct g, b> {
  using e = b;
};
template 
struct i : g::e, typename i::e> {};
template <> struct i<1> { typedef b<0> e; };
template  struct j {};
template ::e> struct o;
template  struct o> {
  typedef j e;
};
template  using l = typename o::e;
template  using m = j;
template  using n = l;
struct q {
  constexpr q(int) { }
};
template  struct G { typedef q r[p]; };
template  struct H {
  typename G::r s;
  q operator[](long);
};
template  class I {
public:
  constexpr I(t... v) : I(v..., n<5>{}) {}
  template 
  constexpr I(t... v, m x) : u({y(v..., x)[w]...}) {}
  template  auto y(t..., m) {
H<5> a{w...};
return a;
  }
  q u[5];
};
int main() { I c(2, false); }

[Bug c++/81862] [C++11][constexpr] Constructor Parenthesized Initialization of Member Array Crash

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81862

Marek Polacek  changed:

   What|Removed |Added

 CC||mpolacek at gcc dot gnu.org
 Depends on||86917

--- Comment #1 from Marek Polacek  ---
Started with r230365.  Most likely a dup of PR86917.


Referenced Bugs:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86917
[Bug 86917] [7/8/9/10 Regression] ICE  in verify_ctor_sanity, at
cp/constexpr.c:2798

[Bug target/90492] simple array-copy not use available simd-registers

2019-05-15 Thread g.peterh...@t-online.de

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90492

--- Comment #4 from g.peterh...@t-online.de ---
#include 
#include 

int main(const int argc, const char** argv)
{
using value_type = int64_t;
using array_type = std::array;

array_type  a, b;

for (size_t i=0; i:
0:  55  push   %rbp
1:  48 89 e5mov%rsp,%rbp
4:  41 54   push   %r12
6:  53  push   %rbx
7:  48 83 e4 c0 and$0xffc0,%rsp
b:  48 8d a4 24 c0 fe fflea-0x140(%rsp),%rsp
   12:  ff
   13:  62 f1 fd 48 6f 05 00vmovdqa64 0x0(%rip),%zmm0# 1d

   1a:  00 00 00
19: R_X86_64_PC32   .rodata-0x4
   1d:  48 8d 9c 24 c0 00 00lea0xc0(%rsp),%rbx
   24:  00
   25:  62 f1 fd 48 7f 44 24vmovdqa64 %zmm0,0x40(%rsp)
   2c:  01
   2d:  c5 f9 6f d0 vmovdqa %xmm0,%xmm2
   31:  62 f1 fd 48 6f 05 00vmovdqa64 0x0(%rip),%zmm0# 3b

   38:  00 00 00
37: R_X86_64_PC32   .rodata+0x3c
   3b:  4c 8d a4 24 40 01 00lea0x140(%rsp),%r12
   42:  00
   43:  62 f1 fd 48 7f 44 24vmovdqa64 %zmm0,0x80(%rsp)
   4a:  02
   4b:  62 f1 fd 08 6f 5c 24vmovdqa64 0x50(%rsp),%xmm3
   52:  05
   53:  62 f1 fd 08 6f 64 24vmovdqa64 0x60(%rsp),%xmm4
   5a:  06
   5b:  62 f1 fd 08 6f 6c 24vmovdqa64 0x70(%rsp),%xmm5
   62:  07
   63:  62 f1 fd 08 6f 74 24vmovdqa64 0x90(%rsp),%xmm6
   6a:  09
   6b:  62 f1 fd 08 6f 7c 24vmovdqa64 0xa0(%rsp),%xmm7
   72:  0a
   73:  62 f1 fd 08 6f 4c 24vmovdqa64 0xb0(%rsp),%xmm1
   7a:  0b
   7b:  62 f1 fd 08 7f 54 24vmovdqa64 %xmm2,0xc0(%rsp)
   82:  0c
   83:  62 f1 fd 08 7f 5c 24vmovdqa64 %xmm3,0xd0(%rsp)
   8a:  0d
   8b:  62 f1 fd 08 7f 64 24vmovdqa64 %xmm4,0xe0(%rsp)
   92:  0e
   93:  62 f1 fd 08 7f 44 24vmovdqa64 %xmm0,0x100(%rsp)
   9a:  10
   9b:  62 f1 fd 08 7f 6c 24vmovdqa64 %xmm5,0xf0(%rsp)
   a2:  0f
   a3:  62 f1 fd 08 7f 74 24vmovdqa64 %xmm6,0x110(%rsp)
   aa:  11
   ab:  62 f1 fd 08 7f 7c 24vmovdqa64 %xmm7,0x120(%rsp)
   b2:  12
   b3:  62 f1 fd 08 7f 4c 24vmovdqa64 %xmm1,0x130(%rsp)
   ba:  13
   bb:  0f 1f 44 00 00  nopl   0x0(%rax,%rax,1)
   c0:  48 8b 33mov(%rbx),%rsi
   c3:  bf 00 00 00 00  mov$0x0,%edi
c4: R_X86_64_32 std::cout
   c8:  48 83 c3 08 add$0x8,%rbx
   cc:  e8 00 00 00 00  callq  d1 
cd: R_X86_64_PLT32  std::ostream&
std::ostream::_M_insert(long)-0x4
   d1:  48 89 c7mov%rax,%rdi
   d4:  ba 01 00 00 00  mov$0x1,%edx
   d9:  c6 44 24 3f 20  movb   $0x20,0x3f(%rsp)
   de:  48 8d 74 24 3f  lea0x3f(%rsp),%rsi
   e3:  e8 00 00 00 00  callq  e8 
e4: R_X86_64_PLT32  std::basic_ostream >& std::__ostream_insert
>(std::basic_ostream >&, char const*, long)-0x4
   e8:  49 39 dccmp%rbx,%r12
   eb:  75 d3   jnec0 
   ed:  48 8d 65 f0 lea-0x10(%rbp),%rsp
   f1:  31 c0   xor%eax,%eax
   f3:  5b  pop%rbx
   f4:  41 5c   pop%r12
   f6:  5d  pop%rbp
   f7:  c3  retq
   f8:  0f 1f 84 00 00 00 00nopl   0x0(%rax,%rax,1)
   ff:  00

[Bug libstdc++/85965] [8/9/10 Regression] G++ gives cryptic error instead of incomplete type

2019-05-15 Thread hedayat.fwd at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85965

--- Comment #15 from Hedayat Vatankhah  ---
Thanks!

Yep, I'm certainly not a C++ standard expert.

[Bug bootstrap/90497] [10 Regression] Broken bootstrap on i686-linux

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90497

--- Comment #1 from Jakub Jelinek  ---
BTW, I'd fear that with system GCC 10, one won't be able to build any earlier
GCCs unless patching libcpp/lex.c :(.

[Bug bootstrap/90497] [10 Regression] Broken bootstrap on i686-linux

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90497

Jakub Jelinek  changed:

   What|Removed |Added

   Priority|P3  |P1
 CC||hjl.tools at gmail dot com
   Target Milestone|--- |10.0

[Bug bootstrap/90497] New: [10 Regression] Broken bootstrap on i686-linux

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90497

Bug ID: 90497
   Summary: [10 Regression] Broken bootstrap on i686-linux
   Product: gcc
   Version: 9.0
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: bootstrap
  Assignee: unassigned at gcc dot gnu.org
  Reporter: jakub at gcc dot gnu.org
  Target Milestone: ---

Assuming since the recent MMX in SSE changes, i686-linux doesn't bootstrap
anymore.

../../libcpp/lex.c: In function ‘const uchar* search_line_mmx(const uchar*,
const uchar*)’:
../../libcpp/lex.c:336:33: error: ‘__builtin_ia32_pcmpeqb’ needs isa option
-msse2 -mmmx
  336 |   t = __builtin_ia32_pcmpeqb(data, repl_nl);
  |   ~~^~~
../../libcpp/lex.c:337:33: error: ‘__builtin_ia32_pcmpeqb’ needs isa option
-msse2 -mmmx
  337 |   c = __builtin_ia32_pcmpeqb(data, repl_cr);
  |   ~~^~~
../../libcpp/lex.c:338:37: error: ‘__builtin_ia32_por’ needs isa option -msse2
-mmmx
  338 |   t = (v8qi) __builtin_ia32_por ((__m64)t, (__m64)c);
  |  ~~~^~~~
../../libcpp/lex.c:339:33: error: ‘__builtin_ia32_pcmpeqb’ needs isa option
-msse2 -mmmx
  339 |   c = __builtin_ia32_pcmpeqb(data, repl_bs);
  |   ~~^~~
../../libcpp/lex.c:340:37: error: ‘__builtin_ia32_por’ needs isa option -msse2
-mmmx
  340 |   t = (v8qi) __builtin_ia32_por ((__m64)t, (__m64)c);
  |  ~~~^~~~
../../libcpp/lex.c:341:33: error: ‘__builtin_ia32_pcmpeqb’ needs isa option
-msse2 -mmmx
  341 |   c = __builtin_ia32_pcmpeqb(data, repl_qm);
  |   ~~^~~
../../libcpp/lex.c:342:37: error: ‘__builtin_ia32_por’ needs isa option -msse2
-mmmx
  342 |   t = (v8qi) __builtin_ia32_por ((__m64)t, (__m64)c);
  |  ~~~^~~~
../../libcpp/lex.c:336:33: error: ‘__builtin_ia32_pcmpeqb’ needs isa option
-msse2 -mmmx
  336 |   t = __builtin_ia32_pcmpeqb(data, repl_nl);
  |   ~~^~~
../../libcpp/lex.c:337:33: error: ‘__builtin_ia32_pcmpeqb’ needs isa option
-msse2 -mmmx
  337 |   c = __builtin_ia32_pcmpeqb(data, repl_cr);
  |   ~~^~~
../../libcpp/lex.c:338:37: error: ‘__builtin_ia32_por’ needs isa option -msse2
-mmmx
  338 |   t = (v8qi) __builtin_ia32_por ((__m64)t, (__m64)c);
  |  ~~~^~~~
...

This is i386 ../configure --enable-languages=default,obj-c++,lto,go,brig,d
--enable-checking=yes,rtl,extra bootstrap, so no sse/sse2 is enabled by
default.

[Bug libstdc++/90454] filesystem::path template constructor void* overload interference

2019-05-15 Thread redi at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90454

Jonathan Wakely  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED
   Target Milestone|--- |8.4
  Known to fail||8.3.0, 9.1.0

--- Comment #8 from Jonathan Wakely  ---
Also fixed for 8.4 and 9.2, so now I'll close it. Thanks for the report.

[Bug libstdc++/90454] filesystem::path template constructor void* overload interference

2019-05-15 Thread redi at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90454

--- Comment #7 from Jonathan Wakely  ---
Author: redi
Date: Wed May 15 20:27:45 2019
New Revision: 271265

URL: https://gcc.gnu.org/viewcvs?rev=271265=gcc=rev
Log:
PR libstdc++/90454.cc path construction from void*

Make the filesystem::path constructors SFINAE away for void* arguments,
instead of giving an error due to iterator_traits::reference.

Backport from mainline
2019-05-13  Jonathan Wakely  

PR libstdc++/90454.cc path construction from void*
* include/bits/fs_path.h (path::_Path): Use remove_pointer so that
pointers to void are rejected as well as void.
* include/experimental/bits/fs_path.h (path::_Path): Likewise.
* testsuite/27_io/filesystem/path/construct/80762.cc: Also check
pointers to void.
* testsuite/experimental/filesystem/path/construct/80762.cc: Likewise.

Modified:
branches/gcc-8-branch/libstdc++-v3/ChangeLog
branches/gcc-8-branch/libstdc++-v3/include/bits/fs_path.h
branches/gcc-8-branch/libstdc++-v3/include/experimental/bits/fs_path.h
   
branches/gcc-8-branch/libstdc++-v3/testsuite/27_io/filesystem/path/construct/80762.cc
   
branches/gcc-8-branch/libstdc++-v3/testsuite/experimental/filesystem/path/construct/80762.cc

[Bug debug/90471] ICE Segmentation fault when compiling with debug info

2019-05-15 Thread marxin at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90471

Martin Liška  changed:

   What|Removed |Added

  Known to work||7.3.0
  Known to fail||8.3.0

--- Comment #22 from Martin Liška  ---
(In reply to Daniel Fruzynski from comment #20)
> gcc 8.2.0 does not crash on this code.

Then I would recommend to update GCC to the version or newer. Note that GCC 7.x
is coming to the end of its life cycle.

> 
> I tried to use sgcheck, but without luck - it exited on some assertion
> failure.

[Bug debug/90471] ICE Segmentation fault when compiling with debug info

2019-05-15 Thread bugzi...@poradnik-webmastera.com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90471

--- Comment #21 from Daniel Fruzynski  ---
I have increased stack size on Linux to 800MB, verified that ulimit -s reports
new value and run gcc again - it crashed again.

[Bug target/90492] simple array-copy not use available simd-registers

2019-05-15 Thread g.peterh...@t-online.de

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90492

--- Comment #3 from g.peterh...@t-online.de ---
Am 15.05.19 um 21:20 schrieb glisse at gcc dot gnu.org:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90492
> 
> --- Comment #1 from Marc Glisse  ---
>> copy's use only sse-registers and never higher
> 
> What do you mean by that? Do you want AVX? Then you should let the compiler
> know that they are available (for instance -march=native).
> 

Yes, i'm use -march=native on Ryzen 7 2700 (has avx/avx2) or you compile with
-march=skylake-avx512, but copy-operations use only sse-registers in all cases.

[Bug libstdc++/90454] filesystem::path template constructor void* overload interference

2019-05-15 Thread redi at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90454

--- Comment #6 from Jonathan Wakely  ---
Author: redi
Date: Wed May 15 19:34:59 2019
New Revision: 271262

URL: https://gcc.gnu.org/viewcvs?rev=271262=gcc=rev
Log:
PR libstdc++/90454.cc path construction from void*

Make the filesystem::path constructors SFINAE away for void* arguments,
instead of giving an error due to iterator_traits::reference.

Backport from mainline
2019-05-13  Jonathan Wakely  

PR libstdc++/90454.cc path construction from void*
* include/bits/fs_path.h (path::_Path): Use remove_pointer so that
pointers to void are rejected as well as void.
* include/experimental/bits/fs_path.h (path::_Path): Likewise.
* testsuite/27_io/filesystem/path/construct/80762.cc: Also check
pointers to void.
* testsuite/experimental/filesystem/path/construct/80762.cc: Likewise.

Modified:
branches/gcc-9-branch/libstdc++-v3/ChangeLog
branches/gcc-9-branch/libstdc++-v3/include/bits/fs_path.h
branches/gcc-9-branch/libstdc++-v3/include/experimental/bits/fs_path.h
   
branches/gcc-9-branch/libstdc++-v3/testsuite/27_io/filesystem/path/construct/80762.cc
   
branches/gcc-9-branch/libstdc++-v3/testsuite/experimental/filesystem/path/construct/80762.cc

[Bug target/90492] simple array-copy not use available simd-registers

2019-05-15 Thread glisse at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90492

--- Comment #2 from Marc Glisse  ---
Ah, I see, this is a DUP or PR 89226 then?

[Bug target/90492] simple array-copy not use available simd-registers

2019-05-15 Thread glisse at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90492

--- Comment #1 from Marc Glisse  ---
> copy's use only sse-registers and never higher

What do you mean by that? Do you want AVX? Then you should let the compiler
know that they are available (for instance -march=native).

[Bug c++/90428] -Wredundant-move could warn for more cases

2019-05-15 Thread egallager at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90428

Eric Gallager  changed:

   What|Removed |Added

 CC||egallager at gcc dot gnu.org
   See Also||https://gcc.gnu.org/bugzill
   ||a/show_bug.cgi?id=81159,
   ||https://gcc.gnu.org/bugzill
   ||a/show_bug.cgi?id=67906

--- Comment #1 from Eric Gallager  ---
kinda related to other requests for improvements to warnings regarding
std::move, such as bug 81159 and bug 67906

[Bug rtl-optimization/90496] New: ICE in RTL pass pro_and_epilogue when all of `-flto -fsanitize=address -fstack-usage` are used on trivial source

2019-05-15 Thread gcc_bugs at codyps dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90496

Bug ID: 90496
   Summary: ICE in RTL pass pro_and_epilogue when all of `-flto
-fsanitize=address -fstack-usage` are used on trivial
source
   Product: gcc
   Version: 8.3.0
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: rtl-optimization
  Assignee: unassigned at gcc dot gnu.org
  Reporter: gcc_bugs at codyps dot com
  Target Milestone: ---

Compiling `int main(void) { return 0; }` with _all_ of `-flto -fsantize=address
-fstack-usage` results in an ICE:

```
$ cat test1.c 
int main(void)
{
return 0;
}
$ ./test
+ : gcc
+ gcc -v
Using built-in specs.
COLLECT_GCC=/bin/gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-pc-linux-gnu/8.3.0/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: /build/gcc/src/gcc/configure --prefix=/usr --libdir=/usr/lib
--libexecdir=/usr/lib --mandir=/usr/share/man --infodir=/usr/share/info
--with-bugurl=https://bugs.archlinux.org/
--enable-languages=c,c++,ada,fortran,go,lto,objc,obj-c++ --enable-shared
--enable-threads=posix --enable-libmpx --with-system-zlib --with-isl
--enable-__cxa_atexit --disable-libunwind-exceptions --enable-clocale=gnu
--disable-libstdcxx-pch --disable-libssp --enable-gnu-unique-object
--enable-linker-build-id --enable-lto --enable-plugin
--enable-install-libiberty --with-linker-hash-style=gnu
--enable-gnu-indirect-function --enable-multilib --disable-werror
--enable-checking=release --enable-default-pie --enable-default-ssp
--enable-cet=auto
Thread model: posix
gcc version 8.3.0 (GCC) 
+ gcc -o test1_a test1.c -flto -fsanitize=address
+ gcc -o test1_b test1.c -flto -fstack-usage
+ gcc -o test1_c test1.c -fsanitize=address -fstack-usage
+ gcc -o test1_d test1.c -flto -fsanitize=address -fstack-usage
during RTL pass: pro_and_epilogue
In function ‘_GLOBAL__sub_I_00099_0_cc3AMKZf.ltrans0.o’:
lto1: internal compiler error: Segmentation fault
Please submit a full bug report,
with preprocessed source if appropriate.
See  for instructions.
lto-wrapper: fatal error: /bin/gcc returned 1 exit status
compilation terminated.
/bin/ld: error: lto-wrapper failed
collect2: error: ld returned 1 exit status

```

Script from above:
```
#! /bin/bash
set -xeuf -o pipefail
: ${CC:=gcc}
$CC -v
$CC -o test1_a test1.c -flto -fsanitize=address
$CC -o test1_b test1.c -flto -fstack-usage
$CC -o test1_c test1.c -fsanitize=address -fstack-usage
$CC -o test1_d test1.c -flto -fsanitize=address -fstack-usage
```

[Bug c++/90495] Incorrect parsing of a()->b construction

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90495

Marek Polacek  changed:

   What|Removed |Added

   Keywords||diagnostic
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2019-05-15
 CC||mpolacek at gcc dot gnu.org
 Ever confirmed|0   |1

--- Comment #1 from Marek Polacek  ---
Changed in r236221.  Not a bug: the fix is to use the template disambiguator.  

But the diagnostics is pretty awful so I'll confirm the PR for that part.

[Bug debug/86964] [7/8 Regression] Too many debug symbols included, especially for extern globals

2019-05-15 Thread patrickdepinguin at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86964

--- Comment #15 from Thomas De Schampheleire  ---
Created attachment 46361
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46361=edit
Make -feliminate-unused-debug-symbols the default

Attached patch makes -feliminate-unused-debug-symbols the default.

I also updated the documentation (I hope it is correct). Note that I removed
the explicit reference to 'stabs' format, as it seems no longer correct as
DWARF is supported too.

Is this the correct way forward?

[Bug c++/90484] [9/10 Regression] ICE in equal_mem_array_ref_p at gcc/tree-ssa-scopedtables.c:550 since r270433 on i586

2019-05-15 Thread jakub at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90484

Jakub Jelinek  changed:

   What|Removed |Added

 CC||jakub at gcc dot gnu.org

--- Comment #2 from Jakub Jelinek  ---
I bet the above mentioned commit just tweaked things so that we now compare in
a hash table something we didn't compare before.
equal_mem_array_ref_p is called with:
t0
MEM[(struct BorderValue *) + 16B].m_isAuto
with
  constant 8>
unit-size  constant 1>
align:8 warn_if_not_align:0 symtab:0 alias-set -1 canonical-type
0x7fffe32ccb28 precision:1 min  max >
type, and
t1
MEM[(bool *)this_59(D) + 722B]
with a const bool type.
As both types are unsigned integral types with precision 1, they are considered
compatible.
But because one is a COMPONENT_REF and m_isAuto is 1-bit bitfield, we get sz0
and max0 1-bit (for COMPONENT_REFs we use DECL_SIZE of the FIELD_DECL, so
1-bit), while the other is a MEM_REF with bool type and we use mode size of the
QImode.
types_compatible_p guarantees that the mode is the same and precision is the
same, but it doesn't apply we use the mode or precision in both cases.

So, the
  /* Types were compatible, so this is a sanity check.  */
  gcc_assert (known_eq (sz0, sz1));
looks bogus to me, either we should just punt if the sizes aren't equal, or
we should ignore the sizes (just remove the assert).

I believe this bug is latent since r232559, before that change it used to
handle just MEM_REF and ARRAY_REF and for those get_ref_base_and_extent uses
always the TYPE_SIZE for BLKmode types or mode size otherwise, so for
types_compatible_p necessarily the same thing.

[Bug c++/90495] New: Incorrect parsing of a()->b construction

2019-05-15 Thread soko.slav at yandex dot ru

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90495

Bug ID: 90495
   Summary: Incorrect parsing of a()->b construction
   Product: gcc
   Version: 9.1.0
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: c++
  Assignee: unassigned at gcc dot gnu.org
  Reporter: soko.slav at yandex dot ru
  Target Milestone: ---

Code:

struct T {
template 
int get(int v){return v;}

template 
T* getT(){return this;}

template 
int get2(){return getT()->get(5);}
};

int main() {
return T().get2<3>();
}

fails to compile with message

: In instantiation of 'int T::get2() [with int x = 3]':
:13:24:   required from here
:9:37: error: invalid operands of types '' and 'int' to binary 'operator<'
9 | int get2(){return getT()->get(5);}

starting from gcc-7.1 (x86-64) till now including trunk, modules and contracts
branches
compiles on gcc-6.3

Tested locally and on https://godbolt.org/z/IaTDBm

workarounds easily like this

int get2(){return getT()->template get(5);}

or by splitting calls into several codelines, so it actually does not affect me

^#提wO供CV嘌cq据Pfq

2019-05-15 Thread jprzc



 
办
 
企禾兑
 
理 
 
业
 栗
 详陪喷电：l36—8687—4946，王-生
 Q 
Q：113—489—1578

gcc-bugs@gcc.gnu.org

[Bug debug/90494] New: ICE using a released ssaname

2019-05-15 Thread nathan at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90494

Bug ID: 90494
   Summary: ICE using a released ssaname
   Product: gcc
   Version: 9.0
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: debug
  Assignee: unassigned at gcc dot gnu.org
  Reporter: nathan at gcc dot gnu.org
  Target Milestone: ---

Created attachment 46360
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46360=edit
testcase

The attached code ICEs
./cc1plus repro.ii -fpreprocessed  -g2 -O3 -std=gnu++17

 void localLayer(long int, long int, void*) void driver(long int, long int,
void*)
Analyzing compilation unit
Performing interprocedural optimizations
 <*free_lang_data>   during
GIMPLE pass: einline

repro.ii:12:13: internal compiler error: in make_ssa_name_fn, at
tree-ssanames.c:268
   12 |   localLayer(X, Y, region);
  |   ~~^~
0x1795f6a make_ssa_name_fn(function*, tree_node*, gimple*, unsigned int)
../../../src/gcc/tree-ssanames.c:268
0x1525ab5 make_ssa_name
../../../src/gcc/tree-ssanames.h:114
0x1526ae5 remap_ssa_name
../../../src/gcc/tree-inline.c:246
0x152be34 copy_tree_body_r(tree_node**, int*, void*)
../../../src/gcc/tree-inline.c:1229

We're attempting to remap an ssaname that has already been released by
release_ssa_name_fn.  That results in error_mark being passed as the type.

notice we're creating an array of runtime-defined dimensions, which is a gnu
extension.

GCC 8 ICEs.  I've not tried earlier.

[Bug fortran/86148] parameterized type compile time error

2019-05-15 Thread townsend at astro dot wisc.edu

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86148

Rich Townsend  changed:

   What|Removed |Added

 CC||townsend at astro dot wisc.edu

--- Comment #3 from Rich Townsend  ---
Here's a related test case using a length-type parameter, that also fails for
apparently the same reason:

Module AA
  Type :: parent(k)
 Integer, len :: k
   contains
 procedure :: SubA1
  end type parent
contains
  Subroutine SubA1(this)
Class(parent(*)), Intent(In) :: this
  end Subroutine SubA1
end Module AA

$ gfortran -c AA.f90
foo.f90:5:14:

  procedure :: A1 => SubA1
  1
Error: Argument 'this' of 'suba1' with PASS(this) at (1) must be of the
derived-type 'parent'

cheers,

Rich

[Bug fortran/90461] [F18] Allow opening same file on separate units

2019-05-15 Thread jb at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90461

Janne Blomqvist  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

--- Comment #3 from Janne Blomqvist  ---
Fixed on trunk, closing.

[Bug fortran/90461] [F18] Allow opening same file on separate units

2019-05-15 Thread jb at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90461

--- Comment #2 from Janne Blomqvist  ---
Author: jb
Date: Wed May 15 18:02:36 2019
New Revision: 271260

URL: https://gcc.gnu.org/viewcvs?rev=271260=gcc=rev
Log:
Allow opening file on multiple units

As of Fortran 2018 it's allowed to open the same file on multiple
units.

libgfortran/ChangeLog:

2019-05-15  Janne Blomqvist  

PR fortran/90461
* io/open.c (new_unit): Don't check if the file is already open
for F2018.

testsuite/ChangeLog:

2019-05-15  Janne Blomqvist  

PR fortran/90461
* gfortran.dg/open_errors_2.f90: Add -std=f2008, adjust line number.
* gfortran.dg/open_errors_3.f90: New test.


Added:
trunk/gcc/testsuite/gfortran.dg/open_errors_3.f90
Modified:
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gfortran.dg/open_errors_2.f90
trunk/libgfortran/ChangeLog
trunk/libgfortran/io/open.c

[Bug c++/90493] New: const variable template specialization is always local

2019-05-15 Thread rafael at espindo dot la

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90493

Bug ID: 90493
   Summary: const variable template specialization is always local
   Product: gcc
   Version: unknown
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: c++
  Assignee: unassigned at gcc dot gnu.org
  Reporter: rafael at espindo dot la
  Target Milestone: ---

Without templates, things are simple:

// this is local
const int bar = 42;

// this is global
extern const int bar = 42;

Just adding a template is also OK

// this is local
template  const int foo = 42;

// this is global
template  extern const int foo = 42;

But with specializations there doesn't seem to be any way of getting a global
symbol

template  extern const int foo = 41;
// this is local
template <> const int foo = 42;

// this is an error:
// error: explicit template specialization cannot have a storage class
template <> extern const int foo = 42;


clang both accept the storage class in the specialization and always produces a
global symbol for template variables. Maybe doing both is a bug in clang, but
we should have some way of defining a global variable template specialization.

[Bug target/61976] aix64: Data corruption in struct passed by value

2019-05-15 Thread dje at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61976

--- Comment #6 from David Edelsohn  ---
Author: dje
Date: Wed May 15 17:11:31 2019
New Revision: 271257

URL: https://gcc.gnu.org/viewcvs?rev=271257=gcc=rev
Log:
Backport from mainline
2019-04-11  David Edelsohn  
* xcoffout.h (xcoff_private_rodata_section_name): Declare.
* xcoffout.c (xcoff_private_rodata_section_name): Define.
* config/rs6000/rs6000.c (rs6000_xcoff_asm_init_sections): Create
read_only_private_data_section using coff_private_rodata_section_name.
(rs6000_xcoff_file_start): Generate coff_private_rodata_section_name.

2018-12-04  David Edelsohn  
2018-12-13  David Edelsohn  
PR target/61976
* config/rs6000/rs6000.c (rs6000_function_arg): Don't pass aggregates
in FPRs on AIX. Ensure type is non-NULL.
(rs6000_arg_partial_bytes): Same.

Modified:
branches/gcc-7-branch/gcc/ChangeLog
branches/gcc-7-branch/gcc/config/rs6000/rs6000.c
branches/gcc-7-branch/gcc/xcoffout.c
branches/gcc-7-branch/gcc/xcoffout.h

[Bug target/61976] aix64: Data corruption in struct passed by value

2019-05-15 Thread dje at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61976

--- Comment #5 from David Edelsohn  ---
Author: dje
Date: Wed May 15 17:01:42 2019
New Revision: 271255

URL: https://gcc.gnu.org/viewcvs?rev=271255=gcc=rev
Log:
* xcoffout.h (xcoff_private_rodata_section_name): Declare.
* xcoffout.c (xcoff_private_rodata_section_name): Define.
* config/rs6000/rs6000.c (rs6000_xcoff_asm_init_sections): Create
read_only_private_data_section using coff_private_rodata_section_name.
(rs6000_xcoff_file_start): Generate coff_private_rodata_section_name.

PR target/61976
* config/rs6000/rs6000.c (rs6000_function_arg): Don't pass aggregates
in FPRs on AIX. Ensure type is non-NULL.
(rs6000_arg_partial_bytes): Same.

Modified:
branches/gcc-8-branch/gcc/ChangeLog
branches/gcc-8-branch/gcc/config/rs6000/rs6000.c
branches/gcc-8-branch/gcc/xcoffout.c
branches/gcc-8-branch/gcc/xcoffout.h

[Bug c++/90492] New: simple array-copy not use available simd-registers

2019-05-15 Thread g.peterh...@t-online.de

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90492

Bug ID: 90492
   Summary: simple array-copy not use available simd-registers
   Product: gcc
   Version: 8.3.1
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: c++
  Assignee: unassigned at gcc dot gnu.org
  Reporter: g.peterh...@t-online.de
  Target Milestone: ---

snip

#include 
#include 

int main(const int argc, const char** argv)
{
using value_type = int; // type does not matter
using array_type = std::array;

array_type  a, b;

// simple init
for (size_t i=0; ihttp://bugs.opensuse.org/ --with-pkgversion='SUSE Linux'
--with-slibdir=/lib64 --with-system-zlib --enable-libstdcxx-allocator=new
--disable-libstdcxx-pch --enable-version-specific-runtime-libs
--with-gcc-major-version-only --enable-linker-build-id --enable-linux-futex
--enable-gnu-indirect-function --program-suffix=-8 --without-system-libunwind
--enable-multilib --with-arch-32=x86-64 --with-tune=generic
--build=x86_64-suse-linux --host=x86_64-suse-linux
Thread model: posix
gcc version 8.3.1 20190226 [gcc-8-branch revision 269204] (SUSE Linux)

[Bug c++/90490] [9/10 Regression] ICE on noexcept with decltype expression

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90490

Marek Polacek  changed:

   What|Removed |Added

   Keywords||ice-on-valid-code
 Status|NEW |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |mpolacek at gcc dot 
gnu.org
   Target Milestone|--- |9.2
Summary|ICE on noexcept with|[9/10 Regression] ICE on
   |decltype expression |noexcept with decltype
   ||expression

--- Comment #2 from Marek Polacek  ---
Started with r270319.  Mine.

[Bug c++/90490] ICE on noexcept with decltype expression

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90490

Marek Polacek  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
   Last reconfirmed||2019-05-15
 CC||mpolacek at gcc dot gnu.org
 Ever confirmed|0   |1

--- Comment #1 from Marek Polacek  ---
Confirmed.

$ ./cc1plus -quiet 90490.C
90490.C:3:41: internal compiler error: in verify_ctor_sanity, at
cp/constexpr.c:2959
3 |   void g() noexcept(decltype(int{ }) { }) {
  | ^
0x8afa98 verify_ctor_sanity
/home/mpolacek/src/gcc/gcc/cp/constexpr.c:2959
0x8afe63 cxx_eval_bare_aggregate
/home/mpolacek/src/gcc/gcc/cp/constexpr.c:3003
0x8b8282 cxx_eval_constant_expression
/home/mpolacek/src/gcc/gcc/cp/constexpr.c:4936
0x8b72ec cxx_eval_constant_expression
/home/mpolacek/src/gcc/gcc/cp/constexpr.c:4611
0x8b9ac9 cxx_eval_outermost_constant_expr
/home/mpolacek/src/gcc/gcc/cp/constexpr.c:5328
0x8ba54d maybe_constant_value(tree_node*, tree_node*, bool)
/home/mpolacek/src/gcc/gcc/cp/constexpr.c:5541
0xb88a45 check_narrowing(tree_node*, tree_node*, int, bool)
/home/mpolacek/src/gcc/gcc/cp/typeck2.c:929
0x85c7bb convert_like_real
/home/mpolacek/src/gcc/gcc/cp/call.c:7457
0x850615 build_converted_constant_expr_internal
/home/mpolacek/src/gcc/gcc/cp/call.c:4283
0x850736 build_converted_constant_bool_expr(tree_node*, int)
/home/mpolacek/src/gcc/gcc/cp/call.c:4327
0x97e624 build_noexcept_spec(tree_node*, int)
/home/mpolacek/src/gcc/gcc/cp/except.c:1288
0xa2f5dd cp_parser_noexcept_specification_opt
/home/mpolacek/src/gcc/gcc/cp/parser.c:25267
0xa2f626 cp_parser_exception_specification_opt
/home/mpolacek/src/gcc/gcc/cp/parser.c:25294
0xa2643d cp_parser_direct_declarator
/home/mpolacek/src/gcc/gcc/cp/parser.c:20824
0xa2613f cp_parser_declarator
/home/mpolacek/src/gcc/gcc/cp/parser.c:20655
0xa2e346 cp_parser_member_declaration
/home/mpolacek/src/gcc/gcc/cp/parser.c:24648
0xa2d834 cp_parser_member_specification_opt
/home/mpolacek/src/gcc/gcc/cp/parser.c:24264
0xa2b85b cp_parser_class_specifier_1
/home/mpolacek/src/gcc/gcc/cp/parser.c:23405
0xa2c639 cp_parser_class_specifier
/home/mpolacek/src/gcc/gcc/cp/parser.c:23667
0xa1fc9a cp_parser_type_specifier
/home/mpolacek/src/gcc/gcc/cp/parser.c:17412
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See  for instructions.

[Bug tree-optimization/90491] simple operation with unsigned integer and conversion to float/double not vectorized

2019-05-15 Thread mpolacek at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90491

Marek Polacek  changed:

   What|Removed |Added

 CC||mpolacek at gcc dot gnu.org
  Component|c++ |tree-optimization

--- Comment #1 from Marek Polacek  ---
Not a C++ FE issue.

[Bug c++/90491] New: simple operation with unsigned integer and conversion to float/double not vectorized

2019-05-15 Thread g.peterh...@t-online.de

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90491

Bug ID: 90491
   Summary: simple operation with unsigned integer and conversion
to float/double not vectorized
   Product: gcc
   Version: 8.3.1
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: c++
  Assignee: unassigned at gcc dot gnu.org
  Reporter: g.peterh...@t-online.de
  Target Milestone: ---

snip

#include 
#include 

int main(const int argc, const char** argv)
{
using value_type = float; // or double
using array_type = std::array; // size does not matter

array_type  a;

/*
 * this loop not vectorized
 * explicite conversion a[i] = argc + int(i) works
 */
for (size_t i=0; ihttp://bugs.opensuse.org/ --with-pkgversion='SUSE Linux'
--with-slibdir=/lib64 --with-system-zlib --enable-libstdcxx-allocator=new
--disable-libstdcxx-pch --enable-version-specific-runtime-libs
--with-gcc-major-version-only --enable-linker-build-id --enable-linux-futex
--enable-gnu-indirect-function --program-suffix=-8 --without-system-libunwind
--enable-multilib --with-arch-32=x86-64 --with-tune=generic
--build=x86_64-suse-linux --host=x86_64-suse-linux
Thread model: posix
gcc version 8.3.1 20190226 [gcc-8-branch revision 269204] (SUSE Linux)

[Bug c++/90490] New: ICE on noexcept with decltype expression

2019-05-15 Thread dacamara.cameron at gmail dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90490

Bug ID: 90490
   Summary: ICE on noexcept with decltype expression
   Product: gcc
   Version: 9.1.0
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: c++
  Assignee: unassigned at gcc dot gnu.org
  Reporter: dacamara.cameron at gmail dot com
  Target Milestone: ---

The following code causes ICE in 9.1 and above:


template 
struct S {
  void g() noexcept(decltype(int{ }) { }) {
  }
};


This is a regression as gcc families below 9.1 can compile this.

[Bug libstdc++/85965] [8 Regression] G++ gives cryptic error instead of incomplete type

2019-05-15 Thread redi at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85965

--- Comment #14 from Jonathan Wakely  ---
A new patch to fix this was posted to:
https://gcc.gnu.org/ml/gcc-patches/2019-05/msg00863.html

[Bug debug/90471] ICE Segmentation fault when compiling with debug info

2019-05-15 Thread bugzi...@poradnik-webmastera.com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90471

--- Comment #20 from Daniel Fruzynski  ---
gcc 8.2.0 does not crash on this code.

I tried to use sgcheck, but without luck - it exited on some assertion failure.

[Bug c++/90333] [9/10 Regression] Can't apply attributes to lambdas with trailing returns

2019-05-15 Thread redi at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90333

Jonathan Wakely  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
  Known to work||8.3.0
   Keywords||rejects-valid
   Last reconfirmed||2019-05-15
 CC||jason at gcc dot gnu.org
 Ever confirmed|0   |1
Summary|Can't apply attributes to   |[9/10 Regression] Can't
   |lambdas with trailing   |apply attributes to lambdas
   |returns |with trailing returns
   Target Milestone|--- |9.2
  Known to fail||10.0, 9.1.0

--- Comment #2 from Jonathan Wakely  ---
Started to be rejected with r265787:

PR c++/60503 - wrong lambda attribute syntax.

This patch fixes two issues with lambda attribute handling: First, it was
in
the wrong place in the grammar.  Second, it was treating attributes as
applying to the whole declaration rather than to the function type, as
specified by the standard.

* parser.c (cp_parser_lambda_declarator_opt): Fix attribute
handling.

[Bug c++/90333] Can't apply attributes to lambdas with trailing returns

2019-05-15 Thread redi at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90333

Jonathan Wakely  changed:

   What|Removed |Added

 CC||mathias at gaunard dot com

--- Comment #1 from Jonathan Wakely  ---
*** Bug 90489 has been marked as a duplicate of this bug. ***

[Bug c++/90489] Attributes no longer allowed in lambdas with trailing return type

2019-05-15 Thread redi at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90489

Jonathan Wakely  changed:

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |DUPLICATE

--- Comment #2 from Jonathan Wakely  ---
Looks like a dup

*** This bug has been marked as a duplicate of bug 90333 ***

[Bug lto/90434] [regression from 8.x] Incorrect code generation for __builtin_strcmp with LTO and freestanding binary

2019-05-15 Thread andrew.cooper3 at citrix dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90434

--- Comment #2 from Andrew Cooper  ---
I'm afraid that so far, I haven't found a way to reduce the test case.  I'm
still trying.

[Bug c++/90489] Attributes no longer allowed in lambdas with trailing return type

2019-05-15 Thread mathias at gaunard dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90489

--- Comment #1 from Mathias Gaunard  ---
Possibly related,
Both
auto const f = [](int) [[gnu::always_inline]] -> int { return 0; };
and
auto const f = [](int) [[gnu::always_inline]] { return 0; };

also fail with GCC 9.1, but work with GCC 8.2.

says:
:1:50: warning: attribute ignored [-Wattributes]

1 | auto const f = [](int) [[gnu::always_inline]] -> int { return 0; };

  |  ^~~

:1:50: note: an attribute that appertains to a type-specifier is
ignored

[Bug tree-optimization/90316] [8/9 Regression] large compile time increase in opt / alias stmt walking for Go example

2019-05-15 Thread thanm at google dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90316

--- Comment #37 from Than McIntosh  ---
(In reply to rguent...@suse.de from comment #36)

> Thanks for the experiment.  I guess I will limit backporting things
> to the GCC 9 branch then.  Am I correct that the 2127 seconds are
> the same regardless of whether r271124 is applied to the branch or not?

The patch makes things slightly better -- without it the time is 2540 seconds.

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #46 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:39:38 2019
New Revision: 271254

URL: https://gcc.gnu.org/viewcvs?rev=271254=gcc=rev
Log:
i386: Add tests for MMX intrinsic emulations with SSE

Test MMX intrinsics with -msse2 in 32-bit mode and -msse2 -mno-mmx in
64-bit mode.

PR target/89021
* gcc.target/i386/mmx-vals.h: New file.
* gcc.target/i386/sse2-mmx-2.c: Likewise.
* gcc.target/i386/sse2-mmx-3.c: Likewise.
* gcc.target/i386/sse2-mmx-4.c: Likewise.
* gcc.target/i386/sse2-mmx-5.c: Likewise.
* gcc.target/i386/sse2-mmx-6.c: Likewise.
* gcc.target/i386/sse2-mmx-7.c: Likewise.
* gcc.target/i386/sse2-mmx-8.c: Likewise.
* gcc.target/i386/sse2-mmx-9.c: Likewise.
* gcc.target/i386/sse2-mmx-10.c: Likewise.
* gcc.target/i386/sse2-mmx-11.c: Likewise.
* gcc.target/i386/sse2-mmx-12.c: Likewise.
* gcc.target/i386/sse2-mmx-13.c: Likewise.
* gcc.target/i386/sse2-mmx-14.c: Likewise.
* gcc.target/i386/sse2-mmx-15.c: Likewise.
* gcc.target/i386/sse2-mmx-16.c: Likewise.
* gcc.target/i386/sse2-mmx-17.c: Likewise.
* gcc.target/i386/sse2-mmx-18a.c: Likewise.
* gcc.target/i386/sse2-mmx-18b.c: Likewise.
* gcc.target/i386/sse2-mmx-18c.c: Likewise.
* gcc.target/i386/sse2-mmx-19a.c: Likewise.
* gcc.target/i386/sse2-mmx-18b.c: Likewise.
* gcc.target/i386/sse2-mmx-19c.c: Likewise.
* gcc.target/i386/sse2-mmx-19d.c: Likewise.
* gcc.target/i386/sse2-mmx-19e.c: Likewise.
* gcc.target/i386/sse2-mmx-20.c: Likewise.
* gcc.target/i386/sse2-mmx-21.c: Likewise.
* gcc.target/i386/sse2-mmx-22.c: Likewise.
* gcc.target/i386/sse2-mmx-cvtpi2ps.c: Likewise.
* gcc.target/i386/sse2-mmx-cvtps2pi.c: Likewise.
* gcc.target/i386/sse2-mmx-cvttps2pi.c: Likewise.
* gcc.target/i386/sse2-mmx-maskmovq.c: Likewise.
* gcc.target/i386/sse2-mmx-packssdw.c: Likewise.
* gcc.target/i386/sse2-mmx-packsswb.c: Likewise.
* gcc.target/i386/sse2-mmx-packuswb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddd.c: Likewise.
* gcc.target/i386/sse2-mmx-paddq.c: Likewise.
* gcc.target/i386/sse2-mmx-paddsb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddsw.c: Likewise.
* gcc.target/i386/sse2-mmx-paddusb.c: Likewise.
* gcc.target/i386/sse2-mmx-paddusw.c: Likewise.
* gcc.target/i386/sse2-mmx-paddw.c: Likewise.
* gcc.target/i386/sse2-mmx-pand.c: Likewise.
* gcc.target/i386/sse2-mmx-pandn.c: Likewise.
* gcc.target/i386/sse2-mmx-pavgb.c: Likewise.
* gcc.target/i386/sse2-mmx-pavgw.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpeqb.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpeqd.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpeqw.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpgtb.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpgtd.c: Likewise.
* gcc.target/i386/sse2-mmx-pcmpgtw.c: Likewise.
* gcc.target/i386/sse2-mmx-pextrw.c: Likewise.
* gcc.target/i386/sse2-mmx-pinsrw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmaddwd.c: Likewise.
* gcc.target/i386/sse2-mmx-pmaxsw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmaxub.c: Likewise.
* gcc.target/i386/sse2-mmx-pminsw.c: Likewise.
* gcc.target/i386/sse2-mmx-pminub.c: Likewise.
* gcc.target/i386/sse2-mmx-pmovmskb.c: Likewise.
* gcc.target/i386/sse2-mmx-pmulhuw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmulhw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmullw.c: Likewise.
* gcc.target/i386/sse2-mmx-pmuludq.c: Likewise.
* gcc.target/i386/sse2-mmx-por.c: Likewise.
* gcc.target/i386/sse2-mmx-psadbw.c: Likewise.
* gcc.target/i386/sse2-mmx-pshufw.c: Likewise.
* gcc.target/i386/sse2-mmx-pslld.c: Likewise.
* gcc.target/i386/sse2-mmx-pslldi.c: Likewise.
* gcc.target/i386/sse2-mmx-psllq.c: Likewise.
* gcc.target/i386/sse2-mmx-psllqi.c: Likewise.
* gcc.target/i386/sse2-mmx-psllw.c: Likewise.
* gcc.target/i386/sse2-mmx-psllwi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrad.c: Likewise.
* gcc.target/i386/sse2-mmx-psradi.c: Likewise.
* gcc.target/i386/sse2-mmx-psraw.c: Likewise.
* gcc.target/i386/sse2-mmx-psrawi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrld.c: Likewise.
* gcc.target/i386/sse2-mmx-psrldi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlq.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlqi.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlw.c: Likewise.
* gcc.target/i386/sse2-mmx-psrlwi.c: Likewise.
* gcc.target/i386/sse2-mmx-psubb.c: Likewise.
* gcc.target/i386/sse2-mmx-psubd.c:

[Bug c++/90489] New: Attributes no longer allowed in lambdas with trailing return type

2019-05-15 Thread mathias at gaunard dot com

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90489

Bug ID: 90489
   Summary: Attributes no longer allowed in lambdas with trailing
return type
   Product: gcc
   Version: 9.1.0
Status: UNCONFIRMED
  Severity: normal
  Priority: P3
 Component: c++
  Assignee: unassigned at gcc dot gnu.org
  Reporter: mathias at gaunard dot com
  Target Milestone: ---

As of GCC 8.2, the following code is well-formed:
auto const f = [](int) __attribute__((always_inline)) -> int { return 0; };

With GCC 9.1, it fails to compile.

Note however that the following remains valid:
auto const f = [](int) __attribute__((always_inline)) { return 0; };
So it looks like there is some bad interaction in the parsing between
attributes and the late return type.

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #45 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:33:43 2019
New Revision: 271253

URL: https://gcc.gnu.org/viewcvs?rev=271253=gcc=rev
Log:
i386: Enable TM MMX intrinsics with SSE2

This patch enables TM MMX intrinsics with SSE2 when MMX is disabled.

PR target/89021
* config/i386/i386-builtins.c (bdesc_tm): Enable MMX intrinsics
with SSE2.

Modified:
trunk/gcc/config/i386/i386-builtins.c
trunk/gcc/testsuite/ChangeLog

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #44 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:32:33 2019
New Revision: 271252

URL: https://gcc.gnu.org/viewcvs?rev=271252=gcc=rev
Log:
i386: Allow MMX intrinsic emulation with SSE

Allow MMX intrinsic emulation with SSE/SSE2/SSSE3.  Don't enable MMX ISA
by default with TARGET_MMX_WITH_SSE.

For pr82483-1.c and pr82483-2.c, "-mssse3 -mno-mmx" compiles in 64-bit
mode since MMX intrinsics can be emulated wit SSE.

gcc/

PR target/89021
* config/i386/i386-builtin.def: Enable MMX intrinsics with
SSE/SSE2/SSSE3.
* config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins):
Likewise.
* config/i386/i386-expand.c (ix86_expand_builtin): Allow
SSE/SSE2/SSSE3 to emulate MMX intrinsics with TARGET_MMX_WITH_SSE.
* config/i386/mmintrin.h: Only require SSE2 if __MMX_WITH_SSE__
is defined.

gcc/testsuite/

PR target/89021
* gcc.target/i386/pr82483-1.c: Error only on ia32.
* gcc.target/i386/pr82483-2.c: Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/i386-builtin.def
trunk/gcc/config/i386/i386-builtins.c
trunk/gcc/config/i386/i386-expand.c
trunk/gcc/config/i386/mmintrin.h
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.target/i386/pr82483-1.c
trunk/gcc/testsuite/gcc.target/i386/pr82483-2.c

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #43 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:31:18 2019
New Revision: 271251

URL: https://gcc.gnu.org/viewcvs?rev=271251=gcc=rev
Log:
i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE

PR target/89021
* config/i386/mmx.md (*vec_dupv2sf): Changed to
define_insn_and_split to support SSE emulation.
(*vec_extractv2sf_0): Likewise.
(*vec_extractv2sf_1): Likewise.
(*vec_extractv2si_0): Likewise.
(*vec_extractv2si_1): Likewise.
(*vec_extractv2si_zext_mem): Likewise.
(vec_setv2sf): Also allow TARGET_MMX_WITH_SSE.
(vec_extractv2sf_1 splitter): Likewise.
(vec_extractv2sfsf): Likewise.
(vec_setv2si): Likewise.
(vec_extractv2si_1 splitter): Likewise.
(vec_extractv2sisi): Likewise.
(vec_setv4hi): Likewise.
(vec_extractv4hihi): Likewise.
(vec_setv8qi): Likewise.
(vec_extractv8qiqi): Likewise.
(vec_extractv2sfsf): Also allow TARGET_MMX_WITH_SSE.  Pass
TARGET_MMX_WITH_SSE ix86_expand_vector_extract.
(vec_extractv2sisi): Likewise.
(vec_extractv4hihi): Likewise.
(vec_extractv8qiqi): Likewise.
(vec_initv2sfsf): Also allow TARGET_MMX_WITH_SSE.  Pass
TARGET_MMX_WITH_SSE to ix86_expand_vector_init.
(vec_initv2sisi): Likewise.
(vec_initv4hihi): Likewise.
(vec_initv8qiqi): Likewise.
(vec_setv2si): Also allow TARGET_MMX_WITH_SSE.  Pass
TARGET_MMX_WITH_SSE to ix86_expand_vector_set.
(vec_setv4hi): Likewise.
(vec_setv8qi): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #42 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:30:32 2019
New Revision: 271250

URL: https://gcc.gnu.org/viewcvs?rev=271250=gcc=rev
Log:
i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE

PR target/89021
* config/i386/mmx.md (MMXMODE:mov): Also allow
TARGET_MMX_WITH_SSE.
(MMXMODE:*mov_internal): Likewise.
(MMXMODE:movmisalign): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #41 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:29:28 2019
New Revision: 271249

URL: https://gcc.gnu.org/viewcvs?rev=271249=gcc=rev
Log:
Prevent allocation of MMX registers with TARGET_MMX_WITH_SSE

2019-05-15  Uroš Bizjak  

PR target/89021
* config/i386/i386.md (*zero_extendsidi2): Add mmx_isa attribute.
* config/i386/sse.md (sse2_cvtpi2pd): Ditto.
(sse2_cvtpd2pi): Ditto.
(sse2_cvttpd2pi): Ditto.
(*vec_concatv2sf_sse4_1): Ditto.
(*vec_concatv2sf_sse): Ditto.
(*vec_concatv2si_sse4_1): Ditto.
(*vec_concatv2si): Ditto.
(*vec_concatv4si_0): Ditto.
(*vec_concatv2di_0): Ditto.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/i386.md
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #39 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:27:33 2019
New Revision: 271247

URL: https://gcc.gnu.org/viewcvs?rev=271247=gcc=rev
Log:
i386: Emulate MMX ssse3_palignrdi with SSE

Emulate MMX version of palignrq with SSE version by concatenating 2
64-bit MMX operands into a single 128-bit SSE operand, followed by
SSE psrldq.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/sse.md (ssse3_palignrdi): Changed to
define_insn_and_split to support SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #40 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:28:04 2019
New Revision: 271248

URL: https://gcc.gnu.org/viewcvs?rev=271248=gcc=rev
Log:
i386: Emulate MMX abs2 with SSE

Emulate MMX abs2 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/sse.md (abs2): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #38 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:26:59 2019
New Revision: 271246

URL: https://gcc.gnu.org/viewcvs?rev=271246=gcc=rev
Log:
i386: Emulate MMX ssse3_psign3 with SSE

Emulate MMX ssse3_psign3 with SSE.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_psign3): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #37 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:26:19 2019
New Revision: 271245

URL: https://gcc.gnu.org/viewcvs?rev=271245=gcc=rev
Log:
i386: Emulate MMX pshufb with SSE version

Emulate MMX version of pshufb with SSE version by masking out the bit 3
of the shuffle control byte.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/sse.md (ssse3_pshufbv8qi3): Changed to
define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #36 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:24:44 2019
New Revision: 271244

URL: https://gcc.gnu.org/viewcvs?rev=271244=gcc=rev
Log:
i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE

Emulate MMX ssse3_pmulhrswv4hi3 with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/sse.md (ssse3_pmulhrswv4hi3): Require TARGET_MMX
or TARGET_MMX_WITH_SSE.
(*ssse3_pmulhrswv4hi3): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #35 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:23:49 2019
New Revision: 271243

URL: https://gcc.gnu.org/viewcvs?rev=271243=gcc=rev
Log:
i386: Emulate MMX ssse3_pmaddubsw with SSE

Emulate MMX ssse3_pmaddubsw with SSE.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #34 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:23:11 2019
New Revision: 271242

URL: https://gcc.gnu.org/viewcvs?rev=271242=gcc=rev
Log:
i386: Emulate MMX ssse3_phdv2si3 with SSE

Emulate MMX ssse3_phdv2si3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_phdv2si3):
Changed to define_insn_and_split to support SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #33 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:22:39 2019
New Revision: 271241

URL: https://gcc.gnu.org/viewcvs?rev=271241=gcc=rev
Log:
i386: Emulate MMX ssse3_phwv4hi3 with SSE

Emulate MMX ssse3_phwv4hi3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_phwv4hi3):
Changed to define_insn_and_split to support SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #31 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:21:39 2019
New Revision: 271239

URL: https://gcc.gnu.org/viewcvs?rev=271239=gcc=rev
Log:
i386: Emulate MMX umulv1siv1di3 with SSE2

Emulate MMX umulv1siv1di3 with SSE2.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation
support.
(*sse2_umulv1siv1di3): Add SSE2 emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #32 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:22:08 2019
New Revision: 271240

URL: https://gcc.gnu.org/viewcvs?rev=271240=gcc=rev
Log:
i386: Make _mm_empty () as NOP without MMX

With SSE emulation of MMX intrinsics, we should make _mm_empty () as NOP
without MMX.

PR target/89021
* config/i386/mmx.md (mmx_): Renamed to ...
(*mmx_): This.
(mmx_): New expander.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #30 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:21:04 2019
New Revision: 271238

URL: https://gcc.gnu.org/viewcvs?rev=271238=gcc=rev
Log:
i386: Emulate MMX movntq with SSE2 movntidi

Emulate MMX movntq with SSE2 movntidi.  Only register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (sse_movntq): Add SSE2 emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #29 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:20:28 2019
New Revision: 271237

URL: https://gcc.gnu.org/viewcvs?rev=271237=gcc=rev
Log:
i386: Emulate MMX mmx_psadbw with SSE

Emulate MMX mmx_psadbw with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_psadbw): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #28 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:19:55 2019
New Revision: 271236

URL: https://gcc.gnu.org/viewcvs?rev=271236=gcc=rev
Log:
i386: Emulate MMX mmx_uavgv4hi3 with SSE

Emulate MMX mmx_uavgv4hi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_uavgv4hi3): Also check TARGET_MMX and
TARGET_MMX_WITH_SSE.
(*mmx_uavgv4hi3): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #27 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:19:19 2019
New Revision: 271235

URL: https://gcc.gnu.org/viewcvs?rev=271235=gcc=rev
Log:
i386: Emulate MMX mmx_uavgv8qi3 with SSE

Emulate MMX mmx_uavgv8qi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_uavgv8qi3): Also check TARGET_MMX
and TARGET_MMX_WITH_SSE.
(*mmx_uavgv8qi3): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #26 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:18:41 2019
New Revision: 271234

URL: https://gcc.gnu.org/viewcvs?rev=271234=gcc=rev
Log:
i386: Emulate MMX maskmovq with SSE2 maskmovdqu

Emulate MMX maskmovq with SSE2 maskmovdqu for TARGET_MMX_WITH_SSE by
zero-extending source and mask operands to 128 bits.  Handle unmapped
bits 64:127 at memory address by adjusting source and mask operands
together with memory address.

PR target/89021
* config/i386/xmmintrin.h: Emulate MMX maskmovq with SSE2
maskmovdqu for __MMX_WITH_SSE__.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/xmmintrin.h

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #25 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:17:25 2019
New Revision: 271233

URL: https://gcc.gnu.org/viewcvs?rev=271233=gcc=rev
Log:
i386: Emulate MMX mmx_umulv4hi3_highpart with SSE

Emulate MMX mmx_umulv4hi3_highpart with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_umulv4hi3_highpart): Also check
TARGET_MMX and TARGET_MMX_WITH_SSE.
(*mmx_umulv4hi3_highpart): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #24 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:16:27 2019
New Revision: 271232

URL: https://gcc.gnu.org/viewcvs?rev=271232=gcc=rev
Log:
i386: Emulate MMX mmx_pmovmskb with SSE

Emulate MMX mmx_pmovmskb with SSE by zero-extending result of SSE pmovmskb
from QImode to SImode.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_pmovmskb): Changed to
define_insn_and_split to support SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #23 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:15:44 2019
New Revision: 271231

URL: https://gcc.gnu.org/viewcvs?rev=271231=gcc=rev
Log:
i386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE

Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_v4hi3): Also check TARGET_MMX
and TARGET_MMX_WITH_SSE.
(mmx_v8qi3): Likewise.
(smaxmin:v4hi3): New.
(umaxmin:v8qi3): Likewise.
(smaxmin:*mmx_v4hi3): Add SSE emulation.
(umaxmin:*mmx_v8qi3): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #22 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:14:03 2019
New Revision: 271230

URL: https://gcc.gnu.org/viewcvs?rev=271230=gcc=rev
Log:
i386: Emulate MMX mmx_pinsrw with SSE

Emulate MMX mmx_pinsrw with SSE.  Only SSE register destination operand
is allowed.

PR target/89021
* config/i386/mmx.md (mmx_pinsrw): Also check TARGET_MMX and
TARGET_MMX_WITH_SSE.
(*mmx_pinsrw): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #21 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:13:31 2019
New Revision: 271229

URL: https://gcc.gnu.org/viewcvs?rev=271229=gcc=rev
Log:
i386: Emulate MMX mmx_pextrw with SSE

Emulate MMX mmx_pextrw with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_pextrw): Add SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #20 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:12:47 2019
New Revision: 271228

URL: https://gcc.gnu.org/viewcvs?rev=271228=gcc=rev
Log:
i386: Emulate MMX sse_cvtpi2ps with SSE

Emulate MMX sse_cvtpi2ps with SSE2 cvtdq2ps, preserving upper 64 bits of
destination XMM register.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/sse.md (sse_cvtpi2ps): Changed to
define_insn_and_split.  Also allow TARGET_MMX_WITH_SSE.  Add
SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #19 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:12:14 2019
New Revision: 271227

URL: https://gcc.gnu.org/viewcvs?rev=271227=gcc=rev
Log:
i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE

Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE.

PR target/89021
* config/i386/sse.md (sse_cvtps2pi): Add SSE emulation.
(sse_cvttps2pi): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/sse.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #18 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:11:41 2019
New Revision: 271226

URL: https://gcc.gnu.org/viewcvs?rev=271226=gcc=rev
Log:
i386: Emulate MMX pshufw with SSE

Emulate MMX pshufw with SSE.  Only SSE register source operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_pshufw): Also check TARGET_MMX and
TARGET_MMX_WITH_SSE.
(mmx_pshufw_1): Add SSE emulation.
(*vec_dupv4hi): Changed to define_insn_and_split and also allow
TARGET_MMX_WITH_SSE to support SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #17 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:11:07 2019
New Revision: 271225

URL: https://gcc.gnu.org/viewcvs?rev=271225=gcc=rev
Log:
i386: Emulate MMX vec_dupv2si with SSE

Emulate MMX vec_dupv2si with SSE.  Add the "Yw" constraint to allow
broadcast from integer register for AVX512BW with TARGET_AVX512VL.
Only SSE register source operand is allowed.

PR target/89021
* config/i386/constraints.md (Yw): New constraint.
* config/i386/mmx.md (*vec_dupv2si): Changed to
define_insn_and_split and also allow TARGET_MMX_WITH_SSE to
support SSE emulation.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/constraints.md
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #16 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:10:32 2019
New Revision: 271224

URL: https://gcc.gnu.org/viewcvs?rev=271224=gcc=rev
Log:
i386: Emulate MMX mmx_eq/mmx_gt3 with SSE

Emulate MMX mmx_eq/mmx_gt3 with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_eq3): Also allow
TARGET_MMX_WITH_SSE.
(*mmx_eq3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
support.
(mmx_gt3): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #15 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:09:50 2019
New Revision: 271223

URL: https://gcc.gnu.org/viewcvs?rev=271223=gcc=rev
Log:
i386: Emulate MMX mmx_andnot3 with SSE

Emulate MMX mmx_andnot3 with SSE.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/mmx.md (mmx_andnot3): Also allow
TARGET_MMX_WITH_SSE.  Add SSE support.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #14 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:09:19 2019
New Revision: 271222

URL: https://gcc.gnu.org/viewcvs?rev=271222=gcc=rev
Log:
i386: Emulate MMX 3 with SSE

Emulate MMX 3 with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (any_logic:mmx_3): Also allow
TARGET_MMX_WITH_SSE.
(any_logic:3): New.
(any_logic:*mmx_3): Also allow TARGET_MMX_WITH_SSE.
Add SSE support.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #13 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:08:38 2019
New Revision: 271221

URL: https://gcc.gnu.org/viewcvs?rev=271221=gcc=rev
Log:
i386: Emulate MMX ashr3/3 with SSE

Emulate MMX ashr3/3 with SSE.  Only SSE register
source operand is allowed.

PR target/89021
* config/i386/mmx.md (mmx_ashr3): Also allow
TARGET_MMX_WITH_SSE.  Add SSE emulation.
(mmx_3): Likewise.
(ashr3): New.
(3): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #12 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:08:04 2019
New Revision: 271220

URL: https://gcc.gnu.org/viewcvs?rev=271220=gcc=rev
Log:
i386: Emulate MMX mmx_pmaddwd with SSE

Emulate MMX pmaddwd with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.
(*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE.  Add SSE support.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #11 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:07:04 2019
New Revision: 271219

URL: https://gcc.gnu.org/viewcvs?rev=271219=gcc=rev
Log:
i386: Emulate MMX smulv4hi3_highpart with SSE

Emulate MMX mulv4hi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_smulv4hi3_highpart): Also allow
TARGET_MMX_WITH_SSE.
(*mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. Add
SSE support.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #10 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:06:28 2019
New Revision: 271218

URL: https://gcc.gnu.org/viewcvs?rev=271218=gcc=rev
Log:
i386: Emulate MMX mulv4hi3 with SSE

Emulate MMX mulv4hi3 with SSE.  Only SSE register source operand is
allowed.

PR target/89021
* config/i386/mmx.md (mmx_mulv4hi3): Also allow
TARGET_MMX_WITH_SSE.
(mulv4hi3): New.
(*mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE.  Add SSE
support.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #9 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:05:48 2019
New Revision: 271217

URL: https://gcc.gnu.org/viewcvs?rev=271217=gcc=rev
Log:
i386: Emulate MMX plusminus/sat_plusminus with SSE

Emulate MMX plusminus/sat_plusminus with SSE.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/mmx.md (MMXMODEI8): Require TARGET_SSE2 for V1DI.
(plusminus:mmx_3): Check
TARGET_MMX_WITH_SSE.
(sat_plusminus:mmx_3): Likewise.
(3): New.
(*mmx_3): Add SSE emulation.
(*mmx_3): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #8 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:05:07 2019
New Revision: 271216

URL: https://gcc.gnu.org/viewcvs?rev=271216=gcc=rev
Log:
i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX

Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX.  For MMX punpckhXX,
move bits 64:127 to bits 0:63 in SSE register.  Only SSE register source
operand is allowed.

PR target/89021
* config/i386/i386-expand.c (ix86_split_mmx_punpck): New function.
* config/i386/i386-protos.h (ix86_split_mmx_punpck): New
prototype.
* config/i386/mmx.m (mmx_punpckhbw): Changed to
define_insn_and_split to support SSE emulation.
(mmx_punpcklbw): Likewise.
(mmx_punpckhwd): Likewise.
(mmx_punpcklwd): Likewise.
(mmx_punpckhdq): Likewise.
(mmx_punpckldq): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/i386-expand.c
trunk/gcc/config/i386/i386-protos.h
trunk/gcc/config/i386/mmx.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #7 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:04:08 2019
New Revision: 271215

URL: https://gcc.gnu.org/viewcvs?rev=271215=gcc=rev
Log:
i386: Emulate MMX packsswb/packssdw/packuswb with SSE2

Emulate MMX packsswb/packssdw/packuswb with SSE packsswb/packssdw/packuswb
plus moving bits 64:95 to bits 32:63 in SSE register.  Only SSE register
source operand is allowed.

PR target/89021
* config/i386/i386-expand.c (ix86_move_vector_high_sse_to_mmx):
New function.
(ix86_split_mmx_pack): Likewise.
* config/i386/i386-protos.h (ix86_move_vector_high_sse_to_mmx):
New prototype.
(ix86_split_mmx_pack): Likewise.
* config/i386/i386.md (mmx_isa): New.
(enabled): Also check mmx_isa.
* config/i386/mmx.md (any_s_truncate): New code iterator.
(s_trunsuffix): New code attr.
(mmx_packsswb): Removed.
(mmx_packssdw): Likewise.
(mmx_packuswb): Likewise.
(mmx_packswb): New define_insn_and_split to emulate
MMX packsswb/packuswb with SSE2.
(mmx_packssdw): Likewise.
* config/i386/predicates.md (register_mmxmem_operand): New.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/i386-expand.c
trunk/gcc/config/i386/i386-protos.h
trunk/gcc/config/i386/i386.md
trunk/gcc/config/i386/mmx.md
trunk/gcc/config/i386/predicates.md

[Bug target/89021] Implement mmintrin.h in SSE

2019-05-15 Thread hjl at gcc dot gnu.org

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021

--- Comment #6 from hjl at gcc dot gnu.org  ---
Author: hjl
Date: Wed May 15 15:02:54 2019
New Revision: 271213

URL: https://gcc.gnu.org/viewcvs?rev=271213=gcc=rev
Log:
i386: Allow MMX register modes in SSE registers

In 64-bit mode, SSE2 can be used to emulate MMX instructions without
3DNOW.  We can use SSE2 to support MMX register modes.

PR target/89021
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__MMX_WITH_SSE__ for TARGET_MMX_WITH_SSE.
* config/i386/i386.c (ix86_set_reg_reg_cost): Add support for
TARGET_MMX_WITH_SSE with VALID_MMX_REG_MODE.
(ix86_vector_mode_supported_p): Likewise.
* config/i386/i386.h (TARGET_MMX_WITH_SSE): New.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/i386/i386-c.c
trunk/gcc/config/i386/i386.c
trunk/gcc/config/i386/i386.h

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