[Bug rtl-optimization/44374] Hoist same instructions in different branches
--- Comment #3 from bernds at gcc dot gnu dot org 2010-09-23 10:04 --- Subject: Bug 44374 Author: bernds Date: Thu Sep 23 10:04:33 2010 New Revision: 164552 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=164552 Log: PR rtl-optimization/44374 * basic-block.h (enum bb_flags): Add BB_MODIFIED. * df-core.c (df_set_bb_dirty): Set it. * ifcvt.c (find_memory): Remove function. (dead_or_predicable): Use can_move_insns_across. * df.h (can_move_insns_across): Declare function. * cfgcleanup.c (block_was_dirty): New static variable. (try_crossjump_bb, try_forward_edges): Test BB_MODIFIED flag rather than df_get_bb_dirty. (try_head_merge_bb): New static function. (try_optimize_cfg): Call it. Call df_analyze if block_was_dirty is set. * df-problems.c: Include target.h (df_simulate_find_uses): New static function. (MEMREF_NORMAL, MEMREF_VOLATILE): New macros. (find_memory, find_memory_store): New static functions. (can_move_insns_across): New function. * Makefile.in (df-problems.o): Update dependencies. testsuite/ PR rtl-optimization/44374 * gcc.target/arm/headmerge-1.c: New test. * gcc.target/arm/headmerge-2.c: New test. * gcc.target/i386/headmerge-1.c: New test. * gcc.target/i386/headmerge-2.c: New test. Added: trunk/gcc/config/i386/core2.md trunk/gcc/testsuite/gcc.target/arm/headmerge-1.c trunk/gcc/testsuite/gcc.target/arm/headmerge-2.c trunk/gcc/testsuite/gcc.target/i386/headmerge-1.c trunk/gcc/testsuite/gcc.target/i386/headmerge-2.c Modified: trunk/gcc/ChangeLog trunk/gcc/Makefile.in trunk/gcc/basic-block.h trunk/gcc/cfgcleanup.c trunk/gcc/df-core.c trunk/gcc/df-problems.c trunk/gcc/df.h trunk/gcc/ifcvt.c trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44374
[Bug rtl-optimization/44374] Hoist same instructions in different branches
--- Comment #4 from bernds at gcc dot gnu dot org 2010-09-23 10:08 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44374
[Bug bootstrap/45445] [4.6 regression] ARM bootstrap failure: comparison failures after stage 3
--- Comment #19 from bernds at gcc dot gnu dot org 2010-09-21 11:12 --- Can you provide a .i file for which this is reproducible with a cross compiler? Before/after -fdump-rtl-ira dumps and assembly files could also be helpful. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45445
[Bug bootstrap/45445] [4.6 regression] ARM bootstrap failure: comparison failures after stage 3
--- Comment #12 from bernds at gcc dot gnu dot org 2010-09-16 13:50 --- (In reply to comment #6) So stage1 chooses adds but stage2 and stage3 choose lsls for of the lower half of a long long. Since the behaviour of a stageN xgcc depends on both the gcc source code and the compiler used to build it, I have to suspect a source code ambiguity (e.g. evaluation order dependence) that the bootstrap compiler (gcc-4.4.4 in my case) resolves differently from post-r162417 4.6. I think it's likely there really is a miscompilation. I've not been able to get very far trying to set up a native compiler to run on qemu, so it would help if you could try to narrow it down a bit further. IIUC, stage1 and stage2 produce different output for some output files, such as expr.o. You could try to copy object files from stage1 to stage2, then rebuild the stage2 compiler with these objects, until these differences go away. In that way, you can determine which file is being miscompiled by stage1. The next step would be to find code generation differences for that file between r162417 and r162418. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45445
[Bug target/43137] redundant register move for sign extending
--- Comment #3 from bernds at gcc dot gnu dot org 2010-09-07 11:16 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43137
[Bug target/43137] redundant register move for sign extending
--- Comment #2 from bernds at gcc dot gnu dot org 2010-09-06 22:32 --- Subject: Bug 43137 Author: bernds Date: Mon Sep 6 22:32:26 2010 New Revision: 163935 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=163935 Log: PR target/43137 * config/arm/iterators.md (qhs_zextenddi_cond, qhs_sextenddi_cond): New define_mode_attrs. * config/arm/arm.md (zero_extendsidi2, arm_zero_extendsidi2, arm_exxtendsidi2, arm_extendsidi2): Delete patterns. (zero_extendmodedi2, extendmodedi2 and related splits): New. (thumb1_zero_extendhisi2): Remove code to handle LABEL_REFs. Remove pool_range attribute. (arm_zero_extendhisi2, arm_zero_extendhisi2_v6, arm_zero_extendqisi2, arm_zero_extendqisi2_v6, thumb1_zero_extendqisi2_v6): Remove pool_range and neg_pool_range attributes. * config/arm/thumb2.md (thumb2_zero_extendsidi2, thumb2_zero_extendhidi2, thumb2_zero_extendqidi2, thumb2_extendsidi2, thumb2_extendhidi2, thumb2_extendqidi2): Delete. PR target/43137 * gcc.target/arm/pr43137.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/pr43137.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.md trunk/gcc/config/arm/iterators.md trunk/gcc/config/arm/thumb2.md trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43137
[Bug testsuite/45413] gcc.target/i386/combine-mul.c fails on PIC targets
--- Comment #1 from bernds at gcc dot gnu dot org 2010-08-26 10:57 --- Ok, I could apply that, but why is it failing? What assembly output is being produced for it? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45413
[Bug middle-end/45355] [4.6 regression] FAIL: gcc.c-torture/compile/pr43164.c
--- Comment #4 from bernds at gcc dot gnu dot org 2010-08-25 14:08 --- Subject: Bug 45355 Author: bernds Date: Wed Aug 25 14:08:23 2010 New Revision: 163546 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=163546 Log: PR middle-end/45355 * combine.c (try_combine): Use reg_overlap_mentioned_p rather than dead_or_set_p when computing i0_feeds_i2_n. Modified: trunk/gcc/ChangeLog trunk/gcc/combine.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45355
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #77 from bernds at gcc dot gnu dot org 2010-08-24 13:13 --- We might also want to throttle back the change in function.c so that it's only enabled when extending from a memory location. But it still would be good to know and fix what exactly is going wrong in fwprop. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug middle-end/45355] [4.6 regression] FAIL: gcc.c-torture/compile/pr43164.c
--- Comment #2 from bernds at gcc dot gnu dot org 2010-08-21 14:44 --- Created an attachment (id=21536) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21536action=view) Potential fix Can you try this? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45355
[Bug rtl-optimization/43494] [4.4/4.5/4.6 Regression] Overlooked dependency causes wrong scheduling, wrong code
--- Comment #26 from bernds at gcc dot gnu dot org 2010-08-19 13:38 --- (In reply to comment #25) Alex Oliva posted some patches to make cselib handle autoinc stuff. No idea whether http://gcc.gnu.org/ml/gcc-patches/2010-03/msg01038.html is the latest version or if he has a newer one. Doesn't look bad, but I dislike the name change to _addr variants for functions that look up not just addresses. I think we should just fix up all the callers to pass in a mode. I'm also not sure we need a global cselib_record_autoinc flag - why not just do that always? Shouldn't we do something else when hashing PRE_MODIFY? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43494
[Bug tree-optimization/42172] inefficient bit fields assignments
--- Comment #5 from bernds at gcc dot gnu dot org 2010-08-19 17:32 --- Subject: Bug 42172 Author: bernds Date: Thu Aug 19 17:31:57 2010 New Revision: 163383 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=163383 Log: PR target/42172 * combine.c (combine_validate_cost): New arg I0. All callers changed. Take its cost into account if nonnull. (insn_a_feeds_b): New static function. (combine_instructions): Look for four-insn combinations. (can_combine_p): New args PRED2, SUCC2. All callers changed. Take them into account when computing all_adjacent and looking for other uses. (combinable_i3pat): New args I0DEST, I0_NOT_IN_SRC. All callers changed. Treat them like I1DEST and I1_NOT_IN_SRC. (try_combine): New arg I0. Handle four-insn combinations. (distribute_notes): New arg ELIM_I0. All callers changed. Treat it like ELIM_I1. Modified: trunk/gcc/ChangeLog trunk/gcc/combine.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42172
[Bug bootstrap/45350] [4.6 Regression] Failed to bootstrap on Linux/ia64
--- Comment #2 from bernds at gcc dot gnu dot org 2010-08-19 23:34 --- Subject: Bug 45350 Author: bernds Date: Thu Aug 19 23:34:07 2010 New Revision: 163389 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=163389 Log: PR bootstrap/45350 * combine.c (try_combine): Initialize i1_is_used and i2_is_used. Fix a comment. Modified: trunk/gcc/ChangeLog trunk/gcc/combine.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45350
[Bug rtl-optimization/43494] [4.4/4.5/4.6 Regression] Overlooked dependency causes wrong scheduling, wrong code
--- Comment #24 from bernds at gcc dot gnu dot org 2010-08-18 14:36 --- It should be possible to do better in cselib_subst_to_values - for POST_* we could look up the value of the inner expression, and for PRE_* we could probably construct a PLUS of some kind. That would be an enhancement, but it's unrelated to the bug. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43494
[Bug bootstrap/44470] [4.6 Regression] Failed to bootstrap with - -with-arch=atom
--- Comment #24 from bernds at gcc dot gnu dot org 2010-08-17 09:47 --- I think that's beginning to look reasonable. So the problem was that without alternative 2, such an add would match alternative 3 instead and be split? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44470
[Bug rtl-optimization/43494] [4.4/4.5/4.6 Regression] Overlooked dependency causes wrong scheduling, wrong code
--- Comment #22 from bernds at gcc dot gnu dot org 2010-08-17 13:14 --- (In reply to comment #19) x_addr is a VALUE that has no locs: That happens because it's an autoincrement, and cselib_subst_to_values just creates an empty value. It seems to me that we simply need to add a VALUE case to rtx_varies_p. Can you test that? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43494
[Bug bootstrap/44470] [4.6 Regression] Failed to bootstrap with - -with-arch=atom
--- Comment #18 from bernds at gcc dot gnu dot org 2010-08-16 23:49 --- I'm seeing some strange situations where this code is unnecessarily producing lea insns even when not tuning for Atom. This code looks very strange. I don't understand why we aren't splitting to a lea pattern anymore if we want to produce a lea insn. Also, isn't the test for TARGET_OPT_AGU reversed? -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED | http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44470
[Bug bootstrap/44470] [4.6 Regression] Failed to bootstrap with - -with-arch=atom
--- Comment #19 from bernds at gcc dot gnu dot org 2010-08-16 23:51 --- Created an attachment (id=21497) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21497action=view) A patch which should produce more add insns In other words, don't we at least need this patch to avoid generating unnecessary leas? But still, alternative 2 of addsi_1 looks extremely ugly, and I think the code before revision 160557 made more sense. What exactly was wrong with it? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44470
[Bug bootstrap/44470] [4.6 Regression] Failed to bootstrap with - -with-arch=atom
--- Comment #22 from bernds at gcc dot gnu dot org 2010-08-17 00:16 --- I was looking at Spec2k/254.gap/integer.s which has many examples, all of the form. - leal(%ecx,%eax), %eax + addl%ecx, %eax -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44470
[Bug tree-optimization/45256] New: Missed arithmetic simplification at tree level
I'll attach a testcase, which shows a missed simplification at tree level: D.2276_42 = i_53 + 1; D.2277_43 = D.2276_42 * 32; iftmp.3_55 = __fswab32 (xb_54); __asm__(clz %0, %1 : =r ret_56 : r iftmp.3_55 : cc); ret_58 = 32 - ret_56; ret_59 = D.2277_43 - ret_58; In effect, the constant 32 is both added and subtracted from the result. With a four-insn combiner, this is caught at the RTL stage (compiling for Thumb-1): - add r2, r2, #1 lsl r2, r2, #5 - add r3, r3, r2 - sub r3, r3, #32 + add r3, r2, r3 -- Summary: Missed arithmetic simplification at tree level Product: gcc Version: 4.6.0 Status: UNCONFIRMED Severity: enhancement Priority: P3 Component: tree-optimization AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: bernds at gcc dot gnu dot org GCC build triplet: i686-pc-linux-gnu GCC host triplet: i686-pc-linux-gnu GCC target triplet: arm-none-linux-gnueabi http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45256
[Bug tree-optimization/45256] Missed arithmetic simplification at tree level
--- Comment #1 from bernds at gcc dot gnu dot org 2010-08-11 15:19 --- Created an attachment (id=21454) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21454action=view) Testcase -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45256
[Bug middle-end/45182] [4.6 regression] Failed to build SPEC CPU 2000/2006
--- Comment #8 from bernds at gcc dot gnu dot org 2010-08-10 12:48 --- Subject: Bug 45182 Author: bernds Date: Tue Aug 10 12:48:16 2010 New Revision: 163057 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=163057 Log: PR middle-end/45182 * combine.c (make_compound_operation): Don't try to convert shifts into multiplications for modes that aren't SCALAR_INT_MODE_P. PR middle-end/45182 * gcc.c-torture/compile/pr45182.c: New test. Added: trunk/gcc/testsuite/gcc.c-torture/compile/pr45182.c Modified: trunk/gcc/ChangeLog trunk/gcc/combine.c trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45182
[Bug middle-end/45182] [4.6 regression] Failed to build SPEC CPU 2000/2006
--- Comment #9 from bernds at gcc dot gnu dot org 2010-08-10 12:53 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45182
[Bug bootstrap/45177] [4.6 regression] cc1 runs out of memory building libgcc in ARM cross-compiler
--- Comment #6 from bernds at gcc dot gnu dot org 2010-08-10 18:45 --- Subject: Bug 45177 Author: bernds Date: Tue Aug 10 18:45:10 2010 New Revision: 163077 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=163077 Log: PR bootstrap/45177 * config/arm/arm.c (multiple_operation_profitable_p): Move xscale test here from arm_gen_load_multiple_1. (arm_gen_load_multiple_1, arm_gen_store_multiple_1): Use multiple_operation_profitable_p. Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45177
[Bug bootstrap/45177] [4.6 regression] cc1 runs out of memory building libgcc in ARM cross-compiler
--- Comment #8 from bernds at gcc dot gnu dot org 2010-08-10 22:31 --- Yes. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|WAITING |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45177
[Bug tree-optimization/42172] inefficient bit fields assignments
--- Comment #4 from bernds at gcc dot gnu dot org 2010-08-09 15:04 --- I'm reopening this as it's not fixed, and even if we fix it in the RTL optimizers, it should stay open as a reminder that we produce poor initial RTL. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|RESOLVED|UNCONFIRMED Component|target |tree-optimization Resolution|DUPLICATE | http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42172
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #69 from bernds at gcc dot gnu dot org 2010-08-06 09:29 --- (In reply to comment #68) Also, since fwprop can lengthen lifetimes arbitrarily (though this wouldn't happen often) propagate_rtx actually forbids copy propagation of hard registers: if (REG_P (new_rtx) REGNO (new_rtx) FIRST_PSEUDO_REGISTER) return NULL_RTX; Clearly that isn't working. Maybe it's because we have (zero_extend (hardreg))? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug tree-optimization/45214] New: Poor initial RTL for bitfield operations
The attached testcase, from gcc's own gimplify.c, is optimized poorly at the tree stage. Initial RTL has ;; t_1-gsbase.plf = D.2014_8; (insn 8 6 9 (set (reg:QI 65) (mem/s:QI (plus:SI (reg/v/f:SI 58 [ t ]) (const_int 1 [0x1])) [0+1 S1 A8])) gimplify.i:48 -1 (nil)) (insn 9 8 10 (parallel [ (set (reg:QI 64) (lshiftrt:QI (reg:QI 65) (const_int 3 [0x3]))) (clobber (reg:CC 17 flags)) ]) gimplify.i:48 -1 (expr_list:REG_EQUAL (lshiftrt:QI (mem/s:QI (plus:SI (reg/v/f:SI 58 [ t ]) (const_int 1 [0x1])) [0+1 S1 A8]) (const_int 3 [0x3])) (nil))) (insn 10 9 11 (parallel [ (set (reg:QI 66) (and:QI (reg:QI 64) (const_int 3 [0x3]))) (clobber (reg:CC 17 flags)) ]) gimplify.i:48 -1 (nil)) (insn 11 10 13 (parallel [ (set (reg:QI 67) (ior:QI (reg:QI 66) (const_int 1 [0x1]))) (clobber (reg:CC 17 flags)) ]) gimplify.i:48 -1 (nil)) (insn 13 11 14 (parallel [ (set (reg:QI 69) (and:QI (reg:QI 67) (const_int 3 [0x3]))) (clobber (reg:CC 17 flags)) ]) gimplify.i:48 -1 (nil)) (insn 14 13 15 (parallel [ (set (reg:QI 70) (ashift:QI (reg:QI 69) (const_int 3 [0x3]))) (clobber (reg:CC 17 flags)) ]) gimplify.i:48 -1 (nil)) (insn 15 14 16 (set (reg:QI 71) (mem/s/j:QI (plus:SI (reg/v/f:SI 58 [ t ]) (const_int 1 [0x1])) [0+1 S1 A8])) gimplify.i:48 -1 (nil)) (insn 16 15 17 (parallel [ (set (reg:QI 72) (and:QI (reg:QI 71) (const_int -25 [0xffe7]))) (clobber (reg:CC 17 flags)) ]) gimplify.i:48 -1 (nil)) (insn 17 16 18 (parallel [ (set (reg:QI 73) (ior:QI (reg:QI 72) (reg:QI 70))) (clobber (reg:CC 17 flags)) ]) gimplify.i:48 -1 (nil)) (insn 18 17 0 (set (mem/s/j:QI (plus:SI (reg/v/f:SI 58 [ t ]) (const_int 1 [0x1])) [0+1 S1 A8]) (reg:QI 73)) gimplify.i:48 -1 (nil)) This is not optimized by anything unless the combiner is extended to handle four insns. This PR should stay open even if the combiner is improved, until the tree optimizers handle this better. -- Summary: Poor initial RTL for bitfield operations Product: gcc Version: 4.6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: bernds at gcc dot gnu dot org GCC build triplet: i686-pc-linux-gnu GCC host triplet: i686-pc-linux-gnu GCC target triplet: i686-pc-linux-gnu http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45214
[Bug tree-optimization/45214] Poor initial RTL for bitfield operations
--- Comment #1 from bernds at gcc dot gnu dot org 2010-08-06 21:21 --- Created an attachment (id=21427) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21427action=view) A testcase which shows the problem. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45214
[Bug tree-optimization/45215] New: Tree-optimization misses a trick with bit tests
The following testcase
int x (int t)
{
if (t 256)
return -26;
return 0;
}
can be implemented as a sequence of two shifts and one and operation:
movl4(%esp), %eax
sall$23, %eax
sarl$31, %eax
andl$-26, %eax
ret
Initial RTL generation produces a more complicated sequence which is not
optimized unless the combiner is extended to handle four insns. The tree
optimizers could be enhanced to handle this pattern and related ones, although
it would have to take costs into account, as on some targets other sequences
may be better.
--
Summary: Tree-optimization misses a trick with bit tests
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: tree-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: bernds at gcc dot gnu dot org
GCC build triplet: i686-pc-linux-gnu
GCC host triplet: i686-pc-linux-gnu
GCC target triplet: i686-pc-linux-gnu
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45215
[Bug tree-optimization/45216] New: Rotate expressions not recognized at tree level
We have RROTATE_EXPR and LROTATE_EXPR, but the patterns are not reliably
detected at the tree level. I'm attaching a testcase reduced from the Linux
kernel, which has at least one sequence that can be rewritten using a rolw
instruction:
movzwl %cx, %edx
movzwl %ax, %eax
shrw$8, %cx
movl%edx, -44(%ebp)
sall$8, %edx
movw%cx, -50(%ebp)
orw %dx, -50(%ebp)
Other opportunities exist. At the most basic level, a function like
unsigned short rol8 (unsigned short word, unsigned int shift)
{
return (word 8) | (word 8);
}
should be transformed at the tree level by recognizing the rotate.
--
Summary: Rotate expressions not recognized at tree level
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: tree-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: bernds at gcc dot gnu dot org
GCC build triplet: i686-pc-linux-gnu
GCC host triplet: i686-pc-linux-gnu
GCC target triplet: i686-pc-linux-gnu
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45216
[Bug tree-optimization/45216] Rotate expressions not recognized at tree level
--- Comment #1 from bernds at gcc dot gnu dot org 2010-08-06 22:19 --- Created an attachment (id=21428) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21428action=view) A testcase which shows the problem. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45216
[Bug tree-optimization/45217] New: Tree optimizations do not recognize partial stores
unsigned int bplpt;
void BPLPTH (unsigned short x)
{
bplpt = (bplpt 0x) | (x 16);
}
void BPLPTL (unsigned short x)
{
bplpt = (bplpt 0x) | x;
}
Here, nothing at the tree level recognizes that these functions implement
16-bit stores into a larger object. This is handled by the combiner, but in
its current state it fails to optimize BPLPTL as there are too many insns to
look at.
This bug should stay open until there is a tree-level solution that does not
rely on the RTL combiner.
--
Summary: Tree optimizations do not recognize partial stores
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: enhancement
Priority: P3
Component: tree-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: bernds at gcc dot gnu dot org
GCC build triplet: i686-pc-linux-gnu
GCC host triplet: i686-pc-linux-gnu
GCC target triplet: i686-pc-linux-gnu
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45217
[Bug tree-optimization/45218] New: Mathematical simplification missed at tree-level
Consider
a = (x / 39) * 32 + (x % 39)
If we have no instruction to produce both the quotient and the remaineder, this
can be computed as
y = x / 39
z = x - y * 39
a = y * 32 + z
The last line can be simplified by substituting:
a = y * 32 + x - y * 39
a = y * (32 - 39) + x
a = x - y * 7
Testcase:
int i_size;
extern void foo (void);
int udf_check_anchor_block(int block)
{
i_size = ( ( ( (block) / 39 ) 5 ) + ( block % 39 ));
return 1;
}
The tree optimization phase misses this, and this PR should stay open until
that is resolved. The combiner can handle it if it is able to look at 4
instructions.
--
Summary: Mathematical simplification missed at tree-level
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: enhancement
Priority: P3
Component: tree-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: bernds at gcc dot gnu dot org
GCC build triplet: i686-pc-linux-gnu
GCC host triplet: i686-pc-linux-gnu
GCC target triplet: i686-pc-linux-gnu
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45218
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #56 from bernds at gcc dot gnu dot org 2010-08-05 11:31 --- Created an attachment (id=21400) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21400action=view) A patch to aid debugging This patch should help pinpoint exactly what went wrong. It adds a dbg-cnt to the code in question. If you could experiment with passing -fdbg-cnt=bug:N to the compiler, where N is an integer value, using a binary search you should arrive relatively quickly at a value of N where the generated code is OK for N but fails for N + 1. Then, could you attach good/bad assembly files and debug dumps? Just the .expand, .combine and .ira dumps initially would be helpful if we want to save disk space here. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #66 from bernds at gcc dot gnu dot org 2010-08-05 19:56 --- (In reply to comment #57) Failure occurs for N = 0. N = 1 compiles successfully. Attached files. Argh. I seem to have swapped the logic of the dbg_cnt test. Still, this result appears useful. I think initial RTL generation is fine, so it looks like my change has exposed a latent bug. What seems to happen is that some pass between expand and combine lengthens the lifetime of register %r25, which holds an incoming argument, so that it now crosses another call, which clobbers it. This seems to happen in fwprop1, Cc Paolo. I can't find any code in that pass which tries to handle the situation. -- bernds at gcc dot gnu dot org changed: What|Removed |Added CC||bonzini at gnu dot org AssignedTo|bernds at gcc dot gnu dot |bonzini at gnu dot org |org | Status|ASSIGNED|UNCONFIRMED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug rtl-optimization/45162] [4.6 regression] ARM bootstrap comparison failures after stage 3
--- Comment #7 from bernds at gcc dot gnu dot org 2010-08-04 12:47 --- Created an attachment (id=21394) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21394action=view) A patch that should fix it DEBUG_INSNs got me again. Actually the old byte dce was disabled and thus not converted to handling them. Try this patch. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45162
[Bug rtl-optimization/45162] [4.6 regression] ARM bootstrap comparison failures after stage 3
--- Comment #8 from bernds at gcc dot gnu dot org 2010-08-04 15:16 --- *** Bug 45150 has been marked as a duplicate of this bug. *** -- bernds at gcc dot gnu dot org changed: What|Removed |Added CC||iains at gcc dot gnu dot org http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45162
[Bug middle-end/45150] [4.6 Regression] bootstrap debug-compare fail
--- Comment #5 from bernds at gcc dot gnu dot org 2010-08-04 15:16 --- *** This bug has been marked as a duplicate of 45162 *** -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||DUPLICATE http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45150
[Bug rtl-optimization/45162] [4.6 regression] ARM bootstrap comparison failures after stage 3
--- Comment #11 from bernds at gcc dot gnu dot org 2010-08-04 21:07 --- Subject: Bug 45162 Author: bernds Date: Wed Aug 4 21:07:05 2010 New Revision: 162881 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162881 Log: PR rtl-optimization/45162 * df-problems.c (df_word_lr_bb_local_compute): Ignore DEBUG_INSNs. * dce.c (word_dce_process_block): Likewise. Modified: trunk/gcc/ChangeLog trunk/gcc/dce.c trunk/gcc/df-problems.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45162
[Bug rtl-optimization/45162] [4.6 regression] ARM bootstrap comparison failures after stage 3
--- Comment #12 from bernds at gcc dot gnu dot org 2010-08-04 21:14 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45162
[Bug bootstrap/45177] [4.6 regression] cc1 runs out of memory building libgcc in ARM cross-compiler
--- Comment #4 from bernds at gcc dot gnu dot org 2010-08-04 21:16 --- I'm not seeing this with my ARM cross-compilers. Can you attach a .i file? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45177
[Bug target/40457] use stm and ldm to access consecutive memory words
--- Comment #12 from bernds at gcc dot gnu dot org 2010-08-02 10:07 --- Subject: Bug 40457 Author: bernds Date: Mon Aug 2 10:06:47 2010 New Revision: 162815 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162815 Log: PR target/40457 * config/arm/arm.h (arm_regs_in_sequence): Declare. * config/arm/arm-protos.h (emit_ldm_seq, emit_stm_seq, load_multiple_sequence, store_multiple_sequence): Delete declarations. (arm_gen_load_multiple, arm_gen_store_multiple): Adjust declarations. * config/arm/ldmstm.md: New file. * config/arm/arm.c (arm_regs_in_sequence): New array. (load_multiple_sequence): Now static. New args SAVED_ORDER, CHECK_REGS. All callers changed. If SAVED_ORDER is nonnull, copy the computed order into it. If CHECK_REGS is false, don't sort REGS. Handle Thumb mode. (store_multiple_sequence): Now static. New args NOPS_TOTAL, SAVED_ORDER, REG_RTXS and CHECK_REGS. All callers changed. If SAVED_ORDER is nonnull, copy the computed order into it. If CHECK_REGS is false, don't sort REGS. Set up REG_RTXS just like REGS. Handle Thumb mode. (arm_gen_load_multiple_1): New function, broken out of arm_gen_load_multiple. (arm_gen_store_multiple_1): New function, broken out of arm_gen_store_multiple. (arm_gen_multiple_op): New function, with code from arm_gen_load_multiple and arm_gen_store_multiple moved here. (arm_gen_load_multiple, arm_gen_store_multiple): Now just wrappers around arm_gen_multiple_op. Remove argument UP, all callers changed. (gen_ldm_seq, gen_stm_seq, gen_const_stm_seq): New functions. * config/arm/predicates.md (commutative_binary_operator): New. (load_multiple_operation, store_multiple_operation): Handle more variants of these patterns with different starting offsets. Handle Thumb-1. * config/arm/arm.md: Include ldmstm.md. (ldmsi_postinc4, ldmsi_postinc4_thumb1, ldmsi_postinc3, ldmsi_postinc2, ldmsi4, ldmsi3, ldmsi2, stmsi_postinc4, stmsi_postinc4_thumb1, stmsi_postinc3, stmsi_postinc2, stmsi4, stmsi3, stmsi2 and related peepholes): Delete. * config/arm/ldmstm.md: New file. * config/arm/arm-ldmstm.ml: New file. testsuite/ PR target/40457 * gcc.target/arm/pr40457-1.c: New test. * gcc.target/arm/pr40457-2.c: New test. Added: trunk/gcc/config/arm/arm-ldmstm.ml trunk/gcc/config/arm/ldmstm.md trunk/gcc/testsuite/gcc.target/arm/pr40457-1.c trunk/gcc/testsuite/gcc.target/arm/pr40457-2.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm-protos.h trunk/gcc/config/arm/arm.c trunk/gcc/config/arm/arm.h trunk/gcc/config/arm/arm.md trunk/gcc/config/arm/predicates.md trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40457
[Bug target/45063] [4.6 Regression] ICE: Segmentation fault (cc1) compiling matmul_i1.c
--- Comment #18 from bernds at gcc dot gnu dot org 2010-08-02 20:18 --- Subject: Bug 45063 Author: bernds Date: Mon Aug 2 20:17:59 2010 New Revision: 162828 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162828 Log: PR target/45063 * caller-save.c (save_call_clobbered_regs): Remove regs from hard_regs_saved when they are set. Modified: trunk/gcc/ChangeLog trunk/gcc/caller-save.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45063
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #54 from bernds at gcc dot gnu dot org 2010-07-30 15:12 --- Yeah, that's what I did. I if (0)ed the newly added code block to produce comparisons, but I haven't found anything yet that looks wrong in the dumps (and I can't read PA assembly very well). So it would be useful to pinpoint the problem further. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug rtl-optimization/42575] arm-eabi-gcc 64-bit multiply weirdness
--- Comment #6 from bernds at gcc dot gnu dot org 2010-07-29 12:40 --- Subject: Bug 42575 Author: bernds Date: Thu Jul 29 12:39:57 2010 New Revision: 162678 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162678 Log: PR rtl-optimization/42575 * dce.c (word_dce_process_block): Renamed from byte_dce_process_block. Argument AU removed. All callers changed. Ignore artificial refs. Use return value of df_word_lr_simulate_defs to decide whether an insn is necessary. (fast_dce): Rename arg to WORD_LEVEL. (run_word_dce): Renamed from rest_of_handle_fast_byte_dce. No longer static. (pass_fast_rtl_byte_dce): Delete. * dce.h (run_word_dce): Declare. * df-core.c (df_print_word_regset): Renamed from df_print_byteregset. All callers changed. Simplify code to only deal with two-word regs. * df.h (DF_WORD_LR): Renamed from DF_BYTE_LR. (DF_WORD_LR_BB_INFO): Renamed from DF_BYTE_LR_BB_INFO. (DF_WORD_LR_IN): Renamed from DF_BYTE_LR_IN. (DF_WORD_LR_OUT): Renamed from DF_BYTE_LR_OUT. (struct df_word_lr_bb_info): Renamed from df_byte_lr_bb_info. (df_word_lr_mark_ref): Declare. (df_word_lr_add_problem, df_word_lr_mark_ref, df_word_lr_simulate_defs, df_word_lr_simulate_uses): Declare or rename from byte variants. (df_byte_lr_simulate_artificial_refs_at_top, df_byte_lr_simulate_artificial_refs_at_end, df_byte_lr_get_regno_start, df_byte_lr_get_regno_len, df_compute_accessed_bytes): Delete declarations. (df_word_lr_get_bb_info): Rename from df_byte_lr_get_bb_info. (enum df_mm): Delete. * df-byte-scan.c: Delete file. * df-problems.c (df_word_lr_problem_data): Renamed from df_byte_lr_problem_data, all members deleted except for WORD_LR_BITMAPS, which is renamed from BYTE_LR_BITMAPS. Uses changed. (df_word_lr_expand_bitmap, df_byte_lr_simulate_artificial_refs_at_top, df_byte_lr_simulate_artificial_refs_at_end, df_byte_lr_get_regno_start, df_byte_lr_get_regno_len, df_byte_lr_check_regs, df_byte_lr_confluence_0): Delete functions. (df_word_lr_free_bb_info): Renamed from df_byte_lr_free_bb_info; all callers changed. (df_word_lr_alloc): Renamed from df_byte_lr_alloc; all callers changed. Don't initialize members that were deleted, don't try to discover data about registers. Ignore hard regs. (df_word_lr_reset): Renamed from df_byte_lr_reset; all callers changed. (df_word_lr_mark_ref): New function. (df_word_lr_bb_local_compute): Renamed from df_byte_bb_lr_local_compute; all callers changed. Use df_word_lr_mark_ref. Assert that artificial refs don't include pseudos. Ignore hard registers. (df_word_lr_local_compute): Renamed from df_byte_lr_local_compute. Assert that exit block uses don't contain pseudos. (df_word_lr_init): Renamed from df_byte_lr_init; all callers changed. (df_word_lr_confluence_n): Renamed from df_byte_lr_confluence_n; all callers changed. Ignore hard regs. (df_word_lr_transfer_function): Renamed from df_byte_lr_transfer_function; all callers changed. (df_word_lr_free): Renamed from df_byte_lr_free; all callers changed. (df_word_lr_top_dump): Renamed from df_byte_lr_top_dump; all callers changed. (df_word_lr_bottom_dump): Renamed from df_byte_lr_bottom_dump; all callers changed. (problem_WORD_LR): Renamed from problem_BYTE_LR; uses changed; confluence operator 0 set to NULL. (df_word_lr_add_problem): Renamed from df_byte_lr_add_problem; all callers changed. (df_word_lr_simulate_defs): Renamed from df_byte_lr_simulate_defs. Return bool, true if bitmap changed or insn otherwise necessary. All callers changed. Simplify using df_word_lr_mark_ref. (df_word_lr_simulate_uses): Renamed from df_byte_lr_simulate_uses; all callers changed. Simplify using df_word_lr_mark_ref. * lower-subreg.c: Include dce.h (decompose_multiword_subregs): Call run_word_dce if df available. * Makefile.in (lower-subreg.o): Adjust dependencies. (df-byte-scan.o): Delete. * timevar.def (TV_DF_WORD_LR): Renamed from TV_DF_BYTE_LR. Removed: trunk/gcc/df-byte-scan.c Modified: trunk/gcc/ChangeLog trunk/gcc/Makefile.in trunk/gcc/dce.c trunk/gcc/dce.h trunk/gcc/df-core.c trunk/gcc/df-problems.c trunk/gcc/df.h trunk/gcc/lower-subreg.c trunk/gcc/timevar.def -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42575
[Bug target/45063] [4.6 Regression] ICE: Segmentation fault (cc1) compiling matmul_i1.c
--- Comment #15 from bernds at gcc dot gnu dot org 2010-07-29 13:49 --- Created an attachment (id=21349) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21349action=view) Potential fix Could you verify that this fixes it? -- bernds at gcc dot gnu dot org changed: What|Removed |Added AssignedTo|unassigned at gcc dot gnu |bernds at gcc dot gnu dot |dot org |org Status|UNCONFIRMED |ASSIGNED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45063
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #51 from bernds at gcc dot gnu dot org 2010-07-29 19:46 --- Thanks. I can more-or-less produce the same assembly with a cross compiler, but just from looking at the assembly and the debugging dumps I can't quite figure out which function is being miscompiled. Can you produce a good (not miscompiled) .s file with a working cc1 and attach that as well for comparison? It would help massively if you could do a search similar to that for the miscompiled .o file, this time to find the miscompiled function. That can be done by replacing those functions that differ in the assembly files one by one and then compiling the modified assembly file to .o and producing a cc1 binary as previously. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug target/45063] [4.6 Regression] ICE: Segmentation fault (cc1) compiling matmul_i1.c
--- Comment #8 from bernds at gcc dot gnu dot org 2010-07-28 15:46 --- It sounds like the compiler is being miscompiled? If so, it's probably not helpful trying to debug the miscompiled compiler binary. The best way to debug this would be to produce one working build and one failing build of the compiler, then narrow down which file is being miscompiled by copying over object files from one directory to another. You may have a candidate already in the code you're looking at. Once that's identified, please attach a .i of the file that's being miscompiled, and the exact command line options to give cc1 to reproduce the miscompilation. A set of good/bad .s files might also help. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45063
[Bug target/45063] [4.6 Regression] ICE: Segmentation fault (cc1) compiling matmul_i1.c
--- Comment #14 from bernds at gcc dot gnu dot org 2010-07-28 22:14 --- That seems to be helpful - thank you. I think I can reproduce it: insn 2909 is generated during save_call_clobbered_regs, and I think I see how it relates to revision 162418. I hope to have a fix tomorrow or Friday. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45063
[Bug rtl-optimization/45051] [4.6 Regression]: gcc.c-torture/execute/builtins/abs-2.c and abs-3.c due to track subwords of DImode allocnos
--- Comment #4 from bernds at gcc dot gnu dot org 2010-07-27 09:35 --- Subject: Bug 45051 Author: bernds Date: Tue Jul 27 09:34:51 2010 New Revision: 162558 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162558 Log: PR rtl-optimization/45051 * reload1.c (delete_output_reload): Use refers_to_regno_p rather than reg_mentioned_p. Modified: trunk/gcc/ChangeLog trunk/gcc/reload1.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45051
[Bug rtl-optimization/45051] [4.6 Regression]: gcc.c-torture/execute/builtins/abs-2.c and abs-3.c due to track subwords of DImode allocnos
--- Comment #5 from bernds at gcc dot gnu dot org 2010-07-27 21:49 --- Assuming fixed and closing. Please reopen if you still have a problem. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45051
[Bug rtl-optimization/45061] [4.6 Regression] ICE: in check_allocation, at ira.c:1677 with -O2 -ftracer -fira-coalesce
--- Comment #3 from bernds at gcc dot gnu dot org 2010-07-26 11:00 --- Vlad intends to remove flag_ira_coalesce anyway, so there's probably not too much point investigating this. -- bernds at gcc dot gnu dot org changed: What|Removed |Added CC||vmakarov at redhat dot com http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45061
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #39 from bernds at gcc dot gnu dot org 2010-07-22 11:48 --- HJ, Dave, can you retest with mainline? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug rtl-optimization/44484] [4.6 regression] revision 160260 caused sparc64 testsuite failures
--- Comment #10 from bernds at gcc dot gnu dot org 2010-07-22 20:02 --- Huh, I thought I'd replied to this weeks ago - probably wasn't logged in. Reload can't determine the required structure of a memory address from a predicate name, so it ignores predicates and only looks at constraints. One way of fixing this might be to make the mem explicit in the pattern, and require a register_operand as its address. It might also work to keep the memory_operand but add a constraint that only allows single-reg addresses; if that fails as you say maybe you need to define secondary reloads for it? Can't tell for sure without seeing the code and the failure. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44484
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #45 from bernds at gcc dot gnu dot org 2010-07-22 22:54 --- (In reply to comment #44) I had a success bootstrap with revision 162414 and function.c reverted to 162239. Did the failing bootstrap include the function.c fix in r162391, or was it an earlier revision? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug middle-end/44738] c-c++-common/uninit-17.c failed
--- Comment #5 from bernds at gcc dot gnu dot org 2010-07-21 12:37 --- Subject: Bug 44738 Author: bernds Date: Wed Jul 21 12:36:44 2010 New Revision: 162372 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162372 Log: PR middle-end/44738 * tree-ssa.c (warn_uninit): Avoid emitting an unnecessary message. PR middle-end/44738 * c-c++-common/uninit-17.c: Correct expected error. Modified: trunk/gcc/ChangeLog trunk/gcc/testsuite/ChangeLog trunk/gcc/testsuite/c-c++-common/uninit-17.c trunk/gcc/tree-ssa.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44738
[Bug middle-end/44738] c-c++-common/uninit-17.c failed
--- Comment #6 from bernds at gcc dot gnu dot org 2010-07-21 12:39 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44738
[Bug middle-end/45009] [4.6 Regression]: cris-elf libgcc build failure due to New optimization for reload_combine
--- Comment #8 from bernds at gcc dot gnu dot org 2010-07-21 22:48 --- Subject: Bug 45009 Author: bernds Date: Wed Jul 21 22:48:14 2010 New Revision: 162390 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162390 Log: PR bootstrap/44970 PR middle-end/45009 * postreload.c: Include target.h. (reload_combine_closest_single_use): Don't take DEBUG_INSNs into account. (fixup_debug_insns): Don't copy the rtx. (reload_combine_recognize_const_pattern): DEBUG_INSNs can't have uses. Don't copy when replacing. Call fixup_debug_insns in the case where we merged one add with another. (reload_combine_recognize_pattern): Fail if there aren't any uses. Try harder to determine whether we're picking a valid index register. Don't set store_ruid for an insn we're going to scan in the next iteration. (reload_combine): Remove unused code. (reload_combine_note_use): When updating use information for an old insn, ignore a use that occurs after store_ruid. * Makefile.in (postreload.o): Update dependencies. Modified: trunk/gcc/ChangeLog trunk/gcc/Makefile.in trunk/gcc/postreload.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45009
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #38 from bernds at gcc dot gnu dot org 2010-07-21 22:48 --- Subject: Bug 44970 Author: bernds Date: Wed Jul 21 22:48:14 2010 New Revision: 162390 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162390 Log: PR bootstrap/44970 PR middle-end/45009 * postreload.c: Include target.h. (reload_combine_closest_single_use): Don't take DEBUG_INSNs into account. (fixup_debug_insns): Don't copy the rtx. (reload_combine_recognize_const_pattern): DEBUG_INSNs can't have uses. Don't copy when replacing. Call fixup_debug_insns in the case where we merged one add with another. (reload_combine_recognize_pattern): Fail if there aren't any uses. Try harder to determine whether we're picking a valid index register. Don't set store_ruid for an insn we're going to scan in the next iteration. (reload_combine): Remove unused code. (reload_combine_note_use): When updating use information for an old insn, ignore a use that occurs after store_ruid. * Makefile.in (postreload.o): Update dependencies. Modified: trunk/gcc/ChangeLog trunk/gcc/Makefile.in trunk/gcc/postreload.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #35 from bernds at gcc dot gnu dot org 2010-07-20 14:21 --- Created an attachment (id=21264) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21264action=view) Another attempt to fix the pa64 problem David, here's a new patch which might fix the PA problem. Please apply it to current trunk. I don't have access to a hppa64 machine unfortunately. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Attachment #21247|0 |1 is obsolete|| http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #36 from bernds at gcc dot gnu dot org 2010-07-20 15:35 --- I've committed another fix for the (not only) powerpc problem as r162342. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug middle-end/45009] [4.6 Regression]: cris-elf libgcc build failure due to fix for PR45003, PR45006
--- Comment #6 from bernds at gcc dot gnu dot org 2010-07-20 23:45 --- Looks like it's making replacements in zero insns. I expected the code to fail earlier if there aren't any uses of the reg. I'll fix this tomorrow. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45009
[Bug rtl-optimization/44973] SH: libjava failed to build with 'flow control insn inside a basic block'
--- Comment #5 from bernds at gcc dot gnu dot org 2010-07-19 11:27 --- Fixed now. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44973
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #19 from bernds at gcc dot gnu dot org 2010-07-18 18:38 --- Created an attachment (id=21242) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21242action=view) Another patch I've managed to reproduce some differences with -g vs. no-debug builds. This patch fixes them for me. I still didn't see it during bootstrap - do I need to do anything unusual (other than configure/make?) There's one fix in there that may also help with miscompilations, although I still haven't managed to reproduce any of those either. The ia64 crash HJ reported also doesn't happen here with a cross compiler. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Attachment #21239|0 |1 is obsolete|| http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #24 from bernds at gcc dot gnu dot org 2010-07-18 20:39 --- Created an attachment (id=21243) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21243action=view) Patch v4 I found another potential bug in the interaction between the existing code and the new one. Fixing this doesn't seem to cause any code generation differences in any of the testcases I looked at, but maybe it could help with some of the bootstrap failures on other targets or with Spec2k6? -- bernds at gcc dot gnu dot org changed: What|Removed |Added Attachment #21242|0 |1 is obsolete|| http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #25 from bernds at gcc dot gnu dot org 2010-07-18 20:40 --- (In reply to comment #17) And on hppa64-hp-hpux11.11 gcc-4.6 162277 in stage2: ../../../gcc/libgcc/../gcc/libgcc2.c:791:1: internal compiler error: Segmentatio n fault If the latest patch does not fix this, could you run the testsuite on the stage1 compiler (i.e. make check in stage1-gcc or prev-gcc if the former doesn't exist)? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #27 from bernds at gcc dot gnu dot org 2010-07-18 21:00 ---
(In reply to comment #26)
Subject: Re: [4.6 regression] Revision 162270 failed to bootstrap
Doing a non bootstrap build, I see the following new fail:
FAIL: gcc.c-torture/execute/950605-1.c execution, -O1
David, this seems to be caused by a different revision. The postreload pass
we're discussing here makes no changes to RTL on that testcase. Please ensure
you find the right revision that introduces a problem.
In this case, it probably was another of my changes that caused this failure,
although I can't tell what's wrong. The extend insn disappears during fwprop1:
-(insn 3 5 4 2 950605-1.c:3 (set (reg/v:DI 68 [ c+-7 ])
-(zero_extend:DI (reg:SI 26 %r26 [ c+-3 ]))) 133 {*pa.md:4633} (nil))
+(note 5 0 4 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
-(note 4 3 7 2 NOTE_INSN_FUNCTION_BEG)
+(note 4 5 7 2 NOTE_INSN_FUNCTION_BEG)
(insn 7 4 8 2 950605-1.c:4 (set (reg:SI 69)
(const_int 255 [0xff])) 71 {*pa.md:2130} (nil))
(jump_insn 8 7 9 2 950605-1.c:4 (set (pc)
-(if_then_else (eq (subreg/s/u:SI (reg/v:DI 68 [ c+-7 ]) 4)
+(if_then_else (eq (reg:SI 26 %r26 [ c+-3 ])
(reg:SI 69))
(label_ref:DI 23)
-(pc))) 46 {*pa.md:1330} (expr_list:REG_BR_PROB (const_int 9996
[0x270c])
-(nil))
+(pc))) 46 {*pa.md:1330} (expr_list:REG_DEAD (reg:SI 69)
+(expr_list:REG_DEAD (reg/v:DI 68 [ c+-7 ])
+(expr_list:REG_BR_PROB (const_int 9996 [0x270c])
+(nil
I can't find anything wrong with this, as it's a SImode comparison. Is the
backend emitting the correct compare instruction?
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #28 from bernds at gcc dot gnu dot org 2010-07-18 21:15 --- Created an attachment (id=21247) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21247action=view) Minimally tested patch for the hppa problem Seems like we're extending from the wrong mode. Does this fix it? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #3 from bernds at gcc dot gnu dot org 2010-07-17 15:53 --- x86_64 failures are expected due to a backend bug, see the patch I sent today. HJ, any chance you could run make check on the stage1 compiler on ia64 to find a testcase? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #6 from bernds at gcc dot gnu dot org 2010-07-17 16:41 --- (In reply to comment #5) x86_64 failures are expected due to a backend bug, see the patch I sent today. With the patch in http://gcc.gnu.org/ml/gcc-patches/2010-07/txt00119.txt bootstrap fails at stage 1 with: Hmm, doesn't happen here, but doesn't surprise me terribly either. As I said, I'll let the x86 maintainers fix this pattern. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug rtl-optimization/44973] SH: libjava failed to build with 'flow control insn inside a basic block'
--- Comment #1 from bernds at gcc dot gnu dot org 2010-07-17 22:22 --- Created an attachment (id=21237) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21237action=view) Potential fix Does this fix it? -- bernds at gcc dot gnu dot org changed: What|Removed |Added AssignedTo|unassigned at gcc dot gnu |bernds at gcc dot gnu dot |dot org |org Status|UNCONFIRMED |ASSIGNED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44973
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #11 from bernds at gcc dot gnu dot org 2010-07-17 22:36 --- Created an attachment (id=21238) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21238action=view) Potential fix Yeah, I think it trips over DEBUG_INSNs. I'm testing this fix, does it help in any way? -- bernds at gcc dot gnu dot org changed: What|Removed |Added AssignedTo|unassigned at gcc dot gnu |bernds at gcc dot gnu dot |dot org |org Status|UNCONFIRMED |ASSIGNED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug bootstrap/44970] [4.6 regression] Revision 162270 failed to bootstrap
--- Comment #12 from bernds at gcc dot gnu dot org 2010-07-17 23:29 --- Created an attachment (id=21239) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=21239action=view) Better patch. Here's something that's a little more likely to work. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Attachment #21238|0 |1 is obsolete|| http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44970
[Bug target/42235] redundant memory move from parameter space to spill space
--- Comment #5 from bernds at gcc dot gnu dot org 2010-07-16 23:48 --- Subject: Bug 42235 Author: bernds Date: Fri Jul 16 23:47:46 2010 New Revision: 162270 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162270 Log: PR target/42235 * postreload.c (reload_cse_move2add): Return bool, true if anything. changed. All callers changed. (move2add_use_add2_insn): Likewise. (move2add_use_add3_insn): Likewise. (reload_cse_regs): If reload_cse_move2add changed anything, rerun reload_combine. (RELOAD_COMBINE_MAX_USES): Bump to 16. (last_jump_ruid): New static variable. (struct reg_use): New members CONTAINING_MEM and RUID. (reg_state): New members ALL_OFFSETS_MATCH and REAL_STORE_RUID. (reload_combine_split_one_ruid, reload_combine_split_ruids, reload_combine_purge_insn_uses, reload_combine_closest_single_use reload_combine_purge_reg_uses_after_ruid, reload_combine_recognize_const_pattern): New static functions. (reload_combine_recognize_pattern): Verify that ALL_OFFSETS_MATCH is true for our reg and that we have available index regs. (reload_combine_note_use): New args RUID and CONTAINING_MEM. All callers changed. Use them to initialize fields in struct reg_use. (reload_combine): Initialize last_jump_ruid. Be careful when to take PREV_INSN of the scanned insn. Update REAL_STORE_RUID fields. Call reload_combine_recognize_const_pattern. (reload_combine_note_store): Update REAL_STORE_RUID field. * gcc.target/arm/pr42235.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/pr42235.c Modified: trunk/gcc/ChangeLog trunk/gcc/postreload.c trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42235
[Bug target/42235] redundant memory move from parameter space to spill space
--- Comment #4 from bernds at gcc dot gnu dot org 2010-07-16 02:09 --- Subject: Bug 42235 Author: bernds Date: Fri Jul 16 02:09:03 2010 New Revision: 162240 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=162240 Log: PR target/42235 * function.c (record_hard_reg_sets): New static function. (assign_parm_setup_reg): If an optab for extending exists and the generated code clobbbers no hard regs, emit the insn directly and create a REG_EQUIV note. Modified: trunk/gcc/ChangeLog trunk/gcc/function.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42235
[Bug target/40657] allocate local variables with fewer instructions
--- Comment #11 from bernds at gcc dot gnu dot org 2010-07-09 09:03 --- Subject: Bug 40657 Author: bernds Date: Fri Jul 9 09:03:22 2010 New Revision: 161988 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161988 Log: PR target/40657 * config/arm/arm.c (thumb1_extra_regs_pushed): New arg FOR_PROLOGUE. All callers changed. Handle the case when we're called for the epilogue. (thumb_unexpanded_epilogue): Use it. (thumb1_expand_epilogue): Likewise. testsuite/ PR target/40657 * gcc.target/arm/pr40657-1.c: New test. * gcc.target/arm/pr40657-2.c: New test. * gcc.c-torture/execute/pr40657.c: New test. Added: trunk/gcc/testsuite/gcc.c-torture/execute/pr40657.c trunk/gcc/testsuite/gcc.target/arm/pr40657-1.c trunk/gcc/testsuite/gcc.target/arm/pr40657-2.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.c trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40657
[Bug rtl-optimization/44404] auto-inc-dec generates an invalid assembly instruction
--- Comment #8 from bernds at gcc dot gnu dot org 2010-07-07 15:27 --- Subject: Bug 44404 Author: bernds Date: Wed Jul 7 15:26:48 2010 New Revision: 161920 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161920 Log: PR rtl-optimization/44404 * auto-inc-dec.c (find_inc): Avoid calling count_occurrences if possible, use reg_overlap_mentioned_p instead. Modified: trunk/gcc/ChangeLog trunk/gcc/auto-inc-dec.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44404
[Bug rtl-optimization/44787] [4.6 Regression] internal compiler error: in reload_cse_simplify_operands, at postreload.c:395
--- Comment #3 from bernds at gcc dot gnu dot org 2010-07-06 23:45 --- Subject: Bug 44787 Author: bernds Date: Tue Jul 6 23:44:55 2010 New Revision: 161893 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161893 Log: PR rtl-optimization/44787 * config/arm/arm.md (arith_shiftsi): Allow stack pointer in operand 2. * config/arm/thumb2.md (thumb2_arith_shiftsi): Likewise. testsuite/ PR rtl-optimization/44787 * gcc.c-torture/compile/pr44788.c: New test. * gcc.target/arm/pr44788.c: New test. Added: trunk/gcc/testsuite/gcc.c-torture/compile/pr44788.c trunk/gcc/testsuite/gcc.target/arm/pr44788.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.md trunk/gcc/config/arm/thumb2.md trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44787
[Bug rtl-optimization/44787] [4.6 Regression] internal compiler error: in reload_cse_simplify_operands, at postreload.c:395
--- Comment #4 from bernds at gcc dot gnu dot org 2010-07-06 23:46 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44787
[Bug rtl-optimization/42835] Missed merging common code sequence at the end of two basic blocks
--- Comment #4 from bernds at gcc dot gnu dot org 2010-07-02 16:23 --- Subject: Bug 42835 Author: bernds Date: Fri Jul 2 16:22:33 2010 New Revision: 161725 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161725 Log: PR target/42835 * config/arm/arm-modes.def (CC_NOTB): New mode. * config/arm/arm.c (get_arm_condition_code): Handle it. * config/arm/thumb2.md (thumb2_compare_scc): Delete pattern. * config/arm/arm.md (subsi3_compare0_c): New pattern. (compare_scc): Now a define_and_split. Add a number of extra splitters before it. testsuite/ PR target/42835 * gcc.target/arm/pr42835.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/pr42835.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm-modes.def trunk/gcc/config/arm/arm.c trunk/gcc/config/arm/arm.md trunk/gcc/config/arm/thumb2.md trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42835
[Bug target/42172] inefficient bit fields assignments
--- Comment #3 from bernds at gcc dot gnu dot org 2010-07-02 16:26 --- Subject: Bug 42172 Author: bernds Date: Fri Jul 2 16:25:59 2010 New Revision: 161726 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161726 Log: PR target/42172 * config/arm/arm.c (thumb1_rtx_costs): Improve support for SIGN_EXTEND and ZERO_EXTEND. (arm_rtx_costs_1): Likewise. (arm_size_rtx_costs): Use arm_rtx_costs_1 for these codes. * config/arm/arm.md (is_arch6): New attribute. (zero_extendhisi2, zero_extendqisi2, extendhisi2, extendqisi2): Tighten the code somewhat, avoiding invalid RTL to occur in the expander patterns. (thumb1_zero_extendhisi2): Merge with thumb1_zero_extendhisi2_v6. (thumb1_zero_extendhisi2_v6): Delete. (thumb1_extendhisi2): Merge with thumb1_extendhisi2_v6. (thumb1_extendhisi2_v6): Delete. (thumb1_extendqisi2): Merge with thumb1_extendhisi2_v6. (thumb1_extendqisi2_v6): Delete. (zero_extendhisi2 for register input splitter): New. (zero_extendqisi2 for register input splitter): New. (thumb1_extendhisi2 for register input splitter): New. (extendhisi2 for register input splitter): New. (extendqisi2 for register input splitter): New. (TARGET_THUMB1 extendqisi2 for memory input splitter): New. (arm_zero_extendhisi2): Allow nonimmediate_operand for operand 1, and add support for a register alternative requiring a split. (thumb1_zero_extendqisi2): Likewise. (arm_zero_extendqisi2): Likewise. (arm_extendhisi2): Likewise. (arm_extendqisi2): Likewise. testsuite/ PR target/42172 * gcc.target/arm/pr42172-1.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/pr42172-1.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.c trunk/gcc/config/arm/arm.md trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42172
[Bug bootstrap/44727] [4.6 Regression] Failed to bootstrap with --with-cpu=atom
--- Comment #9 from bernds at gcc dot gnu dot org 2010-07-01 09:20 --- Subject: Bug 44727 Author: bernds Date: Thu Jul 1 09:20:40 2010 New Revision: 161656 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161656 Log: PR target/44727 * config/i386/i386.md (peephole2 for arithmetic ops with memory): Make sure operand 0 dies. Modified: trunk/gcc/ChangeLog trunk/gcc/config/i386/i386.md -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44727
[Bug web/44775] union_match_dups failed to check NULL *ref
--- Comment #1 from bernds at gcc dot gnu dot org 2010-07-01 23:21 --- Patch looks wrong, issue seems to be with a bogus pattern. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution||INVALID http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44775
[Bug tree-optimization/39799] [4.3/4.4/4.5/4.6 Regression] missing 'may be used uninitialized' warning
--- Comment #6 from bernds at gcc dot gnu dot org 2010-06-30 14:17 --- Subject: Bug 39799 Author: bernds Date: Wed Jun 30 14:16:28 2010 New Revision: 161605 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161605 Log: PR tree-optimization/39799 * tree-inline.c (remap_ssa_name): Initialize variable only if SSA_NAME_OCCURS_IN_ABNORMAL_PHI. testsuite/ PR tree-optimization/39799 * c-c++-common/uninit-17.c: New test. Added: trunk/gcc/testsuite/c-c++-common/uninit-17.c Modified: trunk/gcc/ChangeLog trunk/gcc/testsuite/ChangeLog trunk/gcc/tree-inline.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39799
[Bug bootstrap/44727] [4.6 Regression] Failed to bootstrap with --with-cpu=atom
--- Comment #4 from bernds at gcc dot gnu dot org 2010-06-30 21:52 --- I can reproduce this. I haven't found the problem, but it seems to go away if I remove m_ATOM from X86_TUNE_OPT_AGU. Is it possible that there's a bug related to this in i386.*? -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44727
[Bug bootstrap/44727] [4.6 Regression] Failed to bootstrap with --with-cpu=atom
--- Comment #6 from bernds at gcc dot gnu dot org 2010-06-30 22:08 --- Ok, thanks for investigating. I think we may need something like this: @@ -17574,6 +17574,7 @@ (define_peephole2 || GET_MODE (operands[0]) == HImode)) || GET_MODE (operands[0]) == SImode || (TARGET_64BIT GET_MODE (operands[0]) == DImode)) +peep2_reg_dead_p (2, operands[0]) /* We reorder load and the shift. */ !reg_overlap_mentioned_p (operands[0], operands[4]) [(set (match_dup 5) (match_dup 4)) Testing now. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44727
[Bug target/43902] suboptimal MIPS widening multiply accumulate
--- Comment #14 from bernds at gcc dot gnu dot org 2010-06-29 13:44 --- Subject: Bug 43902 Author: bernds Date: Tue Jun 29 13:43:57 2010 New Revision: 161533 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161533 Log: PR target/43902 * config/arm/arm.md (maddsidi4, umaddsidi4): New expanders. (maddhisi4): Renamed from mulhisi3addsi. Operands renumbered. (maddhidi4): Likewise. testsuite/ PR target/43902 * gcc.target/arm/wmul-1.c: Test for smlabb instead of smulbb. * gcc.target/arm/wmul-3.c: New test. * gcc.target/arm/wmul-4.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/wmul-3.c trunk/gcc/testsuite/gcc.target/arm/wmul-4.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.md trunk/gcc/testsuite/ChangeLog trunk/gcc/testsuite/gcc.target/arm/wmul-1.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43902
[Bug rtl-optimization/25130] [4.1/4.2 Regression] miscompilation in GCSE
--- Comment #22 from bernds at gcc dot gnu dot org 2010-06-29 22:41 --- Closing this again. The partial revert was approved and committed as r161534. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25130
[Bug rtl-optimization/25130] [4.1/4.2 Regression] miscompilation in GCSE
--- Comment #21 from bernds at gcc dot gnu dot org 2010-06-28 17:50 --- The patch that was committed (especially the cse.c exp_equiv_p part) seems like a big hammer, and it does cause missed optimization opportunities. Reverting it on gcc-4.1-branch, and instead applying the patch for PR41033, also gives a compiler that correctly compiles this testcase. PR41033 adds a test for flag_strict_aliasing to nonverlapping_component_refs_p, which corrects the return value for canon_true_dependence mentioned in comment #9. Steven, are you certain that this patch is necessary in light of this? -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED | http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25130
[Bug target/43902] suboptimal MIPS widening multiply accumulate
--- Comment #13 from bernds at gcc dot gnu dot org 2010-06-25 08:56 --- Subject: Bug 43902 Author: bernds Date: Fri Jun 25 08:56:24 2010 New Revision: 161366 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=161366 Log: With large parts from Jim Wilson: PR target/43902 * tree-pretty-print.c (dump_generic_node, op_code_prio): Add WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR. * optabs.c (optab_for_tree_code): Likewise. (expand_widen_pattern_expr): Likewise. * tree-ssa-math-opts.c (convert_mult_to_widen): New function, broken out of execute_optimize_widening_mul. (convert_plusminus_to_widen): New function. (execute_optimize_widening_mul): Use the two new functions. * expr.c (expand_expr_real_2): Add support for GIMPLE_TERNARY_RHS. Remove code to generate widening multiply-accumulate. Add support for WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR. * gimple-pretty-print.c (dump_ternary_rhs): New function. (dump_gimple_assign): Call it when appropriate. * tree.def (WIDEN_MULT_PLUS_EXPR, WIDEN_MULT_MINUS_EXPR): New codes. * cfgexpand.c (gimple_assign_rhs_to_tree): Likewise. (expand_gimple_stmt_1): Likewise. (expand_debug_expr): Support WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR. * tree-ssa-operands.c (get_expr_operands): Likewise. * tree-inline.c (estimate_operator_cost): Likewise. * gimple.c (extract_ops_from_tree_1): Renamed from extract_ops_from_tree. Add new arg for a third operand; fill it. (gimple_build_assign_stat): Support operations with three operands. (gimple_build_assign_with_ops_stat): Likewise. (gimple_assign_set_rhs_from_tree): Likewise. (gimple_assign_set_rhs_with_ops_1): Renamed from gimple_assign_set_rhs_with_ops. Add new arg for a third operand. (get_gimple_rhs_num_ops): Support GIMPLE_TERNARY_RHS. (get_gimple_rhs_num_ops): Handle WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR. * gimple.h (enum gimple_rhs_class): Add GIMPLE_TERNARY_RHS. (extract_ops_from_tree_1): Adjust declaration. (gimple_assign_set_rhs_with_ops_1): Likewise. (gimple_build_assign_with_ops): Pass NULL for last operand. (gimple_build_assign_with_ops3): New macro. (gimple_assign_rhs3, gimple_assign_rhs3_ptr, gimple_assign_set_rhs3, gimple_assign_set_rhs_with_ops, extract_ops_from_tree): New inline functions. * tree-cfg.c (verify_gimple_assign_ternary): New static function. (verify_gimple_assign): Call it. * doc/gimple.texi (Manipulating operands): Document GIMPLE_TERNARY_RHS. (Tuple specific accessors, subsection GIMPLE_ASSIGN): Document new functions for dealing with three-operand statements. * tree.c (commutative_ternary_tree_code): New function. * tree.h (commutative_ternary_tree_code): Declare it. * tree-vrp.c (gimple_assign_nonnegative_warnv_p): Return false for ternary statements. (gimple_assign_nonzero_warnv_p): Likewise. * tree-ssa-sccvn.c (stmt_has_constants): Handle GIMPLE_TERNARY_RHS. * tree-ssa-ccp.c (get_rhs_assign_op_for_ccp): New static function. (ccp_fold): Use it. Handle GIMPLE_TERNARY_RHS. * tree-ssa-dom.c (enum expr_kind): Add EXPR_TERNARY. (struct hashtable_expr): New member ternary in the union. (initialize_hash_element): Handle GIMPLE_TERNARY_RHS. (hashable_expr_equal_p): Fix indentation. Handle EXPR_TERNARY. (iterative_hash_hashable_expr): Likewise. (print_expr_hash_elt): Handle EXPR_TERNARY. * gimple-fold.c (fold_gimple_assign): Handle GIMPLE_TERNARY_RHS. * tree-ssa-threadedge.c (fold_assignment_stmt): Remove useless break statements. Handle GIMPLE_TERNARY_RHS. testsuite/ PR target/43902 * gcc.target/mips/madd-9.c: New test. Added: trunk/gcc/testsuite/gcc.target/mips/madd-9.c Modified: trunk/gcc/ChangeLog trunk/gcc/cfgexpand.c trunk/gcc/doc/gimple.texi trunk/gcc/expr.c trunk/gcc/gimple-fold.c trunk/gcc/gimple-pretty-print.c trunk/gcc/gimple.c trunk/gcc/gimple.h trunk/gcc/optabs.c trunk/gcc/testsuite/ChangeLog trunk/gcc/tree-cfg.c trunk/gcc/tree-inline.c trunk/gcc/tree-pretty-print.c trunk/gcc/tree-ssa-ccp.c trunk/gcc/tree-ssa-dom.c trunk/gcc/tree-ssa-math-opts.c trunk/gcc/tree-ssa-operands.c trunk/gcc/tree-ssa-sccvn.c trunk/gcc/tree-ssa-threadedge.c trunk/gcc/tree-vrp.c trunk/gcc/tree.c trunk/gcc/tree.def trunk/gcc/tree.h -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43902
[Bug target/44597] [4.6 Regression] FAIL: gcc.c-torture/execute/builtin-prefetch-2.c compilation, ICE
--- Comment #3 from bernds at gcc dot gnu dot org 2010-06-21 23:59 --- At first glance, it looks like the tricks in the prefetch_cc simply aren't valid. It seems to be trying to prevent certain types of addressing modes, but reload is allowed to change them as it sees fit. If I read the code right, hppa64 always uses flag_pic and thus the reg_equiv_invariant machinery has always been disabled previously? The best solution would be to find a way to write that pattern (and others, if there are any) in a valid way; otherwise a new target macro might be able to prevent this optimization on PA (however I don't think there's a guarantee that this will work reliably). The frame-address thing appears to be PR44505. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44597
[Bug rtl-optimization/39871] [4.3/4.4/4.5/4.6 regression] Code size increase on ARM due to poor register allocation
--- Comment #25 from bernds at gcc dot gnu dot org 2010-06-17 21:52 --- Subject: Bug 39871 Author: bernds Date: Thu Jun 17 21:51:55 2010 New Revision: 160947 URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=160947 Log: PR rtl-optimization/39871 * reload1.c (init_eliminable_invariants): For flag_pic, disable equivalences only for constants that aren't LEGITIMATE_PIC_OPERAND_P. (function_invariant_p): Rule out a plus of frame or arg pointer with a SYMBOL_REF. * ira.c (find_reg_equiv_invariant_const): Likewise. Modified: trunk/gcc/ChangeLog trunk/gcc/ira.c trunk/gcc/reload1.c -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39871
[Bug rtl-optimization/39871] [4.3/4.4/4.5/4.6 regression] Code size increase on ARM due to poor register allocation
--- Comment #26 from bernds at gcc dot gnu dot org 2010-06-17 21:54 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39871
[Bug target/43902] suboptimal MIPS widening multiply accumulate
--- Comment #11 from bernds at gcc dot gnu dot org 2010-06-16 13:29 --- Yes, the check for MULT is for cases where the definition is after the use in basic-block order; I'd expect this can happen with crazy gotos and maybe in other cases as well. Could you retest the MIPS fixed-point testcases with the obvious fix? You probably have the MIPS toolchain set up already and it would probably take me more time. After that, I'm happy to approve your parts of the patch if you'll approve mine :-) so I can then check it in if you like. We could post it for review by the gimple crowd first though. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43902
[Bug rtl-optimization/44484] [4.6 regression] revision 160260 caused sparc64 testsuite failures
--- Comment #7 from bernds at gcc dot gnu dot org 2010-06-11 21:32 --- This would appear to be a bug in the sparc backend then; my patch is only exposing it. I'll not investigate further and leave this for a Sparc maintainer since I have no clue about the machine. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44484
[Bug target/42895] Low registers are preferred than register ip in thumb2 mode
--- Comment #8 from bernds at gcc dot gnu dot org 2010-06-11 22:36 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42895
[Bug target/43902] suboptimal MIPS widening multiply accumulate
--- Comment #9 from bernds at gcc dot gnu dot org 2010-06-09 20:20 --- Created an attachment (id=20880) -- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=20880action=view) A new version of Jim's patch Here's what I've done with it so far. I've changed the new tree code to be a proper gimple operation, which meant extending all sorts of gimple code to handle ternary operations. tree-ssa-math-opts runs late enough that I don't think we need to handle them in most passes, so I've turned some existing functions into wrappers that continue to present a two-operand interface. The other thing I've done is to restructure the pass a little to avoid the second loop over all the insns. I've changed the ARM backend to take advantage of it. Regression tests on ARM look fine (although I've had to change one of the testcases which didn't expect widen-macc to be generated). What do you think? Please let me know what your MIPS tests turned up. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43902
[Bug target/43902] suboptimal MIPS widening multiply accumulate
--- Comment #7 from bernds at gcc dot gnu dot org 2010-06-07 21:34 --- Jim, are you still working on this or should I pick it up? -- bernds at gcc dot gnu dot org changed: What|Removed |Added CC||bernds at gcc dot gnu dot ||org http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43902
[Bug rtl-optimization/42500] Unnecessary mov of sp to a register
--- Comment #7 from bernds at gcc dot gnu dot org 2010-06-07 22:46 --- Fixed. -- bernds at gcc dot gnu dot org changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42500
