Re: Remove obsolete Tru64 UNIX V5.1B support
On Mar 5, 2012, at 6:28 PM, Richard Henderson wrote: On 03/05/2012 09:14 AM, Rainer Orth wrote: * In the alpha backend, there are a couple of cases that might be osf-specific, but I cannot tell for certain: macro osf5.halpha.h TARGET_AS_CAN_SUBTRACT_LABELS 1 TARGET_GAS I cannot tell if !TARGET_GAS configurations exist, especially Alpha VMS. Also, in alpha.h there are some references to mips-tfile, which is gone with osf. If there are no non-gas configrations remaining, that stuff can go, too. Given that GAS supports VMS, I suspect that all targets are now GAS. I'll let the adacore folks answer that for certain however. Yes, that's my understanding too. TARGET_HAS_XFLOATING_LIBS 1 TARGET_LONG_DOUBLE_128 Same here: any configurations with !TARGET_LONG_DOUBLE_128? I wouldn't think so; glibc before version 2.4, circa 1998? OpenVMS long double is 128 bits (also I was never personally tested it). Tristan. HAVE_STAMP_H1 In my understanding, this is purely a OSF thing and can go, but maybe other OSes on alpha mimiced OSF here? I've no idea what that actually is. I'll have a look at the patch in detail later r~
Re: Remove obsolete Tru64 UNIX V5.1B support
The gnattools and gcc/ada parts are OK, except for the comment removal in s-tassta.adb: this comment is still useful, and needs to be revisited at some point ratheer than removed silently as you did, to understand why we can't use a when E: others = construct. So either remove the s-tassta.adb hunk, or extend the comment, but removing it would be wrong. Arno
Re: Remove obsolete Tru64 UNIX V5.1B support
Rainer,
On Mar 5, 2012, at 6:14 PM, Rainer Orth wrote:
The Tru64 UNIX V5.1 port has been obsoleted in GCC 4.7, and it's now
time to remove it from mainline. The following patch does just that,
and should be mostly uncontroversial, like removing target-specific
fixincludes hacks, files, and testsuite support.
Then, there are target-specific features only used by this port (like
support for #pragma extern_prefix),
[…]
* As I've mentioned, I've ripped out the #pragma extern_prefix support:
while VMS has something similar, it doesn't use the common code.
in fact VMS use some of the already existing #pragma extern_prefix support.
You're removing too much code here !
Commenting only the relevant part:
diff --git a/gcc/c-family/c-cppbuiltin.c b/gcc/c-family/c-cppbuiltin.c
--- a/gcc/c-family/c-cppbuiltin.c
+++ b/gcc/c-family/c-cppbuiltin.c
@@ -1,6 +1,6 @@
/* Define builtin-in macros for the C family front ends.
- Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
+ 2011, 2012 Free Software Foundation, Inc.
This file is part of GCC.
@@ -886,9 +886,6 @@ c_cpp_builtins (cpp_reader *pfile)
/* Show the availability of some target pragmas. */
cpp_define (pfile, __PRAGMA_REDEFINE_EXTNAME);
- if (targetm.handle_pragma_extern_prefix)
-cpp_define (pfile, __PRAGMA_EXTERN_PREFIX);
VMS doesn't reference this macro, so you could remove it.
-
/* Make the choice of the stack protector runtime visible to source code.
The macro names and values here were chosen for compatibility with an
earlier implementation, i.e. ProPolice. */
diff --git a/gcc/c-family/c-pragma.c b/gcc/c-family/c-pragma.c
--- a/gcc/c-family/c-pragma.c
+++ b/gcc/c-family/c-pragma.c
@@ -1,6 +1,6 @@
/* Handle #pragma, system V.4 style. Supports #pragma weak and #pragma pack.
Copyright (C) 1992, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
+ 2006, 2007, 2008, 2009, 2010, 2012 Free Software Foundation, Inc.
This file is part of GCC.
@@ -369,37 +369,26 @@ handle_pragma_weak (cpp_reader * ARG_UNU
}
}
-/* GCC supports two #pragma directives for renaming the external
+/* GCC supports a #pragma directive for renaming the external
symbol associated with a declaration (DECL_ASSEMBLER_NAME), for
- compatibility with the Solaris and Tru64 system headers. GCC also
+ compatibility with the Solaris system headers. GCC also
has its own notation for this, __asm__(name) annotations.
Corner cases of these features and their interaction:
- 1) Both pragmas silently apply only to declarations with external
+ 1) The pragma silently applies only to declarations with external
linkage (that is, TREE_PUBLIC || DECL_EXTERNAL). Asm labels
do not have this restriction.
- 2) In C++, both #pragmas silently apply only to extern C declarations.
+ 2) In C++, the #pragma silently applies only to extern C declarations.
Asm labels do not have this restriction.
- 3) If any of the three ways of changing DECL_ASSEMBLER_NAME is
+ 3) If any of the two ways of changing DECL_ASSEMBLER_NAME is
applied to a decl whose DECL_ASSEMBLER_NAME is already set, and the
new name is different, a warning issues and the name does not change.
4) The source name for #pragma redefine_extname is the DECL_NAME,
- *not* the DECL_ASSEMBLER_NAME.
-
- 5) If #pragma extern_prefix is in effect and a declaration occurs
- with an __asm__ name, the #pragma extern_prefix is silently
- ignored for that declaration.
-
- 6) If #pragma extern_prefix and #pragma redefine_extname apply to
- the same declaration, whichever triggered first wins, and a warning
- is issued. (We would like to have #pragma redefine_extname always
- win, but it can appear either before or after the declaration, and
- if it appears afterward, we have no way of knowing whether a modified
- DECL_ASSEMBLER_NAME is due to #pragma extern_prefix.) */
+ *not* the DECL_ASSEMBLER_NAME. */
I think the comments would still apply.
typedef struct GTY(()) pending_redefinition_d {
tree oldname;
@@ -494,30 +483,6 @@ add_to_renaming_pragma_list (tree oldnam
p-newname = newname;
}
-/* The current prefix set by #pragma extern_prefix. */
-GTY(()) tree pragma_extern_prefix;
This variable is referenced by gcc/config/vms/vms-c.c, so it shouldn't be
removed.
-
-/* #pragma extern_prefix prefix */
-static void
-handle_pragma_extern_prefix (cpp_reader * ARG_UNUSED (dummy))
-{
- tree prefix, x;
- enum cpp_ttype t;
-
- if (pragma_lex (prefix) != CPP_STRING)
-GCC_BAD (malformed #pragma extern_prefix, ignored);
- t = pragma_lex (x);
- if (t != CPP_EOF)
-warning
Re: [patch] Clean up f95-lang.c a bit
On 03/06/2012 12:30 AM, Steven Bosscher wrote: This is a long-overdue cleanup of f95-lang.c. This file was once added as an almost one-to-one copy from one of the other languages and tweaked until it worked. But the comments in the file are misleading, out-dated, or wrong for other reasons, and there are remnants of the pre tree-ssa era that never worked or were never used for gfortran. Let's throw as much of that out as we can! (There will be a follow-up patch to clean up convert.c also :-) Bootstrappedtested on x86_64-unknown-linux-gnu. OK? OK. Thanks for the cleanup! Tobias
Re: [PATCH][target/52481] m68k-*: internal compiler error: in extract_insn, at recog.c:2123
On 03/05/2012 07:44 PM, Richard Henderson wrote: --- Comment #1 from Mikael Petterssonmikpe at it dot uu.se 2012-03-04 21:01:28 UTC --- Created attachment 26827 -- http://gcc.gnu.org/bugzilla/attachment.cgi?id=26827 reduced test case in C Depends on target CPU selection. -mcpu=680[012346]0 and -mcpu=cpu32 all work, but -mcpu=5206 (or apparently any other coldfire) ICEs. Indeed. Fixed by not trying to use negqi2 directly, but going through the normal expanders which will DTRT for coldfire. Tested via cross-compile, committed to mainline and 4.7. This patch indeed helps me over the ICE from PR 52481, but now I am tripping over the next bootstrap breakdown (gcc-4_7-branch, --target=m68k-rtems4.11): /tmp/ccWpvRws.s: Assembler messages: /tmp/ccWpvRws.s:79: Error: invalid instruction for this architecture; needs 68000 [68ec000, 68hc000, 68hc001, 68008, 68302, 68306, 68307, 68322, 68356], 68010, 68020 [68k, 68ec020], 68030 [68ec030], 68040 [68ec040], 68060 [68ec060], cpu32 [68330, 68331, 68332, 68333, 68334, 68336, 68340, 68341, 68349, 68360], 51 [51ac, 51cn, 51em, 51jm, 51qe], 5407, 54418 [54410, 54415, 54416, 54417], 54455 [54450, 54451, 54452, 54453, ... -- statement `tas (%a0)' ignored /tmp/ccWpvRws.s:141: Error: invalid instruction for this architecture; needs 68000 [68ec000, 68hc000, 68hc001, 68008, 68302, 68306, 68307, 68322, 68356], 68010, 68020 [68k, 68ec020], 68030 [68ec030], 68040 [68ec040], 68060 [68ec060], cpu32 [68330, 68331, 68332, 68333, 68334, 68336, 68340, 68341, 68349, 68360], 51 [51ac, 51cn, 51em, 51jm, 51qe], 5407, 54418 [54410, 54415, 54416, 54417], 54455 [54450, 54451, 54452, 54453, ... -- statement `tas (%a0)' ignored make[9]: *** [compatibility-atomic-c++0x.lo] Error 1 * Incompatiblible/insufficient binutils (I am using binutils-2.22)? * Some as/ld-flags getting lost/improperly propagated during assembly/linking? * Bad/incompatible inline-asm hard-coded somewhere? Ralf
Re: [RFC PATCH]: Handle Pmode == SImode in stringop patterns
On Mon, Mar 5, 2012 at 11:42 PM, H.J. Lu hjl.to...@gmail.com wrote:
+ case '^':
+ if (TARGET_64BIT Pmode == SImode)
+ {
+ fputs (addr32, file);
+#ifndef HAVE_AS_IX86_REP_LOCK_PREFIX
+ if (ASSEMBLER_DIALECT == ASM_ATT)
+ fputs (addr32; , file);
+ else
+#endif
+ fputs (addr32 , file);
+ }
Why do you print addr32 twice? addr32addr32; or addr32addr32 .
Oops, please remove the first one.
It looks OK to me. I will test after I fix indirect jmp/call.
FYI, addr32 prefix can't stand alone (but addr32 rep; insn is OK),
so #ifndefed part is bogus.
Uros.
--
H.J.
Re: [patch] PR 51417
On Mon, 5 Mar 2012, Ralf Corsépius wrote: Hi, The patch below addresses an issue with gcc-4.7.0 the issue I had reported in http://gcc.gnu.org/ml/gcc/2012-03/msg00035.html and somebody else had bz'ed as http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51417 Tested by cross-building gcc-4_7-branch for several *rtems targets on Fedora 16. Further test-builds are in progress. No native build-testing, yet. OK to apply? Ok for trunk and the 4.7 branch if you've done one native build and install successfully. Thanks, Richard.
[PATCH] Fix PR52097
This is another fix I postponed for 4.8 (or 4.7.1 if it doesn't have
any fallout). We fail to honor the (unwritten) rule that type
variants ought to share their TYPE_FIELDs. Which breaks users
that compare FIELD_DECLs by pointers.
This should also save some memory at WPA/LTRANS stage.
LTO bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2012-03-06 Richard Guenther rguent...@suse.de
PR lto/52097
* lto.c (uniquify_nodes): Merge TYPE_FIELDS of variant types.
* gcc.dg/lto/pr52097_0.c: New testcase.
Index: gcc/lto/lto.c
===
--- gcc/lto/lto.c (revision 184200)
+++ gcc/lto/lto.c (working copy)
@@ -805,6 +805,41 @@ uniquify_nodes (struct data_in *data_in,
TYPE_NEXT_VARIANT (mv) = t;
if (RECORD_OR_UNION_TYPE_P (t))
TYPE_BINFO (t) = TYPE_BINFO (mv);
+ /* Preserve the invariant that type variants share their
+TYPE_FIELDS. */
+ if (RECORD_OR_UNION_TYPE_P (t)
+ TYPE_FIELDS (mv) != TYPE_FIELDS (t))
+ {
+ tree f1, f2;
+ for (f1 = TYPE_FIELDS (mv), f2 = TYPE_FIELDS (t);
+ f1 f2; f1 = TREE_CHAIN (f1), f2 = TREE_CHAIN (f2))
+ {
+ unsigned ix;
+ gcc_assert (f1 != f2
+ DECL_NAME (f1) == DECL_NAME (f2));
+ if (!streamer_tree_cache_lookup (cache, f2, ix))
+ gcc_unreachable ();
+ /* If we're going to replace an element which we'd
+still visit in the next iterations, we wouldn't
+handle it, so do it here. We do have to handle it
+even though the field_decl itself will be removed,
+as it could refer to e.g. integer_cst which we
+wouldn't reach via any other way, hence they
+(and their type) would stay uncollected. */
+ /* ??? We should rather make sure to replace all
+references to f2 with f1. That means handling
+COMPONENT_REFs and CONSTRUCTOR elements in
+lto_fixup_types and special-case the field-decl
+operand handling. */
+ /* ??? Not sure the above is all relevant in this
+path canonicalizing TYPE_FIELDS to that of the
+main variant. */
+ if (ix i)
+ lto_fixup_types (f2);
+ streamer_tree_cache_insert_at (cache, f1, ix);
+ }
+ TYPE_FIELDS (t) = TYPE_FIELDS (mv);
+ }
}
/* Finally adjust our main variant and fix it up. */
Index: gcc/testsuite/gcc.dg/lto/pr52097_0.c
===
--- gcc/testsuite/gcc.dg/lto/pr52097_0.c(revision 0)
+++ gcc/testsuite/gcc.dg/lto/pr52097_0.c(revision 0)
@@ -0,0 +1,20 @@
+/* { dg-lto-do link } */
+/* { dg-lto-options { { -O -flto -fexceptions -fnon-call-exceptions --param
allow-store-data-races=0 } } } */
+
+typedef struct { unsigned int e0 : 16; } s1;
+typedef struct { unsigned int e0 : 16; } s2;
+typedef struct { s1 i1; s2 i2; } io;
+
+static io *i;
+
+void f1 (void)
+{
+ s1 x0;
+ i-i1 = x0;
+}
+
+int main ()
+{
+ f1 ();
+ return 0;
+}
Re: [Patch,AVR,trunk,4.7] PR52461: Fix RAMPZ clobbering and RAMP* in epilogue
On Mon, Mar 5, 2012 at 6:54 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 6:15 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 4:56 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 4:25 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: All commits to the 4.7 branch need explicit release manager approval. AVR isn't primary/secondary so please do not change anything before is released 4.7.0 for it. Thanks, Richard. What is the exact procedure in that case? Wait until approve from release manager in that case? Who is the release manager, and should I CC for such changes? Or just hope the patch is not overseen. The exact procedure is to do bugfixing during stage3/4, for release blockers that pop up after a release candidate is created (like now), CC a release manager (Jakub, me, Joseph) for patches that you like to get in even though the branch is frozen. Usually only bugs that prevent basic functionality (like building a target) can be fixed at this point, for everything else you have to wait until after 4.7.0 is released and the branch opens again for regression fixes. Richard. I was not aware that the 4.7.0 branch is completely frozen for the next 3 weeks; I thought the usual rules for backporting patches do apply... No they don't. How would you expect that testing a release candidate would work if we put in any not strictly necessary changes? That would make a release candidate quite pointless. The patch changes only in libgcc/config/avr and gcc/config/avr The patch does not fix a blocker in the sense that without it avr cannot be built, but the changes are essential. Surely not so essential as that they cannot be put in place to make the 4.7.1 release then. Okay. In that case I'd like to add a note to the caveats section in wwwdocs ./gcc-4.7/changes.html that the avr-gcc 4.7.0 is not intended for public consumption and because of developer shortage at least 4.7.1 should be used. Completely unusable? It looks like it only affects a subset of all devices: To read from flash on devices with more than 64KiB of flash The patch fixes more problems than indicated by log message's PR. It sounds like a random wrong-code bug, which do happen. Yes they happen. But if the defect is so severe that the code is effectively useless, the compiler is useless. That is not a problem if it is clearly stated and people don't waste days to set up and distribute avr toolchains that are useless. It would simply be not fair to let them waste their time and to hold back that knowledge. There is just a timeframe where random fixes are not good. This is not a problem. Just inform the potential users about the defect. Was 4.6.3 intended for public consumption? Yes. So, what patch regressed state from 4.6.3 to the present completely unusable compiler? Why is it not appropriate to revert that instead? Why is the bug not marked as regression? The bug sounds as if it only applies to XMEGA+EBI (whatever that means). Can you split the patch and separate out the fix for the PR if the patch does not only fix that PR? Richard. Johann
Re: Delete dead (?) code in expand_expr_real_2
On Tue, Mar 6, 2012 at 12:51 AM, Richard Kenner ken...@vlsi1.ultra.nyu.edu wrote: I found a weird piece of code that was added by kenner in a really early revision. It checks for VAR_DECLs with frame or stack pointers as DECL_RTL, and the comment in front of it mentions strength reduction. Presumably this was for the old loop optimizer? I can't think of anything that would require this in a modern version of gcc. I think such a VAR_DECL would occur in cases of alloca. I don't understand the comment about strength reduction (despite obviously having written it!) because the old loop optimizer ran on RTL and this is talking about trees. My guess is that this isn't dead. I don't see how a VAR_DECL can ever get a DECL_RTL equal to one of the mentioned regs. The patch is ok if a gcc_unreachable () inside the if () passes bootstrap. Thanks, Richard.
Re: [PATCH, 4.4, PR 52430] IPA-CP has to clone or leave alone externally_visible nodes
Hi, On Fri, Mar 02, 2012 at 06:54:13PM +1300, Maxim Kuvyrkov wrote: On 2/03/2012, at 1:53 AM, Martin Jambor wrote: Hi, the following patch backports 4.5 behavior to 4.4 IPA-CP initialization when it decides which nodes need to be duplicated (we often say cloned, but cloning is an overloaded term in gcc) in order to modify them. In 4.5, this is decided by a new predicate called cgraph_only_called_directly_p which checks both node-needed and node-local.externally_visible, whereas 4.4 looks only at the needed flag. As described in the PR, this wrecks havoc for ipcp_update_callgraph which is the stage of the old IPA-CP when it undoes its decisions which turned out not to be safe. Bootstrapped and tested on x86_64-linux, OK for the branch? ... Index: gcc/ipa-cp.c === --- gcc/ipa-cp.c(revision 184662) +++ gcc/ipa-cp.c(working copy) @@ -508,7 +508,7 @@ ipcp_initialize_node_lattices (struct cg if (ipa_is_called_with_var_arguments (info)) type = IPA_BOTTOM; - else if (!node-needed) + else if (!node-needed !node-local.externally_visible) type = IPA_TOP; /* When cloning is allowed, we can assume that externally visible functions are not called. We will compensate this by cloning later. */ Because this is for a branch, I would be more conservative and avoid any new instances of IPA_TOP -- those that can be obtained from subsequent else-if clauses. I.e., else if (!node-needed) type = !node-local.externally_visible ? IPA_TOP : IPA_BOTTOM; That would be too conservative because it would mean we would never duplicate a node and thus never propagate constants into externally visible functions, even not at -O3 and we do want to keep doing that. I have committed my patch after it has been approved on IRC by Richi and Jakub. Thanks, Martin
[VMS]: override version in t-vmsnative
Hi, as a hack, we need to redefined the makefile variable 'version' so that the version subdir is 4_X_Y, because VMS doesn't like dots in directory names. But we need to do that only if we build for VMS, not for cross compilers. Also, remove the stamp declarations that prevented some run of fix includes (old unnecessary hacks). And add a missing CL entry. Committed on trunk. Tristan. 2012-03-06 Tristan Gingold ging...@adacore.com * config/vms/t-vmsnative (version): Define. * config/vms/t-vms (STMP_FIXPROTO, STMP_FIXINC, version): Remove. Index: gcc/config/vms/t-vms === --- gcc/config/vms/t-vms(revision 184981) +++ gcc/config/vms/t-vms(working copy) @@ -17,13 +17,8 @@ # along with GCC; see the file COPYING3. If not see # http://www.gnu.org/licenses/. -STMP_FIXPROTO = -STMP_FIXINC = LIMITS_H_TEST = false -# Under VMS, directory names cannot contain dots. -version:=$(shell echo $(BASEVER_c) | sed -e 's/\./_/g') - vms-crtlmap.h: $(srcdir)/config/vms/vms-crtlmap.map \ $(srcdir)/config/vms/make-crtlmap.awk $(AWK) -f $(srcdir)/config/vms/make-crtlmap.awk \ Index: gcc/config/vms/t-vmsnative === --- gcc/config/vms/t-vmsnative (revision 184981) +++ gcc/config/vms/t-vmsnative (working copy) @@ -17,6 +17,11 @@ # along with GCC; see the file COPYING3. If not see # http://www.gnu.org/licenses/. +# Under VMS, directory names cannot contain dots. +version:=$(shell echo $(BASEVER_c) | sed -e 's/\./_/g') + +# Wrappers around native VMS tools for ld and ar. + vms-ld.o: $(srcdir)/config/vms/vms-ld.c $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $ $(OUTPUT_OPTION)
Re: [PATCH][target/52481] m68k-*: internal compiler error: in extract_insn, at recog.c:2123
Ralf Corsepius ralf.corsep...@rtems.org writes: * Incompatiblible/insufficient binutils (I am using binutils-2.22)? * Some as/ld-flags getting lost/improperly propagated during assembly/linking? * Bad/incompatible inline-asm hard-coded somewhere? TAS needs at least ISA_B, ie. at least CFV4. Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 And now for something completely different.
[VMS] rename PRNTF to LDBL in crtl map
Hi, the name PRNTF was not well chosen, and I prefer to rename it to LDBL to make it clear that it refers to long double. Applied on trunk. Tristan. 2012-03-06 Tristan Gingold ging...@adacore.com * config/vms/vms.c (VMS_CRTL_LDBL): Rename from VMS_CRTL_PRNTF. * config/vms/vms-crtlmap.map: Rename PRNTF to LDBL. Index: gcc/config/vms/vms-crtlmap.map === --- gcc/config/vms/vms-crtlmap.map (revision 184981) +++ gcc/config/vms/vms-crtlmap.map (working copy) @@ -13,10 +13,10 @@ # - map lines consist in an identifier optionnaly followed by at most 2 # space-separated flags. # Flags are: -# FLOAT: will be prefixed by 'x' +# FLOAT: will be prefixed by 't'/'g'/'d' # 64: There is a 64-bit variant # BSD44: name will be prefixed by __bsd44__ -# PRNTF: a 't' prefix will be added. +# LDBL: a 'x' prefix will be added if 128 bit long doubles are enabled. # MALLOC: malloc related function. # # Keep entries alpha-sorted - this is enforced by the awk script. @@ -75,7 +75,7 @@ fgets 64 floor FLOAT fopen -fprintf FLOAT PRNTF +fprintf FLOAT LDBL fputc fputs fread @@ -132,7 +132,7 @@ perror popen pow FLOAT -printfFLOAT PRNTF +printfFLOAT LDBL putc putchar putenv @@ -157,9 +157,9 @@ signal sigsetmask sin FLOAT -snprintf FLOAT PRNTF +snprintf FLOAT LDBL socket -sprintf FLOAT PRNTF +sprintf FLOAT LDBL sqrt FLOAT stat strcasecmp @@ -191,10 +191,10 @@ ungetc unlink utime -vfprintf FLOAT PRNTF -vprintf FLOAT PRNTF -vsnprintf FLOAT PRNTF -vsprintf FLOAT PRNTF +vfprintf FLOAT LDBL +vprintf FLOAT LDBL +vsnprintf FLOAT LDBL +vsprintf FLOAT LDBL wait waitpid wcswidth Index: gcc/config/vms/vms.c === --- gcc/config/vms/vms.c(revision 184981) +++ gcc/config/vms/vms.c(working copy) @@ -42,8 +42,9 @@ rule. */ #define VMS_CRTL_BSD44 (1 3) -/* Prepend x before the name for printf like functions. */ -#define VMS_CRTL_PRNTF (1 4) +/* Prepend x before the name for if 128 bit long doubles are enabled. This + concern mostly 'printf'-like functions. */ +#define VMS_CRTL_LDBL (1 4) /* Prepend ga_ for global data. */ #define VMS_CRTL_GLOBAL (1 5) @@ -135,7 +136,7 @@ if (n-flags VMS_CRTL_FLOAT) res[rlen++] = 't'; - if (n-flags VMS_CRTL_PRNTF) + if (n-flags VMS_CRTL_LDBL) res[rlen++] = 'x'; nlen = strlen (n-name);
[VMS] minor updates to vms-c.c
Hi,
this patch:
* handles 'octaword' alignment in pragma __nomember_alignment.
* handles 'relaxed_refdef' in pragma __extern_model.
* allow preprocessor expansion in pragma nomember_alignment.
* improve the documentation of external model.
Committed on trunk.
Tristan.
2012-03-06 Tristan Gingold ging...@adacore.com
* config/vms/vms-c.c (vms_pragma_nomember_alignment): Handle
octaword.
(external_model_kind): Improve documentation.
(vms_pragma_extern_model): Handle relaxed_redef.
(vms_c_register_pragma): Allow expansion for nomember_alignment.
Index: gcc/config/vms/vms-c.c
===
--- gcc/config/vms/vms-c.c (revision 184981)
+++ gcc/config/vms/vms-c.c (working copy)
@@ -125,6 +125,8 @@
maximum_field_alignment = 4 * BITS_PER_UNIT;
else if (strcmp (arg, quadword) == 0)
maximum_field_alignment = 8 * BITS_PER_UNIT;
+ else if (strcmp (arg, octaword) == 0)
+maximum_field_alignment = 16 * BITS_PER_UNIT;
else
{
error (unhandled alignment for '#pragma nomember_alignment');
@@ -145,17 +147,33 @@
}
}
-/* The 'extern model' for public data. */
+/* The 'extern model' for public data. This drives how the following
+ declarations are handled:
+ 1) extern int name;
+ 2) int name;
+ 3) int name = 5;
+ See below for the behaviour as implemented by the native compiler.
+*/
enum extern_model_kind
{
- /* Create one overlaid section per variable. */
+ /* Create one overlaid section per variable. All the above declarations (1,
+ 2 and 3) are handled the same way: they create an overlaid section named
+ NAME (and initialized only for 3). No global symbol is created.
+ This is the VAX C behavior. */
extern_model_common_block,
- /* Like unix: multiple not-initialized declarations are allowed. */
+ /* Like unix: multiple not-initialized declarations are allowed.
+ Only one initialized definition (case 3) is allows, but multiple
+ uninitialize definition (case 2) are allowed.
+ For case 2, this creates both a section named NAME and a global symbol.
+ For case 3, this creates a conditional global symbol defenition and a
+ conditional section definition.
+ This is the traditional UNIX C behavior. */
extern_model_relaxed_refdef,
- /* Like -fno-common. */
+ /* Like -fno-common. Only one definition (cases 2 and 3) are allowed.
+ This is the ANSI-C model. */
extern_model_strict_refdef,
/* Declarations creates symbols without storage. */
@@ -192,6 +210,8 @@
saved_extern_model = current_extern_model;
else if (strcmp (arg, restore) == 0)
current_extern_model = saved_extern_model;
+ else if (strcmp (arg, relaxed_refdef) == 0)
+current_extern_model = extern_model_relaxed_refdef;
else if (strcmp (arg, strict_refdef) == 0)
current_extern_model = extern_model_strict_refdef;
else if (strcmp (arg, common_block) == 0)
@@ -274,10 +294,10 @@
c_register_pragma (NULL, standard, vms_pragma_standard);
c_register_pragma (NULL, __member_alignment, vms_pragma_member_alignment);
c_register_pragma (NULL, member_alignment, vms_pragma_member_alignment);
- c_register_pragma (NULL, __nomember_alignment,
- vms_pragma_nomember_alignment);
- c_register_pragma (NULL, nomember_alignment,
- vms_pragma_nomember_alignment);
+ c_register_pragma_with_expansion (NULL, __nomember_alignment,
+vms_pragma_nomember_alignment);
+ c_register_pragma_with_expansion (NULL, nomember_alignment,
+vms_pragma_nomember_alignment);
c_register_pragma (NULL, __extern_model, vms_pragma_extern_model);
c_register_pragma (NULL, extern_model, vms_pragma_extern_model);
c_register_pragma (NULL, __message, vms_pragma_message);
[PATCH] Fix PR52493
This fixes PR52493 by robustifying the ptr_derefs_may_alias_p code.
It should handle being passed MEM[0 + 0] (which is a missed folding,
to be addressed by a separate patch). The simplification code always
should recurse, we failed to do so for the MEM_REF case.
Bootstrap regtest pending on x86_64-unknown-linux-gnu.
Richard.
2012-03-06 Richard Guenther rguent...@suse.de
PR middle-end/52493
* tree-ssa-alias.c (ptr_derefs_may_alias_p): Robustify.
* gcc.dg/torture/pr52493.c: New testcase.
Index: gcc/tree-ssa-alias.c
===
*** gcc/tree-ssa-alias.c(revision 184981)
--- gcc/tree-ssa-alias.c(working copy)
*** ptr_derefs_may_alias_p (tree ptr1, tree
*** 236,252
STRIP_NOPS (ptr1);
STRIP_NOPS (ptr2);
- /* Anything we do not explicilty handle aliases. */
- if ((TREE_CODE (ptr1) != SSA_NAME
- TREE_CODE (ptr1) != ADDR_EXPR
- TREE_CODE (ptr1) != POINTER_PLUS_EXPR)
- || (TREE_CODE (ptr2) != SSA_NAME
- TREE_CODE (ptr2) != ADDR_EXPR
- TREE_CODE (ptr2) != POINTER_PLUS_EXPR)
- || !POINTER_TYPE_P (TREE_TYPE (ptr1))
- || !POINTER_TYPE_P (TREE_TYPE (ptr2)))
- return true;
-
/* Disregard pointer offsetting. */
if (TREE_CODE (ptr1) == POINTER_PLUS_EXPR)
{
--- 236,241
*** ptr_derefs_may_alias_p (tree ptr1, tree
*** 275,281
if (base
(TREE_CODE (base) == MEM_REF
|| TREE_CODE (base) == TARGET_MEM_REF))
! ptr1 = TREE_OPERAND (base, 0);
else if (base
DECL_P (base))
return ptr_deref_may_alias_decl_p (ptr2, base);
--- 264,270
if (base
(TREE_CODE (base) == MEM_REF
|| TREE_CODE (base) == TARGET_MEM_REF))
! return ptr_derefs_may_alias_p (TREE_OPERAND (base, 0), ptr2);
else if (base
DECL_P (base))
return ptr_deref_may_alias_decl_p (ptr2, base);
*** ptr_derefs_may_alias_p (tree ptr1, tree
*** 288,294
if (base
(TREE_CODE (base) == MEM_REF
|| TREE_CODE (base) == TARGET_MEM_REF))
! ptr2 = TREE_OPERAND (base, 0);
else if (base
DECL_P (base))
return ptr_deref_may_alias_decl_p (ptr1, base);
--- 277,283
if (base
(TREE_CODE (base) == MEM_REF
|| TREE_CODE (base) == TARGET_MEM_REF))
! return ptr_derefs_may_alias_p (ptr1, TREE_OPERAND (base, 0));
else if (base
DECL_P (base))
return ptr_deref_may_alias_decl_p (ptr1, base);
*** ptr_derefs_may_alias_p (tree ptr1, tree
*** 296,301
--- 285,297
return true;
}
+ /* From here we require SSA name pointers. Anything else aliases. */
+ if (TREE_CODE (ptr1) != SSA_NAME
+ || TREE_CODE (ptr2) != SSA_NAME
+ || !POINTER_TYPE_P (TREE_TYPE (ptr1))
+ || !POINTER_TYPE_P (TREE_TYPE (ptr2)))
+ return true;
+
/* We may end up with two empty points-to solutions for two same pointers.
In this case we still want to say both pointers alias, so shortcut
that here. */
Index: gcc/testsuite/gcc.dg/torture/pr52493.c
===
*** gcc/testsuite/gcc.dg/torture/pr52493.c (revision 0)
--- gcc/testsuite/gcc.dg/torture/pr52493.c (revision 0)
***
*** 0
--- 1,38
+ /* { dg-do compile } */
+
+ struct Time {
+ long int sec;
+ long usec;
+ };
+ struct Flow {
+ unsigned short iif;
+ struct Time mtime;
+ };
+ struct NetFlow {
+ unsigned MaxFlows;
+ unsigned HeaderFields;
+ unsigned short *HeaderFormat;
+ };
+ static struct NetFlow *netflow;
+ static struct Time start_time;
+ static unsigned char emit_packet[1500];
+ inline long int cmpmtime(struct Time *t1, struct Time *t2)
+ {
+ return (t1-sec - t2-sec) * 1000 + (t1-usec - t2-usec) / 1000;
+ }
+ static void fill(int fields, unsigned short *format,
+ struct Flow *flow, void *p)
+ {
+ int i;
+ for (i = 0; i fields; i++)
+ if (format[i] == 21)
+ {
+ unsigned int __v;
+ __v = cmpmtime(flow-mtime, start_time);
+ *((unsigned int *) p) = __v;
+ }
+ }
+ void emit_thread()
+ {
+ fill(netflow-HeaderFields, netflow-HeaderFormat, 0, emit_packet);
+ }
[PATCH] Properly fold MEM[0 + 0]
This adds folding of MEM[CST + CST] to
build_fold_addr_expr_with_type_loc.
Bootstrap and regtest pending on x86_64-unknown-linux-gnu.
Richard.
2012-03-06 Richard Guenther rguent...@suse.de
* fold-const.c (build_fold_addr_expr_with_type_loc): Fold
MEM_REF with constant pointer operand.
Index: gcc/fold-const.c
===
*** gcc/fold-const.c(revision 184981)
--- gcc/fold-const.c(working copy)
*** build_fold_addr_expr_with_type_loc (loca
*** 7626,7633
t = build1_loc (loc, NOP_EXPR, ptrtype, t);
}
else if (TREE_CODE (t) == MEM_REF
!integer_zerop (TREE_OPERAND (t, 1)))
! return TREE_OPERAND (t, 0);
else if (TREE_CODE (t) == VIEW_CONVERT_EXPR)
{
t = build_fold_addr_expr_loc (loc, TREE_OPERAND (t, 0));
--- 7626,7638
t = build1_loc (loc, NOP_EXPR, ptrtype, t);
}
else if (TREE_CODE (t) == MEM_REF
! integer_zerop (TREE_OPERAND (t, 1)))
! return fold_convert (ptrtype, TREE_OPERAND (t, 0));
! else if (TREE_CODE (t) == MEM_REF
! TREE_CODE (TREE_OPERAND (t, 0)) == INTEGER_CST)
! return fold_binary (POINTER_PLUS_EXPR, ptrtype,
! TREE_OPERAND (t, 0),
! convert_to_ptrofftype (TREE_OPERAND (t, 1)));
else if (TREE_CODE (t) == VIEW_CONVERT_EXPR)
{
t = build_fold_addr_expr_loc (loc, TREE_OPERAND (t, 0));
Re: [Patch,AVR,trunk,4.7] PR52461: Fix RAMPZ clobbering and RAMP* in epilogue
Richard Guenther wrote: On Mon, Mar 5, 2012 at 6:54 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 6:15 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 4:56 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 4:25 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: All commits to the 4.7 branch need explicit release manager approval. AVR isn't primary/secondary so please do not change anything before is released 4.7.0 for it. Thanks, Richard. What is the exact procedure in that case? Wait until approve from release manager in that case? Who is the release manager, and should I CC for such changes? Or just hope the patch is not overseen. The exact procedure is to do bugfixing during stage3/4, for release blockers that pop up after a release candidate is created (like now), CC a release manager (Jakub, me, Joseph) for patches that you like to get in even though the branch is frozen. Usually only bugs that prevent basic functionality (like building a target) can be fixed at this point, for everything else you have to wait until after 4.7.0 is released and the branch opens again for regression fixes. Richard. I was not aware that the 4.7.0 branch is completely frozen for the next 3 weeks; I thought the usual rules for backporting patches do apply... No they don't. How would you expect that testing a release candidate would work if we put in any not strictly necessary changes? That would make a release candidate quite pointless. The patch changes only in libgcc/config/avr and gcc/config/avr The patch does not fix a blocker in the sense that without it avr cannot be built, but the changes are essential. Surely not so essential as that they cannot be put in place to make the 4.7.1 release then. Okay. In that case I'd like to add a note to the caveats section in wwwdocs ./gcc-4.7/changes.html that the avr-gcc 4.7.0 is not intended for public consumption and because of developer shortage at least 4.7.1 should be used. Completely unusable? It looks like it only affects a subset of all devices: To read from flash on devices with more than 64KiB of flash The patch fixes more problems than indicated by log message's PR. It sounds like a random wrong-code bug, which do happen. Yes they happen. But if the defect is so severe that the code is effectively useless, the compiler is useless. That is not a problem if it is clearly stated and people don't waste days to set up and distribute avr toolchains that are useless. It would simply be not fair to let them waste their time and to hold back that knowledge. There is just a timeframe where random fixes are not good. This is not a problem. Just inform the potential users about the defect. Was 4.6.3 intended for public consumption? Yes. So, what patch regressed state from 4.6.3 to the present completely unusable compiler? Why is it not appropriate to revert that instead? Why is the bug not marked as regression? The bug sounds as if it only applies to XMEGA+EBI (whatever that means). Yes, the problems all affect new features. Can you split the patch and separate out the fix for the PR if the patch does not only fix that PR? You are right, it's definitely better to break up the patch into the individual PRs if there is no way to get a patch in 4.7.0, anyway. As far as I can see, only new features/architectures are non-functional to that postponing them to 4.7.1 is an option. Johann
Re: Delete dead (?) code in expand_expr_real_2
I don't see how a VAR_DECL can ever get a DECL_RTL equal to one of the mentioned regs. Doesn't that happen when you have a local variable that's a variable-sized object? What would have changed that would cause it to no longer happen? This is tree-level stuff, not RTL. The patch is ok if a gcc_unreachable () inside the if () passes bootstrap. We have no such in most of the compiler, so I don't think that's a good test. There may be some in Ada, but I'm not sure. I'd suggest running it over all the test suites as well.
Re: Delete dead (?) code in expand_expr_real_2
On Tue, Mar 06, 2012 at 06:17:52AM -0500, Richard Kenner wrote: I don't see how a VAR_DECL can ever get a DECL_RTL equal to one of the mentioned regs. Doesn't that happen when you have a local variable that's a variable-sized object? What would have changed that would cause it to no longer happen? This is tree-level stuff, not RTL. VLA VAR_DECLs have just DECL_HAS_VALUE_EXPR_P set and DECL_VALUE_EXPR being INDIRECT_REF (or MEM_REF now?) dereferencing some DECL_ARTIFICIAL VAR_DECL that is initialized from alloca builtin.So the VLA VAR_DECLs don't have any DECL_RTL at all (kept for debug info purposes only), and the artificial pointer to it will just have as DECL_RTL some pseudo or so. Jakub
Re: [Patch,AVR,trunk,4.7] PR52461: Fix RAMPZ clobbering and RAMP* in epilogue
On Tue, Mar 6, 2012 at 12:13 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 6:54 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 6:15 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 4:56 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: On Mon, Mar 5, 2012 at 4:25 PM, Georg-Johann Lay a...@gjlay.de wrote: Richard Guenther wrote: All commits to the 4.7 branch need explicit release manager approval. AVR isn't primary/secondary so please do not change anything before is released 4.7.0 for it. Thanks, Richard. What is the exact procedure in that case? Wait until approve from release manager in that case? Who is the release manager, and should I CC for such changes? Or just hope the patch is not overseen. The exact procedure is to do bugfixing during stage3/4, for release blockers that pop up after a release candidate is created (like now), CC a release manager (Jakub, me, Joseph) for patches that you like to get in even though the branch is frozen. Usually only bugs that prevent basic functionality (like building a target) can be fixed at this point, for everything else you have to wait until after 4.7.0 is released and the branch opens again for regression fixes. Richard. I was not aware that the 4.7.0 branch is completely frozen for the next 3 weeks; I thought the usual rules for backporting patches do apply... No they don't. How would you expect that testing a release candidate would work if we put in any not strictly necessary changes? That would make a release candidate quite pointless. The patch changes only in libgcc/config/avr and gcc/config/avr The patch does not fix a blocker in the sense that without it avr cannot be built, but the changes are essential. Surely not so essential as that they cannot be put in place to make the 4.7.1 release then. Okay. In that case I'd like to add a note to the caveats section in wwwdocs ./gcc-4.7/changes.html that the avr-gcc 4.7.0 is not intended for public consumption and because of developer shortage at least 4.7.1 should be used. Completely unusable? It looks like it only affects a subset of all devices: To read from flash on devices with more than 64KiB of flash The patch fixes more problems than indicated by log message's PR. It sounds like a random wrong-code bug, which do happen. Yes they happen. But if the defect is so severe that the code is effectively useless, the compiler is useless. That is not a problem if it is clearly stated and people don't waste days to set up and distribute avr toolchains that are useless. It would simply be not fair to let them waste their time and to hold back that knowledge. There is just a timeframe where random fixes are not good. This is not a problem. Just inform the potential users about the defect. Was 4.6.3 intended for public consumption? Yes. So, what patch regressed state from 4.6.3 to the present completely unusable compiler? Why is it not appropriate to revert that instead? Why is the bug not marked as regression? The bug sounds as if it only applies to XMEGA+EBI (whatever that means). Yes, the problems all affect new features. Can you split the patch and separate out the fix for the PR if the patch does not only fix that PR? You are right, it's definitely better to break up the patch into the individual PRs if there is no way to get a patch in 4.7.0, anyway. As far as I can see, only new features/architectures are non-functional to that postponing them to 4.7.1 is an option. Thanks. So it seems only those new features are unusable then, you might simply announce them for 4.7.1 only (changes.html will have a sub-section covering changes for 4.7.1). Richard. Johann
Re: Delete dead (?) code in expand_expr_real_2
VLA VAR_DECLs have just DECL_HAS_VALUE_EXPR_P set and DECL_VALUE_EXPR being INDIRECT_REF (or MEM_REF now?) dereferencing some DECL_ARTIFICIAL VAR_DECL that is initialized from alloca builtin.So the VLA VAR_DECLs don't have any DECL_RTL at all (kept for debug info purposes only), and the artificial pointer to it will just have as DECL_RTL some pseudo or so. That change may well have killed this code, then.
[Patch PING] Re: [4.8, C++ Patch] PR 52422
Hi
just rediffed and retested on x86_64-linux the new version of the patch.
Is it Ok for mainline?
Thanks,
Paolo.
///
/cp
2012-03-06 Paolo Carlini paolo.carl...@oracle.com
PR c++/52422
* cp-tree.h (build_addr_func, decay_conversion,
build_m_component_ref): Add tsubst_flags_t parameter.
* typeck.c (decay_conversion): Add tsubst_flags_t parameter and
use it throughout.
(default_conversion, cp_build_indirect_ref,
get_member_function_from_ptrfunc, cp_build_function_call_vec,
convert_arguments, build_x_binary_op, cp_build_binary_op,
convert_member_func_to_ptr, build_reinterpret_cast_1,
build_const_cast_1, expand_ptrmemfunc_cst,
convert_for_initialization): Adjust.
* init.c (build_vec_init, build_vec_init): Adjust.
* decl.c (grok_reference_init, get_atexit_node): Likewise.
* rtti.c (build_dynamic_cast_1, tinfo_base_init): Likewise.
* except.c (build_throw): Likewise.
* typeck2.c (build_x_arrow): Likewise.
(build_m_component_ref): Add tsubst_flags_t parameter and
use it throughout.
* pt.c (convert_nontype_argument): Adjust.
* semantics.c (finish_asm_stmt, maybe_add_lambda_conv_op): Likewise.
* call.c (build_addr_func): Add tsubst_flags_t parameter and
use it throughout.
(build_call_a, build_conditional_expr_1, build_new_op_1,
convert_like_real, convert_arg_to_ellipsis, build_over_call,
build_special_member_call): Adjust.
* cvt.c (force_rvalue, build_expr_type_conversion): Likewise.
/testsuite
2012-03-06 Paolo Carlini paolo.carl...@oracle.com
PR c++/52422
* g++.dg/cpp0x/sfinae33.C: New.
* g++.dg/cpp0x/sfinae34.C: Likewise.
Index: testsuite/g++.dg/cpp0x/sfinae33.C
===
--- testsuite/g++.dg/cpp0x/sfinae33.C (revision 0)
+++ testsuite/g++.dg/cpp0x/sfinae33.C (revision 0)
@@ -0,0 +1,27 @@
+// PR c++/52422
+// { dg-options -std=c++0x }
+
+templateclass T
+struct add_rval_ref
+{
+ typedef T type;
+};
+
+template
+struct add_rval_refvoid
+{
+ typedef void type;
+};
+
+templateclass T
+typename add_rval_refT::type create();
+
+templateclass T,
+ class = decltype(createT()())
+
+auto f(int) - char()[1];
+
+templateclass
+auto f(...) - char()[2];
+
+static_assert(sizeof(fvoid(0)) != 1, );
Index: testsuite/g++.dg/cpp0x/sfinae34.C
===
--- testsuite/g++.dg/cpp0x/sfinae34.C (revision 0)
+++ testsuite/g++.dg/cpp0x/sfinae34.C (revision 0)
@@ -0,0 +1,28 @@
+// PR c++/52422
+// { dg-options -std=c++0x }
+
+templateclass T
+struct add_rval_ref
+{
+ typedef T type;
+};
+
+template
+struct add_rval_refvoid
+{
+ typedef void type;
+};
+
+templateclass T
+typename add_rval_refT::type create();
+
+templateclass T, class U,
+ class = decltype( (createT().*createU())() )
+
+auto f(int) - char()[1];
+
+templateclass, class
+auto f(...) - char()[2];
+
+static_assert(sizeof(fvoid, void(0)) != 1, );
+
Index: cp/typeck.c
===
--- cp/typeck.c (revision 184985)
+++ cp/typeck.c (working copy)
@@ -1813,7 +1813,7 @@ unlowered_expr_type (const_tree exp)
that the return value is no longer an lvalue. */
tree
-decay_conversion (tree exp)
+decay_conversion (tree exp, tsubst_flags_t complain)
{
tree type;
enum tree_code code;
@@ -1827,7 +1827,8 @@ tree
exp = resolve_nondeduced_context (exp);
if (type_unknown_p (exp))
{
- cxx_incomplete_type_error (exp, TREE_TYPE (exp));
+ if (complain tf_error)
+ cxx_incomplete_type_error (exp, TREE_TYPE (exp));
return error_mark_node;
}
@@ -1846,13 +1847,14 @@ tree
code = TREE_CODE (type);
if (code == VOID_TYPE)
{
- error (void value not ignored as it ought to be);
+ if (complain tf_error)
+ error (void value not ignored as it ought to be);
return error_mark_node;
}
- if (invalid_nonstatic_memfn_p (exp, tf_warning_or_error))
+ if (invalid_nonstatic_memfn_p (exp, complain))
return error_mark_node;
if (code == FUNCTION_TYPE || is_overloaded_fn (exp))
-return cp_build_addr_expr (exp, tf_warning_or_error);
+return cp_build_addr_expr (exp, complain);
if (code == ARRAY_TYPE)
{
tree adr;
@@ -1864,7 +1866,9 @@ tree
if (TREE_CODE (exp) == COMPOUND_EXPR)
{
- tree op1 = decay_conversion (TREE_OPERAND (exp, 1));
+ tree op1 = decay_conversion (TREE_OPERAND (exp, 1), complain);
+ if (op1 == error_mark_node)
+return error_mark_node;
return build2 (COMPOUND_EXPR, TREE_TYPE (op1),
TREE_OPERAND (exp, 0), op1);
}
@@ -1872,7 +1876,8 @@ tree
if (!lvalue_p (exp)
! (TREE_CODE (exp) == CONSTRUCTOR TREE_STATIC (exp)))
{
- error
Re: [PATCH, i386] RTM support
I'd suggest you generate local label in the expander and pass it to insn RTX. This way, we can also reuse insn pattern later with eventual different code label. Thanks! Done. New patch attached. Updated changelogs: ChangeLog: 2012-02-16 Kirill Yukhin kirill.yuk...@intel.com * common/config/i386/i386-common.c (OPTION_MASK_ISA_RTM_SET): New. (OPTION_MASK_ISA_RTM_UNSET): Ditto. (ix86_handle_option): Handle OPT_mrtm. * config.gcc (i[34567]86-*-*): Add rtmintrin.h and xtestintrin.h. (x86_64-*-*): Ditto. * i386-builtin-types.def (INT_FTYPE_VOID): New. * config/i386/i386-c.c (ix86_target_macros_internal): Define __RTM__ if needed. (ix86_target_string): Define -mrtm option. (PTA_RTM): New. (ix86_option_override_internal): Extend cirei7-avx with RTM option. Handle new option. (ix86_valid_target_attribute_inner_p): Add OPT_mrtm. (ix86_builtins): Add IX86_BUILTIN_XBEGIN, IX86_BUILTIN_XEND, IX86_BUILTIN_XTEST. (bdesc_special_args): Ditto. (ix86_init_mmx_sse_builtins): Add IX86_BUILTIN_XABORT. (ix86_expand_special_args_builtin): Handle new built-in type. (ix86_expand_builtin): Handle XABORT instruction. * config/i386/i386.h (TARGET_RTM): New. * config/i386/i386.md (UNSPECV_XBEGIN): New. (UNSPECV_XEND): Ditto. (UNSPECV_XABORT): Ditto. (UNSPECV_XTEST): Ditto. (xbegin): Ditto. (xbegin_1): Ditto. (xend): Ditto. (xabort): Ditto (xtest): Ditto. (xtest_1): Ditto. * config/i386/i386.opt (mrtm): New. * config/i386/immintrin.h: Include rtmintrin.h and xtestintrin.h. * config/i386/rtmintrin.h: New header. * config/i386/xtestintrin.h: Ditto. testsuite/ChangeLog: 2012-02-16 Kirill Yukhin kirill.yuk...@intel.com * gcc.target/i386/rtm-xabort-1.c: New. * gcc.target/i386/rtm-xbegin-1.c: Ditto. * gcc.target/i386/rtm-xend-1.c: Ditto. * gcc.target/i386/rtm-xtest-1.c: Ditto. * gcc.target/i386/sse-12.c: Test RTM intrinsics. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. Comments? Thanks, K rtm-3.gcc.patch Description: Binary data
Re: [PATCH, i386] RTM support
On Tue, Mar 6, 2012 at 12:59 PM, Kirill Yukhin kirill.yuk...@gmail.com wrote:
I'd suggest you generate local label in the expander and pass it to
insn RTX. This way, we can also reuse insn pattern later with eventual
different code label.
Thanks! Done.
New patch attached.
Updated changelogs:
ChangeLog:
2012-02-16 Kirill Yukhin kirill.yuk...@intel.com
* common/config/i386/i386-common.c (OPTION_MASK_ISA_RTM_SET):
New.
(OPTION_MASK_ISA_RTM_UNSET): Ditto.
(ix86_handle_option): Handle OPT_mrtm.
* config.gcc (i[34567]86-*-*): Add rtmintrin.h and
xtestintrin.h.
(x86_64-*-*): Ditto.
* i386-builtin-types.def (INT_FTYPE_VOID): New.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__RTM__ if needed.
(ix86_target_string): Define -mrtm option.
(PTA_RTM): New.
(ix86_option_override_internal): Extend cirei7-avx with
RTM option. Handle new option.
(ix86_valid_target_attribute_inner_p): Add OPT_mrtm.
(ix86_builtins): Add IX86_BUILTIN_XBEGIN, IX86_BUILTIN_XEND,
IX86_BUILTIN_XTEST.
(bdesc_special_args): Ditto.
(ix86_init_mmx_sse_builtins): Add IX86_BUILTIN_XABORT.
(ix86_expand_special_args_builtin): Handle new built-in type.
(ix86_expand_builtin): Handle XABORT instruction.
* config/i386/i386.h (TARGET_RTM): New.
* config/i386/i386.md (UNSPECV_XBEGIN): New.
(UNSPECV_XEND): Ditto.
(UNSPECV_XABORT): Ditto.
(UNSPECV_XTEST): Ditto.
(xbegin): Ditto.
(xbegin_1): Ditto.
(xend): Ditto.
(xabort): Ditto
(xtest): Ditto.
(xtest_1): Ditto.
* config/i386/i386.opt (mrtm): New.
* config/i386/immintrin.h: Include rtmintrin.h and
xtestintrin.h.
* config/i386/rtmintrin.h: New header.
* config/i386/xtestintrin.h: Ditto.
testsuite/ChangeLog:
2012-02-16 Kirill Yukhin kirill.yuk...@intel.com
* gcc.target/i386/rtm-xabort-1.c: New.
* gcc.target/i386/rtm-xbegin-1.c: Ditto.
* gcc.target/i386/rtm-xend-1.c: Ditto.
* gcc.target/i386/rtm-xtest-1.c: Ditto.
* gcc.target/i386/sse-12.c: Test RTM intrinsics.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
Comments?
Technically OK, but let's wait for rth's comments about -mrtm option.
A few nits:
break;
+case INT_FTYPE_VOID:
Please add vertical space.
+(define_expand xbegin
+ [(set (match_operand:SI 0 register_operand =a)
+ (unspec_volatile:SI [(match_dup 1)] UNSPECV_XBEGIN))]
Wrong indent.
+#ifdef __RTM__
+#include rtmintrin.h
+#endif
+
+#ifdef __RTM__
+#include xtestintrin.h
+#endif
Probably we don't need two separate #ifdefs.
+/* Copyright (C) 2011 Free Software Foundation, Inc.
Please update copyright year.
+/* { dg-options -mrtm -O0 } */
+/* { dg-options -mrtm -O0 -dp } */
No need to pass -O0 (default) and -dp.
Thanks,
Uros.
Re: [PATCH] Partially fix 51988: value_replacement in PHIOPT should handle even the cases where there are other PHIs even with non equal value
On Wed, Jan 25, 2012 at 6:36 AM, Andrew Pinski pins...@gmail.com wrote: Hi, value_replacement in PHIOPT currently works only when there is one PHI (which is non virtual). http://gcc.gnu.org/ml/gcc-patches/2012-01/msg01195.html improves the situation but we can improve it even more as replacing a PHI argument with a SSA_NAME is almost always a benefit. This patch improves the situation even more for value replacement (though it does not fix all the cases I wanted to fix but that would require much more rewrite of phiopt that I was willing to take on right now, see the bug report for the two testcases where we miss still). We improve the situation by just going through all the PHIs and seeing if we want to do value replacement and only remove the middle basic block if it is empty or we used the only assignment in the PHI (for if(p)a=p-a;else a= 0; case). OK for 4.8? Bootstrapped and tested on x86_64-linux-gnu with no regressions. Ok. Thanks, Richard. Note I have two improvements when both this and http://gcc.gnu.org/ml/gcc-patches/2012-01/msg01195.html are applied; remove the xfail and instead of gimple_seq_singleton_p use the new single_non_singleton_phi_for_edges (I will test that patch after both are applied). Currently these patches are independent and I want to keep it that way. Thanks, Andrew Pinski ChangeLog: * tree-ssa-phiopt.c: Include tree-pretty-print.h for print_generic_expr. (tree_ssa_phiopt_worker): Go through all the PHIs for value_replacement instead of just the singleton one. (value_replacement): Change return type to int. Return 0 instead of false. Allow the middle basic block to contain more than just the defining statement. Handle non empty middle basic blocks. * Makefile.in (tree-ssa-phiopt.o): Add tree-pretty-print.h testsuite/ChangeLog: * gcc.dg/tree-ssa/phi-opt-8.c: New testcase. * gcc.dg/tree-ssa/phi-opt-9.c: New testcase.
[Patch,AVR]: Fix PR52506
The problem is that RAMPD/X/Y/Z are restored in the wrong order in ISR epilogue.
Ok for trunk?
Johann
PR target/52506
* gcc/config/avr/avr.c (expand_epilogue): Fix order of restoration
to: RAMPZ, RAMPY, RAMPX, RAMPD.
(expand_prologue): Only clear RAMPZ if it has effect on RAM-read.
Index: gcc/config/avr/avr.c
===
--- gcc/config/avr/avr.c (revision 184887)
+++ gcc/config/avr/avr.c (working copy)
@@ -1123,11 +1123,11 @@ expand_prologue (void)
emit_push_sfr (rampy_rtx, false /* frame-related */, true /* clr */);
}
- if (AVR_HAVE_RAMPZ
+ if (AVR_HAVE_RAMPZ
TEST_HARD_REG_BIT (set, REG_Z)
TEST_HARD_REG_BIT (set, REG_Z + 1))
{
- emit_push_sfr (rampz_rtx, false /* frame-related */, true /* clr */);
+ emit_push_sfr (rampz_rtx, false /* frame-related */, AVR_HAVE_RAMPD);
}
} /* is_interrupt is_signal */
@@ -1347,12 +1347,12 @@ expand_epilogue (bool sibcall_p)
/* Restore RAMPZ/Y/X/D using tmp_reg as scratch.
The conditions to restore them must be tha same as in prologue. */
- if (AVR_HAVE_RAMPX
- TEST_HARD_REG_BIT (set, REG_X)
- TEST_HARD_REG_BIT (set, REG_X + 1))
+ if (AVR_HAVE_RAMPZ
+ TEST_HARD_REG_BIT (set, REG_Z)
+ TEST_HARD_REG_BIT (set, REG_Z + 1))
{
emit_pop_byte (TMP_REGNO);
- emit_move_insn (rampx_rtx, tmp_reg_rtx);
+ emit_move_insn (rampz_rtx, tmp_reg_rtx);
}
if (AVR_HAVE_RAMPY
@@ -1364,12 +1364,12 @@ expand_epilogue (bool sibcall_p)
emit_move_insn (rampy_rtx, tmp_reg_rtx);
}
- if (AVR_HAVE_RAMPZ
- TEST_HARD_REG_BIT (set, REG_Z)
- TEST_HARD_REG_BIT (set, REG_Z + 1))
+ if (AVR_HAVE_RAMPX
+ TEST_HARD_REG_BIT (set, REG_X)
+ TEST_HARD_REG_BIT (set, REG_X + 1))
{
emit_pop_byte (TMP_REGNO);
- emit_move_insn (rampz_rtx, tmp_reg_rtx);
+ emit_move_insn (rampx_rtx, tmp_reg_rtx);
}
if (AVR_HAVE_RAMPD)
Re: [PATCH, i386] RTM support
Updated patch attached.
Technically OK, but let's wait for rth's comments about -mrtm option.
Thanks! Let's wait then.
break;
+ case INT_FTYPE_VOID:
Please add vertical space.
Added.
+(define_expand xbegin
+ [(set (match_operand:SI 0 register_operand =a)
+ (unspec_volatile:SI [(match_dup 1)] UNSPECV_XBEGIN))]
Wrong indent.
Indented.
+#ifdef __RTM__
+#include rtmintrin.h
+#endif
+
+#ifdef __RTM__
+#include xtestintrin.h
+#endif
Probably we don't need two separate #ifdefs.
This is not as suitable, since next feature HLE has this intruction as
well, so condition for xtests will be OR-ed with __HLE__
+/* Copyright (C) 2011 Free Software Foundation, Inc.
Please update copyright year.
Fixed.
+/* { dg-options -mrtm -O0 } */
+/* { dg-options -mrtm -O0 -dp } */
No need to pass -O0 (default) and -dp.
Fixed.
ChangeLog entries were not touched.
Thanks, K
rtm-4.gcc.patch
Description: Binary data
[RFC]: Add support for pragma pointer_size
Hi,
this patch has some impacts to the C front-end, and I'd like to know wether my
approach is correct before finalizing it. So comments are welcome.
It implements the VMS 'pragma pointer_size 32/64/short/long', which change the
default size of a pointer. This feature allows to use a 32 bits or a 64 bits
ABI with only one C library (there are other weirdness to make this possible,
but the main feature is this one).
This feature was already supported by Ada (using pragma size), and by the
__attribute__(mode (XX)), so the back-end stuff is already present.
The patch is simple: the C front-end will now calls c_build_pointer_type
(instead of build_pointer_type), which in turn calls
build_pointer_type_for_mode using the right mode.
The handling of the pragma pointer_size simply change the pointer mode for C.
I haven't tried to change other C++ or Obj-C front-ends, because I haven't yet
investigated how they deal with this option on VMS.
This patch was tested on ia64 OpenVMS and also by bootstrapping gcc on x86-64
Darwin.
Tristan.
2012-03-06 Tristan Gingold ging...@adacore.com
* c-tree.h (c_default_pointer_mode): New variable.
* c-decl.c (c_default_pointer_mode): New variable.
(c_build_pointer_type): New function.
(grokdeclarator): Call c_build_pointer_type instead
of build_pointer_type.
* config/vms/vms-c.c: Include c-tree.h
(saved_pointer_mode): New variable.
(handle_pragma_pointer_size): New function.
(vms_pragma_pointer_size, vms_pragma_required_pointer_size): Likewise.
(vms_c_register_pragma): Register __pointer_size and
__required_pointer_size pragmas.
diff --git a/gcc/c-decl.c b/gcc/c-decl.c
index de46578..160d393 100644
--- a/gcc/c-decl.c
+++ b/gcc/c-decl.c
@@ -146,6 +146,10 @@ static int warn_about_return_type;
static bool undef_nested_function;
+/* Mode used to build pointers (VOIDmode means ptr_mode). */
+
+enum machine_mode c_default_pointer_mode = VOIDmode;
+
/* Each c_binding structure describes one binding of an identifier to
a decl. All the decls in a scope - irrespective of namespace - are
@@ -558,6 +562,23 @@ add_stmt (tree t)
return t;
}
+/* Build a pointer type using the default pointer mode. */
+
+static tree
+c_build_pointer_type (tree to_type)
+{
+ addr_space_t as = to_type == error_mark_node? ADDR_SPACE_GENERIC
+ : TYPE_ADDR_SPACE (to_type);
+ enum machine_mode pointer_mode;
+
+ if (as != ADDR_SPACE_GENERIC || c_default_pointer_mode == VOIDmode)
+pointer_mode = targetm.addr_space.pointer_mode (as);
+ else
+pointer_mode = c_default_pointer_mode;
+ return build_pointer_type_for_mode (to_type, pointer_mode, false);
+}
+
+
/* Return true if we will want to say something if a goto statement
crosses DECL. */
@@ -5683,7 +5704,7 @@ grokdeclarator (const struct c_declarator *declarator,
TYPE_NAME (type) = decl;
}
- type = build_pointer_type (type);
+ type = c_build_pointer_type (type);
/* Process type qualifiers (such as const or volatile)
that were given inside the `*'. */
@@ -5918,7 +5939,7 @@ grokdeclarator (const struct c_declarator *declarator,
type = TREE_TYPE (type);
if (type_quals)
type = c_build_qualified_type (type, type_quals);
- type = build_pointer_type (type);
+ type = c_build_pointer_type (type);
type_quals = array_ptr_quals;
if (type_quals)
type = c_build_qualified_type (type, type_quals);
@@ -5937,7 +5958,7 @@ grokdeclarator (const struct c_declarator *declarator,
ISO C forbids qualified function types);
if (type_quals)
type = c_build_qualified_type (type, type_quals);
- type = build_pointer_type (type);
+ type = c_build_pointer_type (type);
type_quals = TYPE_UNQUALIFIED;
}
else if (type_quals)
diff --git a/gcc/c-tree.h b/gcc/c-tree.h
index 51c660c..db60935 100644
--- a/gcc/c-tree.h
+++ b/gcc/c-tree.h
@@ -625,6 +625,10 @@ extern int current_function_returns_abnormally;
extern int system_header_p;
+/* Mode used to build pointers (VOIDmode means ptr_mode). */
+
+extern enum machine_mode c_default_pointer_mode;
+
/* In c-decl.c */
extern void c_finish_incomplete_decl (tree);
extern void c_write_global_declarations (void);
diff --git a/gcc/config/vms/vms-c.c b/gcc/config/vms/vms-c.c
index 4a2d19c..e4f8493 100644
--- a/gcc/config/vms/vms-c.c
+++ b/gcc/config/vms/vms-c.c
@@ -27,6 +27,7 @@ along with GCC; see the file COPYING3. If not see
#include tree.h
#include c-family/c-pragma.h
#include c-family/c-common.h
+#include c-tree.h
#include toplev.h
#include ggc.h
#include tm_p.h
@@ -283,6 +284,70 @@ vms_pragma_extern_prefix (cpp_reader * ARG_UNUSED (dummy))
}
}
+/* #pragma __pointer_size */
+
Re: [PATCH] Improve SCEV for array element
On Fri, Jan 20, 2012 at 10:06 AM, Jiangning Liu jiangning@arm.com wrote:
It's definitely not ok at this stage but at most for next stage1.
OK. I may wait until next stage1.
This is a very narrow pattern-match. It doesn't allow for a[i].x for
example,
even if a[i] is a one-element structure. I think the canonical way of
handling
ADDR_EXPR is to use sth like
base = get_inner_reference (TREE_OPERAND (rhs1, 0), ..., offset, ...);
base = build1 (ADDR_EXPR, TREE_TYPE (rhs1), base);
chrec1 = analyze_scalar_evolution (loop, base);
chrec2 = analyze_scalar_evolution (loop, offset);
chrec1 = chrec_convert (type, chrec1, at_stmt);
chrec2 = chrec_convert (TREE_TYPE (offset), chrec2, at_stmt);
res = chrec_fold_plus (type, chrec1, chrec2);
where you probably need to handle scev_not_known when analyzing offset
(which might be NULL). You also need to add bitpos to the base address
(in bytes, of course). Note that the MEM_REF case would naturally
work
with this as well.
OK. New patch is like below, and bootstrapped on x86-32.
You want instead of
+ if (TREE_CODE (TREE_OPERAND (rhs1, 0)) == ARRAY_REF
+ || TREE_CODE (TREE_OPERAND (rhs1, 0)) == MEM_REF
+ || TREE_CODE (TREE_OPERAND (rhs1, 0)) == COMPONENT_REF)
+{
if (TREE_CODE (TREE_OPERAND (rhs1, 0)) == MEM_REF
|| handled_component_p (TREE_OPERAND (rhs1, 0)))
{
+ base = build1 (ADDR_EXPR, TREE_TYPE (rhs1), base);
+ chrec1 = analyze_scalar_evolution (loop, base);
can you please add a wrapper
tree
analyze_scalar_evolution_for_address_of (struct loop *loop, tree var)
{
return analyze_scalar_evolution (loop, build_fold_addr_expr (var));
}
and call that instead of building the ADDR_EXPR there? We want
to avoid building that tree node, but even such a simple wrapper would
be prefered.
+ if (bitpos)
if (bitpos != 0)
+ chrec3 = build_int_cst (integer_type_node,
+ bitpos / BITS_PER_UNIT);
please use size_int (bitpos / BITS_PER_UNIT) instead. Using
integer_type_node is definitely wrong.
Ok with that changes.
Thanks,
Richard.
ChangeLog:
2012-01-20 Jiangning Liu jiangning@arm.com
* tree-scalar-evolution (interpret_rhs_expr): generate chrec for
array reference and component reference.
ChangeLog for testsuite:
2012-01-20 Jiangning Liu jiangning@arm.com
* gcc.dg/tree-ssa/scev-3.c: New.
* gcc.dg/tree-ssa/scev-4.c: New.
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-3.c
b/gcc/testsuite/gcc.dg/tree-ssa/scev-3.c
new file mode 100644
index 000..28d5c93
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-3.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options -O2 -fdump-tree-optimized } */
+
+int *a_p;
+int a[1000];
+
+f(int k)
+{
+ int i;
+
+ for (i=k; i1000; i+=k) {
+ a_p = a[i];
+ *a_p = 100;
+ }
+}
+
+/* { dg-final { scan-tree-dump-times a 1 optimized } } */
+/* { dg-final { cleanup-tree-dump optimized } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-4.c
b/gcc/testsuite/gcc.dg/tree-ssa/scev-4.c
new file mode 100644
index 000..6c1e530
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-4.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options -O2 -fdump-tree-optimized } */
+
+typedef struct {
+ int x;
+ int y;
+} S;
+
+int *a_p;
+S a[1000];
+
+f(int k)
+{
+ int i;
+
+ for (i=k; i1000; i+=k) {
+ a_p = a[i].y;
+ *a_p = 100;
+ }
+}
+
+/* { dg-final { scan-tree-dump-times a 1 optimized } } */
+/* { dg-final { cleanup-tree-dump optimized } } */
diff --git a/gcc/tree-scalar-evolution.c b/gcc/tree-scalar-evolution.c
index 2077c8d..4e06b75
--- a/gcc/tree-scalar-evolution.c
+++ b/gcc/tree-scalar-evolution.c
@@ -1712,16 +1712,61 @@ interpret_rhs_expr (struct loop *loop, gimple
at_stmt,
switch (code)
{
case ADDR_EXPR:
- /* Handle MEM[ptr + CST] which is equivalent to POINTER_PLUS_EXPR.
*/
- if (TREE_CODE (TREE_OPERAND (rhs1, 0)) != MEM_REF)
- {
- res = chrec_dont_know;
- break;
- }
+ if (TREE_CODE (TREE_OPERAND (rhs1, 0)) == ARRAY_REF
+ || TREE_CODE (TREE_OPERAND (rhs1, 0)) == MEM_REF
+ || TREE_CODE (TREE_OPERAND (rhs1, 0)) == COMPONENT_REF)
+ {
+ enum machine_mode mode;
+ HOST_WIDE_INT bitsize, bitpos;
+ int unsignedp;
+ int volatilep = 0;
+ tree base, offset;
+ tree chrec3;
+
+ base = get_inner_reference (TREE_OPERAND (rhs1, 0),
+ bitsize, bitpos, offset,
+ mode, unsignedp, volatilep, false);
+
+ if (TREE_CODE (base) == MEM_REF)
+ {
+ rhs2 = TREE_OPERAND (base, 1);
+ rhs1 =
Re: Remove obsolete Tru64 UNIX V5.1B support
Jonathan Wakely jwakely@gmail.com writes: On 5 March 2012 17:01, Rainer Orth wrote: * The libstdc++ testsuite is messy since every thing pthread test includes the complete list of targets where it should be run, and the options required. I've long meant to clean this up, but this will have to wait until after osf and irix are gone from the tree. That would be fantastic if you do clean it up some time. This has been on my agenda for a long time. Hopefully I'll get around to it this time ;-) The libstdc++ parts of this patch are OK. Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: Remove obsolete Tru64 UNIX V5.1B support
Joseph S. Myers jos...@codesourcery.com writes: There's one particular issue: the change to java/io/File.java required my to regenerate the .class file in classpath. I've used Sun javac -target 1.5 for that and hope I got it right. I'd have expected regeneration to use GCJ built to use ECJ, though I don't know. I've never tried this. Given that the .class file lives below libjava/classpath and has to be synced with upstream Classpath anyway, I hope the Java maintainers will take care of that. At least with the javac-built File.class I had no libjava testsuite failures. * With the removal of #pragma extern_prefix support, gcc/po/gcc.pot needs to be regenerated. Since I'm not positive I have the right tools and trying found unrelated changes, I've omitted that change. There is no expectation that anyone changing diagnostics regenerates this file; it's regenerated as needed before submission to the Translation Project. Ok, thanks. gcc: * config.gcc (alpha*-dec-osf5.1*): Remove. I'd suggest removing the extra_passes mechanism in the followup since this was the only user of that mechanism in config.gcc. Yup, will do. * target.def (handle_pragma_extern_prefix): Remove. Removed hooks should be poisoned in system.h. Ok. Greping for current occurences obviously missed this :-) Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
[Patch,AVR]: Fix PR52507
This fixes a wrong loop label in the movmemhi worker for the __memx address space case. Ok for trunk? Johann PR target/52507 * config/avr/lib1funcs.S (__movmemx_hi): Fix loop label in RAM-part. Index: libgcc/config/avr/lib1funcs.S === --- libgcc/config/avr/lib1funcs.S (revision 184887) +++ libgcc/config/avr/lib1funcs.S (working copy) @@ -2252,7 +2252,7 @@ DEFUN __movmemx_hi ;; and store that Byte to RAM Destination st X+, r0 sbiwLOOP, 1 -brne0b +brne1b ret ENDF __movmemx_hi
Re: Remove obsolete Tru64 UNIX V5.1B support
Bruce Korb bk...@gnu.org writes: On Mon, Mar 5, 2012 at 3:13 PM, Joseph S. Myers jos...@codesourcery.com wrote: On Mon, 5 Mar 2012, Rainer Orth wrote: * There are some fixincludes hacks that from their names seem to be osf-specific, but are not restricted to alpha*-dec-osf*. Bruce, what's the best way to handle those? Disable them e.g. with a mach clause like unused-alpha*-dec-osf* and see if anything else breaks? I'd favour just removing any fixes that it seems likely are no longer useful. I favor it for now, but I think being more aggressive is a good thing. #define REGEX_COUNT 265 #define MACH_LIST_SIZE_LIMIT 181 #define FIX_COUNT223 I believe that headers have likely improved in the last decade. I do doubt that there are twice as many actively needed patches to headers required now versus then. Certainly true, especially with old targets like Tru64 UNIX and IRIX on the way out. My current list of fixes that are likely osf-specific, but isn't tagged as such, includes alpha___assert alpha_assert alpha_if_semicolon (osf4) alpha_parens cxx_unready osf_namespace_a, tests/base/reg_types.h osf_namespace_c, tests/base/regex.h sysv68_string (ffs) ultrix_const ultrix_const2 Some of them appear to be more generic, so it's probably safer to keep them until your proposed mechanism for collecting usage data is in place. Either way, they don't need to go in the first round of the removal patch. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: Remove obsolete Tru64 UNIX V5.1B support
Arnaud Charlet char...@adacore.com writes: The gnattools and gcc/ada parts are OK, except for the comment removal in s-tassta.adb: this comment is still useful, and needs to be revisited at some point ratheer than removed silently as you did, to understand why we can't use a when E: others = construct. So either remove the s-tassta.adb hunk, or extend the comment, but removing it would be wrong. Ok, I'll just keep it. Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: Remove obsolete Tru64 UNIX V5.1B support
Tristan,
* As I've mentioned, I've ripped out the #pragma extern_prefix support:
while VMS has something similar, it doesn't use the common code.
in fact VMS use some of the already existing #pragma extern_prefix support.
You're removing too much code here !
oops, seems I was too eager to get rid of the cruft ;-)
Commenting only the relevant part:
diff --git a/gcc/c-family/c-cppbuiltin.c b/gcc/c-family/c-cppbuiltin.c
--- a/gcc/c-family/c-cppbuiltin.c
+++ b/gcc/c-family/c-cppbuiltin.c
@@ -1,6 +1,6 @@
/* Define builtin-in macros for the C family front ends.
- Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
- Free Software Foundation, Inc.
+ Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
+ 2011, 2012 Free Software Foundation, Inc.
This file is part of GCC.
@@ -886,9 +886,6 @@ c_cpp_builtins (cpp_reader *pfile)
/* Show the availability of some target pragmas. */
cpp_define (pfile, __PRAGMA_REDEFINE_EXTNAME);
- if (targetm.handle_pragma_extern_prefix)
-cpp_define (pfile, __PRAGMA_EXTERN_PREFIX);
VMS doesn't reference this macro, so you could remove it.
It's not even used in the Tru64 UNIX system headers; I suppose it was
introduced for symmetry with __PRAGMA_REDEFINE_EXTNAME.
-/* GCC supports two #pragma directives for renaming the external
+/* GCC supports a #pragma directive for renaming the external
symbol associated with a declaration (DECL_ASSEMBLER_NAME), for
- compatibility with the Solaris and Tru64 system headers. GCC also
+ compatibility with the Solaris system headers. GCC also
has its own notation for this, __asm__(name) annotations.
Corner cases of these features and their interaction:
- 1) Both pragmas silently apply only to declarations with external
+ 1) The pragma silently applies only to declarations with external
linkage (that is, TREE_PUBLIC || DECL_EXTERNAL). Asm labels
do not have this restriction.
- 2) In C++, both #pragmas silently apply only to extern C declarations.
+ 2) In C++, the #pragma silently applies only to extern C declarations.
Asm labels do not have this restriction.
- 3) If any of the three ways of changing DECL_ASSEMBLER_NAME is
+ 3) If any of the two ways of changing DECL_ASSEMBLER_NAME is
applied to a decl whose DECL_ASSEMBLER_NAME is already set, and the
new name is different, a warning issues and the name does not change.
4) The source name for #pragma redefine_extname is the DECL_NAME,
- *not* the DECL_ASSEMBLER_NAME.
-
- 5) If #pragma extern_prefix is in effect and a declaration occurs
- with an __asm__ name, the #pragma extern_prefix is silently
- ignored for that declaration.
-
- 6) If #pragma extern_prefix and #pragma redefine_extname apply to
- the same declaration, whichever triggered first wins, and a warning
- is issued. (We would like to have #pragma redefine_extname always
- win, but it can appear either before or after the declaration, and
- if it appears afterward, we have no way of knowing whether a modified
- DECL_ASSEMBLER_NAME is due to #pragma extern_prefix.) */
+ *not* the DECL_ASSEMBLER_NAME. */
I think the comments would still apply.
Ok. I had assumed that the vms handling of #pragma extern_prefix is
completely independent of the one in c-pragma.c.
-/* #pragma extern_prefix prefix */
-static void
-handle_pragma_extern_prefix (cpp_reader * ARG_UNUSED (dummy))
-{
- tree prefix, x;
- enum cpp_ttype t;
-
- if (pragma_lex (prefix) != CPP_STRING)
-GCC_BAD (malformed #pragma extern_prefix, ignored);
- t = pragma_lex (x);
- if (t != CPP_EOF)
-warning (OPT_Wpragmas, junk at end of %#pragma extern_prefix%);
-
- if (targetm.handle_pragma_extern_prefix)
-/* Note that the length includes the null terminator. */
-pragma_extern_prefix = (TREE_STRING_LENGTH (prefix) 1 ? prefix :
NULL);
- else if (warn_unknown_pragmas in_system_header)
-warning (OPT_Wunknown_pragmas,
- #pragma extern_prefix not supported on this target);
-}
-
Currently, the #pragma __extern_prefix is handled by vms-c.c, which is
slightly more powerful than the tru64 version.
It would be easier to me if the above version were removed!
Yup, will do.
/* Hook from the front ends to apply the results of one of the preceding
pragmas that rename variables. */
@@ -580,35 +545,12 @@ maybe_apply_renaming_pragma (tree decl,
return asmname;
}
-/* Otherwise we use what we've got; #pragma extern_prefix is
- silently ignored. */
+/* Otherwise we use what we've got. */
return build_string (IDENTIFIER_LENGTH (newname),
IDENTIFIER_POINTER (newname));
}
- /* If we've got an asmname, #pragma extern_prefix is silently ignored. */
- if (asmname)
-return asmname;
-
-
[Patch,AVR] Fix PR52505
This is fix for __memx address space reads that might read from RAM or flash.
For flash reads, never read from RAM so that I/O latches don't get read out
unintentionally.
Ok for trunk?
Johann
libgcc/
PR target/52505
* config/avr/lib1funcs.S (__xload_1): Don't read unintentionally
from RAM.
gcc/
PR target/52505
* config/avr/avr.c (avr_out_xload): Don't read unintentionally
from RAM.
* config/avr/avr.md (xload_8): Adjust insn length.
Index: libgcc/config/avr/lib1funcs.S
===
--- libgcc/config/avr/lib1funcs.S (revision 184887)
+++ libgcc/config/avr/lib1funcs.S (working copy)
@@ -2119,6 +2119,7 @@ ENDF __load_4
#if defined (L_xload_1)
DEFUN __xload_1
#if defined (__AVR_HAVE_LPMX__) !defined (__AVR_HAVE_RAMPZ__)
+sbrcHHI8, 7
ld D0, Z
sbrsHHI8, 7
lpm D0, Z
Index: gcc/config/avr/avr.c
===
--- gcc/config/avr/avr.c (revision 184887)
+++ gcc/config/avr/avr.c (working copy)
@@ -2782,8 +2782,9 @@ avr_out_xload (rtx insn ATTRIBUTE_UNUSED
if (plen)
*plen = 0;
- avr_asm_len (ld %3,%a2 CR_TAB
- sbrs %1,7, xop, plen, 2);
+ avr_asm_len (sbrc %1,7 CR_TAB
+ ld %3,%a2 CR_TAB
+ sbrs %1,7, xop, plen, 3);
avr_asm_len (AVR_HAVE_LPMX ? lpm %3,%a2 : lpm, xop, plen, 1);
Index: gcc/config/avr/avr.md
===
--- gcc/config/avr/avr.md (revision 184919)
+++ gcc/config/avr/avr.md (working copy)
@@ -363,6 +363,11 @@ (define_split
;;
;; Move stuff around
+;; loadqi_libgcc
+;; loadhi_libgcc
+;; loadpsi_libgcc
+;; loadsi_libgcc
+;; loadsf_libgcc
(define_expand loadmode_libgcc
[(set (match_dup 3)
(match_dup 2))
@@ -377,7 +382,12 @@ (define_expand loadmode_libgcc
operands[1] = replace_equiv_address (operands[1], operands[3]);
set_mem_addr_space (operands[1], ADDR_SPACE_FLASH);
})
-
+
+;; load_qi_libgcc
+;; load_hi_libgcc
+;; load_psi_libgcc
+;; load_si_libgcc
+;; load_sf_libgcc
(define_insn load_mode_libgcc
[(set (reg:MOVMODE 22)
(match_operand:MOVMODE 0 memory_operand m,m))]
@@ -418,6 +428,11 @@ (define_insn_and_split xload8_A
DONE;
})
+;; xloadqi_A
+;; xloadhi_A
+;; xloadpsi_A
+;; xloadsi_A
+;; xloadsf_A
(define_insn_and_split xloadmode_A
[(set (match_operand:MOVMODE 0 register_operand =r)
(match_operand:MOVMODE 1 memory_operandm))
@@ -461,7 +476,7 @@ (define_insn xload_8
{
return avr_out_xload (insn, operands, NULL);
}
- [(set_attr length 3,4)
+ [(set_attr length 4,4)
(set_attr adjust_len *,xload)
(set_attr isa lpmx,lpm)
(set_attr cc none)])
[PATCH][1/n] No longer sign-extend sizetype constants, remove TYPE_IS_SIZETYPE
This splits out some small chunks from the patch killing
TYPE_IS_SIZETYPE. It introduces a helper function that
performs object-size checks and uses it in the few places
that would need adjustments when host_integerp is no longer
appropriate for verifying that the size fits in half of the
address-space.
Bootstrapped and tested on x86_64-unknown-linux-gnu, ok for trunk?
--
Eric, this starts the series of getting rid of TYPE_IS_SIZETYPE.
This patch will break Ada bootstrap (fixed by subsequent patches),
because copy_and_substitute_in_size () will sometimes (in this
case for the secondary stack size) compute a constant TYPE_SIZE_UNIT
with TREE_OVERFLOW set (compiling s-secsta.adb). With the theory that
sizetypes cannot have overflow this looks like a latent bug somewhere in
the construction of the expression that leads to it. When sizetypes
are finally unsigned the overflow bit will not be set anymore and
this bug does not trigger.
Happens when substitute_in_expr with
exp = (sizetype) ((bitsizetype) -PLACEHOLDER_EXPR struct
system__secondary_stack__chunk_id.first + 10241)
f = first
r = 1
we then convert bitsizetype 0x12800 to sizetype via
fold_convert_const_int_from_int (this is -m32 multilib), which
leads to an overflowed value. Not sure how we arrive at this
call of substitute_in_expr as the original expression we substitute in
is
((sizetype) (_GLOBAL.SZ4_system.secondary_stack (PLACEHOLDER_EXPR struct
system__secondary_stack__chunk_id.last, PLACEHOLDER_EXPR struct
system__secondary_stack__chunk_id.first) /[cl] 8) + 15 -16) + 16
and thus the bitsize quantity _GLOBAL.SZ4_system.secondary_stack
(PLACEHOLDER_EXPR struct
system__secondary_stack__chunk_id.last, PLACEHOLDER_EXPR struct
system__secondary_stack__chunk_id.first) is first divided by 8
and _then_ converted to sizetype. I suspect some existing bug
in some re-association. It's appearantly not
2011-09-04 Richard Guenther rguent...@suse.de
Revert
2011-08-31 Richard Guenther rguent...@suse.de
* fold-const.c (extract_muldiv_1): Remove bogus TYPE_IS_SIZETYPE
special-casing.
though.
I'm not sure how much I need to care for Ada at this point, and I am
definitely wanting to kill off TYPE_IS_SIZETYPE and sizetypes
sign-extending. That's a definite prerequesite to continue on
no-undefined-overflow.
--
Thanks,
Richard.
2012-03-06 Richard Guenther rguent...@suse.de
* tree.c (valid_constant_size_p): New function.
* tree.h (valid_constant_size_p): Declare.
* cfgexpand.c (expand_one_var): Adjust check for too large
variables by using valid_constant_size_p.
* varasm.c (assemble_variable): Likewise.
c/
* c-decl.c (grokdeclarator): Properly check for sizes that
cover more than half of the address-space.
cp/
* decl.c (grokdeclarator): Properly check for sizes that
cover more than half of the address-space.
Index: trunk/gcc/tree.c
===
*** trunk.orig/gcc/tree.c 2011-09-05 15:27:16.0 +0200
--- trunk/gcc/tree.c2011-09-05 15:51:20.0 +0200
*** compare_tree_int (const_tree t, unsigned
*** 6782,6787
--- 6774,6793
return 1;
}
+ /* Return true if SIZE represents a constant size that is in bounds of
+what the middle-end and the backend accepts (covering not more than
+half of the address-space). */
+
+ bool
+ valid_constant_size_p (const_tree size)
+ {
+ if (! host_integerp (size, 1)
+ || TREE_OVERFLOW (size)
+ || tree_int_cst_sign_bit (size) != 0)
+ return false;
+ return true;
+ }
+
/* Return true if CODE represents an associative tree code. Otherwise
return false. */
bool
Index: trunk/gcc/varasm.c
===
*** trunk.orig/gcc/varasm.c 2011-09-05 15:27:16.0 +0200
--- trunk/gcc/varasm.c 2011-09-05 16:03:53.0 +0200
*** assemble_variable (tree decl, int top_le
*** 1980,1986
return;
if (! dont_output_data
!! host_integerp (DECL_SIZE_UNIT (decl), 1))
{
error (size of variable %q+D is too large, decl);
return;
--- 1980,1986
return;
if (! dont_output_data
!! valid_constant_size_p (DECL_SIZE_UNIT (decl)))
{
error (size of variable %q+D is too large, decl);
return;
Index: trunk/gcc/c-decl.c
===
*** trunk.orig/gcc/c-decl.c 2011-09-05 15:27:16.0 +0200
--- trunk/gcc/c-decl.c 2011-09-05 15:51:20.0 +0200
*** grokdeclarator (const struct c_declarato
*** 5708,5719
if (bitfield)
check_bitfield_type_and_width (type, width, name);
! /* Did array size calculations overflow? */
!
if (TREE_CODE (type) == ARRAY_TYPE
COMPLETE_TYPE_P (type)
TREE_CODE
Re: [PATCH] Fix for PR52081 - Missed tail merging with pure calls
On Mon, Feb 13, 2012 at 1:36 PM, Tom de Vries tom_devr...@mentor.com wrote:
On 13/02/12 12:54, Richard Guenther wrote:
On Thu, Feb 2, 2012 at 11:44 AM, Tom de Vries tom_devr...@mentor.com wrote:
Richard,
this patch fixes PR52801.
Consider test-case pr51879-12.c:
...
__attribute__((pure)) int bar (int);
__attribute__((pure)) int bar2 (int);
void baz (int);
int x, z;
void
foo (int y)
{
int a = 0;
if (y == 6)
{
a += bar (7);
a += bar2 (6);
}
else
{
a += bar2 (6);
a += bar (7);
}
baz (a);
}
...
When compiling at -O2, pr51879-12.c.094t.pre looks like this:
...
# BLOCK 3 freq:1991
# PRED: 2 [19.9%] (true,exec)
# VUSE .MEMD.1722_12(D)
# USE = nonlocal escaped
D.1717_4 = barD.1703 (7);
# VUSE .MEMD.1722_12(D)
# USE = nonlocal escaped
D.1718_6 = bar2D.1705 (6);
aD.1713_7 = D.1717_4 + D.1718_6;
goto bb 5;
# SUCC: 5 [100.0%] (fallthru,exec)
# BLOCK 4 freq:8009
# PRED: 2 [80.1%] (false,exec)
# VUSE .MEMD.1722_12(D)
# USE = nonlocal escaped
D.1720_8 = bar2D.1705 (6);
# VUSE .MEMD.1722_12(D)
# USE = nonlocal escaped
D.1721_10 = barD.1703 (7);
aD.1713_11 = D.1720_8 + D.1721_10;
# SUCC: 5 [100.0%] (fallthru,exec)
# BLOCK 5 freq:1
# PRED: 3 [100.0%] (fallthru,exec) 4 [100.0%] (fallthru,exec)
# aD.1713_1 = PHI aD.1713_7(3), aD.1713_11(4)
# .MEMD.1722_13 = VDEF .MEMD.1722_12(D)
# USE = nonlocal
# CLB = nonlocal
bazD.1707 (aD.1713_1);
# VUSE .MEMD.1722_13
return;
...
block 3 and 4 can be tail-merged.
Value numbering numbers the two phi arguments a_7 and a_11 the same so the
problem is not in value numbering:
...
Setting value number of a_11 to a_7 (changed)
...
There are 2 reasons that tail_merge_optimize doesn't optimize this:
1.
The clause
is_gimple_assign (stmt) local_def (gimple_get_lhs (stmt))
!gimple_has_side_effects (stmt)
used in both same_succ_hash and gsi_advance_bw_nondebug_nonlocal evaluates
to
false for pure calls.
This is fixed by replacing is_gimple_assign with gimple_has_lhs.
2.
In same_succ_equal we check gimples from the 2 bbs side-by-side:
...
gsi1 = gsi_start_nondebug_bb (bb1);
gsi2 = gsi_start_nondebug_bb (bb2);
while (!(gsi_end_p (gsi1) || gsi_end_p (gsi2)))
{
s1 = gsi_stmt (gsi1);
s2 = gsi_stmt (gsi2);
if (gimple_code (s1) != gimple_code (s2))
return 0;
if (is_gimple_call (s1) !gimple_call_same_target_p (s1, s2))
return 0;
gsi_next_nondebug (gsi1);
gsi_next_nondebug (gsi2);
}
...
and we'll be comparing 'bar (7)' and 'bar2 (6)', and
gimple_call_same_target_p
will return false.
This is fixed by ignoring local defs in this comparison, by using
gsi_advance_fw_nondebug_nonlocal on the iterators.
bootstrapped and reg-tested on x86_64.
ok for stage1?
Sorry for responding so late ...
no problem :)
I think these fixes hint at that we should
use structural equality as fallback if value-numbering doesn't equate
two stmt effects. Thus, treat two stmts with exactly the same operands
and flags as equal and using value-numbering to canonicalize operands
(when they are SSA names) for that comparison, or use VN entirely
if there are no side-effects on the stmt.
Changing value-numbering of virtual operands, even if it looks correct in the
simple cases you change, doesn't look like a general solution for the missed
tail merging opportunities.
Your comment is relevant for the other recent tail-merge related fixes I
submitted, but I think not for this one.
In this case, value-numbering manages to value number the 2 phi-alternatives
equal. It's tail-merging that doesn't take advantage of this, by treating pure
function calls the same as non-pure function calls. The fixes are therefore in
tail-merging, not in value numbering.
So, ok for stage1?
I see. A few comments.
+/* Returns whether VAL is used in the same bb as in which it is defined, or
+ in the phi of a successor bb. */
+
+static bool
+local_def (tree val)
+{
+ gimple stmt, def_stmt;
+ basic_block bb, def_bb;
+ imm_use_iterator iter;
+ bool res;
+
+ if (TREE_CODE (val) != SSA_NAME)
+return false;
what about SSA_NAME_IS_DEFAULT_DEF names? They have a def-stmt
with a NULL basic-block.
+ res = true;
+ FOR_EACH_IMM_USE_STMT (stmt, iter, val)
+{
+ bb = gimple_bb (stmt);
+ if (bb == def_bb)
+ continue;
+ if (gimple_code (stmt) == GIMPLE_PHI
+ find_edge (def_bb, bb))
+ continue;
+ res = false;
+ BREAK_FROM_IMM_USE_STMT (iter);
I'd use FOR_EACH_IMM_USE_FAST here, that should be faster (avoids
the iterator marker writes), and find_edge can be replaced by
PHI_ARG_INDEX_FROM_USE () - well, you get the edge index that way,
so EDGE_PRED (def_bb, PHI_ARG_INDEX_FROM_USE (use_p)) == bb
would be the condition to test.
local_def seems to be only used from stmt_local_def, consider
inlining it there instead. Btw, what about other DEFs of a stmt
4.4 branch frozen
Hi! The 4.4 branch is now frozen, all commits require RM approval. There will be the 4.4.7 release next week released from it and after that the branch will be closed. Jakub
Re: PATCH [1/n] addr32: Properly use Pmode and word_mode
On Mon, Mar 5, 2012 at 9:11 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Sun, Mar 4, 2012 at 11:47 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Mon, Mar 5, 2012 at 4:53 AM, H.J. Lu hjl.to...@gmail.com wrote:
and compiler does generate the same output. i386.c also has
xasm = jmp\t%A0;
xasm = call\t%A0;
for calls. There are no separate indirect call patterns. For x32,
only indirect register calls have to be in DImode. The direct call
should be in Pmode (SImode).
Direct call just expects label to some abolute address that is assumed
to fit in 32 bits (see constant_call_address_operand_p).
call and jmp insn expect word_mode operands, so please change
ix86_expand_call and call patterns in the same way as jump
instructions above.
Since x86-64 hardware always zero-extends upper 32bits of 64bit
registers when loading its lower 32bits, it is safe and easier to just
to output 64bit registers for %A than zero-extend it by hand for all
jump/call patterns.
No, the instruction expects word_mode operands, so we have to extend
values to expected mode. I don't think that patching at insn output
time is acceptable.
You are right. I found a testcase to show problem:
struct foo
{
void (*f) (void);
int i;
};
void
__attribute__ ((noinline))
bar (struct foo x)
{
x.f ();
}
x is passed in RDI and the uppper 32bits of RDI is int i.
Operand 1 of calls must be in Pmode for SYMOL_REF and word_mode
for register. When I removed :P like
@@ -11423,7 +11428,7 @@
(define_insn *call_value
[(set (match_operand 0 )
- (call (mem:QI (match_operand:P 1 call_insn_operand czw))
+ (call (mem:QI (match_operand 1 call_insn_operand czw))
(match_operand 2 )))]
!SIBLING_CALL_P (insn)
* return ix86_output_call_insn (insn, operands[1]);
I got
In file included from
/net/gnu-6/export/gnu/import/git/gcc-addr32/libgcc/unwind-dw2.c:1633:0:
/net/gnu-6/export/gnu/import/git/gcc-addr32/libgcc/unwind.inc: In
function \u2018_Unwind_ForcedUnwind_Phase2\u2019:
/net/gnu-6/export/gnu/import/git/gcc-addr32/libgcc/unwind.inc:189:1:
error: unable to find a register to spill in class \u2018CREG\u2019
/net/gnu-6/export/gnu/import/git/gcc-addr32/libgcc/unwind.inc:189:1:
error: this is the insn:
(call_insn 62 60 63 9 (set (reg:SI 0 ax)
(call (mem:QI (reg/f:DI 0 ax [orig:88 D.9044 ] [88]) [0
*D.9044_25 S1 A8])
(const_int 0 [0])))
/net/gnu-6/export/gnu/import/git/gcc-addr32/libgcc/unwind.inc:175 629
{*call_value}
(expr_list:REG_DEAD (reg/f:DI 0 ax [orig:88 D.9044 ] [88])
(expr_list:REG_DEAD (reg:DI 37 r8)
(expr_list:REG_DEAD (reg:SI 5 di)
(expr_list:REG_DEAD (reg:SI 4 si)
(expr_list:REG_DEAD (reg:DI 2 cx)
(expr_list:REG_DEAD (reg:DI 1 dx)
(nil)))
(expr_list:REG_BR_PRED (use (reg:SI 5 di))
(expr_list:REG_BR_PRED (use (reg:SI 4 si))
(expr_list:REG_FRAME_RELATED_EXPR (use (reg:DI 1 dx))
(expr_list:REG_BR_PRED (use (reg:DI 2 cx))
(expr_list:REG_BR_PRED (use (reg:DI 37 r8))
(nil)))
/net/gnu-6/export/gnu/import/git/gcc-addr32/libgcc/unwind.inc:189:1:
internal compiler error: in spill_failure, at reload1.c:2120
Please submit a full bug report,
with preprocessed source if appropriate.
See http://gcc.gnu.org/bugs.html for instructions.
Here is a patch to duplicate function symbol to change it from Pmode
to word_mode. It seems to work. But I am not sure if it is the
right approach. Any suggestions?
Thanks.
--
H.J.
---
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1828cf6..26e23c7 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -22976,6 +22975,19 @@ construct_plt_address (rtx symbol)
return tmp;
}
+static rtx
+duplicate_function_symbol_ref (enum machine_mode mode, rtx fnaddr)
+{
+ rtx dup_symbol_ref;
+ gcc_assert (!SYMBOL_REF_HAS_BLOCK_INFO_P (fnaddr));
+ dup_symbol_ref = gen_rtx_SYMBOL_REF (mode, XSTR (fnaddr, 0));
+ SYMBOL_REF_USED (dup_symbol_ref) = SYMBOL_REF_USED (fnaddr);
+ SYMBOL_REF_WEAK (dup_symbol_ref) = SYMBOL_REF_WEAK (fnaddr);
+ SET_SYMBOL_REF_DECL (dup_symbol_ref, SYMBOL_REF_DECL (fnaddr));
+ SYMBOL_REF_FLAGS (dup_symbol_ref) = SYMBOL_REF_FLAGS (fnaddr);
+ return dup_symbol_ref;
+}
+
rtx
ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
rtx callarg2,
@@ -23026,13 +23038,22 @@ ix86_expand_call (rtx retval, rtx fnaddr,
rtx callarg1,
!local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode))
fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0)));
else if (sibcall
- ? !sibcall_insn_operand (XEXP (fnaddr, 0), Pmode)
- : !call_insn_operand (XEXP (fnaddr, 0), Pmode))
+ ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode)
+ : !call_insn_operand (XEXP (fnaddr, 0), word_mode))
{
fnaddr = XEXP (fnaddr, 0);
- if
Re: [PATCH][1/n] No longer sign-extend sizetype constants, remove TYPE_IS_SIZETYPE
On Tue, 6 Mar 2012, Richard Guenther wrote: This splits out some small chunks from the patch killing TYPE_IS_SIZETYPE. It introduces a helper function that performs object-size checks and uses it in the few places that would need adjustments when host_integerp is no longer appropriate for verifying that the size fits in half of the address-space. Bootstrapped and tested on x86_64-unknown-linux-gnu, ok for trunk? -- Eric, this starts the series of getting rid of TYPE_IS_SIZETYPE. This patch will break Ada bootstrap (fixed by subsequent patches), because copy_and_substitute_in_size () will sometimes (in this case for the secondary stack size) compute a constant TYPE_SIZE_UNIT with TREE_OVERFLOW set (compiling s-secsta.adb). With the theory that sizetypes cannot have overflow this looks like a latent bug somewhere in the construction of the expression that leads to it. When sizetypes are finally unsigned the overflow bit will not be set anymore and this bug does not trigger. Happens when substitute_in_expr with exp = (sizetype) ((bitsizetype) -PLACEHOLDER_EXPR struct system__secondary_stack__chunk_id.first + 10241) f = first r = 1 we then convert bitsizetype 0x12800 to sizetype via fold_convert_const_int_from_int (this is -m32 multilib), which leads to an overflowed value. Not sure how we arrive at this call of substitute_in_expr as the original expression we substitute in is ((sizetype) (_GLOBAL.SZ4_system.secondary_stack (PLACEHOLDER_EXPR struct system__secondary_stack__chunk_id.last, PLACEHOLDER_EXPR struct system__secondary_stack__chunk_id.first) /[cl] 8) + 15 -16) + 16 and thus the bitsize quantity _GLOBAL.SZ4_system.secondary_stack (PLACEHOLDER_EXPR struct system__secondary_stack__chunk_id.last, PLACEHOLDER_EXPR struct system__secondary_stack__chunk_id.first) is first divided by 8 and _then_ converted to sizetype. I suspect some existing bug in some re-association. It's appearantly not 2011-09-04 Richard Guenther rguent...@suse.de Revert 2011-08-31 Richard Guenther rguent...@suse.de * fold-const.c (extract_muldiv_1): Remove bogus TYPE_IS_SIZETYPE special-casing. though. I'm not sure how much I need to care for Ada at this point, and I am definitely wanting to kill off TYPE_IS_SIZETYPE and sizetypes sign-extending. That's a definite prerequesite to continue on no-undefined-overflow. Btw, digging down this rat-hole again shows that the first issue you hit is the negative DECL_FIELD_OFFSETs. If you paper over some issues with 2011-09-02 Richard Guenther rguent...@suse.de ada/ * gcc-interface/utils.c (shift_unc_components_for_thin_pointers): Drop overflow bit on negative offsets. Index: trunk/gcc/ada/gcc-interface/utils.c === *** trunk.orig/gcc/ada/gcc-interface/utils.c2012-03-06 16:00:04.0 +0100 --- trunk/gcc/ada/gcc-interface/utils.c 2012-03-06 16:04:26.0 +0100 *** shift_unc_components_for_thin_pointers ( *** 3447,3452 --- 3447,3460 DECL_FIELD_OFFSET (bounds_field) = size_binop (MINUS_EXPR, size_zero_node, byte_position (array_field)); + /* The above computation overflows to a negative unsigned value. + Drop the overflow flag. */ + if (TREE_CODE (DECL_FIELD_OFFSET (bounds_field)) == INTEGER_CST +TREE_OVERFLOW (DECL_FIELD_OFFSET (bounds_field))) + DECL_FIELD_OFFSET (bounds_field) + = build_int_cst_wide (sizetype, + TREE_INT_CST_LOW (DECL_FIELD_OFFSET (bounds_field)), + TREE_INT_CST_HIGH (DECL_FIELD_OFFSET (bounds_field))); DECL_FIELD_OFFSET (array_field) = size_zero_node; DECL_FIELD_BIT_OFFSET (array_field) = bitsize_zero_node; Index: trunk/gcc/ada/gcc-interface/trans.c === *** trunk.orig/gcc/ada/gcc-interface/trans.c2012-03-06 16:00:03.0 +0100 --- trunk/gcc/ada/gcc-interface/trans.c 2012-03-06 16:02:37.0 +0100 *** Attribute_to_gnu (Node_Id gnat_node, tre *** 1959,1964 --- 1959,1971 gnu_type = TYPE_OBJECT_RECORD_TYPE (gnu_type); gnu_result = size_binop (MINUS_EXPR, bitsize_zero_node, bit_position (TYPE_FIELDS (gnu_type))); + /* The above computation overflows from negative to positive. +Drop the overflow flag. */ + if (TREE_CODE (gnu_result) == INTEGER_CST + TREE_OVERFLOW (gnu_result)) + gnu_result = build_int_cst_wide (bitsizetype, +TREE_INT_CST_LOW (gnu_result), +TREE_INT_CST_HIGH (gnu_result)); gnu_result_type = get_unpadded_type (Etype (gnat_node)); prefix_unused = true; break; then you run into the above code gnu_result = size_binop
Re: [patch] fix memory corruption bug in tm_region_init
On 03/05/12 12:47, Richard Henderson wrote:
On 03/05/2012 10:37 AM, Aldy Hernandez wrote:
I thought there'd be a lot less overhead by callocing the value myself. Is the
overhead negligible?
Yes, it's negligible.
I can certainly make it a VEC in a follow up patch if you want, though I'll
commit this now so I can at get Rainer and Torvald happy while I do so.
Certainly.
r~
Conversion to vectors.
I reduced the count to just last_basic_blocks, as I don't think we need
to add NUM_FIXED_BLOCKS. The original NUM_FIXED_BLOCKS was probably a
kludge because I was using the wrong size and things didn't match.
I also changed the name so we don't get confused any more :).
OK for trunk and 4.7 branch?
* trans-mem.c: New typedef for tm_region_p.
Define vector types for tm_region_p.
(tm_region_init): Replace region_worklist to a vector called
bb_regions.
Index: trans-mem.c
===
--- trans-mem.c (revision 184949)
+++ trans-mem.c (working copy)
@@ -1757,6 +1757,10 @@ struct tm_region
bitmap irr_blocks;
};
+typedef struct tm_region *tm_region_p;
+DEF_VEC_P (tm_region_p);
+DEF_VEC_ALLOC_P (tm_region_p, heap);
+
/* True if there are pending edge statements to be committed for the
current function being scanned in the tmmark pass. */
bool pending_edge_inserts_p;
@@ -1858,7 +1862,8 @@ tm_region_init (struct tm_region *region
VEC(basic_block, heap) *queue = NULL;
bitmap visited_blocks = BITMAP_ALLOC (NULL);
struct tm_region *old_region;
- struct tm_region **region_worklist;
+ VEC(tm_region_p, heap) *bb_regions;
+ int i;
all_tm_regions = region;
bb = single_succ (ENTRY_BLOCK_PTR);
@@ -1866,17 +1871,18 @@ tm_region_init (struct tm_region *region
/* We could store this information in bb-aux, but we may get called
through get_all_tm_blocks() from another pass that may be already
using bb-aux. */
- region_worklist =
-(struct tm_region **) xcalloc (sizeof (struct tm_region *),
- last_basic_block + NUM_FIXED_BLOCKS);
+ bb_regions = VEC_alloc (tm_region_p, heap, last_basic_block);
+ VEC_reserve (tm_region_p, heap, bb_regions, last_basic_block);
+ for (i = 0; i last_basic_block; ++i)
+VEC_quick_insert (tm_region_p, bb_regions, i, NULL);
VEC_safe_push (basic_block, heap, queue, bb);
- region_worklist[bb-index] = region;
+ VEC_replace (tm_region_p, bb_regions, bb-index, region);
do
{
bb = VEC_pop (basic_block, queue);
- region = region_worklist[bb-index];
- region_worklist[bb-index] = NULL;
+ region = VEC_index (tm_region_p, bb_regions, bb-index);
+ VEC_replace (tm_region_p, bb_regions, bb-index, NULL);
/* Record exit and irrevocable blocks. */
region = tm_region_init_1 (region, bb);
@@ -1898,15 +1904,15 @@ tm_region_init (struct tm_region *region
the entry block of the new region is associated with this region.
Other successors are still part of the old region. */
if (old_region != region e-dest != region-entry_block)
- region_worklist[e-dest-index] = old_region;
+ VEC_replace (tm_region_p, bb_regions, e-dest-index, old_region);
else
- region_worklist[e-dest-index] = region;
+ VEC_replace (tm_region_p, bb_regions, e-dest-index, region);
}
}
while (!VEC_empty (basic_block, queue));
VEC_free (basic_block, heap, queue);
BITMAP_FREE (visited_blocks);
- free (region_worklist);
+ VEC_free (tm_region_p, heap, bb_regions);
}
/* The gate function for all transactional memory expansion and optimization
Re: [patch] fix memory corruption bug in tm_region_init
On 03/06/12 07:55, Aldy Hernandez wrote: + bb_regions = VEC_alloc (tm_region_p, heap, last_basic_block); + VEC_reserve (tm_region_p, heap, bb_regions, last_basic_block); + for (i = 0; i last_basic_block; ++i) +VEC_quick_insert (tm_region_p, bb_regions, i, NULL); The reserve is redundant, since you already did that in the alloc. You're looking for VEC_safe_grow_cleared here instead of that loop. Otherwise ok. r~
Re: [Patch,AVR] Fix PR52505
2012/3/6 Georg-Johann Lay a...@gjlay.de This is fix for __memx address space reads that might read from RAM or flash. For flash reads, never read from RAM so that I/O latches don't get read out unintentionally. Ok for trunk? Johann libgcc/ PR target/52505 * config/avr/lib1funcs.S (__xload_1): Don't read unintentionally from RAM. gcc/ PR target/52505 * config/avr/avr.c (avr_out_xload): Don't read unintentionally from RAM. * config/avr/avr.md (xload_8): Adjust insn length. Approved. Denis.
Re: [Patch,AVR]: Fix PR52507
2012/3/6 Georg-Johann Lay a...@gjlay.de: This fixes a wrong loop label in the movmemhi worker for the __memx address space case. Ok for trunk? Johann PR target/52507 * config/avr/lib1funcs.S (__movmemx_hi): Fix loop label in RAM-part. Approved. Denis.
Re: [Patch,AVR]: Fix PR52506
2012/3/6 Georg-Johann Lay a...@gjlay.de: The problem is that RAMPD/X/Y/Z are restored in the wrong order in ISR epilogue. Ok for trunk? Johann PR target/52506 * gcc/config/avr/avr.c (expand_epilogue): Fix order of restoration to: RAMPZ, RAMPY, RAMPX, RAMPD. (expand_prologue): Only clear RAMPZ if it has effect on RAM-read. Approved. Denis.
Re: [patch] fix memory corruption bug in tm_region_init
On Tue, Mar 06, 2012 at 08:04:12AM -0800, Richard Henderson wrote: On 03/06/12 07:55, Aldy Hernandez wrote: + bb_regions = VEC_alloc (tm_region_p, heap, last_basic_block); + VEC_reserve (tm_region_p, heap, bb_regions, last_basic_block); + for (i = 0; i last_basic_block; ++i) +VEC_quick_insert (tm_region_p, bb_regions, i, NULL); The reserve is redundant, since you already did that in the alloc. You're looking for VEC_safe_grow_cleared here instead of that loop. Otherwise ok. And VEC_safe_grow_cleared will do even the VEC_alloc if bb_regions is NULL before this or you just set it to NULL before VEC_safe_grow_cleared. Jakub
Re: [patch] fix memory corruption bug in tm_region_init
On 03/06/12 10:20, Jakub Jelinek wrote:
On Tue, Mar 06, 2012 at 08:04:12AM -0800, Richard Henderson wrote:
On 03/06/12 07:55, Aldy Hernandez wrote:
+ bb_regions = VEC_alloc (tm_region_p, heap, last_basic_block);
+ VEC_reserve (tm_region_p, heap, bb_regions, last_basic_block);
+ for (i = 0; i last_basic_block; ++i)
+VEC_quick_insert (tm_region_p, bb_regions, i, NULL);
The reserve is redundant, since you already did that in the alloc.
You're looking for VEC_safe_grow_cleared here instead of that loop.
I got confused because reload1.c had a similar loop which I based mine
off of (grow_reg_equivs).
Otherwise ok.
And VEC_safe_grow_cleared will do even the VEC_alloc if bb_regions is
NULL before this or you just set it to NULL before VEC_safe_grow_cleared.
Jakub
Yes, I just noticed as I was testing the patch below.
Committing to 4.7 branch and mainline.
Thanks guys.
* trans-mem.c: New typedef for tm_region_p.
Define vector types for tm_region_p.
(tm_region_init): Replace region_worklist to a vector called
bb_regions.
Index: trans-mem.c
===
--- trans-mem.c (revision 184949)
+++ trans-mem.c (working copy)
@@ -1757,6 +1757,10 @@ struct tm_region
bitmap irr_blocks;
};
+typedef struct tm_region *tm_region_p;
+DEF_VEC_P (tm_region_p);
+DEF_VEC_ALLOC_P (tm_region_p, heap);
+
/* True if there are pending edge statements to be committed for the
current function being scanned in the tmmark pass. */
bool pending_edge_inserts_p;
@@ -1858,7 +1862,7 @@ tm_region_init (struct tm_region *region
VEC(basic_block, heap) *queue = NULL;
bitmap visited_blocks = BITMAP_ALLOC (NULL);
struct tm_region *old_region;
- struct tm_region **region_worklist;
+ VEC(tm_region_p, heap) *bb_regions = NULL;
all_tm_regions = region;
bb = single_succ (ENTRY_BLOCK_PTR);
@@ -1866,17 +1870,15 @@ tm_region_init (struct tm_region *region
/* We could store this information in bb-aux, but we may get called
through get_all_tm_blocks() from another pass that may be already
using bb-aux. */
- region_worklist =
-(struct tm_region **) xcalloc (sizeof (struct tm_region *),
- last_basic_block + NUM_FIXED_BLOCKS);
+ VEC_safe_grow_cleared (tm_region_p, heap, bb_regions, last_basic_block);
VEC_safe_push (basic_block, heap, queue, bb);
- region_worklist[bb-index] = region;
+ VEC_replace (tm_region_p, bb_regions, bb-index, region);
do
{
bb = VEC_pop (basic_block, queue);
- region = region_worklist[bb-index];
- region_worklist[bb-index] = NULL;
+ region = VEC_index (tm_region_p, bb_regions, bb-index);
+ VEC_replace (tm_region_p, bb_regions, bb-index, NULL);
/* Record exit and irrevocable blocks. */
region = tm_region_init_1 (region, bb);
@@ -1898,15 +1900,15 @@ tm_region_init (struct tm_region *region
the entry block of the new region is associated with this region.
Other successors are still part of the old region. */
if (old_region != region e-dest != region-entry_block)
- region_worklist[e-dest-index] = old_region;
+ VEC_replace (tm_region_p, bb_regions, e-dest-index, old_region);
else
- region_worklist[e-dest-index] = region;
+ VEC_replace (tm_region_p, bb_regions, e-dest-index, region);
}
}
while (!VEC_empty (basic_block, queue));
VEC_free (basic_block, heap, queue);
BITMAP_FREE (visited_blocks);
- free (region_worklist);
+ VEC_free (tm_region_p, heap, bb_regions);
}
/* The gate function for all transactional memory expansion and optimization
Re: [PATCH][target/52481] m68k-*: internal compiler error: in extract_insn, at recog.c:2123
On 03/06/12 02:13, Andreas Schwab wrote: Ralf Corsepius ralf.corsep...@rtems.org writes: * Incompatiblible/insufficient binutils (I am using binutils-2.22)? * Some as/ld-flags getting lost/improperly propagated during assembly/linking? * Bad/incompatible inline-asm hard-coded somewhere? TAS needs at least ISA_B, ie. at least CFV4. So... the correct test is what... #define ISA_HAS_TAS (!TARGET_COLDFIRE || TARGET_ISAB || TARGET_ISAC) ? r~
[Fortran-dev] Merged from trunk; [patch, committed] ISO_Fortran_binding.h
Dear Paul, dear all,
I have merged (Rev. 184999) the trunk (Rev. 184980) to the fortran-dev
branch, which now followed GCC 4.8.
Additionally, I have committed to the fortran-dev branch (Rev. 185004)
the first rough and incomplete version of ISO_Fortran_binding.h, which
tries to follow TS 29113. In terms of the generated code, it should
mostly be a no op, except that GFC_DIMENSION_SET now also sets the extent.
(See attachment. I wrote it some weeks ago, but I think it makes sense
to have it already in svn despite its embryonic state.)
The library currently does not set sm - thus, it breaks if the
compiler itself expects this. The library currently also only handles
the old ubound/stride - thus, if the compiler does not properly set
those, it will also fail. I have not checked what the compiler currently
uses. At least in simple cases, it sets both the old ubound/stride and
the new sm/extent.
The sm information needs the element size in bytes. In order to obtain
it, it is insufficient to modify only libgfortran.h's macros - thus, a
larger patch is required. Most convenient would be if one could directly
convert the code to only use sm/extent, but it should be also possible
to write the code such that also ubound/stride are set.
But before starting this, the compiler itself needs to be in a
reasonable state such that one can easily assign the breakage. - It
might be, but I have not looked at the generated code for more than a
year. - Additional, new code (inline sum and other features) might have
to be first updated, though, updating after the library changes might be
also possible.
Tobias
PS: I do *not* intent to work on fortran-dev in the next weeks. However,
I might work on it during the 4.8 development.
Index: libgfortran/ChangeLog.fortran-dev
===
--- libgfortran/ChangeLog.fortran-dev (revision 184980)
+++ libgfortran/ChangeLog.fortran-dev (working copy)
@@ -1,3 +1,10 @@
+2012-03-06 Tobias Burnus bur...@net-b.de
+
+ * ISO_Fortran_binding.h: New.
+ * libgfortran.h: Include it.
+ (descriptor_dimension): Replace by a CFI_dim_t typedef.
+ (GFC_DIMENSION_SET): Also set extent.
+
2010-09-01 Paul Thomas pa...@gcc.gnu.org
* libgfortran.h: Add 'sm' and 'extent' fields to structure
Index: libgfortran/libgfortran.h
===
--- libgfortran/libgfortran.h (revision 184980)
+++ libgfortran/libgfortran.h (working copy)
@@ -319,26 +319,13 @@ internal_proto(big_endian);
# endif
#endif
-typedef struct descriptor_dimension
-{
- index_type _stride;
- index_type _lbound;
- index_type _ubound;
- index_type _sm;
- index_type _extent;
-}
-descriptor_dimension;
+#include ISO_Fortran_binding.h
-#define GFC_ARRAY_DESCRIPTOR(r, type) \
-struct {\
- type *data;\
- size_t offset;\
- index_type dtype;\
- index_type size;\
- descriptor_dimension dim[r];\
-}
+typedef CFI_dim_t descriptor_dimension;
+#define GFC_ARRAY_DESCRIPTOR(r, type) CFI_GFC_CDESC_T (r, type)
+
/* Commonly used array descriptor types. */
typedef GFC_ARRAY_DESCRIPTOR (GFC_MAX_DIMENSIONS, void) gfc_array_void;
typedef GFC_ARRAY_DESCRIPTOR (GFC_MAX_DIMENSIONS, char) gfc_array_char;
@@ -381,23 +368,31 @@ typedef GFC_ARRAY_DESCRIPTOR (GFC_MAX_DIMENSIONS,
#define GFC_DESCRIPTOR_DATA(desc) ((desc)-data)
#define GFC_DESCRIPTOR_DTYPE(desc) ((desc)-dtype)
-#define GFC_DIMENSION_LBOUND(dim) ((dim)._lbound)
+#define GFC_DIMENSION_LBOUND(dim) ((dim).lower_bound)
+/* Old. */
#define GFC_DIMENSION_UBOUND(dim) ((dim)._ubound)
-#define GFC_DIMENSION_STRIDE(dim) ((dim)._stride)
-#define GFC_DIMENSION_EXTENT(dim) ((dim)._ubound + 1 - (dim)._lbound)
+#define GFC_DIMENSION_EXTENT(dim) ((dim).ubound + 1 - (dim).lower_bound)
+
+/* New. */
+/*
+ #define GFC_DIMENSION_UBOUND(dim) ((dim).lower_bound + (dim).extent - 1)
+ #define GFC_DIMENSION_EXTENT(dim) ((dim).extent)
+*/
+
#define GFC_DIMENSION_SET(dim,lb,ub,str) \
do \
{ \
- (dim)._lbound = lb; \
+ (dim).lower_bound = lb; \
(dim)._ubound = ub; \
+ (dim).extent = ub-lb+1; \
(dim)._stride = str; \
} while (0)
-#define GFC_DESCRIPTOR_LBOUND(desc,i) ((desc)-dim[i]._lbound)
+#define GFC_DESCRIPTOR_LBOUND(desc,i) ((desc)-dim[i].lower_bound)
#define GFC_DESCRIPTOR_UBOUND(desc,i) ((desc)-dim[i]._ubound)
#define GFC_DESCRIPTOR_EXTENT(desc,i) ((desc)-dim[i]._ubound + 1 \
- - (desc)-dim[i]._lbound)
+ - (desc)-dim[i].lower_bound)
#define GFC_DESCRIPTOR_EXTENT_BYTES(desc,i) \
(GFC_DESCRIPTOR_EXTENT(desc,i) * GFC_DESCRIPTOR_SIZE(desc))
Index: libgfortran/ISO_Fortran_binding.h
===
--- libgfortran/ISO_Fortran_binding.h (revision 0)
+++ libgfortran/ISO_Fortran_binding.h (working copy)
@@ -0,0 +1,176 @@
+/* ISO_Fortran_binding.h of GCC's GNU Fortran compiler.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+
Re: [PATCH][1/n] No longer sign-extend sizetype constants, remove TYPE_IS_SIZETYPE
On Tue, 6 Mar 2012, Richard Guenther wrote: * c-decl.c (grokdeclarator): Properly check for sizes that cover more than half of the address-space. The C front-end change is OK. -- Joseph S. Myers jos...@codesourcery.com
Re: [RFC]: Add support for pragma pointer_size
On Tue, 6 Mar 2012, Tristan Gingold wrote: The patch is simple: the C front-end will now calls c_build_pointer_type (instead of build_pointer_type), which in turn calls build_pointer_type_for_mode using the right mode. There seem to be quite a lot of build_pointer_type calls in the C front end (and in c-common.c) that you haven't changed. Could you explain the rule for when a call should or should not be changed, and how it applies to all these calls? -- Joseph S. Myers jos...@codesourcery.com
Re: Remove obsolete Tru64 UNIX V5.1B support
On 03/06/2012 05:14 AM, Rainer Orth wrote: Joseph S. Myersjos...@codesourcery.com writes: There's one particular issue: the change to java/io/File.java required my to regenerate the .class file in classpath. I've used Sun javac -target 1.5 for that and hope I got it right. I'd have expected regeneration to use GCJ built to use ECJ, though I don't know. I've never tried this. Given that the .class file lives below libjava/classpath and has to be synced with upstream Classpath anyway, I hope the Java maintainers will take care of that. This it documented (although perhaps badly) in install/configure.html You should use --enable-java-maintainer-mode, this will cause the build to use ecj and gjavah to regenerate all the generated files in the 'standard' manner. At least with the javac-built File.class I had no libjava testsuite failures. It probably results in a usable .class file, but is error prone and not very reproducible. David Daney
Re: [PATCH][target/52481] m68k-*: internal compiler error: in extract_insn, at recog.c:2123
Richard Henderson r...@redhat.com writes: On 03/06/12 02:13, Andreas Schwab wrote: Ralf Corsepius ralf.corsep...@rtems.org writes: * Incompatiblible/insufficient binutils (I am using binutils-2.22)? * Some as/ld-flags getting lost/improperly propagated during assembly/linking? * Bad/incompatible inline-asm hard-coded somewhere? TAS needs at least ISA_B, ie. at least CFV4. So... the correct test is what... #define ISA_HAS_TAS (!TARGET_COLDFIRE || TARGET_ISAB || TARGET_ISAC) Yes, that looks correct. Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 And now for something completely different.
libgo patch committed: Update to weekly.2012-03-04 release
I have committed a patch to update libgo to the weekly.2012-03-04
release. As usual, this e-mail message only includes the diffs to files
that are specific to gccgo. Bootstrapped and ran Go testsuite on
x86_64-unknown-linux-gnu. Committed to mainline.
Ian
diff -r 99cd08e36ace libgo/MERGE
--- a/libgo/MERGE Mon Mar 05 09:07:10 2012 -0800
+++ b/libgo/MERGE Tue Mar 06 09:42:08 2012 -0800
@@ -1,4 +1,4 @@
-96bd78e7d35e
+f4470a54e6db
The first line of this file holds the Mercurial revision number of the
last merge done from the master library sources.
diff -r 99cd08e36ace libgo/Makefile.am
--- a/libgo/Makefile.am Mon Mar 05 09:07:10 2012 -0800
+++ b/libgo/Makefile.am Tue Mar 06 09:42:08 2012 -0800
@@ -658,10 +658,17 @@
go_net_sockopt_file = go/net/sockopt_linux.go
go_net_sockoptip_file = go/net/sockoptip_linux.go
else
+if LIBGO_IS_FREEBSD
go_net_cgo_file = go/net/cgo_bsd.go
go_net_sock_file = go/net/sock_bsd.go
go_net_sockopt_file = go/net/sockopt_bsd.go
-go_net_sockoptip_file = go/net/sockoptip_bsd.go
+go_net_sockoptip_file = go/net/sockoptip_bsd.go go/net/sockoptip_freebsd.go
+else
+go_net_cgo_file = go/net/cgo_bsd.go
+go_net_sock_file = go/net/sock_bsd.go
+go_net_sockopt_file = go/net/sockopt_bsd.go
+go_net_sockoptip_file = go/net/sockoptip_bsd.go go/net/sockoptip_netbsd.go
+endif
endif
endif
endif
@@ -704,6 +711,7 @@
go/net/ipsock.go \
go/net/ipsock_posix.go \
go/net/lookup_unix.go \
+ go/net/mac.go \
go/net/net.go \
go/net/parse.go \
go/net/pipe.go \
@@ -1126,8 +1134,7 @@
go/go/ast/walk.go
go_go_build_files = \
go/go/build/build.go \
- go/go/build/dir.go \
- go/go/build/path.go \
+ go/go/build/doc.go \
syslist.go
go_go_doc_files = \
go/go/doc/comment.go \
diff -r 99cd08e36ace libgo/runtime/go-main.c
--- a/libgo/runtime/go-main.c Mon Mar 05 09:07:10 2012 -0800
+++ b/libgo/runtime/go-main.c Tue Mar 06 09:42:08 2012 -0800
@@ -40,7 +40,7 @@
int
main (int argc, char **argv)
{
- runtime_initsig ();
+ runtime_check ();
runtime_args (argc, (byte **) argv);
runtime_osinit ();
runtime_schedinit ();
diff -r 99cd08e36ace libgo/runtime/lock_futex.c
--- a/libgo/runtime/lock_futex.c Mon Mar 05 09:07:10 2012 -0800
+++ b/libgo/runtime/lock_futex.c Tue Mar 06 09:42:08 2012 -0800
@@ -118,8 +118,12 @@
void
runtime_notesleep(Note *n)
{
+ if(runtime_m()-profilehz 0)
+ runtime_setprof(false);
while(runtime_atomicload(n-key) == 0)
runtime_futexsleep(n-key, 0, -1);
+ if(runtime_m()-profilehz 0)
+ runtime_setprof(true);
}
void
@@ -135,14 +139,18 @@
if(runtime_atomicload(n-key) != 0)
return;
+ if(runtime_m()-profilehz 0)
+ runtime_setprof(false);
deadline = runtime_nanotime() + ns;
for(;;) {
runtime_futexsleep(n-key, 0, ns);
if(runtime_atomicload(n-key) != 0)
- return;
+ break;
now = runtime_nanotime();
if(now = deadline)
- return;
+ break;
ns = deadline - now;
}
+ if(runtime_m()-profilehz 0)
+ runtime_setprof(true);
}
diff -r 99cd08e36ace libgo/runtime/lock_sema.c
--- a/libgo/runtime/lock_sema.c Mon Mar 05 09:07:10 2012 -0800
+++ b/libgo/runtime/lock_sema.c Tue Mar 06 09:42:08 2012 -0800
@@ -159,7 +159,11 @@
return;
}
// Queued. Sleep.
+ if(m-profilehz 0)
+ runtime_setprof(false);
runtime_semasleep(-1);
+ if(m-profilehz 0)
+ runtime_setprof(true);
}
void
@@ -185,12 +189,16 @@
return;
}
+ if(m-profilehz 0)
+ runtime_setprof(false);
deadline = runtime_nanotime() + ns;
for(;;) {
// Registered. Sleep.
if(runtime_semasleep(ns) = 0) {
// Acquired semaphore, semawakeup unregistered us.
// Done.
+ if(m-profilehz 0)
+runtime_setprof(true);
return;
}
@@ -203,6 +211,9 @@
ns = deadline - now;
}
+ if(m-profilehz 0)
+ runtime_setprof(true);
+
// Deadline arrived. Still registered. Semaphore not acquired.
// Want to give up and return, but have to unregister first,
// so that any notewakeup racing with the return does not
diff -r 99cd08e36ace libgo/runtime/malloc.goc
--- a/libgo/runtime/malloc.goc Mon Mar 05 09:07:10 2012 -0800
+++ b/libgo/runtime/malloc.goc Tue Mar 06 09:42:08 2012 -0800
@@ -277,6 +277,7 @@
uintptr arena_size, bitmap_size;
extern byte end[];
byte *want;
+ uintptr limit;
runtime_sizeof_C_MStats = sizeof(MStats);
@@ -291,10 +292,12 @@
runtime_InitSizes();
+ limit = runtime_memlimit();
+
// Set up the allocation arena, a contiguous area of memory where
// allocated data will be found. The arena begins with a bitmap large
// enough to hold 4 bits per allocated word.
- if(sizeof(void*) == 8) {
+ if(sizeof(void*) == 8 (limit == 0 || limit (130))) {
// On a 64-bit machine, allocate from a single contiguous reservation.
// 16 GB should be big enough for now.
//
@@ -343,6 +346,10 @@
// of address space, which is probably too much in a 32-bit world.
bitmap_size = MaxArena32 / (sizeof(void*)*8/4);
arena_size = 51220;
+ if(limit 0 arena_size+bitmap_size limit) {
+ bitmap_size = (limit / 9) ~((1PageShift)
Re: [PR51752] publication safety violations in loop invariant motion pass
On 02/29/12 03:22, Richard Guenther wrote: So fixing up individual passes is easier - I can only think of PRE being problematic right now, I am not aware that any other pass moves loads or stores. So I'd simply pre-compute the stmt bit in PRE and adjust the if (gimple_has_volatile_ops (stmt) || stmt_could_throw_p (stmt)) continue; in compute_avail accordingly. Initially I thought PRE would be problematic for transactions, but perhaps it isn't. As I understand, for PRE we hoist loads/computations that are mostly redundant, but will be performed on every path: if (flag) a = b + c; else stuff; d = b + c; -- [b + c] always computed Even if we hoist [b + c] before the flag, [b + c] will be computed on every path out of if (flag) So... we can allow this transformation within transactions, right? Torvald?
Re: PR middle-end/52373: two pc_rtxs, etc.
On 02/27/12 11:58, Richard Sandiford wrote: gcc/ * rtl.h (pc_rtx, ret_rtx, simple_return_rtx, cc0_rtx): Redefine as variables. (GR_PC, GR_CC0, GR_RETURN, GR_SIMPLE_RETURN): Delete. * emit-rtl.c (pc_rtx, ret_rtx, simple_return_rtx, cc0_rtx): New variables. (init_emit_regs): Move associated initialization to... (init_emit_once): ...here. Ok. r~
Re: [PATCH][target/52481] m68k-*: internal compiler error: in extract_insn, at recog.c:2123
On 03/06/12 09:55, Andreas Schwab wrote:
Richard Henderson r...@redhat.com writes:
On 03/06/12 02:13, Andreas Schwab wrote:
Ralf Corsepius ralf.corsep...@rtems.org writes:
* Incompatiblible/insufficient binutils (I am using binutils-2.22)?
* Some as/ld-flags getting lost/improperly propagated during
assembly/linking?
* Bad/incompatible inline-asm hard-coded somewhere?
TAS needs at least ISA_B, ie. at least CFV4.
So... the correct test is what...
#define ISA_HAS_TAS (!TARGET_COLDFIRE || TARGET_ISAB || TARGET_ISAC)
Yes, that looks correct.
Thanks.
Ralf, I've committed the following to mainline. Please try your rtems
testing again, and if that works I'll push the patch to 4.7 branch.
r~
* config/m68k/m68k.h (ISA_HAS_TAS): New.
* config/m68k/sync.md (atomic_test_and_set): Use it.
(atomic_test_and_set_1): Likewise.
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index dbb9756..42d3779 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -249,6 +249,7 @@ along with GCC; see the file COPYING3. If not see
/* Some instructions are common to more than one ISA. */
#define ISA_HAS_MVS_MVZ(TARGET_ISAB || TARGET_ISAC)
#define ISA_HAS_FF1(TARGET_ISAAPLUS || TARGET_ISAC)
+#define ISA_HAS_TAS(!TARGET_COLDFIRE || TARGET_ISAB || TARGET_ISAC)
#define TUNE_68000 (m68k_tune == u68000)
#define TUNE_68010 (m68k_tune == u68010)
diff --git a/gcc/config/m68k/sync.md b/gcc/config/m68k/sync.md
index 6c840f5..d5cab79 100644
--- a/gcc/config/m68k/sync.md
+++ b/gcc/config/m68k/sync.md
@@ -60,7 +60,7 @@
[(match_operand:QI 0 register_operand ) ;; bool success output
(match_operand:QI 1 memory_operand );; memory
(match_operand:SI 2 const_int_operand )];; model
-
+ ISA_HAS_TAS
{
rtx t = gen_reg_rtx (QImode);
emit_insn (gen_atomic_test_and_set_1 (t, operands[1]));
@@ -77,5 +77,5 @@
UNSPECV_TAS_1))
(set (match_dup 1)
(unspec_volatile:QI [(match_dup 1)] UNSPECV_TAS_2))]
-
+ ISA_HAS_TAS
tas %1\;sne %0)
PATCH: Properly check mode for x86 call/jmp address
On Tue, Mar 6, 2012 at 7:37 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Mon, Mar 5, 2012 at 9:11 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Sun, Mar 4, 2012 at 11:47 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Mon, Mar 5, 2012 at 4:53 AM, H.J. Lu hjl.to...@gmail.com wrote:
and compiler does generate the same output. i386.c also has
xasm = jmp\t%A0;
xasm = call\t%A0;
for calls. There are no separate indirect call patterns. For x32,
only indirect register calls have to be in DImode. The direct call
should be in Pmode (SImode).
Direct call just expects label to some abolute address that is assumed
to fit in 32 bits (see constant_call_address_operand_p).
call and jmp insn expect word_mode operands, so please change
ix86_expand_call and call patterns in the same way as jump
instructions above.
Since x86-64 hardware always zero-extends upper 32bits of 64bit
registers when loading its lower 32bits, it is safe and easier to just
to output 64bit registers for %A than zero-extend it by hand for all
jump/call patterns.
No, the instruction expects word_mode operands, so we have to extend
values to expected mode. I don't think that patching at insn output
time is acceptable.
You are right. I found a testcase to show problem:
struct foo
{
void (*f) (void);
int i;
};
void
__attribute__ ((noinline))
bar (struct foo x)
{
x.f ();
}
x is passed in RDI and the uppper 32bits of RDI is int i.
Hi,
This is what I come up with. This patch enforces word_mode for
non-SYMBOL_REF call/jmp address while allowing Pmode for
SYMBOL_REF call/jmp address. I added W for word_mode
used on indirect branches and added C for Pmode/word_mode
used on calls. For calls, I added check for SYMBOL_REF address
or address in word_mode since non-SYMBOL_REF address must
be in word_mode. Tested on Linux/x86-64.
OK for trunk?
Thanks.
--
H.J.
---
2012-03-06 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_expand_call): Call
constant_call_address_operand with Pmode and call
call_register_no_elim_operand/memory_operand with word_mode.
Convert the address to word_mode instead of Pmode.
* config/i386/i386.md (W): New.
(C): Likewise.
(indirect_jump): Convert address to word_mode for x32.
(tablejump): Likewise.
(*indirect_jump): Replace :P with :W.
(*tablejump_1): Likewise.
(*call_vzeroupper): Replace :P with :C. Check address is
SYMBOL_REF or in word_mode.
(*call): Likewise.
(*sibcall_vzeroupper): Likewise.
(*sibcall): Likewise.
(*call_value_vzeroupper): Likewise.
(*call_value): Likewise.
(*sibcall_value_vzeroupper): Likewise.
(*sibcall_value): Likewise.
2012-03-06 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_expand_call): Call
constant_call_address_operand with Pmode and call
call_register_no_elim_operand/memory_operand with word_mode.
Convert the address to word_mode instead of Pmode.
* config/i386/i386.md (W): New.
(C): Likewise.
(indirect_jump): Convert address to word_mode for x32.
(tablejump): Likewise.
(*indirect_jump): Replace :P with :W.
(*tablejump_1): Likewise.
(*call_vzeroupper): Replace :P with :C. Check address is
SYMBOL_REF or in word_mode.
(*call): Likewise.
(*sibcall_vzeroupper): Likewise.
(*sibcall): Likewise.
(*call_value_vzeroupper): Likewise.
(*call_value): Likewise.
(*sibcall_value_vzeroupper): Likewise.
(*sibcall_value): Likewise.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 973bbeb..7ee71fa 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -22940,14 +22940,18 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx
callarg1,
GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF
!local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode))
fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0)));
- else if (sibcall
- ? !sibcall_insn_operand (XEXP (fnaddr, 0), Pmode)
- : !call_insn_operand (XEXP (fnaddr, 0), Pmode))
+ else if (!(constant_call_address_operand (XEXP (fnaddr, 0), Pmode)
+|| call_register_no_elim_operand (XEXP (fnaddr, 0),
+ word_mode)
+|| (!sibcall
+ !TARGET_X32
+ memory_operand (XEXP (fnaddr, 0), word_mode
{
fnaddr = XEXP (fnaddr, 0);
- if (GET_MODE (fnaddr) != Pmode)
- fnaddr = convert_to_mode (Pmode, fnaddr, 1);
- fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (Pmode, fnaddr));
+ if (GET_MODE (fnaddr) != word_mode)
+ fnaddr = convert_to_mode (word_mode, fnaddr, 1);
+ fnaddr = gen_rtx_MEM (QImode,
+ copy_to_mode_reg (word_mode, fnaddr));
}
vec_len = 0;
diff --git
Re: PATCH: Properly check mode for x86 call/jmp address
On Tue, Mar 6, 2012 at 8:10 PM, H.J. Lu hjl.to...@gmail.com wrote:
On Tue, Mar 6, 2012 at 7:37 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Mon, Mar 5, 2012 at 9:11 AM, H.J. Lu hjl.to...@gmail.com wrote:
On Sun, Mar 4, 2012 at 11:47 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Mon, Mar 5, 2012 at 4:53 AM, H.J. Lu hjl.to...@gmail.com wrote:
and compiler does generate the same output. i386.c also has
xasm = jmp\t%A0;
xasm = call\t%A0;
for calls. There are no separate indirect call patterns. For x32,
only indirect register calls have to be in DImode. The direct call
should be in Pmode (SImode).
Direct call just expects label to some abolute address that is assumed
to fit in 32 bits (see constant_call_address_operand_p).
call and jmp insn expect word_mode operands, so please change
ix86_expand_call and call patterns in the same way as jump
instructions above.
Since x86-64 hardware always zero-extends upper 32bits of 64bit
registers when loading its lower 32bits, it is safe and easier to just
to output 64bit registers for %A than zero-extend it by hand for all
jump/call patterns.
No, the instruction expects word_mode operands, so we have to extend
values to expected mode. I don't think that patching at insn output
time is acceptable.
You are right. I found a testcase to show problem:
struct foo
{
void (*f) (void);
int i;
};
void
__attribute__ ((noinline))
bar (struct foo x)
{
x.f ();
}
x is passed in RDI and the uppper 32bits of RDI is int i.
Hi,
This is what I come up with. This patch enforces word_mode for
non-SYMBOL_REF call/jmp address while allowing Pmode for
SYMBOL_REF call/jmp address. I added W for word_mode
used on indirect branches and added C for Pmode/word_mode
used on calls. For calls, I added check for SYMBOL_REF address
or address in word_mode since non-SYMBOL_REF address must
be in word_mode. Tested on Linux/x86-64.
OK for trunk?
(define_insn_and_split *sibcall_value_vzeroupper
[(set (match_operand 0 )
- (call (mem:QI (match_operand:P 1 sibcall_insn_operand Uz))
+ (call (mem:QI (match_operand:C 1 sibcall_insn_operand Uz))
(match_operand 2 )))
(unspec [(match_operand 3 const_int_operand )]
UNSPEC_CALL_NEEDS_VZEROUPPER)]
- TARGET_VZEROUPPER SIBLING_CALL_P (insn)
+ TARGET_VZEROUPPER
+SIBLING_CALL_P (insn)
+((GET_CODE (operands[1]) == SYMBOL_REF
+GET_MODE (operands[1]) == Pmode)
+ || (GET_CODE (operands[1]) != SYMBOL_REF
+ GET_MODE (operands[1]) == word_mode))
#
reload_completed
[(const_int 0)]
Why does this patterh have different insn constraitn than all others?
BTW - please do not split existing TARGET_VZEROUPPER
SIBLING_CALL_P (insn) lines ...
Uros.
Re: [PATCH 10/10] addr32: Add *zero_extendsidi2_x32.
On Mon, Mar 5, 2012 at 1:38 AM, Uros Bizjak ubiz...@gmail.com wrote: On Fri, Mar 2, 2012 at 10:14 PM, H.J. Lu hongjiu...@intel.com wrote: This is the last patch for Pmode == SImod in x32. In x32, the return value of the symbol address must be zero-extended to DImode, This patch adds *zero_extendsidi2_x32 to load the address of a symbol in SImode and zero-extend it to DImode. It works for x32 since the address size is 32bit. OK for trunk? Can you please try attached patch instead? It enhances existing insn pattern with required functionality. Uros. It works. Thanks. -- H.J.
Re: PATCH: Properly check mode for x86 call/jmp address
On 03/06/12 11:10, H.J. Lu wrote: (define_insn *call - [(call (mem:QI (match_operand:P 0 call_insn_operand czw)) + [(call (mem:QI (match_operand:C 0 call_insn_operand czw)) (match_operand 1 ))] - !SIBLING_CALL_P (insn) + !SIBLING_CALL_P (insn) +(GET_CODE (operands[0]) == SYMBOL_REF + || GET_MODE (operands[0]) == word_mode) There are enough copies of this extra constraint that I wonder if it simply ought to be folded into call_insn_operand. Which would need to be changed to define_special_predicate, since you'd be doing your own mode checking. Probably similar changes to sibcall_insn_operand. r~
Re: Remove obsolete OpenBSD/MIPS support
Rainer Orth r...@cebitec.uni-bielefeld.de writes: I'm currently working on removing the obsolete Tru64 UNIX and IRIX ports. When IRIX is gone, the obsoleted OpenBSD/MIPS is the only remaining port that uses MIPS_DEBUGGING_INFO (which I plan to remove as a followup once IRIX is gone). The following patch has been included in a i386-pc-solaris2.10 bootstrap to make sure that no obvious syntactic errors have crept in. Ok for mainline? Definitely. Thanks for saving me the legwork :-) There are also some SDB_OUTPUT_SOURCE_LINE references in mips.c and mips.h that could go. Removing those is preapproved if you want to do it as part of the same patch, otherwise I can do it this weekend. Richard
Re: [PR51752] publication safety violations in loop invariant motion pass
On Tue, Mar 6, 2012 at 6:55 PM, Aldy Hernandez al...@redhat.com wrote: On 02/29/12 03:22, Richard Guenther wrote: So fixing up individual passes is easier - I can only think of PRE being problematic right now, I am not aware that any other pass moves loads or stores. So I'd simply pre-compute the stmt bit in PRE and adjust the if (gimple_has_volatile_ops (stmt) || stmt_could_throw_p (stmt)) continue; in compute_avail accordingly. Initially I thought PRE would be problematic for transactions, but perhaps it isn't. As I understand, for PRE we hoist loads/computations that are mostly redundant, but will be performed on every path: if (flag) a = b + c; else stuff; d = b + c; -- [b + c] always computed Even if we hoist [b + c] before the flag, [b + c] will be computed on every path out of if (flag) So... we can allow this transformation within transactions, right? Note that partial PRE (enabled at -O3) can insert expressions into paths that did _not_ execute the expression. For regular PRE you are right. Richard. Torvald?
[patch] Cleanup fortran/convert.c
Hi, This cleans up some remnants of the ancestors of fortran's convert.c, which was copied from GNAT IIRC. I would bootstraptest this, but trunk appears to be broken for x86_64-linux right now (ICE in patch_jump_insn). But I can post this for review, at least. OK for trunk, after bootstrap+test? Ciao! Steven * Make-lang.in (convert.o): Depend on convert.h. * convert.c: Header and comment cleanups. (gfc_thruthvalue_conversion): Rename static function to truthvalue_conversion. Do not use 'internal_error' from here, use 'gcc_unreachable' instead. (convert): Do not use 'error' for conversions to void, use 'gcc_unreachable' instead. Likewise for conversions to non-scalar types. Do not hanlde ENUMERAL_TYPE, the front end never creates them. Clean up #if 0 code. * Make-lang.in (convert.o): Depend on convert.h. * convert.c: Header and comment cleanups. (gfc_thruthvalue_conversion): Rename static function to truthvalue_conversion. Do not use 'internal_error' from here, use 'gcc_unreachable' instead. (convert): Do not use 'error' for conversions to void, use 'gcc_unreachable' instead. Likewise for conversions to non-scalar types. Do not hanlde ENUMERAL_TYPE, the front end never creates them. Clean up #if 0 code. Index: Make-lang.in === --- Make-lang.in(revision 185013) +++ Make-lang.in(working copy) @@ -346,7 +347,7 @@ fortran/f95-lang.o: $(GFORTRAN_TRANS_DEP $(TM_H) debug.h langhooks.h $(FLAGS_H) $(EXPR_H) $(LANGHOOKS_DEF_H) \ libfuncs.h expr.h $(DIAGNOSTIC_H) fortran/scanner.o: toplev.h fortran/cpp.h -fortran/convert.o: $(GFORTRAN_TRANS_DEPS) +fortran/convert.o: $(GFORTRAN_TRANS_DEPS) convert.h fortran/frontend-passes.o: $(GFORTRAN_TRANS_DEPS) fortran/trans.o: $(GFORTRAN_TRANS_DEPS) tree-iterator.h fortran/trans-decl.o: $(GFORTRAN_TRANS_DEPS) gt-fortran-trans-decl.h \ Index: convert.c === --- convert.c (revision 185015) +++ convert.c (working copy) @@ -1,5 +1,5 @@ -/* Language-level data type conversion for GNU C. - Copyright (C) 1987, 1988, 1991, 1998, 2002, 2007, 2008, 2010 +/* Data type conversion + Copyright (C) 1987, 1988, 1991, 1998, 2002, 2007, 2008, 2010, 2012 Free Software Foundation, Inc. This file is part of GCC. @@ -19,62 +19,23 @@ along with GCC; see the file COPYING3. http://www.gnu.org/licenses/. */ -/* This file contains the functions for converting C expressions - to different data types. The only entry point is `convert'. - Every language front end must have a `convert' function - but what kind of conversions it does will depend on the language. */ - -/* copied from the f77 frontend I think */ - -/* copied from c-convert.c without significant modification*/ -/* Change of width--truncation and extension of integers or reals-- - is represented with NOP_EXPR. Proper functioning of many things - assumes that no other conversions can be NOP_EXPRs. -*/ - -/* I've added support for WITH_RECORD_EXPR. */ +/* This file contains the functions for converting expressions to + different data types for the translation of the gfortran internal + representation to GIMPLE. The only entry point is `convert'. */ #include config.h #include system.h #include coretypes.h #include tree.h -#include flags.h #include convert.h -#include diagnostic-core.h /* For error. */ -#include gfortran.h -#include trans.h - -/* - Conversion between integer and pointer is represented with CONVERT_EXPR. - Converting integer to real uses FLOAT_EXPR - and real to integer uses FIX_TRUNC_EXPR. - - Here is a list of all the functions that assume that widening and - narrowing is always done with a NOP_EXPR: - In convert.c, convert_to_integer. - In c-typeck.c, build_binary_op (boolean ops), and - c_common_truthvalue_conversion. - In expr.c: expand_expr, for operands of a MULT_EXPR. - In fold-const.c: fold. - In tree.c: get_narrower and get_unwidened. */ - -/* Subroutines of `convert'. */ /* Prepare expr to be an argument of a TRUTH_NOT_EXPR, - or validate its data type for an `if' or `while' statement or ?..: exp. + or validate its data type for a GIMPLE `if' or `while' statement. - This preparation consists of taking the ordinary - representation of an expression expr and producing a valid tree - boolean expression describing whether expr is nonzero. We could - simply always do build_binary_op (NE_EXPR, expr, boolean_false_node, 1), - but we optimize comparisons, , ||, and !. - - The resulting type should always be `boolean_type_node'. - This is much simpler than the corresponding C version because we have a - distinct boolean type. */ + The resulting type should always be `boolean_type_node'. */ static tree
[PATCH] Fix PR18589
Hi,
This is a re-post of the patch I posted for comments in January to
address http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18589. The patch
modifies reassociation to expose repeated factors from __builtin_pow*
calls, optimally reassociate repeated factors, and possibly reconstitute
__builtin_powi calls from the results of reassociation.
Bootstrapped and passes regression tests for powerpc64-linux-gnu. I
expect there may need to be some small changes, but I am targeting this
for trunk approval.
Thanks very much for the review,
Bill
gcc:
2012-03-06 Bill Schmidt wschm...@linux.vnet.ibm.com
* tree-pass.h: Replace pass_reassoc with pass_early_reassoc and
pass_late_reassoc.
* passes.c (init_optimization_passes): Change pass_reassoc calls to
pass_early_reassoc and pass_late_reassoc.
* tree-ssa-reassoc.c (reassociate_stats): Add two fields.
(early_reassoc): New static var.
(MAX_POW_EXPAND): New #define'd constant.
(linear_expand_pow_common): New function.
(linear_expand_powi): Likewise.
(linear_expand_pow): Likewise.
(break_up_subtract_bb): Attempt to expand __builtin_pow[i].
(repeat_factor_d): New struct and associated typedefs.
(repeat_factor_vec): New static vector variable.
(compare_repeat_factors): New function.
(get_reassoc_pow_ssa_name): Likewise.
(attempt_builtin_powi): Likewise.
(reassociate_bb): Attempt to reconstitute __builtin_powi calls, and
multiply their results by any leftover reassociated factors.
(fini_reassoc): Two new calls to statistics_counter_event.
(execute_early_reassoc): New function.
(execute_late_reassoc): Likewise.
(pass_early_reassoc): Replace pass_reassoc, renamed to reassoc1,
call execute_early_reassoc.
(pass_late_reassoc): New gimple_opt_pass named reassoc2 that calls
execute_late_reassoc.
gcc/testsuite:
2012-03-06 Bill Schmidt wschm...@linux.vnet.ibm.com
* gcc.dg/pr46309.c: Change -fdump-tree-reassoc-details to
-fdump-tree-reassoc[12]-details.
* gcc.dg/tree-ssa/pr18589-1.c: New test.
* gcc.dg/tree-ssa/pr18589-2.c: Likewise.
* gcc.dg/tree-ssa/pr18589-3.c: Likewise.
* gcc.dg/tree-ssa/pr18589-4.c: Likewise.
* gcc.dg/tree-ssa/pr18589-5.c: Likewise.
* gcc.dg/tree-ssa/pr18589-6.c: Likewise.
* gcc.dg/tree-ssa/pr18589-7.c: Likewise.
* gcc.dg/tree-ssa/pr18589-8.c: Likewise.
Index: gcc/tree-pass.h
===
--- gcc/tree-pass.h (revision 184997)
+++ gcc/tree-pass.h (working copy)
@@ -440,7 +440,8 @@ extern struct gimple_opt_pass pass_copy_prop;
extern struct gimple_opt_pass pass_vrp;
extern struct gimple_opt_pass pass_uncprop;
extern struct gimple_opt_pass pass_return_slot;
-extern struct gimple_opt_pass pass_reassoc;
+extern struct gimple_opt_pass pass_early_reassoc;
+extern struct gimple_opt_pass pass_late_reassoc;
extern struct gimple_opt_pass pass_rebuild_cgraph_edges;
extern struct gimple_opt_pass pass_remove_cgraph_callee_edges;
extern struct gimple_opt_pass pass_build_cgraph_edges;
Index: gcc/testsuite/gcc.dg/pr46309.c
===
--- gcc/testsuite/gcc.dg/pr46309.c (revision 184997)
+++ gcc/testsuite/gcc.dg/pr46309.c (working copy)
@@ -1,6 +1,6 @@
/* PR tree-optimization/46309 */
/* { dg-do compile } */
-/* { dg-options -O2 -fdump-tree-reassoc-details } */
+/* { dg-options -O2 -fdump-tree-reassoc1-details
-fdump-tree-reassoc2-details } */
/* The transformation depends on BRANCH_COST being greater than 1
(see the notes in the PR), so try to force that. */
/* { dg-additional-options -mtune=octeon2 { target mips*-*-* } } */
Index: gcc/testsuite/gcc.dg/tree-ssa/pr18589-4.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/pr18589-4.c (revision 0)
+++ gcc/testsuite/gcc.dg/tree-ssa/pr18589-4.c (revision 0)
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options -O3 -ffast-math -fdump-tree-optimized } */
+
+double baz (double x, double y, double z, double u)
+{
+ return x * x * y * y * y * z * z * z * z * u;
+}
+
+/* { dg-final { scan-tree-dump-times \\* 7 optimized } } */
+/* { dg-final { cleanup-tree-dump optimized } } */
Index: gcc/testsuite/gcc.dg/tree-ssa/pr18589-5.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/pr18589-5.c (revision 0)
+++ gcc/testsuite/gcc.dg/tree-ssa/pr18589-5.c (revision 0)
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options -O3 -ffast-math -fdump-tree-optimized } */
+
+double baz (double x, double y, double z, double u)
+{
+ return x * x * x * y * y * y * z * z * z * z * u * u * u * u;
+}
+
+/* { dg-final { scan-tree-dump-times \\* 6 optimized } } */
+/* { dg-final { cleanup-tree-dump optimized }
Re: [PR51752] publication safety violations in loop invariant motion pass
On Tue, 2012-03-06 at 21:18 +0100, Richard Guenther wrote: On Tue, Mar 6, 2012 at 6:55 PM, Aldy Hernandez al...@redhat.com wrote: On 02/29/12 03:22, Richard Guenther wrote: So fixing up individual passes is easier - I can only think of PRE being problematic right now, I am not aware that any other pass moves loads or stores. So I'd simply pre-compute the stmt bit in PRE and adjust the if (gimple_has_volatile_ops (stmt) || stmt_could_throw_p (stmt)) continue; in compute_avail accordingly. Initially I thought PRE would be problematic for transactions, but perhaps it isn't. As I understand, for PRE we hoist loads/computations that are mostly redundant, but will be performed on every path: if (flag) a = b + c; else stuff; d = b + c; -- [b + c] always computed Even if we hoist [b + c] before the flag, [b + c] will be computed on every path out of if (flag) So... we can allow this transformation within transactions, right? In this particular example, I agree. We can move [b + c] into the else branch, and then move it to before flag because it will happen on all paths to the exit anyway. Note that partial PRE (enabled at -O3) can insert expressions into paths that did _not_ execute the expression. For regular PRE you are right. I suppose if only loads will be moved around by PRE, then this could be fine, as long as those expressions do not have visible side effects or can crash if reading garbage. For examples, dereferencing pointers could lead to accessing unmapped memory and thus segfaults, speculative stores are not allowed (even if you undo them later on), etc. Also, if PRE inserts expressions into paths that did not execute the transactions, can it happen that then something like loop invariant motion comes around and optimizes based on that and moves the code to before if (flag)...? If so, PRE would break publication safety indirectly by pretending that the expression happened on every path to the exit, tricking subsequent passes to believe things that were not in place in the source code. Is this a realistic scenario?
Re: PATCH: Properly check mode for x86 call/jmp address
On Tue, Mar 6, 2012 at 11:47 AM, Richard Henderson r...@redhat.com wrote:
On 03/06/12 11:10, H.J. Lu wrote:
(define_insn *call
- [(call (mem:QI (match_operand:P 0 call_insn_operand czw))
+ [(call (mem:QI (match_operand:C 0 call_insn_operand czw))
(match_operand 1 ))]
- !SIBLING_CALL_P (insn)
+ !SIBLING_CALL_P (insn)
+ (GET_CODE (operands[0]) == SYMBOL_REF
+ || GET_MODE (operands[0]) == word_mode)
There are enough copies of this extra constraint that I wonder
if it simply ought to be folded into call_insn_operand.
Which would need to be changed to define_special_predicate,
since you'd be doing your own mode checking.
Probably similar changes to sibcall_insn_operand.
r~
Here is the updated patch. I changed constant_call_address_operand
and call_register_no_elim_operand to use define_special_predicate.
OK for trunk?
Thanks.
--
H.J
---
2012-03-06 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_expand_call): Call
constant_call_address_operand with Pmode and call
call_register_no_elim_operand/memory_operand with word_mode.
Convert the address to word_mode instead of Pmode.
* config/i386/i386.md (W): New.
(C): Likewise.
(indirect_jump): Convert address to word_mode for x32.
(tablejump): Likewise.
(*indirect_jump): Replace :P with :W.
(*tablejump_1): Likewise.
(*call_vzeroupper): Replace :P with :C.
(*call): Likewise.
(*sibcall_vzeroupper): Likewise.
(*sibcall): Likewise.
(*call_value_vzeroupper): Likewise.
(*call_value): Likewise.
(*sibcall_value_vzeroupper): Likewise.
(*sibcall_value): Likewise.
* config/i386/predicates.md (constant_call_address_operand):
Defined with define_special_predicate. Return false if mode
isn't Pmode.
(call_register_no_elim_operand): Defined with
define_special_predicate. Return false if mode isn't word_mode.
2012-03-06 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (ix86_expand_call): Call
constant_call_address_operand with Pmode and call
call_register_no_elim_operand/memory_operand with word_mode.
Convert the address to word_mode instead of Pmode.
* config/i386/i386.md (W): New.
(C): Likewise.
(indirect_jump): Convert address to word_mode for x32.
(tablejump): Likewise.
(*indirect_jump): Replace :P with :W.
(*tablejump_1): Likewise.
(*call_vzeroupper): Replace :P with :C.
(*call): Likewise.
(*sibcall_vzeroupper): Likewise.
(*sibcall): Likewise.
(*call_value_vzeroupper): Likewise.
(*call_value): Likewise.
(*sibcall_value_vzeroupper): Likewise.
(*sibcall_value): Likewise.
* config/i386/predicates.md (constant_call_address_operand):
Defined with define_special_predicate. Return false if mode
isn't Pmode.
(call_register_no_elim_operand): Defined with
define_special_predicate. Return false if mode isn't word_mode.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 973bbeb..7ee71fa 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -22940,14 +22940,18 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx
callarg1,
GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF
!local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode))
fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0)));
- else if (sibcall
- ? !sibcall_insn_operand (XEXP (fnaddr, 0), Pmode)
- : !call_insn_operand (XEXP (fnaddr, 0), Pmode))
+ else if (!(constant_call_address_operand (XEXP (fnaddr, 0), Pmode)
+|| call_register_no_elim_operand (XEXP (fnaddr, 0),
+ word_mode)
+|| (!sibcall
+ !TARGET_X32
+ memory_operand (XEXP (fnaddr, 0), word_mode
{
fnaddr = XEXP (fnaddr, 0);
- if (GET_MODE (fnaddr) != Pmode)
- fnaddr = convert_to_mode (Pmode, fnaddr, 1);
- fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (Pmode, fnaddr));
+ if (GET_MODE (fnaddr) != word_mode)
+ fnaddr = convert_to_mode (word_mode, fnaddr, 1);
+ fnaddr = gen_rtx_MEM (QImode,
+ copy_to_mode_reg (word_mode, fnaddr));
}
vec_len = 0;
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index bfbf5bf..801ffa2 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -896,6 +896,16 @@
;; ptr_mode sized quantities.
(define_mode_iterator PTR
[(SI ptr_mode == SImode) (DI ptr_mode == DImode)])
+
+;; This mode iterator allows :W to be used for patterns that operate on
+;; word_mode sized quantities.
+(define_mode_iterator W
+ [(SI word_mode == SImode) (DI word_mode == DImode)])
+
+;; This mode iterator allows :C to be used for patterns that operate on
+;; pointer-sized
Re: [RFC PATCH]: Handle Pmode == SImode in stringop patterns
On Tue, Mar 6, 2012 at 1:37 AM, Uros Bizjak ubiz...@gmail.com wrote:
On Mon, Mar 5, 2012 at 11:42 PM, H.J. Lu hjl.to...@gmail.com wrote:
+ case '^':
+ if (TARGET_64BIT Pmode == SImode)
+ {
+ fputs (addr32, file);
+#ifndef HAVE_AS_IX86_REP_LOCK_PREFIX
+ if (ASSEMBLER_DIALECT == ASM_ATT)
+ fputs (addr32; , file);
+ else
+#endif
+ fputs (addr32 , file);
+ }
Why do you print addr32 twice? addr32addr32; or addr32addr32 .
Oops, please remove the first one.
It looks OK to me. I will test after I fix indirect jmp/call.
FYI, addr32 prefix can't stand alone (but addr32 rep; insn is OK),
so #ifndefed part is bogus.
I changed it to
+ case '^':
+if (TARGET_64BIT Pmode == SImode)
+ fputs (addr32 , file);
+return;
and it seems to work.
Thanks.
--
H.J.
PATCH: Use word_mode to push/pop register for x86
Hi,
push/pop in x86 only works on word_mode registers. This patch properly
handles push/pop on registers in x86. Tested on Linux/x86-64. OK for
trunk?
Thanks.
H.J.
---
2012-03-06 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (setup_incoming_varargs_64): Use word_mode
with integer parameters in registers.
(gen_push): Push register in word_mode instead of Pmode.
(ix86_emit_save_regs): Likewise.
(ix86_emit_save_regs_using_mov): Save integer registers in
word_mode.
(gen_pop): Pop register in word_mode instead of Pmode.
(ix86_emit_restore_regs_using_pop): Likewise.
(ix86_expand_prologue): Replace Pmode with word_mode for push
immediate. Use ix86_gen_pro_epilogue_adjust_stack. Save and
restore RAX and R10 in word_mode.
(ix86_emit_restore_regs_using_mov): Restore integer registers
in word_mode.
(ix86_expand_split_stack_prologue): Save R10_REG and restore in
word_mode.
(ix86_split_to_parts): Use word_mode with PUT_MODE for push.
(ix86_split_long_move): Likewise.
* config/i386/i386.md (W): New.
(*pushmode2_prologue): Replace :P with :W.
(*popmode1): Likewise.
(*popmode1_epilogue): Likewise.
(push/pop peephole2): Use word_mode scratch registers.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 973bbeb..eb4aaa8 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -7600,12 +7600,13 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum)
for (i = cum-regno; i max; i++)
{
- mem = gen_rtx_MEM (Pmode,
+ mem = gen_rtx_MEM (word_mode,
plus_constant (save_area, i * UNITS_PER_WORD));
MEM_NOTRAP_P (mem) = 1;
set_mem_alias_set (mem, set);
- emit_move_insn (mem, gen_rtx_REG (Pmode,
- x86_64_int_parameter_registers[i]));
+ emit_move_insn (mem,
+ gen_rtx_REG (word_mode,
+ x86_64_int_parameter_registers[i]));
}
if (ix86_varargs_fpr_size)
@@ -8660,8 +8661,11 @@ gen_push (rtx arg)
m-fs.cfa_offset += UNITS_PER_WORD;
m-fs.sp_offset += UNITS_PER_WORD;
+ if (REG_P (arg) GET_MODE (arg) != word_mode)
+arg = gen_rtx_REG (word_mode, REGNO (arg));
+
return gen_rtx_SET (VOIDmode,
- gen_rtx_MEM (Pmode,
+ gen_rtx_MEM (word_mode,
gen_rtx_PRE_DEC (Pmode,
stack_pointer_rtx)),
arg);
@@ -8672,9 +8676,12 @@ gen_push (rtx arg)
static rtx
gen_pop (rtx arg)
{
+ if (REG_P (arg) GET_MODE (arg) != word_mode)
+arg = gen_rtx_REG (word_mode, REGNO (arg));
+
return gen_rtx_SET (VOIDmode,
arg,
- gen_rtx_MEM (Pmode,
+ gen_rtx_MEM (word_mode,
gen_rtx_POST_INC (Pmode,
stack_pointer_rtx)));
}
@@ -9141,7 +9148,7 @@ ix86_emit_save_regs (void)
for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- 0; )
if (!SSE_REGNO_P (regno) ix86_save_reg (regno, true))
{
- insn = emit_insn (gen_push (gen_rtx_REG (Pmode, regno)));
+ insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno)));
RTX_FRAME_RELATED_P (insn) = 1;
}
}
@@ -9221,7 +9228,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset)
for (regno = 0; regno FIRST_PSEUDO_REGISTER; regno++)
if (!SSE_REGNO_P (regno) ix86_save_reg (regno, true))
{
-ix86_emit_save_reg_using_mov (Pmode, regno, cfa_offset);
+ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset);
cfa_offset -= UNITS_PER_WORD;
}
}
@@ -10158,7 +10165,7 @@ ix86_expand_prologue (void)
to implement macro RETURN_ADDR_RTX and intrinsic function
expand_builtin_return_addr etc. */
t = plus_constant (crtl-drap_reg, -UNITS_PER_WORD);
- t = gen_frame_mem (Pmode, t);
+ t = gen_frame_mem (word_mode, t);
insn = emit_insn (gen_push (t));
RTX_FRAME_RELATED_P (insn) = 1;
@@ -10355,14 +10362,18 @@ ix86_expand_prologue (void)
if (r10_live eax_live)
{
t = choose_baseaddr (m-fs.sp_offset - allocate);
- emit_move_insn (r10, gen_frame_mem (Pmode, t));
+ emit_move_insn (gen_rtx_REG (word_mode, R10_REG),
+ gen_frame_mem (word_mode, t));
t = choose_baseaddr (m-fs.sp_offset - allocate - UNITS_PER_WORD);
- emit_move_insn (eax, gen_frame_mem (Pmode, t));
+ emit_move_insn (gen_rtx_REG (word_mode, AX_REG),
+ gen_frame_mem (word_mode, t));
}
else if (eax_live || r10_live)
{
t = choose_baseaddr (m-fs.sp_offset - allocate);
- emit_move_insn ((eax_live ? eax : r10), gen_frame_mem
[PATCH, testsuite committed] Fix va-arg-25.c for non-vmx hardware
Committed the following as obvious to prevent the test from running on non-vmx
powerpc64 hardware. Tested on a Power5 system to verify.
-Pat
testsuite/ChangeLog:
2012-03-06 Pat Haugen pthau...@us.ibm.com
* gcc.dg/torture/va-arg-25.c: Fix typo for powerpc64-*-* check.
Index: gcc/testsuite/gcc.dg/torture/va-arg-25.c
===
--- gcc/testsuite/gcc.dg/torture/va-arg-25.c(revision 185012)
+++ gcc/testsuite/gcc.dg/torture/va-arg-25.c(working copy)
@@ -4,7 +4,7 @@
/* { dg-options -msse { target { i?86-*-* x86_64-*-* } } } */
/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } }
} */
/* { dg-options -mabi=altivec -maltivec { target { powerpc-*-* powerpc64-*-* }
} } */
-/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64--*-* }
} } */
+/* { dg-require-effective-target vmx_hw { target { powerpc-*-* powerpc64-*-* }
} } */
#include stdarg.h
#include stdlib.h
[IA-64] Work around thinko in 'x' constraint implementation
We have a regression on one of the testcases of our internal testsuite on IA-64
with a 4.7-based compiler, which is of the form:
test_vec_madd.adb: In function 'Test_Vec_Madd':
test_vec_madd.adb:160:5: error: could not split insn
(insn 887 4859 889 16 (set (reg:TI 158 f30 [orig:417 m ] [417])
(mem/c:TI (reg/f:DI 14 r14 [1025]) [0 S16 A128])) /gnu/lib/gcc/ia64-hp-
openvms/4_7_0/adainclude/g-altcon.adb:277 125 {movti_internal}
(nil))
+===GNAT BUG DETECTED==+
| Pro 7.1.0w (20120221-head) (ia64-hp-openvms) GCC error: |
| in final_scan_insn, at final.c:2716 |
| Error detected around test_vec_madd.adb:160:5|
The compiler aborts during the final pass because it couldn't split the insn.
The pattern for movti_internal is:
(define_insn_and_split movti_internal
[(set (match_operand:TI 0 destination_operand =r, *fm,*x,*f, Q)
(match_operand:TI 1 general_operand r*fim,r, Q, *fOQ,*f))]
ia64_move_ok (operands[0], operands[1])
@
#
#
ldfp8 %X0 = %1%P1
#
#
reload_completed !ia64_load_pair_ok(operands[0], operands[1])
[(const_int 0)]
The problem is that the operands satisfy ia64_load_pair_ok so the splitter
cannot be invoked on them. The root cause is a discrepancy between this
predicate and how the 'x' constraint is interpreted. The predicate uses
FP_REGNO_P to check the destination and this returns true for %f30 (but would
return false for the immediately following register %f31). But recog
interprets the 'x' constraint as meaning that every hard register in the
destination must be in the FP_REGS class; now the mode is TImode so both %f30
and %f31 are taken into account and %f31 isn't in the FP_REGS class, so the
operand is rejected.
AFAICS the problem dates back to the introduction of the code (r102463), so I'm
not sure that we want to rewrite it at this point. That's why the attached
patch is a simple workaround that just avoid ICEing.
Bootstrapped/regtested on IA-64/Linux, OK for the mainline? Do we also want it
for 4.7.1 (I assume that some RA change makes the issue visible in 4.7.x)?
2012-03-06 Eric Botcazou ebotca...@adacore.com
* config/ia64/ia64.c (ia64_load_pair_ok): Return 0 if the second member
of the destination isn't also a FP_REGS register.
--
Eric Botcazou
Index: config/ia64/ia64.c
===
--- config/ia64/ia64.c (revision 184852)
+++ config/ia64/ia64.c (working copy)
@@ -885,7 +887,11 @@ ia64_move_ok (rtx dst, rtx src)
int
ia64_load_pair_ok (rtx dst, rtx src)
{
- if (GET_CODE (dst) != REG || !FP_REGNO_P (REGNO (dst)))
+ /* ??? There is a thinko in the implementation of the x constraint and the
+ FP_REGS class. The constraint will also reject (reg f30:TI) so we must
+ also return false for it. */
+ if (GET_CODE (dst) != REG
+ || !(FP_REGNO_P (REGNO (dst)) FP_REGNO_P (REGNO (dst) + 1)))
return 0;
if (GET_CODE (src) != MEM || MEM_VOLATILE_P (src))
return 0;
[IA-64] Implement static stack checking
This at last implements static stack checking for the IA-64, i.e. stack
checking of the static part of the frame, and makes it possible to pass the
entire ACATS testsuite. The peculiarity is the second stack in memory, namely
the Backing Store of the Register Stack Engine, that needs to be dealt with.
This also introduces full support for unknown insns in the bundling code (the
only other unknown insn, namely set_bsp, didn't need that because it comes
always last in a function).
Bootstrapped/regtested on IA-64/Linux (and also tested on IA-64/HP-UX and VMS),
OK for the mainline?
2012-03-06 Eric Botcazou ebotca...@adacore.com
Tristan Gingold ging...@adacore.com
* doc/md.texi (Standard Names): Document probe_stack_address.
* explow.c (emit_stack_probe): Handle probe_stack_address.
* config/ia64/ia64.md (UNSPECV_PROBE_STACK_ADDRESS): New constant.
(UNSPECV_PROBE_STACK_RANGE): Likewise.
(probe_stack_address): New insn.
(probe_stack_range): Likewise.
* config/ia64/ia64.c: Include common/common-target.h.
(ia64_compute_frame_size): Mark r2 and r3 as used if static stack
checking is enabled.
(ia64_emit_probe_stack_range): New function.
(output_probe_stack_range): Likewise.
(ia64_expand_prologue): Invoke ia64_emit_probe_stack_range if static
builtin stack checking is enabled.
(rtx_needs_barrier) UNSPEC_VOLATILE: Handle UNSPECV_PROBE_STACK_RANGE
and UNSPECV_PROBE_STACK_ADDRESS.
(unknown_for_bundling_p): New predicate.
(group_barrier_needed): Use important_for_bundling_p.
(ia64_dfa_new_cycle): Use unknown_for_bundling_p.
(issue_nops_and_insn): Likewise.
(bundling): Likewise.
(final_emit_insn_group_barriers): Likewise.
* config/ia64/ia64-protos.h (output_probe_stack_range): Declare.
* config/ia64/hpux.h (STACK_CHECK_STATIC_BUILTIN): Define.
(STACK_CHECK_PROTECT): Likewise.
* config/ia64/linux.h (STACK_CHECK_STATIC_BUILTIN): Likewise.
--
Eric Botcazou
Index: doc/md.texi
===
--- doc/md.texi (revision 184852)
+++ doc/md.texi (working copy)
@@ -5610,6 +5610,13 @@ the stack farthest from the current stac
Normally, on platforms where this pattern is needed, you would obtain the
stack limit from a global or thread-specific variable or register.
+@cindex @code{probe_stack_address} instruction pattern
+@item @samp{probe_stack_address}
+If stack checking (@pxref{Stack Checking}) can be done on your system by
+probing the stack but without the need to actually access it, define this
+pattern and signal an error if the stack has overflowed. The single operand
+is the memory address in the stack that needs to be probed.
+
@cindex @code{probe_stack} instruction pattern
@item @samp{probe_stack}
If stack checking (@pxref{Stack Checking}) can be done on your system by
Index: explow.c
===
--- explow.c (revision 184852)
+++ explow.c (working copy)
@@ -1518,17 +1518,24 @@ set_stack_check_libfunc (const char *lib
void
emit_stack_probe (rtx address)
{
- rtx memref = gen_rtx_MEM (word_mode, address);
+#ifdef HAVE_probe_stack_address
+ if (HAVE_probe_stack_address)
+emit_insn (gen_probe_stack_address (address));
+ else
+#endif
+{
+ rtx memref = gen_rtx_MEM (word_mode, address);
- MEM_VOLATILE_P (memref) = 1;
+ MEM_VOLATILE_P (memref) = 1;
- /* See if we have an insn to probe the stack. */
+ /* See if we have an insn to probe the stack. */
#ifdef HAVE_probe_stack
- if (HAVE_probe_stack)
-emit_insn (gen_probe_stack (memref));
- else
+ if (HAVE_probe_stack)
+emit_insn (gen_probe_stack (memref));
+ else
#endif
-emit_move_insn (memref, const0_rtx);
+emit_move_insn (memref, const0_rtx);
+}
}
/* Probe a range of stack addresses from FIRST to FIRST+SIZE, inclusive.
Index: config/ia64/ia64.c
===
--- config/ia64/ia64.c (revision 184852)
+++ config/ia64/ia64.c (working copy)
@@ -47,6 +47,7 @@ along with GCC; see the file COPYING3.
#include timevar.h
#include target.h
#include target-def.h
+#include common/common-target.h
#include tm_p.h
#include hashtab.h
#include langhooks.h
@@ -272,6 +273,7 @@ static int get_template (state_t, int);
static rtx get_next_important_insn (rtx, rtx);
static bool important_for_bundling_p (rtx);
+static bool unknown_for_bundling_p (rtx);
static void bundling (FILE *, int, rtx, rtx);
static void ia64_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
@@ -2695,6 +2701,10 @@ ia64_compute_frame_size (HOST_WIDE_INT s
if (cfun-machine-ia64_eh_epilogue_bsp)
mark_reg_gr_used_mask (cfun-machine-ia64_eh_epilogue_bsp, NULL);
+ /* Static stack checking uses r2 and r3. */
+ if (flag_stack_check ==
[patch] Fix non-standard Ada bootstrap failure on IA-64
If you try to bootstrap the GNAT 4.7.0 compiler on IA-64/Linux with non-default
options (-gnatpg replaced with -gnatpgn), you get another comparison failure
caused by debug insns, stemming from the machine-specific reorg pass (aka insn
bundling on IA-64). With -g , when cselib is called on:
(insn 17 41 18 2 (set (reg/f:DI 14 r14 [357])
(plus:DI (reg:DI 16 r16 [356])
(const_int 28
[0x1c]))) /home/eric/gnat.b/gnat7_47/src/gcc/ada/atree.adb:2244 205 {adddi3}
(expr_list:REG_DEAD (reg:DI 16 r16 [356])
(nil)))
it finds a previous equivalent value:
(plus:DI (plus:DI (ashift:DI (value:DI 5:111 @0x29abbe0/0x29f5f20)
(const_int 5 [0x5]))
(value:DI 9:9 @0x29abc40/0x29f5fe0))
(const_int 28 [0x1c]))
computed for a debug insn:
(debug_insn 12 10 65 2 (var_location:SI n (mem/j:SI (plus:DI (plus:DI
(ashift:DI (reg:DI 14 r14 [orig:344 D.2979 ] [344])
(const_int 5 [0x5]))
(reg/f:DI 15 r15 [orig:342
atree__atree_private_part__nodes__table.32 ] [342]))
(const_int 28 [0x1c])) [0
*atree__atree_private_part__nodes__table.32_17
[D.2979_19].is_extension___XVN.S0.field5+0 S4 A8])) sem_ch2.adb:49 -1
(nil))
When output_dependence is called on a couple of MEMs, it uses the above value
to get the equivalent addresses:
(plus:DI (value:DI 9:9 @0x29abc40/0x29f5fe0)
(value:DI 12:4189 @0x29abc88/0x29c8a20))
and
(plus:DI (plus:DI (ashift:DI (value:DI 5:111 @0x29abbe0/0x29f5f20)
(const_int 5 [0x5]))
(value:DI 9:9 @0x29abc40/0x29f5fe0))
(const_int 28 [0x1c]))
and rtx_refs_may_alias_p returns true on them because ao_ref_from_mem returns
false for one of the MEMs.
Without -g, when cselib is called on:
(insn 14 30 15 2 (set (reg/f:DI 14 r14 [357])
(plus:DI (reg:DI 16 r16 [356])
(const_int 28
[0x1c]))) /home/eric/gnat.b/gnat7_47/src/gcc/ada/atree.adb:2244 205 {adddi3}
(expr_list:REG_DEAD (reg:DI 16 r16 [356])
(nil)))
output_dependence only gets the equivalent addresses:
(plus:DI (value:DI 8:8 @0x299f2e8/0x299f1a0)
(value:DI 10:4188 @0x299f318/0x299f200))
and
(plus:DI (value:DI 12:4254 @0x299f348/0x29a0490)
(const_int 28 [0x1c]))
and memrefs_conflict_p is able to prove that they don't conflict.
The problem is that the more complex expression in the first case fools
memrefs_conflict_p because the predicate makes a wrong assumption about the
canonicalization of address expressions. Hence the attached patch.
Bootstrapped/regtested on IA-64/Linux, OK for the mainline? Do we also want it
for 4.7.1 or is it too specific?
2012-03-06 Eric Botcazou ebotca...@adacore.com
* alias.c (memrefs_conflict_p) PLUS: Correct wrong assumption about
canonicalization of address expressions.
--
Eric Botcazou
Index: alias.c
===
--- alias.c (revision 184852)
+++ alias.c (working copy)
@@ -1993,6 +1993,14 @@ memrefs_conflict_p (int xsize, rtx x, in
return memrefs_conflict_p (xsize, x0, ysize, y0, c);
if (rtx_equal_for_memref_p (x0, y0))
return memrefs_conflict_p (xsize, x1, ysize, y1, c);
+
+ /* Non-legitimate address expressions in debug insns can change the
+ relative canonicalization wrt legitimate address expressions. */
+ if (rtx_equal_for_memref_p (x1, y0))
+ return memrefs_conflict_p (xsize, x0, ysize, y1, c);
+ if (rtx_equal_for_memref_p (x0, y1))
+ return memrefs_conflict_p (xsize, x1, ysize, y0, c);
+
if (CONST_INT_P (x1))
{
if (CONST_INT_P (y1))
Re: [PATCH][1/n] No longer sign-extend sizetype constants, remove TYPE_IS_SIZETYPE
Well. I suppose fixing that negative DECL_FIELD_OFFSET thing should be #1 priority. OK, let me try over the next few days. -- Eric Botcazou
PATCH: Pass and return pointers in word_mode
Pmode may not be word_mode for TARGET_64BIT. This patch changes to
word_mode instead of Pmode. OK for trunk?
Thanks.
H.J.
2012-03-02 H.J. Lu hongjiu...@intel.com
* config/i386/i386.c (function_value_64): Return pointers in
word_mode instead of Pmode.
(ix86_promote_function_mode): Likewise.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 65c4c42..ac9c714 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -7240,8 +7240,8 @@ function_value_64 (enum machine_mode orig_mode, enum
machine_mode mode,
}
else if (POINTER_TYPE_P (valtype))
{
- /* Pointers are always returned in Pmode. */
- mode = Pmode;
+ /* Pointers are always returned in word_mode. */
+ mode = word_mode;
}
ret = construct_container (mode, orig_mode, valtype, 1,
@@ -7312,7 +7312,8 @@ ix86_function_value (const_tree valtype, const_tree
fntype_or_decl,
return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode);
}
-/* Pointer function arguments and return values are promoted to Pmode. */
+/* Pointer function arguments and return values are promoted to
+ word_mode. */
static enum machine_mode
ix86_promote_function_mode (const_tree type, enum machine_mode mode,
@@ -7322,7 +7323,7 @@ ix86_promote_function_mode (const_tree type, enum
machine_mode mode,
if (type != NULL_TREE POINTER_TYPE_P (type))
{
*punsignedp = POINTERS_EXTEND_UNSIGNED;
- return Pmode;
+ return word_mode;
}
return default_promote_function_mode (type, mode, punsignedp, fntype,
for_return);
Support for Runtime CPU type detection via builtins (issue5754058)
Patch for CPU detection at run-time.
===
Patch for CPU detection at run-time, to be used in dispatching of
multi-versioned functions. Please see this discussion:
http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01355.html
when this patch for reviewed the last time.
For more detailed description:
http://gcc.gnu.org/ml/gcc/2012-03/msg00074.html
One of the main concerns was about making CPU detection initialization a
constructor. The main point raised was about constructor ordering. I have
added a priority value to the CPU detection constructor to make it very high
priority so that it is guaranteed to fire before every constructor without
an explicitly marked priority value of 101. However, IFUNC initializers
will still fire before this constructor, so the cpu initialization routine
has to be explicitly called in such initializers for which I have added a
builtin: __builtin_cpu_init ().
This patch adds the following new builtins:
* __builtin_cpu_init
* __builtin_cpu_supports_cmov
* __builtin_cpu_supports_mmx
* __builtin_cpu_supports_popcount
* __builtin_cpu_supports_sse
* __builtin_cpu_supports_sse2
* __builtin_cpu_supports_sse3
* __builtin_cpu_supports_ssse3
* __builtin_cpu_supports_sse4_1
* __builtin_cpu_supports_sse4_2
* __builtin_cpu_is_amd
* __builtin_cpu_is_intel_atom
* __builtin_cpu_is_intel_core2
* __builtin_cpu_is_intel
* __builtin_cpu_is_intel_corei7
* __builtin_cpu_is_intel_corei7_nehalem
* __builtin_cpu_is_intel_corei7_westmere
* __builtin_cpu_is_intel_corei7_sandybridge
* __builtin_cpu_is_amdfam10
* __builtin_cpu_is_amdfam10_barcelona
* __builtin_cpu_is_amdfam10_shanghai
* __builtin_cpu_is_amdfam10_istanbul
* __builtin_cpu_is_amdfam15_bdver1
* __builtin_cpu_is_amdfam15_bdver2
* config/i386/i386.c (build_struct_with_one_bit_fields): New function.
(make_var_decl): New function.
(get_field_from_struct): New function.
(fold_builtin_target): New function.
(ix86_fold_builtin): New function.
(ix86_expand_builtin): Expand new builtins by folding them.
(make_platform_builtin): New functions.
(ix86_init_platform_type_builtins): Make the new builtins.
(ix86_init_builtins): Make new builtins to detect CPU type.
(TARGET_FOLD_BUILTIN): New macro.
(IX86_BUILTIN_CPU_SUPPORTS_CMOV): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_MMX): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_POPCOUNT): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_SSE): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_SSE2): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_SSE3): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_SSSE3): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_SSE4_1): New enum value.
(IX86_BUILTIN_CPU_SUPPORTS_SSE4_2): New enum value.
(IX86_BUILTIN_CPU_INIT): New enum value.
(IX86_BUILTIN_CPU_IS_AMD): New enum value.
(IX86_BUILTIN_CPU_IS_INTEL): New enum value.
(IX86_BUILTIN_CPU_IS_INTEL_ATOM): New enum value.
(IX86_BUILTIN_CPU_IS_INTEL_CORE2): New enum value.
(IX86_BUILTIN_CPU_IS_INTEL_COREI7_NEHALEM): New enum value.
(IX86_BUILTIN_CPU_IS_INTEL_COREI7_WESTMERE): New enum value.
(IX86_BUILTIN_CPU_IS_INTEL_COREI7_SANDYBRIDGE): New enum value.
(IX86_BUILTIN_CPU_IS_AMDFAM10_BARCELONA): New enum value.
(IX86_BUILTIN_CPU_IS_AMDFAM10_SHANGHAI): New enum value.
(IX86_BUILTIN_CPU_IS_AMDFAM10_ISTANBUL): New enum value.
(IX86_BUILTIN_CPU_IS_AMDFAM15H_BDVER1): New enum value.
(IX86_BUILTIN_CPU_IS_AMDFAM15H_BDVER2): New enum value.
* config/i386/i386-builtin-types.def: New function type.
* testsuite/gcc.target/builtin_target.c: New testcase.
* libgcc/config/i386/i386-cpuinfo.c: New file.
* libgcc/config/i386/t-cpuinfo: New file.
* libgcc/config.host: Include t-cpuinfo.
* libgcc/config/i386/libgcc-glibc.ver: Version symbols __cpu_model
and __cpu_features.
Index: libgcc/config.host
===
--- libgcc/config.host (revision 184971)
+++ libgcc/config.host (working copy)
@@ -1142,7 +1142,7 @@ i[34567]86-*-linux* | x86_64-*-linux* | \
i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu | \
i[34567]86-*-knetbsd*-gnu | \
i[34567]86-*-gnu*)
- tmake_file=${tmake_file} t-tls i386/t-linux
+ tmake_file=${tmake_file} t-tls i386/t-linux i386/t-cpuinfo
if test $libgcc_cv_cfi = yes; then
tmake_file=${tmake_file} t-stack i386/t-stack-i386
fi
Index: libgcc/config/i386/t-cpuinfo
===
--- libgcc/config/i386/t-cpuinfo(revision 0)
+++ libgcc/config/i386/t-cpuinfo(revision 0)
@@ -0,0 +1 @@
+LIB2ADD += $(srcdir)/config/i386/i386-cpuinfo.c
Index: libgcc/config/i386/i386-cpuinfo.c
libgo patch committed: Implement runtime.Caller and friends
The standard Go library provides a couple of functions that can be used
to get filename and line number information of the running program. An
example is runtime.Caller, which can be used to return the filename and
line number of the caller of the current function. In the gccgo world,
this kind of information is available in the debug info, but not in the
program itself.
This patch implements this feature for gccgo without requiring me to
write yet another ELF and DWARF reader in the C runtime support (I did
have to add line number support to the debug/dwarf package). I arranged
for the debug/elf package to register a filename/line number routine
with the runtime package, and then have the runtime package call it when
appropriate (although the package is debug/elf, the code also works with
Mach-O and could be extended for other file formats as well). This
approach works provided that any program that needs this information
imports debug/elf. This is imperfect, but it suffices for the most
common use of this functionality, which is for the standard log package.
Bootstrapped and ran Go testsuite on x86_64-unknown-linux-gnu.
Committed to mainline.
Ian
diff -r 5f7b1adc8ca1 libgo/Makefile.am
--- a/libgo/Makefile.am Tue Mar 06 09:48:39 2012 -0800
+++ b/libgo/Makefile.am Tue Mar 06 17:02:14 2012 -0800
@@ -1024,12 +1024,14 @@
go/debug/dwarf/buf.go \
go/debug/dwarf/const.go \
go/debug/dwarf/entry.go \
+ go/debug/dwarf/line.go \
go/debug/dwarf/open.go \
go/debug/dwarf/type.go \
go/debug/dwarf/unit.go
go_debug_elf_files = \
go/debug/elf/elf.go \
- go/debug/elf/file.go
+ go/debug/elf/file.go \
+ go/debug/elf/runtime.go
go_debug_gosym_files = \
go/debug/gosym/pclntab.go \
go/debug/gosym/symtab.go
diff -r 5f7b1adc8ca1 libgo/go/debug/dwarf/const.go
--- a/libgo/go/debug/dwarf/const.go Tue Mar 06 09:48:39 2012 -0800
+++ b/libgo/go/debug/dwarf/const.go Tue Mar 06 17:02:14 2012 -0800
@@ -431,3 +431,30 @@
encUnsignedChar = 0x08
encImaginaryFloat = 0x09
)
+
+// Line number opcodes.
+const (
+ LineExtendedOp = 0
+ LineCopy = 1
+ LineAdvancePC = 2
+ LineAdvanceLine= 3
+ LineSetFile= 4
+ LineSetColumn = 5
+ LineNegateStmt = 6
+ LineSetBasicBlock = 7
+ LineConstAddPC = 8
+ LineFixedAdvancePC = 9
+ // next 3 are DWARF 3
+ LineSetPrologueEnd = 10
+ LineSetEpilogueBegin = 11
+ LineSetISA = 12
+)
+
+// Line number extended opcodes.
+const (
+ LineExtEndSequence = 1
+ LineExtSetAddress = 2
+ LineExtDefineFile = 3
+ // next 1 is DWARF 4
+ LineExtSetDiscriminator = 4
+)
diff -r 5f7b1adc8ca1 libgo/go/debug/dwarf/entry.go
--- a/libgo/go/debug/dwarf/entry.go Tue Mar 06 09:48:39 2012 -0800
+++ b/libgo/go/debug/dwarf/entry.go Tue Mar 06 17:02:14 2012 -0800
@@ -246,6 +246,15 @@
return r
}
+// unitReader returns a new reader starting at a specific unit.
+func (d *Data) unitReader(i int) *Reader {
+ r := Reader{d: d}
+ r.unit = i
+ u := d.unit[i]
+ r.b = makeBuf(d, info, u.off, u.data, u.addrsize)
+ return r
+}
+
// Seek positions the Reader at offset off in the encoded entry stream.
// Offset 0 can be used to denote the first entry.
func (r *Reader) Seek(off Offset) {
diff -r 5f7b1adc8ca1 libgo/go/debug/dwarf/line.go
--- /dev/null Thu Jan 01 00:00:00 1970 +
+++ b/libgo/go/debug/dwarf/line.go Tue Mar 06 17:02:14 2012 -0800
@@ -0,0 +1,416 @@
+// Copyright 2012 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+// DWARF line number information.
+
+package dwarf
+
+import (
+ errors
+ path/filepath
+ sort
+ strconv
+)
+
+// A Line holds all the available information about the source code
+// corresponding to a specific program counter address.
+type Line struct {
+ Filename string // source file name
+ OpIndex int// index of operation in VLIW instruction
+ Line int// line number
+ Columnint// column number
+ ISA int// instruction set code
+ Discriminator int// block discriminator
+ Stmt bool // instruction starts statement
+ Block bool // instruction starts basic block
+ EndPrologue bool // instruction ends function prologue
+ BeginEpilogue bool // instruction begins function epilogue
+}
+
+// LineForPc returns the line number information for a program counter
+// address, if any. When this returns multiple Line structures in a
+// context where only one can be used, the last one is the best.
+func (d *Data) LineForPC(pc uint64) ([]*Line, error) {
+ for i := range d.unit {
+ u := d.unit[i]
+ if u.pc == nil {
+ if err := d.readUnitLine(i, u); err != nil {
+return nil, err
+ }
+ }
+ for _, ar := range u.pc {
+ if pc = ar.low pc ar.high {
+return d.findLine(u, pc)
+ }
+ }
+ }
+ return nil, nil
+}
+
+// readUnitLine reads in the line number information for a compilation
+// unit.
+func (d *Data) readUnitLine(i int, u *unit) error {
+ r :=
Re: [PATCH][target/52481] m68k-*: internal compiler error: in extract_insn, at recog.c:2123
On 03/06/2012 07:22 PM, Richard Henderson wrote: On 03/06/12 09:55, Andreas Schwab wrote: Richard Hendersonr...@redhat.com writes: On 03/06/12 02:13, Andreas Schwab wrote: Ralf Corsepiusralf.corsep...@rtems.org writes: * Incompatiblible/insufficient binutils (I am using binutils-2.22)? * Some as/ld-flags getting lost/improperly propagated during assembly/linking? * Bad/incompatible inline-asm hard-coded somewhere? TAS needs at least ISA_B, ie. at least CFV4. So... the correct test is what... #define ISA_HAS_TAS (!TARGET_COLDFIRE || TARGET_ISAB || TARGET_ISAC) Yes, that looks correct. Thanks. Ralf, I've committed the following to mainline. Please try your rtems testing again, and if that works I'll push the patch to 4.7 branch. Thanks, gcc-4_7-branch now finished bootstrapping for --target=m68k-rtems4.11 with your patch applied. Ralf
[Ping][PATCH, libstdc++-v3] Enable to cross-test libstdc++ on simulator
Hello, Can anybody please review and approve the following simple patch? Thanks very much. http://gcc.gnu.org/ml/libstdc++/2011-08/msg00063.html BR, Terry
Re: PATCH: Pass and return pointers in word_mode
On Tue, Mar 6, 2012 at 11:45 PM, H.J. Lu hongjiu...@intel.com wrote: Pmode may not be word_mode for TARGET_64BIT. This patch changes to word_mode instead of Pmode. OK for trunk? 2012-03-02 H.J. Lu hongjiu...@intel.com * config/i386/i386.c (function_value_64): Return pointers in word_mode instead of Pmode. (ix86_promote_function_mode): Likewise. OK. Thanks, Uros.
Re: [patch] PR 51417
On 03/06/2012 10:43 AM, Richard Guenther wrote: On Mon, 5 Mar 2012, Ralf Corsépius wrote: Hi, The patch below addresses an issue with gcc-4.7.0 the issue I had reported in http://gcc.gnu.org/ml/gcc/2012-03/msg00035.html and somebody else had bz'ed as http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51417 Tested by cross-building gcc-4_7-branch for several *rtems targets on Fedora 16. Further test-builds are in progress. No native build-testing, yet. OK to apply? Ok for trunk and the 4.7 branch if you've done one native build and install successfully. The patch seems to work for native build/install tests (Here fedora-16-x86_64): # ../configure --disable-nls --prefix=/foo/bar --enable-languages=c,c++ --disable-multilib --with-system-zlib # make # make install DESTDIR=~/tmp/INSTALL # cd ~/tmp/INSTALL # ls -l foo/bar/bin/* -rwxr-xr-x. 4 rtems rtems 2099206 Mar 7 08:51 foo/bar/bin/c++ -rwxr-xr-x. 1 rtems rtems 2096784 Mar 7 08:51 foo/bar/bin/cpp -rwxr-xr-x. 4 rtems rtems 2099206 Mar 7 08:51 foo/bar/bin/g++ -rwxr-xr-x. 3 rtems rtems 2094252 Mar 7 08:51 foo/bar/bin/gcc -rwxr-xr-x. 2 rtems rtems 113695 Mar 7 08:51 foo/bar/bin/gcc-ar -rwxr-xr-x. 2 rtems rtems 113631 Mar 7 08:51 foo/bar/bin/gcc-nm -rwxr-xr-x. 2 rtems rtems 113643 Mar 7 08:51 foo/bar/bin/gcc-ranlib -rwxr-xr-x. 1 rtems rtems 1064274 Mar 7 08:51 foo/bar/bin/gcov -rwxr-xr-x. 4 rtems rtems 2099206 Mar 7 08:51 foo/bar/bin/x86_64-unknown-linux-gnu-c++ -rwxr-xr-x. 4 rtems rtems 2099206 Mar 7 08:51 foo/bar/bin/x86_64-unknown-linux-gnu-g++ -rwxr-xr-x. 3 rtems rtems 2094252 Mar 7 08:51 foo/bar/bin/x86_64-unknown-linux-gnu-gcc -rwxr-xr-x. 3 rtems rtems 2094252 Mar 7 08:51 foo/bar/bin/x86_64-unknown-linux-gnu-gcc-4.7.0 -rwxr-xr-x. 2 rtems rtems 113695 Mar 7 08:51 foo/bar/bin/x86_64-unknown-linux-gnu-gcc-ar -rwxr-xr-x. 2 rtems rtems 113631 Mar 7 08:51 foo/bar/bin/x86_64-unknown-linux-gnu-gcc-nm -rwxr-xr-x. 2 rtems rtems 113643 Mar 7 08:51 foo/bar/bin/x86_64-unknown-linux-gnu-gcc-ranlib Ralf
