[gem5-dev] Change in gem5/gem5[develop]: cpu: Remove units from stats description

2021-02-04 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40735 )



Change subject: cpu: Remove units from stats description
..

cpu: Remove units from stats description

A recent change https://gem5-review.googlesource.com/c/public/gem5/+/40622
allows units to be shown in stats dump; the units in stats
descriptions are nolonger necessary. This change removes units
from stats descriptions. However, for units that are multiples
of a supported unit (e.g. MegaBytes), the units

Change-Id: Ib63ea44e757f755f761b20b40e045bc37c90baff
Signed-off-by: Hoa Nguyen 
---
M src/cpu/testers/traffic_gen/base.cc
1 file changed, 2 insertions(+), 2 deletions(-)



diff --git a/src/cpu/testers/traffic_gen/base.cc  
b/src/cpu/testers/traffic_gen/base.cc

index 46c158b..320de92 100644
--- a/src/cpu/testers/traffic_gen/base.cc
+++ b/src/cpu/testers/traffic_gen/base.cc
@@ -353,9 +353,9 @@
"Avg latency of write requests",
totalWriteLatency / totalWrites),
   ADD_STAT(readBW, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-   "Read bandwidth in bytes/s", bytesRead / simSeconds),
+   "Read bandwidth", bytesRead / simSeconds),
   ADD_STAT(writeBW, UNIT_RATE(Stats::Units::Byte,  
Stats::Units::Second),

-   "Write bandwidth in bytes/s", bytesWritten / simSeconds)
+   "Write bandwidth", bytesWritten / simSeconds)
 {
 }


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Gerrit-Change-Id: Ib63ea44e757f755f761b20b40e045bc37c90baff
Gerrit-Change-Number: 40735
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Gerrit-Owner: Hoa Nguyen 
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[gem5-dev] Change in gem5/gem5[develop]: scons: Add support for debug info compression.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40715 )



Change subject: scons: Add support for debug info compression.
..

scons: Add support for debug info compression.

If supported this will compress the debug information in object files,
libraries, and binaries. This decreases the size of the build/ARM
directory from 11GB to 7.2GB.

Change-Id: I71919062d23742b7658918b0fa9c4d91d0521fbf
---
M SConstruct
1 file changed, 32 insertions(+), 2 deletions(-)



diff --git a/SConstruct b/SConstruct
index f744c77..87baed8 100755
--- a/SConstruct
+++ b/SConstruct
@@ -383,8 +383,8 @@
 # https://gcc.gnu.org/ml/gcc-patches/2015-11/msg03161.html
 # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69866
 if not GetOption('force_lto'):
-main.Append(PSHLINKFLAGS='-flinker-output=rel')
-main.Append(PLINKFLAGS='-flinker-output=rel')
+main.Append(PSHLINKFLAGS=['-flinker-output=rel'])
+main.Append(PLINKFLAGS=['-flinker-output=rel'])

 disable_lto = GetOption('no_lto')
 if not disable_lto and main.get('BROKEN_INCREMENTAL_LTO', False) and \
@@ -553,6 +553,24 @@
 main['TIMEOUT'] =  timeout_version and \
 compareVersions(timeout_version[-1], '8.13') >= 0

+def CheckCxxFlag(context, flag):
+context.Message("Checking for compiler %s support..." % flag)
+last_cxxflags = context.env['CXXFLAGS']
+context.env.Append(CXXFLAGS=[flag])
+ret = context.TryCompile('', '.cc')
+context.env['CXXFLAGS'] = last_cxxflags
+context.Result(ret)
+return ret
+
+def CheckLinkFlag(context, flag):
+context.Message("Checking for linker %s support..." % flag)
+last_linkflags = context.env['LINKFLAGS']
+context.env.Append(LINKFLAGS=[flag])
+ret = context.TryLink('int main(int, char *[]) { return 0; }', '.cc')
+context.env['LINKFLAGS'] = last_linkflags
+context.Result(ret)
+return ret
+
 # Add a custom Check function to test for structure members.
 def CheckMember(context, include, decl, member, include_quotes="<>"):
 context.Message("Checking for member %s in %s..." %
@@ -602,6 +620,8 @@
  custom_tests = {
 'CheckMember' : CheckMember,
 'CheckPythonLib' : CheckPythonLib,
+'CheckCxxFlag' : CheckCxxFlag,
+'CheckLinkFlag' : CheckLinkFlag,
 })

 # Check if we should compile a 64 bit binary on Mac OS X/Darwin
@@ -641,6 +661,16 @@
 print('Using build cache located at', main['M5_BUILD_CACHE'])
 CacheDir(main['M5_BUILD_CACHE'])

+AsCompressDebugFlag = '-Wa,--compress-debug-sections=zlib-gabi'
+LdCompressDebugFlag = '-Wl,--compress-debug-sections=zlib-gabi'
+if conf.CheckCxxFlag(AsCompressDebugFlag):
+main.Append(CXXFLAGS=[AsCompressDebugFlag])
+if conf.CheckLinkFlag(LdCompressDebugFlag):
+main.Append(LINKFLAGS=[LdCompressDebugFlag],
+SHLINKFLAGS=[LdCompressDebugFlag],
+PLINKFLAGS=[LdCompressDebugFlag],
+PSHLINKFLAGS=[LdCompressDebugFlag])
+
 main['USE_PYTHON'] = not GetOption('without_python')
 if main['USE_PYTHON']:
 # Find Python include and library directories for embedding the

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Gerrit-Change-Id: I71919062d23742b7658918b0fa9c4d91d0521fbf
Gerrit-Change-Number: 40715
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Gerrit-Owner: Gabe Black 
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[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Fixed the style of stats variable names in TlbStats

2021-02-04 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40695 )



Change subject: arch-riscv: Fixed the style of stats variable names in  
TlbStats

..

arch-riscv: Fixed the style of stats variable names in TlbStats

The variable names should be of camel case style.

Change-Id: I397c9f165a53ecc120ec57f7214c90a65e12407e
Signed-off-by: Hoa Nguyen 
---
M src/arch/riscv/tlb.cc
M src/arch/riscv/tlb.hh
2 files changed, 21 insertions(+), 21 deletions(-)



diff --git a/src/arch/riscv/tlb.cc b/src/arch/riscv/tlb.cc
index 84eb6e2..8001d83 100644
--- a/src/arch/riscv/tlb.cc
+++ b/src/arch/riscv/tlb.cc
@@ -108,21 +108,21 @@
 entry->lruSeq = nextSeq();

 if (mode == Write)
-stats.write_accesses++;
+stats.writeAccesses++;
 else
-stats.read_accesses++;
+stats.readAccesses++;

 if (!entry) {
 if (mode == Write)
-stats.write_misses++;
+stats.writeMisses++;
 else
-stats.read_misses++;
+stats.readMisses++;
 }
 else {
 if (mode == Write)
-stats.write_hits++;
+stats.writeHits++;
 else
-stats.read_hits++;
+stats.readHits++;
 }

 DPRINTF(TLBVerbose, "lookup(vpn=%#x, asid=%#x): %s ppn %#x\n",
@@ -498,17 +498,17 @@

 TLB::TlbStats::TlbStats(Stats::Group *parent)
   : Stats::Group(parent),
-ADD_STAT(read_hits, UNIT_COUNT, "read hits"),
-ADD_STAT(read_misses, UNIT_COUNT, "read misses"),
-ADD_STAT(read_accesses, UNIT_COUNT, "read accesses"),
-ADD_STAT(write_hits, UNIT_COUNT, "write hits"),
-ADD_STAT(write_misses, UNIT_COUNT, "write misses"),
-ADD_STAT(write_accesses, UNIT_COUNT, "write accesses"),
+ADD_STAT(readHits, UNIT_COUNT, "read hits"),
+ADD_STAT(readMisses, UNIT_COUNT, "read misses"),
+ADD_STAT(readAccesses, UNIT_COUNT, "read accesses"),
+ADD_STAT(writeHits, UNIT_COUNT, "write hits"),
+ADD_STAT(writeMisses, UNIT_COUNT, "write misses"),
+ADD_STAT(writeAccesses, UNIT_COUNT, "write accesses"),
 ADD_STAT(hits, UNIT_COUNT, "Total TLB (read and write) hits",
- read_hits + write_hits),
+ readHits + writeHits),
 ADD_STAT(misses, UNIT_COUNT, "Total TLB (read and write) misses",
- read_misses + write_misses),
+ readMisses + writeMisses),
 ADD_STAT(accesses, UNIT_COUNT, "Total TLB (read and write) accesses",
- read_accesses + write_accesses)
+ readAccesses + writeAccesses)
 {
 }
diff --git a/src/arch/riscv/tlb.hh b/src/arch/riscv/tlb.hh
index cb6059e..ef957be 100644
--- a/src/arch/riscv/tlb.hh
+++ b/src/arch/riscv/tlb.hh
@@ -67,14 +67,14 @@
 struct TlbStats : public Stats::Group{
 TlbStats(Stats::Group *parent);

-Stats::Scalar read_hits;
-Stats::Scalar read_misses;
+Stats::Scalar readHits;
+Stats::Scalar readMisses;
 Stats::Scalar read_acv;
-Stats::Scalar read_accesses;
-Stats::Scalar write_hits;
-Stats::Scalar write_misses;
+Stats::Scalar readAccesses;
+Stats::Scalar writeHits;
+Stats::Scalar writeMisses;
 Stats::Scalar write_acv;
-Stats::Scalar write_accesses;
+Stats::Scalar writeAccesses;

 Stats::Formula hits;
 Stats::Formula misses;

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Gerrit-Owner: Hoa Nguyen 
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[gem5-dev] Change in gem5/gem5[develop]: dev,dev-arm: Remove units from stats description

2021-02-04 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40675 )



Change subject: dev,dev-arm: Remove units from stats description
..

dev,dev-arm: Remove units from stats description

A recent change https://gem5-review.googlesource.com/c/public/gem5/+/40622
allows units to be shown in stats dump; the units in stats
descriptions are nolonger necessary. This change removes units
from stats descriptions. However, for units that are multiples
of a supported unit (e.g. MegaBytes), the units in the descriptions
are kept until unit prefixes are supported.

Change-Id: I199afbf29fee13b08eeb323c4cb56c8a974dbe94
Signed-off-by: Hoa Nguyen 
---
M src/dev/arm/ufs_device.cc
M src/dev/net/etherdevice.cc
2 files changed, 5 insertions(+), 5 deletions(-)



diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc
index e53913c..be55c9f 100644
--- a/src/dev/arm/ufs_device.cc
+++ b/src/dev/arm/ufs_device.cc
@@ -778,11 +778,11 @@
   /** Average bandwidth for reads and writes */
   ADD_STAT(averageReadSSDBW,
UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-   "Average read bandwidth (bytes/s)",
+   "Average read bandwidth",
totalReadSSD / simSeconds),
   ADD_STAT(averageWriteSSDBW,
UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-   "Average write bandwidth (bytes/s)",
+   "Average write bandwidth",
totalWrittenSSD / simSeconds),
   ADD_STAT(averageSCSIQueue,
UNIT_RATE(Stats::Units::Count, Stats::Units::Tick),
diff --git a/src/dev/net/etherdevice.cc b/src/dev/net/etherdevice.cc
index 7c817f4..9def479 100644
--- a/src/dev/net/etherdevice.cc
+++ b/src/dev/net/etherdevice.cc
@@ -38,10 +38,10 @@
   ADD_STAT(txPackets, UNIT_COUNT, "Number of Packets Transmitted"),
   ADD_STAT(rxPackets, UNIT_COUNT, "Number of Packets Received"),
   ADD_STAT(txBandwidth, UNIT_RATE(Stats::Units::Bit,  
Stats::Units::Second),

-   "Transmit Bandwidth (bits/s)",
+   "Transmit Bandwidth",
txBytes * Stats::constant(8) / simSeconds),
   ADD_STAT(rxBandwidth, UNIT_RATE(Stats::Units::Bit,  
Stats::Units::Second),

-   "Receive Bandwidth (bits/s)",
+   "Receive Bandwidth",
rxBytes * Stats::constant(8) / simSeconds),
   ADD_STAT(txIpChecksums, UNIT_COUNT,
"Number of tx IP Checksums done by device"),
@@ -65,7 +65,7 @@
"Number of descriptor bytes write w/ DMA"),
   ADD_STAT(totBandwidth,
UNIT_RATE(Stats::Units::Bit, Stats::Units::Second),
-   "Total Bandwidth (bits/s)",
+   "Total Bandwidth",
txBandwidth + rxBandwidth),
   ADD_STAT(totPackets, UNIT_COUNT, "Total Packets", txPackets +  
rxPackets),

   ADD_STAT(totBytes, UNIT_BYTE, "Total Bytes", txBytes + rxBytes),

--
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[gem5-dev] Re: Upstreaming power-gem5

2021-02-04 Thread Sandipan Das via gem5-dev 
Hello Boris,

On 04/02/21 10:08 pm, Boris Shingarov wrote:
>  > The current sequence breaks 32-bit support in
>  > the beginning and then restores it back towards the end.
>  > Wondering if that could be a problem with the CI?
> 
> I would be surprised if there is even any POWER-specific CI at all.
> The one POWER binary we had (in test-progs), was removed at c1ebdf66f.  I've 
> been waiting on 86222736e (which just got in) before submitting
> https://gem5-review.googlesource.com/c/public/gem5/+/40635 
>  ,
> could you please code-review that?  Then, we are ready to merge your e52dbcb.

Done.

> 
>  > The current sequence breaks 32-bit support in
>  > the beginning and then restores it back towards the end.
> 
> Up to you really.  My guess is that when you look at how much `develop` has 
> diverged in the past months, you will find keeping the sequence less of a 
> thing.
> 

Got it. I started rebasing against 'develop' last night and ran
into a problem with one of the branch instruction related patches.
Hopefully, I can get that fixed soon. I also noticed this recent
patch from Gabe:

commit 7bb456f02
Author: Gabe Black 
Date:   Sun Jan 24 23:16:43 2021 -0800

arch-power: Delete unused register related constants.

I was actually planning on reusing some of these constants
like here:
https://github.com/sandip4n/gem5/commit/6ffda6f4583054a9d49b90cbd67189c813bd4dae

Maybe I'll add a patch that reintroduces the relevant ones.


- Sandipan
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[gem5-dev] Change in gem5/gem5[develop]: util,python: Ignore ELF binary blobs in pre-commit

2021-02-04 Thread Boris Shingarov (Gerrit) via gem5-dev 
Boris Shingarov has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40636 )


Change subject: util,python: Ignore ELF binary blobs in pre-commit
..

util,python: Ignore ELF binary blobs in pre-commit

Change-Id: I60554b2ae7536687a6c0a883a7678f793c3c77d4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40636
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M util/style/style.py
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/util/style/style.py b/util/style/style.py
index 1a5e94b..d8afd09 100644
--- a/util/style/style.py
+++ b/util/style/style.py
@@ -106,6 +106,7 @@
 _re_ignore("^ext/"),
 # Ignore test data, as they are not code
 _re_ignore("^tests/(?:quick|long)/"),
+_re_ignore("^tests/test-progs/hello/bin/"),
 # Only include Scons files and those with extensions that suggest  
source

 # code
 _re_only("^((.*\/)?(SConscript|SConstruct)|"

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I60554b2ae7536687a6c0a883a7678f793c3c77d4
Gerrit-Change-Number: 40636
Gerrit-PatchSet: 2
Gerrit-Owner: Boris Shingarov 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Boris Shingarov 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Remove unnecessary includes from base/loader/symtab.[cc|hh].

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40619 )


Change subject: base: Remove unnecessary includes from  
base/loader/symtab.[cc|hh].

..

base: Remove unnecessary includes from base/loader/symtab.[cc|hh].

These were either completely unnecessary, or headers in the .cc which
had already been included in the .hh and were not needed beyond their
use in the .hh.

Change-Id: Ic95e29f3fdd8cab00ab93d254d2e1c25aacf4632
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40619
Reviewed-by: Daniel Carvalho 
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/base/loader/symtab.cc
M src/base/loader/symtab.hh
2 files changed, 3 insertions(+), 9 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Daniel Carvalho: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/base/loader/symtab.cc b/src/base/loader/symtab.cc
index 2a23661..c2c53cc 100644
--- a/src/base/loader/symtab.cc
+++ b/src/base/loader/symtab.cc
@@ -30,14 +30,9 @@

 #include 
 #include 
-#include 
-#include 

 #include "base/logging.hh"
 #include "base/str.hh"
-#include "base/trace.hh"
-#include "base/types.hh"
-#include "sim/serialize.hh"

 namespace Loader
 {
diff --git a/src/base/loader/symtab.hh b/src/base/loader/symtab.hh
index 1e99fec..a0203a6 100644
--- a/src/base/loader/symtab.hh
+++ b/src/base/loader/symtab.hh
@@ -26,8 +26,8 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */

-#ifndef __SYMTAB_HH__
-#define __SYMTAB_HH__
+#ifndef __BASE_LOADER_SYMTAB_HH__
+#define __BASE_LOADER_SYMTAB_HH__

 #include 
 #include 
@@ -36,7 +36,6 @@
 #include 
 #include 

-#include "base/trace.hh"
 #include "base/types.hh"
 #include "sim/serialize.hh"

@@ -239,4 +238,4 @@

 } // namespace Loader

-#endif // __SYMTAB_HH__
+#endif // __BASE_LOADER_SYMTAB_HH__



The change was submitted with unreviewed changes in the following files:

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Gerrit-Change-Id: Ic95e29f3fdd8cab00ab93d254d2e1c25aacf4632
Gerrit-Change-Number: 40619
Gerrit-PatchSet: 4
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Bobby R. Bruce 
Gerrit-Reviewer: Daniel Carvalho 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch,cpu: Move a Decode DPRINTF into the arch Decoder classes.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40099 )


Change subject: arch,cpu: Move a Decode DPRINTF into the arch Decoder  
classes.

..

arch,cpu: Move a Decode DPRINTF into the arch Decoder classes.

This DPRINTF accesses the ExtMachInst typed machInst member of the
StaticInst class, and so is ISA dependent. Move the DPRINTF to where the
instructions are actually decoded where that type doesn't have to be
disambiguated.

Also, this change makes this DPRINTF more accurate, since microops are
not really "decoded" when they are extracted from a macroop. The process
of unpacking them to feed into the rest of the CPU should be fairly
trivial, so really they're just being retrieved. With the DPRINTF in
this new position, it will only trigger when an instruction is actually
decoded from memory.

Change-Id: I14145165b93bb004057a729fa7909cd2d3d34d29
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40099
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/arm/decoder.hh
M src/arch/mips/decoder.hh
M src/arch/power/decoder.hh
M src/arch/riscv/decoder.cc
M src/arch/sparc/decoder.hh
M src/arch/x86/decoder.cc
M src/cpu/simple/base.cc
7 files changed, 40 insertions(+), 19 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh
index 4f8e71a..1f14328 100644
--- a/src/arch/arm/decoder.hh
+++ b/src/arch/arm/decoder.hh
@@ -49,6 +49,7 @@
 #include "arch/generic/decoder.hh"
 #include "base/types.hh"
 #include "cpu/static_inst.hh"
+#include "debug/Decode.hh"
 #include "enums/DecoderFlavor.hh"

 namespace ArmISA
@@ -172,7 +173,10 @@
 StaticInstPtr
 decode(ExtMachInst mach_inst, Addr addr)
 {
-return defaultCache.decode(this, mach_inst, addr);
+StaticInstPtr si = defaultCache.decode(this, mach_inst, addr);
+DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
+si->getName(), mach_inst);
+return si;
 }

 /**
diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 9c6ae18..6e00bc3 100644
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -35,6 +35,7 @@
 #include "base/logging.hh"
 #include "base/types.hh"
 #include "cpu/static_inst.hh"
+#include "debug/Decode.hh"

 namespace MipsISA
 {
@@ -98,7 +99,10 @@
 StaticInstPtr
 decode(ExtMachInst mach_inst, Addr addr)
 {
-return defaultCache.decode(this, mach_inst, addr);
+StaticInstPtr si = defaultCache.decode(this, mach_inst, addr);
+DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
+si->getName(), mach_inst);
+return si;
 }

 StaticInstPtr
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index d89c9b1..4e02ef7 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -33,6 +33,7 @@
 #include "arch/generic/decoder.hh"
 #include "arch/power/types.hh"
 #include "cpu/static_inst.hh"
+#include "debug/Decode.hh"

 namespace PowerISA
 {
@@ -105,7 +106,10 @@
 StaticInstPtr
 decode(ExtMachInst mach_inst, Addr addr)
 {
-return defaultCache.decode(this, mach_inst, addr);
+StaticInstPtr si = defaultCache.decode(this, mach_inst, addr);
+DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
+si->getName(), mach_inst);
+return si;
 }

 StaticInstPtr
diff --git a/src/arch/riscv/decoder.cc b/src/arch/riscv/decoder.cc
index a117991..26b6adb 100644
--- a/src/arch/riscv/decoder.cc
+++ b/src/arch/riscv/decoder.cc
@@ -81,13 +81,14 @@
 {
 DPRINTF(Decode, "Decoding instruction 0x%08x at address %#x\n",
 mach_inst, addr);
-if (instMap.find(mach_inst) != instMap.end())
-return instMap[mach_inst];
-else {
-StaticInstPtr si = decodeInst(mach_inst);
-instMap[mach_inst] = si;
-return si;
-}
+
+StaticInstPtr  = instMap[mach_inst];
+if (!si)
+si = decodeInst(mach_inst);
+
+DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
+si->getName(), mach_inst);
+return si;
 }

 StaticInstPtr
diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 8e68451..ece3b9c 100644
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -34,6 +34,7 @@
 #include "arch/sparc/registers.hh"
 #include "arch/sparc/types.hh"
 #include "cpu/static_inst.hh"
+#include "debug/Decode.hh"

 namespace SparcISA
 {
@@ -112,7 +113,10 @@
 StaticInstPtr
 decode(ExtMachInst mach_inst, Addr addr)
 {
-return defaultCache.decode(this, mach_inst, addr);
+StaticInstPtr si = defaultCache.decode(this, mach_inst, addr);
+DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
+si->getName(),

[gem5-dev] Change in gem5/gem5[develop]: cpu: Replace fixed sized arrays in the O3 inst with variable arrays.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38384 )


Change subject: cpu: Replace fixed sized arrays in the O3 inst with  
variable arrays.

..

cpu: Replace fixed sized arrays in the O3 inst with variable arrays.

The only way to allocate fixed sized arrays which will definitely be big
enough for all source/destination registers for a given instruction is
to track the maximum number of each at compile time, and then size the
arrays appropriately. That creates a point of centralization which
prevents breaking up decoder and instruction definitions into more
modular pieces, and if multiple ISAs are ever built at once, would
require coordination between all ISAs, and wasting memory for most of
them.

The dynamic allocation overhead is minimized by allocating the storage
for all variable arrays in one chunk, and then placing the arrays there
using placement new. There is still some overhead, although less than it
might be otherwise.

Change-Id: Id2c42869cba944deb97da01ca9e0e70186e22532
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38384
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/cpu/base_dyn_inst.hh
M src/cpu/base_dyn_inst_impl.hh
M src/cpu/o3/commit_impl.hh
M src/cpu/o3/dyn_inst.hh
M src/cpu/o3/dyn_inst_impl.hh
M src/cpu/o3/iew_impl.hh
M src/cpu/o3/inst_queue_impl.hh
M src/cpu/o3/probe/elastic_trace.cc
M src/cpu/o3/rename_impl.hh
9 files changed, 217 insertions(+), 134 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index ed098a2..68a6bb3 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -43,6 +43,7 @@
 #ifndef __CPU_BASE_DYN_INST_HH__
 #define __CPU_BASE_DYN_INST_HH__

+#include 
 #include 
 #include 
 #include 
@@ -91,11 +92,6 @@
 // The list of instructions iterator type.
 typedef typename std::list::iterator ListIt;

-enum {
-MaxInstSrcRegs = TheISA::MaxInstSrcRegs,/// Max source regs
-MaxInstDestRegs = TheISA::MaxInstDestRegs   /// Max dest regs
-};
-
   protected:
 enum Status {
 IqEntry, /// Instruction is in the IQ
@@ -182,12 +178,168 @@
 std::bitset status;

   protected:
- /** Whether or not the source register is ready.
- *  @todo: Not sure this should be here vs the derived class.
+/**
+ * Collect register related information into a single struct. The  
number of
+ * source and destination registers can vary, and storage for  
information

+ * about them needs to be allocated dynamically. This class figures out
+ * how much space is needed and allocates it all at once, and then
+ * trivially divies it up for each type of per-register array.
  */
-std::bitset _readySrcRegIdx;
+struct Regs
+{
+  private:
+size_t _numSrcs;
+size_t _numDests;
+
+size_t srcsReady = 0;
+
+using BackingStorePtr = std::unique_ptr;
+using BufCursor = BackingStorePtr::pointer;
+
+BackingStorePtr buf;
+
+// Members should be ordered based on required alignment so that  
they

+// can be allocated contiguously.
+
+// Flattened register index of the destination registers of this
+// instruction.
+RegId *_flatDestIdx;
+
+// Physical register index of the destination registers of this
+// instruction.
+PhysRegIdPtr *_destIdx;
+
+// Physical register index of the previous producers of the
+// architected destinations.
+PhysRegIdPtr *_prevDestIdx;
+
+static inline size_t
+bytesForDests(size_t num)
+{
+return (sizeof(RegId) + 2 * sizeof(PhysRegIdPtr)) * num;
+}
+
+// Physical register index of the source registers of this  
instruction.

+PhysRegIdPtr *_srcIdx;
+
+// Whether or not the source register is ready, one bit per  
register.

+uint8_t *_readySrcIdx;
+
+static inline size_t
+bytesForSources(size_t num)
+{
+return sizeof(PhysRegIdPtr) * num +
+sizeof(uint8_t) * ((num + 7) / 8);
+}
+
+template 
+static inline void
+allocate(T *, BufCursor , size_t count)
+{
+ptr = new (cur) T[count];
+cur += sizeof(T) * count;
+}
+
+  public:
+size_t numSrcs() const { return _numSrcs; }
+size_t numDests() const { return _numDests; }
+
+void
+init()
+{
+std::fill(_readySrcIdx, _readySrcIdx + (numSrcs() + 7) / 8, 0);
+}
+
+Regs(size_t srcs, size_t dests) : _numSrcs(srcs), _numDests(dests),
+buf(new uint8_t[bytesForSources(srcs) + bytesForDests(dests)])
+

[gem5-dev] Change in gem5/gem5[develop]: mem: Remove units from stats description

2021-02-04 Thread Hoa Nguyen (Gerrit) via gem5-dev 
Hoa Nguyen has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40655 )



Change subject: mem: Remove units from stats description
..

mem: Remove units from stats description

The change https://gem5-review.googlesource.com/c/public/gem5/+/40622
allows units to be shown in stats dump, the units in stats
descriptions are nolonger necessary. This change removes units
from stats descriptions. However, for units that are multiples
of a supported unit (e.g. MegaBytes), the units in the descriptions
are kept until unit prefixes are supported.

Change-Id: I4d87139290a8458e87da776e4328edbd6c224546
Signed-off-by: Hoa Nguyen 
---
M src/mem/abstract_mem.cc
M src/mem/cache/compressors/base.cc
M src/mem/comm_monitor.cc
M src/mem/mem_ctrl.cc
M src/mem/qos/mem_ctrl.cc
M src/mem/xbar.cc
6 files changed, 15 insertions(+), 16 deletions(-)



diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index 33379af..a3e4db8 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -123,13 +123,13 @@
 ADD_STAT(numOther, UNIT_COUNT,
  "Number of other requests responded to by this memory"),
 ADD_STAT(bwRead, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
- "Total read bandwidth from this memory (bytes/s)"),
+ "Total read bandwidth from this memory"),
 ADD_STAT(bwInstRead, UNIT_RATE(Stats::Units::Byte,  
Stats::Units::Second),

- "Instruction read bandwidth from this memory (bytes/s)"),
+ "Instruction read bandwidth from this memory"),
 ADD_STAT(bwWrite, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
- "Write bandwidth from this memory (bytes/s)"),
+ "Write bandwidth from this memory"),
 ADD_STAT(bwTotal, UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
- "Total bandwidth to/from this memory (bytes/s)")
+ "Total bandwidth to/from this memory")
 {
 }

diff --git a/src/mem/cache/compressors/base.cc  
b/src/mem/cache/compressors/base.cc

index e83cb6b..832dc5d6 100644
--- a/src/mem/cache/compressors/base.cc
+++ b/src/mem/cache/compressors/base.cc
@@ -234,10 +234,10 @@
  "Number of blocks that were compressed to this power of two "
  "size"),
 ADD_STAT(compressionSizeBits, UNIT_BIT,
- "Total compressed data size, in bits"),
+ "Total compressed data size"),
 ADD_STAT(avgCompressionSizeBits,
  UNIT_RATE(Stats::Units::Bit, Stats::Units::Count),
- "Average compression size, in bits"),
+ "Average compression size"),
 ADD_STAT(decompressions, UNIT_COUNT, "Total number of decompressions")
 {
 }
diff --git a/src/mem/comm_monitor.cc b/src/mem/comm_monitor.cc
index dffc8d1..8807a73 100644
--- a/src/mem/comm_monitor.cc
+++ b/src/mem/comm_monitor.cc
@@ -110,23 +110,23 @@
   readBytes(0),
   ADD_STAT(readBandwidthHist,
UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-   "Histogram of read bandwidth per sample period (bytes/s)"),
+   "Histogram of read bandwidth per sample period"),
   ADD_STAT(totalReadBytes, UNIT_BYTE, "Number of bytes read"),
   ADD_STAT(averageReadBandwidth,
UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-   "Average read bandwidth (bytes/s)",
+   "Average read bandwidth",
totalReadBytes / simSeconds),

   writtenBytes(0),
   ADD_STAT(writeBandwidthHist,
UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-   "Histogram of write bandwidth (bytes/s)"),
+   "Histogram of write bandwidth"),
   ADD_STAT(totalWrittenBytes,
UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
"Number of bytes written"),
   ADD_STAT(averageWriteBandwidth,
UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
-   "Average write bandwidth (bytes/s)",
+   "Average write bandwidth",
totalWrittenBytes / simSeconds),

   disableLatencyHists(params.disable_latency_hists),
diff --git a/src/mem/mem_ctrl.cc b/src/mem/mem_ctrl.cc
index 8832395..4ba7761 100644
--- a/src/mem/mem_ctrl.cc
+++ b/src/mem/mem_ctrl.cc
@@ -1249,10 +1249,10 @@
  "Per-requestor bytes write to memory"),
 ADD_STAT(requestorReadRate,
  UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
- "Per-requestor bytes read from memory rate (Bytes/sec)"),
+ "Per-requestor bytes read from memory rate"),
 ADD_STAT(requestorWriteRate,
  UNIT_RATE(Stats::Units::Byte, Stats::Units::Second),
- "Per-requestor bytes write to memory rate (Bytes/sec)"),
+ "Per-requestor bytes write to memory rate"),
 ADD_STAT(requestorReadAccesses, UNIT_COUNT,
  "Per-requestor read serviced

[gem5-dev] Change in gem5/gem5[develop]: util,python: Ignore ELF binary blobs in pre-commit

2021-02-04 Thread Boris Shingarov (Gerrit) via gem5-dev 
Boris Shingarov has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40636 )



Change subject: util,python: Ignore ELF binary blobs in pre-commit
..

util,python: Ignore ELF binary blobs in pre-commit

Change-Id: I60554b2ae7536687a6c0a883a7678f793c3c77d4
---
M util/style/style.py
1 file changed, 1 insertion(+), 0 deletions(-)



diff --git a/util/style/style.py b/util/style/style.py
index 1a5e94b..d8afd09 100644
--- a/util/style/style.py
+++ b/util/style/style.py
@@ -106,6 +106,7 @@
 _re_ignore("^ext/"),
 # Ignore test data, as they are not code
 _re_ignore("^tests/(?:quick|long)/"),
+_re_ignore("^tests/test-progs/hello/bin/"),
 # Only include Scons files and those with extensions that suggest  
source

 # code
 _re_only("^((.*\/)?(SConscript|SConstruct)|"

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I60554b2ae7536687a6c0a883a7678f793c3c77d4
Gerrit-Change-Number: 40636
Gerrit-PatchSet: 1
Gerrit-Owner: Boris Shingarov 
Gerrit-MessageType: newchange
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[gem5-dev] Re: Upstreaming power-gem5

2021-02-04 Thread Boris Shingarov via gem5-dev 
> The current sequence breaks 32-bit support in> the beginning and then restores it back towards the end.> Wondering if that could be a problem with the CI?I would be surprised if there is even any POWER-specific CI at all.The one POWER binary we had (in test-progs), was removed at c1ebdf66f.  I've been waiting on 86222736e (which just got in) before submittinghttps://gem5-review.googlesource.com/c/public/gem5/+/40635 ,could you please code-review that?  Then, we are ready to merge your e52dbcb.> The current sequence breaks 32-bit support in> the beginning and then restores it back towards the end.Up to you really.  My guess is that when you look at how much `develop` has diverged in the past months, you will find keeping the sequence less of a thing.-"Sandipan Das"  wrote: -To: "Boris Shingarov" From: "Sandipan Das" Date: 02/04/2021 06:23AMCc: basava...@nitk.edu.in, "Pratik Rajesh Sampat" , "Kajol Jain" , "Gautham R. Shenoy" , "gem5 Developer List" Subject: Re: [gem5-dev] Re: Upstreaming power-gem5Hello Boris,On 04/02/21 12:43 am, Boris Shingarov wrote:>> I think I had come across that problem too but I am sure>> that one of my patches will fix that. Probably this one> > Yes -- that's what I meant by "commits related to 3dd04381".> So, let's start with this small area.> Sure.>> Yes, I can submit it via gerrit.>> As a kernel developer, I am more used to mailing list based reviews>> but feel free to let me know what works best for you.> > Gerrit is the procedure currently used by the gem5 community.  Even though I personally find it non-ideal, it is kind of a given for the foreseeable future, and I think the optimal scenario (within the realistic choices) would be if you started upstreaming using that procedure.  The other alternative, of which I was afraid before I initially wrote to you, would have been if you had abandoned the project or had no time/energy to do the rebasing / pushing / working with the review, in that case I was thinking about just taking your patches and putting them on Gerrit myself but I can see a whole number of reasons to avoid this.> > Sure, I'll submit the changes via Gerrit.Aside from rebasing on top of the develop branch, I think it willbe easier for us if I bring all the 32-bit cleanups and fixes tothe beginning of the series and then introduce 64-bit mode followedby new instructions. The current sequence breaks 32-bit support inthe beginning and then restores it back towards the end. Wonderingif that could be a problem with the CI?- Sandipan___
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[gem5-dev] Change in gem5/gem5[develop]: arch-power: Restore consistency with other platforms

2021-02-04 Thread Boris Shingarov (Gerrit) via gem5-dev 
Boris Shingarov has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40635 )



Change subject: arch-power: Restore consistency with other platforms
..

arch-power: Restore consistency with other platforms

The 32-bit POWER reference test binary was removed in c1ebdf66f
(as a nasty surprise for POWER users).

The remaining platforms split between two approaches:

MIPS rebuilds "hello" from source.
This fails for two reasons:
1) The trivial reason is that on POWER make abends due to no makefile.
2) The more fundamental reason is that gem5 is not completely bug-free
(especially the Decoder on POWER in this case), therefore regression
testing is only possible if we have not just some hello program, but
a very particular bit sequence to serve as an immutable reference.

ARM and X86 follow the reference-bit-sequence approach.  POWER will
be consistent with same.  Including the sha1 for hello32,
77b27b67393311546e768b5ff35202490bad71aa, as a simple immutability
assurance.  I have also renamed hello to hello32 in anticipation to
merge Sandipan's e52dbcb.

Change-Id: I77ef31349c9e50b987c6f58bb23324844527366d
---
A tests/test-progs/hello/bin/power/hello32
1 file changed, 0 insertions(+), 0 deletions(-)



diff --git a/tests/test-progs/hello/bin/power/hello32  
b/tests/test-progs/hello/bin/power/hello32

new file mode 100755
index 000..6619ae3
--- /dev/null
+++ b/tests/test-progs/hello/bin/power/hello32
Binary files differ

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I77ef31349c9e50b987c6f58bb23324844527366d
Gerrit-Change-Number: 40635
Gerrit-PatchSet: 1
Gerrit-Owner: Boris Shingarov 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: cpu: Style fixes in the trace CPU.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/38385 )


Change subject: cpu: Style fixes in the trace CPU.
..

cpu: Style fixes in the trace CPU.

Change-Id: I3ef51aa8667926f3c4fab3c11e188102dd4bab3c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38385
Tested-by: kokoro 
Reviewed-by: Giacomo Travaglini 
Maintainer: Bobby R. Bruce 
---
M src/cpu/trace/trace_cpu.cc
M src/cpu/trace/trace_cpu.hh
2 files changed, 183 insertions(+), 188 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved
  Bobby R. Bruce: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index 9c39e59..c9b9944 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -67,21 +67,17 @@

 // Check that the python parameters for sizes of ROB, store buffer and
 // load buffer do not overflow the corresponding C++ variables.
-fatal_if(params.sizeROB > UINT16_MAX, "ROB size set to %d exceeds the "
-"max. value of %d.\n", params.sizeROB, UINT16_MAX);
-fatal_if(params.sizeStoreBuffer > UINT16_MAX, "ROB size set to %d "
-"exceeds the max. value of %d.\n", params.sizeROB,
-UINT16_MAX);
-fatal_if(params.sizeLoadBuffer > UINT16_MAX, "Load buffer size set to"
-" %d exceeds the max. value of %d.\n",
+fatal_if(params.sizeROB > UINT16_MAX,
+ "ROB size set to %d exceeds the max. value of %d.",
+ params.sizeROB, UINT16_MAX);
+fatal_if(params.sizeStoreBuffer > UINT16_MAX,
+ "ROB size set to %d exceeds the max. value of %d.",
+ params.sizeROB, UINT16_MAX);
+fatal_if(params.sizeLoadBuffer > UINT16_MAX,
+ "Load buffer size set to %d exceeds the max. value of %d.",
 params.sizeLoadBuffer, UINT16_MAX);
 }

-TraceCPU::~TraceCPU()
-{
-
-}
-
 void
 TraceCPU::updateNumOps(uint64_t rob_num)
 {
@@ -104,8 +100,8 @@
 void
 TraceCPU::init()
 {
-DPRINTF(TraceCPUInst, "Instruction fetch request trace file is \"%s\"."
-"\n", instTraceFile);
+DPRINTF(TraceCPUInst, "Instruction fetch request trace file is  
\"%s\".\n",

+instTraceFile);
 DPRINTF(TraceCPUData, "Data memory request trace file is \"%s\".\n",
 dataTraceFile);

@@ -119,7 +115,7 @@

 // Set the trace offset as the minimum of that in both traces
 traceOffset = std::min(first_icache_tick, first_dcache_tick);
-inform("%s: Time offset (tick) found as min of both traces is %lli.\n",
+inform("%s: Time offset (tick) found as min of both traces is %lli.",
 name(), traceOffset);

 // Schedule next icache and dcache event by subtracting the offset
@@ -153,8 +149,9 @@
 bool sched_next = icacheGen.tryNext();
 // If packet sent successfully, schedule next event
 if (sched_next) {
-DPRINTF(TraceCPUInst, "Scheduling next icacheGen event "
-"at %d.\n", curTick() + icacheGen.tickDelta());
+DPRINTF(TraceCPUInst,
+"Scheduling next icacheGen event at %d.\n",
+curTick() + icacheGen.tickDelta());
 schedule(icacheNextEvent, curTick() + icacheGen.tickDelta());
 ++traceStats.numSchedIcacheEvent;
 } else {
@@ -191,7 +188,7 @@
 } else {
 // Schedule event to indicate execution is complete as both
 // instruction and data access traces have been played back.
-inform("%s: Execution complete.\n", name());
+inform("%s: Execution complete.", name());
 // If the replay is configured to exit early, that is when any one
 // execution is complete then exit immediately and return.  
Otherwise,
 // schedule the counted exit that counts down completion of each  
Trace

@@ -203,22 +200,25 @@
 }
 }
 }
- TraceCPU::TraceStats::TraceStats(TraceCPU *trace)
-: Stats::Group(trace),
+
+TraceCPU::TraceStats::TraceStats(TraceCPU *trace) :
+Stats::Group(trace),
 ADD_STAT(numSchedDcacheEvent,
- "Number of events scheduled to trigger data request generator"),
+"Number of events scheduled to trigger data request  
generator"),

 ADD_STAT(numSchedIcacheEvent,
- "Number of events scheduled to trigger instruction request  
generator"),

+"Number of events scheduled to trigger instruction request "
+"generator"),
 ADD_STAT(numOps, "Number of micro-ops simulated by the Trace CPU"),
 ADD_STAT(cpi, "Cycles per micro-op used as a proxy for CPI",
- trace->baseStats.numCycles / numOps)
+trace->baseStats.numCycles / numOps)
 {
-cpi.precision(6);
+cpi.precision(6);
 }
+
 TraceCPU::ElasticDataGen::
 ElasticDataGenStatGroup::ElasticDataGenStatGroup(Stats::Group *parent,
- const

[gem5-dev] Re: version of pybind11 without everything in the headers

2021-02-04 Thread Giacomo Travaglini via gem5-dev 
Hi Gabe,

I believe you are referring to the following ticket:

https://gem5.atlassian.net/browse/GEM5-277

Ciro is currently on vacation and he will be back next week so he will be able 
to update
you on his progresses. IIRC pybind folks are reviewing his contribution but I 
cannot provide
you a timeline (Ciro might)

Kind Regards

Giacomo

> -Original Message-
> From: Gabe Black via gem5-dev 
> Sent: 04 February 2021 09:45
> To: gem5 Developer List ; Ciro Santilli
> 
> Cc: Gabe Black 
> Subject: [gem5-dev] version of pybind11 without everything in the headers
>
> Hey folks and particularly Ciro, I know a while ago there was an attempt to 
> put
> the common contents of pybind11 into a lib. Did that go anywhere? That
> would reduce build time which would be valuable, but from this change it's
> apparent that all those common symbols are *really* blowing up the build
> directory.
>
> https://gem5-review.googlesource.com/c/public/gem5/+/40621/1
>
>
> Gabe
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[gem5-dev] Re: Upstreaming power-gem5

2021-02-04 Thread Sandipan Das via gem5-dev 
Hello Boris,

On 04/02/21 12:43 am, Boris Shingarov wrote:
>> I think I had come across that problem too but I am sure
>> that one of my patches will fix that. Probably this one
> 
> Yes -- that's what I meant by "commits related to 3dd04381".
> So, let's start with this small area.
> 

Sure.

>> Yes, I can submit it via gerrit.
>> As a kernel developer, I am more used to mailing list based reviews
>> but feel free to let me know what works best for you.
> 
> Gerrit is the procedure currently used by the gem5 community.  Even though I 
> personally find it non-ideal, it is kind of a given for the foreseeable 
> future, and I think the optimal scenario (within the realistic choices) would 
> be if you started upstreaming using that procedure.  The other alternative, 
> of which I was afraid before I initially wrote to you, would have been if you 
> had abandoned the project or had no time/energy to do the rebasing / pushing 
> / working with the review, in that case I was thinking about just taking your 
> patches and putting them on Gerrit myself but I can see a whole number of 
> reasons to avoid this.
> 
> 

Sure, I'll submit the changes via Gerrit.
Aside from rebasing on top of the develop branch, I think it will
be easier for us if I bring all the 32-bit cleanups and fixes to
the beginning of the series and then introduce 64-bit mode followed
by new instructions. The current sequence breaks 32-bit support in
the beginning and then restores it back towards the end. Wondering
if that could be a problem with the CI?


- Sandipan
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[gem5-dev] Build failed in Jenkins: Nightly #209

2021-02-04 Thread jenkins-no-reply--- via gem5-dev 
See 

Changes:

[adrian.herrera] arch-arm: don't expose FEAT_VHE by default

[gabe.black] arch-arm,cpu: Introduce a getEMI virtual method on StaticInst.

[gabe.black] arch-arm,cpu: Use getEMI() in more places.

[odanrc] scons: Add an "All" compound debug flag

[gabe.black] misc: Re-remove Authors lines from source files.

[Giacomo Travaglini] arch-arm: Add destRegIdxArr arrays to TME instructions

[Bobby R. Bruce] tests: Increase presubmit (Kokoro) timeout to 6 hours

[Bobby R. Bruce] arch-riscv,misc: Fix clang missing override errors

[Bobby R. Bruce] gpu-compute,misc: Fix Clang missing override errors

[Bobby R. Bruce] gpu-compute,misc: Remove unused private variable

[Bobby R. Bruce] misc: Updated the RELEASE-NOTES and version number

[Bobby R. Bruce] scons,python: Fix `--without-python` flag

[Bobby R. Bruce] tests: Changed 'long' boot tests to X86 from GCN3_X86

[mattdsinclair] arch-x86: Make JRCXZ instruction do 64-bit jump

[mattdsinclair] arch-gcn3: Implementation of s_sleep

[shunhsingou] fastmodel: fix cntfrq in A76

[Bobby R. Bruce] misc: Revert version info for develop branch


--
[...truncated 156.16 KB...]
[ RUN  ] CyclesTest.NoCycles
[   OK ] CyclesTest.NoCycles (0 ms)
[ RUN  ] CyclesTest.PrefixIncrement
[   OK ] CyclesTest.PrefixIncrement (0 ms)
[ RUN  ] CyclesTest.PrefixDecrement
[   OK ] CyclesTest.PrefixDecrement (0 ms)
[ RUN  ] CyclesTest.InPlaceAddition
[   OK ] CyclesTest.InPlaceAddition (0 ms)
[ RUN  ] CyclesTest.GreaterThanLessThan
[   OK ] CyclesTest.GreaterThanLessThan (0 ms)
[ RUN  ] CyclesTest.AddCycles
[   OK ] CyclesTest.AddCycles (0 ms)
[ RUN  ] CyclesTest.SubtractCycles
[   OK ] CyclesTest.SubtractCycles (0 ms)
[ RUN  ] CyclesTest.ShiftRight
[   OK ] CyclesTest.ShiftRight (0 ms)
[ RUN  ] CyclesTest.ShiftLeft
[   OK ] CyclesTest.ShiftLeft (0 ms)
[ RUN  ] CyclesTest.OutStream
[   OK ] CyclesTest.OutStream (0 ms)
[--] 10 tests from CyclesTest (0 ms total)

[--] 5 tests from MicroPCTest
[ RUN  ] MicroPCTest.CheckMicroPCRomBit
[   OK ] MicroPCTest.CheckMicroPCRomBit (0 ms)
[ RUN  ] MicroPCTest.RomMicroPCTest
[   OK ] MicroPCTest.RomMicroPCTest (0 ms)
[ RUN  ] MicroPCTest.NormalMicroPCTest
[   OK ] MicroPCTest.NormalMicroPCTest (0 ms)
[ RUN  ] MicroPCTest.IsRomMicroPCTest
[   OK ] MicroPCTest.IsRomMicroPCTest (0 ms)
[ RUN  ] MicroPCTest.IsNotRomMicroPCTest
[   OK ] MicroPCTest.IsNotRomMicroPCTest (0 ms)
[--] 5 tests from MicroPCTest (0 ms total)

[--] 4 tests from TypesTest
[ RUN  ] TypesTest.FloatToBits32
[   OK ] TypesTest.FloatToBits32 (0 ms)
[ RUN  ] TypesTest.floatToBits64
[   OK ] TypesTest.floatToBits64 (0 ms)
[ RUN  ] TypesTest.floatsToBitsDoubleInput
[   OK ] TypesTest.floatsToBitsDoubleInput (0 ms)
[ RUN  ] TypesTest.floatsToBitsFloatInput
[   OK ] TypesTest.floatsToBitsFloatInput (0 ms)
[--] 4 tests from TypesTest (0 ms total)

[--] Global test environment tear-down
[==] 19 tests from 3 test suites ran. (1 ms total)
[  PASSED  ] 19 tests.
build/NULL/sim/byteswap.test.debug 
--gtest_output=xml:build/NULL/unittests.debug/sim/byteswap.test.xml
Running main() from build/googletest/googletest/src/gtest_main.cc
[==] Running 2 tests from 1 test suite.
[--] Global test environment set-up.
[--] 2 tests from UncontendedMutex
[ RUN  ] UncontendedMutex.Lock
[   OK ] SatCounterTest.Shift (800 ms)
[ RUN  ] SatCounterTest.PrePostOperators
[   OK ] SatCounterTest.PrePostOperators (0 ms)
[ RUN  ] SatCounterTest.CopyMove
[   OK ] SatCounterTest.CopyMove (0 ms)
[ RUN  ] SatCounterTest.AddSubAssignment
[   OK ] SatCounterTest.AddSubAssignment (0 ms)
[ RUN  ] SatCounterTest.NegativeAddSubAssignment
[   OK ] SatCounterTest.NegativeAddSubAssignment (0 ms)
[ RUN  ] SatCounterTest.Size16
[   OK ] SatCounterTest.Size16 (0 ms)
[ RUN  ] SatCounterTest.Size32
[   OK ] SatCounterTest.Size32 (0 ms)
[ RUN  ] SatCounterTest.Size64
[   OK ] SatCounterTest.Size64 (0 ms)
[--] 14 tests from SatCounterTest (800 ms total)

[--] Global test environment tear-down
[==] 14 tests from 1 test suite ran. (801 ms total)
[  PASSED  ] 14 tests.
build/NULL/sim/guest_abi.test.debug 
--gtest_output=xml:build/NULL/unittests.debug/sim/guest_abi.test.xml
Running main() from build/googletest/googletest/src/gtest_main.cc
[==] Running 8 tests from 1 test suite.
[--] Global test environment set-up.
[--] 8 tests from ByteswapTest
[ RUN  ] ByteswapTest.swap_byte64
[   OK ] ByteswapTest.swap_byte64 (0 ms)
[ RUN  ] ByteswapTest.swap_byte32
[   OK ] ByteswapTest.swap_byte32 (0 ms)
[ RUN  ] ByteswapTest.swap_byte16
[   OK ] ByteswapTest.swap_byte16 (0 ms)
[ RUN

[gem5-dev] version of pybind11 without everything in the headers

2021-02-04 Thread Gabe Black via gem5-dev 
Hey folks and particularly Ciro, I know a while ago there was an attempt to
put the common contents of pybind11 into a lib. Did that go anywhere? That
would reduce build time which would be valuable, but from this change it's
apparent that all those common symbols are *really* blowing up the build
directory.

https://gem5-review.googlesource.com/c/public/gem5/+/40621/1

Gabe
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[gem5-dev] Change in gem5/gem5[develop]: base,tests: Convert cprintftime from a "UnitTest" to a normal bin.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40617 )



Change subject: base,tests: Convert cprintftime from a "UnitTest" to a  
normal bin.

..

base,tests: Convert cprintftime from a "UnitTest" to a normal bin.

This "UnitTest" was really not a unit test, it was a timing utility for
measuring the performance of gem5's cprintf implementation. The name was
misleading, but more than that, it was linked against all of gem5 which
created a approximately 1.5 gigabyte binary for what is a very small
program.

Instead, the new version of cprintftime, which has the same
functionality as the old version, weighs in at a svelte 500k with debug
information.

This also trims down the number of misleading "UnitTest" entries to 3,
getting us closer to the point where we can eliminate that type of
entity entirely.

Change-Id: Id30d094f2844e948fe67e820c89412f8667aaa52
---
M src/base/SConscript
R src/base/cprintftime.cc
M src/unittest/SConscript
3 files changed, 1 insertion(+), 1 deletion(-)



diff --git a/src/base/SConscript b/src/base/SConscript
index f8cd4ba..1190b93 100644
--- a/src/base/SConscript
+++ b/src/base/SConscript
@@ -39,6 +39,7 @@
 Source('channel_addr.cc')
 Source('cprintf.cc', add_tags='gtest lib')
 GTest('cprintf.test', 'cprintf.test.cc')
+Executable('cprintftime', 'cprintftime.cc', 'cprintf.cc')
 Source('debug.cc')
 GTest('debug.test', 'debug.test.cc', 'debug.cc')
 if env['USE_FENV']:
diff --git a/src/unittest/cprintftime.cc b/src/base/cprintftime.cc
similarity index 100%
rename from src/unittest/cprintftime.cc
rename to src/base/cprintftime.cc
diff --git a/src/unittest/SConscript b/src/unittest/SConscript
index 19b2542..b0e29ed 100644
--- a/src/unittest/SConscript
+++ b/src/unittest/SConscript
@@ -30,7 +30,6 @@

 Source('unittest.cc')

-UnitTest('cprintftime', 'cprintftime.cc')
 UnitTest('nmtest', 'nmtest.cc')

 stattest_py = PySource('m5', 'stattestmain.py', tags='stattest')

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id30d094f2844e948fe67e820c89412f8667aaa52
Gerrit-Change-Number: 40617
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: tests,base: Delete the SymbolTable::load method and symtest test.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40620 )



Change subject: tests,base: Delete the SymbolTable::load method and symtest  
test.

..

tests,base: Delete the SymbolTable::load method and symtest test.

This test expects to load a symbol file using the load method of gem5's
SymbolTable class, and then to search through it for a given symbol or
address.

Unfortunately, the type of file it expects to load has a format where
each line is of the form:

0x, symbol_name

where the numerical part is the address of the symbol, and the part
after the comma is the symbol name. I have not been able to find any
tool which outputs a symbol file in this format, or any tool for
inspecting an existing object file which will output symbols in this
format. I looked at objdump, objcopy, nm, and the map file format output
by gnu's linker. nm has 3 different output formats, none of which match.
Usually when working with ELF files, one would just generate a new ELF
file which only had debugging information like the symbol table, and
then strip the symbols out of the original.

Since this file format seems to have been invented from thin air, there
isn't really a good way to generate a canonical file to test the loading
code against, nor is being able to load this obscure format likely to be
useful to anybody. If someone *did* want to load an external symbol
table, they would use the ELF loader and not this.

This CL deletes both this test, and the loading code in SymbolTable.

Change-Id: I20402e3f35e54d1e186a92d9c83d1c06ec86bf7d
---
A src/base/loader/symtab.basic.test
M src/base/loader/symtab.cc
M src/base/loader/symtab.hh
A src/base/loader/test.c
A src/base/loader/test.o
M src/unittest/SConscript
D src/unittest/symtest.cc
7 files changed, 2 insertions(+), 125 deletions(-)



diff --git a/src/base/loader/symtab.basic.test  
b/src/base/loader/symtab.basic.test

new file mode 100644
index 000..d218ace
--- /dev/null
+++ b/src/base/loader/symtab.basic.test
Binary files differ
diff --git a/src/base/loader/symtab.cc b/src/base/loader/symtab.cc
index c2c53cc..0d0e826 100644
--- a/src/base/loader/symtab.cc
+++ b/src/base/loader/symtab.cc
@@ -85,46 +85,6 @@
 return true;
 }

-bool
-SymbolTable::load(const std::string )
-{
-std::string buffer;
-std::ifstream file(filename.c_str());
-
-if (!file)
-fatal("file error: Can't open symbol table file %s\n", filename);
-
-while (!file.eof()) {
-getline(file, buffer);
-if (buffer.empty())
-continue;
-
-std::string::size_type idx = buffer.find(',');
-if (idx == std::string::npos)
-return false;
-
-std::string address = buffer.substr(0, idx);
-eat_white(address);
-if (address.empty())
-return false;
-
-std::string name = buffer.substr(idx + 1);
-eat_white(name);
-if (name.empty())
-return false;
-
-Addr addr;
-if (!to_number(address, addr))
-return false;
-
-if (!insert({ Symbol::Binding::Global, name, addr }))
-return false;
-}
-
-file.close();
-return true;
-}
-
 void
 SymbolTable::serialize(const std::string , CheckpointOut ) const
 {
diff --git a/src/base/loader/symtab.hh b/src/base/loader/symtab.hh
index a0203a6..5610544 100644
--- a/src/base/loader/symtab.hh
+++ b/src/base/loader/symtab.hh
@@ -129,7 +129,6 @@
 // into this one.
 bool insert(const Symbol );
 bool insert(const SymbolTable );
-bool load(const std::string );
 bool empty() const { return symbols.empty(); }

 SymbolTablePtr
diff --git a/src/base/loader/test.c b/src/base/loader/test.c
new file mode 100644
index 000..1660fa6
--- /dev/null
+++ b/src/base/loader/test.c
@@ -0,0 +1,2 @@
+char symbol_1;
+int symbol_2;
diff --git a/src/base/loader/test.o b/src/base/loader/test.o
new file mode 100644
index 000..d218ace
--- /dev/null
+++ b/src/base/loader/test.o
Binary files differ
diff --git a/src/unittest/SConscript b/src/unittest/SConscript
index 9ebe863..5008066 100644
--- a/src/unittest/SConscript
+++ b/src/unittest/SConscript
@@ -32,5 +32,3 @@

 stattest_py = PySource('m5', 'stattestmain.py', tags='stattest')
 UnitTest('stattest', 'stattest.cc', with_tag('stattest'), main=True)
-
-UnitTest('symtest', 'symtest.cc')
diff --git a/src/unittest/symtest.cc b/src/unittest/symtest.cc
deleted file mode 100644
index 6de3c8d..000
--- a/src/unittest/symtest.cc
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Copyright (c) 2002-2005 The Regents of The University of Michigan
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the

[gem5-dev] Change in gem5/gem5[develop]: base: Replace a "panic" in cprintf with an M5_UNREACHABLE.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40615 )



Change subject: base: Replace a "panic" in cprintf with an M5_UNREACHABLE.
..

base: Replace a "panic" in cprintf with an M5_UNREACHABLE.

The panic was just to signal that a point in the code should be
unreachable, and brought with it a thread of dependencies which would
bring in more and more extra files as it was followed.

Change-Id: I46fb99b91929dca78a6547bdc7635aab9a63a9f3
---
M src/base/cprintf.cc
1 file changed, 1 insertion(+), 2 deletions(-)



diff --git a/src/base/cprintf.cc b/src/base/cprintf.cc
index 03fa3cb..7a3e958 100644
--- a/src/base/cprintf.cc
+++ b/src/base/cprintf.cc
@@ -33,7 +33,6 @@
 #include 

 #include "base/compiler.hh"
-#include "base/logging.hh"

 namespace cp
 {
@@ -239,7 +238,7 @@
 break;

   case '%':
-panic("we shouldn't get here");
+M5_UNREACHABLE;
 break;

   default:

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I46fb99b91929dca78a6547bdc7635aab9a63a9f3
Gerrit-Change-Number: 40615
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[gem5-dev] Change in gem5/gem5[develop]: scons: Redistribute generated files for partial linking.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40621 )



Change subject: scons: Redistribute generated files for partial linking.
..

scons: Redistribute generated files for partial linking.

These had not been assigned groups, and so had fallen into whatever the
last group was that scons processed. Since groups aren't set up
explicitly, that's short hand for wherever the SConscript is that
declares them. This meant all the enums, params, etc, ended up in the
unittest lib.o.partial.

This should make any theoretical benefits of splitting up the files more
pronounced (faster link times, less memory usage), but unfortunately it
also magnifies the downsides like having more copies of common symbols
floating around the build directory. A quick check shows that this
increases the size of the X86 build directory when building gem5.opt
from 6.6GB to 8.8GB. This also shows the very significant effect these
duplicated common symbols have on the size of the build directory.

Change-Id: I64070d950395c4c878a293bd6d0f6b8f910c5a93
---
M src/SConscript
1 file changed, 7 insertions(+), 1 deletion(-)



diff --git a/src/SConscript b/src/SConscript
index 538d8aa..2edf884 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -367,6 +367,8 @@
 PySource.tnodes[self.tnode] = self
 PySource.symnames[self.symname] = self

+Source(self.cpp, tags=tags, add_tags='python')
+
 class SimObject(PySource):
 '''Add a SimObject python file as a python source object and add
 it to a list of sim object modules'''
@@ -1016,6 +1018,7 @@

 # C++ parameter description files
 if GetOption('with_cxx_config'):
+Source.set_group(joinpath(env['BUILDDIR'], 'cxx_config'))
 for name,simobj in sorted(sim_objects.items()):
 py_source = PySource.modules[simobj.__module__]
 extra_deps = [ py_source.tnode ]
@@ -1070,6 +1073,7 @@
 Source(cxx_config_init_cc_file)

 # Generate all enum header files
+Source.set_group(joinpath(env['BUILDDIR'], 'enums'))
 for name,enum in sorted(all_enums.items()):
 py_source = PySource.modules[enum.__module__]
 extra_deps = [ py_source.tnode ]
@@ -1087,6 +1091,7 @@

 # Generate SimObject Python bindings wrapper files
 if env['USE_PYTHON']:
+Source.set_group(joinpath(env['BUILDDIR'], 'python', '_m5'))
 for name,simobj in sorted(sim_objects.items()):
 py_source = PySource.modules[simobj.__module__]
 extra_deps = [ py_source.tnode ]
@@ -1195,6 +1200,7 @@

 env.Command('debug/flags.cc', Value(debug_flags),
 MakeAction(makeDebugFlagCC, Transform("TRACING", 0)))
+Source.set_group(joinpath(env['BUILDDIR'], 'debug'))
 Source('debug/flags.cc')

 # version tags
@@ -1266,7 +1272,6 @@
 for source in PySource.all:
 marshal_env.Command(source.cpp, [ py_marshal, source.tnode ],
 MakeAction(embedPyFile, Transform("EMBED PY")))
-Source(source.cpp, tags=source.tags, add_tags='python')

 
 #
@@ -1275,6 +1280,7 @@
 #

 # List of constructed environments to pass back to SConstruct
+Source.set_group(joinpath(env['BUILDDIR'], 'base'))
 date_source = Source('base/date.cc', tags=[])

 gem5_binary = Gem5('gem5')

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I64070d950395c4c878a293bd6d0f6b8f910c5a93
Gerrit-Change-Number: 40621
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: tests: Delete the now unused unittest/unittest.[cc|hh].

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40618 )



Change subject: tests: Delete the now unused unittest/unittest.[cc|hh].
..

tests: Delete the now unused unittest/unittest.[cc|hh].

These files were originally used to provide a more gtest like mechanism
for the UnitTest executables, many of which didn't actually test
anything. With the definitions in those files, the tests could check
whether their expectations were met, and either pass or fail without a
human having to inspect the output and knowing what output to expect.

Change-Id: Ie0601391b994859eb544b37201333838fa3ba02a
---
M src/unittest/SConscript
D src/unittest/unittest.cc
D src/unittest/unittest.hh
3 files changed, 0 insertions(+), 208 deletions(-)



diff --git a/src/unittest/SConscript b/src/unittest/SConscript
index b0e29ed..9ebe863 100644
--- a/src/unittest/SConscript
+++ b/src/unittest/SConscript
@@ -28,8 +28,6 @@

 Import('*')

-Source('unittest.cc')
-
 UnitTest('nmtest', 'nmtest.cc')

 stattest_py = PySource('m5', 'stattestmain.py', tags='stattest')
diff --git a/src/unittest/unittest.cc b/src/unittest/unittest.cc
deleted file mode 100644
index 2f99eae..000
--- a/src/unittest/unittest.cc
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * Copyright (c) 2011 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "unittest/unittest.hh"
-
-#include 
-
-#include "base/cprintf.hh"
-
-namespace {
-
-bool _printOnPass = (getenv("PRINT_ON_PASS") != NULL);
-unsigned _passes = 0;
-unsigned _failures = 0;
-
-bool _casePrinted = false;
-const char *_case = NULL;
-
-} // anonymous namespace
-
-namespace UnitTest {
-
-void
-checkVal(const char *file, const unsigned line,
- const char *test, const bool result)
-{
-if (!result || _printOnPass) {
-if (!_casePrinted && _case) {
-cprintf("CASE %s:\n", _case);
-_casePrinted = true;
-}
-cprintf("   CHECK %s:   %s:%d   %s\n",
-result ? "PASSED" : "FAILED", file, line, test);
-}
-if (result) _passes++;
-else _failures++;
-}
-
-bool printOnPass() { return _printOnPass; }
-void printOnPass(bool newPrintOnPass) { _printOnPass = newPrintOnPass; }
-
-unsigned passes() { return _passes; }
-unsigned failures() { return _failures; }
-
-unsigned
-printResults()
-{
-cprintf("TEST %s:   %d checks passed, %d checks failed.\n",
-_failures ? "FAILED" : "PASSED", _passes, _failures);
-return _failures;
-}
-
-void
-reset()
-{
-_passes = 0;
-_failures = 0;
-}
-
-void
-setCase(const char *newCase)
-{
-_casePrinted = false;
-_case = newCase;
-}
-
-} //namespace UnitTest
diff --git a/src/unittest/unittest.hh b/src/unittest/unittest.hh
deleted file mode 100644
index 5e9c432..000
--- a/src/unittest/unittest.hh
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Copyright (c) 2011 Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided

[gem5-dev] Change in gem5/gem5[develop]: base: Remove unnecessary includes from base/loader/symtab.[cc|hh].

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40619 )



Change subject: base: Remove unnecessary includes from  
base/loader/symtab.[cc|hh].

..

base: Remove unnecessary includes from base/loader/symtab.[cc|hh].

These were either completely unnecessary, or headers in the .cc which
had already been included in the .hh and were not needed beyond their
use in the .hh.

Change-Id: Ic95e29f3fdd8cab00ab93d254d2e1c25aacf4632
---
M src/base/loader/symtab.cc
M src/base/loader/symtab.hh
2 files changed, 3 insertions(+), 9 deletions(-)



diff --git a/src/base/loader/symtab.cc b/src/base/loader/symtab.cc
index 2a23661..c2c53cc 100644
--- a/src/base/loader/symtab.cc
+++ b/src/base/loader/symtab.cc
@@ -30,14 +30,9 @@

 #include 
 #include 
-#include 
-#include 

 #include "base/logging.hh"
 #include "base/str.hh"
-#include "base/trace.hh"
-#include "base/types.hh"
-#include "sim/serialize.hh"

 namespace Loader
 {
diff --git a/src/base/loader/symtab.hh b/src/base/loader/symtab.hh
index 1e99fec..a0203a6 100644
--- a/src/base/loader/symtab.hh
+++ b/src/base/loader/symtab.hh
@@ -26,8 +26,8 @@
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */

-#ifndef __SYMTAB_HH__
-#define __SYMTAB_HH__
+#ifndef __BASE_LOADER_SYMTAB_HH__
+#define __BASE_LOADER_SYMTAB_HH__

 #include 
 #include 
@@ -36,7 +36,6 @@
 #include 
 #include 

-#include "base/trace.hh"
 #include "base/types.hh"
 #include "sim/serialize.hh"

@@ -239,4 +238,4 @@

 } // namespace Loader

-#endif // __SYMTAB_HH__
+#endif // __BASE_LOADER_SYMTAB_HH__

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic95e29f3fdd8cab00ab93d254d2e1c25aacf4632
Gerrit-Change-Number: 40619
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: scons: Remove the "abstract" tag from Executable classes.

2021-02-04 Thread Gabe Black (Gerrit) via gem5-dev 
Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40616 )



Change subject: scons: Remove the "abstract" tag from Executable classes.
..

scons: Remove the "abstract" tag from Executable classes.

That tag was intended to mark an Executable subclass as abstract, aka
only suitable for using as bases for other Executable subclasses and not
for direct instantiation. The only place it was used was the base
Executable class however, and that class is actually directly useful
when setting up a generic executable from other gem5 sources.

Change-Id: I70204b63c03bb45bf21b8c312a7b8581be5e0cab
---
M src/SConscript
1 file changed, 1 insertion(+), 5 deletions(-)



diff --git a/src/SConscript b/src/SConscript
index 74b9516..538d8aa 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -477,17 +477,13 @@
 all = []

 def __init__(cls, name, bases, d):
-if not d.pop('abstract', False):
-ExecutableMeta.all.append(cls)
+ExecutableMeta.all.append(cls)
 super(ExecutableMeta, cls).__init__(name, bases, d)
-
 cls.all = []

 class Executable(object, metaclass=ExecutableMeta):
 '''Base class for creating an executable from sources.'''

-abstract = True
-
 def __init__(self, target, *srcs_and_filts):
 '''Specify the target name and any sources. Sources that are
 not SourceFiles are evalued with Source().'''

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I70204b63c03bb45bf21b8c312a7b8581be5e0cab
Gerrit-Change-Number: 40616
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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