[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: There is only one fault register from Gen8 onwards (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: There is only one fault register from Gen8 onwards (rev2)
URL   : https://patchwork.freedesktop.org/series/26317/
State : success

== Summary ==

Series 26317v2 drm/i915: There is only one fault register from Gen8 onwards
https://patchwork.freedesktop.org/api/1.0/series/26317/revisions/2/mbox/

Test gem_exec_suspend:
Subgroup basic-s4-devices:
dmesg-warn -> PASS   (fi-kbl-r) fdo#100125
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215

fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:441s
fi-bdw-gvtdvmtotal:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  
time:433s
fi-bsw-n3050 total:279  pass:242  dwarn:1   dfail:0   fail:0   skip:36  
time:534s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:505s
fi-byt-j1900 total:279  pass:253  dwarn:2   dfail:0   fail:0   skip:24  
time:488s
fi-byt-n2820 total:279  pass:249  dwarn:2   dfail:0   fail:0   skip:28  
time:481s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:588s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:434s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:414s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:419s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:499s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:472s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:466s
fi-kbl-7560u total:279  pass:268  dwarn:1   dfail:0   fail:0   skip:10  
time:575s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:582s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:454s
fi-skl-6700hqtotal:279  pass:223  dwarn:1   dfail:0   fail:30  skip:24  
time:339s
fi-skl-6700k total:279  pass:257  dwarn:4   dfail:0   fail:0   skip:18  
time:466s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:481s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:435s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:543s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:401s

1789a02e41b11133dd23578edbd0b47ccf40 drm-tip: 2017y-06m-23d-12h-42m-45s UTC 
integration manifest
d9da9f0 drm/i915: There is only one fault register from Gen8 onwards

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5039/
___
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[Intel-gfx] [PATCH v2] drm/i915: There is only one fault register from Gen8 onwards

[Michel Thierry]

Until Haswell/Baytrail, the hardware used to have a per engine fault
register (e.g. 0x4094 - render fault register, 0x4194 - media fault
register, etc). But since Broadwell, all these registers were combined
into a singe one, which specifies the engine id in bits 14:12.

Luckily, the additional register addresses haven't been reused, but we
should not been reading (and writing to) registers that do not exist.

v2: Rename fault variable, use INTEL_GEN (Chris).

References: IHD-OS-BDW-Vol 2c-11.15, page 75.
Cc: Chris Wilson 
Signed-off-by: Michel Thierry 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 42 +--
 drivers/gpu/drm/i915/i915_gpu_error.c |  8 ---
 drivers/gpu/drm/i915/i915_reg.h   |  2 ++
 3 files changed, 37 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index de67084d5fcf..c840d4184a4f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1996,25 +1996,43 @@ void i915_check_and_clear_faults(struct 
drm_i915_private *dev_priv)
 {
struct intel_engine_cs *engine;
enum intel_engine_id id;
+   u32 fault;
 
-   if (INTEL_INFO(dev_priv)->gen < 6)
+   if (INTEL_GEN(dev_priv) < 6)
return;
 
-   for_each_engine(engine, dev_priv, id) {
-   u32 fault_reg;
-   fault_reg = I915_READ(RING_FAULT_REG(engine));
-   if (fault_reg & RING_FAULT_VALID) {
+   /* From GEN8 onwards we only have one 'All Engine Fault Register' */
+   if (INTEL_GEN(dev_priv) >= 8) {
+   fault = I915_READ(GEN8_RING_FAULT_REG);
+   if (fault & RING_FAULT_VALID) {
DRM_DEBUG_DRIVER("Unexpected fault\n"
 "\tAddr: 0x%08lx\n"
-"\tAddress space: %s\n"
+"\tEngine ID: %d\n"
 "\tSource ID: %d\n"
 "\tType: %d\n",
-fault_reg & PAGE_MASK,
-fault_reg & RING_FAULT_GTTSEL_MASK ? 
"GGTT" : "PPGTT",
-RING_FAULT_SRCID(fault_reg),
-RING_FAULT_FAULT_TYPE(fault_reg));
-   I915_WRITE(RING_FAULT_REG(engine),
-  fault_reg & ~RING_FAULT_VALID);
+fault & PAGE_MASK,
+GEN8_RING_FAULT_ENGINE_ID(fault),
+RING_FAULT_SRCID(fault),
+RING_FAULT_FAULT_TYPE(fault));
+   I915_WRITE(GEN8_RING_FAULT_REG,
+  fault & ~RING_FAULT_VALID);
+   }
+   } else {
+   for_each_engine(engine, dev_priv, id) {
+   fault = I915_READ(RING_FAULT_REG(engine));
+   if (fault & RING_FAULT_VALID) {
+   DRM_DEBUG_DRIVER("Unexpected fault\n"
+"\tAddr: 0x%08lx\n"
+"\tAddress space: %s\n"
+"\tSource ID: %d\n"
+"\tType: %d\n",
+fault & PAGE_MASK,
+fault & RING_FAULT_GTTSEL_MASK 
? "GGTT" : "PPGTT",
+RING_FAULT_SRCID(fault),
+RING_FAULT_FAULT_TYPE(fault));
+   I915_WRITE(RING_FAULT_REG(engine),
+  fault & ~RING_FAULT_VALID);
+   }
}
}
 
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index ae70283470a6..b7f147b1b6dd 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1167,11 +1167,13 @@ static void error_record_engine_registers(struct 
i915_gpu_state *error,
 
if (INTEL_GEN(dev_priv) >= 6) {
ee->rc_psmi = I915_READ(RING_PSMI_CTL(engine->mmio_base));
-   ee->fault_reg = I915_READ(RING_FAULT_REG(engine));
-   if (INTEL_GEN(dev_priv) >= 8)
+   if (INTEL_GEN(dev_priv) >= 8) {
gen8_record_semaphore_state(error, engine, ee);
-   else
+   ee->fault_reg = I915_READ(GEN8_RING_FAULT_REG);
+   } else {
gen6_record_semaphore_state(engine, ee);
+   ee->fault_reg = I915_READ(RING_FAULT_REG(engine));
+   }
}
 

Re: [Intel-gfx] [PATCH] drm/i915: There is only one fault register from Gen8 onwards

[Michel Thierry]

On 23/06/17 16:35, Chris Wilson wrote:

Quoting Michel Thierry (2017-06-24 00:17:29)

Until Haswell/Baytrail, the hardware used to have a per engine fault
register (e.g. 0x4094 - render fault register, 0x4194 - media fault
register, etc). But since Broadwell, all these registers were combined
into a singe one, which specifies the engine id in bits 14:12.

Luckily, the additional register addresses haven't been reused, but we
should not been reading (and writing to) registers that do not exist.

References: IHD-OS-BDW-Vol 2c-11.15, page 75.
Signed-off-by: Michel Thierry 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 29 -
 drivers/gpu/drm/i915/i915_gpu_error.c |  8 +---
 drivers/gpu/drm/i915/i915_reg.h   |  2 ++
 3 files changed, 31 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index de67084d5fcf..83deb004368c 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2000,22 +2000,41 @@ void i915_check_and_clear_faults(struct 
drm_i915_private *dev_priv)
if (INTEL_INFO(dev_priv)->gen < 6)
return;

-   for_each_engine(engine, dev_priv, id) {
+   /* From GEN8 onwards we only have one 'All Engine Fault Register' */
+   if (INTEL_INFO(dev_priv)->gen >= 8) {

INTEL_GEN() >= 8



Oops, busted copy-pasting old code, I'll also change it 
(INTEL_INFO(dev_priv)->gen < 6).



u32 fault_reg;


Newline after variable blocks (might as well fix up the coding style in
passing).

u32 fault;

foo_reg is more commonly used to refer to the register offset itself,
i.e. i915_reg_t.  Might as well move it to the start of the function as
it is shared between all branches, and I don't think we are overly
concerned with aiding gcc's liverange analysis here.


I thought about moving it to the start of the function. Let me make 
these changes.


Thanks,

-Michel
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: There is only one fault register from Gen8 onwards

[Patchwork]

== Series Details ==

Series: drm/i915: There is only one fault register from Gen8 onwards
URL   : https://patchwork.freedesktop.org/series/26317/
State : success

== Summary ==

Series 26317v1 drm/i915: There is only one fault register from Gen8 onwards
https://patchwork.freedesktop.org/api/1.0/series/26317/revisions/1/mbox/

Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:450s
fi-bdw-gvtdvmtotal:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  
time:433s
fi-bsw-n3050 total:279  pass:242  dwarn:1   dfail:0   fail:0   skip:36  
time:532s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:506s
fi-byt-j1900 total:279  pass:253  dwarn:2   dfail:0   fail:0   skip:24  
time:493s
fi-byt-n2820 total:279  pass:249  dwarn:2   dfail:0   fail:0   skip:28  
time:482s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:596s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:436s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:414s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:420s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:499s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:475s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:466s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:579s
fi-kbl-r total:279  pass:260  dwarn:1   dfail:0   fail:0   skip:18  
time:583s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:452s
fi-skl-6700hqtotal:279  pass:223  dwarn:1   dfail:0   fail:30  skip:24  
time:340s
fi-skl-6700k total:279  pass:257  dwarn:4   dfail:0   fail:0   skip:18  
time:465s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:480s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:434s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:547s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:405s

1789a02e41b11133dd23578edbd0b47ccf40 drm-tip: 2017y-06m-23d-12h-42m-45s UTC 
integration manifest
7e0705c drm/i915: There is only one fault register from Gen8 onwards

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5038/
___
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Re: [Intel-gfx] [PATCH] drm/i915: There is only one fault register from Gen8 onwards

[Chris Wilson]

Quoting Michel Thierry (2017-06-24 00:17:29)
> Until Haswell/Baytrail, the hardware used to have a per engine fault
> register (e.g. 0x4094 - render fault register, 0x4194 - media fault
> register, etc). But since Broadwell, all these registers were combined
> into a singe one, which specifies the engine id in bits 14:12.
> 
> Luckily, the additional register addresses haven't been reused, but we
> should not been reading (and writing to) registers that do not exist.
> 
> References: IHD-OS-BDW-Vol 2c-11.15, page 75.
> Signed-off-by: Michel Thierry 
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c   | 29 -
>  drivers/gpu/drm/i915/i915_gpu_error.c |  8 +---
>  drivers/gpu/drm/i915/i915_reg.h   |  2 ++
>  3 files changed, 31 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index de67084d5fcf..83deb004368c 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2000,22 +2000,41 @@ void i915_check_and_clear_faults(struct 
> drm_i915_private *dev_priv)
> if (INTEL_INFO(dev_priv)->gen < 6)
> return;
>  
> -   for_each_engine(engine, dev_priv, id) {
> +   /* From GEN8 onwards we only have one 'All Engine Fault Register' */
> +   if (INTEL_INFO(dev_priv)->gen >= 8) {
INTEL_GEN() >= 8

> u32 fault_reg;

Newline after variable blocks (might as well fix up the coding style in
passing).

u32 fault;

foo_reg is more commonly used to refer to the register offset itself,
i.e. i915_reg_t.  Might as well move it to the start of the function as
it is shared between all branches, and I don't think we are overly
concerned with aiding gcc's liverange analysis here.
-Chris
___
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[Intel-gfx] [PATCH] drm/i915: There is only one fault register from Gen8 onwards

[Michel Thierry]

Until Haswell/Baytrail, the hardware used to have a per engine fault
register (e.g. 0x4094 - render fault register, 0x4194 - media fault
register, etc). But since Broadwell, all these registers were combined
into a singe one, which specifies the engine id in bits 14:12.

Luckily, the additional register addresses haven't been reused, but we
should not been reading (and writing to) registers that do not exist.

References: IHD-OS-BDW-Vol 2c-11.15, page 75.
Signed-off-by: Michel Thierry 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c   | 29 -
 drivers/gpu/drm/i915/i915_gpu_error.c |  8 +---
 drivers/gpu/drm/i915/i915_reg.h   |  2 ++
 3 files changed, 31 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index de67084d5fcf..83deb004368c 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2000,22 +2000,41 @@ void i915_check_and_clear_faults(struct 
drm_i915_private *dev_priv)
if (INTEL_INFO(dev_priv)->gen < 6)
return;
 
-   for_each_engine(engine, dev_priv, id) {
+   /* From GEN8 onwards we only have one 'All Engine Fault Register' */
+   if (INTEL_INFO(dev_priv)->gen >= 8) {
u32 fault_reg;
-   fault_reg = I915_READ(RING_FAULT_REG(engine));
+   fault_reg = I915_READ(GEN8_RING_FAULT_REG);
if (fault_reg & RING_FAULT_VALID) {
DRM_DEBUG_DRIVER("Unexpected fault\n"
 "\tAddr: 0x%08lx\n"
-"\tAddress space: %s\n"
+"\tEngine ID: %d\n"
 "\tSource ID: %d\n"
 "\tType: %d\n",
 fault_reg & PAGE_MASK,
-fault_reg & RING_FAULT_GTTSEL_MASK ? 
"GGTT" : "PPGTT",
+GEN8_RING_FAULT_ENGINE_ID(fault_reg),
 RING_FAULT_SRCID(fault_reg),
 RING_FAULT_FAULT_TYPE(fault_reg));
-   I915_WRITE(RING_FAULT_REG(engine),
+   I915_WRITE(GEN8_RING_FAULT_REG,
   fault_reg & ~RING_FAULT_VALID);
}
+   } else {
+   for_each_engine(engine, dev_priv, id) {
+   u32 fault_reg;
+   fault_reg = I915_READ(RING_FAULT_REG(engine));
+   if (fault_reg & RING_FAULT_VALID) {
+   DRM_DEBUG_DRIVER("Unexpected fault\n"
+"\tAddr: 0x%08lx\n"
+"\tAddress space: %s\n"
+"\tSource ID: %d\n"
+"\tType: %d\n",
+fault_reg & PAGE_MASK,
+fault_reg & 
RING_FAULT_GTTSEL_MASK ? "GGTT" : "PPGTT",
+RING_FAULT_SRCID(fault_reg),
+
RING_FAULT_FAULT_TYPE(fault_reg));
+   I915_WRITE(RING_FAULT_REG(engine),
+  fault_reg & ~RING_FAULT_VALID);
+   }
+   }
}
 
/* Engine specific init may not have been done till this point. */
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index ae70283470a6..b7f147b1b6dd 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1167,11 +1167,13 @@ static void error_record_engine_registers(struct 
i915_gpu_state *error,
 
if (INTEL_GEN(dev_priv) >= 6) {
ee->rc_psmi = I915_READ(RING_PSMI_CTL(engine->mmio_base));
-   ee->fault_reg = I915_READ(RING_FAULT_REG(engine));
-   if (INTEL_GEN(dev_priv) >= 8)
+   if (INTEL_GEN(dev_priv) >= 8) {
gen8_record_semaphore_state(error, engine, ee);
-   else
+   ee->fault_reg = I915_READ(GEN8_RING_FAULT_REG);
+   } else {
gen6_record_semaphore_state(engine, ee);
+   ee->fault_reg = I915_READ(RING_FAULT_REG(engine));
+   }
}
 
if (INTEL_GEN(dev_priv) >= 4) {
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c8647cfa81ba..54a828aad777 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2149,6 +2149,8 @@ enum skl_disp_power_wells {
 #define   ARB_MODE_SWIZZLE_BDW (1<<1)
 #define RENDER_HWS_PGA_GEN7_MMIO(0x04080)
 #define 

Re: [Intel-gfx] [PATCH v9 5/7] vfio: Define vfio based dma-buf operations

[Zhang, Tina]

> -Original Message-
> From: Gerd Hoffmann [mailto:kra...@redhat.com]
> Sent: Tuesday, June 20, 2017 6:58 PM
> To: Zhang, Tina ; Alex Williamson
> 
> Cc: intel-gfx@lists.freedesktop.org; linux-ker...@vger.kernel.org; Kirti
> Wankhede ; Chen, Xiaoguang
> ; intel-gvt-...@lists.freedesktop.org; Lv, Zhiyuan
> ; Wang, Zhi A ; Wang, Zhenyu
> Z 
> Subject: Re: [Intel-gfx] [PATCH v9 5/7] vfio: Define vfio based dma-buf
> operations
> 
> On Tue, 2017-06-20 at 08:41 +, Zhang, Tina wrote:
> > Hi,
> >
> > Thanks for all the comments. Here are the summaries:
> >
> > 1. Modify the structures to make it more general.
> > struct vfio_device_gfx_plane_info {
> > __u64 start;
> > __u64 drm_format_mod;
> > __u32 drm_format;
> > __u32 width;
> > __u32 height;
> > __u32 stride;
> > __u32 size;
> > __u32 x_pos;
> > __u32 y_pos;
> > __u32 generation;
> > };
> 
> Looks good to me.
> 
> > struct vfio_device_query_gfx_plane {
> > __u32 argsz;
> > __u32 flags;
> > #define VFIO_GFX_PLANE_FLAGS_REGION_ID  (1 << 0)
> > #define VFIO_GFX_PLANE_FLAGS_PLANE_ID   (1 << 1)
> > struct vfio_device_gfx_plane_info plane_info;
> > __u32 id;
> > };
> 
> I'm not convinced the flags are a great idea.  Whenever dmabufs or a region is
> used is a static property of the device, not of each individual plane.
> 
> 
> I think we should have this for userspace to figure:
> 
> enum vfio_device_gfx_type {
> VFIO_DEVICE_GFX_NONE,
> VFIO_DEVICE_GFX_DMABUF,
> VFIO_DEVICE_GFX_REGION,
> };
> 
> struct vfio_device_gfx_query_caps {
> __u32 argsz;
> __u32 flags;
> enum vfio_device_gfx_type;
> };
> 
> 
> Then this to query the plane:
> 
> struct vfio_device_gfx_query_plane {
> __u32 argsz;
> __u32 flags;
> struct vfio_device_gfx_plane_info plane_info;  /* out */
> __u32 plane_type;  /* in  */
> };
> 
> 
> 2. Remove dmabuf mgr fd and add these two ioctl commands to the vfio device
> fd.
> > VFIO_DEVICE_QUERY_GFX_PLANE : used to query
> > vfio_device_gfx_plane_info.
> 
> Yes.
> 
> > VFIO_DEVICE_GET_DMABUF_FD: used to create and return the dmabuf fd.
> 
> Yes.  The plane might have changed between query-plane and get-dmabuf ioctl
> calls though, we must make sure we handle that somehow.  Current patches
> return plane_info on get-dmabuf ioctl too, so userspace can see what it 
> actually
> got.
> 
> With the generation we can also do something different:  Pass in plane_type 
> and
> generation, and have VFIO_DEVICE_GET_DMABUF_FD return an error in case
> the generation doesn't match.  In that case it doesn't make much sense any
> more to have a separate plane_info struct, which was added so we don't have
> to duplicate things in query-plane and get- dmabuf ioctl structs.
Comparing with the current patch, this would make user space a little bit 
harder to
get the dmabuf by calling VFIO_DEVICE_GET_DMABUF ioctl. Is it efficient for
user mode usage?

Thanks
Tina
> 
> cheers,
>   Gerd

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Re: [Intel-gfx] [PATCH v9 5/7] vfio: Define vfio based dma-buf operations

[Alex Williamson]

On Fri, 23 Jun 2017 09:26:59 +0200
Gerd Hoffmann  wrote:

>   Hi,
> 
> > Is this only going to support accelerated driver output, not basic
> > VGA
> > modes for BIOS interaction?  
> 
> Right now there is no vgabios or uefi support for the vgpu.
> 
> But even with that in place there still is the problem that the display
> device initialization happens before the guest runs and therefore there
> isn't an plane yet ...
> 
> > > Right now the experimental intel patches throw errors in case no
> > > plane
> > > exists (yet).  Maybe we should have a "bool is_enabled" field in
> > > the
> > > plane_info struct, so drivers can use that to signal whenever the
> > > guest
> > > has programmed a valid video mode or not (likewise for the cursor,
> > > which doesn't exist with fbcon, only when running xorg).  With that
> > > in
> > > place using the QUERY_PLANE ioctl also for probing looks
> > > reasonable.  
> > 
> > Sure, or -ENOTTY for ioctl not implemented vs -EINVAL for no
> > available
> > plane, but then that might not help the user know how a plane would
> > be
> > available if it were available.  
> 
> So maybe a "enum plane_state" (instead of "bool is_enabled")?  So we
> can clearly disturgish ENABLED, DISABLED, NOT_SUPPORTED cases?

What's the difference between NOT_SUPPORTED and -ENOTTY on the ioctl?
Perhaps a bit in a flags field could specify EN/DIS-ABLED and leave
room for things we're forgetting.  Keep in mind that we need to use
explicit width fields for a uapi structure, so __u32 vs enum.  Thanks,

Alex
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Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix mutex imbalance for igt_render_engine_reset_fallback

[Michel Thierry]

On 23/06/17 06:19, Chris Wilson wrote:

Smatch spots:

drivers/gpu/drm/i915/selftests/intel_hangcheck.c:669 
igt_render_engine_reset_fallback() error: double unlock 
'mutex:>drm.struct_mutex'

Signed-off-by: Chris Wilson 


Reviewed-by: Michel Thierry 


---
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 21 ++---
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c 
b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index af475189bd52..7096c3911cd3 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -597,12 +597,12 @@ static int igt_render_engine_reset_fallback(void *arg)

err = hang_init(, i915);
if (err)
-   goto unlock;
+   goto err_unlock;

rq = hang_create_request(, engine, i915->kernel_context);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
-   goto fini;
+   goto err_fini;
}

i915_gem_request_get(rq);
@@ -614,7 +614,7 @@ static int igt_render_engine_reset_fallback(void *arg)
if (!wait_for_hang(, rq)) {
pr_err("Failed to start request %x\n", rq->fence.seqno);
err = -EIO;
-   goto out_rq;
+   goto err_request;
}

reset_engine_count = i915_reset_engine_count(>gpu_error, engine);
@@ -646,13 +646,14 @@ static int igt_render_engine_reset_fallback(void *arg)
 */
if (i915_terminally_wedged(>gpu_error)) {
set_bit(I915_RESET_BACKOFF, >gpu_error.flags);
-   mutex_lock(>drm.struct_mutex);
rq->fence.error = 0;

+   mutex_lock(>drm.struct_mutex);
set_bit(I915_RESET_HANDOFF, >gpu_error.flags);
i915_reset(i915);
GEM_BUG_ON(test_bit(I915_RESET_HANDOFF,
>gpu_error.flags));
+   mutex_unlock(>drm.struct_mutex);

if (i915_reset_count(>gpu_error) == reset_count) {
pr_err("No full GPU reset recorded!\n");
@@ -663,10 +664,8 @@ static int igt_render_engine_reset_fallback(void *arg)

 out_rq:
i915_gem_request_put(rq);
-fini:
hang_fini();
-unlock:
-   mutex_unlock(>drm.struct_mutex);
+out_backoff:
clear_bit(I915_RESET_BACKOFF, >gpu_error.flags);
wake_up_all(>gpu_error.reset_queue);

@@ -674,6 +673,14 @@ static int igt_render_engine_reset_fallback(void *arg)
return -EIO;

return err;
+
+err_request:
+   i915_gem_request_put(rq);
+err_fini:
+   hang_fini();
+err_unlock:
+   mutex_unlock(>drm.struct_mutex);
+   goto out_backoff;
 }

 int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
--
2.13.1

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[Intel-gfx] ✗ Fi.CI.BAT: failure for Blobifiers (FKA GET_PLANE2)

[Patchwork]

== Series Details ==

Series: Blobifiers (FKA GET_PLANE2)
URL   : https://patchwork.freedesktop.org/series/26304/
State : failure

== Summary ==

  CHK include/config/kernel.release
  CHK include/generated/uapi/linux/version.h
  CHK include/generated/utsrelease.h
  CHK include/generated/bounds.h
  CHK include/generated/timeconst.h
  CHK include/generated/asm-offsets.h
  CALLscripts/checksyscalls.sh
  CHK scripts/mod/devicetable-offsets.h
  CHK include/generated/compile.h
  CHK kernel/config_data.h
  CC [M]  drivers/gpu/drm/i915/intel_display.o
drivers/gpu/drm/i915/intel_display.c:105:2: error: 
‘I915_FORMAT_MOD_Yf_TILED_CCS’ undeclared here (not in a function)
  I915_FORMAT_MOD_Yf_TILED_CCS,
  ^
drivers/gpu/drm/i915/intel_display.c:106:2: error: 
‘I915_FORMAT_MOD_Y_TILED_CCS’ undeclared here (not in a function)
  I915_FORMAT_MOD_Y_TILED_CCS,
  ^
scripts/Makefile.build:302: recipe for target 
'drivers/gpu/drm/i915/intel_display.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1
scripts/Makefile.build:561: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:561: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:561: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1016: recipe for target 'drivers' failed
make: *** [drivers] Error 2

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[Intel-gfx] [PATCH 3/4] drm/i915: Add format modifiers for Intel

[Ben Widawsky]

This was based on a patch originally by Kristian. It has been modified
pretty heavily to use the new callbacks from the previous patch.

v2:
  - Add LINEAR and Yf modifiers to list (Ville)
  - Combine i8xx and i965 into one list of formats (Ville)
  - Allow 1010102 formats for Y/Yf tiled (Ville)

v3:
  - Handle cursor formats (Ville)
  - Put handling for LINEAR in the mod_support functions (Ville)

v4:
  - List each modifier explicitly in supported modifiers (Ville)
  - Handle the CURSOR plane (Ville)

v5:
  - Split out cursor and sprite handling (Ville)

v6:
  - Actually use the sprite funcs (Emil)
  - Use unreachable (Emil)

v7:
  - Only allow Intel modifiers and LINEAR (Ben)

v8
  - Fix spite assert introduced in v6 (Daniel)

Cc: Ville Syrjälä 
Cc: Kristian H. Kristensen 
Cc: Emil Velikov 
Signed-off-by: Ben Widawsky 
---
 drivers/gpu/drm/i915/intel_display.c | 136 +--
 drivers/gpu/drm/i915/intel_sprite.c  |  82 -
 2 files changed, 211 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 7d55c5e3df28..877a51514c61 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -72,6 +72,12 @@ static const uint32_t i965_primary_formats[] = {
DRM_FORMAT_XBGR2101010,
 };
 
+static const uint64_t i9xx_format_modifiers[] = {
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
@@ -87,11 +93,24 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_VYUY,
 };
 
+static const uint64_t skl_format_modifiers[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 /* Cursor formats */
 static const uint32_t intel_cursor_formats[] = {
DRM_FORMAT_ARGB,
 };
 
+static const uint64_t cursor_format_modifiers[] = {
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
 static void ironlake_pch_clock_get(struct intel_crtc *crtc,
@@ -13810,6 +13829,108 @@ void intel_plane_destroy(struct drm_plane *plane)
kfree(to_intel_plane(plane));
 }
 
+static bool i8xx_mod_supported(uint32_t format, uint64_t modifier)
+{
+   switch (format) {
+   case DRM_FORMAT_C8:
+   case DRM_FORMAT_RGB565:
+   case DRM_FORMAT_XRGB1555:
+   case DRM_FORMAT_XRGB:
+   return modifier == DRM_FORMAT_MOD_LINEAR ||
+   modifier == I915_FORMAT_MOD_X_TILED;
+   default:
+   return false;
+   }
+}
+
+static bool i965_mod_supported(uint32_t format, uint64_t modifier)
+{
+   switch (format) {
+   case DRM_FORMAT_C8:
+   case DRM_FORMAT_RGB565:
+   case DRM_FORMAT_XRGB:
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_XRGB2101010:
+   case DRM_FORMAT_XBGR2101010:
+   return modifier == DRM_FORMAT_MOD_LINEAR ||
+   modifier == I915_FORMAT_MOD_X_TILED;
+   default:
+   return false;
+   }
+}
+
+static bool skl_mod_supported(uint32_t format, uint64_t modifier)
+{
+   switch (format) {
+   case DRM_FORMAT_C8:
+   switch (modifier) {
+   case DRM_FORMAT_MOD_LINEAR:
+   case I915_FORMAT_MOD_X_TILED:
+   case I915_FORMAT_MOD_Y_TILED:
+   return true;
+   default:
+   return false;
+   }
+   case DRM_FORMAT_RGB565:
+   case DRM_FORMAT_XRGB:
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_ARGB:
+   case DRM_FORMAT_ABGR:
+   case DRM_FORMAT_XRGB2101010:
+   case DRM_FORMAT_XBGR2101010:
+   case DRM_FORMAT_YUYV:
+   case DRM_FORMAT_YVYU:
+   case DRM_FORMAT_UYVY:
+   case DRM_FORMAT_VYUY:
+   /* All i915 modifiers are fine */
+   switch (modifier) {
+   case DRM_FORMAT_MOD_LINEAR:
+   case I915_FORMAT_MOD_X_TILED:
+   case I915_FORMAT_MOD_Y_TILED:
+   case I915_FORMAT_MOD_Yf_TILED:
+   return true;
+   default:
+   return false;
+   }
+   default:
+   return false;
+   }
+}
+
+static bool intel_primary_plane_format_mod_supported(struct drm_plane *plane,
+uint32_t format,
+uint64_t modifier)
+{
+   struct drm_i915_private *dev_priv = to_i915(plane->dev);
+
+   if (WARN_ON(modifier == 

[Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

[Ben Widawsky]

v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.

This requires rebase on the correct Ville patches

Cc: Daniel Stone 
Cc: Kristian Høgsberg 
Signed-off-by: Ben Widawsky 
---
 drivers/gpu/drm/i915/intel_display.c | 34 +--
 drivers/gpu/drm/i915/intel_sprite.c  | 39 +++-
 2 files changed, 66 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 877a51514c61..2a0e5cd26059 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -93,7 +93,17 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_VYUY,
 };
 
+static const uint64_t skl_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_format_modifiers[] = {
+   I915_FORMAT_MOD_Yf_TILED_CCS,
+   I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
@@ -13872,17 +13882,13 @@ static bool skl_mod_supported(uint32_t format, 
uint64_t modifier)
return false;
}
case DRM_FORMAT_RGB565:
-   case DRM_FORMAT_XRGB:
-   case DRM_FORMAT_XBGR:
-   case DRM_FORMAT_ARGB:
-   case DRM_FORMAT_ABGR:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
-   /* All i915 modifiers are fine */
+   /* All non-ccs i915 modifiers are fine */
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
case I915_FORMAT_MOD_X_TILED:
@@ -13892,6 +13898,12 @@ static bool skl_mod_supported(uint32_t format, 
uint64_t modifier)
default:
return false;
}
+   case DRM_FORMAT_XRGB:
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_ARGB:
+   case DRM_FORMAT_ABGR:
+   /* All i915 modifiers are fine */
+   return true;
default:
return false;
}
@@ -14123,13 +14135,23 @@ intel_primary_plane_create(struct drm_i915_private 
*dev_priv, enum pipe pipe)
primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
primary->check_plane = intel_check_primary_plane;
 
-   if (INTEL_GEN(dev_priv) >= 9) {
+   if (INTEL_GEN(dev_priv) >= 10) {
intel_primary_formats = skl_primary_formats;
num_formats = ARRAY_SIZE(skl_primary_formats);
intel_format_modifiers = skl_format_modifiers;
 
primary->update_plane = skylake_update_primary_plane;
primary->disable_plane = skylake_disable_primary_plane;
+   } else if (INTEL_GEN(dev_priv) >= 9) {
+   intel_primary_formats = skl_primary_formats;
+   num_formats = ARRAY_SIZE(skl_primary_formats);
+   if (pipe >= PIPE_C)
+   intel_format_modifiers = skl_format_modifiers;
+   else
+   intel_format_modifiers = skl_format_modifiers_noccs;
+
+   primary->update_plane = skylake_update_primary_plane;
+   primary->disable_plane = skylake_disable_primary_plane;
} else if (INTEL_GEN(dev_priv) >= 4) {
intel_primary_formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index e80834cb1f4c..de4454a8ef9e 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1085,7 +1085,17 @@ static uint32_t skl_plane_formats[] = {
DRM_FORMAT_VYUY,
 };
 
+static const uint64_t skl_plane_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_plane_format_modifiers[] = {
+   I915_FORMAT_MOD_Yf_TILED_CCS,
+   I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
@@ -1108,6 +1118,20 @@ static bool 
intel_sprite_plane_format_mod_supported(struct drm_plane *plane,
modifier != DRM_FORMAT_MOD_LINEAR)
return false;
 
+   switch (modifier) {
+   case I915_FORMAT_MOD_Yf_TILED_CCS:
+   case I915_FORMAT_MOD_Y_TILED_CCS:
+   switch (format) {
+   case DRM_FORMAT_ABGR:
+   case DRM_FORMAT_ARGB:
+   case DRM_FORMAT_XBGR:
+   case 

[Intel-gfx] [PATCH 2/4] drm: Create a format/modifier blob

[Ben Widawsky]

Updated blob layout (Rob, Daniel, Kristian, xerpi)

v2:
* Removed __packed, and alignment (.+)
* Fix indent in drm_format_modifier fields (Liviu)
* Remove duplicated modifier > 64 check (Liviu)
* Change comment about modifier (Liviu)
* Remove arguments to blob creation, use plane instead (Liviu)
* Fix data types (Ben)
* Make the blob part of uapi (Daniel)

v3:
Remove unused ret field.
Change i, and j to unsigned int (Emil)

v4:
Use plane->modifier_count instead of recounting (Daniel)

Cc: Rob Clark 
Cc: Kristian H. Kristensen 
Signed-off-by: Ben Widawsky 
Reviewed-by: Daniel Stone  (v2)
Reviewed-by: Liviu Dudau  (v2)
Reviewed-by: Emil Velikov  (v3)
---
 drivers/gpu/drm/drm_mode_config.c |  7 
 drivers/gpu/drm/drm_plane.c   | 83 +++
 include/drm/drm_mode_config.h |  6 +++
 include/uapi/drm/drm_mode.h   | 50 +++
 4 files changed, 146 insertions(+)

diff --git a/drivers/gpu/drm/drm_mode_config.c 
b/drivers/gpu/drm/drm_mode_config.c
index d9862259a2a7..6bfbc3839df5 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -337,6 +337,13 @@ static int drm_mode_create_standard_properties(struct 
drm_device *dev)
return -ENOMEM;
dev->mode_config.gamma_lut_size_property = prop;
 
+   prop = drm_property_create(dev,
+  DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB,
+  "IN_FORMATS", 0);
+   if (!prop)
+   return -ENOMEM;
+   dev->mode_config.modifiers = prop;
+
return 0;
 }
 
diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index d3fc561d7b48..8a2d5765837a 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -62,6 +62,86 @@ static unsigned int drm_num_planes(struct drm_device *dev)
return num;
 }
 
+static inline u32 *
+formats_ptr(struct drm_format_modifier_blob *blob)
+{
+   return (u32 *)(((char *)blob) + blob->formats_offset);
+}
+
+static inline struct drm_format_modifier *
+modifiers_ptr(struct drm_format_modifier_blob *blob)
+{
+   return (struct drm_format_modifier *)(((char *)blob) + 
blob->modifiers_offset);
+}
+
+static int create_in_format_blob(struct drm_device *dev, struct drm_plane 
*plane)
+{
+   const struct drm_mode_config *config = >mode_config;
+   struct drm_property_blob *blob;
+   struct drm_format_modifier *mod;
+   size_t blob_size, formats_size, modifiers_size;
+   struct drm_format_modifier_blob *blob_data;
+   unsigned int i, j;
+
+   formats_size = sizeof(*plane->format_types) * plane->format_count;
+   if (WARN_ON(!formats_size)) {
+   /* 0 formats are never expected */
+   return 0;
+   }
+
+   modifiers_size =
+   sizeof(struct drm_format_modifier) * plane->modifier_count;
+
+   blob_size = sizeof(struct drm_format_modifier_blob);
+   /* Modifiers offset is a pointer to a struct with a 64 bit field so it
+* should be naturally aligned to 8B.
+*/
+   blob_size += ALIGN(formats_size, 8);
+   blob_size += modifiers_size;
+
+   blob = drm_property_create_blob(dev, blob_size, NULL);
+   if (IS_ERR(blob))
+   return -1;
+
+   blob_data = (struct drm_format_modifier_blob *)blob->data;
+   blob_data->version = FORMAT_BLOB_CURRENT;
+   blob_data->count_formats = plane->format_count;
+   blob_data->formats_offset = sizeof(struct drm_format_modifier_blob);
+   blob_data->count_modifiers = plane->modifier_count;
+
+   blob_data->modifiers_offset =
+   ALIGN(blob_data->formats_offset + formats_size, 8);
+
+   memcpy(formats_ptr(blob_data), plane->format_types, formats_size);
+
+   /* If we can't determine support, just bail */
+   if (!plane->funcs->format_mod_supported)
+   goto done;
+
+   mod = modifiers_ptr(blob_data);
+   for (i = 0; i < plane->modifier_count; i++) {
+   for (j = 0; j < plane->format_count; j++) {
+   if (plane->funcs->format_mod_supported(plane,
+  
plane->format_types[j],
+  
plane->modifiers[i])) {
+
+   mod->formats |= 1 << j;
+   }
+   }
+
+   mod->modifier = plane->modifiers[i];
+   mod->offset = 0;
+   mod->pad = 0;
+   mod++;
+   }
+
+done:
+   drm_object_attach_property(>base, config->modifiers,
+  blob->base.id);
+
+   return 0;
+}
+
 /**
  * drm_universal_plane_init - Initialize a new universal plane object
  * @dev: DRM device
@@ -181,6 +261,9 @@ int 

[Intel-gfx] [PATCH v4 0/4] Blobifiers (FKA GET_PLANE2)

[Ben Widawsky]

These patches create the blob property for modifiers, and the implementation for
i915 modifiers. This [generally] has been tested in Weston by Daniel Stone as
well as an earlier version of kmscube. This patch series was formerly known as
"GET_PLANE2" because the interface for obtaining the modifiers was extended
throug GET_PLANE instead of a blob property.

The modifier blob (blobifier) presents a list of modifiers per plane, and a
related bitmask [1] back to userspace, via KMS, so that a client such as a
compositor may utilize those modifiers for buffer creation via GBM, or buffer
import via dmabuf/EGL.

All vendors may optimize via their supported modifiers. For Intel, this is one
of the pieces required to support end to end lossless compression (a memory
bandwidth saving technique semi-common across GPUs).

I do apologize if I missed some previous review comments. A ton of things came
up and it took a while to spin this rev. Nothing was missing intentionally.

[1] The bitmask is used to show the connection between which modifiers are
supported by which formats.

Ben Widawsky (4):
  drm: Plumb modifiers through plane init
  drm: Create a format/modifier blob
  drm/i915: Add format modifiers for Intel
  drm/i915: Add support for CCS modifiers

 drivers/gpu/drm/arc/arcpgu_crtc.c   |   1 +
 drivers/gpu/drm/arm/hdlcd_crtc.c|   1 +
 drivers/gpu/drm/arm/malidp_planes.c |   2 +-
 drivers/gpu/drm/armada/armada_crtc.c|   1 +
 drivers/gpu/drm/armada/armada_overlay.c |   1 +
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c |   3 +-
 drivers/gpu/drm/drm_mode_config.c   |   7 ++
 drivers/gpu/drm/drm_modeset_helper.c|   1 +
 drivers/gpu/drm/drm_plane.c | 119 +-
 drivers/gpu/drm/drm_simple_kms_helper.c |   3 +
 drivers/gpu/drm/exynos/exynos_drm_plane.c   |   2 +-
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c |   2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c  |   1 +
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c |   2 +-
 drivers/gpu/drm/i915/intel_display.c| 155 +++-
 drivers/gpu/drm/i915/intel_sprite.c | 117 +-
 drivers/gpu/drm/imx/ipuv3-plane.c   |   4 +-
 drivers/gpu/drm/mediatek/mtk_drm_plane.c|   2 +-
 drivers/gpu/drm/meson/meson_plane.c |   1 +
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c   |   2 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c   |   4 +-
 drivers/gpu/drm/mxsfb/mxsfb_drv.c   |   2 +-
 drivers/gpu/drm/nouveau/nv50_display.c  |   5 +-
 drivers/gpu/drm/omapdrm/omap_plane.c|   2 +-
 drivers/gpu/drm/pl111/pl111_display.c   |   2 +-
 drivers/gpu/drm/qxl/qxl_display.c   |   2 +-
 drivers/gpu/drm/rcar-du/rcar_du_plane.c |   4 +-
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c   |   4 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   4 +-
 drivers/gpu/drm/sti/sti_cursor.c|   2 +-
 drivers/gpu/drm/sti/sti_gdp.c   |   2 +-
 drivers/gpu/drm/sti/sti_hqvdp.c |   2 +-
 drivers/gpu/drm/stm/ltdc.c  |   2 +-
 drivers/gpu/drm/sun4i/sun4i_layer.c |   2 +-
 drivers/gpu/drm/tegra/dc.c  |  12 +-
 drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c |   2 +-
 drivers/gpu/drm/vc4/vc4_plane.c |   2 +-
 drivers/gpu/drm/virtio/virtgpu_plane.c  |   2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c |   4 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c|   4 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c|   4 +-
 drivers/gpu/drm/zte/zx_plane.c  |   2 +-
 include/drm/drm_mode_config.h   |   6 +
 include/drm/drm_plane.h |  22 +++-
 include/drm/drm_simple_kms_helper.h |   1 +
 include/uapi/drm/drm_fourcc.h   |  11 ++
 include/uapi/drm/drm_mode.h |  50 
 47 files changed, 539 insertions(+), 49 deletions(-)

-- 
2.13.1

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[Intel-gfx] [PATCH 1/4] drm: Plumb modifiers through plane init

[Ben Widawsky]

This is the plumbing for supporting fb modifiers on planes. Modifiers
have already been introduced to some extent, but this series will extend
this to allow querying modifiers per plane. Based on this, the client to
enable optimal modifications for framebuffers.

This patch simply allows the DRM drivers to initialize their list of
supported modifiers upon initializing the plane.

v2: A minor addition from Daniel

v3:
* Updated commit message
* s/INVALID/DRM_FORMAT_MOD_INVALID (Liviu)
* Remove some excess newlines (Liviu)
* Update comment for > 64 modifiers (Liviu)

v4: Minor comment adjustments (Liviu)

v5: Some new platforms added due to rebase

v6: Add some missed plane inits (or maybe they're new - who knows at
this point) (Daniel)

Signed-off-by: Ben Widawsky 
Reviewed-by: Daniel Stone  (v2)
Reviewed-by: Liviu Dudau 
---
 drivers/gpu/drm/arc/arcpgu_crtc.c   |  1 +
 drivers/gpu/drm/arm/hdlcd_crtc.c|  1 +
 drivers/gpu/drm/arm/malidp_planes.c |  2 +-
 drivers/gpu/drm/armada/armada_crtc.c|  1 +
 drivers/gpu/drm/armada/armada_overlay.c |  1 +
 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c |  3 ++-
 drivers/gpu/drm/drm_modeset_helper.c|  1 +
 drivers/gpu/drm/drm_plane.c | 36 -
 drivers/gpu/drm/drm_simple_kms_helper.c |  3 +++
 drivers/gpu/drm/exynos/exynos_drm_plane.c   |  2 +-
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c |  2 +-
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c  |  1 +
 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c |  2 +-
 drivers/gpu/drm/i915/intel_display.c|  5 +++-
 drivers/gpu/drm/i915/intel_sprite.c |  4 +--
 drivers/gpu/drm/imx/ipuv3-plane.c   |  4 +--
 drivers/gpu/drm/mediatek/mtk_drm_plane.c|  2 +-
 drivers/gpu/drm/meson/meson_plane.c |  1 +
 drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c   |  2 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c   |  4 +--
 drivers/gpu/drm/mxsfb/mxsfb_drv.c   |  2 +-
 drivers/gpu/drm/nouveau/nv50_display.c  |  5 ++--
 drivers/gpu/drm/omapdrm/omap_plane.c|  2 +-
 drivers/gpu/drm/pl111/pl111_display.c   |  2 +-
 drivers/gpu/drm/qxl/qxl_display.c   |  2 +-
 drivers/gpu/drm/rcar-du/rcar_du_plane.c |  4 +--
 drivers/gpu/drm/rcar-du/rcar_du_vsp.c   |  4 +--
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |  4 +--
 drivers/gpu/drm/sti/sti_cursor.c|  2 +-
 drivers/gpu/drm/sti/sti_gdp.c   |  2 +-
 drivers/gpu/drm/sti/sti_hqvdp.c |  2 +-
 drivers/gpu/drm/stm/ltdc.c  |  2 +-
 drivers/gpu/drm/sun4i/sun4i_layer.c |  2 +-
 drivers/gpu/drm/tegra/dc.c  | 12 -
 drivers/gpu/drm/tinydrm/core/tinydrm-pipe.c |  2 +-
 drivers/gpu/drm/vc4/vc4_plane.c |  2 +-
 drivers/gpu/drm/virtio/virtgpu_plane.c  |  2 +-
 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c |  4 +--
 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c|  4 +--
 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c|  4 +--
 drivers/gpu/drm/zte/zx_plane.c  |  2 +-
 include/drm/drm_plane.h | 22 ++-
 include/drm/drm_simple_kms_helper.h |  1 +
 include/uapi/drm/drm_fourcc.h   | 11 
 44 files changed, 130 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c 
b/drivers/gpu/drm/arc/arcpgu_crtc.c
index 611af74a31c0..d0e3671a71ed 100644
--- a/drivers/gpu/drm/arc/arcpgu_crtc.c
+++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
@@ -217,6 +217,7 @@ static struct drm_plane *arc_pgu_plane_init(struct 
drm_device *drm)
 
ret = drm_universal_plane_init(drm, plane, 0xff, _pgu_plane_funcs,
   formats, ARRAY_SIZE(formats),
+  NULL,
   DRM_PLANE_TYPE_PRIMARY, NULL);
if (ret)
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/arm/hdlcd_crtc.c b/drivers/gpu/drm/arm/hdlcd_crtc.c
index 1a3359c0f6cd..9b9c0913f55f 100644
--- a/drivers/gpu/drm/arm/hdlcd_crtc.c
+++ b/drivers/gpu/drm/arm/hdlcd_crtc.c
@@ -320,6 +320,7 @@ static struct drm_plane *hdlcd_plane_init(struct drm_device 
*drm)
 
ret = drm_universal_plane_init(drm, plane, 0xff, _plane_funcs,
   formats, ARRAY_SIZE(formats),
+  NULL,
   DRM_PLANE_TYPE_PRIMARY, NULL);
if (ret) {
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/arm/malidp_planes.c 
b/drivers/gpu/drm/arm/malidp_planes.c
index 600fa7bd7f52..60402e27882f 100644
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -398,7 +398,7 @@ int malidp_de_planes_init(struct 

Re: [Intel-gfx] [PATCH v9 5/7] vfio: Define vfio based dma-buf operations

[Alex Williamson]

On Fri, 23 Jun 2017 10:31:28 +0200
Gerd Hoffmann  wrote:

> On Fri, 2017-06-23 at 15:49 +0800, Zhi Wang wrote:
> > Hi:
> >  Thanks for the discussions! If the userspace application has 
> > already maintained a LRU list, it looks like we don't need
> > generation 
> > anymore,  
> 
> generation isn't required, things are working just fine without that. 
> It is just a small optimization, userspace can skip the LRU lookup
> altogether if the generation didn't change.
> 
> But of couse that only pays off if the kernel doesn't has to put much
> effort into maintaining the generation id.  Something simple like
> increasing it each time the guest writes a register which affects
> plane_info.

But it seems like that simple management algorithm pretty much
guarantees that the kernel will never revisit a generation and
therefore caching dmabuf fds is pointless.  AIUI the optimization is to
allow userspace to 'at a glance' test one plane_info vs another.  The
user could also do this with a memcmp of the plane_info structs if
that's its only purpose.  A randomly incremented field within that
struct could actually be a hindrance to the user for such a
comparison.  Are there cases where the plane_info struct is otherwise
identical where the user would need to get a new dmabuf fd anyway?
Thanks,

Alex
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Re: [Intel-gfx] [PATCH 00/13] RESEND: remove drm_vblank_cleanup from drivers

[Sean Paul]

On Wed, Jun 21, 2017 at 10:28:37AM +0200, Daniel Vetter wrote:
> Hi all,
> 
> This is the resend of the driver patches which haven't seen and ack/r-b yet 
> and
> so aren't merged yet. I'd really like to get them all merged. Review/acks very
> much appreciated.
> 
> Thanks, Daniel
> 
> Daniel Vetter (13):
>   drm/amd|radeon: Drop drm_vblank_cleanup
>   drm/hibmc: Drop drm_vblank_cleanup
>   drm/kirin: Drop drm_vblank_cleanup
>   drm/i915: Drop drm_vblank_cleanup
>   drm/mtk: Drop drm_vblank_cleanup
>   drm/mxsfb: Drop drm_vblank_cleanup
>   drm/nouveau: Drop drm_vblank_cleanup
>   drm/rockchip: Drop drm_vblank_cleanup
>   drm/shmob: Drop drm_vblank_cleanup
>   drm/udl: Drop drm_vblank_cleanup
>   drm/vmwgfx: Drop drm_vblank_cleanup
>   drm/zte: Drop drm_vblank_cleanup
>   drm/vblank: Unexport drm_vblank_cleanup

For the whole set (with vmwgfx nit resolved):

Reviewed-by: Sean Paul 

> 
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c |  1 -
>  drivers/gpu/drm/drm_internal.h  |  1 +
>  drivers/gpu/drm/drm_vblank.c| 19 ++---
>  drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c |  3 ++-
>  drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c |  1 -
>  drivers/gpu/drm/i915/i915_drv.c |  6 +-
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c  |  1 -
>  drivers/gpu/drm/mxsfb/mxsfb_drv.c   |  1 -
>  drivers/gpu/drm/nouveau/nouveau_display.c   |  2 --
>  drivers/gpu/drm/radeon/radeon_irq_kms.c |  1 -
>  drivers/gpu/drm/rockchip/rockchip_drm_drv.c |  2 --
>  drivers/gpu/drm/shmobile/shmob_drm_drv.c|  4 +---
>  drivers/gpu/drm/udl/udl_main.c  |  2 --
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c |  9 +++--
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.h |  2 --
>  drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c |  4 
>  drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c|  9 -
>  drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c| 27 
> +
>  drivers/gpu/drm/zte/zx_drm_drv.c|  2 --
>  include/drm/drm_vblank.h|  1 -
>  20 files changed, 11 insertions(+), 87 deletions(-)
> 
> -- 
> 2.11.0
> 
> ___
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> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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Re: [Intel-gfx] [RFC i-g-t 1/4] igt: Remove default from the engine list

[Tvrtko Ursulin]

On 23/06/2017 15:17, Szwichtenberg, Radoslaw wrote:

On Fri, 2017-06-23 at 12:31 +0100, Tvrtko Ursulin wrote:

From: Tvrtko Ursulin 

Default is not an engine but an ABI alias for RCS. Remove it
from the engine list to eliminate redundant subtests and test
passes.

Does it mean that we will have an ABI part that we don't test?


Second patch adds the ABI testing to gem_exec_basic. Plus there is and 
odd test here and there which explicitly sends batches to 
I915_EXEC_DEFAULT. But to me just basic verification that the default 
works sounds enough.


Regards,

Tvrtko
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Re: [Intel-gfx] [RFC i-g-t 1/4] igt: Remove default from the engine list

[Szwichtenberg, Radoslaw]

On Fri, 2017-06-23 at 12:31 +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin 
> 
> Default is not an engine but an ABI alias for RCS. Remove it
> from the engine list to eliminate redundant subtests and test
> passes.
Does it mean that we will have an ABI part that we don't test?
-Radek
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Re: [Intel-gfx] [PATCH 11/13] drm/vmwgfx: Drop drm_vblank_cleanup

[Sean Paul]

On Wed, Jun 21, 2017 at 10:28:48AM +0200, Daniel Vetter wrote:
> Again stopping the vblank before uninstalling the irq handler is kinda
> the wrong way round, but the fb_off stuff should take care of
> disabling the dsiplay at least in most cases. So drop the
> drm_vblank_cleanup code since it's not really doing anything, it looks
> all cargo-culted.
> 
> v2: Appease gcc better.
> 
> Cc: Sinclair Yeh 
> Cc: Thomas Hellstrom 
> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.c  |  9 +++--
>  drivers/gpu/drm/vmwgfx/vmwgfx_kms.h  |  2 --
>  drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c  |  4 
>  drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c |  9 -
>  drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 27 +--
>  5 files changed, 4 insertions(+), 47 deletions(-)
> 
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 
> b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> index 3d94ea67a825..a93c0bb73452 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> @@ -1658,7 +1658,7 @@ int vmw_kms_init(struct vmw_private *dev_priv)
>  
>  int vmw_kms_close(struct vmw_private *dev_priv)
>  {
> - int ret;
> + int ret = 0;
>  
>   /*
>* Docs says we should take the lock before calling this function
> @@ -1666,11 +1666,8 @@ int vmw_kms_close(struct vmw_private *dev_priv)
>* drm_encoder_cleanup which takes the lock we deadlock.
>*/
>   drm_mode_config_cleanup(dev_priv->dev);
> - if (dev_priv->active_display_unit == vmw_du_screen_object)
> - ret = vmw_kms_sou_close_display(dev_priv);
> - else if (dev_priv->active_display_unit == vmw_du_screen_target)
> - ret = vmw_kms_stdu_close_display(dev_priv);
> - else
> + if (dev_priv->active_display_unit != vmw_du_screen_object &&
> + dev_priv->active_display_unit != vmw_du_screen_target)

I think this is equivalent to:

if (dev_priv->active_display_unit == vmw_du_legacy)

>   ret = vmw_kms_ldu_close_display(dev_priv);
>  
>   return ret;
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h 
> b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
> index 5f8d678ae675..ff9c8389ff21 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
> @@ -390,7 +390,6 @@ int vmw_kms_update_proxy(struct vmw_resource *res,
>   * Screen Objects display functions - vmwgfx_scrn.c
>   */
>  int vmw_kms_sou_init_display(struct vmw_private *dev_priv);
> -int vmw_kms_sou_close_display(struct vmw_private *dev_priv);
>  int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv,
>struct vmw_framebuffer *framebuffer,
>struct drm_clip_rect *clips,
> @@ -418,7 +417,6 @@ int vmw_kms_sou_readback(struct vmw_private *dev_priv,
>   * Screen Target Display Unit functions - vmwgfx_stdu.c
>   */
>  int vmw_kms_stdu_init_display(struct vmw_private *dev_priv);
> -int vmw_kms_stdu_close_display(struct vmw_private *dev_priv);
>  int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
>  struct vmw_framebuffer *framebuffer,
>  struct drm_clip_rect *clips,
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c 
> b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> index d3987bcf53f8..449ed4fba0f2 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> @@ -582,13 +582,9 @@ int vmw_kms_ldu_init_display(struct vmw_private 
> *dev_priv)
>  
>  int vmw_kms_ldu_close_display(struct vmw_private *dev_priv)
>  {
> - struct drm_device *dev = dev_priv->dev;
> -
>   if (!dev_priv->ldu_priv)
>   return -ENOSYS;
>  
> - drm_vblank_cleanup(dev);
> -
>   BUG_ON(!list_empty(_priv->ldu_priv->active));
>  
>   kfree(dev_priv->ldu_priv);
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c 
> b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> index 8d7dc9def7c2..3b917c9b0c21 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> @@ -746,15 +746,6 @@ int vmw_kms_sou_init_display(struct vmw_private 
> *dev_priv)
>   return 0;
>  }
>  
> -int vmw_kms_sou_close_display(struct vmw_private *dev_priv)
> -{
> - struct drm_device *dev = dev_priv->dev;
> -
> - drm_vblank_cleanup(dev);
> -
> - return 0;
> -}
> -
>  static int do_dmabuf_define_gmrfb(struct vmw_private *dev_priv,
> struct vmw_framebuffer *framebuffer)
>  {
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c 
> b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> index 50be1f034f9e..6aecba6cd5e2 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> @@ -1651,36 +1651,11 @@ int vmw_kms_stdu_init_display(struct vmw_private 
> *dev_priv)
>  
>   if (unlikely(ret != 0)) {
>   DRM_ERROR("Failed to initialize STDU %d", i);
> - 

[Intel-gfx] ✓ Fi.CI.BAT: success for fbdev helper locking rework and deferred setup (rev2)

[Patchwork]

== Series Details ==

Series: fbdev helper locking rework and deferred setup (rev2)
URL   : https://patchwork.freedesktop.org/series/26171/
State : success

== Summary ==

Series 26171v2 fbdev helper locking rework and deferred setup
https://patchwork.freedesktop.org/api/1.0/series/26171/revisions/2/mbox/

Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass   -> FAIL   (fi-snb-2600) fdo#17
Test kms_busy:
Subgroup basic-flip-default-b:
fail   -> DMESG-FAIL (fi-skl-6700hq) fdo#101144 +1
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
fail   -> DMESG-FAIL (fi-skl-6700hq) fdo#101154 +27
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
fail   -> DMESG-FAIL (fi-skl-6700hq) fdo#100461 +1
Test kms_sink_crc_basic:
fail   -> DMESG-FAIL (fi-skl-6700hq) fdo#101519

fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144
fdo#101154 https://bugs.freedesktop.org/show_bug.cgi?id=101154
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#100461 https://bugs.freedesktop.org/show_bug.cgi?id=100461
fdo#101519 https://bugs.freedesktop.org/show_bug.cgi?id=101519

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:442s
fi-bdw-gvtdvmtotal:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  
time:431s
fi-bsw-n3050 total:279  pass:242  dwarn:1   dfail:0   fail:0   skip:36  
time:523s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:500s
fi-byt-j1900 total:279  pass:253  dwarn:2   dfail:0   fail:0   skip:24  
time:481s
fi-byt-n2820 total:279  pass:249  dwarn:2   dfail:0   fail:0   skip:28  
time:475s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:601s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:435s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:419s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:420s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:494s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:470s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:475s
fi-kbl-7560u total:279  pass:268  dwarn:1   dfail:0   fail:0   skip:10  
time:573s
fi-kbl-r total:279  pass:260  dwarn:1   dfail:0   fail:0   skip:18  
time:581s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:453s
fi-skl-6700hqtotal:279  pass:219  dwarn:5   dfail:29  fail:1   skip:24  
time:386s
fi-skl-6700k total:279  pass:257  dwarn:4   dfail:0   fail:0   skip:18  
time:464s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:471s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:432s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:539s
fi-snb-2600  total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  
time:409s

1789a02e41b11133dd23578edbd0b47ccf40 drm-tip: 2017y-06m-23d-12h-42m-45s UTC 
integration manifest
4ce0eca drm/hisilicon: Remove custom FB helper deferred setup
2a29167 drm/exynos: Remove custom FB helper deferred setup
8879fee drm/fb-helper: Support deferred setup
9eb62f0 drm/fb-helper: Split dpms handling into legacy and atomic paths
30558b0 drm/fb-helper: Stop using mode_config.mutex for internals
171296b drm/fb-helper: Push locking into restore_fbdev_mode_atomic|legacy
450ea9e drm/fb-helper: Push locking into pan_display_atomic|legacy
a380223 drm/fb-helper: Drop locking from the vsync wait ioctl code
aa92c2a drm/fb-helper: Push locking in fb_is_bound
8e3aee6 drm/fb-helper: Add top-level lock
2d50053 drm/i915: Drop FBDEV #ifdev in mst code
b8ea9f4 drm/fb-helper: Push down modeset lock into FB helpers

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5036/
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Re: [Intel-gfx] [PATCH 08/13] drm/rockchip: Drop drm_vblank_cleanup

[Sean Paul]

On Wed, Jun 21, 2017 at 10:28:45AM +0200, Daniel Vetter wrote:
> Either not relevant (in the load error paths) or done better already
> (in the unload code, by calling drm_atomic_helper_shutdown). Drop it.
> 
> Cc: Mark Yao 
> Signed-off-by: Daniel Vetter 

Reviewed-by: Sean Paul 

> ---
>  drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c 
> b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> index c6b1b7f3a2a3..b9fbf4b1e8f0 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
> @@ -177,7 +177,6 @@ static int rockchip_drm_bind(struct device *dev)
>   rockchip_drm_fbdev_fini(drm_dev);
>  err_kms_helper_poll_fini:
>   drm_kms_helper_poll_fini(drm_dev);
> - drm_vblank_cleanup(drm_dev);
>  err_unbind_all:
>   component_unbind_all(dev, drm_dev);
>  err_mode_config_cleanup:
> @@ -200,7 +199,6 @@ static void rockchip_drm_unbind(struct device *dev)
>   drm_kms_helper_poll_fini(drm_dev);
>  
>   drm_atomic_helper_shutdown(drm_dev);
> - drm_vblank_cleanup(drm_dev);
>   component_unbind_all(dev, drm_dev);
>   drm_mode_config_cleanup(drm_dev);
>   rockchip_iommu_cleanup(drm_dev);
> -- 
> 2.11.0
> 
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Sean Paul, Software Engineer, Google / Chromium OS
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[Intel-gfx] [PATCH i-g-t v2] lib/ioctl_wrappers: Fix function descriptions

[Radoslaw Szwichtenberg]

Function description incorrectly stated that gem_context_get_param
and gem_context_set_param were freeing hw context.

v2: removed additional incorrect information

Signed-off-by: Radoslaw Szwichtenberg 
---
 lib/ioctl_wrappers.c | 12 
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 0816a7b..8e5ec88 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -977,10 +977,8 @@ int __gem_context_get_param(int fd, struct 
local_i915_gem_context_param *p)
  * @fd: open i915 drm file descriptor
  * @p: i915 hw context parameter
  *
- * This is a wraps the CONTEXT_GET_PARAM ioctl, which is used to free a 
hardware
- * context. Not that similarly to gem_set_caching() this wrapper calls
- * igt_require() internally to correctly skip on kernels and platforms where hw
- * context parameter support is not available.
+ * This is a wraps the CONTEXT_GET_PARAM ioctl, which is used to get a context
+ * parameter.
  */
 void gem_context_get_param(int fd, struct local_i915_gem_context_param *p)
 {
@@ -1003,10 +1001,8 @@ int __gem_context_set_param(int fd, struct 
local_i915_gem_context_param *p)
  * @fd: open i915 drm file descriptor
  * @p: i915 hw context parameter
  *
- * This is a wraps the CONTEXT_SET_PARAM ioctl, which is used to free a 
hardware
- * context. Not that similarly to gem_set_caching() this wrapper calls
- * igt_require() internally to correctly skip on kernels and platforms where hw
- * context parameter support is not available.
+ * This is a wraps the CONTEXT_SET_PARAM ioctl, which is used to set a context
+ * parameter.
  */
 void gem_context_set_param(int fd, struct local_i915_gem_context_param *p)
 {
-- 
2.9.3

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Track user GTT faulting per-vma

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Track user GTT faulting per-vma
URL   : https://patchwork.freedesktop.org/series/26290/
State : success

== Summary ==

Series 26290v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/26290/revisions/1/mbox/

Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:440s
fi-bdw-gvtdvmtotal:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  
time:424s
fi-bsw-n3050 total:279  pass:242  dwarn:1   dfail:0   fail:0   skip:36  
time:529s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:503s
fi-byt-j1900 total:279  pass:253  dwarn:2   dfail:0   fail:0   skip:24  
time:492s
fi-byt-n2820 total:279  pass:249  dwarn:2   dfail:0   fail:0   skip:28  
time:476s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:589s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:434s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:410s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:425s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:505s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:473s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:462s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:572s
fi-kbl-r total:279  pass:260  dwarn:1   dfail:0   fail:0   skip:18  
time:584s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:453s
fi-skl-6700hqtotal:279  pass:223  dwarn:1   dfail:0   fail:30  skip:24  
time:343s
fi-skl-6700k total:279  pass:257  dwarn:4   dfail:0   fail:0   skip:18  
time:469s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:475s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:432s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:547s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:399s

1789a02e41b11133dd23578edbd0b47ccf40 drm-tip: 2017y-06m-23d-12h-42m-45s UTC 
integration manifest
f450a36 drm/i915: Try a minimal attempt to insert the whole object for 
relocations
601a21d drm/i915: Only revoke the partial vma when releasing a fence register
5403633 drm/i915: Track user GTT faulting per-vma

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5035/
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Fix mutex imbalance for igt_render_engine_reset_fallback

[Patchwork]

== Series Details ==

Series: drm/i915/selftests: Fix mutex imbalance for 
igt_render_engine_reset_fallback
URL   : https://patchwork.freedesktop.org/series/26288/
State : success

== Summary ==

Series 26288v1 drm/i915/selftests: Fix mutex imbalance for 
igt_render_engine_reset_fallback
https://patchwork.freedesktop.org/api/1.0/series/26288/revisions/1/mbox/

Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:454s
fi-bdw-gvtdvmtotal:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  
time:434s
fi-bsw-n3050 total:279  pass:242  dwarn:1   dfail:0   fail:0   skip:36  
time:532s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:515s
fi-byt-j1900 total:279  pass:253  dwarn:2   dfail:0   fail:0   skip:24  
time:493s
fi-byt-n2820 total:279  pass:249  dwarn:2   dfail:0   fail:0   skip:28  
time:485s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:589s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:433s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:419s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:419s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:505s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:475s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:463s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:570s
fi-kbl-r total:279  pass:260  dwarn:1   dfail:0   fail:0   skip:18  
time:581s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:455s
fi-skl-6700hqtotal:279  pass:223  dwarn:1   dfail:0   fail:30  skip:24  
time:346s
fi-skl-6700k total:279  pass:257  dwarn:4   dfail:0   fail:0   skip:18  
time:468s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:474s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:434s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:538s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:402s

1789a02e41b11133dd23578edbd0b47ccf40 drm-tip: 2017y-06m-23d-12h-42m-45s UTC 
integration manifest
e19b54c drm/i915/selftests: Fix mutex imbalance for 
igt_render_engine_reset_fallback

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5034/
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[Intel-gfx] [PATCH] drm/fb-helper: Support deferred setup

[Daniel Vetter]

From: Thierry Reding 

FB helper code falls back to a 1024x768 mode if no outputs are connected
or don't report back any modes upon initialization. This can be annoying
because outputs that are added to FB helper later on can't be used with
FB helper if they don't support a matching mode.

The fallback is in place because VGA connectors can happen to report an
unknown connection status even when they are in fact connected.

Some drivers have custom solutions in place to defer FB helper setup
until at least one output is connected. But the logic behind these
solutions is always the same and there is nothing driver-specific about
it, so a better alterative is to fix the FB helper core and add support
for all drivers automatically.

This patch adds support for deferred FB helper setup. It checks all the
connectors for their connection status, and if all of them report to be
disconnected marks the FB helper as needing deferred setup. Whet setup
is deferred, the FB helper core will automatically retry setup after a
hotplug event, and it will keep trying until it succeeds.

v2: Rebase onto my entirely reworked fbdev helper locking. One big
difference is that this version again drops the fbdev lock
(which is now fb_helper->lock, but before this patch series it was
mode_config->mutex), because register_framebuffer must be able to
recurse back into fbdev helper code for the initial screen setup.

v3: __drm_fb_helper_initial_config must hold fb_helper->lock upon
return, I've fumbled that in the deferred setup case (Liviu).

Cc: Liviu Dudau 
Cc: John Stultz 
Cc: Thierry Reding  (v1)
Tested-by: John Stultz 
Signed-off-by: Thierry Reding  (v1)
Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_fb_helper.c | 110 ++--
 include/drm/drm_fb_helper.h |  23 +
 2 files changed, 106 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index e3d033df068f..834c7e7d7efc 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -521,6 +521,9 @@ int drm_fb_helper_restore_fbdev_mode_unlocked(struct 
drm_fb_helper *fb_helper)
if (!drm_fbdev_emulation)
return -ENODEV;
 
+   if (READ_ONCE(fb_helper->deferred_setup))
+   return 0;
+
mutex_lock(_helper->lock);
ret = restore_fbdev_mode(fb_helper);
 
@@ -1693,6 +1696,23 @@ int drm_fb_helper_pan_display(struct fb_var_screeninfo 
*var,
 }
 EXPORT_SYMBOL(drm_fb_helper_pan_display);
 
+static bool drm_fb_helper_maybe_connected(struct drm_fb_helper *helper)
+{
+   bool connected = false;
+   unsigned int i;
+
+   for (i = 0; i < helper->connector_count; i++) {
+   struct drm_fb_helper_connector *fb = helper->connector_info[i];
+
+   if (fb->connector->status != connector_status_disconnected) {
+   connected = true;
+   break;
+   }
+   }
+
+   return connected;
+}
+
 /*
  * Allocates the backing storage and sets up the fbdev info structure through
  * the ->fb_probe callback and then registers the fbdev and sets up the panic
@@ -2352,8 +2372,6 @@ static void drm_setup_crtcs(struct drm_fb_helper 
*fb_helper,
int i;
 
DRM_DEBUG_KMS("\n");
-   if (drm_fb_helper_probe_connector_modes(fb_helper, width, height) == 0)
-   DRM_DEBUG_KMS("No connectors reported connected with modes\n");
 
/* prevent concurrent modification of connector_count by hotplug */
lockdep_assert_held(_helper->lock);
@@ -2431,6 +2449,60 @@ static void drm_setup_crtcs(struct drm_fb_helper 
*fb_helper,
kfree(enabled);
 }
 
+/* Note: Drops fb_helper->lock */
+static int __drm_fb_helper_initial_config(struct drm_fb_helper *fb_helper,
+ int bpp_sel)
+{
+   struct drm_device *dev = fb_helper->dev;
+   struct fb_info *info;
+   unsigned int width, height;
+   int ret;
+
+   width = dev->mode_config.max_width;
+   height = dev->mode_config.max_height;
+
+   if (drm_fb_helper_probe_connector_modes(fb_helper, width, height) == 0)
+   DRM_DEBUG_KMS("No connectors reported connected with modes\n");
+
+   /*
+* If everything's disconnected, there's no use in attempting to set
+* up fbdev.
+*/
+   if (!drm_fb_helper_maybe_connected(fb_helper)) {
+   DRM_INFO("No outputs connected, deferring setup\n");
+   fb_helper->preferred_bpp = bpp_sel;
+   fb_helper->deferred_setup = true;
+   return 0;
+   }
+
+   drm_setup_crtcs(fb_helper, width, height);
+   ret = drm_fb_helper_single_fb_probe(fb_helper, bpp_sel);
+   if (ret) {
+   mutex_unlock(_helper->lock);
+   

[Intel-gfx] [PATCH 3/3] drm/i915: Try a minimal attempt to insert the whole object for relocations

[Chris Wilson]

As we have a lightweight fallback to insert a single page into the
aperture, try to avoid any heavier evictions when attempting to insert
the entire object.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index ec33b358fba9..210b683bb8f4 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1051,7 +1051,9 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
return ERR_PTR(err);
 
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
-  PIN_MAPPABLE | PIN_NONBLOCK);
+  PIN_MAPPABLE |
+  PIN_NONBLOCK |
+  PIN_NONFAULT);
if (IS_ERR(vma)) {
memset(>node, 0, sizeof(cache->node));
err = drm_mm_insert_node_in_range
-- 
2.13.1

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[Intel-gfx] [PATCH 2/3] drm/i915: Only revoke the partial vma when releasing a fence register

[Chris Wilson]

As we may be using a partial vma for fence allocation, rather then
revoke the mmap of all vma on the object only revoke the overlapping
mmap for this fence.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem_fence_reg.c |  4 ++--
 drivers/gpu/drm/i915/i915_vma.c   | 25 +++--
 drivers/gpu/drm/i915/i915_vma.h   |  1 +
 3 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c 
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 52d5696f9e49..c5cd4dcc54ba 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -240,7 +240,7 @@ static int fence_update(struct drm_i915_fence_reg *fence,
/* Ensure that all userspace CPU access is completed before
 * stealing the fence.
 */
-   i915_gem_release_mmap(fence->vma->obj);
+   i915_vma_revoke_mmap(fence->vma);
 
fence->vma->fence = NULL;
fence->vma = NULL;
@@ -379,7 +379,7 @@ void i915_gem_revoke_fences(struct drm_i915_private 
*dev_priv)
struct drm_i915_fence_reg *fence = _priv->fence_regs[i];
 
if (fence->vma)
-   i915_gem_release_mmap(fence->vma->obj);
+   i915_vma_revoke_mmap(fence->vma);
}
 }
 
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index fd671d493ca6..c4817ad7c965 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -642,6 +642,28 @@ static void __i915_vma_iounmap(struct i915_vma *vma)
vma->iomap = NULL;
 }
 
+void i915_vma_revoke_mmap(struct i915_vma *vma)
+{
+   struct drm_vma_offset_node *node = >obj->base.vma_node;
+
+   lockdep_assert_held(>vm->i915->drm.struct_mutex);
+
+   if (!i915_vma_has_userfault(vma))
+   return;
+
+   GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
+   GEM_BUG_ON(list_empty(>obj->userfault_link));
+
+   unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping,
+   drm_vma_node_offset_addr(node) + 
vma->ggtt_view.partial.offset,
+   vma->size,
+   1);
+   vma->flags &= ~I915_VMA_USERFAULT;
+
+   if (vma->ggtt_view.type == I915_GGTT_VIEW_NORMAL)
+   list_del_init(>obj->userfault_link);
+}
+
 int i915_vma_unbind(struct i915_vma *vma)
 {
struct drm_i915_gem_object *obj = vma->obj;
@@ -705,8 +727,7 @@ int i915_vma_unbind(struct i915_vma *vma)
return ret;
 
/* Force a pagefault for domain tracking on next user access */
-   if (i915_vma_has_userfault(vma))
-   i915_gem_release_mmap(obj);
+   i915_vma_revoke_mmap(vma);
 
__i915_vma_iounmap(vma);
vma->flags &= ~I915_VMA_CAN_FENCE;
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 78afbac2bca8..218f9d48e7c6 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -247,6 +247,7 @@ bool i915_gem_valid_gtt_space(struct i915_vma *vma, 
unsigned long cache_level);
 bool i915_vma_misplaced(const struct i915_vma *vma,
u64 size, u64 alignment, u64 flags);
 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma);
+void i915_vma_revoke_mmap(struct i915_vma *vma);
 int __must_check i915_vma_unbind(struct i915_vma *vma);
 void i915_vma_unlink_ctx(struct i915_vma *vma);
 void i915_vma_close(struct i915_vma *vma);
-- 
2.13.1

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[Intel-gfx] [PATCH 1/3] drm/i915: Track user GTT faulting per-vma

[Chris Wilson]

We don't wish to refault the entire object (other vma) when unbinding
one partial vma. To do this track which vma have been faulted into the
user's address space.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem.c   | 31 ++-
 drivers/gpu/drm/i915/i915_gem_evict.c |  2 +-
 drivers/gpu/drm/i915/i915_gem_fence_reg.c |  2 +-
 drivers/gpu/drm/i915/i915_vma.c   |  3 ++-
 drivers/gpu/drm/i915/i915_vma.h   |  6 ++
 5 files changed, 32 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 36d838677982..cbac1b0ea0ae 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1972,6 +1972,8 @@ int i915_gem_fault(struct vm_fault *vmf)
   (ggtt->mappable_base + vma->node.start) >> 
PAGE_SHIFT,
   min_t(u64, vma->size, area->vm_end - 
area->vm_start),
   >mappable);
+   if (ret == 0)
+   vma->flags |= I915_VMA_USERFAULT;
 
 err_unpin:
__i915_vma_unpin(vma);
@@ -2024,6 +2026,22 @@ int i915_gem_fault(struct vm_fault *vmf)
return ret;
 }
 
+static void __i915_gem_object_release_mmap(struct drm_i915_gem_object *obj)
+{
+   struct i915_vma *vma;
+
+   list_del_init(>userfault_link);
+   drm_vma_node_unmap(>base.vma_node,
+  obj->base.dev->anon_inode->i_mapping);
+
+   list_for_each_entry(vma, >vma_list, obj_link) {
+   if (!i915_vma_is_ggtt(vma))
+   break;
+
+   vma->flags &= ~I915_VMA_USERFAULT;
+   }
+}
+
 /**
  * i915_gem_release_mmap - remove physical page mappings
  * @obj: obj in question
@@ -2057,9 +2075,7 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj)
if (list_empty(>userfault_link))
goto out;
 
-   list_del_init(>userfault_link);
-   drm_vma_node_unmap(>base.vma_node,
-  obj->base.dev->anon_inode->i_mapping);
+   __i915_gem_object_release_mmap(obj);
 
/* Ensure that the CPU's PTE are revoked and there are not outstanding
 * memory transactions from userspace before we return. The TLB
@@ -2087,11 +2103,8 @@ void i915_gem_runtime_suspend(struct drm_i915_private 
*dev_priv)
 */
 
list_for_each_entry_safe(obj, on,
-_priv->mm.userfault_list, userfault_link) {
-   list_del_init(>userfault_link);
-   drm_vma_node_unmap(>base.vma_node,
-  obj->base.dev->anon_inode->i_mapping);
-   }
+_priv->mm.userfault_list, userfault_link)
+   __i915_gem_object_release_mmap(obj);
 
/* The fence will be lost when the device powers down. If any were
 * in use by hardware (i.e. they are pinned), we should not be powering
@@ -2114,7 +2127,7 @@ void i915_gem_runtime_suspend(struct drm_i915_private 
*dev_priv)
if (!reg->vma)
continue;
 
-   GEM_BUG_ON(!list_empty(>vma->obj->userfault_link));
+   GEM_BUG_ON(i915_vma_has_userfault(reg->vma));
reg->dirty = true;
}
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c 
b/drivers/gpu/drm/i915/i915_gem_evict.c
index a193f1b36c67..f4ea181d46fb 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -82,7 +82,7 @@ mark_free(struct drm_mm_scan *scan,
if (i915_vma_is_pinned(vma))
return false;
 
-   if (flags & PIN_NONFAULT && !list_empty(>obj->userfault_link))
+   if (flags & PIN_NONFAULT && i915_vma_has_userfault(vma))
return false;
 
list_add(>evict_link, unwind);
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c 
b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
index 5fe2cd8c8f28..52d5696f9e49 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c
@@ -405,7 +405,7 @@ void i915_gem_restore_fences(struct drm_i915_private 
*dev_priv)
 */
if (vma && !i915_gem_object_is_tiled(vma->obj)) {
GEM_BUG_ON(!reg->dirty);
-   GEM_BUG_ON(!list_empty(>obj->userfault_link));
+   GEM_BUG_ON(i915_vma_has_userfault(vma));
 
list_move(>link, _priv->mm.fence_list);
vma->fence = NULL;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 958be0a95960..fd671d493ca6 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -705,7 +705,8 @@ int i915_vma_unbind(struct i915_vma *vma)
return ret;
 
/* Force a pagefault for domain tracking on next user access */
-   i915_gem_release_mmap(obj);
+   

[Intel-gfx] [PATCH i-g-t] lib/ioctl_wrappers: Fix function descriptions

[Radoslaw Szwichtenberg]

Function description incorrectly stated that gem_context_get_param
and gem_context_set_param were freeing hw context.

Signed-off-by: Radoslaw Szwichtenberg 
---
 lib/ioctl_wrappers.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 0816a7b..a78ff47 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -977,8 +977,8 @@ int __gem_context_get_param(int fd, struct 
local_i915_gem_context_param *p)
  * @fd: open i915 drm file descriptor
  * @p: i915 hw context parameter
  *
- * This is a wraps the CONTEXT_GET_PARAM ioctl, which is used to free a 
hardware
- * context. Not that similarly to gem_set_caching() this wrapper calls
+ * This is a wraps the CONTEXT_GET_PARAM ioctl, which is used to get a context
+ * parameter. Not that similarly to gem_set_caching() this wrapper calls
  * igt_require() internally to correctly skip on kernels and platforms where hw
  * context parameter support is not available.
  */
@@ -1003,8 +1003,8 @@ int __gem_context_set_param(int fd, struct 
local_i915_gem_context_param *p)
  * @fd: open i915 drm file descriptor
  * @p: i915 hw context parameter
  *
- * This is a wraps the CONTEXT_SET_PARAM ioctl, which is used to free a 
hardware
- * context. Not that similarly to gem_set_caching() this wrapper calls
+ * This is a wraps the CONTEXT_SET_PARAM ioctl, which is used to set a context
+ * parameter. Not that similarly to gem_set_caching() this wrapper calls
  * igt_require() internally to correctly skip on kernels and platforms where hw
  * context parameter support is not available.
  */
-- 
2.9.3

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[Intel-gfx] [PATCH] drm/i915/selftests: Fix mutex imbalance for igt_render_engine_reset_fallback

[Chris Wilson]

Smatch spots:

drivers/gpu/drm/i915/selftests/intel_hangcheck.c:669 
igt_render_engine_reset_fallback() error: double unlock 
'mutex:>drm.struct_mutex'

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 21 ++---
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c 
b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index af475189bd52..7096c3911cd3 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -597,12 +597,12 @@ static int igt_render_engine_reset_fallback(void *arg)
 
err = hang_init(, i915);
if (err)
-   goto unlock;
+   goto err_unlock;
 
rq = hang_create_request(, engine, i915->kernel_context);
if (IS_ERR(rq)) {
err = PTR_ERR(rq);
-   goto fini;
+   goto err_fini;
}
 
i915_gem_request_get(rq);
@@ -614,7 +614,7 @@ static int igt_render_engine_reset_fallback(void *arg)
if (!wait_for_hang(, rq)) {
pr_err("Failed to start request %x\n", rq->fence.seqno);
err = -EIO;
-   goto out_rq;
+   goto err_request;
}
 
reset_engine_count = i915_reset_engine_count(>gpu_error, engine);
@@ -646,13 +646,14 @@ static int igt_render_engine_reset_fallback(void *arg)
 */
if (i915_terminally_wedged(>gpu_error)) {
set_bit(I915_RESET_BACKOFF, >gpu_error.flags);
-   mutex_lock(>drm.struct_mutex);
rq->fence.error = 0;
 
+   mutex_lock(>drm.struct_mutex);
set_bit(I915_RESET_HANDOFF, >gpu_error.flags);
i915_reset(i915);
GEM_BUG_ON(test_bit(I915_RESET_HANDOFF,
>gpu_error.flags));
+   mutex_unlock(>drm.struct_mutex);
 
if (i915_reset_count(>gpu_error) == reset_count) {
pr_err("No full GPU reset recorded!\n");
@@ -663,10 +664,8 @@ static int igt_render_engine_reset_fallback(void *arg)
 
 out_rq:
i915_gem_request_put(rq);
-fini:
hang_fini();
-unlock:
-   mutex_unlock(>drm.struct_mutex);
+out_backoff:
clear_bit(I915_RESET_BACKOFF, >gpu_error.flags);
wake_up_all(>gpu_error.reset_queue);
 
@@ -674,6 +673,14 @@ static int igt_render_engine_reset_fallback(void *arg)
return -EIO;
 
return err;
+
+err_request:
+   i915_gem_request_put(rq);
+err_fini:
+   hang_fini();
+err_unlock:
+   mutex_unlock(>drm.struct_mutex);
+   goto out_backoff;
 }
 
 int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
-- 
2.13.1

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Re: [Intel-gfx] [PATCH v3] drm/i915: Break modeset deadlocks on reset

[Chris Wilson]

Quoting Tvrtko Ursulin (2017-06-23 13:35:24)
> 
> On 22/06/2017 11:56, Chris Wilson wrote:
> > Trying to do a modeset from within a reset is fraught with danger. We
> > can fall into a cyclic deadlock where the modeset is waiting on a
> > previous modeset that is waiting on a request, and since the GPU hung
> > that request completion is waiting on the reset. As modesetting doesn't
> > allow its locks to be broken and restarted, or for its *own* reset
> > mechanism to take over the display, we have to do something very
> > evil instead. If we detect that we are stuck waiting to prepare the
> > display reset (by using a very simple timeout), resort to cancelling all
> > in-flight requests and throwing the user data into /dev/null, which is
> > marginally better than the driver locking up and keeping that data to
> > itself.
> > 
> > This is not a fix; this is just a workaround that unbreaks machines
> > until we can resolve the deadlock in a way that doesn't lose data!
> > 
> > v2: Move the retirement from set-wegded to the i915_reset() error path,
> > after which we no longer any delayed worker cleanup for
> > i915_handle_error()
> > v3: C abuse for syntactic sugar
> > v4: Cover all waits with the timeout to catch more driver breakage
> > 
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=99093
> > Signed-off-by: Chris Wilson 
> > Cc: Maarten Lankhorst 
> > Cc: Mika Kuoppala 
> > Cc: Tvrtko Ursulin 
> [snip]
> Looks OK - lets see how temporary it will end up being. :)

I've grown to like the idea of having a watchdog here. We critically
depend on reset to ensure forward progress of requests, and this gives
us that extra layer of paranoid protection.
 
> Reviewed-by: Tvrtko Ursulin 

Thanks, the real magic is still to come :)
-Chris
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Re: [Intel-gfx] [PATCH v3] drm/i915: Break modeset deadlocks on reset

[Tvrtko Ursulin]

On 22/06/2017 11:56, Chris Wilson wrote:

Trying to do a modeset from within a reset is fraught with danger. We
can fall into a cyclic deadlock where the modeset is waiting on a
previous modeset that is waiting on a request, and since the GPU hung
that request completion is waiting on the reset. As modesetting doesn't
allow its locks to be broken and restarted, or for its *own* reset
mechanism to take over the display, we have to do something very
evil instead. If we detect that we are stuck waiting to prepare the
display reset (by using a very simple timeout), resort to cancelling all
in-flight requests and throwing the user data into /dev/null, which is
marginally better than the driver locking up and keeping that data to
itself.

This is not a fix; this is just a workaround that unbreaks machines
until we can resolve the deadlock in a way that doesn't lose data!

v2: Move the retirement from set-wegded to the i915_reset() error path,
after which we no longer any delayed worker cleanup for
i915_handle_error()
v3: C abuse for syntactic sugar
v4: Cover all waits with the timeout to catch more driver breakage

References: https://bugs.freedesktop.org/show_bug.cgi?id=99093
Signed-off-by: Chris Wilson 
Cc: Maarten Lankhorst 
Cc: Mika Kuoppala 
Cc: Tvrtko Ursulin 
---
  drivers/gpu/drm/i915/i915_drv.c |  1 +
  drivers/gpu/drm/i915/i915_gem.c | 18 +++---
  drivers/gpu/drm/i915/i915_irq.c | 79 ++---
  3 files changed, 64 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d1aa10c9cc5d..1df957b986c7 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1914,6 +1914,7 @@ void i915_reset(struct drm_i915_private *dev_priv)
  
  error:

i915_gem_set_wedged(dev_priv);
+   i915_gem_retire_requests(dev_priv);
goto finish;
  }
  
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c

index 7391e2d36a31..8bc9a3f53006 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3046,7 +3046,8 @@ static void engine_set_wedged(struct intel_engine_cs 
*engine)
/* Mark all executing requests as skipped */
spin_lock_irqsave(>timeline->lock, flags);
list_for_each_entry(request, >timeline->requests, link)
-   dma_fence_set_error(>fence, -EIO);
+   if (!i915_gem_request_completed(request))
+   dma_fence_set_error(>fence, -EIO);
spin_unlock_irqrestore(>timeline->lock, flags);
  
  	/* Mark all pending requests as complete so that any concurrent

@@ -3092,6 +3093,7 @@ static int __i915_gem_set_wedged_BKL(void *data)
struct intel_engine_cs *engine;
enum intel_engine_id id;
  
+	set_bit(I915_WEDGED, >gpu_error.flags);

for_each_engine(engine, i915, id)
engine_set_wedged(engine);
  
@@ -3100,20 +3102,7 @@ static int __i915_gem_set_wedged_BKL(void *data)
  
  void i915_gem_set_wedged(struct drm_i915_private *dev_priv)

  {
-   lockdep_assert_held(_priv->drm.struct_mutex);
-   set_bit(I915_WEDGED, _priv->gpu_error.flags);
-
-   /* Retire completed requests first so the list of inflight/incomplete
-* requests is accurate and we don't try and mark successful requests
-* as in error during __i915_gem_set_wedged_BKL().
-*/
-   i915_gem_retire_requests(dev_priv);
-
stop_machine(__i915_gem_set_wedged_BKL, dev_priv, NULL);
-
-   i915_gem_contexts_lost(dev_priv);
-
-   mod_delayed_work(dev_priv->wq, _priv->gt.idle_work, 0);
  }
  
  bool i915_gem_unset_wedged(struct drm_i915_private *i915)

@@ -3168,6 +3157,7 @@ bool i915_gem_unset_wedged(struct drm_i915_private *i915)
 * context and do not require stop_machine().
 */
intel_engines_reset_default_submission(i915);
+   i915_gem_contexts_lost(i915);
  
  	smp_mb__before_atomic(); /* complete takeover before enabling execbuf */

clear_bit(I915_WEDGED, >gpu_error.flags);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 61047ee2eede..5fa2a1cf71b8 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2587,6 +2587,46 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
return ret;
  }
  
+struct wedge_me {

+   struct delayed_work work;
+   struct drm_i915_private *i915;
+   const char *name;
+};
+
+static void wedge_me(struct work_struct *work)
+{
+   struct wedge_me *w = container_of(work, typeof(*w), work.work);
+
+   dev_err(w->i915->drm.dev,
+   "%s timed out, cancelling all in-flight rendering.\n",
+   w->name);
+   i915_gem_set_wedged(w->i915);
+}
+
+static void __init_wedge(struct wedge_me *w,
+struct drm_i915_private 

Re: [Intel-gfx] [PATCH 00/12] fbdev helper locking rework and deferred setup

[Liviu Dudau]

On Fri, Jun 23, 2017 at 09:38:49AM +0200, Daniel Vetter wrote:
> On Thu, Jun 22, 2017 at 4:54 PM, Liviu Dudau  wrote:
> > On Wed, Jun 21, 2017 at 08:28:03PM +0200, Daniel Vetter wrote:
> >> Hi all,
> >>
> >> This is Thierry's deferred fbdev setup series, with the locking rework 
> >> almost
> >> entirely redone. The much wider scope is to get rid of drm_modeset_lock_all
> >> calls for atomic drivers and remove users of the fairly nasty
> >> mode_config->acquire_ctx hack, which breaks when doing multiple atomic 
> >> commits.
> >>
> >> Testing very much appreciated, especially from people who care 
> >> about the
> >> various fbdev emulation things and the deferred setup stuff.
> >
> > Tested on my Juno dev board on a bit of a convoluted setup: the dev board 
> > has
> > built into the SoC 2x HDLCD instances and I also have an FPGA daughter board
> > with Mali DP 650 running again on a 2x configuration. On boot I'm getting 
> > this
> > warning:
> >
> > juno-r0-ld login: [  241.986785] INFO: task kworker/3:1:80 blocked for more 
> > than 120 seconds.
> > [  241.993652]   Not tainted 4.12.0-rc5-01275-g1e2237a19156 #2
> > [  241.999689] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables 
> > this message.
> > [  242.007660] kworker/3:1 D080  2 0x
> > [  242.013340] Workqueue: events output_poll_execute [drm_kms_helper]
> > [  242.019637] Call trace:
> > [  242.022132] [] __switch_to+0x98/0xb0
> > [  242.027373] [] __schedule+0x19c/0x5e8
> > [  242.032699] [] schedule+0x38/0xa0
> > [  242.037672] [] schedule_preempt_disabled+0x20/0x38
> > [  242.044144] [] __mutex_lock.isra.0+0x140/0x530
> > [  242.050262] [] __mutex_lock_slowpath+0x10/0x18
> > [  242.056379] [] mutex_lock+0x30/0x38
> > [  242.061597] [] 
> > drm_fb_helper_hotplug_event.part.22+0x20/0x100 [drm_kms_helper]
> > [  242.070611] [] drm_fb_helper_hotplug_event+0x24/0x38 
> > [drm_kms_helper]
> > [  242.078828] [] drm_fbdev_cma_hotplug_event+0x10/0x20 
> > [drm_kms_helper]
> > [  242.086984] [] hdlcd_fb_output_poll_changed+0x14/0x20 
> > [hdlcd]
> > [  242.094495] [] drm_kms_helper_hotplug_event+0x28/0x38 
> > [drm_kms_helper]
> > [  242.102801] [] output_poll_execute+0x1a0/0x1f0 
> > [drm_kms_helper]
> > [  242.110424] [] process_one_work+0x1d4/0x330
> > [  242.116280] [] worker_thread+0x48/0x468
> > [  242.121781] [] kthread+0x12c/0x130
> > [  242.126839] [] ret_from_fork+0x10/0x50
> > [  242.132252] INFO: task kworker/5:1:82 blocked for more than 120 seconds.
> > [  242.139074]   Not tainted 4.12.0-rc5-01275-g1e2237a19156 #2
> > [  242.145099] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables 
> > this message.
> > [  242.153064] kworker/5:1 D082  2 0x
> > [  242.158724] Workqueue: events output_poll_execute [drm_kms_helper]
> > [  242.165019] Call trace:
> > [  242.167519] [] __switch_to+0x98/0xb0
> > [  242.172755] [] __schedule+0x19c/0x5e8
> > [  242.178079] [] schedule+0x38/0xa0
> > [  242.183051] [] schedule_preempt_disabled+0x20/0x38
> > [  242.189520] [] __mutex_lock.isra.0+0x140/0x530
> > [  242.195639] [] __mutex_lock_slowpath+0x10/0x18
> > [  242.201756] [] mutex_lock+0x30/0x38
> > [  242.206972] [] 
> > drm_fb_helper_hotplug_event.part.22+0x20/0x100 [drm_kms_helper]
> > [  242.215984] [] drm_fb_helper_hotplug_event+0x24/0x38 
> > [drm_kms_helper]
> > [  242.224201] [] drm_fbdev_cma_hotplug_event+0x10/0x20 
> > [drm_kms_helper]
> > [  242.232367] [] malidp_output_poll_changed+0x14/0x20 
> > [mali_dp]
> > [  242.239880] [] drm_kms_helper_hotplug_event+0x28/0x38 
> > [drm_kms_helper]
> > [  242.248188] [] output_poll_execute+0x1a0/0x1f0 
> > [drm_kms_helper]
> > [  242.255808] [] process_one_work+0x1d4/0x330
> > [  242.261664] [] worker_thread+0x48/0x468
> > [  242.267196] [] kthread+0x12c/0x130
> > [  242.272312] [] ret_from_fork+0x10/0x50
> >
> > Each hardware type has only one instance of each driver being connected to 
> > an
> > output, HDLCD is connected to an HDMI monitor that is not "active" (i.e.
> > input is switched to DP connection), while the Mali DP instance is 
> > connected to
> > a monitor.
> >
> > Suggestions on where to look next are welcome.
> 
> I'm betting I've fumbled an unlock path somewhere and now your stuck
> trying to get a lock you can't get. Can you pls recompile with lockdep
> enabled and repro? That will directly tell us where and what went
> wrong.

This is what I've got with lockdep debugging enabled. Not sure it is the same
thing as the previous WARN, the stack trace doesn't match the one above (but I 
still
get that one after 120s).

[   16.536405] [drm] found ARM HDLCD version r0p0   

  
[   16.670859] tda998x 0-0071: found TDA19988   

  

Re: [Intel-gfx] [kbuild-all] [RFC PATCH drm-intel] drm: arcpgu: arc_pgu_crtc_mode_valid() can be static

[Fengguang Wu]

On Fri, Jun 23, 2017 at 01:08:17PM +0200, Daniel Vetter wrote:

On Fri, Jun 23, 2017 at 06:51:05PM +0800, Fengguang Wu wrote:

Hi Daniel,

On Fri, Jun 23, 2017 at 12:30:17PM +0200, Daniel Vetter wrote:
> On Fri, Jun 23, 2017 at 05:54:18PM +0800, kbuild test robot wrote:
> >
> > Signed-off-by: Fengguang Wu 
>
> Oops, missed that, applied.
>
> Btw, for regression fixes like that, could you perhaps auto-generate the
> Fixes: line per the kernel process? Makes it easier for me to know where
> to apply something :-)

That's a good idea for commits in mainline, where the Fixes tag will
look like

   Fixes: e21d2170f366 ("video: remove unnecessary platform_set_drvdata()")

However typically 0day auto-generated patches are pre-mainline ones,
in which case only patch subject is available. How are we going to
deal with this?


Well many trees you're testing are stable and will never rebase (at least
all the drm-intel|misc.git ones are supposed to be stable), hence the sha1
is stable. I guess other maintainers could just remove the line if they
prefer to squash it in?

Also makes it easier to know where to squash it into :-)


Fair enough. I'll add the Fixes line. :)

Thanks,
Fengguang


> > ---
> >  arcpgu_crtc.c |4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c 
b/drivers/gpu/drm/arc/arcpgu_crtc.c
> > index 99fbdae..611af74 100644
> > --- a/drivers/gpu/drm/arc/arcpgu_crtc.c
> > +++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
> > @@ -64,8 +64,8 @@ static const struct drm_crtc_funcs arc_pgu_crtc_funcs = {
> >   .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
> >  };
> >
> > -enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
> > -  const struct drm_display_mode 
*mode)
> > +static enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
> > + const struct 
drm_display_mode *mode)
> >  {
> >   struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
> >   long rate, clk_rate = mode->clock * 1000;
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
> ___
> kbuild-all mailing list
> kbuild-...@lists.01.org
> https://lists.01.org/mailman/listinfo/kbuild-all


--
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [RFC 2/2] drm/i915: Engine capabilities uAPI

[Chris Wilson]

Quoting Tvrtko Ursulin (2017-06-23 12:58:19)
> 
> On 21/06/2017 10:45, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2017-06-21 10:13:57)
> >> From: Tvrtko Ursulin 
> >>
> >> This is a lighter-weight alternative to the previously posted
> >> RFC titled "drm/i915: Engine discovery uAPI" which still allows
> >> some engine configuration probing without depending on PCI ids.
> >>
> >> Signed-off-by: Tvrtko Ursulin 
> >> Cc: Ben Widawsky 
> >> Cc: Chris Wilson 
> >> Cc: Daniel Vetter 
> >> Cc: Joonas Lahtinen 
> >> Cc: Jon Bloomfield 
> >> Cc: "Rogozhkin, Dmitry V" 
> >> Cc: Oscar Mateo 
> >> Cc: "Gong, Zhipeng" 
> >> Cc: intel-vaapi-me...@lists.01.org
> >> --
> >> Floating as an alternative to the heavier engine discovery API
> >> sent previously which did not manage to gain much interest from
> >> userspace clients.
> >>
> >> With this one enumeration and feature discovery would be done by
> >> sending null batches to all engine instances. Downside is less
> >> extensibility if we are using a fixed and smaller number of eb
> >> flags.
> > 
> > But we lose out on features? Just after you convinced me that features
> > was what we wanted! :-p
> 
> We lose the features but get the capabilities :), if that was the joke!
> 
> Or a concern that we might really want more data about stuff when 
> probing? We could still add that later if we wanted since it is really a 
> different thing altogether.
> 
> This caps thing is actually 2nd part from another experiment I had, 
> where the first part allowed userspace to tell us they do not care about 
> the state, so we would be able to pick a VCS engine per-batch buffer, 
> and not only statically per context.
> 
> Maybe I add that one to this series as well and then it all becomes even 
> more useful?

My minimum requirement for testing execbuf is to be able to explicitly
select an engine. So long as you do not exclude that possibility, I
don't mind. I was also happy if that requires us to query the set of engines
to figure out the mapping for the new interface.
-Chris
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Re: [Intel-gfx] [RFC 2/2] drm/i915: Engine capabilities uAPI

[Tvrtko Ursulin]

On 21/06/2017 10:45, Chris Wilson wrote:

Quoting Tvrtko Ursulin (2017-06-21 10:13:57)

From: Tvrtko Ursulin 

This is a lighter-weight alternative to the previously posted
RFC titled "drm/i915: Engine discovery uAPI" which still allows
some engine configuration probing without depending on PCI ids.

Signed-off-by: Tvrtko Ursulin 
Cc: Ben Widawsky 
Cc: Chris Wilson 
Cc: Daniel Vetter 
Cc: Joonas Lahtinen 
Cc: Jon Bloomfield 
Cc: "Rogozhkin, Dmitry V" 
Cc: Oscar Mateo 
Cc: "Gong, Zhipeng" 
Cc: intel-vaapi-me...@lists.01.org
--
Floating as an alternative to the heavier engine discovery API
sent previously which did not manage to gain much interest from
userspace clients.

With this one enumeration and feature discovery would be done by
sending null batches to all engine instances. Downside is less
extensibility if we are using a fixed and smaller number of eb
flags.


But we lose out on features? Just after you convinced me that features
was what we wanted! :-p


We lose the features but get the capabilities :), if that was the joke!

Or a concern that we might really want more data about stuff when 
probing? We could still add that later if we wanted since it is really a 
different thing altogether.


This caps thing is actually 2nd part from another experiment I had, 
where the first part allowed userspace to tell us they do not care about 
the state, so we would be able to pick a VCS engine per-batch buffer, 
and not only statically per context.


Maybe I add that one to this series as well and then it all becomes even 
more useful?


Regards,

Tvrtko
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[Intel-gfx] [RFC i-g-t 3/4] gem_sync: Add all and store_all subtests

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Extended versions of the already existing short tests.

Signed-off-by: Tvrtko Ursulin 
---
 tests/gem_sync.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/tests/gem_sync.c b/tests/gem_sync.c
index 706462bc0ac7..f9a2ebdfbe21 100644
--- a/tests/gem_sync.c
+++ b/tests/gem_sync.c
@@ -757,6 +757,11 @@ igt_main
sync_all(fd, 1, 5);
igt_subtest("basic-store-all")
store_all(fd, 1, 5);
+
+   igt_subtest("all")
+   sync_all(fd, 1, 150);
+   igt_subtest("store-all")
+   store_all(fd, 1, 150);
igt_subtest("forked-all")
sync_all(fd, ncpus, 150);
igt_subtest("forked-store-all")
-- 
2.9.4

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[Intel-gfx] [RFC i-g-t 2/4] gem_exec_basic: Exercise the default engine selection

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Exercise the ABI with a basic test now that we have removed the
defaul engine alias from the engine list.

Signed-off-by: Tvrtko Ursulin 
---
 tests/gem_exec_basic.c| 9 +
 tests/intel-ci/fast-feedback.testlist | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/tests/gem_exec_basic.c b/tests/gem_exec_basic.c
index 2f057ef02f22..2cb6a90a01f9 100644
--- a/tests/gem_exec_basic.c
+++ b/tests/gem_exec_basic.c
@@ -111,6 +111,15 @@ igt_main
igt_fork_hang_detector(fd);
}
 
+   igt_subtest("basic-default")
+   noop(fd, I915_EXEC_DEFAULT);
+
+   igt_subtest("readonly-default")
+   readonly(fd, I915_EXEC_DEFAULT);
+
+   igt_subtest("gtt-default")
+   gtt(fd, I915_EXEC_DEFAULT);
+
for (e = intel_execution_engines; e->name; e++) {
igt_subtest_f("basic-%s", e->name)
noop(fd, e->exec_id | e->flags);
diff --git a/tests/intel-ci/fast-feedback.testlist 
b/tests/intel-ci/fast-feedback.testlist
index 7d4f65ec2248..e90e700ec1ed 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -26,18 +26,21 @@ igt@gem_exec_basic@basic-blt
 igt@gem_exec_basic@basic-bsd
 igt@gem_exec_basic@basic-bsd1
 igt@gem_exec_basic@basic-bsd2
+igt@gem_exec_basic@basic-default
 igt@gem_exec_basic@basic-render
 igt@gem_exec_basic@basic-vebox
 igt@gem_exec_basic@gtt-blt
 igt@gem_exec_basic@gtt-bsd
 igt@gem_exec_basic@gtt-bsd1
 igt@gem_exec_basic@gtt-bsd2
+igt@gem_exec_basic@gtt-default
 igt@gem_exec_basic@gtt-render
 igt@gem_exec_basic@gtt-vebox
 igt@gem_exec_basic@readonly-blt
 igt@gem_exec_basic@readonly-bsd
 igt@gem_exec_basic@readonly-bsd1
 igt@gem_exec_basic@readonly-bsd2
+igt@gem_exec_basic@readonly-default
 igt@gem_exec_basic@readonly-render
 igt@gem_exec_basic@readonly-vebox
 igt@gem_exec_create@basic
-- 
2.9.4

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[Intel-gfx] [RFC i-g-t 4/4] extended.testlist: Remove some test-subtest combinations

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

For tests with attempt to hit races and such by running for
relatively long time, it seems that it might be possible to get
by only testing some subtest-engine combinations as long as in
total we still exercise all engines per test.

More precisely, I think that if we view our engines as fast
(!rcs) and a little less fast (others), we group the race
hitting tests in those two camps, we keep the same coverage
by running each subtest against each engine group.

v2: Replace individual engine gem_sync subtests with all
variants. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin 
---
 tests/intel-ci/extended.testlist | 54 +++-
 1 file changed, 4 insertions(+), 50 deletions(-)

diff --git a/tests/intel-ci/extended.testlist b/tests/intel-ci/extended.testlist
index c4daf792dc95..1f7b5baf582f 100644
--- a/tests/intel-ci/extended.testlist
+++ b/tests/intel-ci/extended.testlist
@@ -73,11 +73,7 @@ igt@gem_pwrite@huge-gtt-fbr
 igt@gem_pwrite@huge-gtt-forwards
 igt@gem_pwrite@huge-gtt-random
 igt@gem_ringfill@blt-bomb
-igt@gem_ringfill@bsd-bomb
-igt@gem_ringfill@bsd1-bomb
-igt@gem_ringfill@bsd2-bomb
 igt@gem_ringfill@render-bomb
-igt@gem_ringfill@vebox-bomb
 igt@gem_userptr_blits@stress-mm
 igt@gem_userptr_blits@stress-mm-invalidate-close
 igt@gem_userptr_blits@stress-mm-invalidate-close-overlap
@@ -1658,30 +1654,14 @@ igt@gem_ring_sync_copy@sync-render-blitter-read-write
 igt@gem_ring_sync_copy@sync-render-blitter-write-read
 igt@gem_ring_sync_copy@sync-render-blitter-write-write
 igt@gem_ring_sync_loop
-igt@gem_ringfill@blt
-igt@gem_ringfill@blt-child
 igt@gem_ringfill@blt-interruptible
-igt@gem_ringfill@blt-s3
 igt@gem_ringfill@bsd
-igt@gem_ringfill@bsd-child
-igt@gem_ringfill@bsd-interruptible
 igt@gem_ringfill@bsd-s3
-igt@gem_ringfill@bsd1
-igt@gem_ringfill@bsd1-child
-igt@gem_ringfill@bsd1-interruptible
-igt@gem_ringfill@bsd1-s3
-igt@gem_ringfill@bsd2
-igt@gem_ringfill@bsd2-child
-igt@gem_ringfill@bsd2-interruptible
-igt@gem_ringfill@bsd2-s3
 igt@gem_ringfill@render
 igt@gem_ringfill@render-child
 igt@gem_ringfill@render-interruptible
 igt@gem_ringfill@render-s3
-igt@gem_ringfill@vebox
 igt@gem_ringfill@vebox-child
-igt@gem_ringfill@vebox-interruptible
-igt@gem_ringfill@vebox-s3
 igt@gem_set_tiling_vs_blt@tiled-to-tiled
 igt@gem_set_tiling_vs_blt@tiled-to-untiled
 igt@gem_set_tiling_vs_blt@untiled-to-tiled
@@ -1715,35 +1695,15 @@ igt@gem_storedw_batches_loop@normal
 igt@gem_storedw_batches_loop@secure-dispatch
 igt@gem_storedw_batches_loop@uncached-mapping
 igt@gem_storedw_loop@long-blt
-igt@gem_storedw_loop@long-bsd
-igt@gem_storedw_loop@long-bsd1
-igt@gem_storedw_loop@long-bsd2
 igt@gem_storedw_loop@long-render
 igt@gem_storedw_loop@long-vebox
-igt@gem_storedw_loop@short-blt
 igt@gem_storedw_loop@short-bsd
-igt@gem_storedw_loop@short-bsd1
-igt@gem_storedw_loop@short-bsd2
 igt@gem_storedw_loop@short-render
 igt@gem_storedw_loop@short-vebox
-igt@gem_sync@blt
-igt@gem_sync@bsd
-igt@gem_sync@bsd1
-igt@gem_sync@bsd2
-igt@gem_sync@many-blt
-igt@gem_sync@many-bsd
-igt@gem_sync@many-bsd1
-igt@gem_sync@many-bsd2
-igt@gem_sync@many-render
-igt@gem_sync@many-vebox
-igt@gem_sync@render
-igt@gem_sync@store-blt
-igt@gem_sync@store-bsd
-igt@gem_sync@store-bsd1
-igt@gem_sync@store-bsd2
-igt@gem_sync@store-render
-igt@gem_sync@store-vebox
-igt@gem_sync@vebox
+igt@gem_sync@all
+igt@gem_sync@store-all
+igt@gem_sync@forked-all
+igt@gem_sync@forked-store-all
 igt@gem_threaded_access_tiled
 igt@gem_tiled_blits@interruptible
 igt@gem_tiled_blits@normal
@@ -1790,17 +1750,11 @@ igt@gem_userptr_blits@unsync-unmap-after-close
 igt@gem_userptr_blits@unsync-unmap-cycles
 igt@gem_userptr_blits@usage-restrictions
 igt@gem_wait@busy-blt
-igt@gem_wait@busy-bsd
-igt@gem_wait@busy-bsd1
-igt@gem_wait@busy-bsd2
 igt@gem_wait@busy-render
 igt@gem_wait@busy-vebox
 igt@gem_wait@invalid-buf
 igt@gem_wait@invalid-flags
-igt@gem_wait@wait-blt
 igt@gem_wait@wait-bsd
-igt@gem_wait@wait-bsd1
-igt@gem_wait@wait-bsd2
 igt@gem_wait@wait-render
 igt@gem_wait@wait-vebox
 igt@gem_workarounds@reset
-- 
2.9.4

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[Intel-gfx] [RFC i-g-t 0/4] Redundant test pruning

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Small series which saves test execution time by removing the redundant tests.

Tvrtko Ursulin (4):
  igt: Remove default from the engine list
  gem_exec_basic: Exercise the default engine selection
  gem_sync: Add all and store_all subtests
  extended.testlist: Remove some test-subtest combinations

 lib/igt_gt.c  |  1 -
 tests/gem_exec_basic.c|  9 
 tests/gem_sync.c  |  5 +++
 tests/intel-ci/extended.testlist  | 75 ++-
 tests/intel-ci/fast-feedback.testlist | 83 +--
 5 files changed, 59 insertions(+), 114 deletions(-)

-- 
2.9.4

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[Intel-gfx] [RFC i-g-t 1/4] igt: Remove default from the engine list

[Tvrtko Ursulin]

From: Tvrtko Ursulin 

Default is not an engine but an ABI alias for RCS. Remove it
from the engine list to eliminate redundant subtests and test
passes.

Signed-off-by: Tvrtko Ursulin 
---
 lib/igt_gt.c  |  1 -
 lib/igt_gt.h  |  5 ++
 tests/gem_busy.c  |  4 +-
 tests/gem_cs_tlb.c|  2 +-
 tests/gem_ctx_switch.c|  4 +-
 tests/gem_exec_fence.c| 12 ++---
 tests/gem_exec_flush.c| 10 ++--
 tests/gem_ringfill.c  |  2 +-
 tests/intel-ci/extended.testlist  | 21 -
 tests/intel-ci/fast-feedback.testlist | 86 +--
 tests/kms_busy.c  |  4 +-
 tests/prime_busy.c|  4 +-
 tests/prime_vgem.c| 10 ++--
 13 files changed, 72 insertions(+), 93 deletions(-)

diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index 6f7daa5ef982..05fe2f45e254 100644
--- a/lib/igt_gt.c
+++ b/lib/igt_gt.c
@@ -553,7 +553,6 @@ unsigned intel_detect_and_clear_missed_interrupts(int fd)
 }
 
 const struct intel_execution_engine intel_execution_engines[] = {
-   { "default", NULL, 0, 0 },
{ "render", "rcs0", I915_EXEC_RENDER, 0 },
{ "bsd", "vcs0", I915_EXEC_BSD, 0 },
{ "bsd1", "vcs0", I915_EXEC_BSD, 1<<13 /*I915_EXEC_BSD_RING1*/ },
diff --git a/lib/igt_gt.h b/lib/igt_gt.h
index 2579cbd37be7..d82d352a2d36 100644
--- a/lib/igt_gt.h
+++ b/lib/igt_gt.h
@@ -80,4 +80,9 @@ extern const struct intel_execution_engine {
 
 bool gem_can_store_dword(int fd, unsigned int engine);
 
+static inline bool igt_is_basic(const struct intel_execution_engine *e)
+{
+   return e->exec_id == 1;
+}
+
 #endif /* IGT_GT_H */
diff --git a/tests/gem_busy.c b/tests/gem_busy.c
index 8702dd7efa6f..72cffd218dfd 100644
--- a/tests/gem_busy.c
+++ b/tests/gem_busy.c
@@ -521,7 +521,7 @@ igt_main
for (e = intel_execution_engines; e->name; e++) {
igt_subtest_group {
igt_subtest_f("%sbusy-%s",
- e->exec_id == 0 ? "basic-" : "",
+ igt_is_basic(e) ? "basic-" : "",
  e->name) {
igt_require(gem_has_ring(fd, e->exec_id 
| e->flags));
gem_quiescent_gpu(fd);
@@ -599,7 +599,7 @@ igt_main
 
for (e = intel_execution_engines; e->name; e++) {
igt_subtest_f("%shang-%s",
- e->exec_id == 0 ? "basic-" : "",
+ igt_is_basic(e) ? "basic-" : "",
  e->name) {
igt_require(gem_has_ring(fd, e->exec_id | 
e->flags));
gem_quiescent_gpu(fd);
diff --git a/tests/gem_cs_tlb.c b/tests/gem_cs_tlb.c
index 51e1c4e19930..98f857dad785 100644
--- a/tests/gem_cs_tlb.c
+++ b/tests/gem_cs_tlb.c
@@ -151,7 +151,7 @@ igt_main
}
 
for (e = intel_execution_engines; e->name; e++)
-   igt_subtest_f("%s%s", e->exec_id ? "" : "basic-", e->name)
+   igt_subtest_f("%s%s", !igt_is_basic(e) ? "" : "basic-", e->name)
run_on_ring(fd, e->exec_id | e->flags, e->name);
 
igt_fixture
diff --git a/tests/gem_ctx_switch.c b/tests/gem_ctx_switch.c
index 80ebce5d6707..046e065b33e2 100644
--- a/tests/gem_ctx_switch.c
+++ b/tests/gem_ctx_switch.c
@@ -163,9 +163,9 @@ igt_main
}
 
for (e = intel_execution_engines; e->name; e++) {
-   igt_subtest_f("%s%s", e->exec_id == 0 ? "basic-" : "", e->name)
+   igt_subtest_f("%s%s", igt_is_basic(e) ? "basic-" : "", e->name)
single(fd, light, e, 0, 1, 5);
-   igt_subtest_f("%s%s-heavy", e->exec_id == 0 ? "basic-" : "", 
e->name)
+   igt_subtest_f("%s%s-heavy", igt_is_basic(e) ? "basic-" : "", 
e->name)
single(fd, heavy, e, 0, 1, 5);
igt_subtest_f("%s-interruptible", e->name)
single(fd, light, e, INTERRUPTIBLE, 1, 150);
diff --git a/tests/gem_exec_fence.c b/tests/gem_exec_fence.c
index 5230e693ba16..2baf1f05d74a 100644
--- a/tests/gem_exec_fence.c
+++ b/tests/gem_exec_fence.c
@@ -558,16 +558,16 @@ igt_main
}
 
igt_subtest_f("%sbusy-%s",
-   e->exec_id == 0 ? "basic-" : "",
-   e->name)
+ igt_is_basic(e) ? "basic-" : "",
+ e->name)
test_fence_busy(i915, e->exec_id | 
e->flags, 0);

Re: [Intel-gfx] [RFC i-g-t 1/2] extended.testlist: Remove default and render engine test duplicates

[Chris Wilson]

Quoting Daniel Vetter (2017-06-23 12:14:49)
> On Thu, Jun 22, 2017 at 12:45 PM, Tvrtko Ursulin
>  wrote:
> >
> > On 22/06/2017 10:54, Daniel Vetter wrote:
> >>
> >> On Fri, Jun 16, 2017 at 12:55 PM, Tvrtko Ursulin 
> >> wrote:
> >>>
> >>> From: Tvrtko Ursulin 
> >>>
> >>> Where there is both default and render for the same test,
> >>> remove the former to save some execution time.
> >>
> >>
> >> If they are redundant, why do we even have them? Can we just remove
> >
> >
> > Maybe we can remove the default entry from intel_execution_engines array?
> > And just test that default == render explicitly in a few short tests.
> 
> That has my ack, in case you have the patch ...

No. The ABI does allow for the switch in theory and it is a distinct
enum so it does need testing.

> >> the testcase itself? Accumulating unused tests of questionable use at
> >> best in igt is serious pain, because it means we never can get to a
> >> world where new testcases are auto-added to CI withou some manual
> >> review. And that's the world of pain we live in now and I really want
> >> to get out of it. That means reviewing and removing testcases, not
> >> massaging courated testlists forever, I don't think we have the time
> >> for that among all the other tasks.
> >>
> >>  :-)

It's the curated lists that are the problem, not the tests. The fact
that we don't feel it is worthwhile to continuously test minor
variations to catch weird bugs is our problem.
-Chris
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Re: [Intel-gfx] [PATCH v2] drm/vgem: Pin our pages for dmabuf exports

[Chris Wilson]

Quoting Daniel Vetter (2017-06-23 12:02:53)
> On Thu, Jun 22, 2017 at 02:46:17PM +0100, Chris Wilson wrote:
> > + /* Flush the object from the CPU cache so that importers can rely
> > +  * on coherent indirect access via the exported dma-address.
> > +  */
> >   drm_clflush_pages(pages, n_pages);
> 
> Just spotted this, but at least on x86 dma is supposed to be coherent.
> We're the exception. But then this is all ill-defined with dma_buf, so
> meh.

It's been a running debate on whether these are meant to be WC mapped or
not. dmabuf does have its sync ioctls that do allow us to mix WB for
clients and UC for device, which for us is very important. But there are
a few edge cases like device importing pages from a dmabuf as above.
-Chris
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Re: [Intel-gfx] [RFC i-g-t 1/2] extended.testlist: Remove default and render engine test duplicates

[Daniel Vetter]

On Thu, Jun 22, 2017 at 12:45 PM, Tvrtko Ursulin
 wrote:
>
> On 22/06/2017 10:54, Daniel Vetter wrote:
>>
>> On Fri, Jun 16, 2017 at 12:55 PM, Tvrtko Ursulin 
>> wrote:
>>>
>>> From: Tvrtko Ursulin 
>>>
>>> Where there is both default and render for the same test,
>>> remove the former to save some execution time.
>>
>>
>> If they are redundant, why do we even have them? Can we just remove
>
>
> Maybe we can remove the default entry from intel_execution_engines array?
> And just test that default == render explicitly in a few short tests.

That has my ack, in case you have the patch ...

>> the testcase itself? Accumulating unused tests of questionable use at
>> best in igt is serious pain, because it means we never can get to a
>> world where new testcases are auto-added to CI withou some manual
>> review. And that's the world of pain we live in now and I really want
>> to get out of it. That means reviewing and removing testcases, not
>> massaging courated testlists forever, I don't think we have the time
>> for that among all the other tasks.
>>
>>  :-)
>
>
> I am not a fan of the testlist neither, but thought to avoid letting perfect
> being the enemy of good, and at least do something until the final solution
> crystallizes.

Yeah not going to block this here, just wanted to chime in with what I
think we need to do in the longer-term. I really want CI to run all
igt, and run new igt tests by default, to make sure both tests are
high-quality (no noise), and the kernel doesn't randomly regress
because we didn't run the igts :-/
-Daniel
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Re: [Intel-gfx] [kbuild-all] [RFC PATCH drm-intel] drm: arcpgu: arc_pgu_crtc_mode_valid() can be static

[Daniel Vetter]

On Fri, Jun 23, 2017 at 06:51:05PM +0800, Fengguang Wu wrote:
> Hi Daniel,
> 
> On Fri, Jun 23, 2017 at 12:30:17PM +0200, Daniel Vetter wrote:
> > On Fri, Jun 23, 2017 at 05:54:18PM +0800, kbuild test robot wrote:
> > > 
> > > Signed-off-by: Fengguang Wu 
> > 
> > Oops, missed that, applied.
> > 
> > Btw, for regression fixes like that, could you perhaps auto-generate the
> > Fixes: line per the kernel process? Makes it easier for me to know where
> > to apply something :-)
> 
> That's a good idea for commits in mainline, where the Fixes tag will
> look like
> 
>Fixes: e21d2170f366 ("video: remove unnecessary 
> platform_set_drvdata()")
> 
> However typically 0day auto-generated patches are pre-mainline ones,
> in which case only patch subject is available. How are we going to
> deal with this?

Well many trees you're testing are stable and will never rebase (at least
all the drm-intel|misc.git ones are supposed to be stable), hence the sha1
is stable. I guess other maintainers could just remove the line if they
prefer to squash it in?

Also makes it easier to know where to squash it into :-)
-Daniel

> 
> Thanks,
> Fengguang
> 
> > > ---
> > >  arcpgu_crtc.c |4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c 
> > > b/drivers/gpu/drm/arc/arcpgu_crtc.c
> > > index 99fbdae..611af74 100644
> > > --- a/drivers/gpu/drm/arc/arcpgu_crtc.c
> > > +++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
> > > @@ -64,8 +64,8 @@ static const struct drm_crtc_funcs arc_pgu_crtc_funcs = 
> > > {
> > >   .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
> > >  };
> > > 
> > > -enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
> > > -  const struct drm_display_mode 
> > > *mode)
> > > +static enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc 
> > > *crtc,
> > > + const struct 
> > > drm_display_mode *mode)
> > >  {
> > >   struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
> > >   long rate, clk_rate = mode->clock * 1000;
> > 
> > -- 
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > http://blog.ffwll.ch
> > ___
> > kbuild-all mailing list
> > kbuild-...@lists.01.org
> > https://lists.01.org/mailman/listinfo/kbuild-all

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[Intel-gfx] ✗ Fi.CI.BAT: failure for improve the fb_setcmap helper (rev4)

[Patchwork]

== Series Details ==

Series: improve the fb_setcmap helper (rev4)
URL   : https://patchwork.freedesktop.org/series/26281/
State : failure

== Summary ==

Series 26281v4 improve the fb_setcmap helper
https://patchwork.freedesktop.org/api/1.0/series/26281/revisions/4/mbox/

Test kms_sink_crc_basic:
pass   -> FAIL   (fi-glk-2a)
Test drv_module_reload:
Subgroup basic-reload:
dmesg-warn -> PASS   (fi-skl-6700hq) fdo#101515

fdo#101515 https://bugs.freedesktop.org/show_bug.cgi?id=101515

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:450s
fi-bdw-gvtdvmtotal:279  pass:257  dwarn:8   dfail:0   fail:0   skip:14  
time:424s
fi-bsw-n3050 total:279  pass:242  dwarn:1   dfail:0   fail:0   skip:36  
time:543s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:514s
fi-byt-j1900 total:279  pass:253  dwarn:2   dfail:0   fail:0   skip:24  
time:491s
fi-byt-n2820 total:279  pass:249  dwarn:2   dfail:0   fail:0   skip:28  
time:481s
fi-glk-2atotal:279  pass:259  dwarn:0   dfail:0   fail:1   skip:19  
time:594s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:446s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:422s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:413s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:498s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:480s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:476s
fi-kbl-7560u total:279  pass:268  dwarn:1   dfail:0   fail:0   skip:10  
time:579s
fi-kbl-r total:279  pass:260  dwarn:1   dfail:0   fail:0   skip:18  
time:593s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:465s
fi-skl-6700hqtotal:279  pass:223  dwarn:1   dfail:0   fail:30  skip:24  
time:345s
fi-skl-6700k total:279  pass:257  dwarn:4   dfail:0   fail:0   skip:18  
time:477s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:488s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:444s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:537s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:411s

84938b2a7878372c7b60dabd347bed4c4856dc14 drm-tip: 2017y-06m-23d-10h-25m-41s UTC 
integration manifest
02086d7 drm: remove unused and redundant callbacks
e0220ea drm: stm: remove dead code and pointless local lut storage
4db0eb3 drm: radeon: remove dead code and pointless local lut storage
70902d8 drm: nouveau: remove dead code and pointless local lut storage
b6dad22 drm: mgag200: remove dead code and pointless local lut storage
0af727a drm: i915: remove dead code and pointless local lut storage
b144699 dmr: gma500: remove dead code and pointless local lut storage
fa1fce3 drm: cirrus: remove dead code and pointless local lut storage
9bcd96d drm: ast: remove dead code and pointless local lut storage
0a9fc1f drm: amd: remove dead code and pointless local lut storage
41bb03b drm/fb-helper: do a generic fb_setcmap helper in terms of crtc 
.gamma_set

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5033/
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Re: [Intel-gfx] [PATCH v2] drm/vgem: Pin our pages for dmabuf exports

[Daniel Vetter]

On Fri, Jun 23, 2017 at 01:02:53PM +0200, Daniel Vetter wrote:
> Anyway looks all good, will push to drm-misc-fixes.

Correction, pushed to -misc-next because it conflicts with the dma-buf
import stuff from Laura and other bits. If you want it in -fixes I need a
backport. I left the cc: stable in just to annoy Greg a bit :-)
-Daniel
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Re: [Intel-gfx] [PATCH v2] drm/vgem: Pin our pages for dmabuf exports

[Daniel Vetter]

On Thu, Jun 22, 2017 at 02:46:17PM +0100, Chris Wilson wrote:
> When the caller maps their dmabuf and we return an sg_table, the caller
> doesn't expect the pages beneath that sg_table to vanish on a whim (i.e.
> under mempressure). The contract is that the pages are pinned for the
> duration of the mapping (from dma_buf_map_attachment() to
> dma_buf_unmap_attachment). To comply, we need to introduce our own
> vgem_object.pages_pin_count and elevate it across the mapping. However,
> the drm_prime interface we use calls drv->prime_pin on dma_buf_attach
> and drv->prime_unpin on dma_buf_detach, which while that does cover the
> mapping is much broader than is desired -- but it will do for now.

We could/should probably fix that ... Most drivers hold onto the mapping
forever anyway.

> v2: also hold the pin across prime_vmap/vunmap
> 
> Reported-by: Tomi Sarvela 
> Testcase: igt/gem_concurrent_blit/*swap*vgem*
> Fixes: 5ba6c9ff961a ("drm/vgem: Fix mmaping")
> Signed-off-by: Chris Wilson 
> Cc: Tomi Sarvela 
> Cc: Laura Abbott 
> Cc: Sean Paul 
> Cc: Matthew Auld 
> Cc: Daniel Vetter 
> Cc: 
> ---
>  drivers/gpu/drm/vgem/vgem_drv.c | 81 
> ++---
>  drivers/gpu/drm/vgem/vgem_drv.h |  4 ++
>  2 files changed, 64 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/gpu/drm/vgem/vgem_drv.c b/drivers/gpu/drm/vgem/vgem_drv.c
> index 18f401b442c2..c938af8c40cf 100644
> --- a/drivers/gpu/drm/vgem/vgem_drv.c
> +++ b/drivers/gpu/drm/vgem/vgem_drv.c
> @@ -52,6 +52,7 @@ static void vgem_gem_free_object(struct drm_gem_object *obj)
>   struct drm_vgem_gem_object *vgem_obj = to_vgem_bo(obj);
>  
>   kvfree(vgem_obj->pages);
> + mutex_destroy(_obj->pages_lock);
>  
>   if (obj->import_attach)
>   drm_prime_gem_destroy(obj, vgem_obj->table);
> @@ -76,11 +77,15 @@ static int vgem_gem_fault(struct vm_fault *vmf)
>   if (page_offset > num_pages)
>   return VM_FAULT_SIGBUS;
>  
> + ret = -ENOENT;
> + mutex_lock(>pages_lock);
>   if (obj->pages) {
>   get_page(obj->pages[page_offset]);
>   vmf->page = obj->pages[page_offset];
>   ret = 0;
> - } else {
> + }
> + mutex_unlock(>pages_lock);
> + if (ret) {
>   struct page *page;
>  
>   page = shmem_read_mapping_page(
> @@ -161,6 +166,8 @@ static struct drm_vgem_gem_object 
> *__vgem_gem_create(struct drm_device *dev,
>   return ERR_PTR(ret);
>   }
>  
> + mutex_init(>pages_lock);
> +
>   return obj;
>  }
>  
> @@ -274,37 +281,66 @@ static const struct file_operations vgem_driver_fops = {
>   .release= drm_release,
>  };
>  
> +static struct page **vgem_pin_pages(struct drm_vgem_gem_object *bo)
> +{
> + mutex_lock(>pages_lock);
> + if (bo->pages_pin_count++ == 0) {
> + struct page **pages;
> +
> + pages = drm_gem_get_pages(>base);
> + if (IS_ERR(pages)) {
> + bo->pages_pin_count--;
> + mutex_unlock(>pages_lock);
> + return pages;
> + }
> +
> + bo->pages = pages;
> + }
> + mutex_unlock(>pages_lock);
> +
> + return bo->pages;
> +}
> +
> +static void vgem_unpin_pages(struct drm_vgem_gem_object *bo)
> +{
> + mutex_lock(>pages_lock);
> + if (--bo->pages_pin_count == 0) {
> + drm_gem_put_pages(>base, bo->pages, true, true);
> + bo->pages = NULL;
> + }
> + mutex_unlock(>pages_lock);
> +}
> +
>  static int vgem_prime_pin(struct drm_gem_object *obj)
>  {
> + struct drm_vgem_gem_object *bo = to_vgem_bo(obj);
>   long n_pages = obj->size >> PAGE_SHIFT;
>   struct page **pages;
>  
> - /* Flush the object from the CPU cache so that importers can rely
> -  * on coherent indirect access via the exported dma-address.
> -  */
> - pages = drm_gem_get_pages(obj);
> + pages = vgem_pin_pages(bo);
>   if (IS_ERR(pages))
>   return PTR_ERR(pages);
>  
> + /* Flush the object from the CPU cache so that importers can rely
> +  * on coherent indirect access via the exported dma-address.
> +  */
>   drm_clflush_pages(pages, n_pages);

Just spotted this, but at least on x86 dma is supposed to be coherent.
We're the exception. But then this is all ill-defined with dma_buf, so
meh.

> - drm_gem_put_pages(obj, pages, true, false);
>  
>   return 0;
>  }
>  
> -static struct sg_table *vgem_prime_get_sg_table(struct drm_gem_object *obj)
> +static void vgem_prime_unpin(struct drm_gem_object *obj)
>  {
> - struct sg_table *st;
> - struct page **pages;
> + struct drm_vgem_gem_object *bo = to_vgem_bo(obj);
>  
> - pages = drm_gem_get_pages(obj);
> - if 

Re: [Intel-gfx] [kbuild-all] [RFC PATCH drm-intel] drm: arcpgu: arc_pgu_crtc_mode_valid() can be static

[Fengguang Wu]

Hi Daniel,

On Fri, Jun 23, 2017 at 12:30:17PM +0200, Daniel Vetter wrote:

On Fri, Jun 23, 2017 at 05:54:18PM +0800, kbuild test robot wrote:


Signed-off-by: Fengguang Wu 


Oops, missed that, applied.

Btw, for regression fixes like that, could you perhaps auto-generate the
Fixes: line per the kernel process? Makes it easier for me to know where
to apply something :-)


That's a good idea for commits in mainline, where the Fixes tag will
look like

   Fixes: e21d2170f366 ("video: remove unnecessary platform_set_drvdata()")

However typically 0day auto-generated patches are pre-mainline ones,
in which case only patch subject is available. How are we going to
deal with this?

Thanks,
Fengguang


---
 arcpgu_crtc.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c 
b/drivers/gpu/drm/arc/arcpgu_crtc.c
index 99fbdae..611af74 100644
--- a/drivers/gpu/drm/arc/arcpgu_crtc.c
+++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
@@ -64,8 +64,8 @@ static const struct drm_crtc_funcs arc_pgu_crtc_funcs = {
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
 };

-enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
-const struct drm_display_mode 
*mode)
+static enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
+   const struct 
drm_display_mode *mode)
 {
struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
long rate, clk_rate = mode->clock * 1000;


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Re: [Intel-gfx] [PATCH] drm/i915: Avoid keeping waitboost active for signaling threads

[Chris Wilson]

Quoting Michał Winiarski (2017-06-23 11:35:06)
> On Thu, Jun 22, 2017 at 11:55:51AM +0100, Chris Wilson wrote:
> > Once a client has requested a waitboost, we keep that waitboost active
> > until all clients are no longer waiting. This is because we don't
> > distinguish which waiter deserves the boost. However, with the advent of
> > fence signaling, the signaler threads appear as waiters to the RPS
> > interrupt handler. So instead of using a single boolean to track when to
> > keep the waitboost active, use a counter of all outstanding waitboosted
> > requests.
> > 
> > At this point, I have removed all vestiges of the rate limiting on
> > clients. Whilst this means that compositors should remain more fluid,
> > it also means that boosts are more prevalent.
> > 
> > A drawback of this implementation is that it requires constant request
> > submission to keep the waitboost trimmed (as it is now cancelled when the
> > request is completed). This will be fine for a busy system, but near
> > idle the boosts may be kept for longer than desired (effectively tens of
> > vblanks worstcase) and there is a reliance on rc6 instead.
> 
> In other words, now we're disabling boost when all requests that required 
> boost
> are retired.
> We may need to tweak igt pm_rps boost scenarios to account for that extra 
> time.

It should be less time boosted than before, if the requests are retired
promptly. But that's a big if.

> > Reported-by: Michał Winiarski 
> > Signed-off-by: Chris Wilson 
> > Cc: Michał Winiarski 
> 
> [SNIP]
> 
> > @@ -2347,11 +2349,10 @@ static int i915_rps_boost_info(struct seq_file *m, 
> > void *data)
> >  
> >   rcu_read_lock();
> >   task = pid_task(file->pid, PIDTYPE_PID);
> > - seq_printf(m, "%s [%d]: %d boosts%s\n",
> > + seq_printf(m, "%s [%d]: %d boosts\n",
> >  task ? task->comm : "",
> >  task ? task->pid : -1,
> > -file_priv->rps.boosts,
> > -list_empty(_priv->rps.link) ? "" : ", 
> > active");
> > +atomic_read(_priv->rps.boosts));
> >   rcu_read_unlock();
> >   }
> >   seq_printf(m, "Kernel (anonymous) boosts: %d\n", 
> > dev_priv->rps.boosts);
> 
> dev_priv->rps.boosts seems to be unused at this point, could you remove it 
> while
> you're here?

Oh, I should just hook up the other side of

> > + if (rps != NULL)
> > + atomic_inc(>boosts);

else
atomic_inc(_priv->rps.boosts);

The only user is dead-code atm, but it may come in useful again for
atomic modesetting.
-Chris
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Re: [Intel-gfx] [PATCH] drm/i915: Avoid keeping waitboost active for signaling threads

[Michał Winiarski]

On Thu, Jun 22, 2017 at 11:55:51AM +0100, Chris Wilson wrote:
> Once a client has requested a waitboost, we keep that waitboost active
> until all clients are no longer waiting. This is because we don't
> distinguish which waiter deserves the boost. However, with the advent of
> fence signaling, the signaler threads appear as waiters to the RPS
> interrupt handler. So instead of using a single boolean to track when to
> keep the waitboost active, use a counter of all outstanding waitboosted
> requests.
> 
> At this point, I have removed all vestiges of the rate limiting on
> clients. Whilst this means that compositors should remain more fluid,
> it also means that boosts are more prevalent.
> 
> A drawback of this implementation is that it requires constant request
> submission to keep the waitboost trimmed (as it is now cancelled when the
> request is completed). This will be fine for a busy system, but near
> idle the boosts may be kept for longer than desired (effectively tens of
> vblanks worstcase) and there is a reliance on rc6 instead.

In other words, now we're disabling boost when all requests that required boost
are retired.
We may need to tweak igt pm_rps boost scenarios to account for that extra time.

> 
> Reported-by: Michał Winiarski 
> Signed-off-by: Chris Wilson 
> Cc: Michał Winiarski 

[SNIP]

> @@ -2347,11 +2349,10 @@ static int i915_rps_boost_info(struct seq_file *m, 
> void *data)
>  
>   rcu_read_lock();
>   task = pid_task(file->pid, PIDTYPE_PID);
> - seq_printf(m, "%s [%d]: %d boosts%s\n",
> + seq_printf(m, "%s [%d]: %d boosts\n",
>  task ? task->comm : "",
>  task ? task->pid : -1,
> -file_priv->rps.boosts,
> -list_empty(_priv->rps.link) ? "" : ", active");
> +atomic_read(_priv->rps.boosts));
>   rcu_read_unlock();
>   }
>   seq_printf(m, "Kernel (anonymous) boosts: %d\n", dev_priv->rps.boosts);

dev_priv->rps.boosts seems to be unused at this point, could you remove it while
you're here?

With that:
Reviewed-by: Michał Winiarski 

-Michał

> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 30e89456fc61..95e164387363 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -584,8 +584,7 @@ struct drm_i915_file_private {
>   struct idr context_idr;
>  
>   struct intel_rps_client {
> - struct list_head link;
> - unsigned boosts;
> + atomic_t boosts;
>   } rps;
>  
>   unsigned int bsd_engine;
> @@ -1304,8 +1303,7 @@ struct intel_gen6_power_mgmt {
>   enum { LOW_POWER, BETWEEN, HIGH_POWER } power;
>  
>   spinlock_t client_lock;
> - struct list_head clients;
> - bool client_boost;
> + atomic_t num_waiters;
>  
>   bool enabled;
>   struct delayed_work autoenable_work;
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ae3ce1314bd1..7391e2d36a31 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -388,7 +388,7 @@ i915_gem_object_wait_fence(struct dma_fence *fence,
>*/
>   if (rps) {
>   if (INTEL_GEN(rq->i915) >= 6)
> - gen6_rps_boost(rq->i915, rps, rq->emitted_jiffies);
> + gen6_rps_boost(rq, rps);
>   else
>   rps = NULL;
>   }
> @@ -399,22 +399,6 @@ i915_gem_object_wait_fence(struct dma_fence *fence,
>   if (flags & I915_WAIT_LOCKED && i915_gem_request_completed(rq))
>   i915_gem_request_retire_upto(rq);
>  
> - if (rps && i915_gem_request_global_seqno(rq) == 
> intel_engine_last_submit(rq->engine)) {
> - /* The GPU is now idle and this client has stalled.
> -  * Since no other client has submitted a request in the
> -  * meantime, assume that this client is the only one
> -  * supplying work to the GPU but is unable to keep that
> -  * work supplied because it is waiting. Since the GPU is
> -  * then never kept fully busy, RPS autoclocking will
> -  * keep the clocks relatively low, causing further delays.
> -  * Compensate by giving the synchronous client credit for
> -  * a waitboost next time.
> -  */
> - spin_lock(>i915->rps.client_lock);
> - list_del_init(>link);
> - spin_unlock(>i915->rps.client_lock);
> - }
> -
>   return timeout;
>  }
>  
> @@ -5065,12 +5049,6 @@ void i915_gem_release(struct drm_device *dev, struct 
> drm_file *file)
>   list_for_each_entry(request, _priv->mm.request_list, client_link)
>   request->file_priv = NULL;
>   

Re: [Intel-gfx] [RFC PATCH drm-intel] drm: arcpgu: arc_pgu_crtc_mode_valid() can be static

[Daniel Vetter]

On Fri, Jun 23, 2017 at 05:54:18PM +0800, kbuild test robot wrote:
> 
> Signed-off-by: Fengguang Wu 

Oops, missed that, applied.

Btw, for regression fixes like that, could you perhaps auto-generate the
Fixes: line per the kernel process? Makes it easier for me to know where
to apply something :-)

Thanks, Daniel

> ---
>  arcpgu_crtc.c |4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c 
> b/drivers/gpu/drm/arc/arcpgu_crtc.c
> index 99fbdae..611af74 100644
> --- a/drivers/gpu/drm/arc/arcpgu_crtc.c
> +++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
> @@ -64,8 +64,8 @@ static const struct drm_crtc_funcs arc_pgu_crtc_funcs = {
>   .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
>  };
>  
> -enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
> -  const struct drm_display_mode 
> *mode)
> +static enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
> + const struct 
> drm_display_mode *mode)
>  {
>   struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
>   long rate, clk_rate = mode->clock * 1000;

-- 
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Re: [Intel-gfx] [PATCH v5 7/7] drm: create hdmi output property

[Daniel Vetter]

On Fri, Jun 23, 2017 at 03:35:30PM +0530, Sharma, Shashank wrote:
> Regards
> 
> Shashank
> 
> 
> On 6/23/2017 2:50 PM, Daniel Vetter wrote:
> > On Thu, Jun 22, 2017 at 10:33 AM, Sharma, Shashank
> >  wrote:
> > > > - The property values should be limited to what the driver can support, 
> > > > I
> > > > guess that would mean limiting the available ycbcr modes? Or does 
> > > > all
> > > > our hw support all the modes, including 420 (on the sink side)?
> > > This property is targeted at DRM layer, so naturally its for all the HWs
> > > along with Intel HW, so it serves a big range.
> > > All our HDMI 1.4 sources support RGB444, and after this series, can 
> > > support
> > > YCBCR444.
> > > All HDMI 2.0 sources should support YCBCR420, but they can declare this
> > > using a bool variable which I added in patch 3 (ycbcr420_allowed)
> > > As we are targeting both HDMI 1.4 as well as HDMI 2.0 (Src and Sink), as a
> > > whole we are covering all options.
> > Yes, we need to define values for everything, since it's a generic
> > property. But for a given driver imo we should only allow the values
> > that are actually supported. An example would be the rotation
> > property, which supporsts X/Y-mirror and rotation by 90° steps. But on
> > a given i915 platform we only register support for the stuff the
> > driver/hw can do, e.g. pre-gen9 do not register 90/270° rotation. I
> > think we should do the same here. See
> > drm_plane_create_rotation_property(), specifically the
> > supported_rotations parameter.
> Ah, I got your point now, and its valid.
> If you see the I915 level handlers of YCBCR functions (added in patch 10)
> they are taking care of blocking
> anything which is not supported by driver for this platform, based on:
> - The source capability
> - The sink capability
> - User preference of the property.

Yeah, runtime checks are needed on top (sometimes at least). But if we
can't support a given mode for a given sink then we should take that into
account when registering the property. Otherwise userspace tries stuff
that can never succeed, which isn't a big problem with the TEST_ONLY
atomic mode, just a bit silly.
-Daniel

> So on a whole, set of Intel platforms cover all the values of property, but
> at driver level we make sure to allow only what is suitable for this source
> + sink combination.
> - Shashank
> > 
> > Cheers, Daniel
> 

-- 
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[Intel-gfx] [PATCH 01/11] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set

[Peter Rosin]

This makes the redundant fb helpers .load_lut, .gamma_set and .gamma_get
totally obsolete.

I think the gamma_store can end up invalid on error. But the way I read
it, that can happen in drm_mode_gamma_set_ioctl as well, so why should
this pesky legacy fbdev stuff be any better?

drm_fb_helper_save_lut_atomic justs saves the gamma lut for later. However,
it saves it to the gamma_store which should already be up to date with what
.gamma_get would return and is thus a nop. So, zap it.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/drm_fb_helper.c | 131 
 1 file changed, 40 insertions(+), 91 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 574af01..cc2d55d 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -229,22 +229,6 @@ int drm_fb_helper_remove_one_connector(struct 
drm_fb_helper *fb_helper,
 }
 EXPORT_SYMBOL(drm_fb_helper_remove_one_connector);
 
-static void drm_fb_helper_save_lut_atomic(struct drm_crtc *crtc, struct 
drm_fb_helper *helper)
-{
-   uint16_t *r_base, *g_base, *b_base;
-   int i;
-
-   if (helper->funcs->gamma_get == NULL)
-   return;
-
-   r_base = crtc->gamma_store;
-   g_base = r_base + crtc->gamma_size;
-   b_base = g_base + crtc->gamma_size;
-
-   for (i = 0; i < crtc->gamma_size; i++)
-   helper->funcs->gamma_get(crtc, _base[i], _base[i], 
_base[i], i);
-}
-
 static void drm_fb_helper_restore_lut_atomic(struct drm_crtc *crtc)
 {
uint16_t *r_base, *g_base, *b_base;
@@ -285,7 +269,6 @@ int drm_fb_helper_debug_enter(struct fb_info *info)
if (drm_drv_uses_atomic_modeset(mode_set->crtc->dev))
continue;
 
-   drm_fb_helper_save_lut_atomic(mode_set->crtc, helper);
funcs->mode_set_base_atomic(mode_set->crtc,
mode_set->fb,
mode_set->x,
@@ -1167,50 +1150,6 @@ void drm_fb_helper_set_suspend_unlocked(struct 
drm_fb_helper *fb_helper,
 }
 EXPORT_SYMBOL(drm_fb_helper_set_suspend_unlocked);
 
-static int setcolreg(struct drm_crtc *crtc, u16 red, u16 green,
-u16 blue, u16 regno, struct fb_info *info)
-{
-   struct drm_fb_helper *fb_helper = info->par;
-   struct drm_framebuffer *fb = fb_helper->fb;
-
-   if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-   u32 *palette;
-   u32 value;
-   /* place color in psuedopalette */
-   if (regno > 16)
-   return -EINVAL;
-   palette = (u32 *)info->pseudo_palette;
-   red >>= (16 - info->var.red.length);
-   green >>= (16 - info->var.green.length);
-   blue >>= (16 - info->var.blue.length);
-   value = (red << info->var.red.offset) |
-   (green << info->var.green.offset) |
-   (blue << info->var.blue.offset);
-   if (info->var.transp.length > 0) {
-   u32 mask = (1 << info->var.transp.length) - 1;
-
-   mask <<= info->var.transp.offset;
-   value |= mask;
-   }
-   palette[regno] = value;
-   return 0;
-   }
-
-   /*
-* The driver really shouldn't advertise pseudo/directcolor
-* visuals if it can't deal with the palette.
-*/
-   if (WARN_ON(!fb_helper->funcs->gamma_set ||
-   !fb_helper->funcs->gamma_get))
-   return -EINVAL;
-
-   WARN_ON(fb->format->cpp[0] != 1);
-
-   fb_helper->funcs->gamma_set(crtc, red, green, blue, regno);
-
-   return 0;
-}
-
 /**
  * drm_fb_helper_setcmap - implementation for _ops.fb_setcmap
  * @cmap: cmap to set
@@ -1220,51 +1159,61 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
 {
struct drm_fb_helper *fb_helper = info->par;
struct drm_device *dev = fb_helper->dev;
-   const struct drm_crtc_helper_funcs *crtc_funcs;
-   u16 *red, *green, *blue, *transp;
+   struct drm_modeset_acquire_ctx ctx;
struct drm_crtc *crtc;
-   int i, j, rc = 0;
-   int start;
+   u16 *r, *g, *b;
+   int i, ret;
 
if (oops_in_progress)
return -EBUSY;
 
-   drm_modeset_lock_all(dev);
+   if (cmap->start + cmap->len < cmap->start)
+   return -EINVAL;
+
+   drm_modeset_acquire_init(, 0);
+retry:
+   ret = drm_modeset_lock_all_ctx(dev, );
+   if (ret)
+   goto out;
if (!drm_fb_helper_is_bound(fb_helper)) {
-   drm_modeset_unlock_all(dev);
-   return -EBUSY;
+   ret = -EBUSY;
+   goto out;
}
 
for (i = 0; i < fb_helper->crtc_count; i++) {
crtc = 

[Intel-gfx] [PATCH v2 11/14] drm: nouveau: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/nouveau/dispnv04/crtc.c | 26 -
 drivers/gpu/drm/nouveau/nouveau_crtc.h  |  3 ---
 drivers/gpu/drm/nouveau/nouveau_fbcon.c | 22 --
 drivers/gpu/drm/nouveau/nv50_display.c  | 40 +++--
 4 files changed, 22 insertions(+), 69 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c 
b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
index 4b4b0b4..8f689f1 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
@@ -764,13 +764,18 @@ nv_crtc_gamma_load(struct drm_crtc *crtc)
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
struct drm_device *dev = nv_crtc->base.dev;
struct rgb { uint8_t r, g, b; } __attribute__((packed)) *rgbs;
+   u16 *r, *g, *b;
int i;
 
rgbs = (struct rgb 
*)nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].DAC;
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
for (i = 0; i < 256; i++) {
-   rgbs[i].r = nv_crtc->lut.r[i] >> 8;
-   rgbs[i].g = nv_crtc->lut.g[i] >> 8;
-   rgbs[i].b = nv_crtc->lut.b[i] >> 8;
+   rgbs[i].r = *r++ >> 8;
+   rgbs[i].g = *g++ >> 8;
+   rgbs[i].b = *b++ >> 8;
}
 
nouveau_hw_load_state_palette(dev, nv_crtc->index, 
_display(dev)->mode_reg);
@@ -792,13 +797,6 @@ nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, 
u16 *b,
  struct drm_modeset_acquire_ctx *ctx)
 {
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-   int i;
-
-   for (i = 0; i < size; i++) {
-   nv_crtc->lut.r[i] = r[i];
-   nv_crtc->lut.g[i] = g[i];
-   nv_crtc->lut.b[i] = b[i];
-   }
 
/* We need to know the depth before we upload, but it's possible to
 * get called before a framebuffer is bound.  If this is the case,
@@ -1095,7 +1093,6 @@ static const struct drm_crtc_helper_funcs 
nv04_crtc_helper_funcs = {
.mode_set = nv_crtc_mode_set,
.mode_set_base = nv04_crtc_mode_set_base,
.mode_set_base_atomic = nv04_crtc_mode_set_base_atomic,
-   .load_lut = nv_crtc_gamma_load,
.disable = nv_crtc_disable,
 };
 
@@ -1103,17 +1100,12 @@ int
 nv04_crtc_create(struct drm_device *dev, int crtc_num)
 {
struct nouveau_crtc *nv_crtc;
-   int ret, i;
+   int ret;
 
nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
if (!nv_crtc)
return -ENOMEM;
 
-   for (i = 0; i < 256; i++) {
-   nv_crtc->lut.r[i] = i << 8;
-   nv_crtc->lut.g[i] = i << 8;
-   nv_crtc->lut.b[i] = i << 8;
-   }
nv_crtc->lut.depth = 0;
 
nv_crtc->index = crtc_num;
diff --git a/drivers/gpu/drm/nouveau/nouveau_crtc.h 
b/drivers/gpu/drm/nouveau/nouveau_crtc.h
index 050fcf3..b7a18fb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_crtc.h
+++ b/drivers/gpu/drm/nouveau/nouveau_crtc.h
@@ -61,9 +61,6 @@ struct nouveau_crtc {
 
struct {
struct nouveau_bo *nvbo;
-   uint16_t r[256];
-   uint16_t g[256];
-   uint16_t b[256];
int depth;
} lut;
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c 
b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 2665a07..f770784 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -278,26 +278,6 @@ nouveau_fbcon_accel_init(struct drm_device *dev)
info->fbops = _fbcon_ops;
 }
 
-static void nouveau_fbcon_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-   u16 blue, int regno)
-{
-   struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-
-   nv_crtc->lut.r[regno] = red;
-   nv_crtc->lut.g[regno] = green;
-   nv_crtc->lut.b[regno] = blue;
-}
-
-static void nouveau_fbcon_gamma_get(struct drm_crtc *crtc, u16 *red, u16 
*green,
-   u16 *blue, int regno)
-{
-   struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-
-   *red = nv_crtc->lut.r[regno];
-   *green = nv_crtc->lut.g[regno];
-   *blue = nv_crtc->lut.b[regno];
-}
-
 static void
 nouveau_fbcon_zfill(struct drm_device *dev, struct nouveau_fbdev *fbcon)
 {
@@ -467,8 +447,6 @@ void nouveau_fbcon_gpu_lockup(struct fb_info *info)
 }
 
 static const struct drm_fb_helper_funcs nouveau_fbcon_helper_funcs = {
-   .gamma_set = nouveau_fbcon_gamma_set,
-   .gamma_get = nouveau_fbcon_gamma_get,
.fb_probe = nouveau_fbcon_create,
 };
 
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
b/drivers/gpu/drm/nouveau/nv50_display.c
index 

[Intel-gfx] [PATCH] drm/i915: select CRC32

[Nicholas Piggin]

kbuild test robot found a build failure when building with thin
archives:

http://marc.info/?l=linux-kbuild=149802285009737=2

Signed-off-by: Nicholas Piggin 
---
 drivers/gpu/drm/i915/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index a5cd5dacf055..e9e64e8e9765 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -21,6 +21,7 @@ config DRM_I915
select ACPI_BUTTON if ACPI
select SYNC_FILE
select IOSF_MBI
+   select CRC32
help
  Choose this option if you have a system that has "Intel Graphics
  Media Accelerator" or "HD Graphics" integrated graphics,
-- 
2.11.0

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Re: [Intel-gfx] [PATCH 01/11] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set

[Peter Rosin]

On 2017-06-21 09:38, Daniel Vetter wrote:
> On Tue, Jun 20, 2017 at 09:25:25PM +0200, Peter Rosin wrote:
>> This makes the redundant fb helpers .load_lut, .gamma_set and .gamma_get
>> totally obsolete.
>>
>> I think the gamma_store can end up invalid on error. But the way I read
>> it, that can happen in drm_mode_gamma_set_ioctl as well, so why should
>> this pesky legacy fbdev stuff be any better?
>>
>> drm_fb_helper_save_lut_atomic justs saves the gamma lut for later. However,
>> it saves it to the gamma_store which should already be up to date with what
>> .gamma_get would return and is thus a nop. So, zap it.
> 
> Removing drm_fb_helper_save_lut_atomic should be a separate patch I
> think.

Then 3 patches would be needed, first some hybrid thing that does it the
old way, but also stores the lut in .gamma_store, then the split-out that
removes drm_fb_helper_save_lut_atomic, then whatever is needed to get
to the desired code. I can certainly do that, but do you want me to?

I.e., the statement that drm_fb_helper_save_lut_atomic is a nop is only
true when (part of) the other patch is also considered.

>> Signed-off-by: Peter Rosin 
> 
>> ---
>>  drivers/gpu/drm/drm_fb_helper.c | 131 
>> 
>>  1 file changed, 40 insertions(+), 91 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_fb_helper.c 
>> b/drivers/gpu/drm/drm_fb_helper.c
>> index 574af01..cc2d55d 100644
>> --- a/drivers/gpu/drm/drm_fb_helper.c
>> +++ b/drivers/gpu/drm/drm_fb_helper.c
>> @@ -229,22 +229,6 @@ int drm_fb_helper_remove_one_connector(struct 
>> drm_fb_helper *fb_helper,
>>  }
>>  EXPORT_SYMBOL(drm_fb_helper_remove_one_connector);
>>  
>> -static void drm_fb_helper_save_lut_atomic(struct drm_crtc *crtc, struct 
>> drm_fb_helper *helper)
>> -{
>> -uint16_t *r_base, *g_base, *b_base;
>> -int i;
>> -
>> -if (helper->funcs->gamma_get == NULL)
>> -return;
>> -
>> -r_base = crtc->gamma_store;
>> -g_base = r_base + crtc->gamma_size;
>> -b_base = g_base + crtc->gamma_size;
>> -
>> -for (i = 0; i < crtc->gamma_size; i++)
>> -helper->funcs->gamma_get(crtc, _base[i], _base[i], 
>> _base[i], i);
>> -}
>> -
>>  static void drm_fb_helper_restore_lut_atomic(struct drm_crtc *crtc)
>>  {
>>  uint16_t *r_base, *g_base, *b_base;
>> @@ -285,7 +269,6 @@ int drm_fb_helper_debug_enter(struct fb_info *info)
>>  if (drm_drv_uses_atomic_modeset(mode_set->crtc->dev))
>>  continue;
>>  
>> -drm_fb_helper_save_lut_atomic(mode_set->crtc, helper);
>>  funcs->mode_set_base_atomic(mode_set->crtc,
>>  mode_set->fb,
>>  mode_set->x,
>> @@ -1167,50 +1150,6 @@ void drm_fb_helper_set_suspend_unlocked(struct 
>> drm_fb_helper *fb_helper,
>>  }
>>  EXPORT_SYMBOL(drm_fb_helper_set_suspend_unlocked);
>>  
>> -static int setcolreg(struct drm_crtc *crtc, u16 red, u16 green,
>> - u16 blue, u16 regno, struct fb_info *info)
>> -{
>> -struct drm_fb_helper *fb_helper = info->par;
>> -struct drm_framebuffer *fb = fb_helper->fb;
>> -
>> -if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
> 
> This case here seems gone, and it was also the pièce de résistance when I
> tried tackling fbdev lut support. As far as I understand this stuff we do
> not support FB_VISUAL_TRUECOLOR palette, and all that bitshifting here is
> pointless. But I'm honestly not really clear.

Oops, sorry, I simply missed that, I'll have a closer look...

> I think removing this case should also be a separate patch, and I'd very
> much prefer that someone with some fbdev-clue would ack it.
> 
>> -u32 *palette;
>> -u32 value;
>> -/* place color in psuedopalette */
>> -if (regno > 16)
>> -return -EINVAL;
>> -palette = (u32 *)info->pseudo_palette;
>> -red >>= (16 - info->var.red.length);
>> -green >>= (16 - info->var.green.length);
>> -blue >>= (16 - info->var.blue.length);
>> -value = (red << info->var.red.offset) |
>> -(green << info->var.green.offset) |
>> -(blue << info->var.blue.offset);
>> -if (info->var.transp.length > 0) {
>> -u32 mask = (1 << info->var.transp.length) - 1;
>> -
>> -mask <<= info->var.transp.offset;
>> -value |= mask;
>> -}
>> -palette[regno] = value;
>> -return 0;
>> -}
>> -
>> -/*
>> - * The driver really shouldn't advertise pseudo/directcolor
>> - * visuals if it can't deal with the palette.
>> - */
>> -if (WARN_ON(!fb_helper->funcs->gamma_set ||
>> -!fb_helper->funcs->gamma_get))
>> -return -EINVAL;
>> -
>> -WARN_ON(fb->format->cpp[0] != 1);
>> -
>> -   

[Intel-gfx] [PATCH v2 04/14] drm: amd: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c   | 24 
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h |  1 -
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c   | 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c   | 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c| 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c| 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 23 ---
 7 files changed, 28 insertions(+), 128 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index c0d8c6f..7dc3780 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -312,31 +312,7 @@ static int amdgpu_fbdev_destroy(struct drm_device *dev, 
struct amdgpu_fbdev *rfb
return 0;
 }
 
-/** Sets the color ramps on behalf of fbcon */
-static void amdgpu_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
- u16 blue, int regno)
-{
-   struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-
-   amdgpu_crtc->lut_r[regno] = red >> 6;
-   amdgpu_crtc->lut_g[regno] = green >> 6;
-   amdgpu_crtc->lut_b[regno] = blue >> 6;
-}
-
-/** Gets the color ramps on behalf of fbcon */
-static void amdgpu_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 
*green,
- u16 *blue, int regno)
-{
-   struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-
-   *red = amdgpu_crtc->lut_r[regno] << 6;
-   *green = amdgpu_crtc->lut_g[regno] << 6;
-   *blue = amdgpu_crtc->lut_b[regno] << 6;
-}
-
 static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = {
-   .gamma_set = amdgpu_crtc_fb_gamma_set,
-   .gamma_get = amdgpu_crtc_fb_gamma_get,
.fb_probe = amdgpufb_create,
 };
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 43a9d3a..39f7eda 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -369,7 +369,6 @@ struct amdgpu_atom_ss {
 struct amdgpu_crtc {
struct drm_crtc base;
int crtc_id;
-   u16 lut_r[256], lut_g[256], lut_b[256];
bool enabled;
bool can_tile;
uint32_t crtc_offset;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 9f78c03..c958023 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2267,6 +2267,7 @@ static void dce_v10_0_crtc_load_lut(struct drm_crtc *crtc)
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct amdgpu_device *adev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
u32 tmp;
 
@@ -2304,11 +2305,14 @@ static void dce_v10_0_crtc_load_lut(struct drm_crtc 
*crtc)
WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x0007);
 
WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
for (i = 0; i < 256; i++) {
WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,
-  (amdgpu_crtc->lut_r[i] << 20) |
-  (amdgpu_crtc->lut_g[i] << 10) |
-  (amdgpu_crtc->lut_b[i] << 0));
+  ((*r++ & 0xffc0) << 14) |
+  ((*g++ & 0xffc0) << 4) |
+  (*b++ >> 6));
}
 
tmp = RREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
@@ -2624,15 +2628,6 @@ static int dce_v10_0_crtc_gamma_set(struct drm_crtc 
*crtc, u16 *red, u16 *green,
u16 *blue, uint32_t size,
struct drm_modeset_acquire_ctx *ctx)
 {
-   struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-   int i;
-
-   /* userspace palettes are always correct as is */
-   for (i = 0; i < size; i++) {
-   amdgpu_crtc->lut_r[i] = red[i] >> 6;
-   amdgpu_crtc->lut_g[i] = green[i] >> 6;
-   amdgpu_crtc->lut_b[i] = blue[i] >> 6;
-   }
dce_v10_0_crtc_load_lut(crtc);
 
return 0;
@@ -2844,14 +2839,12 @@ static const struct drm_crtc_helper_funcs 
dce_v10_0_crtc_helper_funcs = {
.mode_set_base_atomic = dce_v10_0_crtc_set_base_atomic,
.prepare = dce_v10_0_crtc_prepare,
.commit = dce_v10_0_crtc_commit,
-   .load_lut = dce_v10_0_crtc_load_lut,
.disable = dce_v10_0_crtc_disable,
 };
 
 static int dce_v10_0_crtc_init(struct 

[Intel-gfx] [PATCH v2 10/14] drm: mgag200: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |  5 ---
 drivers/gpu/drm/mgag200/mgag200_fb.c   |  2 --
 drivers/gpu/drm/mgag200/mgag200_mode.c | 62 --
 3 files changed, 15 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h 
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index c88b6ec..04f1dfb 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -237,11 +237,6 @@ mgag200_bo(struct ttm_buffer_object *bo)
 {
return container_of(bo, struct mgag200_bo, bo);
 }
-   /* mgag200_crtc.c */
-void mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-u16 blue, int regno);
-void mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-u16 *blue, int regno);
 
/* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
diff --git a/drivers/gpu/drm/mgag200/mgag200_fb.c 
b/drivers/gpu/drm/mgag200/mgag200_fb.c
index 5d3b1fa..5cf980a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_fb.c
+++ b/drivers/gpu/drm/mgag200/mgag200_fb.c
@@ -258,8 +258,6 @@ static int mga_fbdev_destroy(struct drm_device *dev,
 }
 
 static const struct drm_fb_helper_funcs mga_fb_helper_funcs = {
-   .gamma_set = mga_crtc_fb_gamma_set,
-   .gamma_get = mga_crtc_fb_gamma_get,
.fb_probe = mgag200fb_create,
 };
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c 
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index f4b5358..5e9cd4c 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -27,15 +27,19 @@
 
 static void mga_crtc_load_lut(struct drm_crtc *crtc)
 {
-   struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct mga_device *mdev = dev->dev_private;
struct drm_framebuffer *fb = crtc->primary->fb;
+   u16 *r_ptr, *g_ptr, *b_ptr;
int i;
 
if (!crtc->enabled)
return;
 
+   r_ptr = crtc->gamma_store;
+   g_ptr = r_ptr + crtc->gamma_size;
+   b_ptr = g_ptr + crtc->gamma_size;
+
WREG8(DAC_INDEX + MGA1064_INDEX, 0);
 
if (fb && fb->format->cpp[0] * 8 == 16) {
@@ -46,25 +50,27 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc)
if (i > (MGAG200_LUT_SIZE >> 1)) {
r = b = 0;
} else {
-   r = mga_crtc->lut_r[i << 1];
-   b = mga_crtc->lut_b[i << 1];
+   r = *r_ptr++ >> 8;
+   b = *b_ptr++ >> 8;
+   r_ptr++;
+   b_ptr++;
}
} else {
-   r = mga_crtc->lut_r[i];
-   b = mga_crtc->lut_b[i];
+   r = *r_ptr++ >> 8;
+   b = *b_ptr++ >> 8;
}
/* VGA registers */
WREG8(DAC_INDEX + MGA1064_COL_PAL, r);
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *g_ptr++ >> 8);
WREG8(DAC_INDEX + MGA1064_COL_PAL, b);
}
return;
}
for (i = 0; i < MGAG200_LUT_SIZE; i++) {
/* VGA registers */
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_r[i]);
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_b[i]);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *r_ptr++ >> 8);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *g_ptr++ >> 8);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *b_ptr++ >> 8);
}
 }
 
@@ -1399,14 +1405,6 @@ static int mga_crtc_gamma_set(struct drm_crtc *crtc, u16 
*red, u16 *green,
  u16 *blue, uint32_t size,
  struct drm_modeset_acquire_ctx *ctx)
 {
-   struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
-   int i;
-
-   for (i = 0; i < size; i++) {
-   mga_crtc->lut_r[i] = red[i] >> 8;
-   mga_crtc->lut_g[i] = green[i] >> 8;
-   mga_crtc->lut_b[i] = blue[i] >> 8;
-   }
mga_crtc_load_lut(crtc);
 
return 0;
@@ -1455,14 +1453,12 @@ static const struct drm_crtc_helper_funcs 
mga_helper_funcs = {
.mode_set_base = 

[Intel-gfx] [PATCH 10/11] drm: stm: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helper .load_lut is no longer used, and can not
work right without also providing the fb helpers .gamma_set and
.gamma_get thus rendering the code in this driver suspect.

Just remove the dead code.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/stm/ltdc.c | 12 
 drivers/gpu/drm/stm/ltdc.h |  1 -
 2 files changed, 13 deletions(-)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 1b9483d..87829b9 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -375,17 +375,6 @@ static irqreturn_t ltdc_irq(int irq, void *arg)
  * DRM_CRTC
  */
 
-static void ltdc_crtc_load_lut(struct drm_crtc *crtc)
-{
-   struct ltdc_device *ldev = crtc_to_ltdc(crtc);
-   unsigned int i, lay;
-
-   for (lay = 0; lay < ldev->caps.nb_layers; lay++)
-   for (i = 0; i < 256; i++)
-   reg_write(ldev->regs, LTDC_L1CLUTWR + lay * LAY_OFS,
- ldev->clut[i]);
-}
-
 static void ltdc_crtc_enable(struct drm_crtc *crtc)
 {
struct ltdc_device *ldev = crtc_to_ltdc(crtc);
@@ -523,7 +512,6 @@ static void ltdc_crtc_atomic_flush(struct drm_crtc *crtc,
 }
 
 static struct drm_crtc_helper_funcs ltdc_crtc_helper_funcs = {
-   .load_lut = ltdc_crtc_load_lut,
.enable = ltdc_crtc_enable,
.disable = ltdc_crtc_disable,
.mode_set_nofb = ltdc_crtc_mode_set_nofb,
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index d7a9c73..620ca55 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -27,7 +27,6 @@ struct ltdc_device {
struct drm_panel *panel;
struct mutex err_lock;  /* protecting error_status */
struct ltdc_caps caps;
-   u32 clut[256];  /* color look up table */
u32 error_status;
u32 irq_status;
 };
-- 
2.1.4

___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 05/11] dmr: gma500: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .gamma_set and .gamma_get are no longer
used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

It is a bit strange that the fb helper .load_lut was not hooked
up, so this change may well make the driver work for the C8 mode
from the fbdev interface. But that is untested.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/gma500/framebuffer.c   | 22 
 drivers/gpu/drm/gma500/gma_display.c   | 32 ++
 drivers/gpu/drm/gma500/psb_intel_display.c |  7 +--
 drivers/gpu/drm/gma500/psb_intel_drv.h |  1 -
 4 files changed, 12 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/gma500/framebuffer.c 
b/drivers/gpu/drm/gma500/framebuffer.c
index 7da70b6..2570c7f 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -479,26 +479,6 @@ static struct drm_framebuffer *psb_user_framebuffer_create
return psb_framebuffer_create(dev, cmd, r);
 }
 
-static void psbfb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-   u16 blue, int regno)
-{
-   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-
-   gma_crtc->lut_r[regno] = red >> 8;
-   gma_crtc->lut_g[regno] = green >> 8;
-   gma_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void psbfb_gamma_get(struct drm_crtc *crtc, u16 *red,
-   u16 *green, u16 *blue, int regno)
-{
-   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-
-   *red = gma_crtc->lut_r[regno] << 8;
-   *green = gma_crtc->lut_g[regno] << 8;
-   *blue = gma_crtc->lut_b[regno] << 8;
-}
-
 static int psbfb_probe(struct drm_fb_helper *helper,
struct drm_fb_helper_surface_size *sizes)
 {
@@ -525,8 +505,6 @@ static int psbfb_probe(struct drm_fb_helper *helper,
 }
 
 static const struct drm_fb_helper_funcs psb_fb_helper_funcs = {
-   .gamma_set = psbfb_gamma_set,
-   .gamma_get = psbfb_gamma_get,
.fb_probe = psbfb_probe,
 };
 
diff --git a/drivers/gpu/drm/gma500/gma_display.c 
b/drivers/gpu/drm/gma500/gma_display.c
index e7fd356..f3c48a2 100644
--- a/drivers/gpu/drm/gma500/gma_display.c
+++ b/drivers/gpu/drm/gma500/gma_display.c
@@ -144,33 +144,32 @@ void gma_crtc_load_lut(struct drm_crtc *crtc)
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
const struct psb_offset *map = _priv->regmap[gma_crtc->pipe];
int palreg = map->palette;
+   u16 *r, *g, *b;
int i;
 
/* The clocks have to be on to load the palette. */
if (!crtc->enabled)
return;
 
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
if (gma_power_begin(dev, false)) {
for (i = 0; i < 256; i++) {
REG_WRITE(palreg + 4 * i,
- ((gma_crtc->lut_r[i] +
- gma_crtc->lut_adj[i]) << 16) |
- ((gma_crtc->lut_g[i] +
- gma_crtc->lut_adj[i]) << 8) |
- (gma_crtc->lut_b[i] +
- gma_crtc->lut_adj[i]));
+ (((*r++ >> 8) + gma_crtc->lut_adj[i]) << 16) |
+ (((*g++ >> 8) + gma_crtc->lut_adj[i]) << 8) |
+ ((*b++ >> 8) + gma_crtc->lut_adj[i]));
}
gma_power_end(dev);
} else {
for (i = 0; i < 256; i++) {
/* FIXME: Why pipe[0] and not pipe[..._crtc->pipe]? */
dev_priv->regs.pipe[0].palette[i] =
- ((gma_crtc->lut_r[i] +
- gma_crtc->lut_adj[i]) << 16) |
- ((gma_crtc->lut_g[i] +
- gma_crtc->lut_adj[i]) << 8) |
- (gma_crtc->lut_b[i] +
- gma_crtc->lut_adj[i]);
+   (((*r++ >> 8) + gma_crtc->lut_adj[i]) << 16) |
+   (((*g++ >> 8) + gma_crtc->lut_adj[i]) << 8) |
+   ((*b++ >> 8) + gma_crtc->lut_adj[i]);
}
 
}
@@ -180,15 +179,6 @@ int gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, 
u16 *green, u16 *blue,
   u32 size,
   struct drm_modeset_acquire_ctx *ctx)
 {
-   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-   int i;
-
-   for (i = 0; i < size; i++) {
-   gma_crtc->lut_r[i] = red[i] >> 8;
-   gma_crtc->lut_g[i] = green[i] >> 8;
-   gma_crtc->lut_b[i] = blue[i] >> 8;
-   }
-
gma_crtc_load_lut(crtc);
 
return 0;
diff --git 

[Intel-gfx] [PATCH v2 12/14] drm: radeon: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/radeon/atombios_crtc.c  |  1 -
 drivers/gpu/drm/radeon/radeon_connectors.c  |  7 ++-
 drivers/gpu/drm/radeon/radeon_display.c | 71 -
 drivers/gpu/drm/radeon/radeon_fb.c  |  2 -
 drivers/gpu/drm/radeon/radeon_legacy_crtc.c |  1 -
 drivers/gpu/drm/radeon/radeon_mode.h|  4 --
 6 files changed, 33 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c 
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 3c492a0..02baaaf 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -2217,7 +2217,6 @@ static const struct drm_crtc_helper_funcs 
atombios_helper_funcs = {
.mode_set_base_atomic = atombios_crtc_set_base_atomic,
.prepare = atombios_crtc_prepare,
.commit = atombios_crtc_commit,
-   .load_lut = radeon_crtc_load_lut,
.disable = atombios_crtc_disable,
 };
 
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c 
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 27affbd..2f642cb 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -773,12 +773,15 @@ static int radeon_connector_set_property(struct 
drm_connector *connector, struct
 
if (connector->encoder->crtc) {
struct drm_crtc *crtc  = connector->encoder->crtc;
-   const struct drm_crtc_helper_funcs *crtc_funcs = 
crtc->helper_private;
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 
radeon_crtc->output_csc = radeon_encoder->output_csc;
 
-   (*crtc_funcs->load_lut)(crtc);
+   /*
+* Our .gamma_set assumes the .gamma_store has been
+* prefilled and don't care about its arguments.
+*/
+   crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);
}
}
 
diff --git a/drivers/gpu/drm/radeon/radeon_display.c 
b/drivers/gpu/drm/radeon/radeon_display.c
index 17d3daf..8b7d7a0 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -42,6 +42,7 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -60,11 +61,14 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
WREG32(AVIVO_DC_LUT_WRITE_EN_MASK, 0x003f);
 
WREG8(AVIVO_DC_LUT_RW_INDEX, 0);
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
for (i = 0; i < 256; i++) {
WREG32(AVIVO_DC_LUT_30_COLOR,
-(radeon_crtc->lut_r[i] << 20) |
-(radeon_crtc->lut_g[i] << 10) |
-(radeon_crtc->lut_b[i] << 0));
+  ((*r++ & 0xffc0) << 14) |
+  ((*g++ & 0xffc0) << 4) |
+  (*b++ >> 6));
}
 
/* Only change bit 0 of LUT_SEL, other bits are set elsewhere */
@@ -76,6 +80,7 @@ static void dce4_crtc_load_lut(struct drm_crtc *crtc)
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -93,11 +98,14 @@ static void dce4_crtc_load_lut(struct drm_crtc *crtc)
WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 
0x0007);
 
WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0);
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
for (i = 0; i < 256; i++) {
WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset,
-  (radeon_crtc->lut_r[i] << 20) |
-  (radeon_crtc->lut_g[i] << 10) |
-  (radeon_crtc->lut_b[i] << 0));
+  ((*r++ & 0xffc0) << 14) |
+  ((*g++ & 0xffc0) << 4) |
+  (*b++ >> 6));
}
 }
 
@@ -106,6 +114,7 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc)
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
DRM_DEBUG_KMS("%d\n", 

[Intel-gfx] [PATCH v2 05/14] drm: armada: remove dead empty functions

[Peter Rosin]

The redundant fb helpers .gamma_set and .gamma_get are no longer used.
Remove the dead code.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/armada/armada_crtc.c  | 10 --
 drivers/gpu/drm/armada/armada_crtc.h  |  2 --
 drivers/gpu/drm/armada/armada_fbdev.c |  2 --
 3 files changed, 14 deletions(-)

diff --git a/drivers/gpu/drm/armada/armada_crtc.c 
b/drivers/gpu/drm/armada/armada_crtc.c
index 4fe19fd..96bccf8 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -334,16 +334,6 @@ static void armada_drm_vblank_off(struct armada_crtc 
*dcrtc)
armada_drm_plane_work_run(dcrtc, dcrtc->crtc.primary);
 }
 
-void armada_drm_crtc_gamma_set(struct drm_crtc *crtc, u16 r, u16 g, u16 b,
-   int idx)
-{
-}
-
-void armada_drm_crtc_gamma_get(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
-   int idx)
-{
-}
-
 /* The mode_config.mutex will be held for this call */
 static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int dpms)
 {
diff --git a/drivers/gpu/drm/armada/armada_crtc.h 
b/drivers/gpu/drm/armada/armada_crtc.h
index 7e8906d..bab11f4 100644
--- a/drivers/gpu/drm/armada/armada_crtc.h
+++ b/drivers/gpu/drm/armada/armada_crtc.h
@@ -102,8 +102,6 @@ struct armada_crtc {
 };
 #define drm_to_armada_crtc(c) container_of(c, struct armada_crtc, crtc)
 
-void armada_drm_crtc_gamma_set(struct drm_crtc *, u16, u16, u16, int);
-void armada_drm_crtc_gamma_get(struct drm_crtc *, u16 *, u16 *, u16 *, int);
 void armada_drm_crtc_update_regs(struct armada_crtc *, struct armada_regs *);
 
 void armada_drm_crtc_plane_disable(struct armada_crtc *dcrtc,
diff --git a/drivers/gpu/drm/armada/armada_fbdev.c 
b/drivers/gpu/drm/armada/armada_fbdev.c
index 602dfea..5fa076d 100644
--- a/drivers/gpu/drm/armada/armada_fbdev.c
+++ b/drivers/gpu/drm/armada/armada_fbdev.c
@@ -118,8 +118,6 @@ static int armada_fb_probe(struct drm_fb_helper *fbh,
 }
 
 static const struct drm_fb_helper_funcs armada_fb_helper_funcs = {
-   .gamma_set  = armada_drm_crtc_gamma_set,
-   .gamma_get  = armada_drm_crtc_gamma_get,
.fb_probe   = armada_fb_probe,
 };
 
-- 
2.1.4

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[Intel-gfx] [PATCH v2 03/14] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set

[Peter Rosin]

This makes the redundant fb helpers .load_lut, .gamma_set and .gamma_get
totally obsolete.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/drm_fb_helper.c | 151 +---
 1 file changed, 63 insertions(+), 88 deletions(-)

This is an alternative version rebased on top of Daniel's "fbdev helper
locking rework and deferred setup" series.

And as noted by Daniel, .gamma_set does an atomic commit. Thus, the locks
needs to be dropped and reacquired for each crtc. So, that is fixed here
too. Doing it like this with a couple of individual alternative patches
instead of sending a whole new series since the dependency on Daniel's
series makes life somewhat difficult...

Cheers,
peda

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 4aceb59..aa025f1 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1257,50 +1257,6 @@ void drm_fb_helper_set_suspend_unlocked(struct 
drm_fb_helper *fb_helper,
 }
 EXPORT_SYMBOL(drm_fb_helper_set_suspend_unlocked);
 
-static int setcolreg(struct drm_crtc *crtc, u16 red, u16 green,
-u16 blue, u16 regno, struct fb_info *info)
-{
-   struct drm_fb_helper *fb_helper = info->par;
-   struct drm_framebuffer *fb = fb_helper->fb;
-
-   if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-   u32 *palette;
-   u32 value;
-   /* place color in psuedopalette */
-   if (regno > 16)
-   return -EINVAL;
-   palette = (u32 *)info->pseudo_palette;
-   red >>= (16 - info->var.red.length);
-   green >>= (16 - info->var.green.length);
-   blue >>= (16 - info->var.blue.length);
-   value = (red << info->var.red.offset) |
-   (green << info->var.green.offset) |
-   (blue << info->var.blue.offset);
-   if (info->var.transp.length > 0) {
-   u32 mask = (1 << info->var.transp.length) - 1;
-
-   mask <<= info->var.transp.offset;
-   value |= mask;
-   }
-   palette[regno] = value;
-   return 0;
-   }
-
-   /*
-* The driver really shouldn't advertise pseudo/directcolor
-* visuals if it can't deal with the palette.
-*/
-   if (WARN_ON(!fb_helper->funcs->gamma_set ||
-   !fb_helper->funcs->gamma_get))
-   return -EINVAL;
-
-   WARN_ON(fb->format->cpp[0] != 1);
-
-   fb_helper->funcs->gamma_set(crtc, red, green, blue, regno);
-
-   return 0;
-}
-
 /**
  * drm_fb_helper_setcmap - implementation for _ops.fb_setcmap
  * @cmap: cmap to set
@@ -1310,12 +1266,10 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
 {
struct drm_fb_helper *fb_helper = info->par;
struct drm_device *dev = fb_helper->dev;
-   const struct drm_crtc_helper_funcs *crtc_funcs;
-   u16 *red, *green, *blue, *transp;
+   struct drm_modeset_acquire_ctx ctx;
struct drm_crtc *crtc;
u16 *r, *g, *b;
-   int i, j, rc = 0;
-   int start;
+   int i, ret = 0;
 
if (oops_in_progress)
return -EBUSY;
@@ -1329,61 +1283,82 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
return -EBUSY;
}
 
-   drm_modeset_lock_all(dev);
-   for (i = 0; i < fb_helper->crtc_count; i++) {
-   crtc = fb_helper->crtc_info[i].mode_set.crtc;
-   crtc_funcs = crtc->helper_private;
+   drm_modeset_acquire_init(, 0);
 
-   red = cmap->red;
-   green = cmap->green;
-   blue = cmap->blue;
-   transp = cmap->transp;
-   start = cmap->start;
+   for (i = 0; i < fb_helper->crtc_count; i++) {
+   if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
+   u32 *palette;
+   int j;
 
-   if (info->fix.visual != FB_VISUAL_TRUECOLOR) {
-   if (!crtc->gamma_size) {
-   rc = -EINVAL;
-   goto out;
+   if (cmap->start + cmap->len > 16) {
+   ret = -EINVAL;
+   break;
}
 
-   if (cmap->start + cmap->len > crtc->gamma_size) {
-   rc = -EINVAL;
-   goto out;
+   palette = (u32 *)info->pseudo_palette;
+   for (j = 0; j < cmap->len; ++j) {
+   u16 red = cmap->red[j];
+   u16 green = cmap->green[j];
+   u16 blue = cmap->blue[j];
+   u32 value;
+
+   red >>= 16 - info->var.red.length;
+ 

Re: [Intel-gfx] [PATCH v2 13/14] drm: stm: remove dead code and pointless local lut storage

[Peter Rosin]

On 2017-06-22 13:49, Philippe CORNU wrote:
> On 06/22/2017 08:06 AM, Peter Rosin wrote:
>> The redundant fb helper .load_lut is no longer used, and can not
>> work right without also providing the fb helpers .gamma_set and
>> .gamma_get thus rendering the code in this driver suspect.
>>
> 
> Hi Peter,
> STM32 chipsets supports 8-bit CLUT mode but this driver version does not 
> support it "yet" (final patch has not been upstreamed because it was a 
> too big fbdev patch for simply adding CLUT...).
> 
> Regarding your patch below, if it helps you to ease the drm framework 
> update then I am agree to "acknowledge it" asap, else if you are not in 
> a hurry, I would prefer a better and definitive patch handling 8-bit 
> CLUT properly and I am ok to help or/and to do it : )

Hi!

The thing is, without my series you will have to provide four callbacks.
The crtc .gamma_set and the three redundant fb helpers .gamma_get,
.gamma_set and .load_lut that pretty much does exactly what the crtc
.gamma_set is doing. Well not .gamma_get, but...

With my series, you only have to provide the crtc .gamma_set, which you
have to provide anyway. and ...the core will handle everything that
.gamma_get was used for...

I.e., your work to provide CLUT support should start with drm support,
which means the crtc .gamma_set, and then move on to the fbdev
emulation. And I have just eliminated the second step for you, and
as suger on top, you no longer have to convince the core drm maintainers
that adding a lot of fbdev emulation code is needed.

So, I think you actually want to wait for my series to land before adding
CLUT support.

> Extra questions:
> - any plan to update modetest with the DRM_FORMAT_C8 support + gamma 
> get/set?

I don't know that code base at all, but from the glimpse I got when browsing
it, it seemed like it was pretty hardwired to non-palettized modes. I ended
up having no need for it, see below...

> - do you have a simple way to test clut with fbdev, last year we where 
> using an old version of the SDL but I am still looking for a small piece 
> of code to do it (else I will do it myself but C8 on fbdev is not really 
> a priority ;-)

I'm doing pretty much the same thing, I have an application that requires
an old SDL, and I'm using the programs/demos/demo.c program from the very
old libggi as a second test app. But that's just because libggi is what
I'm most familiar with, and it doesn't try to be "nice" and do things
automatically, instead you have to manually insert helpers providing
e.g. palette emulation if the application assumes a palettized mode and
only truecolor modes are available from the HW. SDL tends to add those
things for you, making it less easy to test thing, but I'm not an
"SDL-guy", so there may very well exist some knobs I don't know about.

Oh, you probably didn't see this:
http://marc.info/?l=linux-kernel=149786920731175=4

It sports modeset-pal.c that sets the C8 mode, and does a 5 second
palette animation, w/o using fbdev. I used it instead of digging
further into modetest.

Cheers,
peda
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[Intel-gfx] [PATCH 09/11] drm: radeon: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/radeon/atombios_crtc.c  |  1 -
 drivers/gpu/drm/radeon/radeon_connectors.c  |  7 ++-
 drivers/gpu/drm/radeon/radeon_display.c | 71 -
 drivers/gpu/drm/radeon/radeon_fb.c  |  2 -
 drivers/gpu/drm/radeon/radeon_legacy_crtc.c |  1 -
 5 files changed, 33 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c 
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 3c492a0..02baaaf 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -2217,7 +2217,6 @@ static const struct drm_crtc_helper_funcs 
atombios_helper_funcs = {
.mode_set_base_atomic = atombios_crtc_set_base_atomic,
.prepare = atombios_crtc_prepare,
.commit = atombios_crtc_commit,
-   .load_lut = radeon_crtc_load_lut,
.disable = atombios_crtc_disable,
 };
 
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c 
b/drivers/gpu/drm/radeon/radeon_connectors.c
index 27affbd..2f642cb 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -773,12 +773,15 @@ static int radeon_connector_set_property(struct 
drm_connector *connector, struct
 
if (connector->encoder->crtc) {
struct drm_crtc *crtc  = connector->encoder->crtc;
-   const struct drm_crtc_helper_funcs *crtc_funcs = 
crtc->helper_private;
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 
radeon_crtc->output_csc = radeon_encoder->output_csc;
 
-   (*crtc_funcs->load_lut)(crtc);
+   /*
+* Our .gamma_set assumes the .gamma_store has been
+* prefilled and don't care about its arguments.
+*/
+   crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);
}
}
 
diff --git a/drivers/gpu/drm/radeon/radeon_display.c 
b/drivers/gpu/drm/radeon/radeon_display.c
index 17d3daf..8b7d7a0 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -42,6 +42,7 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -60,11 +61,14 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc)
WREG32(AVIVO_DC_LUT_WRITE_EN_MASK, 0x003f);
 
WREG8(AVIVO_DC_LUT_RW_INDEX, 0);
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
for (i = 0; i < 256; i++) {
WREG32(AVIVO_DC_LUT_30_COLOR,
-(radeon_crtc->lut_r[i] << 20) |
-(radeon_crtc->lut_g[i] << 10) |
-(radeon_crtc->lut_b[i] << 0));
+  ((*r++ & 0xffc0) << 14) |
+  ((*g++ & 0xffc0) << 4) |
+  (*b++ >> 6));
}
 
/* Only change bit 0 of LUT_SEL, other bits are set elsewhere */
@@ -76,6 +80,7 @@ static void dce4_crtc_load_lut(struct drm_crtc *crtc)
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -93,11 +98,14 @@ static void dce4_crtc_load_lut(struct drm_crtc *crtc)
WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 
0x0007);
 
WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0);
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
for (i = 0; i < 256; i++) {
WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset,
-  (radeon_crtc->lut_r[i] << 20) |
-  (radeon_crtc->lut_g[i] << 10) |
-  (radeon_crtc->lut_b[i] << 0));
+  ((*r++ & 0xffc0) << 14) |
+  ((*g++ & 0xffc0) << 4) |
+  (*b++ >> 6));
}
 }
 
@@ -106,6 +114,7 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc)
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct radeon_device *rdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id);
@@ -135,11 +144,14 @@ static void 

[Intel-gfx] [PATCH v2 08/14] drm: gma500: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .gamma_set and .gamma_get are no longer
used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/gma500/framebuffer.c   | 22 
 drivers/gpu/drm/gma500/gma_display.c   | 32 ++
 drivers/gpu/drm/gma500/psb_intel_display.c |  7 +--
 drivers/gpu/drm/gma500/psb_intel_drv.h |  1 -
 4 files changed, 12 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/gma500/framebuffer.c 
b/drivers/gpu/drm/gma500/framebuffer.c
index 7da70b6..2570c7f 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -479,26 +479,6 @@ static struct drm_framebuffer *psb_user_framebuffer_create
return psb_framebuffer_create(dev, cmd, r);
 }
 
-static void psbfb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-   u16 blue, int regno)
-{
-   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-
-   gma_crtc->lut_r[regno] = red >> 8;
-   gma_crtc->lut_g[regno] = green >> 8;
-   gma_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void psbfb_gamma_get(struct drm_crtc *crtc, u16 *red,
-   u16 *green, u16 *blue, int regno)
-{
-   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-
-   *red = gma_crtc->lut_r[regno] << 8;
-   *green = gma_crtc->lut_g[regno] << 8;
-   *blue = gma_crtc->lut_b[regno] << 8;
-}
-
 static int psbfb_probe(struct drm_fb_helper *helper,
struct drm_fb_helper_surface_size *sizes)
 {
@@ -525,8 +505,6 @@ static int psbfb_probe(struct drm_fb_helper *helper,
 }
 
 static const struct drm_fb_helper_funcs psb_fb_helper_funcs = {
-   .gamma_set = psbfb_gamma_set,
-   .gamma_get = psbfb_gamma_get,
.fb_probe = psbfb_probe,
 };
 
diff --git a/drivers/gpu/drm/gma500/gma_display.c 
b/drivers/gpu/drm/gma500/gma_display.c
index e7fd356..f3c48a2 100644
--- a/drivers/gpu/drm/gma500/gma_display.c
+++ b/drivers/gpu/drm/gma500/gma_display.c
@@ -144,33 +144,32 @@ void gma_crtc_load_lut(struct drm_crtc *crtc)
struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
const struct psb_offset *map = _priv->regmap[gma_crtc->pipe];
int palreg = map->palette;
+   u16 *r, *g, *b;
int i;
 
/* The clocks have to be on to load the palette. */
if (!crtc->enabled)
return;
 
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
if (gma_power_begin(dev, false)) {
for (i = 0; i < 256; i++) {
REG_WRITE(palreg + 4 * i,
- ((gma_crtc->lut_r[i] +
- gma_crtc->lut_adj[i]) << 16) |
- ((gma_crtc->lut_g[i] +
- gma_crtc->lut_adj[i]) << 8) |
- (gma_crtc->lut_b[i] +
- gma_crtc->lut_adj[i]));
+ (((*r++ >> 8) + gma_crtc->lut_adj[i]) << 16) |
+ (((*g++ >> 8) + gma_crtc->lut_adj[i]) << 8) |
+ ((*b++ >> 8) + gma_crtc->lut_adj[i]));
}
gma_power_end(dev);
} else {
for (i = 0; i < 256; i++) {
/* FIXME: Why pipe[0] and not pipe[..._crtc->pipe]? */
dev_priv->regs.pipe[0].palette[i] =
- ((gma_crtc->lut_r[i] +
- gma_crtc->lut_adj[i]) << 16) |
- ((gma_crtc->lut_g[i] +
- gma_crtc->lut_adj[i]) << 8) |
- (gma_crtc->lut_b[i] +
- gma_crtc->lut_adj[i]);
+   (((*r++ >> 8) + gma_crtc->lut_adj[i]) << 16) |
+   (((*g++ >> 8) + gma_crtc->lut_adj[i]) << 8) |
+   ((*b++ >> 8) + gma_crtc->lut_adj[i]);
}
 
}
@@ -180,15 +179,6 @@ int gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, 
u16 *green, u16 *blue,
   u32 size,
   struct drm_modeset_acquire_ctx *ctx)
 {
-   struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-   int i;
-
-   for (i = 0; i < size; i++) {
-   gma_crtc->lut_r[i] = red[i] >> 8;
-   gma_crtc->lut_g[i] = green[i] >> 8;
-   gma_crtc->lut_b[i] = blue[i] >> 8;
-   }
-
gma_crtc_load_lut(crtc);
 
return 0;
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c 
b/drivers/gpu/drm/gma500/psb_intel_display.c
index 7b6c849..8762efa 100644
--- a/drivers/gpu/drm/gma500/psb_intel_display.c
+++ 

[Intel-gfx] [PATCH 04/11] drm: cirrus: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/cirrus/cirrus_drv.h   |  8 
 drivers/gpu/drm/cirrus/cirrus_fbdev.c |  2 -
 drivers/gpu/drm/cirrus/cirrus_mode.c  | 71 ---
 3 files changed, 16 insertions(+), 65 deletions(-)

diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.h 
b/drivers/gpu/drm/cirrus/cirrus_drv.h
index 8690352..be2d7e48 100644
--- a/drivers/gpu/drm/cirrus/cirrus_drv.h
+++ b/drivers/gpu/drm/cirrus/cirrus_drv.h
@@ -96,7 +96,6 @@
 
 struct cirrus_crtc {
struct drm_crtc base;
-   u8  lut_r[256], lut_g[256], lut_b[256];
int last_dpms;
boolenabled;
 };
@@ -180,13 +179,6 @@ cirrus_bo(struct ttm_buffer_object *bo)
 #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
 #define DRM_FILE_PAGE_OFFSET (0x1ULL >> PAGE_SHIFT)
 
-   /* cirrus_mode.c */
-void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-u16 blue, int regno);
-void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-u16 *blue, int regno);
-
-
/* cirrus_main.c */
 int cirrus_device_init(struct cirrus_device *cdev,
  struct drm_device *ddev,
diff --git a/drivers/gpu/drm/cirrus/cirrus_fbdev.c 
b/drivers/gpu/drm/cirrus/cirrus_fbdev.c
index 7fa58ee..1fedab0 100644
--- a/drivers/gpu/drm/cirrus/cirrus_fbdev.c
+++ b/drivers/gpu/drm/cirrus/cirrus_fbdev.c
@@ -265,8 +265,6 @@ static int cirrus_fbdev_destroy(struct drm_device *dev,
 }
 
 static const struct drm_fb_helper_funcs cirrus_fb_helper_funcs = {
-   .gamma_set = cirrus_crtc_fb_gamma_set,
-   .gamma_get = cirrus_crtc_fb_gamma_get,
.fb_probe = cirrusfb_create,
 };
 
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c 
b/drivers/gpu/drm/cirrus/cirrus_mode.c
index 53f6f0f..a4c4a46 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
@@ -31,25 +31,6 @@
  * This file contains setup code for the CRTC.
  */
 
-static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
-{
-   struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
-   struct drm_device *dev = crtc->dev;
-   struct cirrus_device *cdev = dev->dev_private;
-   int i;
-
-   if (!crtc->enabled)
-   return;
-
-   for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
-   /* VGA registers */
-   WREG8(PALETTE_INDEX, i);
-   WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
-   WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
-   WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
-   }
-}
-
 /*
  * The DRM core requires DPMS functions, but they make little sense in our
  * case and so are just stubs
@@ -330,15 +311,25 @@ static int cirrus_crtc_gamma_set(struct drm_crtc *crtc, 
u16 *red, u16 *green,
 u16 *blue, uint32_t size,
 struct drm_modeset_acquire_ctx *ctx)
 {
-   struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
+   struct drm_device *dev = crtc->dev;
+   struct cirrus_device *cdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
-   for (i = 0; i < size; i++) {
-   cirrus_crtc->lut_r[i] = red[i];
-   cirrus_crtc->lut_g[i] = green[i];
-   cirrus_crtc->lut_b[i] = blue[i];
+   if (!crtc->enabled)
+   return 0;
+
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
+   for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
+   /* VGA registers */
+   WREG8(PALETTE_INDEX, i);
+   WREG8(PALETTE_DATA, *r++ >> 8);
+   WREG8(PALETTE_DATA, *g++ >> 8);
+   WREG8(PALETTE_DATA, *b++ >> 8);
}
-   cirrus_crtc_load_lut(crtc);
 
return 0;
 }
@@ -365,7 +356,6 @@ static const struct drm_crtc_helper_funcs 
cirrus_helper_funcs = {
.mode_set_base = cirrus_crtc_mode_set_base,
.prepare = cirrus_crtc_prepare,
.commit = cirrus_crtc_commit,
-   .load_lut = cirrus_crtc_load_lut,
 };
 
 /* CRTC setup */
@@ -373,7 +363,6 @@ static void cirrus_crtc_init(struct drm_device *dev)
 {
struct cirrus_device *cdev = dev->dev_private;
struct cirrus_crtc *cirrus_crtc;
-   int i;
 
cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
  (CIRRUSFB_CONN_LIMIT * sizeof(struct 
drm_connector *)),
@@ -387,37 +376,9 @@ static void cirrus_crtc_init(struct drm_device *dev)
drm_mode_crtc_set_gamma_size(_crtc->base, CIRRUS_LUT_SIZE);
 

[Intel-gfx] [PATCH 07/11] drm: mgag200: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |  5 ---
 drivers/gpu/drm/mgag200/mgag200_fb.c   |  2 --
 drivers/gpu/drm/mgag200/mgag200_mode.c | 62 --
 3 files changed, 15 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h 
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index c88b6ec..04f1dfb 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -237,11 +237,6 @@ mgag200_bo(struct ttm_buffer_object *bo)
 {
return container_of(bo, struct mgag200_bo, bo);
 }
-   /* mgag200_crtc.c */
-void mga_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-u16 blue, int regno);
-void mga_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-u16 *blue, int regno);
 
/* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
diff --git a/drivers/gpu/drm/mgag200/mgag200_fb.c 
b/drivers/gpu/drm/mgag200/mgag200_fb.c
index 5d3b1fa..5cf980a 100644
--- a/drivers/gpu/drm/mgag200/mgag200_fb.c
+++ b/drivers/gpu/drm/mgag200/mgag200_fb.c
@@ -258,8 +258,6 @@ static int mga_fbdev_destroy(struct drm_device *dev,
 }
 
 static const struct drm_fb_helper_funcs mga_fb_helper_funcs = {
-   .gamma_set = mga_crtc_fb_gamma_set,
-   .gamma_get = mga_crtc_fb_gamma_get,
.fb_probe = mgag200fb_create,
 };
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c 
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index adb411a..117bec3 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -27,15 +27,19 @@
 
 static void mga_crtc_load_lut(struct drm_crtc *crtc)
 {
-   struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct mga_device *mdev = dev->dev_private;
struct drm_framebuffer *fb = crtc->primary->fb;
+   u16 *r_ptr, *g_ptr, *b_ptr;
int i;
 
if (!crtc->enabled)
return;
 
+   r_ptr = crtc->gamma_store;
+   g_ptr = r_ptr + crtc->gamma_size;
+   b_ptr = g_ptr + crtc->gamma_size;
+
WREG8(DAC_INDEX + MGA1064_INDEX, 0);
 
if (fb && fb->format->cpp[0] * 8 == 16) {
@@ -46,25 +50,27 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc)
if (i > (MGAG200_LUT_SIZE >> 1)) {
r = b = 0;
} else {
-   r = mga_crtc->lut_r[i << 1];
-   b = mga_crtc->lut_b[i << 1];
+   r = *r_ptr++ >> 8;
+   b = *b_ptr++ >> 8;
+   r_ptr++;
+   b_ptr++;
}
} else {
-   r = mga_crtc->lut_r[i];
-   b = mga_crtc->lut_b[i];
+   r = *r_ptr++ >> 8;
+   b = *b_ptr++ >> 8;
}
/* VGA registers */
WREG8(DAC_INDEX + MGA1064_COL_PAL, r);
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *g_ptr++ >> 8);
WREG8(DAC_INDEX + MGA1064_COL_PAL, b);
}
return;
}
for (i = 0; i < MGAG200_LUT_SIZE; i++) {
/* VGA registers */
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_r[i]);
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_g[i]);
-   WREG8(DAC_INDEX + MGA1064_COL_PAL, mga_crtc->lut_b[i]);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *r_ptr++ >> 8);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *g_ptr++ >> 8);
+   WREG8(DAC_INDEX + MGA1064_COL_PAL, *b_ptr++ >> 8);
}
 }
 
@@ -1396,14 +1402,6 @@ static int mga_crtc_gamma_set(struct drm_crtc *crtc, u16 
*red, u16 *green,
  u16 *blue, uint32_t size,
  struct drm_modeset_acquire_ctx *ctx)
 {
-   struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
-   int i;
-
-   for (i = 0; i < size; i++) {
-   mga_crtc->lut_r[i] = red[i] >> 8;
-   mga_crtc->lut_g[i] = green[i] >> 8;
-   mga_crtc->lut_b[i] = blue[i] >> 8;
-   }
mga_crtc_load_lut(crtc);
 
return 0;
@@ -1452,14 +1450,12 @@ static const struct drm_crtc_helper_funcs 
mga_helper_funcs = {
.mode_set_base = 

[Intel-gfx] [PATCH v2 14/14] drm: remove unused and redundant callbacks

[Peter Rosin]

Drivers no longer have any need for these callbacks, and there are no
users. Zap. Zap-zap-zzzap-p-pp-p.

Signed-off-by: Peter Rosin 
---
 include/drm/drm_fb_helper.h  | 32 
 include/drm/drm_modeset_helper_vtables.h | 16 
 2 files changed, 48 deletions(-)

diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index 119e5e4..80d9853 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -85,38 +85,6 @@ struct drm_fb_helper_surface_size {
  */
 struct drm_fb_helper_funcs {
/**
-* @gamma_set:
-*
-* Set the given gamma LUT register on the given CRTC.
-*
-* This callback is optional.
-*
-* FIXME:
-*
-* This callback is functionally redundant with the core gamma table
-* support and simply exists because the fbdev hasn't yet been
-* refactored to use the core gamma table interfaces.
-*/
-   void (*gamma_set)(struct drm_crtc *crtc, u16 red, u16 green,
- u16 blue, int regno);
-   /**
-* @gamma_get:
-*
-* Read the given gamma LUT register on the given CRTC, used to save the
-* current LUT when force-restoring the fbdev for e.g. kdbg.
-*
-* This callback is optional.
-*
-* FIXME:
-*
-* This callback is functionally redundant with the core gamma table
-* support and simply exists because the fbdev hasn't yet been
-* refactored to use the core gamma table interfaces.
-*/
-   void (*gamma_get)(struct drm_crtc *crtc, u16 *red, u16 *green,
- u16 *blue, int regno);
-
-   /**
 * @fb_probe:
 *
 * Driver callback to allocate and initialize the fbdev info structure.
diff --git a/include/drm/drm_modeset_helper_vtables.h 
b/include/drm/drm_modeset_helper_vtables.h
index 85984b2..0773db9 100644
--- a/include/drm/drm_modeset_helper_vtables.h
+++ b/include/drm/drm_modeset_helper_vtables.h
@@ -267,22 +267,6 @@ struct drm_crtc_helper_funcs {
enum mode_set_atomic);
 
/**
-* @load_lut:
-*
-* Load a LUT prepared with the _fb_helper_funcs.gamma_set vfunc.
-*
-* This callback is optional and is only used by the fbdev emulation
-* helpers.
-*
-* FIXME:
-*
-* This callback is functionally redundant with the core gamma table
-* support and simply exists because the fbdev hasn't yet been
-* refactored to use the core gamma table interfaces.
-*/
-   void (*load_lut)(struct drm_crtc *crtc);
-
-   /**
 * @disable:
 *
 * This callback should be used to disable the CRTC. With the atomic
-- 
2.1.4

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Re: [Intel-gfx] [PATCH 08/11] drm: nouveau: remove dead code and pointless local lut storage

[Peter Rosin]

On 2017-06-20 21:25, Peter Rosin wrote:
> The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
> no longer used. Remove the dead code and hook up the crtc .gamma_set
> to use the crtc gamma_store directly instead of duplicating that
> info locally.

[...]

> - for (i = 0; i < 256; i++) {
> - u16 r = nv_crtc->lut.r[i] >> 2;
> - u16 g = nv_crtc->lut.g[i] >> 2;
> - u16 b = nv_crtc->lut.b[i] >> 2;
> + r = crtc->gamma_store;
> + g = r + crtc->gamma_size;
> + b = g + crtc->gamma_size;
>  
> + for (i = 0; i < 256; i++) {
>   if (disp->disp->oclass < GF110_DISP) {
> - writew(r + 0x, lut + (i * 0x08) + 0);
> - writew(g + 0x, lut + (i * 0x08) + 2);
> - writew(b + 0x, lut + (i * 0x08) + 4);
> + writew((*r++ >> 2) + 0x, lut + (i * 0x08) + 0);
> + writew((*g++ >> 2) + 0x, lut + (i * 0x08) + 2);
> + writew((*b++ >> 2) + 0x, lut + (i * 0x08) + 4);
>   } else {
> - writew(r + 0x6000, lut + (i * 0x20) + 0);
> - writew(g + 0x6000, lut + (i * 0x20) + 2);
> - writew(b + 0x6000, lut + (i * 0x20) + 4);
> + writew((*r++ >> 2) + 0x6000, lut + (i * 0x20) + 0);
> + writew((*g++ >> 2) + 0x6000, lut + (i * 0x20) + 2);
> + writew((*b++ >> 2) + 0x6000, lut + (i * 0x20) + 4);
>   }
>   }
>  }

I forgot to mention this, but the above is very strange for
disp->disp->oclass >= GF110_DISP because 0x6000 interferes with
the 14 bits that appear to be the lut depth in the registers.

I suspect some other bit-shift should be used for that case?

Someone should probably consult a datasheet...

Cheers,
peda
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[Intel-gfx] [PATCH 00/11] improve the fb_setcmap helper

[Peter Rosin]

Hi!

While trying to get CLUT support for the atmel_hlcdc driver, and
specifically for the emulated fbdev interface, I received some
push-back that my feeble in-driver attempts should be solved
by the core. This is my attempt to do it right.

Boris and Daniel, was this approximately what you had in mind?

I have obviously not tested all of this with more than a compile,
but the first patch is enough to make the atmel-hlcdc driver
do what I need. The rest is just lots of removals and cleanup
made possible by the improved core.

Please test, I would not be surprised if I have fouled up some
bit-manipulation somewhere in this mostly mechanical change...

Cheers,
peda

Peter Rosin (11):
  drm/fb-helper: do a generic fb_setcmap helper in terms of crtc
.gamma_set
  drm: amd: remove dead code and pointless local lut storage
  drm: ast: remove dead code and pointless local lut storage
  drm: cirrus: remove dead code and pointless local lut storage
  dmr: gma500: remove dead code and pointless local lut storage
  drm: i915: remove dead code and pointless local lut storage
  drm: mgag200: remove dead code and pointless local lut storage
  drm: nouveau: remove dead code and pointless local lut storage
  drm: radeon: remove dead code and pointless local lut storage
  drm: stm: remove dead code and pointless local lut storage
  drm: remove unused and redundant callbacks

 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c  |  24 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h|   1 -
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c  |  27 ++
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c  |  27 ++
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c   |  27 ++
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c   |  27 ++
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c|  23 -
 drivers/gpu/drm/ast/ast_drv.h   |   1 -
 drivers/gpu/drm/ast/ast_fb.c|  20 -
 drivers/gpu/drm/ast/ast_mode.c  |  26 ++
 drivers/gpu/drm/cirrus/cirrus_drv.h |   8 --
 drivers/gpu/drm/cirrus/cirrus_fbdev.c   |   2 -
 drivers/gpu/drm/cirrus/cirrus_mode.c|  71 ---
 drivers/gpu/drm/drm_fb_helper.c | 131 +---
 drivers/gpu/drm/gma500/framebuffer.c|  22 -
 drivers/gpu/drm/gma500/gma_display.c|  32 +++
 drivers/gpu/drm/gma500/psb_intel_display.c  |   7 +-
 drivers/gpu/drm/gma500/psb_intel_drv.h  |   1 -
 drivers/gpu/drm/i915/intel_drv.h|   1 -
 drivers/gpu/drm/i915/intel_fbdev.c  |  31 ---
 drivers/gpu/drm/mgag200/mgag200_drv.h   |   5 --
 drivers/gpu/drm/mgag200/mgag200_fb.c|   2 -
 drivers/gpu/drm/mgag200/mgag200_mode.c  |  62 -
 drivers/gpu/drm/nouveau/dispnv04/crtc.c |  26 ++
 drivers/gpu/drm/nouveau/nouveau_crtc.h  |   3 -
 drivers/gpu/drm/nouveau/nouveau_fbcon.c |  22 -
 drivers/gpu/drm/nouveau/nv50_display.c  |  39 +++--
 drivers/gpu/drm/radeon/atombios_crtc.c  |   1 -
 drivers/gpu/drm/radeon/radeon_connectors.c  |   7 +-
 drivers/gpu/drm/radeon/radeon_display.c |  71 ++-
 drivers/gpu/drm/radeon/radeon_fb.c  |   2 -
 drivers/gpu/drm/radeon/radeon_legacy_crtc.c |   1 -
 drivers/gpu/drm/stm/ltdc.c  |  12 ---
 drivers/gpu/drm/stm/ltdc.h  |   1 -
 include/drm/drm_fb_helper.h |  32 ---
 include/drm/drm_modeset_helper_vtables.h|  16 
 36 files changed, 171 insertions(+), 640 deletions(-)

-- 
2.1.4

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[Intel-gfx] [PATCH 02/11] drm: amd: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c   | 24 
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h |  1 -
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c   | 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c   | 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c| 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c| 27 +++
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 23 ---
 7 files changed, 28 insertions(+), 128 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index c0d8c6f..7dc3780 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -312,31 +312,7 @@ static int amdgpu_fbdev_destroy(struct drm_device *dev, 
struct amdgpu_fbdev *rfb
return 0;
 }
 
-/** Sets the color ramps on behalf of fbcon */
-static void amdgpu_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
- u16 blue, int regno)
-{
-   struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-
-   amdgpu_crtc->lut_r[regno] = red >> 6;
-   amdgpu_crtc->lut_g[regno] = green >> 6;
-   amdgpu_crtc->lut_b[regno] = blue >> 6;
-}
-
-/** Gets the color ramps on behalf of fbcon */
-static void amdgpu_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 
*green,
- u16 *blue, int regno)
-{
-   struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-
-   *red = amdgpu_crtc->lut_r[regno] << 6;
-   *green = amdgpu_crtc->lut_g[regno] << 6;
-   *blue = amdgpu_crtc->lut_b[regno] << 6;
-}
-
 static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = {
-   .gamma_set = amdgpu_crtc_fb_gamma_set,
-   .gamma_get = amdgpu_crtc_fb_gamma_get,
.fb_probe = amdgpufb_create,
 };
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 43a9d3a..39f7eda 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -369,7 +369,6 @@ struct amdgpu_atom_ss {
 struct amdgpu_crtc {
struct drm_crtc base;
int crtc_id;
-   u16 lut_r[256], lut_g[256], lut_b[256];
bool enabled;
bool can_tile;
uint32_t crtc_offset;
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 3c62c45..8e8c028 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2264,6 +2264,7 @@ static void dce_v10_0_crtc_load_lut(struct drm_crtc *crtc)
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct amdgpu_device *adev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
u32 tmp;
 
@@ -2301,11 +2302,14 @@ static void dce_v10_0_crtc_load_lut(struct drm_crtc 
*crtc)
WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x0007);
 
WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
for (i = 0; i < 256; i++) {
WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,
-  (amdgpu_crtc->lut_r[i] << 20) |
-  (amdgpu_crtc->lut_g[i] << 10) |
-  (amdgpu_crtc->lut_b[i] << 0));
+  ((*r++ & 0xffc0) << 14) |
+  ((*g++ & 0xffc0) << 4) |
+  (*b++ >> 6));
}
 
tmp = RREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset);
@@ -2621,15 +2625,6 @@ static int dce_v10_0_crtc_gamma_set(struct drm_crtc 
*crtc, u16 *red, u16 *green,
u16 *blue, uint32_t size,
struct drm_modeset_acquire_ctx *ctx)
 {
-   struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
-   int i;
-
-   /* userspace palettes are always correct as is */
-   for (i = 0; i < size; i++) {
-   amdgpu_crtc->lut_r[i] = red[i] >> 6;
-   amdgpu_crtc->lut_g[i] = green[i] >> 6;
-   amdgpu_crtc->lut_b[i] = blue[i] >> 6;
-   }
dce_v10_0_crtc_load_lut(crtc);
 
return 0;
@@ -2841,14 +2836,12 @@ static const struct drm_crtc_helper_funcs 
dce_v10_0_crtc_helper_funcs = {
.mode_set_base_atomic = dce_v10_0_crtc_set_base_atomic,
.prepare = dce_v10_0_crtc_prepare,
.commit = dce_v10_0_crtc_commit,
-   .load_lut = dce_v10_0_crtc_load_lut,
.disable = dce_v10_0_crtc_disable,
 };
 
 static int dce_v10_0_crtc_init(struct 

[Intel-gfx] [PATCH v2 00/14] improve the fb_setcmap helper

[Peter Rosin]

Hi!

While trying to get CLUT support for the atmel_hlcdc driver, and
specifically for the emulated fbdev interface, I received some
push-back that my feeble in-driver attempts should be solved
by the core. This is my attempt to do it right.

I have obviously not tested all of this with more than a compile,
but patches 1 and 3 are enough to make the atmel-hlcdc driver
do what I need (when patched to support CLUT modes). The rest is
just lots of removals and cleanup made possible by the improved
core.

Please test, I would not be surprised if I have fouled up some
bit-manipulation somewhere in this mostly mechanical change...

Changes since v1:

- Rebased to next-20170621
- Split 1/11 into a preparatory patch, a cleanup patch and then
  the meat in 3/14.
- Handle pseudo-palette for FB_VISUAL_TRUECOLOR.
- Removed the empty .gamma_get/.gamma_set fb helpers from the
  armada driver that I had somehow managed to ignore but which
  0day found real quick.
- Be less judgemental on drivers only providing .gamma_get and
  .gamma_set, but no .load_lut. That's actually a valid thing
  to do if you only need pseudo-palette for FB_VISUAL_TRUECOLOR.
- Add a comment about colliding bitfields in the nouveau driver.
- Remove gamma_set/gamma_get declarations from the radeon driver
  (the definitions were removed in v1).

Cheers,
peda

Peter Rosin (14):
  drm/fb-helper: keep the .gamma_store updated in drm_fb_helper_setcmap
  drm/fb-helper: remove drm_fb_helper_save_lut_atomic
  drm/fb-helper: do a generic fb_setcmap helper in terms of crtc
.gamma_set
  drm: amd: remove dead code and pointless local lut storage
  drm: armada: remove dead empty functions
  drm: ast: remove dead code and pointless local lut storage
  drm: cirrus: remove dead code and pointless local lut storage
  drm: gma500: remove dead code and pointless local lut storage
  drm: i915: remove dead code and pointless local lut storage
  drm: mgag200: remove dead code and pointless local lut storage
  drm: nouveau: remove dead code and pointless local lut storage
  drm: radeon: remove dead code and pointless local lut storage
  drm: stm: remove dead code and pointless local lut storage
  drm: remove unused and redundant callbacks

 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c  |  24 
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h|   1 -
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c  |  27 ++---
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c  |  27 ++---
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c   |  27 ++---
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c   |  27 ++---
 drivers/gpu/drm/amd/amdgpu/dce_virtual.c|  23 
 drivers/gpu/drm/armada/armada_crtc.c|  10 --
 drivers/gpu/drm/armada/armada_crtc.h|   2 -
 drivers/gpu/drm/armada/armada_fbdev.c   |   2 -
 drivers/gpu/drm/ast/ast_drv.h   |   1 -
 drivers/gpu/drm/ast/ast_fb.c|  20 
 drivers/gpu/drm/ast/ast_mode.c  |  26 +
 drivers/gpu/drm/cirrus/cirrus_drv.h |   8 --
 drivers/gpu/drm/cirrus/cirrus_fbdev.c   |   2 -
 drivers/gpu/drm/cirrus/cirrus_mode.c|  71 +++-
 drivers/gpu/drm/drm_fb_helper.c | 164 +---
 drivers/gpu/drm/gma500/framebuffer.c|  22 
 drivers/gpu/drm/gma500/gma_display.c|  32 ++
 drivers/gpu/drm/gma500/psb_intel_display.c  |   7 +-
 drivers/gpu/drm/gma500/psb_intel_drv.h  |   1 -
 drivers/gpu/drm/i915/intel_drv.h|   1 -
 drivers/gpu/drm/i915/intel_fbdev.c  |  31 --
 drivers/gpu/drm/mgag200/mgag200_drv.h   |   5 -
 drivers/gpu/drm/mgag200/mgag200_fb.c|   2 -
 drivers/gpu/drm/mgag200/mgag200_mode.c  |  62 +++
 drivers/gpu/drm/nouveau/dispnv04/crtc.c |  26 ++---
 drivers/gpu/drm/nouveau/nouveau_crtc.h  |   3 -
 drivers/gpu/drm/nouveau/nouveau_fbcon.c |  22 
 drivers/gpu/drm/nouveau/nv50_display.c  |  40 +++
 drivers/gpu/drm/radeon/atombios_crtc.c  |   1 -
 drivers/gpu/drm/radeon/radeon_connectors.c  |   7 +-
 drivers/gpu/drm/radeon/radeon_display.c |  71 +---
 drivers/gpu/drm/radeon/radeon_fb.c  |   2 -
 drivers/gpu/drm/radeon/radeon_legacy_crtc.c |   1 -
 drivers/gpu/drm/radeon/radeon_mode.h|   4 -
 drivers/gpu/drm/stm/ltdc.c  |  12 --
 drivers/gpu/drm/stm/ltdc.h  |   1 -
 include/drm/drm_fb_helper.h |  32 --
 include/drm/drm_modeset_helper_vtables.h|  16 ---
 40 files changed, 205 insertions(+), 658 deletions(-)

-- 
2.1.4

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[Intel-gfx] [PATCH v2 06/14] drm: ast: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/ast/ast_drv.h  |  1 -
 drivers/gpu/drm/ast/ast_fb.c   | 20 
 drivers/gpu/drm/ast/ast_mode.c | 26 ++
 3 files changed, 6 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h
index 8880f0b..569a148 100644
--- a/drivers/gpu/drm/ast/ast_drv.h
+++ b/drivers/gpu/drm/ast/ast_drv.h
@@ -245,7 +245,6 @@ struct ast_connector {
 
 struct ast_crtc {
struct drm_crtc base;
-   u8 lut_r[256], lut_g[256], lut_b[256];
struct drm_gem_object *cursor_bo;
uint64_t cursor_addr;
int cursor_width, cursor_height;
diff --git a/drivers/gpu/drm/ast/ast_fb.c b/drivers/gpu/drm/ast/ast_fb.c
index 4ad4acd..dbabcac 100644
--- a/drivers/gpu/drm/ast/ast_fb.c
+++ b/drivers/gpu/drm/ast/ast_fb.c
@@ -255,27 +255,7 @@ static int astfb_create(struct drm_fb_helper *helper,
return ret;
 }
 
-static void ast_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-  u16 blue, int regno)
-{
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-   ast_crtc->lut_r[regno] = red >> 8;
-   ast_crtc->lut_g[regno] = green >> 8;
-   ast_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void ast_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-  u16 *blue, int regno)
-{
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-   *red = ast_crtc->lut_r[regno] << 8;
-   *green = ast_crtc->lut_g[regno] << 8;
-   *blue = ast_crtc->lut_b[regno] << 8;
-}
-
 static const struct drm_fb_helper_funcs ast_fb_helper_funcs = {
-   .gamma_set = ast_fb_gamma_set,
-   .gamma_get = ast_fb_gamma_get,
.fb_probe = astfb_create,
 };
 
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index aaef0a6..724c16b 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -63,15 +63,18 @@ static inline void ast_load_palette_index(struct 
ast_private *ast,
 static void ast_crtc_load_lut(struct drm_crtc *crtc)
 {
struct ast_private *ast = crtc->dev->dev_private;
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
+   u16 *r, *g, *b;
int i;
 
if (!crtc->enabled)
return;
 
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
for (i = 0; i < 256; i++)
-   ast_load_palette_index(ast, i, ast_crtc->lut_r[i],
-  ast_crtc->lut_g[i], ast_crtc->lut_b[i]);
+   ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
 }
 
 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct 
drm_display_mode *mode,
@@ -633,7 +636,6 @@ static const struct drm_crtc_helper_funcs 
ast_crtc_helper_funcs = {
.mode_set = ast_crtc_mode_set,
.mode_set_base = ast_crtc_mode_set_base,
.disable = ast_crtc_disable,
-   .load_lut = ast_crtc_load_lut,
.prepare = ast_crtc_prepare,
.commit = ast_crtc_commit,
 
@@ -648,15 +650,6 @@ static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 
*red, u16 *green,
  u16 *blue, uint32_t size,
  struct drm_modeset_acquire_ctx *ctx)
 {
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-   int i;
-
-   /* userspace palettes are always correct as is */
-   for (i = 0; i < size; i++) {
-   ast_crtc->lut_r[i] = red[i] >> 8;
-   ast_crtc->lut_g[i] = green[i] >> 8;
-   ast_crtc->lut_b[i] = blue[i] >> 8;
-   }
ast_crtc_load_lut(crtc);
 
return 0;
@@ -681,7 +674,6 @@ static const struct drm_crtc_funcs ast_crtc_funcs = {
 static int ast_crtc_init(struct drm_device *dev)
 {
struct ast_crtc *crtc;
-   int i;
 
crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
if (!crtc)
@@ -690,12 +682,6 @@ static int ast_crtc_init(struct drm_device *dev)
drm_crtc_init(dev, >base, _crtc_funcs);
drm_mode_crtc_set_gamma_size(>base, 256);
drm_crtc_helper_add(>base, _crtc_helper_funcs);
-
-   for (i = 0; i < 256; i++) {
-   crtc->lut_r[i] = i;
-   crtc->lut_g[i] = i;
-   crtc->lut_b[i] = i;
-   }
return 0;
 }
 
-- 
2.1.4

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[Intel-gfx] [PATCH v2 07/14] drm: cirrus: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/cirrus/cirrus_drv.h   |  8 
 drivers/gpu/drm/cirrus/cirrus_fbdev.c |  2 -
 drivers/gpu/drm/cirrus/cirrus_mode.c  | 71 ---
 3 files changed, 16 insertions(+), 65 deletions(-)

diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.h 
b/drivers/gpu/drm/cirrus/cirrus_drv.h
index 8690352..be2d7e48 100644
--- a/drivers/gpu/drm/cirrus/cirrus_drv.h
+++ b/drivers/gpu/drm/cirrus/cirrus_drv.h
@@ -96,7 +96,6 @@
 
 struct cirrus_crtc {
struct drm_crtc base;
-   u8  lut_r[256], lut_g[256], lut_b[256];
int last_dpms;
boolenabled;
 };
@@ -180,13 +179,6 @@ cirrus_bo(struct ttm_buffer_object *bo)
 #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
 #define DRM_FILE_PAGE_OFFSET (0x1ULL >> PAGE_SHIFT)
 
-   /* cirrus_mode.c */
-void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-u16 blue, int regno);
-void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-u16 *blue, int regno);
-
-
/* cirrus_main.c */
 int cirrus_device_init(struct cirrus_device *cdev,
  struct drm_device *ddev,
diff --git a/drivers/gpu/drm/cirrus/cirrus_fbdev.c 
b/drivers/gpu/drm/cirrus/cirrus_fbdev.c
index 7fa58ee..1fedab0 100644
--- a/drivers/gpu/drm/cirrus/cirrus_fbdev.c
+++ b/drivers/gpu/drm/cirrus/cirrus_fbdev.c
@@ -265,8 +265,6 @@ static int cirrus_fbdev_destroy(struct drm_device *dev,
 }
 
 static const struct drm_fb_helper_funcs cirrus_fb_helper_funcs = {
-   .gamma_set = cirrus_crtc_fb_gamma_set,
-   .gamma_get = cirrus_crtc_fb_gamma_get,
.fb_probe = cirrusfb_create,
 };
 
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c 
b/drivers/gpu/drm/cirrus/cirrus_mode.c
index 53f6f0f..a4c4a46 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
@@ -31,25 +31,6 @@
  * This file contains setup code for the CRTC.
  */
 
-static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
-{
-   struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
-   struct drm_device *dev = crtc->dev;
-   struct cirrus_device *cdev = dev->dev_private;
-   int i;
-
-   if (!crtc->enabled)
-   return;
-
-   for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
-   /* VGA registers */
-   WREG8(PALETTE_INDEX, i);
-   WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
-   WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
-   WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
-   }
-}
-
 /*
  * The DRM core requires DPMS functions, but they make little sense in our
  * case and so are just stubs
@@ -330,15 +311,25 @@ static int cirrus_crtc_gamma_set(struct drm_crtc *crtc, 
u16 *red, u16 *green,
 u16 *blue, uint32_t size,
 struct drm_modeset_acquire_ctx *ctx)
 {
-   struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
+   struct drm_device *dev = crtc->dev;
+   struct cirrus_device *cdev = dev->dev_private;
+   u16 *r, *g, *b;
int i;
 
-   for (i = 0; i < size; i++) {
-   cirrus_crtc->lut_r[i] = red[i];
-   cirrus_crtc->lut_g[i] = green[i];
-   cirrus_crtc->lut_b[i] = blue[i];
+   if (!crtc->enabled)
+   return 0;
+
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
+   for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
+   /* VGA registers */
+   WREG8(PALETTE_INDEX, i);
+   WREG8(PALETTE_DATA, *r++ >> 8);
+   WREG8(PALETTE_DATA, *g++ >> 8);
+   WREG8(PALETTE_DATA, *b++ >> 8);
}
-   cirrus_crtc_load_lut(crtc);
 
return 0;
 }
@@ -365,7 +356,6 @@ static const struct drm_crtc_helper_funcs 
cirrus_helper_funcs = {
.mode_set_base = cirrus_crtc_mode_set_base,
.prepare = cirrus_crtc_prepare,
.commit = cirrus_crtc_commit,
-   .load_lut = cirrus_crtc_load_lut,
 };
 
 /* CRTC setup */
@@ -373,7 +363,6 @@ static void cirrus_crtc_init(struct drm_device *dev)
 {
struct cirrus_device *cdev = dev->dev_private;
struct cirrus_crtc *cirrus_crtc;
-   int i;
 
cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
  (CIRRUSFB_CONN_LIMIT * sizeof(struct 
drm_connector *)),
@@ -387,37 +376,9 @@ static void cirrus_crtc_init(struct drm_device *dev)
drm_mode_crtc_set_gamma_size(_crtc->base, CIRRUS_LUT_SIZE);
 

Re: [Intel-gfx] [PATCH 01/11] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set

[Peter Rosin]

On 2017-06-22 08:36, Daniel Vetter wrote:
> On Wed, Jun 21, 2017 at 11:40:52AM +0200, Peter Rosin wrote:
>> On 2017-06-21 09:38, Daniel Vetter wrote:
>>> On Tue, Jun 20, 2017 at 09:25:25PM +0200, Peter Rosin wrote:
 This makes the redundant fb helpers .load_lut, .gamma_set and .gamma_get
 totally obsolete.

 I think the gamma_store can end up invalid on error. But the way I read
 it, that can happen in drm_mode_gamma_set_ioctl as well, so why should
 this pesky legacy fbdev stuff be any better?

 drm_fb_helper_save_lut_atomic justs saves the gamma lut for later. However,
 it saves it to the gamma_store which should already be up to date with what
 .gamma_get would return and is thus a nop. So, zap it.
>>>
>>> Removing drm_fb_helper_save_lut_atomic should be a separate patch I
>>> think.
>>
>> Then 3 patches would be needed, first some hybrid thing that does it the
>> old way, but also stores the lut in .gamma_store, then the split-out that
>> removes drm_fb_helper_save_lut_atomic, then whatever is needed to get
>> to the desired code. I can certainly do that, but do you want me to?
> 
> Explain that in the commit message and it's fine.

I did the split in v2, I assume that's ok too. Better in case anyone ever
needs to run a bisect on this...

>>> It's a pre-existing bug, but should we also try to restore the fbdev lut
>>> in drm_fb_helper_restore_fbdev_mode_unlocked()? Would be yet another bug,
>>> but might be relevant for your use-case. Just try to run both an fbdev
>>> application and some kms-native thing, and then SIGKILL the native kms
>>> app.
>>>
>>> But since pre-existing not really required, and probably too much effort.
>>
>> Good thing too, because I don't really know my way around this code...
> 
> Btw I cc'ed you on one of my patches in the fbdev locking series, we might
> need to do the same legacy vs. atomic split for the new lut code as I did
> for dpms. The rule with atomic is that you can't do multiple commits under
> drm_modeset_lock_all, you either have to do one overall atomic commit
> (preferred) or drop locks again. This matters for LUT since
> you're updating the LUT on all CRTCs, which when using the gamma_set
> atomic helper would be multiple commits :-/

Ahh, ok, I see the problem.

> Using the dpms patch as template it shouldn't be too hard to address that
> for your patch here too.

Hmm, in that patch you handle the legacy case in a separate function, and
doing that for the lut case looks difficult when the atomic commit happens
inside the helper (typically drm_atomic_helper_legacy_gamma_set which
could perhaps be handled, but a real drag to handle for drivers that have
a custom crtc .gamma_set).

So, I'm aiming for the drop approach...

However, I don't have all of that series, and I suspect that is why I do
not have any fb_helper->lock.

I'll send my best guess as a follow-up to patch 3/14 in v2.

Cheers,
peda
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[Intel-gfx] [PATCH v2 02/14] drm/fb-helper: remove drm_fb_helper_save_lut_atomic

[Peter Rosin]

drm_fb_helper_save_lut_atomic is redundant since the .gamma_store is
now always kept up to date by drm_fb_helper_setcmap.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/drm_fb_helper.c | 17 -
 1 file changed, 17 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 25315fb..7ade384 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -229,22 +229,6 @@ int drm_fb_helper_remove_one_connector(struct 
drm_fb_helper *fb_helper,
 }
 EXPORT_SYMBOL(drm_fb_helper_remove_one_connector);
 
-static void drm_fb_helper_save_lut_atomic(struct drm_crtc *crtc, struct 
drm_fb_helper *helper)
-{
-   uint16_t *r_base, *g_base, *b_base;
-   int i;
-
-   if (helper->funcs->gamma_get == NULL)
-   return;
-
-   r_base = crtc->gamma_store;
-   g_base = r_base + crtc->gamma_size;
-   b_base = g_base + crtc->gamma_size;
-
-   for (i = 0; i < crtc->gamma_size; i++)
-   helper->funcs->gamma_get(crtc, _base[i], _base[i], 
_base[i], i);
-}
-
 static void drm_fb_helper_restore_lut_atomic(struct drm_crtc *crtc)
 {
uint16_t *r_base, *g_base, *b_base;
@@ -285,7 +269,6 @@ int drm_fb_helper_debug_enter(struct fb_info *info)
if (drm_drv_uses_atomic_modeset(mode_set->crtc->dev))
continue;
 
-   drm_fb_helper_save_lut_atomic(mode_set->crtc, helper);
funcs->mode_set_base_atomic(mode_set->crtc,
mode_set->fb,
mode_set->x,
-- 
2.1.4

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[Intel-gfx] [PATCH 08/11] drm: nouveau: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/nouveau/dispnv04/crtc.c | 26 --
 drivers/gpu/drm/nouveau/nouveau_crtc.h  |  3 ---
 drivers/gpu/drm/nouveau/nouveau_fbcon.c | 22 ---
 drivers/gpu/drm/nouveau/nv50_display.c  | 39 ++---
 4 files changed, 21 insertions(+), 69 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c 
b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
index 4b4b0b4..8f689f1 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
@@ -764,13 +764,18 @@ nv_crtc_gamma_load(struct drm_crtc *crtc)
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
struct drm_device *dev = nv_crtc->base.dev;
struct rgb { uint8_t r, g, b; } __attribute__((packed)) *rgbs;
+   u16 *r, *g, *b;
int i;
 
rgbs = (struct rgb 
*)nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index].DAC;
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
for (i = 0; i < 256; i++) {
-   rgbs[i].r = nv_crtc->lut.r[i] >> 8;
-   rgbs[i].g = nv_crtc->lut.g[i] >> 8;
-   rgbs[i].b = nv_crtc->lut.b[i] >> 8;
+   rgbs[i].r = *r++ >> 8;
+   rgbs[i].g = *g++ >> 8;
+   rgbs[i].b = *b++ >> 8;
}
 
nouveau_hw_load_state_palette(dev, nv_crtc->index, 
_display(dev)->mode_reg);
@@ -792,13 +797,6 @@ nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, 
u16 *b,
  struct drm_modeset_acquire_ctx *ctx)
 {
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-   int i;
-
-   for (i = 0; i < size; i++) {
-   nv_crtc->lut.r[i] = r[i];
-   nv_crtc->lut.g[i] = g[i];
-   nv_crtc->lut.b[i] = b[i];
-   }
 
/* We need to know the depth before we upload, but it's possible to
 * get called before a framebuffer is bound.  If this is the case,
@@ -1095,7 +1093,6 @@ static const struct drm_crtc_helper_funcs 
nv04_crtc_helper_funcs = {
.mode_set = nv_crtc_mode_set,
.mode_set_base = nv04_crtc_mode_set_base,
.mode_set_base_atomic = nv04_crtc_mode_set_base_atomic,
-   .load_lut = nv_crtc_gamma_load,
.disable = nv_crtc_disable,
 };
 
@@ -1103,17 +1100,12 @@ int
 nv04_crtc_create(struct drm_device *dev, int crtc_num)
 {
struct nouveau_crtc *nv_crtc;
-   int ret, i;
+   int ret;
 
nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
if (!nv_crtc)
return -ENOMEM;
 
-   for (i = 0; i < 256; i++) {
-   nv_crtc->lut.r[i] = i << 8;
-   nv_crtc->lut.g[i] = i << 8;
-   nv_crtc->lut.b[i] = i << 8;
-   }
nv_crtc->lut.depth = 0;
 
nv_crtc->index = crtc_num;
diff --git a/drivers/gpu/drm/nouveau/nouveau_crtc.h 
b/drivers/gpu/drm/nouveau/nouveau_crtc.h
index 050fcf3..b7a18fb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_crtc.h
+++ b/drivers/gpu/drm/nouveau/nouveau_crtc.h
@@ -61,9 +61,6 @@ struct nouveau_crtc {
 
struct {
struct nouveau_bo *nvbo;
-   uint16_t r[256];
-   uint16_t g[256];
-   uint16_t b[256];
int depth;
} lut;
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c 
b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 2665a07..f770784 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -278,26 +278,6 @@ nouveau_fbcon_accel_init(struct drm_device *dev)
info->fbops = _fbcon_ops;
 }
 
-static void nouveau_fbcon_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-   u16 blue, int regno)
-{
-   struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-
-   nv_crtc->lut.r[regno] = red;
-   nv_crtc->lut.g[regno] = green;
-   nv_crtc->lut.b[regno] = blue;
-}
-
-static void nouveau_fbcon_gamma_get(struct drm_crtc *crtc, u16 *red, u16 
*green,
-   u16 *blue, int regno)
-{
-   struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
-
-   *red = nv_crtc->lut.r[regno];
-   *green = nv_crtc->lut.g[regno];
-   *blue = nv_crtc->lut.b[regno];
-}
-
 static void
 nouveau_fbcon_zfill(struct drm_device *dev, struct nouveau_fbdev *fbcon)
 {
@@ -467,8 +447,6 @@ void nouveau_fbcon_gpu_lockup(struct fb_info *info)
 }
 
 static const struct drm_fb_helper_funcs nouveau_fbcon_helper_funcs = {
-   .gamma_set = nouveau_fbcon_gamma_set,
-   .gamma_get = nouveau_fbcon_gamma_get,
.fb_probe = nouveau_fbcon_create,
 };
 
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
b/drivers/gpu/drm/nouveau/nv50_display.c
index 

[Intel-gfx] [PATCH 03/11] drm: ast: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helpers .load_lut, .gamma_set and .gamma_get are
no longer used. Remove the dead code and hook up the crtc .gamma_set
to use the crtc gamma_store directly instead of duplicating that
info locally.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/ast/ast_drv.h  |  1 -
 drivers/gpu/drm/ast/ast_fb.c   | 20 
 drivers/gpu/drm/ast/ast_mode.c | 26 ++
 3 files changed, 6 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h
index 8880f0b..569a148 100644
--- a/drivers/gpu/drm/ast/ast_drv.h
+++ b/drivers/gpu/drm/ast/ast_drv.h
@@ -245,7 +245,6 @@ struct ast_connector {
 
 struct ast_crtc {
struct drm_crtc base;
-   u8 lut_r[256], lut_g[256], lut_b[256];
struct drm_gem_object *cursor_bo;
uint64_t cursor_addr;
int cursor_width, cursor_height;
diff --git a/drivers/gpu/drm/ast/ast_fb.c b/drivers/gpu/drm/ast/ast_fb.c
index 4ad4acd..dbabcac 100644
--- a/drivers/gpu/drm/ast/ast_fb.c
+++ b/drivers/gpu/drm/ast/ast_fb.c
@@ -255,27 +255,7 @@ static int astfb_create(struct drm_fb_helper *helper,
return ret;
 }
 
-static void ast_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-  u16 blue, int regno)
-{
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-   ast_crtc->lut_r[regno] = red >> 8;
-   ast_crtc->lut_g[regno] = green >> 8;
-   ast_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void ast_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-  u16 *blue, int regno)
-{
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-   *red = ast_crtc->lut_r[regno] << 8;
-   *green = ast_crtc->lut_g[regno] << 8;
-   *blue = ast_crtc->lut_b[regno] << 8;
-}
-
 static const struct drm_fb_helper_funcs ast_fb_helper_funcs = {
-   .gamma_set = ast_fb_gamma_set,
-   .gamma_get = ast_fb_gamma_get,
.fb_probe = astfb_create,
 };
 
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index aaef0a6..724c16b 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -63,15 +63,18 @@ static inline void ast_load_palette_index(struct 
ast_private *ast,
 static void ast_crtc_load_lut(struct drm_crtc *crtc)
 {
struct ast_private *ast = crtc->dev->dev_private;
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
+   u16 *r, *g, *b;
int i;
 
if (!crtc->enabled)
return;
 
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
for (i = 0; i < 256; i++)
-   ast_load_palette_index(ast, i, ast_crtc->lut_r[i],
-  ast_crtc->lut_g[i], ast_crtc->lut_b[i]);
+   ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
 }
 
 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct 
drm_display_mode *mode,
@@ -633,7 +636,6 @@ static const struct drm_crtc_helper_funcs 
ast_crtc_helper_funcs = {
.mode_set = ast_crtc_mode_set,
.mode_set_base = ast_crtc_mode_set_base,
.disable = ast_crtc_disable,
-   .load_lut = ast_crtc_load_lut,
.prepare = ast_crtc_prepare,
.commit = ast_crtc_commit,
 
@@ -648,15 +650,6 @@ static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 
*red, u16 *green,
  u16 *blue, uint32_t size,
  struct drm_modeset_acquire_ctx *ctx)
 {
-   struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
-   int i;
-
-   /* userspace palettes are always correct as is */
-   for (i = 0; i < size; i++) {
-   ast_crtc->lut_r[i] = red[i] >> 8;
-   ast_crtc->lut_g[i] = green[i] >> 8;
-   ast_crtc->lut_b[i] = blue[i] >> 8;
-   }
ast_crtc_load_lut(crtc);
 
return 0;
@@ -681,7 +674,6 @@ static const struct drm_crtc_funcs ast_crtc_funcs = {
 static int ast_crtc_init(struct drm_device *dev)
 {
struct ast_crtc *crtc;
-   int i;
 
crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
if (!crtc)
@@ -690,12 +682,6 @@ static int ast_crtc_init(struct drm_device *dev)
drm_crtc_init(dev, >base, _crtc_funcs);
drm_mode_crtc_set_gamma_size(>base, 256);
drm_crtc_helper_add(>base, _crtc_helper_funcs);
-
-   for (i = 0; i < 256; i++) {
-   crtc->lut_r[i] = i;
-   crtc->lut_g[i] = i;
-   crtc->lut_b[i] = i;
-   }
return 0;
 }
 
-- 
2.1.4

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[Intel-gfx] [PATCH v2 13/14] drm: stm: remove dead code and pointless local lut storage

[Peter Rosin]

The redundant fb helper .load_lut is no longer used, and can not
work right without also providing the fb helpers .gamma_set and
.gamma_get thus rendering the code in this driver suspect.

Just remove the dead code.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/stm/ltdc.c | 12 
 drivers/gpu/drm/stm/ltdc.h |  1 -
 2 files changed, 13 deletions(-)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 1b9483d..87829b9 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -375,17 +375,6 @@ static irqreturn_t ltdc_irq(int irq, void *arg)
  * DRM_CRTC
  */
 
-static void ltdc_crtc_load_lut(struct drm_crtc *crtc)
-{
-   struct ltdc_device *ldev = crtc_to_ltdc(crtc);
-   unsigned int i, lay;
-
-   for (lay = 0; lay < ldev->caps.nb_layers; lay++)
-   for (i = 0; i < 256; i++)
-   reg_write(ldev->regs, LTDC_L1CLUTWR + lay * LAY_OFS,
- ldev->clut[i]);
-}
-
 static void ltdc_crtc_enable(struct drm_crtc *crtc)
 {
struct ltdc_device *ldev = crtc_to_ltdc(crtc);
@@ -523,7 +512,6 @@ static void ltdc_crtc_atomic_flush(struct drm_crtc *crtc,
 }
 
 static struct drm_crtc_helper_funcs ltdc_crtc_helper_funcs = {
-   .load_lut = ltdc_crtc_load_lut,
.enable = ltdc_crtc_enable,
.disable = ltdc_crtc_disable,
.mode_set_nofb = ltdc_crtc_mode_set_nofb,
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index d7a9c73..620ca55 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -27,7 +27,6 @@ struct ltdc_device {
struct drm_panel *panel;
struct mutex err_lock;  /* protecting error_status */
struct ltdc_caps caps;
-   u32 clut[256];  /* color look up table */
u32 error_status;
u32 irq_status;
 };
-- 
2.1.4

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Re: [Intel-gfx] [PATCH] drm/i915: select CRC32

[Nicholas Piggin]

On Wed, 21 Jun 2017 10:15:56 +0100
Chris Wilson  wrote:

> Quoting Daniel Vetter (2017-06-21 10:13:41)
> > On Wed, Jun 21, 2017 at 04:34:20PM +1000, Nicholas Piggin wrote:  
> > > kbuild test robot found a build failure when building with thin
> > > archives:
> > > 
> > > http://marc.info/?l=linux-kbuild=149802285009737=2
> > > 
> > > Signed-off-by: Nicholas Piggin   
> > 
> > Pushed to drm-intel for 4.14, thanks.  
> 
> Probably deserves to be in fixes if we identify what introduced the CRC
> dep. mst-dp? pipe crc?

Looks like

579cea5f3 ("drm/i915/gvt: golden virtual HW state management")

Thanks,
Nick
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[Intel-gfx] [PATCH v2 09/14] drm: i915: remove dead code and pointless local lut storage

[Peter Rosin]

The driver stores lut values from the fbdev interface, and is able
to give them back, but does not appear to do anything with these
lut values. The generic fb helpers have replaced this function,
and may even have made the driver work for the C8 mode from the
fbdev interface. But that is untested.

Since the fb helpers .gamma_set and .gamma_get are obsolete,
remove the dead code.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/i915/intel_drv.h   |  1 -
 drivers/gpu/drm/i915/intel_fbdev.c | 31 ---
 2 files changed, 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d93efb4..bc7bfa0 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -786,7 +786,6 @@ struct intel_crtc {
struct drm_crtc base;
enum pipe pipe;
enum plane plane;
-   u8 lut_r[256], lut_g[256], lut_b[256];
/*
 * Whether the crtc and the connected output pipeline is active. Implies
 * that crtc->enabled is set, i.e. the current mode configuration has
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c 
b/drivers/gpu/drm/i915/intel_fbdev.c
index 03347c6..5bac953 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -281,27 +281,6 @@ static int intelfb_create(struct drm_fb_helper *helper,
return ret;
 }
 
-/** Sets the color ramps on behalf of RandR */
-static void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-   u16 blue, int regno)
-{
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
-   intel_crtc->lut_r[regno] = red >> 8;
-   intel_crtc->lut_g[regno] = green >> 8;
-   intel_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 
*green,
-   u16 *blue, int regno)
-{
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
-   *red = intel_crtc->lut_r[regno] << 8;
-   *green = intel_crtc->lut_g[regno] << 8;
-   *blue = intel_crtc->lut_b[regno] << 8;
-}
-
 static struct drm_fb_helper_crtc *
 intel_fb_helper_crtc(struct drm_fb_helper *fb_helper, struct drm_crtc *crtc)
 {
@@ -370,7 +349,6 @@ static bool intel_fb_initial_config(struct drm_fb_helper 
*fb_helper,
struct drm_connector *connector;
struct drm_encoder *encoder;
struct drm_fb_helper_crtc *new_crtc;
-   struct intel_crtc *intel_crtc;
 
fb_conn = fb_helper->connector_info[i];
connector = fb_conn->connector;
@@ -412,13 +390,6 @@ static bool intel_fb_initial_config(struct drm_fb_helper 
*fb_helper,
 
num_connectors_enabled++;
 
-   intel_crtc = to_intel_crtc(connector->state->crtc);
-   for (j = 0; j < 256; j++) {
-   intel_crtc->lut_r[j] = j;
-   intel_crtc->lut_g[j] = j;
-   intel_crtc->lut_b[j] = j;
-   }
-
new_crtc = intel_fb_helper_crtc(fb_helper,
connector->state->crtc);
 
@@ -519,8 +490,6 @@ static bool intel_fb_initial_config(struct drm_fb_helper 
*fb_helper,
 
 static const struct drm_fb_helper_funcs intel_fb_helper_funcs = {
.initial_config = intel_fb_initial_config,
-   .gamma_set = intel_crtc_fb_gamma_set,
-   .gamma_get = intel_crtc_fb_gamma_get,
.fb_probe = intelfb_create,
 };
 
-- 
2.1.4

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[Intel-gfx] [PATCH v2 03/14] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set

[Peter Rosin]

This makes the redundant fb helpers .load_lut, .gamma_set and .gamma_get
totally obsolete.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/drm_fb_helper.c | 154 
 1 file changed, 63 insertions(+), 91 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 7ade384..58eb045 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1150,50 +1150,6 @@ void drm_fb_helper_set_suspend_unlocked(struct 
drm_fb_helper *fb_helper,
 }
 EXPORT_SYMBOL(drm_fb_helper_set_suspend_unlocked);
 
-static int setcolreg(struct drm_crtc *crtc, u16 red, u16 green,
-u16 blue, u16 regno, struct fb_info *info)
-{
-   struct drm_fb_helper *fb_helper = info->par;
-   struct drm_framebuffer *fb = fb_helper->fb;
-
-   if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
-   u32 *palette;
-   u32 value;
-   /* place color in psuedopalette */
-   if (regno > 16)
-   return -EINVAL;
-   palette = (u32 *)info->pseudo_palette;
-   red >>= (16 - info->var.red.length);
-   green >>= (16 - info->var.green.length);
-   blue >>= (16 - info->var.blue.length);
-   value = (red << info->var.red.offset) |
-   (green << info->var.green.offset) |
-   (blue << info->var.blue.offset);
-   if (info->var.transp.length > 0) {
-   u32 mask = (1 << info->var.transp.length) - 1;
-
-   mask <<= info->var.transp.offset;
-   value |= mask;
-   }
-   palette[regno] = value;
-   return 0;
-   }
-
-   /*
-* The driver really shouldn't advertise pseudo/directcolor
-* visuals if it can't deal with the palette.
-*/
-   if (WARN_ON(!fb_helper->funcs->gamma_set ||
-   !fb_helper->funcs->gamma_get))
-   return -EINVAL;
-
-   WARN_ON(fb->format->cpp[0] != 1);
-
-   fb_helper->funcs->gamma_set(crtc, red, green, blue, regno);
-
-   return 0;
-}
-
 /**
  * drm_fb_helper_setcmap - implementation for _ops.fb_setcmap
  * @cmap: cmap to set
@@ -1203,12 +1159,10 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
 {
struct drm_fb_helper *fb_helper = info->par;
struct drm_device *dev = fb_helper->dev;
-   const struct drm_crtc_helper_funcs *crtc_funcs;
-   u16 *red, *green, *blue, *transp;
+   struct drm_modeset_acquire_ctx ctx;
struct drm_crtc *crtc;
u16 *r, *g, *b;
-   int i, j, rc = 0;
-   int start;
+   int i, ret;
 
if (oops_in_progress)
return -EBUSY;
@@ -1216,65 +1170,83 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
if (cmap->start + cmap->len < cmap->start)
return -EINVAL;
 
-   drm_modeset_lock_all(dev);
+   drm_modeset_acquire_init(, 0);
+retry:
+   ret = drm_modeset_lock_all_ctx(dev, );
+   if (ret)
+   goto out;
if (!drm_fb_helper_is_bound(fb_helper)) {
-   drm_modeset_unlock_all(dev);
-   return -EBUSY;
+   ret = -EBUSY;
+   goto out;
}
 
for (i = 0; i < fb_helper->crtc_count; i++) {
-   crtc = fb_helper->crtc_info[i].mode_set.crtc;
-   crtc_funcs = crtc->helper_private;
-
-   red = cmap->red;
-   green = cmap->green;
-   blue = cmap->blue;
-   transp = cmap->transp;
-   start = cmap->start;
+   if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
+   u32 *palette;
+   int j;
 
-   if (info->fix.visual != FB_VISUAL_TRUECOLOR) {
-   if (!crtc->gamma_size) {
-   rc = -EINVAL;
+   if (cmap->start + cmap->len > 16) {
+   ret = -EINVAL;
goto out;
}
 
-   if (cmap->start + cmap->len > crtc->gamma_size) {
-   rc = -EINVAL;
-   goto out;
+   palette = (u32 *)info->pseudo_palette;
+   for (j = 0; j < cmap->len; ++j) {
+   u16 red = cmap->red[j];
+   u16 green = cmap->green[j];
+   u16 blue = cmap->blue[j];
+   u32 value;
+
+   red >>= 16 - info->var.red.length;
+   green >>= 16 - info->var.green.length;
+   blue >>= 16 - info->var.blue.length;
+   value = (red << info->var.red.offset) |
+ 

[Intel-gfx] [PATCH 11/11] drm: remove unused and redundant callbacks

[Peter Rosin]

Drivers no longer have any need for these callbacks, and there are no
users. Zap. Zap-zap-zzzap-p-pp-p.

Signed-off-by: Peter Rosin 
---
 include/drm/drm_fb_helper.h  | 32 
 include/drm/drm_modeset_helper_vtables.h | 16 
 2 files changed, 48 deletions(-)

diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index 119e5e4..80d9853 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -85,38 +85,6 @@ struct drm_fb_helper_surface_size {
  */
 struct drm_fb_helper_funcs {
/**
-* @gamma_set:
-*
-* Set the given gamma LUT register on the given CRTC.
-*
-* This callback is optional.
-*
-* FIXME:
-*
-* This callback is functionally redundant with the core gamma table
-* support and simply exists because the fbdev hasn't yet been
-* refactored to use the core gamma table interfaces.
-*/
-   void (*gamma_set)(struct drm_crtc *crtc, u16 red, u16 green,
- u16 blue, int regno);
-   /**
-* @gamma_get:
-*
-* Read the given gamma LUT register on the given CRTC, used to save the
-* current LUT when force-restoring the fbdev for e.g. kdbg.
-*
-* This callback is optional.
-*
-* FIXME:
-*
-* This callback is functionally redundant with the core gamma table
-* support and simply exists because the fbdev hasn't yet been
-* refactored to use the core gamma table interfaces.
-*/
-   void (*gamma_get)(struct drm_crtc *crtc, u16 *red, u16 *green,
- u16 *blue, int regno);
-
-   /**
 * @fb_probe:
 *
 * Driver callback to allocate and initialize the fbdev info structure.
diff --git a/include/drm/drm_modeset_helper_vtables.h 
b/include/drm/drm_modeset_helper_vtables.h
index 85984b2..0773db9 100644
--- a/include/drm/drm_modeset_helper_vtables.h
+++ b/include/drm/drm_modeset_helper_vtables.h
@@ -267,22 +267,6 @@ struct drm_crtc_helper_funcs {
enum mode_set_atomic);
 
/**
-* @load_lut:
-*
-* Load a LUT prepared with the _fb_helper_funcs.gamma_set vfunc.
-*
-* This callback is optional and is only used by the fbdev emulation
-* helpers.
-*
-* FIXME:
-*
-* This callback is functionally redundant with the core gamma table
-* support and simply exists because the fbdev hasn't yet been
-* refactored to use the core gamma table interfaces.
-*/
-   void (*load_lut)(struct drm_crtc *crtc);
-
-   /**
 * @disable:
 *
 * This callback should be used to disable the CRTC. With the atomic
-- 
2.1.4

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[Intel-gfx] [PATCH v2 01/14] drm/fb-helper: keep the .gamma_store updated in drm_fb_helper_setcmap

[Peter Rosin]

I think the gamma_store can end up invalid on error. But the way I read
it, that can happen in drm_mode_gamma_set_ioctl as well, so why should
this pesky legacy fbdev stuff be any better?

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/drm_fb_helper.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 574af01..25315fb 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1223,12 +1223,16 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
const struct drm_crtc_helper_funcs *crtc_funcs;
u16 *red, *green, *blue, *transp;
struct drm_crtc *crtc;
+   u16 *r, *g, *b;
int i, j, rc = 0;
int start;
 
if (oops_in_progress)
return -EBUSY;
 
+   if (cmap->start + cmap->len < cmap->start)
+   return -EINVAL;
+
drm_modeset_lock_all(dev);
if (!drm_fb_helper_is_bound(fb_helper)) {
drm_modeset_unlock_all(dev);
@@ -1245,6 +1249,29 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
transp = cmap->transp;
start = cmap->start;
 
+   if (info->fix.visual != FB_VISUAL_TRUECOLOR) {
+   if (!crtc->gamma_size) {
+   rc = -EINVAL;
+   goto out;
+   }
+
+   if (cmap->start + cmap->len > crtc->gamma_size) {
+   rc = -EINVAL;
+   goto out;
+   }
+
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
+   memcpy(r + cmap->start, cmap->red,
+  cmap->len * sizeof(u16));
+   memcpy(g + cmap->start, cmap->green,
+  cmap->len * sizeof(u16));
+   memcpy(b + cmap->start, cmap->blue,
+  cmap->len * sizeof(u16));
+   }
+
for (j = 0; j < cmap->len; j++) {
u16 hred, hgreen, hblue, htransp = 0x;
 
-- 
2.1.4

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[Intel-gfx] [PATCH 06/11] drm: i915: remove dead code and pointless local lut storage

[Peter Rosin]

The driver stores lut values from the fbdev interface, and is able
to give them back, but does not appear to do anything with these
lut values. The generic fb helpers have replaced this function,
and may even have made the driver work for the C8 mode from the
fbdev interface. But that is untested.

Since the fb helper .gamma_set and .gamma_get are no longer used,
just kill the mysterious dead code.

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/i915/intel_drv.h   |  1 -
 drivers/gpu/drm/i915/intel_fbdev.c | 31 ---
 2 files changed, 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 83dd409..503edf3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -785,7 +785,6 @@ struct intel_crtc {
struct drm_crtc base;
enum pipe pipe;
enum plane plane;
-   u8 lut_r[256], lut_g[256], lut_b[256];
/*
 * Whether the crtc and the connected output pipeline is active. Implies
 * that crtc->enabled is set, i.e. the current mode configuration has
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c 
b/drivers/gpu/drm/i915/intel_fbdev.c
index 03347c6..5bac953 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -281,27 +281,6 @@ static int intelfb_create(struct drm_fb_helper *helper,
return ret;
 }
 
-/** Sets the color ramps on behalf of RandR */
-static void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-   u16 blue, int regno)
-{
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
-   intel_crtc->lut_r[regno] = red >> 8;
-   intel_crtc->lut_g[regno] = green >> 8;
-   intel_crtc->lut_b[regno] = blue >> 8;
-}
-
-static void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 
*green,
-   u16 *blue, int regno)
-{
-   struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-
-   *red = intel_crtc->lut_r[regno] << 8;
-   *green = intel_crtc->lut_g[regno] << 8;
-   *blue = intel_crtc->lut_b[regno] << 8;
-}
-
 static struct drm_fb_helper_crtc *
 intel_fb_helper_crtc(struct drm_fb_helper *fb_helper, struct drm_crtc *crtc)
 {
@@ -370,7 +349,6 @@ static bool intel_fb_initial_config(struct drm_fb_helper 
*fb_helper,
struct drm_connector *connector;
struct drm_encoder *encoder;
struct drm_fb_helper_crtc *new_crtc;
-   struct intel_crtc *intel_crtc;
 
fb_conn = fb_helper->connector_info[i];
connector = fb_conn->connector;
@@ -412,13 +390,6 @@ static bool intel_fb_initial_config(struct drm_fb_helper 
*fb_helper,
 
num_connectors_enabled++;
 
-   intel_crtc = to_intel_crtc(connector->state->crtc);
-   for (j = 0; j < 256; j++) {
-   intel_crtc->lut_r[j] = j;
-   intel_crtc->lut_g[j] = j;
-   intel_crtc->lut_b[j] = j;
-   }
-
new_crtc = intel_fb_helper_crtc(fb_helper,
connector->state->crtc);
 
@@ -519,8 +490,6 @@ static bool intel_fb_initial_config(struct drm_fb_helper 
*fb_helper,
 
 static const struct drm_fb_helper_funcs intel_fb_helper_funcs = {
.initial_config = intel_fb_initial_config,
-   .gamma_set = intel_crtc_fb_gamma_set,
-   .gamma_get = intel_crtc_fb_gamma_get,
.fb_probe = intelfb_create,
 };
 
-- 
2.1.4

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Re: [Intel-gfx] [PATCH 09/12] drm/fb-helper: Split dpms handling into legacy and atomic paths

[Peter Rosin]

On 2017-06-21 20:28, Daniel Vetter wrote:
> Like with panning and modesetting, and like with those, stick with
> simple drm_modeset_locking_all for the legacy path, and the full
> atomic dance for atomic drivers.
> 
> This means a bit more boilerplate since setting up the atomic state
> machinery is rather verbose, but then this is shared code for 30+
> drivers or so, so meh.
> 
> After this patch there's only the LUT/cmap path which is still using
> drm_modeset_lock_all for an atomic driver. But Peter is already
> locking into reworking that, so I'll leave that code as-is for now.
> 
> Cc: Peter Rosin 

For the whole series (lightly)

Tested-by: Peter Rosin 

Cheers,
peda
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[Intel-gfx] [PATCH v2 01/14] drm/fb-helper: keep the .gamma_store updated in drm_fb_helper_setcmap

[Peter Rosin]

I think the gamma_store can end up invalid on error. But the way I read
it, that can happen in drm_mode_gamma_set_ioctl as well, so why should
this pesky legacy fbdev stuff be any better?

Signed-off-by: Peter Rosin 
---
 drivers/gpu/drm/drm_fb_helper.c | 27 +++
 1 file changed, 27 insertions(+)

This is an alternative version rebased on top of Daniels "fbdev helper
locking rework and deferred setup" series.

Cheers,
peda

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index a4cfef9..c7122c9 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1330,12 +1330,16 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
const struct drm_crtc_helper_funcs *crtc_funcs;
u16 *red, *green, *blue, *transp;
struct drm_crtc *crtc;
+   u16 *r, *g, *b;
int i, j, rc = 0;
int start;
 
if (oops_in_progress)
return -EBUSY;
 
+   if (cmap->start + cmap->len < cmap->start)
+   return -EINVAL;
+
mutex_lock(_helper->lock);
if (!drm_fb_helper_is_bound(fb_helper)) {
mutex_unlock(_helper->lock);
@@ -1353,6 +1357,29 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct 
fb_info *info)
transp = cmap->transp;
start = cmap->start;
 
+   if (info->fix.visual != FB_VISUAL_TRUECOLOR) {
+   if (!crtc->gamma_size) {
+   rc = -EINVAL;
+   goto out;
+   }
+
+   if (cmap->start + cmap->len > crtc->gamma_size) {
+   rc = -EINVAL;
+   goto out;
+   }
+
+   r = crtc->gamma_store;
+   g = r + crtc->gamma_size;
+   b = g + crtc->gamma_size;
+
+   memcpy(r + cmap->start, cmap->red,
+  cmap->len * sizeof(u16));
+   memcpy(g + cmap->start, cmap->green,
+  cmap->len * sizeof(u16));
+   memcpy(b + cmap->start, cmap->blue,
+  cmap->len * sizeof(u16));
+   }
+
for (j = 0; j < cmap->len; j++) {
u16 hred, hgreen, hblue, htransp = 0x;
 
-- 
2.1.4


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Re: [Intel-gfx] [PATCH v12 0/3] Enhancement to intel_dp_aux_backlight driver

[Daniel Vetter]

On Thu, Jun 22, 2017 at 12:03:36PM -0700, Puthikorn Voravootivat wrote:
> This patch set contain 3 patches which are already reviewed by DK.
> Another 6 patches in previous version was already merged in v7 and v9.
> - First patch sets the PWM freqency to match data in panel vbt.
> - Next patch adds heuristic to determine whether we should use AUX
>   or PWM pin to adjust panel backlight brightness.
> - Last patch adds support for dynamic brightness.
> 
> Change log:
> v12:
> - Rebase

Thanks for doing the rebase, applied.
-Daniel

> 
> v11:
> - Reorder patches in v10 to make the last patch come first
> - Fix nits
> 
> v10:
> - Add heuristic in patch #1
> - Add _unsafe mod option in patch #1, #2
> - handle frequency set error in patch #3
> 
> v9:
> - Fix nits in v8
> 
> v8:
> - Drop 4 patches that was already merged
> - Move DP_EDP_BACKLIGHT_AUX_ENABLE_CAP check to patch #2 to avoid
>   behavior change if only apply patch #1
> - Add TODO to warn about enable backlight twice in patch #2
> - Use DIV_ROUND_CLOSEST instead of just "/" in patch #5
> - Fix bug calculate pn in patch #5
> - Clarify commit  message / code comment in patch #5
> 
> v7:
> - Add check in intel_dp_pwm_pin_display_control_capable in patch #4
> - Add option in patch #6 to enable DPCD or not
> - Change definition in patch #8 and implementation in #9 to use Khz
> - Fix compiler warning from build bot in patch #9
> 
> v6:
> - Address review from Dhinakaran
> - Make PWM frequency to have highest value of Pn that make the
>   frequency still within 25% of desired frequency.
> 
> v5:
> - Split first patch in v4 to 3 patches
> - Bump priority for "Correctly enable backlight brightness adjustment via 
> DPCD"
> - Make logic clearer for the case that both PWM pin and AUX are supported
> - Add more log when write to register fail
> - Add log when enable DBC
> 
> v4:
> - Rebase / minor typo fix.
> 
> v3:
> - Add new implementation of PWM frequency patch
> 
> v2:
> - Drop PWM frequency patch
> - Address suggestion from Jani Nikula
> 
> Puthikorn Voravootivat (3):
>   drm/i915: Set PWM divider to match desired frequency in vbt
>   drm/i915: Add heuristic to determine better way to adjust brightness
>   drm/i915: Add option to support dynamic backlight via DPCD
> 
>  drivers/gpu/drm/i915/i915_params.c|  12 +-
>  drivers/gpu/drm/i915/i915_params.h|   5 +-
>  drivers/gpu/drm/i915/intel_dp_aux_backlight.c | 185 
> --
>  3 files changed, 186 insertions(+), 16 deletions(-)
> 
> -- 
> 2.13.1.611.g7e3b11ae1-goog
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH v5 7/7] drm: create hdmi output property

[Sharma, Shashank]

Regards

Shashank


On 6/23/2017 2:50 PM, Daniel Vetter wrote:

On Thu, Jun 22, 2017 at 10:33 AM, Sharma, Shashank
 wrote:

- The property values should be limited to what the driver can support, I
guess that would mean limiting the available ycbcr modes? Or does all
our hw support all the modes, including 420 (on the sink side)?

This property is targeted at DRM layer, so naturally its for all the HWs
along with Intel HW, so it serves a big range.
All our HDMI 1.4 sources support RGB444, and after this series, can support
YCBCR444.
All HDMI 2.0 sources should support YCBCR420, but they can declare this
using a bool variable which I added in patch 3 (ycbcr420_allowed)
As we are targeting both HDMI 1.4 as well as HDMI 2.0 (Src and Sink), as a
whole we are covering all options.

Yes, we need to define values for everything, since it's a generic
property. But for a given driver imo we should only allow the values
that are actually supported. An example would be the rotation
property, which supporsts X/Y-mirror and rotation by 90° steps. But on
a given i915 platform we only register support for the stuff the
driver/hw can do, e.g. pre-gen9 do not register 90/270° rotation. I
think we should do the same here. See
drm_plane_create_rotation_property(), specifically the
supported_rotations parameter.

Ah, I got your point now, and its valid.
If you see the I915 level handlers of YCBCR functions (added in patch 
10) they are taking care of blocking

anything which is not supported by driver for this platform, based on:
- The source capability
- The sink capability
- User preference of the property.
So on a whole, set of Intel platforms cover all the values of property, 
but at driver level we make sure to allow only what is suitable for this 
source + sink combination.

- Shashank


Cheers, Daniel


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Re: [Intel-gfx] [RESEND-CI v4 09/15] drm: add helper functions for YCBCR output handling

[Sharma, Shashank]

Regards

Shashank


On 6/23/2017 2:42 PM, Daniel Vetter wrote:

On Thu, Jun 22, 2017 at 11:42 AM, Sharma, Shashank
 wrote:

You should explain in 1-2 sentences what exactly this function does, and
when a driver should use it. Just documenting the input/output stuff
doesn't make the kerneldoc all that useful.

Did you miss the first 3 lines above ?
"get the most suitable output.
Find the best suitable HDMI output considering source capability, sink
capability and user's choice (expressed in form of drm property)"
Or you mean that's not enough ?

Indeed. Usually I sort the paramaters first, then the text. There
should also be an empty line before the text starts. Would be great if
you can do that since you'll respin anyway.

Sure, not a problem.
- Shashank

-Daniel


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[Intel-gfx] [RFC PATCH drm-intel] drm: arcpgu: arc_pgu_crtc_mode_valid() can be static

[kbuild test robot]

Signed-off-by: Fengguang Wu 
---
 arcpgu_crtc.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/arc/arcpgu_crtc.c 
b/drivers/gpu/drm/arc/arcpgu_crtc.c
index 99fbdae..611af74 100644
--- a/drivers/gpu/drm/arc/arcpgu_crtc.c
+++ b/drivers/gpu/drm/arc/arcpgu_crtc.c
@@ -64,8 +64,8 @@ static const struct drm_crtc_funcs arc_pgu_crtc_funcs = {
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
 };
 
-enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
-const struct drm_display_mode 
*mode)
+static enum drm_mode_status arc_pgu_crtc_mode_valid(struct drm_crtc *crtc,
+   const struct 
drm_display_mode *mode)
 {
struct arcpgu_drm_private *arcpgu = crtc_to_arcpgu_priv(crtc);
long rate, clk_rate = mode->clock * 1000;
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[Intel-gfx] [drm-intel:drm-intel-nightly 1499/1516] drivers/gpu/drm/arc/arcpgu_crtc.c:67:22: sparse: symbol 'arc_pgu_crtc_mode_valid' was not declared. Should it be static?

[kbuild test robot]

tree:   git://anongit.freedesktop.org/drm-intel drm-intel-nightly
head:   cd6f0ef4478545aa014d92cabe4d794bfe54fe33
commit: 2b3d860efa3461af109469e6de2eea48f6ef5cdd [1499/1516] drm: arcpgu: Use 
crtc->mode_valid() callback
reproduce:
# apt-get install sparse
git checkout 2b3d860efa3461af109469e6de2eea48f6ef5cdd
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__


sparse warnings: (new ones prefixed by >>)

>> drivers/gpu/drm/arc/arcpgu_crtc.c:67:22: sparse: symbol 
>> 'arc_pgu_crtc_mode_valid' was not declared. Should it be static?

Please review and possibly fold the followup patch.

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Re: [Intel-gfx] [kra...@redhat.com: Re: [PATCH v9 5/7] vfio: Define vfio based dma-buf operations]

[Zhi Wang]

Hi Gred and Alex:
Thanks for the reply! It would be better that kernel only provides 
functions instead of maintaining states from my point of view. If there 
is any existing async notification channel in vfio device fd? like 
reporting device events from vfio to QEMU? If so, It would be nice if we 
can extend that channel and notify the userspace application that guest 
framebuffer changed via that channel. So userspace application even 
doesn't need to call the ioctl periodically. :) If VM runs a 
single-buffered application.


Thanks,
Zhi.

On Fri, 2017-06-23 at 15:49 +0800, Zhi Wang wrote:

Hi:
  Thanks for the discussions! If the userspace application has
already maintained a LRU list, it looks like we don't need
generation
anymore,

generation isn't required, things are working just fine without that.
It is just a small optimization, userspace can skip the LRU lookup
altogether if the generation didn't change.

But of couse that only pays off if the kernel doesn't has to put much
effort into maintaining the generation id.  Something simple like
increasing it each time the guest writes a register which affects
plane_info.

If you think it doesn't make sense from the driver point of view we can
drop the generation.

cheers,
   Gerd

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Re: [Intel-gfx] [PATCH v2 13/14] drm: stm: remove dead code and pointless local lut storage

[Daniel Vetter]

On Thu, Jun 22, 2017 at 11:49:34AM +, Philippe CORNU wrote:
> 
> 
> On 06/22/2017 08:06 AM, Peter Rosin wrote:
> > The redundant fb helper .load_lut is no longer used, and can not
> > work right without also providing the fb helpers .gamma_set and
> > .gamma_get thus rendering the code in this driver suspect.
> > 
> 
> Hi Peter,
> STM32 chipsets supports 8-bit CLUT mode but this driver version does not 
> support it "yet" (final patch has not been upstreamed because it was a 
> too big fbdev patch for simply adding CLUT...).
> 
> Regarding your patch below, if it helps you to ease the drm framework 
> update then I am agree to "acknowledge it" asap, else if you are not in 
> a hurry, I would prefer a better and definitive patch handling 8-bit 
> CLUT properly and I am ok to help or/and to do it : )

I'll take your ack, since your 8bit lut support will be massively simpler
with Peter's series here :-)

> Extra questions:
> - any plan to update modetest with the DRM_FORMAT_C8 support + gamma 
> get/set?

We have gamma igts, well for the fancy new atomic color manager stuff.
Testing drivers with modetest is kinda not that awesome :-)
-Daniel

> - do you have a simple way to test clut with fbdev, last year we where 
> using an old version of the SDL but I am still looking for a small piece 
> of code to do it (else I will do it myself but C8 on fbdev is not really 
> a priority ;-)
> 
> best regards,
> Philippe
> 
> > Just remove the dead code.
> > 
> > Signed-off-by: Peter Rosin 
> > ---
> >   drivers/gpu/drm/stm/ltdc.c | 12 
> >   drivers/gpu/drm/stm/ltdc.h |  1 -
> >   2 files changed, 13 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
> > index 1b9483d..87829b9 100644
> > --- a/drivers/gpu/drm/stm/ltdc.c
> > +++ b/drivers/gpu/drm/stm/ltdc.c
> > @@ -375,17 +375,6 @@ static irqreturn_t ltdc_irq(int irq, void *arg)
> >* DRM_CRTC
> >*/
> >   
> > -static void ltdc_crtc_load_lut(struct drm_crtc *crtc)
> > -{
> > -   struct ltdc_device *ldev = crtc_to_ltdc(crtc);
> > -   unsigned int i, lay;
> > -
> > -   for (lay = 0; lay < ldev->caps.nb_layers; lay++)
> > -   for (i = 0; i < 256; i++)
> > -   reg_write(ldev->regs, LTDC_L1CLUTWR + lay * LAY_OFS,
> > - ldev->clut[i]);
> > -}
> > -
> >   static void ltdc_crtc_enable(struct drm_crtc *crtc)
> >   {
> > struct ltdc_device *ldev = crtc_to_ltdc(crtc);
> > @@ -523,7 +512,6 @@ static void ltdc_crtc_atomic_flush(struct drm_crtc 
> > *crtc,
> >   }
> >   
> >   static struct drm_crtc_helper_funcs ltdc_crtc_helper_funcs = {
> > -   .load_lut = ltdc_crtc_load_lut,
> > .enable = ltdc_crtc_enable,
> > .disable = ltdc_crtc_disable,
> > .mode_set_nofb = ltdc_crtc_mode_set_nofb,
> > diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
> > index d7a9c73..620ca55 100644
> > --- a/drivers/gpu/drm/stm/ltdc.h
> > +++ b/drivers/gpu/drm/stm/ltdc.h
> > @@ -27,7 +27,6 @@ struct ltdc_device {
> > struct drm_panel *panel;
> > struct mutex err_lock;  /* protecting error_status */
> > struct ltdc_caps caps;
> > -   u32 clut[256];  /* color look up table */
> > u32 error_status;
> > u32 irq_status;
> >   };
> > 
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Re: [Intel-gfx] [PATCH v5 7/7] drm: create hdmi output property

[Daniel Vetter]

On Thu, Jun 22, 2017 at 10:33 AM, Sharma, Shashank
 wrote:
>> - The property values should be limited to what the driver can support, I
>>guess that would mean limiting the available ycbcr modes? Or does all
>>our hw support all the modes, including 420 (on the sink side)?
>
> This property is targeted at DRM layer, so naturally its for all the HWs
> along with Intel HW, so it serves a big range.
> All our HDMI 1.4 sources support RGB444, and after this series, can support
> YCBCR444.
> All HDMI 2.0 sources should support YCBCR420, but they can declare this
> using a bool variable which I added in patch 3 (ycbcr420_allowed)
> As we are targeting both HDMI 1.4 as well as HDMI 2.0 (Src and Sink), as a
> whole we are covering all options.

Yes, we need to define values for everything, since it's a generic
property. But for a given driver imo we should only allow the values
that are actually supported. An example would be the rotation
property, which supporsts X/Y-mirror and rotation by 90° steps. But on
a given i915 platform we only register support for the stuff the
driver/hw can do, e.g. pre-gen9 do not register 90/270° rotation. I
think we should do the same here. See
drm_plane_create_rotation_property(), specifically the
supported_rotations parameter.

Cheers, Daniel
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Re: [Intel-gfx] [RESEND-CI v4 09/15] drm: add helper functions for YCBCR output handling

[Daniel Vetter]

On Thu, Jun 22, 2017 at 11:42 AM, Sharma, Shashank
 wrote:
>> You should explain in 1-2 sentences what exactly this function does, and
>> when a driver should use it. Just documenting the input/output stuff
>> doesn't make the kerneldoc all that useful.
>
> Did you miss the first 3 lines above ?
> "get the most suitable output.
> Find the best suitable HDMI output considering source capability, sink
> capability and user's choice (expressed in form of drm property)"
> Or you mean that's not enough ?

Indeed. Usually I sort the paramaters first, then the text. There
should also be an empty line before the text starts. Would be great if
you can do that since you'll respin anyway.
-Daniel
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Re: [Intel-gfx] [PATCH 01/13] drm/amd|radeon: Drop drm_vblank_cleanup

[Daniel Vetter]

On Thu, Jun 22, 2017 at 08:54:51AM -0400, Alex Deucher wrote:
> On Wed, Jun 21, 2017 at 4:28 AM, Daniel Vetter  wrote:
> > Both drivers shut down all crtc beforehand already, which will shut up
> > any pending vblank (the only thing vblank_cleanup really does is
> > disable the disable timer). Hence we don't need this here and can
> > remove it.
> >
> > Cc: Alex Deucher 
> > Cc: Christian König 
> > Signed-off-by: Daniel Vetter 
> 
> Acked-by: Alex Deucher 
> 
> Do you want me to pick this up or are you trying to land the whole
> series as one?

I'd like to get the final patch in soonish, so all going through drm-misc
would be less coordination.

Thanks for taking a look.
-Daniel

> 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 1 -
> >  drivers/gpu/drm/radeon/radeon_irq_kms.c | 1 -
> >  2 files changed, 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > index 62da6c5c6095..2480273c1dca 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > @@ -263,7 +263,6 @@ void amdgpu_irq_fini(struct amdgpu_device *adev)
> >  {
> > unsigned i, j;
> >
> > -   drm_vblank_cleanup(adev->ddev);
> > if (adev->irq.installed) {
> > drm_irq_uninstall(adev->ddev);
> > adev->irq.installed = false;
> > diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c 
> > b/drivers/gpu/drm/radeon/radeon_irq_kms.c
> > index 7aacb44df201..fff0d11b0600 100644
> > --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
> > +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
> > @@ -324,7 +324,6 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
> >   */
> >  void radeon_irq_kms_fini(struct radeon_device *rdev)
> >  {
> > -   drm_vblank_cleanup(rdev->ddev);
> > if (rdev->irq.installed) {
> > drm_irq_uninstall(rdev->ddev);
> > rdev->irq.installed = false;
> > --
> > 2.11.0
> >
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