[Intel-gfx] [PATCH] drm/drm_edid: Refactor HFVSDB parsing for DSC1.2

[Ankit Nautiyal]

DSC capabilities are given in bytes 11-13 of VSDB (i.e. bytes 8-10 of
SCDS). Since minimum length of Data block is 7, all bytes greater than 7
must be read only after checking the length of the data block.

This patch adds check for data block length before reading relavant DSC
bytes. It also corrects min DSC BPC to 8, and minor refactoring for
better readability, and proper log messages.

Signed-off-by: Ankit Nautiyal 
---
 drivers/gpu/drm/drm_edid.c | 124 +++--
 1 file changed, 77 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index bbc25e3b7220..f683a8d5fd31 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5703,12 +5703,58 @@ static void drm_parse_ycbcr420_deep_color_info(struct 
drm_connector *connector,
hdmi->y420_dc_modes = dc_mask;
 }
 
+static void drm_parse_dsc_slice_info(u8 dsc_max_slices,
+struct drm_hdmi_dsc_cap *hdmi_dsc)
+{
+   switch (dsc_max_slices) {
+   case 1:
+   hdmi_dsc->max_slices = 1;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 2:
+   hdmi_dsc->max_slices = 2;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 3:
+   hdmi_dsc->max_slices = 4;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 4:
+   hdmi_dsc->max_slices = 8;
+   hdmi_dsc->clk_per_slice = 340;
+   break;
+   case 5:
+   hdmi_dsc->max_slices = 8;
+   hdmi_dsc->clk_per_slice = 400;
+   break;
+   case 6:
+   hdmi_dsc->max_slices = 12;
+   hdmi_dsc->clk_per_slice = 400;
+   break;
+   case 7:
+   hdmi_dsc->max_slices = 16;
+   hdmi_dsc->clk_per_slice = 400;
+   break;
+   case 0:
+   default:
+   hdmi_dsc->max_slices = 0;
+   hdmi_dsc->clk_per_slice = 0;
+   }
+}
+
 /* Sink Capability Data Structure */
 static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
  const u8 *hf_scds)
 {
struct drm_display_info *display = >display_info;
struct drm_hdmi_info *hdmi = >hdmi;
+   u8 db_length = hf_scds[0] & 0x1F;
+   u8 dsc_max_frl_rate;
+   u8 dsc_max_slices;
+   struct drm_hdmi_dsc_cap *hdmi_dsc = >dsc_cap;
+
+   if (db_length < 7 || db_length > 31)
+   return;
 
display->has_hdmi_infoframe = true;
 
@@ -5749,17 +5795,25 @@ static void drm_parse_hdmi_forum_scds(struct 
drm_connector *connector,
 
if (hf_scds[7]) {
u8 max_frl_rate;
-   u8 dsc_max_frl_rate;
-   u8 dsc_max_slices;
-   struct drm_hdmi_dsc_cap *hdmi_dsc = >dsc_cap;
 
-   DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
+   if (max_frl_rate)
+   DRM_DEBUG_KMS("HDMI2.1 FRL support detected\n");
+
drm_get_max_frl_rate(max_frl_rate, >max_lanes,
 >max_frl_rate_per_lane);
+
+   drm_parse_ycbcr420_deep_color_info(connector, hf_scds);
+   }
+
+   if (db_length < 11)
+   return;
+
+   if (hf_scds[11]) {
hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2;
 
if (hdmi_dsc->v_1p2) {
+   DRM_DEBUG_KMS("HDMI DSC1.2 support detected\n");
hdmi_dsc->native_420 = hf_scds[11] & 
DRM_EDID_DSC_NATIVE_420;
hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP;
 
@@ -5770,52 +5824,28 @@ static void drm_parse_hdmi_forum_scds(struct 
drm_connector *connector,
else if (hf_scds[11] & DRM_EDID_DSC_10BPC)
hdmi_dsc->bpc_supported = 10;
else
-   hdmi_dsc->bpc_supported = 0;
-
-   dsc_max_frl_rate = (hf_scds[12] & 
DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
-   drm_get_max_frl_rate(dsc_max_frl_rate, 
_dsc->max_lanes,
-_dsc->max_frl_rate_per_lane);
-   hdmi_dsc->total_chunk_kbytes = hf_scds[13] & 
DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
-
-   dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES;
-   switch (dsc_max_slices) {
-   case 1:
-   hdmi_dsc->max_slices = 1;
-   hdmi_dsc->clk_per_slice = 340;
-   break;
-   case 2:
-   hdmi_dsc->max_slices = 2;
-   hdmi_dsc->clk_per_slice = 340;
-   

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Cleanup intel_phy_is_combo() (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Cleanup intel_phy_is_combo() (rev2)
URL   : https://patchwork.freedesktop.org/series/106450/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11935_full -> Patchwork_106450v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_106450v2_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106450v2_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106450v2_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- shard-iclb: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb1/igt@kms_big...@y-tiled-32bpp-rotate-180.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-iclb8/igt@kms_big...@y-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- shard-skl:  [PASS][3] -> [TIMEOUT][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-skl6/igt@kms_big...@yf-tiled-32bpp-rotate-90.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-skl9/igt@kms_big...@yf-tiled-32bpp-rotate-90.html

  
Known issues


  Here are the changes found in Patchwork_106450v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@display-4x:
- shard-tglb: NOTRUN -> [SKIP][5] ([i915#1839])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-tglb8/igt@feature_discov...@display-4x.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: [PASS][6] -> [SKIP][7] ([i915#4525])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb2/igt@gem_exec_balan...@parallel-contexts.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-iclb3/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_fair@basic-deadline:
- shard-kbl:  [PASS][8] -> [FAIL][9] ([i915#2846])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl6/igt@gem_exec_f...@basic-deadline.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-kbl1/igt@gem_exec_f...@basic-deadline.html
- shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2846])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-glk1/igt@gem_exec_f...@basic-deadline.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-glk5/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl:  [PASS][12] -> [FAIL][13] ([i915#2842])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-apl8/igt@gem_exec_fair@basic-none-s...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-apl2/igt@gem_exec_fair@basic-none-s...@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl:  [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl4/igt@gem_exec_fair@basic-p...@rcs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-kbl7/igt@gem_exec_fair@basic-p...@rcs0.html
- shard-glk:  [PASS][16] -> [FAIL][17] ([i915#2842])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-glk8/igt@gem_exec_fair@basic-p...@rcs0.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-glk3/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-tglb: NOTRUN -> [SKIP][18] ([fdo#109313])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-tglb8/igt@gem_exec_fl...@basic-batch-kernel-default-cmd.html

  * igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][19] -> [SKIP][20] ([i915#2190])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-tglb5/igt@gem_huc_c...@huc-copy.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-tglb7/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@verify-random:
- shard-tglb: NOTRUN -> [SKIP][21] ([i915#4613])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/shard-tglb8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
- shard-tglb: NOTRUN -> [SKIP][22] ([i915#4270])
   [22]: 

Re: [Intel-gfx] [PATCH] drm/i915: clear plane color ctl setting when turn full plane off

[Shankar, Uma]

> -Original Message-
> From: Lee, Shawn C 
> Sent: Wednesday, July 13, 2022 2:57 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Lee, Shawn C ; Jani Nikula
> ; Ville Syrjälä ; 
> Shankar,
> Uma ; Lisovskiy, Stanislav
> ; Tseng, William 
> Subject: [PATCH] drm/i915: clear plane color ctl setting when turn full plane 
> off

We can append "display" to drm/i915

> Customer report abnormal display output while switch eDP off sometimes.
> In current display disable flow, plane will be off at first. Then turn eDP 
> off and disable
> HW pipe line. We found the abnormal pixel comes after turn plane off. Clear 
> plane
> color ctl register when driver disable plane can solve this symptom.

Change Looks Good to me.
Reviewed-by: Uma Shankar 

> Cc: Jani Nikula 
> Cc: Ville Syrjälä 
> Cc: Shankar Uma 
> Cc: Stanislav Lisovskiy 
> Cc: William Tseng 
> Signed-off-by: Lee Shawn C 
> ---
>  drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index caa03324a733..90977cfb7ebb 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -620,6 +620,8 @@ skl_plane_disable_arm(struct intel_plane *plane,
> 
>   intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
>   intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
> + if (DISPLAY_VER(dev_priv) >= 10)
> + intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), 0);
>  }
> 
>  static void
> @@ -638,6 +640,7 @@ icl_plane_disable_arm(struct intel_plane *plane,
>   intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
>   intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
>   intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
> + intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), 0);
>  }
> 
>  static bool
> --
> 2.17.1

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop using swiotlb

[Patchwork]

== Series Details ==

Series: drm/i915: stop using swiotlb
URL   : https://patchwork.freedesktop.org/series/106589/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11935_full -> Patchwork_106589v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_106589v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106589v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106589v1_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_mmap_offset@clear:
- shard-tglb: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-tglb7/igt@gem_mmap_off...@clear.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-tglb2/igt@gem_mmap_off...@clear.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_mmap_offset@clear:
- {shard-tglu}:   NOTRUN -> [INCOMPLETE][3] +1 similar issue
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-tglu-3/igt@gem_mmap_off...@clear.html

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-75:
- {shard-rkl}:NOTRUN -> [SKIP][4] +1 similar issue
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-rkl-5/igt@kms_plane_scal...@plane-downscale-with-modifiers-factor-0-75.html

  * igt@prime_self_import@export-vs-gem_close-race:
- {shard-tglu}:   NOTRUN -> [FAIL][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-tglu-8/igt@prime_self_import@export-vs-gem_close-race.html

  
Known issues


  Here are the changes found in Patchwork_106589v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@display-4x:
- shard-tglb: NOTRUN -> [SKIP][6] ([i915#1839])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-tglb1/igt@feature_discov...@display-4x.html

  * igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][7] -> [TIMEOUT][8] ([i915#3070])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb3/igt@gem_...@unwedge-stress.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-iclb2/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_capture@pi@vecs0:
- shard-iclb: [PASS][9] -> [INCOMPLETE][10] ([i915#3371])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb2/igt@gem_exec_capture@p...@vecs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-iclb8/igt@gem_exec_capture@p...@vecs0.html

  * igt@gem_exec_fair@basic-deadline:
- shard-glk:  [PASS][11] -> [FAIL][12] ([i915#2846])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-glk1/igt@gem_exec_f...@basic-deadline.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-glk5/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-tglb7/igt@gem_exec_fair@basic-f...@rcs0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-glk:  [PASS][15] -> [FAIL][16] ([i915#2842])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-glk3/igt@gem_exec_fair@basic-n...@vcs0.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-glk1/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-none@vecs0:
- shard-kbl:  [PASS][17] -> [FAIL][18] ([i915#2842]) +2 similar 
issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-kbl7/igt@gem_exec_fair@basic-n...@vecs0.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-kbl6/igt@gem_exec_fair@basic-n...@vecs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][19] -> [FAIL][20] ([i915#2849])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/shard-iclb7/igt@gem_exec_fair@basic-throt...@rcs0.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/shard-iclb5/igt@gem_exec_fair@basic-throt...@rcs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-tglb: NOTRUN -> [SKIP][21] 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Pass drm_i915_private struct instead of gt for gen11_gu_misc_irq_handler/ack()

[Patchwork]

== Series Details ==

Series: drm/i915: Pass drm_i915_private struct instead of gt for 
gen11_gu_misc_irq_handler/ack()
URL   : https://patchwork.freedesktop.org/series/106598/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11935 -> Patchwork_106598v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/index.html

Participating hosts (36 -> 41)
--

  Additional (10): bat-dg1-5 bat-adlm-1 bat-dg2-9 bat-adlp-6 bat-adlp-4 
bat-adln-1 bat-rplp-1 bat-rpls-1 bat-rpls-2 bat-jsl-1 
  Missing(5): fi-hsw-4200u fi-ctg-p8600 fi-kbl-x1275 bat-jsl-3 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106598v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_lmem_swapping@parallel-random-engines:
- {bat-rplp-1}:   NOTRUN -> [SKIP][1] +19 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_selftest@live@gt_heartbeat:
- {bat-rpls-1}:   NOTRUN -> [INCOMPLETE][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-rpls-1/igt@i915_selftest@live@gt_heartbeat.html

  
Known issues


  Here are the changes found in Patchwork_106598v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@fbdev@read:
- bat-dg1-5:  NOTRUN -> [SKIP][3] ([i915#2582]) +4 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-dg1-5/igt@fb...@read.html

  * igt@gem_lmem_swapping@verify-random:
- bat-adlp-4: NOTRUN -> [SKIP][4] ([i915#4613]) +3 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-adlp-4/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][5] ([i915#4083])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#4077]) +2 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][7] ([i915#4079]) +1 similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-4: NOTRUN -> [SKIP][8] ([i915#3282])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-adlp-4/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5:  NOTRUN -> [SKIP][9] ([i915#1155])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][10] -> [INCOMPLETE][11] ([i915#5847])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258:   [PASS][12] -> [INCOMPLETE][13] ([i915#3303] / 
[i915#4785])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/fi-hsw-g3258/igt@i915_selftest@l...@hangcheck.html
- bat-dg1-5:  NOTRUN -> [DMESG-FAIL][14] ([i915#4957])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-blb-e6850:   [PASS][15] -> [DMESG-FAIL][16] ([i915#4528])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5:  NOTRUN -> [INCOMPLETE][17] ([i915#6011])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-adlp-4: NOTRUN -> [SKIP][18] ([i915#5903])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106598v1/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][19] ([i915#4212]) +7 similar issues
   [19]: 

[Intel-gfx] [PATCH] drm/i915: Pass drm_i915_private struct instead of gt for gen11_gu_misc_irq_handler/ack()

[Anusha Srivatsa]

gen11_gu_misc_irq_handler() and gen11_gu_misc_ack() do nothing tile
specific.

v2: gen11_gu_misc_irq_ack() tile agnostic like gen11_gu_misc_irq_handler()
(Tvrtko)

Cc: Tvrtko Ursulin 
Cc: Matt Roper 
Signed-off-by: Anusha Srivatsa 
---
 drivers/gpu/drm/i915/i915_irq.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 73cebc6aa650..eb37b6bacaac 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2653,9 +2653,9 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
 }
 
 static u32
-gen11_gu_misc_irq_ack(struct intel_gt *gt, const u32 master_ctl)
+gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32 master_ctl)
 {
-   void __iomem * const regs = gt->uncore->regs;
+   void __iomem * const regs = i915->uncore.regs;
u32 iir;
 
if (!(master_ctl & GEN11_GU_MISC_IRQ))
@@ -2669,10 +2669,10 @@ gen11_gu_misc_irq_ack(struct intel_gt *gt, const u32 
master_ctl)
 }
 
 static void
-gen11_gu_misc_irq_handler(struct intel_gt *gt, const u32 iir)
+gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir)
 {
if (iir & GEN11_GU_MISC_GSE)
-   intel_opregion_asle_intr(gt->i915);
+   intel_opregion_asle_intr(i915);
 }
 
 static inline u32 gen11_master_intr_disable(void __iomem * const regs)
@@ -2736,11 +2736,11 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
if (master_ctl & GEN11_DISPLAY_IRQ)
gen11_display_irq_handler(i915);
 
-   gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
+   gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl);
 
gen11_master_intr_enable(regs);
 
-   gen11_gu_misc_irq_handler(gt, gu_misc_iir);
+   gen11_gu_misc_irq_handler(i915, gu_misc_iir);
 
pmu_irq_stats(i915, IRQ_HANDLED);
 
@@ -2801,11 +2801,11 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
if (master_ctl & GEN11_DISPLAY_IRQ)
gen11_display_irq_handler(i915);
 
-   gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
+   gu_misc_iir = gen11_gu_misc_irq_ack(i915, master_ctl);
 
dg1_master_intr_enable(regs);
 
-   gen11_gu_misc_irq_handler(gt, gu_misc_iir);
+   gen11_gu_misc_irq_handler(i915, gu_misc_iir);
 
pmu_irq_stats(i915, IRQ_HANDLED);
 
-- 
2.25.1

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev8)

[Patchwork]

== Series Details ==

Series: Fixes integer overflow or integer truncation issues in page lookups, 
ttm place configuration and scatterlist creation (rev8)
URL   : https://patchwork.freedesktop.org/series/104704/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11934_full -> Patchwork_104704v8_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_104704v8_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_104704v8_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_104704v8_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@short-flip-before-cursor@atomic-transitions:
- shard-skl:  NOTRUN -> [FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-skl7/igt@kms_cursor_legacy@short-flip-before-cur...@atomic-transitions.html

  * igt@kms_vblank@pipe-b-accuracy-idle:
- shard-apl:  [PASS][2] -> [FAIL][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11934/shard-apl7/igt@kms_vbl...@pipe-b-accuracy-idle.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-apl1/igt@kms_vbl...@pipe-b-accuracy-idle.html

  * igt@prime_self_import@export-vs-gem_close-race:
- shard-iclb: [PASS][4] -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11934/shard-iclb4/igt@prime_self_import@export-vs-gem_close-race.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-iclb3/igt@prime_self_import@export-vs-gem_close-race.html

  
New tests
-

  New tests have been introduced between CI_DRM_11934_full and 
Patchwork_104704v8_full:

### New IGT tests (8) ###

  * 
igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-a:
- Statuses : 1 pass(s)
- Exec time: [0.09] s

  * 
igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-b:
- Statuses : 1 pass(s)
- Exec time: [0.12] s

  * igt@kms_flip@flip-vs-panning-vs-hang@a-hdmi-a4:
- Statuses : 1 pass(s)
- Exec time: [30.40] s

  * igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a4:
- Statuses : 1 pass(s)
- Exec time: [29.98] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.56] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.46] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.45] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.45] s

  

Known issues


  Here are the changes found in Patchwork_104704v8_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@display-4x:
- shard-iclb: NOTRUN -> [SKIP][6] ([i915#1839])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-iclb5/igt@feature_discov...@display-4x.html

  * igt@gem_ccs@ctrl-surf-copy:
- shard-tglb: NOTRUN -> [SKIP][7] ([i915#3555] / [i915#5325])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-tglb7/igt@gem_...@ctrl-surf-copy.html
- shard-iclb: NOTRUN -> [SKIP][8] ([i915#5327])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-iclb5/igt@gem_...@ctrl-surf-copy.html

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][9] -> [FAIL][10] ([i915#6268])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11934/shard-tglb5/igt@gem_ctx_e...@basic-nohangcheck.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-tglb2/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_ctx_persistence@hostile:
- shard-snb:  NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-snb5/igt@gem_ctx_persiste...@hostile.html
- shard-tglb: NOTRUN -> [FAIL][12] ([i915#2410])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/shard-tglb7/igt@gem_ctx_persiste...@hostile.html

  * igt@gem_eio@in-flight-contexts-immediate:
- shard-iclb: [PASS][13] -> [TIMEOUT][14] ([i915#3070])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11934/shard-iclb3/igt@gem_...@in-flight-contexts-immediate.html
   [14]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Cleanup intel_phy_is_combo() (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Cleanup intel_phy_is_combo() (rev2)
URL   : https://patchwork.freedesktop.org/series/106450/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11935 -> Patchwork_106450v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/index.html

Participating hosts (36 -> 42)
--

  Additional (10): bat-dg1-5 bat-adlm-1 bat-dg2-9 bat-adlp-6 bat-adlp-4 
bat-adln-1 bat-rplp-1 bat-rpls-1 bat-rpls-2 bat-jsl-1 
  Missing(4): fi-ctg-p8600 fi-kbl-x1275 fi-bdw-samus fi-hsw-4200u 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106450v2:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_lmem_swapping@parallel-random-engines:
- {bat-rplp-1}:   NOTRUN -> [SKIP][1] +19 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_selftest@live@requests:
- {bat-rpls-1}:   NOTRUN -> [INCOMPLETE][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-rpls-1/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@workarounds:
- {bat-adlp-6}:   NOTRUN -> [DMESG-FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-adlp-6/igt@i915_selftest@l...@workarounds.html

  
Known issues


  Here are the changes found in Patchwork_106450v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@fbdev@read:
- bat-dg1-5:  NOTRUN -> [SKIP][4] ([i915#2582]) +4 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-dg1-5/igt@fb...@read.html

  * igt@gem_lmem_swapping@verify-random:
- bat-adlp-4: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-adlp-4/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#4083])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][7] ([i915#4077]) +2 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][8] ([i915#4079]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-4: NOTRUN -> [SKIP][9] ([i915#3282])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-adlp-4/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#1155])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u:   [PASS][11] -> [DMESG-FAIL][12] ([i915#62])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-cfl-8109u/igt@i915_pm_...@module-reload.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/fi-cfl-8109u/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-glk-dsi: [PASS][13] -> [DMESG-FAIL][14] ([i915#5334])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-glk-dsi/igt@i915_selftest@live@gt_heartbeat.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/fi-glk-dsi/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  NOTRUN -> [DMESG-FAIL][15] ([i915#4494] / [i915#4957])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-blb-e6850:   [PASS][16] -> [DMESG-FAIL][17] ([i915#4528])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@ring_submission:
- fi-cfl-8109u:   [PASS][18] -> [DMESG-WARN][19] ([i915#5904]) +29 
similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106450v2/fi-cfl-8109u/igt@i915_selftest@live@ring_submission.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- 

Re: [Intel-gfx] [PATCH] drm/i915/display: Cleanup intel_phy_is_combo()

[Matt Roper]

On Thu, Jul 21, 2022 at 01:17:54PM -0700, Anusha Srivatsa wrote:
> No functional change. Cleanup the intel_phy_is_combo

But there actually is a functional change here --- display version 14
will now (properly) fall through to the 'else' branch instead of being
picked up by the 11/12/adl branch.  I believe that was your original
motivation for this patch, so you may want to mention that in the commit
message (and drop the "no functional change" statement).

The code change itself looks fine to me since it seems like the
traditional combo PHYs may be a thing of the past and we don't want to
keep assuming future platforms will have any.


Matt

> to accommodate for cases where combo phy is not available.
> 
> v2: retain comment that explains DG2 returning false from
> intel_phy_is_combo() (Arun)
> 
> Cc: Arun R Murthy 
> Cc: Matt Roper 
> Signed-off-by: Anusha Srivatsa 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 14 ++
>  1 file changed, 6 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a0f84cbe974f..b9d0be7753a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2082,22 +2082,20 @@ bool intel_phy_is_combo(struct drm_i915_private 
> *dev_priv, enum phy phy)
>  {
>   if (phy == PHY_NONE)
>   return false;
> - else if (IS_DG2(dev_priv))
> - /*
> -  * DG2 outputs labelled as "combo PHY" in the bspec use
> -  * SNPS PHYs with completely different programming,
> -  * hence we always return false here.
> -  */
> - return false;
>   else if (IS_ALDERLAKE_S(dev_priv))
>   return phy <= PHY_E;
>   else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
>   return phy <= PHY_D;
>   else if (IS_JSL_EHL(dev_priv))
>   return phy <= PHY_C;
> - else if (DISPLAY_VER(dev_priv) >= 11)
> + else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11, 12))
>   return phy <= PHY_B;
>   else
> + /*
> +  * DG2 outputs labelled as "combo PHY" in the bspec use
> +  * SNPS PHYs with completely different programming,
> +  * hence we always return false here.
> +  */
>   return false;
>  }
>  
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation

[Intel-gfx] [PATCH] drm/i915/display: Cleanup intel_phy_is_combo()

[Anusha Srivatsa]

No functional change. Cleanup the intel_phy_is_combo
to accommodate for cases where combo phy is not available.

v2: retain comment that explains DG2 returning false from
intel_phy_is_combo() (Arun)

Cc: Arun R Murthy 
Cc: Matt Roper 
Signed-off-by: Anusha Srivatsa 
---
 drivers/gpu/drm/i915/display/intel_display.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index a0f84cbe974f..b9d0be7753a8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2082,22 +2082,20 @@ bool intel_phy_is_combo(struct drm_i915_private 
*dev_priv, enum phy phy)
 {
if (phy == PHY_NONE)
return false;
-   else if (IS_DG2(dev_priv))
-   /*
-* DG2 outputs labelled as "combo PHY" in the bspec use
-* SNPS PHYs with completely different programming,
-* hence we always return false here.
-*/
-   return false;
else if (IS_ALDERLAKE_S(dev_priv))
return phy <= PHY_E;
else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
return phy <= PHY_D;
else if (IS_JSL_EHL(dev_priv))
return phy <= PHY_C;
-   else if (DISPLAY_VER(dev_priv) >= 11)
+   else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11, 12))
return phy <= PHY_B;
else
+   /*
+* DG2 outputs labelled as "combo PHY" in the bspec use
+* SNPS PHYs with completely different programming,
+* hence we always return false here.
+*/
return false;
 }
 
-- 
2.25.1

[Intel-gfx] ✗ Fi.CI.BUILD: failure for sna: Initialize sna pointer

[Patchwork]

== Series Details ==

Series: sna: Initialize sna pointer
URL   : https://patchwork.freedesktop.org/series/106592/
State : failure

== Summary ==

Error: patch 
https://patchwork.freedesktop.org/api/1.0/series/106592/revisions/1/mbox/ not 
applied
Applying: sna: Initialize sna pointer
error: sha1 information is lacking or useless (src/sna/sna_accel.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 sna: Initialize sna pointer
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

[Intel-gfx] [PATCH xf86-video-intel] sna: Initialize sna pointer

[Jeffrey Knockel]

From: Jeffrey Knockel 

Initialize the sna pointer if it hasn't already been initialized.

Otherwise, we have the following segfault:

0x7f24b993ef04 in list_add (entry=0x564a7a1380f8, head=0x7ffd01899aa8) at 
../../src/intel_list.h:161
0x7f24b993f0a0 in list_move (list=0x564a7a1380f8, head=0x7ffd01899aa8) at 
../../src/intel_list.h:248
0x7f24b99524c9 in sna_drawable_use_bo (drawable=0x564a79ef0530, flags=0, 
box=0x7ffd01853c80, damage=0x7ffd01853ca0)
at sna_accel.c:3965
0x7f24b996f21b in sna_poly_segment (drawable=0x564a79ef0530, 
gc=0x564a7a0c44f0, n=146, seg=0x564a7a582ff4)
at sna_accel.c:10858
0x564a788607bf in damagePolySegment (pDrawable=0x564a79ef0530, 
pGC=0x564a7a0c44f0, nSeg=146, pSeg=0x564a7a582ff4)
at ../miext/damage/damage.c:1023
0x564a787e3577 in ProcPolySegment (client=0x564a7a15bc10) at 
../dix/dispatch.c:1909
0x564a787df4be in Dispatch () at ../dix/dispatch.c:551
0x564a787eeb2b in dix_main (argc=11, argv=0x7ffd01854128, 
envp=0x7ffd01854188) at ../dix/main.c:272
0x564a789e05cd in main (argc=11, argv=0x7ffd01854128, envp=0x7ffd01854188) 
at ../dix/stubmain.c:34

Signed-off-by: Jeffrey Knockel 
---
 src/sna/sna_accel.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 89b82afa..72a84833 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -3632,7 +3632,7 @@ sna_drawable_use_bo(DrawablePtr drawable, unsigned flags, 
const BoxRec *box,
 {
PixmapPtr pixmap = get_drawable_pixmap(drawable);
struct sna_pixmap *priv = sna_pixmap(pixmap);
-   struct sna *sna;
+   struct sna *sna = NULL;
RegionRec region;
int16_t dx, dy;
int ret;
@@ -3962,6 +3962,8 @@ use_gpu_bo:
 
if (priv->shm) {
assert(!priv->flush);
+   if (sna == NULL)
+   sna = to_sna_from_pixmap(pixmap);
list_move(>flush_list, >flush_pixmaps);
}
 
-- 
2.34.1

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: stop using swiotlb

[Patchwork]

== Series Details ==

Series: drm/i915: stop using swiotlb
URL   : https://patchwork.freedesktop.org/series/106589/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11935 -> Patchwork_106589v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/index.html

Participating hosts (36 -> 43)
--

  Additional (10): bat-dg1-5 bat-adlm-1 bat-dg2-9 bat-adlp-6 bat-adlp-4 
bat-adln-1 bat-rplp-1 bat-rpls-1 bat-rpls-2 bat-jsl-1 
  Missing(3): fi-ctg-p8600 fi-bdw-samus fi-hsw-4200u 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106589v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@dmabuf@all:
- {fi-jsl-1}: NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/fi-jsl-1/igt@dma...@all.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- {bat-rplp-1}:   NOTRUN -> [SKIP][2] +19 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_selftest@live@requests:
- {bat-rpls-1}:   NOTRUN -> [INCOMPLETE][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-rpls-1/igt@i915_selftest@l...@requests.html

  
Known issues


  Here are the changes found in Patchwork_106589v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@fbdev@read:
- bat-dg1-5:  NOTRUN -> [SKIP][4] ([i915#2582]) +4 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@fb...@read.html

  * igt@gem_lmem_swapping@verify-random:
- bat-adlp-4: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-adlp-4/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#4083])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][7] ([i915#4077]) +2 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][8] ([i915#4079]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-4: NOTRUN -> [SKIP][9] ([i915#3282])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-adlp-4/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#1155])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@requests:
- fi-blb-e6850:   [PASS][11] -> [DMESG-FAIL][12] ([i915#4528])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11935/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5:  NOTRUN -> [INCOMPLETE][13] ([i915#6011])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-kbl-x1275:   NOTRUN -> [SKIP][14] ([fdo#109271])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/fi-kbl-x1275/igt@i915_susp...@basic-s3-without-i915.html
- bat-adlp-4: NOTRUN -> [SKIP][15] ([i915#5903])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][16] ([i915#4212]) +7 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][17] ([i915#4215])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_busy@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][18] ([i915#1845] / [i915#4303])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106589v1/bat-dg1-5/igt@kms_b...@basic.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-rkl-11600:   NOTRUN -> [SKIP][19] 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/hdmi: Prune modes that require HDMI2.1 FRL (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/hdmi: Prune modes that require HDMI2.1 FRL (rev3)
URL   : https://patchwork.freedesktop.org/series/106011/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11933_full -> Patchwork_106011v3_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_106011v3_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106011v3_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106011v3_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- shard-iclb: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-iclb2/igt@kms_big...@y-tiled-32bpp-rotate-180.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/shard-iclb7/igt@kms_big...@y-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- shard-skl:  [PASS][3] -> [TIMEOUT][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-skl6/igt@kms_big...@yf-tiled-32bpp-rotate-90.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/shard-skl7/igt@kms_big...@yf-tiled-32bpp-rotate-90.html

  
New tests
-

  New tests have been introduced between CI_DRM_11933_full and 
Patchwork_106011v3_full:

### New IGT tests (108) ###

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-y-rc_ccs:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * 
igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-y-rc_ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.21] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-y-rc_ccs:
- Statuses : 1 pass(s)
- Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-y-rc_ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.18] s

  * 
igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.18] s

  * 
igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-y-rc_ccs:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * 
igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-y-rc_ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-y-rc_ccs:
- Statuses : 1 pass(s)
- Exec time: [0.24] s

  * 
igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-y-rc_ccs-cc:
- Statuses : 1 pass(s)
- Exec time: [0.21] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-linear:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-x:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-y:
- Statuses : 1 pass(s)
- Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-y-rc_ccs:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-y-rc_ccs-cc:
- 

Re: [Intel-gfx] [drm] 39dec70a06: leaking-addresses.proc._dyndbg_classes.

[jim . cromie]

On Wed, Jul 20, 2022 at 7:05 PM kernel test robot 
wrote:

>
>
> Greeting,
>
> FYI, we noticed the following commit (built with gcc-11):
>
> commit: 39dec70a061e581e60adb416031948ecd2dcd5d0 ("drm: POC drm on dyndbg
> - use in core, 2 helpers, 3 drivers.")
> https://github.com/jimc/linux.git dyn-drm-trc
>
> in testcase: leaking-addresses
> version: leaking-addresses-x86_64-4f19048-1_20220518
> with following parameters:
>
> ucode: 0x28
>
>
>
> on test machine: 8 threads 1 sockets Intel(R) Core(TM) i7-4770 CPU @
> 3.40GHz with 16G memory
>
> caused below changes (please refer to attached dmesg/kmsg for entire
> log/backtrace):
>
>
>
>
> If you fix the issue, kindly add following tag
> Reported-by: kernel test robot 
>
>
> below (1) is not observed on parent tests:
>




>
>
> 2022-07-18 02:55:06 ./leaking_addresses.pl --output-raw result/scan.out
> 2022-07-18 02:55:30 ./leaking_addresses.pl --input-raw result/scan.out
> --squash-by-filename
>
> Total number of results from scan (incl dmesg): 168569
>
> dmesg output:
> [2.186392] mapped IOAPIC to ff5fb000 (fec0)
>
> Results squashed by filename (excl dmesg). Displaying [
> ], 
>

new section, populated by macro invocations in this patch

[3 __dyndbg_classes] 0xc08dad00<- (1)
> [18 __dyndbg] 0xc01fd4e0
>

So I think this is All-good.


>

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: stop using swiotlb

[Patchwork]

== Series Details ==

Series: drm/i915: stop using swiotlb
URL   : https://patchwork.freedesktop.org/series/106589/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH] drm/i915: stop using swiotlb

[Robert Beckett]

Calling swiotlb functions directly is nowadays considered harmful. See
https://lore.kernel.org/intel-gfx/20220711082614.ga29...@lst.de/

Replace swiotlb_max_segment() calls with dma_max_mapping_size().
In i915_gem_object_get_pages_internal() no longer consider max_segment
only if CONFIG_SWIOTLB is enabled. There can be other (iommu related)
causes of specific max segment sizes.

Cc: Christoph Hellwig 
Cc: Tvrtko Ursulin 
Cc: Thomas Hellstrom 
Cc: Matthew Auld 

Signed-off-by: Robert Beckett 
---
 drivers/gpu/drm/i915/gem/i915_gem_internal.c | 20 +---
 drivers/gpu/drm/i915/gem/i915_gem_shmem.c|  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c  |  4 ++--
 drivers/gpu/drm/i915/gem/i915_gem_userptr.c  |  2 +-
 drivers/gpu/drm/i915/i915_scatterlist.h  | 16 
 5 files changed, 9 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c 
b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index c698f95af15f..e1aca378d90f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -6,7 +6,6 @@
 
 #include 
 #include 
-#include 
 
 #include "i915_drv.h"
 #include "i915_gem.h"
@@ -38,22 +37,13 @@ static int i915_gem_object_get_pages_internal(struct 
drm_i915_gem_object *obj)
struct scatterlist *sg;
unsigned int sg_page_sizes;
unsigned int npages;
-   int max_order;
+   int max_order = MAX_ORDER;
+   size_t max_segment;
gfp_t gfp;
 
-   max_order = MAX_ORDER;
-#ifdef CONFIG_SWIOTLB
-   if (is_swiotlb_active(obj->base.dev->dev)) {
-   unsigned int max_segment;
-
-   max_segment = swiotlb_max_segment();
-   if (max_segment) {
-   max_segment = max_t(unsigned int, max_segment,
-   PAGE_SIZE) >> PAGE_SHIFT;
-   max_order = min(max_order, ilog2(max_segment));
-   }
-   }
-#endif
+   max_segment = dma_max_mapping_size(i915->drm.dev);
+   max_segment = max_t(size_t, max_segment, PAGE_SIZE) >> PAGE_SHIFT;
+   max_order = min(max_order, ilog2(max_segment));
 
gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
if (IS_I965GM(i915) || IS_I965G(i915)) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4eed3dd90ba8..b0ec65b7c1da 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -194,7 +194,7 @@ static int shmem_get_pages(struct drm_i915_gem_object *obj)
struct intel_memory_region *mem = obj->mm.region;
struct address_space *mapping = obj->base.filp->f_mapping;
const unsigned long page_count = obj->base.size / PAGE_SIZE;
-   unsigned int max_segment = i915_sg_segment_size();
+   unsigned int max_segment = dma_max_mapping_size(i915->drm.dev);
struct sg_table *st;
struct sgt_iter sgt_iter;
struct page *page;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c 
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 5a5cf332d8a5..882f046f4d18 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -189,7 +189,7 @@ static int i915_ttm_tt_shmem_populate(struct ttm_device 
*bdev,
struct drm_i915_private *i915 = container_of(bdev, typeof(*i915), bdev);
struct intel_memory_region *mr = i915->mm.regions[INTEL_MEMORY_SYSTEM];
struct i915_ttm_tt *i915_tt = container_of(ttm, typeof(*i915_tt), ttm);
-   const unsigned int max_segment = i915_sg_segment_size();
+   const unsigned int max_segment = dma_max_mapping_size(i915->drm.dev);
const size_t size = (size_t)ttm->num_pages << PAGE_SHIFT;
struct file *filp = i915_tt->filp;
struct sgt_iter sgt_iter;
@@ -568,7 +568,7 @@ static struct i915_refct_sgt *i915_ttm_tt_get_st(struct 
ttm_tt *ttm)
ret = sg_alloc_table_from_pages_segment(st,
ttm->pages, ttm->num_pages,
0, (unsigned long)ttm->num_pages << PAGE_SHIFT,
-   i915_sg_segment_size(), GFP_KERNEL);
+   dma_max_mapping_size(i915_tt->dev), GFP_KERNEL);
if (ret) {
st->sgl = NULL;
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c 
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 094f06b4ce33..8a62a71859e6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -129,7 +129,7 @@ static void i915_gem_object_userptr_drop_ref(struct 
drm_i915_gem_object *obj)
 static int i915_gem_userptr_get_pages(struct drm_i915_gem_object *obj)
 {
const unsigned long num_pages = obj->base.size >> PAGE_SHIFT;
-   unsigned int max_segment = i915_sg_segment_size();
+   unsigned int max_segment = dma_max_mapping_size(obj->base.dev->dev);
struct 

Re: [Intel-gfx] [PATCH v4 1/2] vfio: Replace the DMA unmapping notifier with a callback

[Alex Williamson]

On Thu, 21 Jul 2022 12:01:47 -0400
Eric Farman  wrote:

> On Wed, 2022-07-20 at 17:04 -0600, Alex Williamson wrote:
> > On Wed, 20 Jul 2022 17:08:29 -0300
> > Jason Gunthorpe  wrote:
> >   
> > > On Wed, Jul 20, 2022 at 01:41:13PM -0600, Alex Williamson wrote:
> > >
> > > > ie. we don't need the gfn, we only need the iova.
> > > 
> > > Right, that makes sense
> > >
> > > > However then I start to wonder why we're passing in 1 for the
> > > > number of
> > > > pages because this previously notifier, now callback is called
> > > > for the
> > > > entire vfio_dma range when we find any pinned pages.  
> > > 
> > > Well, it is doing this because it only ever pins one page.  
> > 
> > Of course that page is not necessarily the page it unpins given the
> > contract misunderstanding below.
> >
> > > The drivers are confused about what the contract is. vfio is
> > > calling
> > > the notifier with the entire IOVA range that is being unmapped and
> > > the
> > > drivers are expecting to receive notifications only for the IOVA
> > > they
> > > have actually pinned.
> > >   
> > > > Should ap and ccw implementations of .dma_unmap just be replaced
> > > > with a
> > > > BUG_ON(1)?
> > > 
> > > The point of these callbacks is to halt concurrent DMA, and ccw
> > > does
> > > that today.  
> > 
> > ccw essentially only checks whether the starting iova of the unmap is
> > currently mapped.  If not it does nothing, if it is it tries to reset
> > the device and unpin everything.  Chances are the first iova is not
> > the
> > one pinned, so we don't end up removing the pinned page and type1
> > will
> > eventually BUG_ON after a few tries.
> >   
> > > It looks like AP is missing a call to ap_aqic(), so it is
> > > probably double wrong.  
> > 
> > Thankfully the type1 unpinning path can't be tricked into unpinning
> > something that wasn't pinned, so chances are the unpin call does
> > nothing, with a small risk that it unpins another driver's pinned
> > page,
> > which might not yet have been notified and could still be using the
> > page.  In the end, if ap did have a page pinned in the range, we'll
> > hit
> > the same BUG_ON as above.
> >   
> > > What I'd suggest is adding a WARN_ON that the dma->pfn_list is not
> > > empty and leave these functions alone.  
> > 
> > The BUG_ON still exists in type1.
> > 
> > Eric, Matt, Tony, Halil, JasonH, any quick fixes here?  ccw looks
> > like
> > it would be pretty straightforward to test against a range rather
> > than
> > a single iova.  
> 
> Agreed, ccw looks pretty easy. Should I send something to go before
> this series to make stable easier? (It's a trivial change in either
> direction, so either is fine to me.)

It looks like we're expecting an rc8 for this development cycle, so the
merge window will be pushed out a week (which works better for some
upcoming PTO on my end), but if it's trivial either way let's plan for
the fix to follow Nicolin's and Jason's series and we can always post a
backport to the stable list if there's any trouble.  Thanks,

Alex

Re: [Intel-gfx] [PATCH] drm/i915/guc: support v69 in parallel to v70

[Ceraolo Spurio, Daniele]

On 7/21/2022 2:29 AM, Tvrtko Ursulin wrote:


On 19/07/2022 16:29, Ceraolo Spurio, Daniele wrote:



On 7/19/2022 12:34 AM, Tvrtko Ursulin wrote:


On 18/07/2022 17:41, Ceraolo Spurio, Daniele wrote:

On 7/18/2022 3:02 AM, Tvrtko Ursulin wrote:


Hi,

On 15/07/2022 23:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. 
As this
is a quick fix, v69 has been re-introduced as the single 
"fallback" guc
version in case v70 is not available on disk. All v69 specific 
code has
been labeled as such for easy identification, and the same was 
done for
all v70 functions for which there is a separate v69 version, to 
avoid

accidentally calling the wrong version via the unlabeled name.

When the fallback mode kicks in, a drm_warn message is printed in 
dmesg

to warn the user of the required update.

The plan is to follow this up with a more complex rework to allow 
for

multiple different GuC versions to be supported at the same time.

Fixes: 2584b3549f4c ("drm/i915/guc: Update to GuC version 70.1.1")


Please check if I got this right:

 * ADL-P was out of "force probe" starting from 5.17.
 * GuC fw got bumped from v62 to v69 in 5.18.

Does this mean you would also need to handle v62 to avoid 
regressing ADL-P from 5.17 to 5.18? I couldn't figure out when 
ADL-P switched from execlists to GuC due a bit convoluted 
supported/wanted/needed macros etc, so not entirely sure.




I haven't checked about previous GuC versions because the report 
from Dave was on the 69->70 transition and about re-introducing v69 
support, so I just focused on that. Let me dig on the versions and 
on what would be needed to support all 3 revs (if it is required).


Secondly, my concern with the approach like in this patch is that 
it would grow the i915 code base *if* there is no incentive to 
keep the compatiblity breaking firware updates in check.




The grow of the i915 code is inevitable. Even without changes to 
existing platforms, new features for new platforms will require new 
GuC interfaces. Sometimes the GuC team also refactors an existing 
interface so that it can include a new aspect of an existing 
feature. We'll have to discuss with them how to minimize breakages 
in such scenarios.


To think about in tandem with this is the question of whether many 
more fallback versions need to be handled, even for platforms 
which only use GuC to load HuC? Those would also regress in the 
media encoding side of things, even if they don't use GuC 
submission, right?




The only HuC-only platform is ADL-S and that went out of force 
probe when we were on GuC 62, so definitely nothing older than that 
will be needed.


I was referring to platforms where HuC is used for some encoding 
types. List on 
https://github.com/intel/media-driver/blob/master/docs/media_features.md#media-features-summary. 
It is not entirely clear to me from that list - you are saying the 
HuC is actually used only on ADL-S? I was going by the existence of 
HuC firmware files only so might be wrong just as well.




Like GuC, HuC can be enabled via modparam on anything gen11+, but it 
is only enabled by default on a subset of platforms, which are all 
the platforms for which we enable GuC submission, plus ADL-S. Of 
those, the only ones out of force probe are the ADL variants and 
their derivatives, so they're the only ones we need to guarantee 
backwards compatibility for.


Hm okay, I wasn't aware HuC is not an officially supported thing until 
ADL-S. Does that mean there is a document somewhere telling users to 
use i915.enable_guc=, maybe on the media driver site, 
or somewhere, to get best encoding results on earlier platforms, or 
media driver truly cannot use it before ADL-S? I am not saying it's a 
problem if there is such guidance, since it is still an unsafe 
modparam, just curious.


As far as I'm aware the media team did publish the information around 
the enable_guc requirement for pre-ADL platforms, but I don't know where 
it was published.


Daniele




See uc_expand_default_options() in intel_uc.c for further details.


Thanks, I was looking for this the other day briefly and failed to 
find it. (Was defeated by the auto generated supported/wanted macros, 
flags and the web of that.)


Regards,

Tvrtko



Daniele


Regards,

Tvrtko

If this is so, the approach from this patch would feel rushed in 
my view.


It totally is, no argument there. As mentioned in the commit 
message, the plan is to replace the whole thing with a more 
flexible and cleaner mechanism, but we do need something for the 
upcoming 5.19 release so there is no time to do this properly from 
the get-go.




There is also the question of being able to automatically load the 
latest _compatible_ (same major version) GuC fw found on disk. Aka 
allowing a bugfix firmware update which does not require a kernel 
update. In theory should be possible but we don't have that 
implemented either, right?


We do not. Something like this was 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dg1: Fix power gate sequence. (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dg1: Fix power gate sequence. (rev2)
URL   : https://patchwork.freedesktop.org/series/85082/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11933_full -> Patchwork_85082v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_85082v2_full absolutely need to 
be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_85082v2_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_85082v2_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- shard-iclb: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-iclb2/igt@kms_big...@y-tiled-32bpp-rotate-180.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-iclb6/igt@kms_big...@y-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- shard-skl:  NOTRUN -> [TIMEOUT][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-skl1/igt@kms_big...@yf-tiled-32bpp-rotate-270.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@prime_self_import@export-vs-gem_close-race:
- {shard-rkl}:[PASS][4] -> [FAIL][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-rkl-1/igt@prime_self_import@export-vs-gem_close-race.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-rkl-6/igt@prime_self_import@export-vs-gem_close-race.html
- {shard-tglu}:   [PASS][6] -> [FAIL][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-tglu-5/igt@prime_self_import@export-vs-gem_close-race.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-tglu-6/igt@prime_self_import@export-vs-gem_close-race.html

  
New tests
-

  New tests have been introduced between CI_DRM_11933_full and 
Patchwork_85082v2_full:

### New IGT tests (2) ###

  * 
igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-a:
- Statuses : 1 pass(s)
- Exec time: [0.09] s

  * 
igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-b:
- Statuses : 1 pass(s)
- Exec time: [0.13] s

  

Known issues


  Here are the changes found in Patchwork_85082v2_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [PASS][8] -> [SKIP][9] ([i915#4525]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-iclb2/igt@gem_exec_balan...@parallel-keep-submit-fence.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-iclb8/igt@gem_exec_balan...@parallel-keep-submit-fence.html

  * igt@gem_exec_capture@pi@rcs0:
- shard-skl:  [PASS][10] -> [INCOMPLETE][11] ([i915#3371])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-skl9/igt@gem_exec_capture@p...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-skl10/igt@gem_exec_capture@p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk:  [PASS][12] -> [FAIL][13] ([i915#2842])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-glk2/igt@gem_exec_fair@basic-p...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-glk5/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl:  [PASS][14] -> [FAIL][15] ([i915#2842]) +3 similar 
issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/shard-kbl7/igt@gem_exec_fair@basic-p...@vecs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-kbl4/igt@gem_exec_fair@basic-p...@vecs0.html

  * igt@gem_lmem_swapping@basic:
- shard-skl:  NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-skl1/igt@gem_lmem_swapp...@basic.html

  * igt@gem_pread@exhaustion:
- shard-skl:  NOTRUN -> [WARN][17] ([i915#2658])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/shard-skl7/igt@gem_pr...@exhaustion.html

  * igt@gem_pxp@create-protected-buffer:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#4270]) +1 similar issue
   [18]: 

Re: [Intel-gfx] [PULL] drm-intel-gt-next

[Vivi, Rodrigo]

On Wed, 2022-07-13 at 17:31 -0400, Rodrigo Vivi wrote:
> Hi Dave and Daniel,
> 
> On behalf of Tvrtko, who is recovering from Covid,
> here goes the latest drm-intel-gt-next pull request
> targeting 5.20.

Hi Folks,

any particular issue with this pull request?

We just realized it is not yet part of the drm-next.


Thanks,
Rodrigo.

> 
> Thanks,
> Rodrigo.
> 
> Driver uAPI changes:
> - All related to the Small BAR support: (and all by Matt Auld)
>  * add probed_cpu_visible_size
>  * expose the avail memory region tracking
>  * apply ALLOC_GPU only by default
>  * add NEEDS_CPU_ACCESS hint
>  * tweak error capture on recoverable contexts
> 
> Driver highlights:
> - Add Small BAR support (Matt)
> - Add MeteorLake support (RK)
> - Add support for LMEM PCIe resizable BAR (Akeem)
> 
> Driver important fixes:
> - ttm related fixes (Matt Auld)
> - Fix a performance regression related to waitboost (Chris)
> - Fix GT resets (Chris)
> 
> Driver others:
> - Adding GuC SLPC selftest (Vinay)
> - Fix ADL-N GuC load (Daniele)
> - Add platform workaround (Gustavo, Matt Roper)
> - DG2 and ATS-M device ID updates (Matt Roper)
> - Add VM_BIND doc rfc with uAPI documentation (Niranjana)
> - Fix user-after-free in vma destruction (Thomas)
> - Async flush of GuC log regions (Alan)
> - Fixes in selftests (Chris, Dan, Andrzej)
> - Convert to drm_dbg (Umesh)
> - Disable OA sseu config param for newer hardware (Umesh)
> - Multi-cast register steering changes (Matt Roper)
> - Add lmem_bar_size modparam (Priyanka)
> 
> Thanks,
> Rodrigo.
> 
> The following changes since commit
> a06968563775181690125091f470a8655742dcbf:
> 
>   drm/i915: Fix a lockdep warning at error capture (2022-06-29
> 14:52:50 +0530)
> 
> are available in the Git repository at:
> 
>   git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-gt-next-
> 2022-07-13
> 
> for you to fetch changes up to
> 17cd10a44a8962860ff4ba351b2a290e752dbbde:
> 
>   drm/i915: Add lmem_bar_size modparam (2022-07-13 17:47:51 +0100)
> 
> 
> Driver uAPI changes:
> - All related to the Small BAR support: (and all by Matt Auld)
>  * add probed_cpu_visible_size
>  * expose the avail memory region tracking
>  * apply ALLOC_GPU only by default
>  * add NEEDS_CPU_ACCESS hint
>  * tweak error capture on recoverable contexts
> 
> Driver highlights:
> - Add Small BAR support (Matt)
> - Add MeteorLake support (RK)
> - Add support for LMEM PCIe resizable BAR (Akeem)
> 
> Driver important fixes:
> - ttm related fixes (Matt Auld)
> - Fix a performance regression related to waitboost (Chris)
> - Fix GT resets (Chris)
> 
> Driver others:
> - Adding GuC SLPC selftest (Vinay)
> - Fix ADL-N GuC load (Daniele)
> - Add platform workaround (Gustavo, Matt Roper)
> - DG2 and ATS-M device ID updates (Matt Roper)
> - Add VM_BIND doc rfc with uAPI documentation (Niranjana)
> - Fix user-after-free in vma destruction (Thomas)
> - Async flush of GuC log regions (Alan)
> - Fixes in selftests (Chris, Dan, Andrzej)
> - Convert to drm_dbg (Umesh)
> - Disable OA sseu config param for newer hardware (Umesh)
> - Multi-cast register steering changes (Matt Roper)
> - Add lmem_bar_size modparam (Priyanka)
> 
> 
> Akeem G Abodunrin (1):
>   drm/i915: Add support for LMEM PCIe resizable bar
> 
> Alan Previn (1):
>   drm/i915/guc: Asynchronous flush of GuC log regions
> 
> Andrzej Hajda (1):
>   drm/i915/selftests: fix subtraction overflow bug
> 
> Chris Wilson (6):
>   drm/i915/selftests: Grab the runtime pm in shrink_thp
>   drm/i915/gt: Serialize GRDOM access between multiple engine
> resets
>   drm/i915/gt: Serialize TLB invalidates with GT resets
>   drm/i915/gem: Look for waitboosting across the whole object
> prior to individual waits
>   drm/i915: Bump GT idling delay to 2 jiffies
>   drm/i915/gt: Only kick the signal worker if there's been an
> update
> 
> Dan Carpenter (1):
>   drm/i915/selftests: fix a couple IS_ERR() vs NULL tests
> 
> Daniele Ceraolo Spurio (1):
>   drm/i915/guc: ADL-N should use the same GuC FW as ADL-S
> 
> Gustavo Sousa (1):
>   drm/i915/pvc: Implement w/a 16016694945
> 
> Matt Roper (4):
>   drm/i915: DG2 and ATS-M device ID updates
>   drm/i915/gt: Add general DSS steering iterator to intel_gt_mcr
>   drm/i915/dg2: Add Wa_15010599737
>   drm/i915: Correct ss -> steering calculation for pre-Xe_HP
> platforms
> 
> Matthew Auld (15):
>   drm/doc: add rfc section for small BAR uapi
>   drm/i915/uapi: add probed_cpu_visible_size
>   drm/i915/uapi: expose the avail tracking
>   drm/i915: remove intel_memory_region avail
>   drm/i915/uapi: apply ALLOC_GPU_ONLY by default
>   drm/i915/uapi: add NEEDS_CPU_ACCESS hint
>   drm/i915/error: skip non-mappable pages
>   drm/i915/uapi: tweak error capture on recoverable contexts
>   drm/i915/selftests: skip the mman tests for 

[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev8)

[Patchwork]

== Series Details ==

Series: Fixes integer overflow or integer truncation issues in page lookups, 
ttm place configuration and scatterlist creation (rev8)
URL   : https://patchwork.freedesktop.org/series/104704/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11934 -> Patchwork_104704v8


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/index.html

Participating hosts (36 -> 44)
--

  Additional (11): bat-dg1-5 bat-adlm-1 fi-icl-u2 bat-dg2-9 bat-adlp-6 
bat-adlp-4 bat-adln-1 bat-rplp-1 bat-rpls-1 bat-rpls-2 bat-jsl-1 
  Missing(3): fi-ctg-p8600 fi-bdw-samus fi-hsw-4200u 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_104704v8:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@requests:
- {bat-rpls-1}:   NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-rpls-1/igt@i915_selftest@l...@requests.html

  * igt@prime_vgem@basic-read:
- {bat-rplp-1}:   NOTRUN -> [SKIP][2] +19 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-rplp-1/igt@prime_v...@basic-read.html

  
Known issues


  Here are the changes found in Patchwork_104704v8 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@fbdev@nullptr:
- bat-dg1-5:  NOTRUN -> [SKIP][3] ([i915#2582]) +4 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-dg1-5/igt@fb...@nullptr.html

  * igt@gem_exec_suspend@basic-s0@smem:
- fi-skl-6600u:   [PASS][4] -> [DMESG-WARN][5] ([i915#5122])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11934/fi-skl-6600u/igt@gem_exec_suspend@basic...@smem.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/fi-skl-6600u/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_huc_copy@huc-copy:
- fi-icl-u2:  NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/fi-icl-u2/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlp-4: NOTRUN -> [SKIP][7] ([i915#4613]) +3 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-adlp-4/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_lmem_swapping@random-engines:
- fi-icl-u2:  NOTRUN -> [SKIP][8] ([i915#4613]) +3 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/fi-icl-u2/igt@gem_lmem_swapp...@random-engines.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][9] ([i915#4083])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#4077]) +2 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-dg1-5/igt@gem_tiled_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][11] ([i915#4079]) +1 similar issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-4: NOTRUN -> [SKIP][12] ([i915#3282])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-adlp-4/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#1155])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-dg1-5/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][14] -> [INCOMPLETE][15] ([i915#4785])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11934/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-5:  NOTRUN -> [INCOMPLETE][16] ([i915#6011])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-dg1-5/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-icl-u2:  NOTRUN -> [SKIP][17] ([i915#5903])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/fi-icl-u2/igt@i915_susp...@basic-s3-without-i915.html
- bat-adlp-4: NOTRUN -> [SKIP][18] ([i915#5903])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104704v8/bat-adlp-4/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev8)

[Patchwork]

== Series Details ==

Series: Fixes integer overflow or integer truncation issues in page lookups, 
ttm place configuration and scatterlist creation (rev8)
URL   : https://patchwork.freedesktop.org/series/104704/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fixes integer overflow or integer truncation issues in page lookups, ttm place configuration and scatterlist creation (rev8)

[Patchwork]

== Series Details ==

Series: Fixes integer overflow or integer truncation issues in page lookups, 
ttm place configuration and scatterlist creation (rev8)
URL   : https://patchwork.freedesktop.org/series/104704/
State : warning

== Summary ==

Error: dim checkpatch failed
f2a675bf6eec drm: Move and add a few utility macros into drm util header
-:87: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'x' - possible side-effects?
#87: FILE: include/drm/drm_util.h:92:
+#define overflows_type(x, T) \
+   (is_type_unsigned(x) ? \
+   is_type_unsigned(T) ? \
+   (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T)) ? 1 
: 0 \
+   : (sizeof(x) >= sizeof(T) && (x) >> (BITS_PER_TYPE(T) - 
1)) ? 1 : 0 \
+   : is_type_unsigned(T) ? \
+   ((x) < 0) ? 1 : (sizeof(x) > sizeof(T) && (x) >> 
BITS_PER_TYPE(T)) ? 1 : 0 \
+   : (sizeof(x) > sizeof(T)) ? \
+   ((x) < 0) ? (((x) * -1) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : ((x) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : 0)

-:87: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'T' - possible side-effects?
#87: FILE: include/drm/drm_util.h:92:
+#define overflows_type(x, T) \
+   (is_type_unsigned(x) ? \
+   is_type_unsigned(T) ? \
+   (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T)) ? 1 
: 0 \
+   : (sizeof(x) >= sizeof(T) && (x) >> (BITS_PER_TYPE(T) - 
1)) ? 1 : 0 \
+   : is_type_unsigned(T) ? \
+   ((x) < 0) ? 1 : (sizeof(x) > sizeof(T) && (x) >> 
BITS_PER_TYPE(T)) ? 1 : 0 \
+   : (sizeof(x) > sizeof(T)) ? \
+   ((x) < 0) ? (((x) * -1) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : ((x) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+   : 0)

total: 0 errors, 0 warnings, 2 checks, 100 lines checked
cda10e3d348a drm/i915/gem: Typecheck page lookups
-:138: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#138: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:413:
+#define i915_gem_object_page_iter_get_sg(obj, it, n, offset) ({ \
+   exactly_pgoff_t(n); \
+   __i915_gem_object_page_iter_get_sg(obj, it, n, offset); \
+})

-:187: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#187: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:458:
+#define i915_gem_object_get_sg(obj, n, offset) ({ \
+   exactly_pgoff_t(n); \
+   __i915_gem_object_get_sg(obj, n, offset); \
+})

-:215: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#215: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:483:
+__i915_gem_object_get_sg_dma(struct drm_i915_gem_object *obj, pgoff_t n,
+   unsigned int *offset)

-:236: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#236: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:503:
+#define i915_gem_object_get_sg_dma(obj, n, offset) ({ \
+   exactly_pgoff_t(n); \
+   __i915_gem_object_get_sg_dma(obj, n, offset); \
+})

-:274: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#274: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:539:
+#define i915_gem_object_get_page(obj, n) ({ \
+   exactly_pgoff_t(n); \
+   __i915_gem_object_get_page(obj, n); \
+})

-:311: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#311: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:574:
+#define i915_gem_object_get_dirty_page(obj, n) ({ \
+   exactly_pgoff_t(n); \
+   __i915_gem_object_get_dirty_page(obj, n); \
+})

-:352: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#352: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:612:
+#define i915_gem_object_get_dma_address_len(obj, n, len) ({ \
+   exactly_pgoff_t(n); \
+   __i915_gem_object_get_dma_address_len(obj, n, len); \
+})

-:389: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#389: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:647:
+#define i915_gem_object_get_dma_address(obj, n) ({ \
+   exactly_pgoff_t(n); \
+   __i915_gem_object_get_dma_address(obj, n); \
+})

total: 0 errors, 0 warnings, 8 checks, 616 lines checked
a30b0be18b0f drm/i915: Check for integer truncation on scatterlist creation
-:200: WARNING:NEW_TYPEDEFS: do not add new typedefs
#200: FILE: drivers/gpu/drm/i915/i915_scatterlist.h:224:
+typedef unsigned int __sg_size_t; /* see linux/scatterlist.h */

-:201: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in 
parentheses
#201: FILE: drivers/gpu/drm/i915/i915_scatterlist.h:225:
+#define sg_alloc_table(sgt, nents, gfp) \
+   overflows_type(nents, __sg_size_t) ? -E2BIG : (sg_alloc_table)(sgt, 
(__sg_size_t)(nents), gfp)

-:201: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'nents' - possible 
side-effects?
#201: FILE: drivers/gpu/drm/i915/i915_scatterlist.h:225:
+#define 

Re: [Intel-gfx] susetting the remaining swioltb couplin in DRM

[Robert Beckett]

On 18/07/2022 12:36, Tvrtko Ursulin wrote:


Hi,

On 12/07/2022 06:00, Christoph Hellwig wrote:

On Mon, Jul 11, 2022 at 04:31:49PM -0400, Rodrigo Vivi wrote:

On Mon, Jul 11, 2022 at 10:26:14AM +0200, Christoph Hellwig wrote:

Hi i915 and nouveau maintainers,

any chance I could get some help to remove the remaining direct
driver calls into swiotlb, namely swiotlb_max_segment and
is_swiotlb_active.  Either should not matter to a driver as they
should be written to the DMA API.


Hi Christoph,

while we take a look here, could you please share the reasons
behind sunsetting this calls?


Because they are a completely broken layering violation.  A driver has
absolutely no business knowing the dma-mapping violation.  The DMA
API reports what we think is all useful constraints (e.g.
dma_max_mapping_size()), and provides useful APIs to (e.g.
dma_alloc_noncoherent or dma_alloc_noncontiguous) to allocate pages
that can be mapped without bounce buffering and drivers should use
the proper API instead of poking into one particular implementation
and restrict it from changing.

swiotlb_max_segment in particular returns a value that isn't actually
correct (a driver can't just use all of swiotlb) AND actually doesn't
work as is in various scenarious that are becoming more common,
most notably host with memory encryption schemes that always require
bounce buffering.


All these are either in the internal backend or in the old shmem 
backend. I understand both are soon to be retired or deprecated. I think.


+ Matt & Thomas, and Bob actually as well, as I think authorities in the 
shmem, TTM and internal backend at the moment. Could you guys please 
have look if and how the TTM backend needs to handle this and what is 
the timeline of retirement if relevant?


Regards,

Tvrtko


So currently these are used directly in the internal backend and 
indirectly via i915_sg_segment_size() in shmem, ttm and userptr backends.


internal and userptr are being refactored currently (internal is ready 
but lacking review), but the refactoring would just make them use the 
ttm backend which still uses these.


It seems to me like a simple solution would be to just replace 
swiotlb_max_segment() calls with dma_max_mapping_size() as a drop in 
replacement. This follows the same logic as drm_prime_pages_to_sg().

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add D3Cold-Off support for runtime-pm (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Add D3Cold-Off support for runtime-pm (rev3)
URL   : https://patchwork.freedesktop.org/series/105427/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11933 -> Patchwork_105427v3


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105427v3 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105427v3, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/index.html

Participating hosts (47 -> 45)
--

  Additional (3): fi-kbl-soraka bat-adls-5 bat-jsl-3 
  Missing(5): fi-hsw-4200u fi-icl-u2 fi-ctg-p8600 fi-hsw-4770 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105427v3:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-adl-ddr5:[PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-adl-ddr5/igt@i915_pm_...@basic-pci-d3-state.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-adl-ddr5/igt@i915_pm_...@basic-pci-d3-state.html
- fi-cfl-guc: [PASS][3] -> [DMESG-WARN][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-cfl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-cfl-guc/igt@i915_pm_...@basic-pci-d3-state.html
- fi-bdw-5557u:   [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-bdw-5557u/igt@i915_pm_...@basic-pci-d3-state.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-bdw-5557u/igt@i915_pm_...@basic-pci-d3-state.html
- fi-rkl-guc: [PASS][7] -> [FAIL][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-rkl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-rkl-guc/igt@i915_pm_...@basic-pci-d3-state.html
- fi-cfl-8700k:   [PASS][9] -> [DMESG-WARN][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-cfl-8700k/igt@i915_pm_...@basic-pci-d3-state.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-cfl-8700k/igt@i915_pm_...@basic-pci-d3-state.html
- fi-bdw-gvtdvm:  [PASS][11] -> [DMESG-WARN][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-bdw-gvtdvm/igt@i915_pm_...@basic-pci-d3-state.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-bdw-gvtdvm/igt@i915_pm_...@basic-pci-d3-state.html
- fi-skl-guc: [PASS][13] -> [DMESG-WARN][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-skl-guc/igt@i915_pm_...@basic-pci-d3-state.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-skl-guc/igt@i915_pm_...@basic-pci-d3-state.html
- bat-adlp-4: [PASS][15] -> [DMESG-WARN][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/bat-adlp-4/igt@i915_pm_...@basic-pci-d3-state.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/bat-adlp-4/igt@i915_pm_...@basic-pci-d3-state.html
- fi-hsw-g3258:   [PASS][17] -> [DMESG-WARN][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-hsw-g3258/igt@i915_pm_...@basic-pci-d3-state.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-hsw-g3258/igt@i915_pm_...@basic-pci-d3-state.html
- fi-glk-dsi: [PASS][19] -> [DMESG-WARN][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-glk-dsi/igt@i915_pm_...@basic-pci-d3-state.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-glk-dsi/igt@i915_pm_...@basic-pci-d3-state.html
- fi-glk-j4005:   [PASS][21] -> [DMESG-WARN][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-glk-j4005/igt@i915_pm_...@basic-pci-d3-state.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-glk-j4005/igt@i915_pm_...@basic-pci-d3-state.html
- fi-rkl-11600:   [PASS][23] -> [DMESG-WARN][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-rkl-11600/igt@i915_pm_...@basic-pci-d3-state.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-rkl-11600/igt@i915_pm_...@basic-pci-d3-state.html
- fi-skl-6700k2:  [PASS][25] -> [DMESG-WARN][26]
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-skl-6700k2/igt@i915_pm_...@basic-pci-d3-state.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105427v3/fi-skl-6700k2/igt@i915_pm_...@basic-pci-d3-state.html
- fi-cfl-8109u:   

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix comment typo

[Andi Shyti]

> On Sat, Jul 16, 2022 at 12:05:20PM +0800, Jason Wang wrote:
> > Fix the double `wait' typo in comment.
> > 
> > Signed-off-by: Jason Wang 
> 
> Few warnings for this patch:
> 
>  1. you missed Rodrigo's r-b tag.
>  2. please add a counter to your patch, this would be [PATCH v2]
>  3. please add a changelog, as this is a single patch, do it
> after the '---'
> 
> No need to resend, just keep the three notes in mind for your
> next patches. Anyway, thanks for the fix and as I am at it:
> 
> Reviewed-by: Andi Shyti 

Pushed in drm-intel-next.

Thanks,
Andi

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add D3Cold-Off support for runtime-pm (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Add D3Cold-Off support for runtime-pm (rev3)
URL   : https://patchwork.freedesktop.org/series/105427/
State : warning

== Summary ==

Error: dim checkpatch failed
4f11e13b3cc3 drm/i915: Added is_intel_rpm_allowed helper
6171adbfb722 drm/i915: Guard rc6 helpers with is_intel_rpm_allowed
b7376087143b drm/i915: Extend rpm in intel_guc_global_policies_update
af8d888e4322 drm/i915: sanitize dc state in rpm resume
b8b9121feb43 Drm/i915/rpm: Add intel_runtime_idle
11e785317730 drm/i915/rpm: d3cold Policy
-:61: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#61: FILE: drivers/gpu/drm/i915/i915_params.c:201:
+i915_param_named_unsafe(d3cold_sr_lmem_threshold, int, 0600,
+   "Enable VRAM Self refresh when size of lmem is greater to this 
threshold. "

total: 0 errors, 0 warnings, 1 checks, 97 lines checked
f6bc98625c72 drm/i915: Add i915_save/load_pci_state helpers
038d9ea49a5c drm/i915 : Add D3COLD OFF support

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix comment typo

[Andi Shyti]

Hi Jason,

On Sat, Jul 16, 2022 at 12:05:20PM +0800, Jason Wang wrote:
> Fix the double `wait' typo in comment.
> 
> Signed-off-by: Jason Wang 

Few warnings for this patch:

 1. you missed Rodrigo's r-b tag.
 2. please add a counter to your patch, this would be [PATCH v2]
 3. please add a changelog, as this is a single patch, do it
after the '---'

No need to resend, just keep the three notes in mind for your
next patches. Anyway, thanks for the fix and as I am at it:

Reviewed-by: Andi Shyti 

Thanks,
Andi

> ---
>  drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c 
> b/drivers/gpu/drm/i915/selftests/i915_request.c
> index c56a0c2cd2f7..ec05f578a698 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_request.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_request.c
> @@ -971,7 +971,7 @@ static struct i915_vma *empty_batch(struct 
> drm_i915_private *i915)
>   if (err)
>   goto err;
>  
> - /* Force the wait wait now to avoid including it in the benchmark */
> + /* Force the wait now to avoid including it in the benchmark */
>   err = i915_vma_sync(vma);
>   if (err)
>   goto err_pin;
> -- 
> 2.35.1

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdmi: Prune modes that require HDMI2.1 FRL (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/hdmi: Prune modes that require HDMI2.1 FRL (rev3)
URL   : https://patchwork.freedesktop.org/series/106011/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11933 -> Patchwork_106011v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/index.html

Participating hosts (47 -> 44)
--

  Additional (1): bat-jsl-3 
  Missing(4): fi-ctg-p8600 fi-bxt-dsi fi-bdw-samus fi-hsw-4200u 

Known issues


  Here are the changes found in Patchwork_106011v3 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u:   [PASS][1] -> [DMESG-FAIL][2] ([i915#62])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-cfl-8109u/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-cfl-8109u/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live@late_gt_pm:
- fi-cfl-8109u:   [PASS][3] -> [DMESG-WARN][4] ([i915#5904]) +29 
similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-cfl-8109u/igt@i915_selftest@live@late_gt_pm.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-cfl-8109u:   [PASS][5] -> [DMESG-WARN][6] ([i915#5904] / [i915#62])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-cfl-8109u/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-elk-e7500:   NOTRUN -> [SKIP][7] ([fdo#109271])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-elk-e7500/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-rkl-guc: NOTRUN -> [SKIP][8] ([fdo#111827])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-rkl-guc/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [PASS][9] -> [DMESG-WARN][10] ([i915#62]) +12 similar 
issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  
 Possible fixes 

  * igt@i915_selftest@live@gem:
- {bat-dg2-9}:[DMESG-WARN][11] ([i915#5763]) -> [PASS][12] +7 
similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/bat-dg2-9/igt@i915_selftest@l...@gem.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/bat-dg2-9/igt@i915_selftest@l...@gem.html

  * igt@i915_selftest@live@gt_lrc:
- fi-rkl-guc: [INCOMPLETE][13] ([i915#4983]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@requests:
- fi-elk-e7500:   [DMESG-FAIL][15] ([i915#4528]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-elk-e7500/igt@i915_selftest@l...@requests.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106011v3/fi-elk-e7500/igt@i915_selftest@l...@requests.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5763]: https://gitlab.freedesktop.org/drm/intel/issues/5763
  [i915#5903]: https://gitlab.freedesktop.org/drm/intel/issues/5903
  [i915#5904]: 

Re: [Intel-gfx] [PATCH] drm/i915: Suppress oom warning for shmemfs object allocation failure

[Das, Nirmoy]

On 7/21/2022 11:49 AM, Matthew Auld wrote:

On 20/07/2022 13:23, Nirmoy Das wrote:

From: Chris Wilson 

We report object allocation failures to userspace with ENOMEM, yet we
still show the memory warning after failing to shrink device allocated
pages. While this warning is similar to other system page allocation
failures, it is superfluous to the ENOMEM provided directly to
userspace.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4936


Is it not possible that this triggers OOM warning when calling 
sg_alloc_table() or similar?



I haven't observed any after running the test for a while but I think it 
might be possible, Do you think I should add __GFP_NOWARN for that too ?



Nirmoy


I guess shmem_read_mapping_page_gfp() is the most likely spot where 
this triggers OOM, but that doesn't have to be the case?



Signed-off-by: Chris Wilson 
Signed-off-by: Nirmoy Das 
---
  drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c

index 4eed3dd90ba8..4466173e1bcc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -137,7 +137,7 @@ int shmem_sg_alloc_table(struct drm_i915_private 
*i915, struct sg_table *st,

   * trigger the out-of-memory killer and for
   * this we want __GFP_RETRY_MAYFAIL.
   */
-    gfp |= __GFP_RETRY_MAYFAIL;
+    gfp |= __GFP_RETRY_MAYFAIL | __GFP_NOWARN;
  }
  } while (1);

Re: [Intel-gfx] [PATCH 6/8] drm/i915/rpm: d3cold Policy

[Tangudu, Tilak]

> -Original Message-
> From: Gupta, Anshuman 
> Sent: Thursday, July 21, 2022 5:00 PM
> To: Tangudu, Tilak ; Ewins, Jon
> ; Belgaumkar, Vinay ;
> Roper, Matthew D ; Wilson, Chris P
> ; Nikula, Jani ; Gupta,
> saurabhg ; Vivi, Rodrigo
> ; Nilawar, Badal ; Deak,
> Imre ; Iddamsetty, Aravind
> ; intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH 6/8] drm/i915/rpm: d3cold Policy
> 
> 
> 
> > -Original Message-
> > From: Tangudu, Tilak 
> > Sent: Thursday, July 21, 2022 3:30 PM
> > To: Ewins, Jon ; Belgaumkar, Vinay
> > ; Roper, Matthew D
> > ; Wilson, Chris P
> > ; Nikula, Jani ;
> > Gupta, saurabhg ; Vivi, Rodrigo
> > ; Gupta, Anshuman
> ;
> > Nilawar, Badal ; Tangudu, Tilak
> > ; Deak, Imre ;
> > Iddamsetty, Aravind ;
> > intel-gfx@lists.freedesktop.org
> > Subject: [PATCH 6/8] drm/i915/rpm: d3cold Policy
> >
> > From: Tilak Tangudu 
> Please don't change the authorship of patch.
I have not changed and at the same time I missed to add author explicitly 
I will make a note of it

> >
> > Add d3cold_sr_lmem_threshold modparam to choose between d3cold-off
> > zero watt and  d3hot/d3cold-VRAM Self Refresh.
> > i915 requires to evict the lmem objects to smem in order to support d3cold-
> Off.
> > if platform does not supports vram_sr feature then fall back to d3hot
> > by disabling d3cold to avoid the rpm suspend/resume latency.
> > Extend the d3cold_sr_lmem_threshold modparam to debugfs i915_params
> so
> > that, it can be used by igt test.
> >
> > If gfx root port is not capable of sending PME from d3cold or doesn't
> > have _PR3 power resources then only d3hot state can be supported.
> >
> > Adding intel_pm_prepare_targeted_d3_state() to choose the correct
> > target d3 state and cache it to intel_runtime_pm structure, it can be
> > used in rpm suspend/resume callback accordingly.
> >
> > v2: lmem->avail stopped tracking lmem usage since ttm is introduced,
> > so removed lmem->avail usage in policy.
> > FIXME here, lmem usage is not added, need to be added by using query
> > functions.
> > FIXME, Forcing the policy to enter D3COLD_OFF for validation purpose.
> >
> > Cc: Rodrigo Vivi 
> > Signed-off-by: Anshuman Gupta 
> > Signed-off-by: Tilak Tangudu 
> > ---
> >  drivers/gpu/drm/i915/i915_driver.c  |  6 +
> >  drivers/gpu/drm/i915/i915_params.c  |  5 
> >  drivers/gpu/drm/i915/i915_params.h  |  1 +
> >  drivers/gpu/drm/i915/intel_pm.c | 35 +
> >  drivers/gpu/drm/i915/intel_pm.h |  1 +
> >  drivers/gpu/drm/i915/intel_runtime_pm.h |  7 +
> >  6 files changed, 55 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_driver.c
> > b/drivers/gpu/drm/i915/i915_driver.c
> > index 4c36554567fd..2b2e9563f149 100644
> > --- a/drivers/gpu/drm/i915/i915_driver.c
> > +++ b/drivers/gpu/drm/i915/i915_driver.c
> > @@ -1581,6 +1581,12 @@ static int intel_runtime_idle(struct device *kdev)
> > struct drm_i915_private *i915 = kdev_to_i915(kdev);
> > int ret = 1;
> >
> > +   disable_rpm_wakeref_asserts(>runtime_pm);
> > +   ret = intel_pm_prepare_targeted_d3_state(i915);
> > +   if (!ret)
> > +   ret = 1;
> > +
> > +   enable_rpm_wakeref_asserts(>runtime_pm);
> > pm_runtime_mark_last_busy(kdev);
> > pm_runtime_autosuspend(kdev);
> >
> > diff --git a/drivers/gpu/drm/i915/i915_params.c
> > b/drivers/gpu/drm/i915/i915_params.c
> > index 6fc475a5db61..4603f5c2ed77 100644
> > --- a/drivers/gpu/drm/i915/i915_params.c
> > +++ b/drivers/gpu/drm/i915/i915_params.c
> > @@ -197,6 +197,11 @@ i915_param_named(enable_gvt, bool, 0400,
> > "Enable support for Intel GVT-g graphics virtualization host
> > support(default:false)");  #endif
> >
> > +i915_param_named_unsafe(d3cold_sr_lmem_threshold, int, 0600,
> > +   "Enable VRAM Self refresh when size of lmem is greater to this
> > threshold. "
> > +   "If VRAM Self Refresh is not available then fall back to d3cold. "
> > +   "It helps to optimize the suspend/resume latecy. (default: 300mb)");
> > +
> >  #if CONFIG_DRM_I915_REQUEST_TIMEOUT
> >  i915_param_named_unsafe(request_timeout_ms, uint, 0600,
> > "Default request/fence/batch buffer expiration
> timeout."); diff
> > --git a/drivers/gpu/drm/i915/i915_params.h
> > b/drivers/gpu/drm/i915/i915_params.h
> > index 2733cb6cfe09..1a86711038da 100644
> > --- a/drivers/gpu/drm/i915/i915_params.h
> > +++ b/drivers/gpu/drm/i915/i915_params.h
> > @@ -75,6 +75,7 @@ struct drm_printer;
> > param(unsigned int, request_timeout_ms,
> > CONFIG_DRM_I915_REQUEST_TIMEOUT,
> CONFIG_DRM_I915_REQUEST_TIMEOUT ?
> > 0600 : 0) \
> > param(unsigned int, lmem_size, 0, 0400) \
> > param(unsigned int, lmem_bar_size, 0, 0400) \
> > +   param(int, d3cold_sr_lmem_threshold, 300, 0600) \
> > /* leave bools at the end to not create holes */ \
> > param(bool, enable_hangcheck, true, 0600) \
> > param(bool, load_detect_test, false, 0600) \ diff --git
> > a/drivers/gpu/drm/i915/intel_pm.c 

Re: [Intel-gfx] [PATCH 6/8] drm/i915/rpm: d3cold Policy

[Gupta, Anshuman]

> -Original Message-
> From: Tangudu, Tilak 
> Sent: Thursday, July 21, 2022 3:30 PM
> To: Ewins, Jon ; Belgaumkar, Vinay
> ; Roper, Matthew D
> ; Wilson, Chris P ;
> Nikula, Jani ; Gupta, saurabhg
> ; Vivi, Rodrigo ; Gupta,
> Anshuman ; Nilawar, Badal
> ; Tangudu, Tilak ; Deak,
> Imre ; Iddamsetty, Aravind
> ; intel-gfx@lists.freedesktop.org
> Subject: [PATCH 6/8] drm/i915/rpm: d3cold Policy
> 
> From: Tilak Tangudu 
Please don't change the authorship of patch.
> 
> Add d3cold_sr_lmem_threshold modparam to choose between d3cold-off zero
> watt and  d3hot/d3cold-VRAM Self Refresh.
> i915 requires to evict the lmem objects to smem in order to support 
> d3cold-Off.
> if platform does not supports vram_sr feature then fall back to d3hot by
> disabling d3cold to avoid the rpm suspend/resume latency.
> Extend the d3cold_sr_lmem_threshold modparam to debugfs i915_params so
> that, it can be used by igt test.
> 
> If gfx root port is not capable of sending PME from d3cold or doesn't have 
> _PR3
> power resources then only d3hot state can be supported.
> 
> Adding intel_pm_prepare_targeted_d3_state() to choose the correct target d3
> state and cache it to intel_runtime_pm structure, it can be used in rpm
> suspend/resume callback accordingly.
> 
> v2: lmem->avail stopped tracking lmem usage since ttm is introduced, so
> removed lmem->avail usage in policy.
> FIXME here, lmem usage is not added, need to be added by using query
> functions.
> FIXME, Forcing the policy to enter D3COLD_OFF for validation purpose.
> 
> Cc: Rodrigo Vivi 
> Signed-off-by: Anshuman Gupta 
> Signed-off-by: Tilak Tangudu 
> ---
>  drivers/gpu/drm/i915/i915_driver.c  |  6 +
>  drivers/gpu/drm/i915/i915_params.c  |  5 
>  drivers/gpu/drm/i915/i915_params.h  |  1 +
>  drivers/gpu/drm/i915/intel_pm.c | 35 +
>  drivers/gpu/drm/i915/intel_pm.h |  1 +
>  drivers/gpu/drm/i915/intel_runtime_pm.h |  7 +
>  6 files changed, 55 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> b/drivers/gpu/drm/i915/i915_driver.c
> index 4c36554567fd..2b2e9563f149 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1581,6 +1581,12 @@ static int intel_runtime_idle(struct device *kdev)
>   struct drm_i915_private *i915 = kdev_to_i915(kdev);
>   int ret = 1;
> 
> + disable_rpm_wakeref_asserts(>runtime_pm);
> + ret = intel_pm_prepare_targeted_d3_state(i915);
> + if (!ret)
> + ret = 1;
> +
> + enable_rpm_wakeref_asserts(>runtime_pm);
>   pm_runtime_mark_last_busy(kdev);
>   pm_runtime_autosuspend(kdev);
> 
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index 6fc475a5db61..4603f5c2ed77 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -197,6 +197,11 @@ i915_param_named(enable_gvt, bool, 0400,
>   "Enable support for Intel GVT-g graphics virtualization host
> support(default:false)");  #endif
> 
> +i915_param_named_unsafe(d3cold_sr_lmem_threshold, int, 0600,
> + "Enable VRAM Self refresh when size of lmem is greater to this
> threshold. "
> + "If VRAM Self Refresh is not available then fall back to d3cold. "
> + "It helps to optimize the suspend/resume latecy. (default: 300mb)");
> +
>  #if CONFIG_DRM_I915_REQUEST_TIMEOUT
>  i915_param_named_unsafe(request_timeout_ms, uint, 0600,
>   "Default request/fence/batch buffer expiration
> timeout."); diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 2733cb6cfe09..1a86711038da 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -75,6 +75,7 @@ struct drm_printer;
>   param(unsigned int, request_timeout_ms,
> CONFIG_DRM_I915_REQUEST_TIMEOUT,
> CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
>   param(unsigned int, lmem_size, 0, 0400) \
>   param(unsigned int, lmem_bar_size, 0, 0400) \
> + param(int, d3cold_sr_lmem_threshold, 300, 0600) \
>   /* leave bools at the end to not create holes */ \
>   param(bool, enable_hangcheck, true, 0600) \
>   param(bool, load_detect_test, false, 0600) \ diff --git
> a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index
> f06babdb3a8c..20b0638ecd5c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8287,6 +8287,41 @@ void intel_pm_setup(struct drm_i915_private
> *dev_priv)
>   atomic_set(_priv->runtime_pm.wakeref_count, 0);  }
> 
> +int intel_pm_prepare_targeted_d3_state(struct drm_i915_private *i915) {
> + struct intel_runtime_pm *rpm = >runtime_pm;
> + struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
> + u64 lmem_used = 0;
> + struct pci_dev *root_pdev;
> + int ret = 0;
> +
> + /* igfx will return from here */
> + root_pdev = pcie_find_root_port(pdev);
> + if (!root_pdev)
> + 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg1: Fix power gate sequence. (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dg1: Fix power gate sequence. (rev2)
URL   : https://patchwork.freedesktop.org/series/85082/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11933 -> Patchwork_85082v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/index.html

Participating hosts (47 -> 42)
--

  Missing(5): fi-hsw-4200u bat-adlp-4 fi-ctg-p8600 fi-hsw-4770 fi-bdw-samus 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_85082v2:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@gt_heartbeat:
- {bat-rpls-1}:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/bat-rpls-1/igt@i915_selftest@live@gt_heartbeat.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/bat-rpls-1/igt@i915_selftest@live@gt_heartbeat.html

  
Known issues


  Here are the changes found in Patchwork_85082v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@gem:
- fi-blb-e6850:   NOTRUN -> [DMESG-FAIL][3] ([i915#4528])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/fi-blb-e6850/igt@i915_selftest@l...@gem.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-elk-e7500:   NOTRUN -> [SKIP][4] ([fdo#109271])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/fi-elk-e7500/igt@kms_chamel...@common-hpd-after-suspend.html
- fi-rkl-guc: NOTRUN -> [SKIP][5] ([fdo#111827])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/fi-rkl-guc/igt@kms_chamel...@common-hpd-after-suspend.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s3@smem:
- {bat-adlm-1}:   [DMESG-WARN][6] ([i915#2867]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/bat-adlm-1/igt@gem_exec_suspend@basic...@smem.html

  * igt@i915_selftest@live@gt_lrc:
- fi-rkl-guc: [INCOMPLETE][8] ([i915#4983]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-5:  [DMESG-FAIL][10] ([i915#4494] / [i915#4957]) -> 
[PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/bat-dg1-5/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-elk-e7500:   [DMESG-FAIL][12] ([i915#4528]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-elk-e7500/igt@i915_selftest@l...@requests.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/fi-elk-e7500/igt@i915_selftest@l...@requests.html
- fi-blb-e6850:   [DMESG-FAIL][14] ([i915#4528]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/fi-blb-e6850/igt@i915_selftest@l...@requests.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/fi-blb-e6850/igt@i915_selftest@l...@requests.html

  * igt@i915_selftest@live@sanitycheck:
- {bat-dg2-9}:[DMESG-WARN][16] ([i915#5763]) -> [PASS][17] +8 
similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11933/bat-dg2-9/igt@i915_selftest@l...@sanitycheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_85082v2/bat-dg2-9/igt@i915_selftest@l...@sanitycheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5153]: 

Re: [Intel-gfx] [PATCH] drm/i915: Suppress oom warning for shmemfs object allocation failure

[Matthew Auld]

On 20/07/2022 13:23, Nirmoy Das wrote:

From: Chris Wilson 

We report object allocation failures to userspace with ENOMEM, yet we
still show the memory warning after failing to shrink device allocated
pages. While this warning is similar to other system page allocation
failures, it is superfluous to the ENOMEM provided directly to
userspace.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4936


Is it not possible that this triggers OOM warning when calling 
sg_alloc_table() or similar? I guess shmem_read_mapping_page_gfp() is 
the most likely spot where this triggers OOM, but that doesn't have to 
be the case?



Signed-off-by: Chris Wilson 
Signed-off-by: Nirmoy Das 
---
  drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c 
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4eed3dd90ba8..4466173e1bcc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -137,7 +137,7 @@ int shmem_sg_alloc_table(struct drm_i915_private *i915, 
struct sg_table *st,
 * trigger the out-of-memory killer and for
 * this we want __GFP_RETRY_MAYFAIL.
 */
-   gfp |= __GFP_RETRY_MAYFAIL;
+   gfp |= __GFP_RETRY_MAYFAIL | __GFP_NOWARN;
}
} while (1);
  

[Intel-gfx] [PATCH 8/8] drm/i915 : Add D3COLD OFF support

[tilak . tangudu]

From: Tilak Tangudu 

Added lmem deep suspend/resume, which covers lmem
eviction and added GT/GUC deep suspend/resume
using i915_gem_backup_suspend, i915_gem_suspend_late
and i915_gem_resume.

Signed-off-by: Tilak Tangudu 
---
 drivers/gpu/drm/i915/i915_driver.c | 74 --
 1 file changed, 61 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 3697ecb2c138..608287bb27ea 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1630,6 +1630,7 @@ static int intel_runtime_idle(struct device *kdev)
 static int intel_runtime_suspend(struct device *kdev)
 {
struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
+   struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
struct intel_runtime_pm *rpm = _priv->runtime_pm;
int ret;
 
@@ -1644,9 +1645,14 @@ static int intel_runtime_suspend(struct device *kdev)
 * We are safe here against re-faults, since the fault handler takes
 * an RPM reference.
 */
-   i915_gem_runtime_suspend(dev_priv);
-
-   intel_gt_runtime_suspend(to_gt(dev_priv));
+   if (rpm->d3_state == INTEL_D3COLD_OFF) {
+   i915_gem_backup_suspend(dev_priv);
+   i915_ggtt_suspend(to_gt(dev_priv)->ggtt);
+   i915_gem_suspend_late(dev_priv);
+   } else {
+   i915_gem_runtime_suspend(dev_priv);
+   intel_gt_runtime_suspend(to_gt(dev_priv));
+   }
 
intel_runtime_pm_disable_interrupts(dev_priv);
 
@@ -1691,14 +1697,18 @@ static int intel_runtime_suspend(struct device *kdev)
 */
intel_opregion_notify_adapter(dev_priv, PCI_D3hot);
} else {
-   /*
-* current versions of firmware which depend on this opregion
-* notification have repurposed the D1 definition to mean
-* "runtime suspended" vs. what you would normally expect (D3)
-* to distinguish it from notifications that might be sent via
-* the suspend path.
-*/
-   intel_opregion_notify_adapter(dev_priv, PCI_D1);
+   if (rpm->d3_state == INTEL_D3COLD_OFF) {
+   intel_opregion_suspend(dev_priv, PCI_D3cold);
+   } else {
+   /*
+* current versions of firmware which depend on this 
opregion
+* notification have repurposed the D1 definition to 
mean
+* "runtime suspended" vs. what you would normally 
expect (D3)
+* to distinguish it from notifications that might be 
sent via
+* the suspend path.
+*/
+   intel_opregion_notify_adapter(dev_priv, PCI_D1);
+   }
}
 
assert_forcewakes_inactive(_priv->uncore);
@@ -1706,6 +1716,12 @@ static int intel_runtime_suspend(struct device *kdev)
if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
intel_hpd_poll_enable(dev_priv);
 
+   if (rpm->d3_state == INTEL_D3COLD_OFF) {
+   i915_save_pci_state(pdev);
+   pci_disable_device(pdev);
+   pci_set_power_state(pdev, PCI_D3cold);
+   }
+
drm_dbg(_priv->drm, "Device suspended\n");
return 0;
 }
@@ -1713,6 +1729,7 @@ static int intel_runtime_suspend(struct device *kdev)
 static int intel_runtime_resume(struct device *kdev)
 {
struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
+   struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
struct intel_runtime_pm *rpm = _priv->runtime_pm;
int ret;
 
@@ -1724,7 +1741,25 @@ static int intel_runtime_resume(struct device *kdev)
drm_WARN_ON_ONCE(_priv->drm, atomic_read(>wakeref_count));
disable_rpm_wakeref_asserts(rpm);
 
-   intel_opregion_notify_adapter(dev_priv, PCI_D0);
+   if (rpm->d3_state == INTEL_D3COLD_OFF) {
+   ret = pci_set_power_state(pdev, PCI_D0);
+   if (ret) {
+   drm_err(_priv->drm,
+   "failed to set PCI D0 power state (%d)\n", ret);
+   goto out;
+   }
+
+   i915_load_pci_state(pdev);
+
+   ret = pci_enable_device(pdev);
+   if (ret)
+   goto out;
+   pci_set_master(pdev);
+   intel_opregion_resume(dev_priv);
+   } else {
+   intel_opregion_notify_adapter(dev_priv, PCI_D0);
+   }
+
rpm->suspended = false;
if (intel_uncore_unclaimed_mmio(_priv->uncore))
drm_dbg(_priv->drm,
@@ -1742,8 +1777,20 @@ static int intel_runtime_resume(struct device *kdev)
 * No point of rolling back things in case of an error, as the best
 * we can do is to hope that things will still 

[Intel-gfx] [PATCH 7/8] drm/i915: Add i915_save/load_pci_state helpers

[tilak . tangudu]

From: Aravind Iddamsetty 

Add i915_save/load_pci_state helpers which saves
pci config state and restores the saved state.

Signed-off-by: Aravind Iddamsetty  
Signed-off-by: Tilak Tangudu 
---
 drivers/gpu/drm/i915/i915_driver.c | 34 ++
 drivers/gpu/drm/i915/i915_driver.h |  2 ++
 drivers/gpu/drm/i915/i915_drv.h|  1 +
 3 files changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 2b2e9563f149..3697ecb2c138 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -105,6 +105,40 @@ static const char irst_name[] = "INT3392";
 
 static const struct drm_driver i915_drm_driver;
 
+bool i915_save_pci_state(struct pci_dev *pdev)
+{
+   struct drm_i915_private *i915 = pci_get_drvdata(pdev);
+
+   if (pci_save_state(pdev))
+   return false;
+
+   kfree(i915->pci_state);
+
+   i915->pci_state = pci_store_saved_state(pdev);
+
+   if (!i915->pci_state) {
+   drm_err(>drm, "Failed to store PCI saved state\n");
+   return false;
+   }
+
+   return true;
+}
+
+void i915_load_pci_state(struct pci_dev *pdev)
+{
+   struct drm_i915_private *i915 = pci_get_drvdata(pdev);
+   int ret;
+
+   if (!i915->pci_state)
+   return;
+
+   ret = pci_load_saved_state(pdev, i915->pci_state);
+   if (!ret) {
+   pci_restore_state(pdev);
+   } else {
+   drm_warn(>drm, "Failed to load PCI state, err:%d\n", ret);
+   }
+}
 static int i915_get_bridge_dev(struct drm_i915_private *dev_priv)
 {
int domain = pci_domain_nr(to_pci_dev(dev_priv->drm.dev)->bus);
diff --git a/drivers/gpu/drm/i915/i915_driver.h 
b/drivers/gpu/drm/i915/i915_driver.h
index 44ec543d92cb..fb19db69bc3f 100644
--- a/drivers/gpu/drm/i915/i915_driver.h
+++ b/drivers/gpu/drm/i915/i915_driver.h
@@ -26,6 +26,8 @@ void i915_driver_shutdown(struct drm_i915_private *i915);
 
 int i915_driver_resume_switcheroo(struct drm_i915_private *i915);
 int i915_driver_suspend_switcheroo(struct drm_i915_private *i915, pm_message_t 
state);
+bool i915_save_pci_state(struct pci_dev *pdev);
+void i915_load_pci_state(struct pci_dev *pdev);
 
 void
 i915_print_iommu_status(struct drm_i915_private *i915, struct drm_printer *p);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d25647be25d1..c30ac9219b7f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -777,6 +777,7 @@ struct drm_i915_private {
 * NOTE: This is the dri1/ums dungeon, don't add stuff here. Your patch
 * will be rejected. Instead look for a better place.
 */
+   struct pci_saved_state *pci_state;
 };
 
 static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
-- 
2.25.1

[Intel-gfx] [PATCH 6/8] drm/i915/rpm: d3cold Policy

[tilak . tangudu]

From: Tilak Tangudu 

Add d3cold_sr_lmem_threshold modparam to choose between
d3cold-off zero watt and  d3hot/d3cold-VRAM Self Refresh.
i915 requires to evict the lmem objects to smem in order to
support d3cold-Off. if platform does not supports vram_sr
feature then fall back to d3hot by disabling d3cold to
avoid the rpm suspend/resume latency.
Extend the d3cold_sr_lmem_threshold modparam to debugfs
i915_params so that, it can be used by igt test.

If gfx root port is not capable of sending PME from d3cold
or doesn't have _PR3 power resources then only d3hot state
can be supported.

Adding intel_pm_prepare_targeted_d3_state() to choose the
correct target d3 state and cache it to intel_runtime_pm
structure, it can be used in rpm suspend/resume callback
accordingly.

v2: lmem->avail stopped tracking lmem usage since ttm is
introduced, so removed lmem->avail usage in policy.
FIXME here, lmem usage is not added, need to be added
by using query functions.
FIXME, Forcing the policy to enter D3COLD_OFF for
validation purpose.

Cc: Rodrigo Vivi 
Signed-off-by: Anshuman Gupta 
Signed-off-by: Tilak Tangudu 
---
 drivers/gpu/drm/i915/i915_driver.c  |  6 +
 drivers/gpu/drm/i915/i915_params.c  |  5 
 drivers/gpu/drm/i915/i915_params.h  |  1 +
 drivers/gpu/drm/i915/intel_pm.c | 35 +
 drivers/gpu/drm/i915/intel_pm.h |  1 +
 drivers/gpu/drm/i915/intel_runtime_pm.h |  7 +
 6 files changed, 55 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index 4c36554567fd..2b2e9563f149 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1581,6 +1581,12 @@ static int intel_runtime_idle(struct device *kdev)
struct drm_i915_private *i915 = kdev_to_i915(kdev);
int ret = 1;
 
+   disable_rpm_wakeref_asserts(>runtime_pm);
+   ret = intel_pm_prepare_targeted_d3_state(i915);
+   if (!ret)
+   ret = 1;
+
+   enable_rpm_wakeref_asserts(>runtime_pm);
pm_runtime_mark_last_busy(kdev);
pm_runtime_autosuspend(kdev);
 
diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 6fc475a5db61..4603f5c2ed77 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -197,6 +197,11 @@ i915_param_named(enable_gvt, bool, 0400,
"Enable support for Intel GVT-g graphics virtualization host 
support(default:false)");
 #endif
 
+i915_param_named_unsafe(d3cold_sr_lmem_threshold, int, 0600,
+   "Enable VRAM Self refresh when size of lmem is greater to this 
threshold. "
+   "If VRAM Self Refresh is not available then fall back to d3cold. "
+   "It helps to optimize the suspend/resume latecy. (default: 300mb)");
+
 #if CONFIG_DRM_I915_REQUEST_TIMEOUT
 i915_param_named_unsafe(request_timeout_ms, uint, 0600,
"Default request/fence/batch buffer expiration 
timeout.");
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index 2733cb6cfe09..1a86711038da 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -75,6 +75,7 @@ struct drm_printer;
param(unsigned int, request_timeout_ms, 
CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
param(unsigned int, lmem_size, 0, 0400) \
param(unsigned int, lmem_bar_size, 0, 0400) \
+   param(int, d3cold_sr_lmem_threshold, 300, 0600) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, load_detect_test, false, 0600) \
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f06babdb3a8c..20b0638ecd5c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8287,6 +8287,41 @@ void intel_pm_setup(struct drm_i915_private *dev_priv)
atomic_set(_priv->runtime_pm.wakeref_count, 0);
 }
 
+int intel_pm_prepare_targeted_d3_state(struct drm_i915_private *i915)
+{
+   struct intel_runtime_pm *rpm = >runtime_pm;
+   struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+   u64 lmem_used = 0;
+   struct pci_dev *root_pdev;
+   int ret = 0;
+
+   /* igfx will return from here */
+   root_pdev = pcie_find_root_port(pdev);
+   if (!root_pdev)
+   return ret;
+
+   /* D3Cold requires PME capability and _PR3 power resource */
+   if (!pci_pme_capable(root_pdev, PCI_D3cold) || 
!pci_pr3_present(root_pdev))
+   return ret;
+
+   /* FXME query the LMEM usage and fill lmem_used */
+   /* Trigger D3COLD_OFF always to validate with all tests */
+   if (lmem_used < i915->params.d3cold_sr_lmem_threshold  * 1024 * 1024) {
+   rpm->d3_state = INTEL_D3COLD_OFF;
+   drm_dbg(>drm, "Prepared for D3Cold off\n");
+   } else {
+   /* Disable D3Cold to reduce the eviction 

[Intel-gfx] [PATCH 5/8] Drm/i915/rpm: Add intel_runtime_idle

[tilak . tangudu]

From: Anshuman Gupta 

Adding intel_runtime_idle (runtime_idle callback) to prepare the
tageted D3 state.

Since we have introduced i915 runtime_idle callback.
It need to be warranted that Runtime PM Core invokes runtime_idle
callback when runtime usages count becomes zero. That requires
to use pm_runtime_put instead of pm_runtime_put_autosuspend.

Cc: Rodrigo Vivi 
Cc: Chris Wilson 
Signed-off-by: Anshuman Gupta 
---
 drivers/gpu/drm/i915/i915_driver.c  | 12 
 drivers/gpu/drm/i915/intel_runtime_pm.c |  3 +--
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index deb8a8b76965..4c36554567fd 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1576,6 +1576,17 @@ static int i915_pm_restore(struct device *kdev)
return i915_pm_resume(kdev);
 }
 
+static int intel_runtime_idle(struct device *kdev)
+{
+   struct drm_i915_private *i915 = kdev_to_i915(kdev);
+   int ret = 1;
+
+   pm_runtime_mark_last_busy(kdev);
+   pm_runtime_autosuspend(kdev);
+
+   return ret;
+}
+
 static int intel_runtime_suspend(struct device *kdev)
 {
struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
@@ -1752,6 +1763,7 @@ const struct dev_pm_ops i915_pm_ops = {
.restore = i915_pm_restore,
 
/* S0ix (via runtime suspend) event handlers */
+   .runtime_idle = intel_runtime_idle,
.runtime_suspend = intel_runtime_suspend,
.runtime_resume = intel_runtime_resume,
 };
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 704beeeb560b..1c3ed0c29330 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -513,8 +513,7 @@ static void __intel_runtime_pm_put(struct intel_runtime_pm 
*rpm,
 
intel_runtime_pm_release(rpm, wakelock);
 
-   pm_runtime_mark_last_busy(kdev);
-   pm_runtime_put_autosuspend(kdev);
+   pm_runtime_put(kdev);
 }
 
 /**
-- 
2.25.1

[Intel-gfx] [PATCH 4/8] drm/i915: sanitize dc state in rpm resume

[tilak . tangudu]

From: Tilak Tangudu 

During runtime resume the display init sequence is called via
intel_display_power_resume() -> icl_display_core_init()
which should restore the display HW state. For restoring the DC9 enabled
state in DC_STATE_EN, gen9_sanitize_dc_state() should be called on the
 runtime resume path too to avoid the

[  513.818190] i915 :03:00.0: [drm] *ERROR DC state mismatch (0x8 -> 0x0)*

Signed-off-by: Tilak Tangudu 
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 589af257edeb..799f84d3eed6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -2229,6 +2229,7 @@ void intel_display_power_suspend(struct drm_i915_private 
*i915)
 void intel_display_power_resume(struct drm_i915_private *i915)
 {
if (DISPLAY_VER(i915) >= 11) {
+   gen9_sanitize_dc_state(i915);
bxt_disable_dc9(i915);
icl_display_core_init(i915, true);
if (intel_dmc_has_payload(i915)) {
-- 
2.25.1

[Intel-gfx] [PATCH 3/8] drm/i915: Extend rpm in intel_guc_global_policies_update

[tilak . tangudu]

From: Tilak Tangudu 

intel_guc_is_ready need to be guarded with rpm
helpers as it needs guc interaction.

Signed-off-by: Tilak Tangudu 
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index ba7541f3ca61..1d3b3559420d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -195,11 +195,14 @@ int intel_guc_global_policies_update(struct intel_guc 
*guc)
 
guc_policies_init(guc);
 
-   if (!intel_guc_is_ready(guc))
+   wakeref = intel_runtime_pm_get(>i915->runtime_pm);
+   if (!intel_guc_is_ready(guc)) {
+   intel_runtime_pm_put(>i915->runtime_pm, wakeref);
return 0;
+   }
 
-   with_intel_runtime_pm(>i915->runtime_pm, wakeref)
-   ret = guc_action_policies_update(guc, scheduler_policies);
+   ret = guc_action_policies_update(guc, scheduler_policies);
+   intel_runtime_pm_put(>i915->runtime_pm, wakeref);
 
return ret;
 }
-- 
2.25.1

[Intel-gfx] [PATCH 0/8] drm/i915: Add D3Cold-Off support for runtime-pm

[tilak . tangudu]

From: Tilak Tangudu 

1. Added D3Cold-Off support for runtime pm for discrete gpu.
2. LMEM is switched off and gpu is in off state in D3Cold-Off
   so, lmem & GT deep suspend/resume is added.
3. Re-used i915_gem_backup_suspend, i915_gem_suspend_late
   and i915_gem_resume to handle above 2.
4. These functions use runtime helpers, which in-turn call
   runtime suspend/resume callbacks and leads to deadlock.
   So, these helpers need to be avoided.
5. Added is_intel_rpm_allowed and disallowed rpm callbacks
   during suspending and resuming.
6. Integrated D3Cold policy patch, but is a FIXME, as LMEM
   usage is not queried, lmem->avail stopped tracking lmem 
   usage after ttm port.
7. Added/used i915_save/load_pci_state helpers
8. In intel_guc_global_policies_update, guarded intel_guc_is_ready
   with rpm helpers as it needs guc interaction.
9. Fixed error *ERROR DC state mismatch (0x8 -> 0x0)".
10. Guarded rc6 rpm helpers with is_intel_rpm_allowed as these
are called in suspend/resume cllbacks. 

Signed-off-by: Tilak Tangudu 

Anshuman Gupta (1):
  Drm/i915/rpm: Add intel_runtime_idle

Aravind Iddamsetty (1):
  drm/i915: Add i915_save/load_pci_state helpers

Tilak Tangudu (6):
  drm/i915: Added is_intel_rpm_allowed helper
  drm/i915: Guard rc6 helpers with is_intel_rpm_allowed
  drm/i915: Extend rpm in intel_guc_global_policies_update
  drm/i915: sanitize dc state in rpm resume
  drm/i915/rpm: d3cold Policy
  drm/i915 : Add D3COLD OFF support

 .../drm/i915/display/intel_display_power.c|   1 +
 drivers/gpu/drm/i915/gt/intel_rc6.c   |  13 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c|   9 +-
 drivers/gpu/drm/i915/i915_driver.c| 126 --
 drivers/gpu/drm/i915/i915_driver.h|   2 +
 drivers/gpu/drm/i915/i915_drv.h   |   1 +
 drivers/gpu/drm/i915/i915_params.c|   5 +
 drivers/gpu/drm/i915/i915_params.h|   1 +
 drivers/gpu/drm/i915/intel_pm.c   |  35 +
 drivers/gpu/drm/i915/intel_pm.h   |   1 +
 drivers/gpu/drm/i915/intel_runtime_pm.c   |  26 +++-
 drivers/gpu/drm/i915/intel_runtime_pm.h   |   8 ++
 12 files changed, 206 insertions(+), 22 deletions(-)

-- 
2.25.1

[Intel-gfx] [PATCH 2/8] drm/i915: Guard rc6 helpers with is_intel_rpm_allowed

[tilak . tangudu]

From: Tilak Tangudu 

Guard intel_rc6_sanitize/intel_rc6_enable/intel_rc6_disable
rc6 helpers with is_intel_rpm_allowed as these
are called in intel_gt_resume/intel_gt_suspend_late.

Signed-off-by: Tilak Tangudu 
---
 drivers/gpu/drm/i915/gt/intel_rc6.c | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c 
b/drivers/gpu/drm/i915/gt/intel_rc6.c
index f8d0523f4c18..73e2fb9420a2 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -507,9 +507,14 @@ static bool rc6_supported(struct intel_rc6 *rc6)
 
 static void rpm_get(struct intel_rc6 *rc6)
 {
+   struct drm_i915_private *i915 = rc6_to_i915(rc6);
+
GEM_BUG_ON(rc6->wakeref);
-   pm_runtime_get_sync(rc6_to_i915(rc6)->drm.dev);
-   rc6->wakeref = true;
+
+   if (is_intel_rpm_allowed(>runtime_pm)) {
+   pm_runtime_get_sync(i915->drm.dev);
+   rc6->wakeref = true;
+   }
 }
 
 static void rpm_put(struct intel_rc6 *rc6)
@@ -623,7 +628,9 @@ void intel_rc6_enable(struct intel_rc6 *rc6)
return;
 
/* rc6 is ready, runtime-pm is go! */
-   rpm_put(rc6);
+   if (rc6->wakeref)
+   rpm_put(rc6);
+
rc6->enabled = true;
 }
 
-- 
2.25.1

[Intel-gfx] [PATCH 1/8] drm/i915: Added is_intel_rpm_allowed helper

[tilak . tangudu]

From: Tilak Tangudu 

Added is_intel_rpm_allowed function to query the runtime_pm
status and disllow during suspending and resuming.

v2: Return -2 if runtime pm is not allowed in runtime_pm_get
and skip wakeref release in runtime_pm_put if wakeref value
is -2. - Jani N
Signed-off-by: Tilak Tangudu 
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 23 ++-
 drivers/gpu/drm/i915/intel_runtime_pm.h |  1 +
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 6ed5786bcd29..704beeeb560b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -113,7 +113,7 @@ static void untrack_intel_runtime_pm_wakeref(struct 
intel_runtime_pm *rpm,
unsigned long flags, n;
bool found = false;
 
-   if (unlikely(stack == -1))
+   if (unlikely(stack == -1) || unlikely(stack == -2))
return;
 
spin_lock_irqsave(>debug.lock, flags);
@@ -320,6 +320,21 @@ untrack_all_intel_runtime_pm_wakerefs(struct 
intel_runtime_pm *rpm)
 }
 
 #endif
+static int intel_runtime_pm_status(struct intel_runtime_pm *rpm)
+{
+   return rpm->kdev->power.runtime_status;
+}
+
+bool is_intel_rpm_allowed(struct intel_runtime_pm *rpm)
+{
+   int rpm_status;
+
+   rpm_status = intel_runtime_pm_status(rpm);
+   if (rpm_status == RPM_RESUMING || rpm_status == RPM_SUSPENDING)
+   return false;
+   else
+   return true;
+}
 
 static void
 intel_runtime_pm_acquire(struct intel_runtime_pm *rpm, bool wakelock)
@@ -354,6 +369,9 @@ static intel_wakeref_t __intel_runtime_pm_get(struct 
intel_runtime_pm *rpm,
 runtime_pm);
int ret;
 
+   if (!is_intel_rpm_allowed(rpm))
+   return -2;
+
ret = pm_runtime_get_sync(rpm->kdev);
drm_WARN_ONCE(>drm, ret < 0,
  "pm_runtime_get_sync() failed: %d\n", ret);
@@ -490,6 +508,9 @@ static void __intel_runtime_pm_put(struct intel_runtime_pm 
*rpm,
 
untrack_intel_runtime_pm_wakeref(rpm, wref);
 
+   if (wref == -2)
+   return;
+
intel_runtime_pm_release(rpm, wakelock);
 
pm_runtime_mark_last_busy(kdev);
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.h 
b/drivers/gpu/drm/i915/intel_runtime_pm.h
index d9160e3ff4af..99418c3a934a 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.h
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.h
@@ -173,6 +173,7 @@ void intel_runtime_pm_init_early(struct intel_runtime_pm 
*rpm);
 void intel_runtime_pm_enable(struct intel_runtime_pm *rpm);
 void intel_runtime_pm_disable(struct intel_runtime_pm *rpm);
 void intel_runtime_pm_driver_release(struct intel_runtime_pm *rpm);
+bool is_intel_rpm_allowed(struct intel_runtime_pm *rpm);
 
 intel_wakeref_t intel_runtime_pm_get(struct intel_runtime_pm *rpm);
 intel_wakeref_t intel_runtime_pm_get_if_in_use(struct intel_runtime_pm *rpm);
-- 
2.25.1

Re: [Intel-gfx] [PATCH] drm/i915/guc: support v69 in parallel to v70

[Tvrtko Ursulin]

On 19/07/2022 16:29, Ceraolo Spurio, Daniele wrote:



On 7/19/2022 12:34 AM, Tvrtko Ursulin wrote:


On 18/07/2022 17:41, Ceraolo Spurio, Daniele wrote:

On 7/18/2022 3:02 AM, Tvrtko Ursulin wrote:


Hi,

On 15/07/2022 23:54, Daniele Ceraolo Spurio wrote:
This patch re-introduces support for GuC v69 in parallel to v70. As 
this
is a quick fix, v69 has been re-introduced as the single "fallback" 
guc
version in case v70 is not available on disk. All v69 specific code 
has
been labeled as such for easy identification, and the same was done 
for

all v70 functions for which there is a separate v69 version, to avoid
accidentally calling the wrong version via the unlabeled name.

When the fallback mode kicks in, a drm_warn message is printed in 
dmesg

to warn the user of the required update.

The plan is to follow this up with a more complex rework to allow for
multiple different GuC versions to be supported at the same time.

Fixes: 2584b3549f4c ("drm/i915/guc: Update to GuC version 70.1.1")


Please check if I got this right:

 * ADL-P was out of "force probe" starting from 5.17.
 * GuC fw got bumped from v62 to v69 in 5.18.

Does this mean you would also need to handle v62 to avoid regressing 
ADL-P from 5.17 to 5.18? I couldn't figure out when ADL-P switched 
from execlists to GuC due a bit convoluted supported/wanted/needed 
macros etc, so not entirely sure.




I haven't checked about previous GuC versions because the report from 
Dave was on the 69->70 transition and about re-introducing v69 
support, so I just focused on that. Let me dig on the versions and on 
what would be needed to support all 3 revs (if it is required).


Secondly, my concern with the approach like in this patch is that it 
would grow the i915 code base *if* there is no incentive to keep the 
compatiblity breaking firware updates in check.




The grow of the i915 code is inevitable. Even without changes to 
existing platforms, new features for new platforms will require new 
GuC interfaces. Sometimes the GuC team also refactors an existing 
interface so that it can include a new aspect of an existing feature. 
We'll have to discuss with them how to minimize breakages in such 
scenarios.


To think about in tandem with this is the question of whether many 
more fallback versions need to be handled, even for platforms which 
only use GuC to load HuC? Those would also regress in the media 
encoding side of things, even if they don't use GuC submission, right?




The only HuC-only platform is ADL-S and that went out of force probe 
when we were on GuC 62, so definitely nothing older than that will be 
needed.


I was referring to platforms where HuC is used for some encoding 
types. List on 
https://github.com/intel/media-driver/blob/master/docs/media_features.md#media-features-summary. 
It is not entirely clear to me from that list - you are saying the HuC 
is actually used only on ADL-S? I was going by the existence of HuC 
firmware files only so might be wrong just as well.




Like GuC, HuC can be enabled via modparam on anything gen11+, but it is 
only enabled by default on a subset of platforms, which are all the 
platforms for which we enable GuC submission, plus ADL-S. Of those, the 
only ones out of force probe are the ADL variants and their derivatives, 
so they're the only ones we need to guarantee backwards compatibility for.


Hm okay, I wasn't aware HuC is not an officially supported thing until 
ADL-S. Does that mean there is a document somewhere telling users to use 
i915.enable_guc=, maybe on the media driver site, or 
somewhere, to get best encoding results on earlier platforms, or media 
driver truly cannot use it before ADL-S? I am not saying it's a problem 
if there is such guidance, since it is still an unsafe modparam, just 
curious.



See uc_expand_default_options() in intel_uc.c for further details.


Thanks, I was looking for this the other day briefly and failed to find 
it. (Was defeated by the auto generated supported/wanted macros, flags 
and the web of that.)


Regards,

Tvrtko



Daniele


Regards,

Tvrtko

If this is so, the approach from this patch would feel rushed in my 
view.


It totally is, no argument there. As mentioned in the commit message, 
the plan is to replace the whole thing with a more flexible and 
cleaner mechanism, but we do need something for the upcoming 5.19 
release so there is no time to do this properly from the get-go.




There is also the question of being able to automatically load the 
latest _compatible_ (same major version) GuC fw found on disk. Aka 
allowing a bugfix firmware update which does not require a kernel 
update. In theory should be possible but we don't have that 
implemented either, right?


We do not. Something like this was actually shot down when GuC first 
came around. We used to have simlinks for the GuC binary to be able 
to drop in a replacement like you said, but there were concerns about 
how to validate all the possible kernel:fw 

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Remove bogus GEM_BUG_ON in unpark

[Tvrtko Ursulin]

On 21/07/2022 01:54, John Harrison wrote:

On 7/19/2022 02:42, Tvrtko Ursulin wrote:

On 19/07/2022 01:05, John Harrison wrote:

On 7/18/2022 05:15, Tvrtko Ursulin wrote:


On 13/07/2022 00:31, john.c.harri...@intel.com wrote:

From: Matthew Brost 

Remove bogus GEM_BUG_ON which compared kernel context timeline 
seqno to
seqno in memory on engine PM unpark. If a GT reset occurred these 
values

might not match as a kernel context could be skipped. This bug was
hidden by always switching to a kernel context on park (execlists
requirement).


Reset of the kernel context? Under which circumstances does that 
happen?

As per description, the issue is with full GT reset.



It is unclear if the claim is this to be a general problem or the 
assert is only invalid with the GuC. Lack of a CI reported issue 
suggests it is not a generic problem?
Currently it is not an issue because we always switch to the kernel 
context because that's how execlists works and the entire driver is 
fundamentally based on execlist operation. When we stop using the 
kernel context as a (non-functional) barrier when using GuC 
submission, then you would see an issue without this fix.


Let me pick this point to try again - I am simply asking for a clear 
description of steps which lead to the problem, instead of, what I find 
are, generic and hard to penetrate statements of invalid assumptions etc.


I picked this spot because of this: "When we stop using the kernel 
context as a (non-functional) barrier when using GuC submission, then 
you would see an issue without this fix."


I point to 363324292710 ("drm/i915/guc: Don't call 
switch_to_kernel_context with GuC submission"). Hence it is not when but 
it already happened. Which in my mind then does not compute - I can't 
grok the explanation which appears to fall over on the first claim.


Or perhaps the bug on is already firing today on every GuC enabled 
machine in the CI? In which case there is a Fixes: link to be added?


I have asked about, if we have 363324292710, and if this patch is 
removing the seqno bug on, why it is not removing something more in 
__engine_unpark, gated on "is guc"? Like ss there a point to sanitizing 
the context which wasn't lost, because it wasn't used to park the engine 
with?


Or if the problem can't be hit with execlists (in case reset claim from 
the commit message misleading), why shouldn't the bug on be changed to 
contain the !guc condition instead of being remove?


I am simply asking for a clear explanation of the conditions and steps 
which lead to the bug on incorrectly firing. It doesn't have to be long 
text or anything like that, just clear so we can close this and move on.


Regards,

Tvrtko



Issue is with GuC, GuC and full reset, or with full reset regardless 
of the backend?
The issue is with code making invalid assumptions. The assumption is 
currently not failing because the execlist backend requires the use of a 
barrier context for a bunch of operations. The GuC backend does not 
require this. In fact, the barrier context does not function as a 
barrier when the scheduler is external to i915. Hence the desire to 
remove the use of the barrier context from generic i915 operation and 
make it only used when in execlist mode. At that point, the invalid 
assumption will no longer work and the BUG will fire.




If issue is only with GuC patch should have drm/i915/guc prefix as 
minimum. But if it actually only becomes a problem when GuC backend 
stops parking with the kernel context when I think the whole unpark 
code should be refactored in a cleaner way than just removing the one 
assert. Otherwise what is the point of leaving everything else in there?


Or if the issue is backend agnostic, *if* full reset happens to hit 
during parking, then it is different. Wouldn't that be a race with 
parking and reset which probably shouldn't happen to start with.


The issue is neither with GuC nor with resets, GT or otherwise. The 
issue is with generic i915 code making assumptions about backend 
implementations that are only correct for the execlist implementation.


John.



Regards,

Tvrtko



John.




Regards,

Tvrtko


Signed-off-by: Matthew Brost 
---
  drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 --
  1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c 
b/drivers/gpu/drm/i915/gt/intel_engine_pm.c

index b0a4a2dbe3ee9..fb3e1599d04ec 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -68,8 +68,6 @@ static int __engine_unpark(struct intel_wakeref *wf)
   ce->timeline->seqno,
   READ_ONCE(*ce->timeline->hwsp_seqno),
   ce->ring->emit);
-    GEM_BUG_ON(ce->timeline->seqno !=
-   READ_ONCE(*ce->timeline->hwsp_seqno));
  }
    if (engine->unpark)

[Intel-gfx] [PULL] drm-misc-fixes

[Maxime Ripard]

Hi Daniel, Dave,

Here's this week drm-misc-fixes PR

Maxime

drm-misc-fixes-2022-07-21:
A scheduling-while-atomic fix for drm/scheduler, a locking fix for TTM,
a typo fix for panel-edp and a resource removal fix for imx/dcss
The following changes since commit 925b6e59138cefa47275c67891c65d48d3266d57:

  Revert "drm/amdgpu: add drm buddy support to amdgpu" (2022-07-08 14:24:30 
+0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2022-07-21

for you to fetch changes up to 02c87df2480ac855d88ee308ce3fa857d9bd55a8:

  drm/imx/dcss: Add missing of_node_put() in fail path (2022-07-20 10:12:15 
+0300)


A scheduling-while-atomic fix for drm/scheduler, a locking fix for TTM,
a typo fix for panel-edp and a resource removal fix for imx/dcss


Christian König (1):
  drm/ttm: fix locking in vmap/vunmap TTM GEM helpers

Dmitry Osipenko (1):
  drm/scheduler: Don't kill jobs in interrupt context

Liang He (1):
  drm/imx/dcss: Add missing of_node_put() in fail path

Nícolas F. R. A. Prado (1):
  drm/panel-edp: Fix variable typo when saving hpd absent delay from DT

 drivers/gpu/drm/drm_gem_ttm_helper.c | 9 -
 drivers/gpu/drm/imx/dcss/dcss-dev.c  | 3 +++
 drivers/gpu/drm/panel/panel-edp.c| 2 +-
 drivers/gpu/drm/scheduler/sched_entity.c | 6 +++---
 include/drm/gpu_scheduler.h  | 4 ++--
 5 files changed, 17 insertions(+), 7 deletions(-)


signature.asc
Description: PGP signature

Re: [Intel-gfx] [PATCH] drm/i915/hdmi: Prune modes that require HDMI2.1 FRL

[Nautiyal, Ankit K]

On 7/19/2022 12:32 PM, Murthy, Arun R wrote:

-Original Message-
From: Nautiyal, Ankit K 
Sent: Tuesday, July 19, 2022 11:40 AM
To: Murthy, Arun R ; intel-
g...@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/hdmi: Prune modes that require
HDMI2.1 FRL


On 7/19/2022 8:45 AM, Murthy, Arun R wrote:

-Original Message-
From: Nautiyal, Ankit K 
Sent: Friday, July 8, 2022 3:36 PM
To: Murthy, Arun R ; intel-
g...@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/hdmi: Prune modes that
require
HDMI2.1 FRL

Hi Arun,

Thanks for the comments.

Please find my response inline.

On 7/8/2022 9:30 AM, Murthy, Arun R wrote:

-Original Message-
From: Intel-gfx  On Behalf
Of Ankit Nautiyal
Sent: Thursday, July 7, 2022 10:57 AM
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/hdmi: Prune modes that
require
HDMI2.1 FRL

HDMI2.1 requires some higher resolution video modes to be
enumerated only if HDMI2.1 Fixed Rate Link (FRL) is supported.
Current platforms do not support FRL transmission so prune modes
that require HDMI2.1 FRL.


If the hardware doesn't support FRL then it basically blocks HDMI2.1

feature.

Then it wont be possible to use any resolution above 4k60 is it?

Yes right. As I understand, the HDMI2.1a supersedes HDMI2.0b, and so
the

platforms  supporting HDMI2.0 must now pass the HDMI2.1 CTS.
The HDMI2.1a spec introduces Marketing Feature names for 4K100,
4K120, 8k@50, 8k@60 with suffix A, and B.
Suffix A meaning mode supported without compression, and B meaning,
mode supported with compression.

There are CTS tests that expect these modes not to be enumerated, if
the source does support the given requirements.



Thanks for the clarification.


Signed-off-by: Ankit Nautiyal 
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 21

+

1 file changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index ebd91aa69dd2..93c00b61795f 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1974,6 +1974,20 @@ intel_hdmi_mode_clock_valid(struct
drm_connector *connector, int clock,
return status;
}

+/*
+ * HDMI2.1 requires higher resolution modes like 8k60, 4K120 to be
+ * enumerated only if FRL is supported. Platforms not supporting
+FRL
+ * must prune these modes.
+ */
+static bool
+hdmi21_frl_quirk(int dotclock, bool frl_supported) {
+   if (dotclock >= 60 && !frl_supported)
+   return true;
+
+   return false;
+}
+
static enum drm_mode_status
intel_hdmi_mode_valid(struct drm_connector *connector,
  struct drm_display_mode *mode) @@ -2001,6 +2015,13

@@

intel_hdmi_mode_valid(struct drm_connector *connector,
clock *= 2;
}

+   /*
+* Current Platforms do not support HDMI2.1 FRL mode of
transmission,
+* so prune the modes that require FRL.
+*/
+   if (hdmi21_frl_quirk(clock, false))
+   return MODE_BAD;
+

Instead of setting this frl_supported as false, can we get this info
from hardware, so that when our hardware supports it later it would
be

easy to enable this.

We can have something like:

src_supports_frl()

{

/* FRL not supported in

return false;

}


Yes something like this looks good. It would be a good design to judge
this based on the Display version.

I do agree, we need to have this check when we have HDMI2.1 support for
any platform.

In future patches, when FRL transmission will be enabled, at that time it
would make sense to check for display version, and parse from VBT about
what rate it allows  etc.


Awaiting patch with handling this properly!
Reviewed-by: Arun R Murthy 



Thanks Arun for the for the review.

I have sent another version of the patch, with some changes.

As discussed, check for FRL support, will be added while enabling FRL in 
future platforms, so removed the function altogether.


Regards,

Ankit



Thanks and Regards,
Arun R Murthy
---

[Intel-gfx] [PATCH v2] drm/i915/hdmi: Prune modes that require HDMI2.1 FRL

[Ankit Nautiyal]

HDMI2.1 requires some higher resolution video modes to be enumerated
only if HDMI2.1 Fixed Rate Link (FRL) is supported.
Current platforms do not support FRL transmission so prune modes that
require HDMI2.1 FRL.

v2: Fixed the condition to check for dotclock > 600.
Return MODE_CLOCK_HIGH as mode status.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Arun R Murthy  (v1)
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index ebd91aa69dd2..a88f589351fa 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2001,6 +2001,15 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
clock *= 2;
}
 
+   /*
+* HDMI2.1 requires higher resolution modes like 8k60, 4K120 to be
+* enumerated only if FRL is supported. Current platforms do not support
+* FRL so prune the higher resolution modes that require doctclock more
+* than 600MHz.
+*/
+   if (clock > 60)
+   return MODE_CLOCK_HIGH;
+
ycbcr_420_only = drm_mode_is_420_only(>display_info, mode);
 
status = intel_hdmi_mode_clock_valid(connector, clock, has_hdmi_sink, 
ycbcr_420_only);
-- 
2.25.1

Re: [Intel-gfx] [PATCH] drm/i915/gt: Remove unneeded semicolon

[Rodrigo Vivi]

On Sun, Jul 17, 2022 at 02:44:39AM +0800, Jason Wang wrote:
> The semicolon after the `}' in line 648 is unneeded.

I removed the line mention while pushing to drm-intel-gt-next.
Thanks for the patch.

> 
> Signed-off-by: Jason Wang 
> ---
>  drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c 
> b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index 2c35324b5f68..a69b244f14d0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -645,7 +645,7 @@ static int scatter_list_length(struct scatterlist *sg)
>   while (sg && sg_dma_len(sg)) {
>   len += sg_dma_len(sg);
>   sg = sg_next(sg);
> - };
> + }
>  
>   return len;
>  }
> -- 
> 2.35.1
> 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Suppress oom warning for shmemfs object allocation failure (rev2)

[Das, Nirmoy]

On 7/21/2022 4:32 AM, Patchwork wrote:

Project List - Patchwork *Patch Details*
*Series:* 	drm/i915: Suppress oom warning for shmemfs object 
allocation failure (rev2)

*URL:*  https://patchwork.freedesktop.org/series/106528/
*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106528v2/index.html



  CI Bug Log - changes from CI_DRM_11928_full -> Patchwork_106528v2_full


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_106528v2_full absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_106528v2_full, please notify your bug team to 
allow them
to document this new failure mode, which will reduce false positives 
in CI.



Participating hosts (13 -> 13)

No changes in participating hosts


Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_106528v2_full:



  IGT changes


Possible regressions

 *

igt@kms_big_fb@yf-tiled-32bpp-rotate-90:

  o shard-skl: PASS


-> TIMEOUT


+1 similar issue
 *

igt@kms_cursor_legacy@cursor-vs-flip@atomic-transitions:

  o shard-skl: NOTRUN -> INCOMPLETE





Unrelated test failure as the patch is not related to KMS.


Nirmoy



 *


Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

 *

igt@kms_color@invalid-degamma-lut-sizes:

  o {shard-rkl}: NOTRUN -> SKIP


 *

igt@kms_cursor_edge_walk@top-bottom:

  o {shard-rkl}: SKIP


(i915#4098
) ->
SKIP




New tests

New tests have been introduced between CI_DRM_11928_full and 
Patchwork_106528v2_full:



  New IGT tests (4)

 *


igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@a-hdmi-a4:

  o Statuses : 1 pass(s)
  o Exec time: [0.68] s
 *


igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@b-hdmi-a4:

  o Statuses : 1 pass(s)
  o Exec time: [0.60] s
 *


igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@c-hdmi-a4:

  o Statuses : 1 pass(s)
  o Exec time: [0.65] s
 *


igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@d-hdmi-a4:

  o Statuses : 1 pass(s)
  o Exec time: [0.62] s


Known issues

Here are the changes found in Patchwork_106528v2_full that come from 
known issues:



  CI changes


Possible fixes

  * boot:
  o shard-skl: (PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
FAIL

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Fix comment typo

[Rodrigo Vivi]

On Wed, Jul 20, 2022 at 06:56:16PM +0200, Andrzej Hajda wrote:
> On 16.07.2022 06:05, Jason Wang wrote:
> > Fix the double `wait' typo in comment.
> > 
> > Signed-off-by: Jason Wang 
> > ---
> >   drivers/gpu/drm/i915/selftests/i915_request.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c 
> > b/drivers/gpu/drm/i915/selftests/i915_request.c
> > index c56a0c2cd2f7..ec05f578a698 100644
> > --- a/drivers/gpu/drm/i915/selftests/i915_request.c
> > +++ b/drivers/gpu/drm/i915/selftests/i915_request.c
> > @@ -971,7 +971,7 @@ static struct i915_vma *empty_batch(struct 
> > drm_i915_private *i915)
> > if (err)
> > goto err;
> > -   /* Force the wait wait now to avoid including it in the benchmark */
> > +   /* Force the wait now to avoid including it in the benchmark */
> > err = i915_vma_sync(vma);
> > if (err)
> > goto err_pin;
> 
> Reviewed-by: Andrzej Hajda 

Thanks for the patch and review. Pushed to drm-intel-gt-next.

> 
> Regards
> Andrzej

[Intel-gfx] [PATCH] drm/i915/dg1: Fix power gate sequence.

[Rodrigo Vivi]

sub-pipe PG is not present on DG1. Setting these bits can disable
other power gates and cause GPU hangs on video playbacks.

HSDES: 1507666497, 1407222020
VLK: 16314, 4304

Fixes: 85a12d7eb8fe ("drm/i915/tgl: Fix Media power gate sequence.")
Cc: Matt Roper 
Cc: Ashutosh Dixit 
Signed-off-by: Rodrigo Vivi 
---
 drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c 
b/drivers/gpu/drm/i915/gt/intel_rc6.c
index f8d0523f4c18..d1dcb018117d 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -134,7 +134,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
GEN9_MEDIA_PG_ENABLE |
GEN11_MEDIA_SAMPLER_PG_ENABLE;
 
-   if (GRAPHICS_VER(gt->i915) >= 12) {
+   if (GRAPHICS_VER(gt->i915) >= 12 && !IS_DG1(gt->i915)) {
for (i = 0; i < I915_MAX_VCS; i++)
if (HAS_ENGINE(gt, _VCS(i)))
pg_enable |= (VDN_HCP_POWERGATE_ENABLE(i) |
-- 
2.35.3

Re: [Intel-gfx] [PATCH] drm/i915: Fix NPD in PMU during driver teardown

[Tvrtko Ursulin]

On 21/07/2022 05:30, Summers, Stuart wrote:

On Wed, 2022-07-20 at 13:07 -0700, Umesh Nerlige Ramappa wrote:

On Wed, Jul 20, 2022 at 09:14:38AM +0100, Tvrtko Ursulin wrote:

On 20/07/2022 01:22, Umesh Nerlige Ramappa wrote:

On Tue, Jul 19, 2022 at 10:00:01AM +0100, Tvrtko Ursulin wrote:

On 12/07/2022 22:03, Umesh Nerlige Ramappa wrote:

On Mon, Jul 04, 2022 at 09:31:55AM +0100, Tvrtko Ursulin
wrote:

On 01/07/2022 15:54, Summers, Stuart wrote:

On Fri, 2022-07-01 at 09:37 +0100, Tvrtko Ursulin wrote:

On 01/07/2022 01:11, Umesh Nerlige Ramappa wrote:

On Thu, Jun 30, 2022 at 09:00:28PM +, Stuart
Summers wrote:

In the driver teardown, we are unregistering the gt
prior
to unregistering the PMU. This means there is a
small window
of time in which the application can request
metrics from the
PMU, some of which are calling into the uapi
engines list,
while the engines are not available. In this case
we can
see null pointer dereferences.

Fix this ordering in both the driver load and
unload sequences.

Additionally add a check for engine presence to
prevent this
NPD in the event this ordering is accidentally
reversed. Print
a debug message indicating when they aren't
available.

v1: Actually address the driver load/unload
ordering issue

Signed-off-by: Stuart Summers <
stuart.summ...@intel.com>not yet been able to force a failure on a system with 
lots of RAM. My dev system has 32G of ram, and I have not been able to arrive at 
the level of memory pressure to apply which causes the gem cache to exceed the 
system memory without being killed by OOM first.
---


I thought this is likely happening because
intel_gpu_top is running
in
the background when i915 is unloaded. I tried a quick
repro, I
don't see
the unload succeed ("fatal module in use", not sure
if this was a
partial unload), but when I try to kill
intel_gpu_top, I get an
NPD.
This is in the event disable path -
i915_pmu_event_stop ->
i915_pmu_disable.


So i915 failed to unload (as expected - with perf
events open we
elevate
the module ref count via i915_pmu_event_init ->
drm_dev_get), then
you
quit intel_gpu_top and get NPD? On the engine lookup?
With the
re-ordered init/fini sequence as from this patch?

With elevated module count there shouldn't be any
unloading happening
so
I am intrigued.


It's likely that you are seeing a different path
(unload) leading
to the
same issue.

I think in i915_pmu_disable/disable should be aware
of event-

hw.state

and or pmu->closed states before accessing the event.
Maybe like,

if (event->hw.state != PERF_HES_STOPPED &&
is_engine_event(event))
{

@Tvrtko, wondering if this case is tested by igt@perf
_pmu@module-unload.


A bit yes. From what Stuart wrote it seems the test
would need to be
extended to cover the case where PMU is getting opened
while module
unload is in progress.

But the NPD you saw is for the moment confusing so I
don't know what
is
happening.


I am not clear if we should use event->hw.state or
pmu->closed here
and
if/how they are related. IMO, for this issue, the
engine check is
good
enough too, so we don't really need the pmu state
checks.
Thoughts?


Engine check at the moment feels like papering.

Indeed as you say I think the pmu->closed might be the
solution.
Perhaps
the race is as mentioned above. PMU open happening in
parallel to
unload..

If the sequence of events userspace triggers is:

i915_pmu_event_init
i915_pmu_event_start
i915_pmu_enable
i915_pmu_event_read

I guess pmu->closed can get set halfway in
i915_pmu_event_init. What
would be the effect of that.. We'd try to get a module
reference
while
in the process of unloading. Which is probably very
bad.. So possibly
a
final check on pmu->close is needed there. Ho hum.. can
it be made
safe
is the question.

It doesn't explain the NPD on Ctrl-C though..
intel_gpu_top keeps
the
evens open all the time. So I think more info needed,
for me at
least.


So one thing here is this doesn't have to do with module
unload, but
module unbind specifically (while perf is open). I don't
know if the
NPD from Umesh is the same as what we're seeing here. I'd
really like
to separate these unless you know for sure that's
related. Also it
would be interesting to know if this patch fixes your
issue as well.

I still think the re-ordering in i915_driver.c should be
enough and we
shouldn't need to check pmu->closed. The unregister
should
be enough to
ensure the perf tools are notified that new events aren't
allowed, and
at that time the engine structures are still intact. And
even if for
some reason the perf code still calls in to our function
pointers, we
have these engine checks as a failsafe.

I'm by the way uploading one more version here with a
drm_WARN_ONCE
instead of the debug print.


Problem is I am not a fan of papering so lets get to the
bottom of the issue first. (In the meantime simple patch
to
re-order driver fini is okay since that seems obvious
enough,
I tnink.)

We need to see call traces from any oopses and try to

[Intel-gfx] [PULL] drm-misc-next-fixes

[Thomas Zimmermann]

Hi Dave and Daniel,

here's the drm-misc-next-fixes PR for this week.

Best regards
Thomas

drm-misc-next-fixes-2022-07-21:
Short summary of fixes pull:

 * amdgpu: Fix for drm buddy memory corruption
 * nouveau: PM fixes; DP fixes
The following changes since commit 7d09c7606346db9a48b62b4e02454a6b8f323043:

  drm/mgag200: Don't read-back PCI option register before writing (2022-07-14 
15:14:45 +0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-fixes-2022-07-21

for you to fetch changes up to 6f2c8d5f16594a13295d153245e0bb8166db7ac9:

  drm/amdgpu: Fix for drm buddy memory corruption (2022-07-15 15:41:51 +0200)


Short summary of fixes pull:

 * amdgpu: Fix for drm buddy memory corruption
 * nouveau: PM fixes; DP fixes


Arunpravin Paneer Selvam (1):
  drm/amdgpu: Fix for drm buddy memory corruption

Lyude Paul (3):
  drm/nouveau/kms: Fix failure path for creating DP connectors
  drm/nouveau/acpi: Don't print error when we get -EINPROGRESS from 
pm_runtime
  drm/nouveau: Don't pm_runtime_put_sync(), only 
pm_runtime_put_autosuspend()

 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 16 
 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h |  2 +-
 drivers/gpu/drm/nouveau/nouveau_connector.c  |  8 +++-
 drivers/gpu/drm/nouveau/nouveau_display.c|  4 ++--
 drivers/gpu/drm/nouveau/nouveau_fbcon.c  |  2 +-
 5 files changed, 15 insertions(+), 17 deletions(-)

-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer