Re: [PATCH 19/19] drm/i915: pass dev_priv explicitly to PORT_ALPM_LFPS_CTL
Reviewed-by: Rodrigo Vivi On Tue, Apr 30, 2024 at 01:10:13PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the PORT_ALPM_LFPS_CTL register macro. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_psr.c | 3 ++- > drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +- > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index e88f326b78d6..664ffda6a86d 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1798,7 +1798,8 @@ static void lnl_alpm_configure(struct intel_dp > *intel_dp) > PORT_ALPM_CTL_SILENCE_PERIOD( > > psr->alpm_parameters.silence_period_sym_clocks)); > > - intel_de_write(dev_priv, PORT_ALPM_LFPS_CTL(cpu_transcoder), > + intel_de_write(dev_priv, > +PORT_ALPM_LFPS_CTL(dev_priv, cpu_transcoder), > PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) | > PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION( > > psr->alpm_parameters.lfps_half_cycle_num_of_syms) | > diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h > b/drivers/gpu/drm/i915/display/intel_psr_regs.h > index 5e52dddacf91..08c6d488e89d 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h > @@ -345,7 +345,7 @@ > #define PORT_ALPM_CTL_SILENCE_PERIOD(val) > REG_FIELD_PREP(PORT_ALPM_CTL_SILENCE_PERIOD_MASK, val) > > #define _PORT_ALPM_LFPS_CTL_A0x16fa30 > -#define PORT_ALPM_LFPS_CTL(tran) > _MMIO_TRANS2(dev_priv, tran, _PORT_ALPM_LFPS_CTL_A) > +#define PORT_ALPM_LFPS_CTL(dev_priv, tran) > _MMIO_TRANS2(dev_priv, tran, _PORT_ALPM_LFPS_CTL_A) > #define PORT_ALPM_LFPS_CTL_LFPS_START_POLARITY > REG_BIT(31) > #define PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MASKREG_GENMASK(27, > 24) > #define PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT_MIN 7 > -- > 2.39.2 >
Re: [PATCH 18/19] drm/i915: pass dev_priv explicitly to PORT_ALPM_CTL
On Tue, Apr 30, 2024 at 01:10:12PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the PORT_ALPM_CTL register macro. > > Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/display/intel_psr.c | 6 -- > drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +- > 2 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index fad24b1e5ae2..e88f326b78d6 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1790,7 +1790,8 @@ static void lnl_alpm_configure(struct intel_dp > *intel_dp) > ALPM_CTL_ALPM_AUX_LESS_ENABLE | > ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS; > > - intel_de_write(dev_priv, PORT_ALPM_CTL(cpu_transcoder), > + intel_de_write(dev_priv, > +PORT_ALPM_CTL(dev_priv, cpu_transcoder), > PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE | > PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) | > PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) | > @@ -2116,7 +2117,8 @@ static void intel_psr_disable_locked(struct intel_dp > *intel_dp) >ALPM_CTL_ALPM_ENABLE | >ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); > > - intel_de_rmw(dev_priv, PORT_ALPM_CTL(cpu_transcoder), > + intel_de_rmw(dev_priv, > + PORT_ALPM_CTL(dev_priv, cpu_transcoder), >PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0); > } > > diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h > b/drivers/gpu/drm/i915/display/intel_psr_regs.h > index 05dc1c1d4ac2..5e52dddacf91 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h > @@ -335,7 +335,7 @@ > #define ALPM_CTL2_NUMBER_AUX_LESS_ML_PHY_SLEEP_SEQUENCES(val) > REG_FIELD_PREP(ALPM_CTL2_NUMBER_AUX_LESS_ML_PHY_SLEEP_SEQUENCES_MASK, val) > > #define _PORT_ALPM_CTL_A 0x16fa2c > -#define PORT_ALPM_CTL(tran) _MMIO_TRANS2(dev_priv, tran, > _PORT_ALPM_CTL_A) > +#define PORT_ALPM_CTL(dev_priv, tran) > _MMIO_TRANS2(dev_priv, tran, _PORT_ALPM_CTL_A) > #define PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE REG_BIT(31) > #define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK REG_GENMASK(23, 20) > #define PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(val) > REG_FIELD_PREP(PORT_ALPM_CTL_MAX_PHY_SWING_SETUP_MASK, val) > -- > 2.39.2 >
Re: [PATCH 17/19] drm/i915: pass dev_priv explicitly to ALPM_CTL2
On Tue, Apr 30, 2024 at 01:10:11PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the ALPM_CTL2 register macro. > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h > b/drivers/gpu/drm/i915/display/intel_psr_regs.h > index 4d950b22d4f1..05dc1c1d4ac2 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h > @@ -321,7 +321,7 @@ > #define ALPM_CTL_AUX_LESS_WAKE_TIME(val) > REG_FIELD_PREP(ALPM_CTL_AUX_LESS_WAKE_TIME_MASK, val) > > #define _ALPM_CTL2_A 0x60954 > -#define ALPM_CTL2(tran) _MMIO_TRANS2(dev_priv, tran, _ALPM_CTL2_A) > +#define ALPM_CTL2(dev_priv, tran)_MMIO_TRANS2(dev_priv, tran, > _ALPM_CTL2_A) no usage? should we just delete it? > #define ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY_MASK REG_GENMASK(28, > 24) > #define ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY(val) > REG_FIELD_PREP(ALPM_CTL2_SWITCH_TO_ACTIVE_LATENCY_MASK, val) > #define ALPM_CTL2_AUX_LESS_WAKE_TIME_EXTENSION_MASK REG_GENMASK(19, > 16) > -- > 2.39.2 >
Re: [PATCH 16/19] drm/i915: pass dev_priv explicitly to ALPM_CTL
On Tue, Apr 30, 2024 at 01:10:10PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the ALPM_CTL register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 37b85b721ddf..fad24b1e5ae2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1812,7 +1812,7 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp)
>
> alpm_ctl |=
> ALPM_CTL_ALPM_ENTRY_CHECK(psr->alpm_parameters.check_entry_lines);
>
> - intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
> + intel_de_write(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder), alpm_ctl);
> }
>
> static void intel_psr_enable_source(struct intel_dp *intel_dp,
> @@ -2112,7 +2112,7 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
>
> /* Panel Replay on eDP is always using ALPM aux less. */
> if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
> - intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
> + intel_de_rmw(dev_priv, ALPM_CTL(dev_priv, cpu_transcoder),
>ALPM_CTL_ALPM_ENABLE |
>ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 4ccbb651016f..4d950b22d4f1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -297,7 +297,7 @@
> _SEL_FETCH_PLANE_BASE_1_A)
>
> #define _ALPM_CTL_A 0x60950
> -#define ALPM_CTL(tran) _MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
> +#define ALPM_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran,
> _ALPM_CTL_A)
> #define ALPM_CTL_ALPM_ENABLEREG_BIT(31)
> #define ALPM_CTL_ALPM_AUX_LESS_ENABLE REG_BIT(30)
> #define ALPM_CTL_LOBF_ENABLEREG_BIT(29)
> --
> 2.39.2
>
Re: [PATCH 15/19] drm/i915: pass dev_priv explicitly to PIPE_SRCSZ_ERLY_TPT
On Tue, Apr 30, 2024 at 01:10:09PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the PIPE_SRCSZ_ERLY_TPT register macro. > > Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/display/intel_cursor.c | 2 +- > drivers/gpu/drm/i915/display/intel_psr.c | 2 +- > drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c > b/drivers/gpu/drm/i915/display/intel_cursor.c > index 23a122ee20c9..2118b87ccb10 100644 > --- a/drivers/gpu/drm/i915/display/intel_cursor.c > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c > @@ -523,7 +523,7 @@ static void wa_16021440873(struct intel_plane *plane, > > intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe, plane->id), ctl); > > - intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe), > + intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(dev_priv, pipe), > PIPESRC_HEIGHT(et_y_position)); > } > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index ded7795e4c3a..37b85b721ddf 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -2303,7 +2303,7 @@ void intel_psr2_program_trans_man_trk_ctl(const struct > intel_crtc_state *crtc_st > if (!crtc_state->enable_psr2_su_region_et) > return; > > - intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), > + intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(dev_priv, crtc->pipe), > crtc_state->pipe_srcsz_early_tpt); > } > > diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h > b/drivers/gpu/drm/i915/display/intel_psr_regs.h > index 55e07e87dfbd..4ccbb651016f 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h > @@ -249,7 +249,7 @@ > /* PSR2 Early transport */ > #define _PIPE_SRCSZ_ERLY_TPT_A 0x70074 > > -#define PIPE_SRCSZ_ERLY_TPT(trans) _MMIO_TRANS2(dev_priv, trans, > _PIPE_SRCSZ_ERLY_TPT_A) > +#define PIPE_SRCSZ_ERLY_TPT(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, > _PIPE_SRCSZ_ERLY_TPT_A) > > #define _SEL_FETCH_PLANE_BASE_1_A0x70890 > #define _SEL_FETCH_PLANE_BASE_2_A0x708B0 > -- > 2.39.2 >
Re: [PATCH 14/19] drm/i915: pass dev_priv explicitly to PSR2_MAN_TRK_CTL
On Tue, Apr 30, 2024 at 01:10:08PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PSR2_MAN_TRK_CTL register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 23 ---
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 36c08cd3a624..ded7795e4c3a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -844,7 +844,8 @@ static void dg2_activate_panel_replay(struct intel_dp
> *intel_dp)
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> - intel_de_rmw(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
> + intel_de_rmw(dev_priv,
> + PSR2_MAN_TRK_CTL(dev_priv, intel_dp->psr.transcoder),
>0, ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
>
> intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
> @@ -919,10 +920,12 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
> if (intel_dp->psr.psr2_sel_fetch_enabled) {
> u32 tmp;
>
> - tmp = intel_de_read(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder));
> + tmp = intel_de_read(dev_priv,
> + PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder));
> drm_WARN_ON(_priv->drm, !(tmp & PSR2_MAN_TRK_CTL_ENABLE));
> } else if (HAS_PSR2_SEL_FETCH(dev_priv)) {
> - intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder), 0);
> + intel_de_write(dev_priv,
> +PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder), 0);
> }
>
> if (psr2_su_region_et_valid(intel_dp))
> @@ -1681,7 +1684,8 @@ void intel_psr_get_config(struct intel_encoder *encoder,
> goto unlock;
>
> if (HAS_PSR2_SEL_FETCH(dev_priv)) {
> - val = intel_de_read(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder));
> + val = intel_de_read(dev_priv,
> + PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder));
> if (val & PSR2_MAN_TRK_CTL_ENABLE)
> pipe_config->enable_psr2_sel_fetch = true;
> }
> @@ -2251,7 +2255,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp
> *intel_dp)
>
> if (intel_dp->psr.psr2_sel_fetch_enabled)
> intel_de_write(dev_priv,
> -PSR2_MAN_TRK_CTL(cpu_transcoder),
> +PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder),
> man_trk_ctl_enable_bit_get(dev_priv) |
> man_trk_ctl_partial_frame_bit_get(dev_priv) |
> man_trk_ctl_single_full_frame_bit_get(dev_priv) |
> @@ -2293,7 +2297,7 @@ void intel_psr2_program_trans_man_trk_ctl(const struct
> intel_crtc_state *crtc_st
> break;
> }
>
> - intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder),
> + intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder),
> crtc_state->psr2_man_track_ctl);
>
> if (!crtc_state->enable_psr2_su_region_et)
> @@ -3014,7 +3018,9 @@ static void _psr_invalidate_handle(struct intel_dp
> *intel_dp)
> val = man_trk_ctl_enable_bit_get(dev_priv) |
> man_trk_ctl_partial_frame_bit_get(dev_priv) |
> man_trk_ctl_continuos_full_frame(dev_priv);
> - intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder), val);
> + intel_de_write(dev_priv,
> +PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder),
> +val);
> intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0);
> intel_dp->psr.psr2_sel_fetch_cff_enabled = true;
> } else {
> @@ -3112,7 +3118,8 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
>* SU configuration in case update is sent for
> any reason after
>* sff bit gets cleared by the HW on next
> vblank.
>*/
> - intel_de_write(dev_priv,
> PSR2_MAN_TRK_CTL(cpu_transcoder),
> + intel_de_write(dev_priv,
> +PSR2_MAN_TRK_CTL(dev_priv,
> cpu_transcoder),
> val);
> intel_de_write(dev_priv,
> CURSURFLIVE(intel_dp->psr.pipe), 0);
> intel_dp->psr.psr2_sel_fetch_cff_enabled =
> false;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 762fc0ad7eb5..55e07e87dfbd 100644
>
Re: [PATCH 13/19] drm/i915: pass dev_priv explicitly to _PSR2_SU_STATUS
On Tue, Apr 30, 2024 at 01:10:07PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the _PSR2_SU_STATUS register macro. > > Signed-off-by: Jani Nikula why aren't we going one level up here already? > --- > drivers/gpu/drm/i915/display/intel_psr_regs.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h > b/drivers/gpu/drm/i915/display/intel_psr_regs.h > index e6c62512512f..762fc0ad7eb5 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h > @@ -221,8 +221,8 @@ > > #define _PSR2_SU_STATUS_A0x60914 > #define _PSR2_SU_STATUS_EDP 0x6f914 > -#define _PSR2_SU_STATUS(tran, index) _MMIO_TRANS2(dev_priv, tran, > _PSR2_SU_STATUS_A + (index) * 4) > -#define PSR2_SU_STATUS(tran, frame) (_PSR2_SU_STATUS(tran, (frame) / 3)) > +#define _PSR2_SU_STATUS(dev_priv, tran, index) _MMIO_TRANS2(dev_priv, > tran, _PSR2_SU_STATUS_A + (index) * 4) > +#define PSR2_SU_STATUS(tran, frame) (_PSR2_SU_STATUS(dev_priv, tran, > (frame) / 3)) > #define PSR2_SU_STATUS_SHIFT(frame) (((frame) % 3) * 10) > #define PSR2_SU_STATUS_MASK(frame) (0x3ff << PSR2_SU_STATUS_SHIFT(frame)) > #define PSR2_SU_STATUS_FRAMES8 > -- > 2.39.2 >
Re: [PATCH 12/19] drm/i915: pass dev_priv explicitly to EDP_PSR2_STATUS
On Tue, Apr 30, 2024 at 01:10:06PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR2_STATUS register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 9 +
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 2dca9957a06b..36c08cd3a624 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2052,7 +2052,7 @@ static void intel_psr_wait_exit_locked(struct intel_dp
> *intel_dp)
> u32 psr_status_mask;
>
> if (intel_dp->psr.psr2_enabled) {
> - psr_status = EDP_PSR2_STATUS(cpu_transcoder);
> + psr_status = EDP_PSR2_STATUS(dev_priv, cpu_transcoder);
> psr_status_mask = EDP_PSR2_STATUS_STATE_MASK;
> } else {
> psr_status = psr_status_reg(dev_priv, cpu_transcoder);
> @@ -2768,7 +2768,7 @@ static int _psr2_ready_for_pipe_update_locked(struct
> intel_dp *intel_dp)
>* EDP_PSR2_STATUS_STATE_DEEP_SLEEP to be cleared.
>*/
> return intel_de_wait_for_clear(dev_priv,
> -EDP_PSR2_STATUS(cpu_transcoder),
> +EDP_PSR2_STATUS(dev_priv,
> cpu_transcoder),
> EDP_PSR2_STATUS_STATE_DEEP_SLEEP, 50);
> }
>
> @@ -2835,7 +2835,7 @@ static bool __psr_wait_for_idle_locked(struct intel_dp
> *intel_dp)
> return false;
>
> if (intel_dp->psr.psr2_enabled) {
> - reg = EDP_PSR2_STATUS(cpu_transcoder);
> + reg = EDP_PSR2_STATUS(dev_priv, cpu_transcoder);
> mask = EDP_PSR2_STATUS_STATE_MASK;
> } else {
> reg = psr_status_reg(dev_priv, cpu_transcoder);
> @@ -3467,7 +3467,8 @@ psr_source_status(struct intel_dp *intel_dp, struct
> seq_file *m)
> "BUF_ON",
> "TG_ON"
> };
> - val = intel_de_read(dev_priv, EDP_PSR2_STATUS(cpu_transcoder));
> + val = intel_de_read(dev_priv,
> + EDP_PSR2_STATUS(dev_priv, cpu_transcoder));
> status_val = REG_FIELD_GET(EDP_PSR2_STATUS_STATE_MASK, val);
> if (status_val < ARRAY_SIZE(live_status))
> status = live_status[status_val];
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 817bc372bf35..e6c62512512f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -215,7 +215,7 @@
>
> #define _PSR2_STATUS_A 0x60940
> #define _PSR2_STATUS_EDP 0x6f940
> -#define EDP_PSR2_STATUS(tran)_MMIO_TRANS2(dev_priv,
> tran, _PSR2_STATUS_A)
> +#define EDP_PSR2_STATUS(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _PSR2_STATUS_A)
> #define EDP_PSR2_STATUS_STATE_MASK REG_GENMASK(31, 28)
> #define EDP_PSR2_STATUS_STATE_DEEP_SLEEP
> REG_FIELD_PREP(EDP_PSR2_STATUS_STATE_MASK, 0x8)
>
> --
> 2.39.2
>
Re: [PATCH 11/19] drm/i915: pass dev_priv explicitly to PSR_EVENT
On Tue, Apr 30, 2024 at 01:10:05PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the PSR_EVENT register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 156660ab7adf..2dca9957a06b 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -415,7 +415,9 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32
> psr_iir)
> if (DISPLAY_VER(dev_priv) >= 9) {
> u32 val;
>
> - val = intel_de_rmw(dev_priv, PSR_EVENT(cpu_transcoder),
> 0, 0);
> + val = intel_de_rmw(dev_priv,
> +PSR_EVENT(dev_priv, cpu_transcoder),
> +0, 0);
>
> psr_event_print(dev_priv, val,
> intel_dp->psr.psr2_enabled);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 785e4f9e7828..817bc372bf35 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -195,7 +195,7 @@
> #define _PSR_EVENT_TRANS_C 0x62848
> #define _PSR_EVENT_TRANS_D 0x63848
> #define _PSR_EVENT_TRANS_EDP 0x6f848
> -#define PSR_EVENT(tran) _MMIO_TRANS2(dev_priv,
> tran, _PSR_EVENT_TRANS_A)
> +#define PSR_EVENT(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A)
> #define PSR_EVENT_PSR2_WD_TIMER_EXPIRE REG_BIT(17)
> #define PSR_EVENT_PSR2_DISABLED REG_BIT(16)
> #define PSR_EVENT_SU_DIRTY_FIFO_UNDERRUNREG_BIT(15)
> --
> 2.39.2
>
Re: [PATCH 10/19] drm/i915: pass dev_priv explicitly to EDP_PSR2_CTL
On Tue, Apr 30, 2024 at 01:10:04PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR2_CTL register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 15 +--
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index fa1fd04d3b4a..156660ab7adf 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -932,7 +932,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
>*/
> intel_de_write(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder),
> psr_val);
>
> - intel_de_write(dev_priv, EDP_PSR2_CTL(cpu_transcoder), val);
> + intel_de_write(dev_priv, EDP_PSR2_CTL(dev_priv, cpu_transcoder), val);
> }
>
> static bool
> @@ -963,7 +963,7 @@ static void psr2_program_idle_frames(struct intel_dp
> *intel_dp,
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
>
> - intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder),
> + intel_de_rmw(dev_priv, EDP_PSR2_CTL(dev_priv, cpu_transcoder),
>EDP_PSR2_IDLE_FRAMES_MASK,
>EDP_PSR2_IDLE_FRAMES(idle_frames));
> }
> @@ -1700,7 +1700,7 @@ static void intel_psr_activate(struct intel_dp
> *intel_dp)
>
> drm_WARN_ON(_priv->drm,
> transcoder_has_psr2(dev_priv, cpu_transcoder) &&
> - intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder)) &
> EDP_PSR2_ENABLE);
> + intel_de_read(dev_priv, EDP_PSR2_CTL(dev_priv,
> cpu_transcoder)) & EDP_PSR2_ENABLE);
>
> drm_WARN_ON(_priv->drm,
> intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder)) & EDP_PSR_ENABLE);
> @@ -2011,7 +2011,8 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
>
> if (!intel_dp->psr.active) {
> if (transcoder_has_psr2(dev_priv, cpu_transcoder)) {
> - val = intel_de_read(dev_priv,
> EDP_PSR2_CTL(cpu_transcoder));
> + val = intel_de_read(dev_priv,
> + EDP_PSR2_CTL(dev_priv,
> cpu_transcoder));
> drm_WARN_ON(_priv->drm, val & EDP_PSR2_ENABLE);
> }
>
> @@ -2027,7 +2028,8 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
> } else if (intel_dp->psr.psr2_enabled) {
> tgl_disallow_dc3co_on_psr2_exit(intel_dp);
>
> - val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder),
> + val = intel_de_rmw(dev_priv,
> +EDP_PSR2_CTL(dev_priv, cpu_transcoder),
> EDP_PSR2_ENABLE, 0);
>
> drm_WARN_ON(_priv->drm, !(val & EDP_PSR2_ENABLE));
> @@ -3529,7 +3531,8 @@ static int intel_psr_status(struct seq_file *m, struct
> intel_dp *intel_dp)
> val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder));
> enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> } else if (psr->psr2_enabled) {
> - val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
> + val = intel_de_read(dev_priv,
> + EDP_PSR2_CTL(dev_priv, cpu_transcoder));
> enabled = val & EDP_PSR2_ENABLE;
> } else {
> val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder));
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index a74705aedbb5..785e4f9e7828 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -153,7 +153,7 @@
>
> #define _PSR2_CTL_A 0x60900
> #define _PSR2_CTL_EDP0x6f900
> -#define EDP_PSR2_CTL(tran) _MMIO_TRANS2(dev_priv, tran,
> _PSR2_CTL_A)
> +#define EDP_PSR2_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv,
> tran, _PSR2_CTL_A)
> #define EDP_PSR2_ENABLEREG_BIT(31)
> #define EDP_SU_TRACK_ENABLEREG_BIT(30) /* up to
> adl-p */
> #define TGL_EDP_PSR2_BLOCK_COUNT_MASK REG_BIT(28)
> --
> 2.39.2
>
Re: [PATCH 09/19] drm/i915: pass dev_priv explicitly to EDP_PSR_DEBUG
On Tue, Apr 30, 2024 at 01:10:03PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR_DEBUG register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 162dd07c243f..fa1fd04d3b4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -278,7 +278,7 @@ static i915_reg_t psr_debug_reg(struct drm_i915_private
> *dev_priv,
> enum transcoder cpu_transcoder)
> {
> if (DISPLAY_VER(dev_priv) >= 8)
> - return EDP_PSR_DEBUG(cpu_transcoder);
> + return EDP_PSR_DEBUG(dev_priv, cpu_transcoder);
> else
> return HSW_SRD_DEBUG;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index ef7f32c98d55..a74705aedbb5 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -133,7 +133,7 @@
> #define HSW_SRD_DEBUG_MMIO(0x64860)
> #define _SRD_DEBUG_A 0x60860
> #define _SRD_DEBUG_EDP 0x6f860
> -#define EDP_PSR_DEBUG(tran) _MMIO_TRANS2(dev_priv, tran,
> _SRD_DEBUG_A)
> +#define EDP_PSR_DEBUG(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _SRD_DEBUG_A)
> #define EDP_PSR_DEBUG_MASK_MAX_SLEEP REG_BIT(28)
> #define EDP_PSR_DEBUG_MASK_LPSPREG_BIT(27)
> #define EDP_PSR_DEBUG_MASK_MEMUP REG_BIT(26)
> --
> 2.39.2
>
Re: [PATCH 08/19] drm/i915: pass dev_priv explicitly to EDP_PSR_PERF_CNT
On Tue, Apr 30, 2024 at 01:10:02PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR_PERF_CNT register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 1a52a69e1906..162dd07c243f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -287,7 +287,7 @@ static i915_reg_t psr_perf_cnt_reg(struct
> drm_i915_private *dev_priv,
> enum transcoder cpu_transcoder)
> {
> if (DISPLAY_VER(dev_priv) >= 8)
> - return EDP_PSR_PERF_CNT(cpu_transcoder);
> + return EDP_PSR_PERF_CNT(dev_priv, cpu_transcoder);
> else
> return HSW_SRD_PERF_CNT;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 4f3e58076a48..ef7f32c98d55 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -126,7 +126,7 @@
> #define HSW_SRD_PERF_CNT _MMIO(0x64844)
> #define _SRD_PERF_CNT_A 0x60844
> #define _SRD_PERF_CNT_EDP0x6f844
> -#define EDP_PSR_PERF_CNT(tran) _MMIO_TRANS2(dev_priv, tran,
> _SRD_PERF_CNT_A)
> +#define EDP_PSR_PERF_CNT(dev_priv, tran) _MMIO_TRANS2(dev_priv,
> tran, _SRD_PERF_CNT_A)
> #define EDP_PSR_PERF_CNT_MASK REG_GENMASK(23, 0)
>
> /* PSR_MASK on SKL+ */
> --
> 2.39.2
>
Re: [PATCH 07/19] drm/i915: pass dev_priv explicitly to EDP_PSR_STATUS
On Tue, Apr 30, 2024 at 01:10:01PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR_STATUS register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 5fe9feddc0e0..1a52a69e1906 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -296,7 +296,7 @@ static i915_reg_t psr_status_reg(struct drm_i915_private
> *dev_priv,
>enum transcoder cpu_transcoder)
> {
> if (DISPLAY_VER(dev_priv) >= 8)
> - return EDP_PSR_STATUS(cpu_transcoder);
> + return EDP_PSR_STATUS(dev_priv, cpu_transcoder);
> else
> return HSW_SRD_STATUS;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 6a6d7de901bc..4f3e58076a48 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -101,7 +101,7 @@
> #define HSW_SRD_STATUS _MMIO(0x64840)
> #define _SRD_STATUS_A0x60840
> #define _SRD_STATUS_EDP 0x6f840
> -#define EDP_PSR_STATUS(tran) _MMIO_TRANS2(dev_priv, tran,
> _SRD_STATUS_A)
> +#define EDP_PSR_STATUS(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _SRD_STATUS_A)
> #define EDP_PSR_STATUS_STATE_MASK REG_GENMASK(31, 29)
> #define EDP_PSR_STATUS_STATE_IDLE
> REG_FIELD_PREP(EDP_PSR_STATUS_STATE_MASK, 0)
> #define EDP_PSR_STATUS_STATE_SRDONACK
> REG_FIELD_PREP(EDP_PSR_STATUS_STATE_MASK, 1)
> --
> 2.39.2
>
Re: [PATCH 06/19] drm/i915: pass dev_priv explicitly to EDP_PSR_AUX_DATA
On Tue, Apr 30, 2024 at 01:10:00PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR_AUX_DATA register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index daeb1b65a2e5..5fe9feddc0e0 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -332,7 +332,7 @@ static i915_reg_t psr_aux_data_reg(struct
> drm_i915_private *dev_priv,
> enum transcoder cpu_transcoder, int i)
> {
> if (DISPLAY_VER(dev_priv) >= 8)
> - return EDP_PSR_AUX_DATA(cpu_transcoder, i);
> + return EDP_PSR_AUX_DATA(dev_priv, cpu_transcoder, i);
> else
> return HSW_SRD_AUX_DATA(i);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index a4f785bcf605..6a6d7de901bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -96,7 +96,7 @@
> #define HSW_SRD_AUX_DATA(i) _MMIO(0x64814 + (i) * 4) /* 5
> registers */
> #define _SRD_AUX_DATA_A 0x60814
> #define _SRD_AUX_DATA_EDP0x6f814
> -#define EDP_PSR_AUX_DATA(tran, i)_MMIO_TRANS2(dev_priv, tran,
> _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */
> +#define EDP_PSR_AUX_DATA(dev_priv, tran, i) _MMIO_TRANS2(dev_priv,
> tran, _SRD_AUX_DATA_A + (i) * 4) /* 5 registers */
>
> #define HSW_SRD_STATUS _MMIO(0x64840)
> #define _SRD_STATUS_A0x60840
> --
> 2.39.2
>
Re: [PATCH 05/19] drm/i915: pass dev_priv explicitly to EDP_PSR_AUX_CTL
On Tue, Apr 30, 2024 at 01:09:59PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR_AUX_CTL register macro.
>
> Signed-off-by: Jani Nikula
Two things crossing my mind at this point:
1. perhaps we should have grouped by impacted file and all these psr cases
together?
2. then perhaps while doing the whole file we could already do a
s/dev_priv/i915 on those impacted functions..
but well, it crossed my mind, but I'm actually happy with this easy
review and perhaps a last full sed s/dev_priv/i915.
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 0b1f7e62470e..daeb1b65a2e5 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -323,7 +323,7 @@ static i915_reg_t psr_aux_ctl_reg(struct drm_i915_private
> *dev_priv,
> enum transcoder cpu_transcoder)
> {
> if (DISPLAY_VER(dev_priv) >= 8)
> - return EDP_PSR_AUX_CTL(cpu_transcoder);
> + return EDP_PSR_AUX_CTL(dev_priv, cpu_transcoder);
> else
> return HSW_SRD_AUX_CTL;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 5fd4f875ade0..a4f785bcf605 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -86,7 +86,7 @@
> #define HSW_SRD_AUX_CTL _MMIO(0x64810)
> #define _SRD_AUX_CTL_A 0x60810
> #define _SRD_AUX_CTL_EDP 0x6f810
> -#define EDP_PSR_AUX_CTL(tran)_MMIO_TRANS2(dev_priv,
> tran, _SRD_AUX_CTL_A)
> +#define EDP_PSR_AUX_CTL(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _SRD_AUX_CTL_A)
> #define EDP_PSR_AUX_CTL_TIME_OUT_MASK
> DP_AUX_CH_CTL_TIME_OUT_MASK
> #define EDP_PSR_AUX_CTL_MESSAGE_SIZE_MASK DP_AUX_CH_CTL_MESSAGE_SIZE_MASK
> #define EDP_PSR_AUX_CTL_PRECHARGE_2US_MASK DP_AUX_CH_CTL_PRECHARGE_2US_MASK
> --
> 2.39.2
>
Re: [PATCH 04/19] drm/i915: pass dev_priv explicitly to TRANS_PSR_IIR
On Tue, Apr 30, 2024 at 01:09:58PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_PSR_IIR register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 10 +++---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h| 2 +-
> 3 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index a9bcf249e925..c41f058acaff 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -876,7 +876,8 @@ gen8_de_misc_irq_handler(struct drm_i915_private
> *dev_priv, u32 iir)
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> if (DISPLAY_VER(dev_priv) >= 12)
> - iir_reg =
> TRANS_PSR_IIR(intel_dp->psr.transcoder);
> + iir_reg = TRANS_PSR_IIR(dev_priv,
> +
> intel_dp->psr.transcoder);
> else
> iir_reg = EDP_PSR_IIR;
>
> @@ -1458,7 +1459,9 @@ void gen11_display_irq_reset(struct drm_i915_private
> *dev_priv)
> intel_uncore_write(uncore,
> TRANS_PSR_IMR(dev_priv, trans),
> 0x);
> - intel_uncore_write(uncore, TRANS_PSR_IIR(trans),
> 0x);
> + intel_uncore_write(uncore,
> +TRANS_PSR_IIR(dev_priv, trans),
> +0x);
> }
> } else {
> intel_uncore_write(uncore, EDP_PSR_IMR, 0x);
> @@ -1690,7 +1693,8 @@ void gen8_de_irq_postinstall(struct drm_i915_private
> *dev_priv)
> if (!intel_display_power_is_enabled(dev_priv, domain))
> continue;
>
> - gen3_assert_iir_is_zero(uncore, TRANS_PSR_IIR(trans));
> + gen3_assert_iir_is_zero(uncore,
> + TRANS_PSR_IIR(dev_priv, trans));
> }
> } else {
> gen3_assert_iir_is_zero(uncore, EDP_PSR_IIR);
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 12b541e8bbf9..0b1f7e62470e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -314,7 +314,7 @@ static i915_reg_t psr_iir_reg(struct drm_i915_private
> *dev_priv,
> enum transcoder cpu_transcoder)
> {
> if (DISPLAY_VER(dev_priv) >= 12)
> - return TRANS_PSR_IIR(cpu_transcoder);
> + return TRANS_PSR_IIR(dev_priv, cpu_transcoder);
> else
> return EDP_PSR_IIR;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 40dc6ee7ec1d..5fd4f875ade0 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -67,7 +67,7 @@
> #define _PSR_IMR_A 0x60814
> #define _PSR_IIR_A 0x60818
> #define TRANS_PSR_IMR(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _PSR_IMR_A)
> -#define TRANS_PSR_IIR(tran) _MMIO_TRANS2(dev_priv, tran,
> _PSR_IIR_A)
> +#define TRANS_PSR_IIR(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _PSR_IIR_A)
> #define _EDP_PSR_TRANS_SHIFT(trans)((trans) ==
> TRANSCODER_EDP ? \
>0 : ((trans) - TRANSCODER_A +
> 1) * 8)
> #define TGL_PSR_MASK REG_GENMASK(2, 0)
> --
> 2.39.2
>
Re: [PATCH 03/19] drm/i915: pass dev_priv explicitly to TRANS_PSR_IMR
On Tue, Apr 30, 2024 at 01:09:57PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_PSR_IMR register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 4 +++-
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h| 2 +-
> 3 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index c337e0597541..a9bcf249e925 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1455,7 +1455,9 @@ void gen11_display_irq_reset(struct drm_i915_private
> *dev_priv)
> if (!intel_display_power_is_enabled(dev_priv, domain))
> continue;
>
> - intel_uncore_write(uncore, TRANS_PSR_IMR(trans),
> 0x);
> + intel_uncore_write(uncore,
> +TRANS_PSR_IMR(dev_priv, trans),
> +0x);
> intel_uncore_write(uncore, TRANS_PSR_IIR(trans),
> 0x);
> }
> } else {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 57414a1375b1..12b541e8bbf9 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -305,7 +305,7 @@ static i915_reg_t psr_imr_reg(struct drm_i915_private
> *dev_priv,
> enum transcoder cpu_transcoder)
> {
> if (DISPLAY_VER(dev_priv) >= 12)
> - return TRANS_PSR_IMR(cpu_transcoder);
> + return TRANS_PSR_IMR(dev_priv, cpu_transcoder);
> else
> return EDP_PSR_IMR;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index d815f08aac2c..40dc6ee7ec1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -66,7 +66,7 @@
> #define EDP_PSR_IIR _MMIO(0x64838)
> #define _PSR_IMR_A 0x60814
> #define _PSR_IIR_A 0x60818
> -#define TRANS_PSR_IMR(tran) _MMIO_TRANS2(dev_priv, tran,
> _PSR_IMR_A)
> +#define TRANS_PSR_IMR(dev_priv, tran)
> _MMIO_TRANS2(dev_priv, tran, _PSR_IMR_A)
> #define TRANS_PSR_IIR(tran) _MMIO_TRANS2(dev_priv, tran,
> _PSR_IIR_A)
> #define _EDP_PSR_TRANS_SHIFT(trans)((trans) ==
> TRANSCODER_EDP ? \
>0 : ((trans) - TRANSCODER_A +
> 1) * 8)
> --
> 2.39.2
>
Re: [PATCH 02/19] drm/i915: pass dev_priv explicitly to EDP_PSR_CTL
On Tue, Apr 30, 2024 at 01:09:56PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the EDP_PSR_CTL register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 1cbd8c6714b1..57414a1375b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -269,7 +269,7 @@ static i915_reg_t psr_ctl_reg(struct drm_i915_private
> *dev_priv,
> enum transcoder cpu_transcoder)
> {
> if (DISPLAY_VER(dev_priv) >= 8)
> - return EDP_PSR_CTL(cpu_transcoder);
> + return EDP_PSR_CTL(dev_priv, cpu_transcoder);
> else
> return HSW_SRD_CTL;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 0e0c71ea9fe3..d815f08aac2c 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -23,7 +23,7 @@
> #define HSW_SRD_CTL _MMIO(0x64800)
> #define _SRD_CTL_A 0x60800
> #define _SRD_CTL_EDP 0x6f800
> -#define EDP_PSR_CTL(tran)_MMIO_TRANS2(dev_priv, tran,
> _SRD_CTL_A)
> +#define EDP_PSR_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv,
> tran, _SRD_CTL_A)
> #define EDP_PSR_ENABLE REG_BIT(31)
> #define BDW_PSR_SINGLE_FRAME REG_BIT(30)
> #define EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASKREG_BIT(29) /* SW can't
> modify */
> --
> 2.39.2
>
Re: [PATCH 01/19] drm/i915: pass dev_priv explicitly to TRANS_EXITLINE
On Tue, Apr 30, 2024 at 01:09:55PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_EXITLINE register macro.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 7 +--
> drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index f5b5a9ae..1cbd8c6714b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1685,7 +1685,8 @@ void intel_psr_get_config(struct intel_encoder *encoder,
> }
>
> if (DISPLAY_VER(dev_priv) >= 12) {
> - val = intel_de_read(dev_priv, TRANS_EXITLINE(cpu_transcoder));
> + val = intel_de_read(dev_priv,
> + TRANS_EXITLINE(dev_priv, cpu_transcoder));
> pipe_config->dc3co_exitline = REG_FIELD_GET(EXITLINE_MASK, val);
> }
> unlock:
> @@ -1877,7 +1878,9 @@ static void intel_psr_enable_source(struct intel_dp
> *intel_dp,
>* transcoder, EXITLINE will need to be unset when disabling PSR
>*/
> if (intel_dp->psr.dc3co_exitline)
> - intel_de_rmw(dev_priv, TRANS_EXITLINE(cpu_transcoder),
> EXITLINE_MASK,
> + intel_de_rmw(dev_priv,
> + TRANS_EXITLINE(dev_priv, cpu_transcoder),
> + EXITLINE_MASK,
>intel_dp->psr.dc3co_exitline << EXITLINE_SHIFT |
> EXITLINE_ENABLE);
>
> if (HAS_PSR_HW_TRACKING(dev_priv) && HAS_PSR2_SEL_FETCH(dev_priv))
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index ebc22999572c..0e0c71ea9fe3 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -9,7 +9,7 @@
> #include "intel_display_reg_defs.h"
> #include "intel_dp_aux_regs.h"
>
> -#define TRANS_EXITLINE(trans)_MMIO_TRANS2(dev_priv, (trans),
> _TRANS_EXITLINE_A)
> +#define TRANS_EXITLINE(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans),
> _TRANS_EXITLINE_A)
> #define EXITLINE_ENABLEREG_BIT(31)
> #define EXITLINE_MASK REG_GENMASK(12, 0)
> #define EXITLINE_SHIFT 0
> --
> 2.39.2
>
✗ Fi.CI.IGT: failure for drm/i915: fix missing linux/debugfs.h includes
== Series Details == Series: drm/i915: fix missing linux/debugfs.h includes URL : https://patchwork.freedesktop.org/series/133075/ State : failure == Summary == CI Bug Log - changes from CI_DRM_14682_full -> Patchwork_133075v1_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_133075v1_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_133075v1_full, please notify your bug team (i915-ci-in...@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (9 -> 9) -- No changes in participating hosts Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_133075v1_full: ### IGT changes ### Possible regressions * igt@kms_big_fb@linear-8bpp-rotate-270: - shard-dg2: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-dg2-10/igt@kms_big...@linear-8bpp-rotate-270.html Known issues Here are the changes found in Patchwork_133075v1_full that come from known issues: ### IGT changes ### Issues hit * igt@device_reset@unbind-cold-reset-rebind: - shard-rkl: NOTRUN -> [SKIP][2] ([i915#7701]) +1 other test skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-rkl-5/igt@device_re...@unbind-cold-reset-rebind.html * igt@gem_ccs@ctrl-surf-copy: - shard-rkl: NOTRUN -> [SKIP][3] ([i915#3555] / [i915#9323]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-rkl-5/igt@gem_...@ctrl-surf-copy.html * igt@gem_ccs@suspend-resume: - shard-rkl: NOTRUN -> [SKIP][4] ([i915#9323]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-rkl-2/igt@gem_...@suspend-resume.html * igt@gem_create@create-ext-cpu-access-sanity-check: - shard-tglu: NOTRUN -> [SKIP][5] ([i915#6335]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-tglu-9/igt@gem_cre...@create-ext-cpu-access-sanity-check.html * igt@gem_create@create-ext-set-pat: - shard-rkl: NOTRUN -> [SKIP][6] ([i915#8562]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-rkl-3/igt@gem_cre...@create-ext-set-pat.html * igt@gem_ctx_freq@sysfs@gt0: - shard-dg2: [PASS][7] -> [FAIL][8] ([i915#9561]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14682/shard-dg2-2/igt@gem_ctx_freq@sy...@gt0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-dg2-6/igt@gem_ctx_freq@sy...@gt0.html * igt@gem_ctx_persistence@saturated-hostile-nopreempt@ccs0: - shard-dg2: NOTRUN -> [SKIP][9] ([i915#5882]) +6 other tests skip [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-dg2-10/igt@gem_ctx_persistence@saturated-hostile-nopree...@ccs0.html * igt@gem_eio@kms: - shard-dg2: [PASS][10] -> [INCOMPLETE][11] ([i915#10513]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14682/shard-dg2-8/igt@gem_...@kms.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-dg2-3/igt@gem_...@kms.html * igt@gem_exec_balancer@parallel-ordering: - shard-rkl: NOTRUN -> [SKIP][12] ([i915#4525]) +1 other test skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-rkl-5/igt@gem_exec_balan...@parallel-ordering.html * igt@gem_exec_capture@many-4k-zero: - shard-glk: NOTRUN -> [FAIL][13] ([i915#9606]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-glk5/igt@gem_exec_capt...@many-4k-zero.html * igt@gem_exec_endless@dispatch@bcs0: - shard-mtlp: [PASS][14] -> [TIMEOUT][15] ([i915#3778] / [i915#7016]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14682/shard-mtlp-1/igt@gem_exec_endless@dispa...@bcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-mtlp-4/igt@gem_exec_endless@dispa...@bcs0.html * igt@gem_exec_fair@basic-none: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#3539] / [i915#4852]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-dg2-10/igt@gem_exec_f...@basic-none.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglu: NOTRUN -> [FAIL][17] ([i915#2842]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/shard-tglu-9/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-rkl: [PASS][18] -> [FAIL][19] ([i915#2842]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14682/shard-rkl-4/igt@gem_exec_fair@basic-none-s...@rcs0.html [19]:
Re: [PATCH v1 03/12] drm/i915: Make I2C terminology more inclusive
On 4/30/2024 1:29 PM, Rodrigo Vivi wrote: > On Tue, Apr 30, 2024 at 05:38:02PM +, Easwar Hariharan wrote: >> I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave" >> with more appropriate terms. Inspired by and following on to Wolfram's >> series to fix drivers/i2c/[1], fix the terminology for users of >> I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists >> in the specification. >> >> Compile tested, no functionality changes intended >> >> [1]: >> https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/ >> >> Signed-off-by: Easwar Hariharan > > I'm glad to see this change! > > Reviewed-by: Rodrigo Vivi > >> --- >> drivers/gpu/drm/i915/display/dvo_ch7017.c | 14 - >> drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 18 +-- >> drivers/gpu/drm/i915/display/dvo_ivch.c | 16 +- >> drivers/gpu/drm/i915/display/dvo_ns2501.c | 18 +-- >> drivers/gpu/drm/i915/display/dvo_sil164.c | 18 +-- >> drivers/gpu/drm/i915/display/dvo_tfp410.c | 18 +-- >> drivers/gpu/drm/i915/display/intel_bios.c | 22 +++--- >> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- >> .../gpu/drm/i915/display/intel_display_core.h | 2 +- >> drivers/gpu/drm/i915/display/intel_dsi.h | 2 +- >> drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 20 ++--- >> drivers/gpu/drm/i915/display/intel_dvo.c | 14 - >> drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +- >> drivers/gpu/drm/i915/display/intel_gmbus.c| 4 +-- >> drivers/gpu/drm/i915/display/intel_sdvo.c | 30 +-- >> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 +-- >> drivers/gpu/drm/i915/gvt/edid.c | 28 - >> drivers/gpu/drm/i915/gvt/edid.h | 4 +-- >> drivers/gpu/drm/i915/gvt/opregion.c | 2 +- >> 19 files changed, 119 insertions(+), 119 deletions(-) > > The chances of conflicts are high with this many changes, > but should be easy enough to deal with later, so feel free > to move with this i915 patch on any other tree and we catch-up > later. > > Acked-by: Rodrigo Vivi > Thanks for the review and ack! I actually thought that this might end up going in as individual patches via the various respective trees since it's now completely independent of Wolfram's enabling series with the drop of the final patch that was treewide. What do you think? Thanks, Easwar
Re: [PATCH v1 03/12] drm/i915: Make I2C terminology more inclusive
On Tue, Apr 30, 2024 at 05:38:02PM +, Easwar Hariharan wrote:
> I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
> with more appropriate terms. Inspired by and following on to Wolfram's
> series to fix drivers/i2c/[1], fix the terminology for users of
> I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
> in the specification.
>
> Compile tested, no functionality changes intended
>
> [1]:
> https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
>
> Signed-off-by: Easwar Hariharan
I'm glad to see this change!
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/dvo_ch7017.c | 14 -
> drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 18 +--
> drivers/gpu/drm/i915/display/dvo_ivch.c | 16 +-
> drivers/gpu/drm/i915/display/dvo_ns2501.c | 18 +--
> drivers/gpu/drm/i915/display/dvo_sil164.c | 18 +--
> drivers/gpu/drm/i915/display/dvo_tfp410.c | 18 +--
> drivers/gpu/drm/i915/display/intel_bios.c | 22 +++---
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> .../gpu/drm/i915/display/intel_display_core.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dsi.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 20 ++---
> drivers/gpu/drm/i915/display/intel_dvo.c | 14 -
> drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +-
> drivers/gpu/drm/i915/display/intel_gmbus.c| 4 +--
> drivers/gpu/drm/i915/display/intel_sdvo.c | 30 +--
> drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 +--
> drivers/gpu/drm/i915/gvt/edid.c | 28 -
> drivers/gpu/drm/i915/gvt/edid.h | 4 +--
> drivers/gpu/drm/i915/gvt/opregion.c | 2 +-
> 19 files changed, 119 insertions(+), 119 deletions(-)
The chances of conflicts are high with this many changes,
but should be easy enough to deal with later, so feel free
to move with this i915 patch on any other tree and we catch-up
later.
Acked-by: Rodrigo Vivi
>
> diff --git a/drivers/gpu/drm/i915/display/dvo_ch7017.c
> b/drivers/gpu/drm/i915/display/dvo_ch7017.c
> index d0c3880d7f80..493e730c685b 100644
> --- a/drivers/gpu/drm/i915/display/dvo_ch7017.c
> +++ b/drivers/gpu/drm/i915/display/dvo_ch7017.c
> @@ -170,13 +170,13 @@ static bool ch7017_read(struct intel_dvo_device *dvo,
> u8 addr, u8 *val)
> {
> struct i2c_msg msgs[] = {
> {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = 0,
> .len = 1,
> .buf = ,
> },
> {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = I2C_M_RD,
> .len = 1,
> .buf = val,
> @@ -189,7 +189,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8
> addr, u8 val)
> {
> u8 buf[2] = { addr, val };
> struct i2c_msg msg = {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = 0,
> .len = 2,
> .buf = buf,
> @@ -197,7 +197,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8
> addr, u8 val)
> return i2c_transfer(dvo->i2c_bus, , 1) == 1;
> }
>
> -/** Probes for a CH7017 on the given bus and slave address. */
> +/** Probes for a CH7017 on the given bus and target address. */
> static bool ch7017_init(struct intel_dvo_device *dvo,
> struct i2c_adapter *adapter)
> {
> @@ -227,13 +227,13 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
> break;
> default:
> DRM_DEBUG_KMS("ch701x not detected, got %d: from %s "
> - "slave %d.\n",
> - val, adapter->name, dvo->slave_addr);
> + "target %d.\n",
> + val, adapter->name, dvo->target_addr);
> goto fail;
> }
>
> DRM_DEBUG_KMS("%s detected on %s, addr %d\n",
> - str, adapter->name, dvo->slave_addr);
> + str, adapter->name, dvo->target_addr);
> return true;
>
> fail:
> diff --git a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> index 2e8e85da5a40..534b8544e0a4 100644
> --- a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> +++ b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> @@ -153,13 +153,13 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo,
> int addr, u8 *ch)
>
> struct i2c_msg msgs[] = {
> {
> - .addr = dvo->slave_addr,
> + .addr = dvo->target_addr,
> .flags = 0,
> .len = 1,
> .buf = out_buf,
> },
[linux-next:master] BUILD REGRESSION d04466706db5e241ee026f17b5f920e50dee26b5
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: d04466706db5e241ee026f17b5f920e50dee26b5 Add linux-next specific files for 20240430 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/202404301738.j71xgyar-...@intel.com Unverified Error/Warning (likely false positive, please contact us if interested): drivers/virt/acrn/mm.c:217 acrn_vm_ram_map() error: uninitialized symbol 'start_pfn'. drivers/virt/acrn/mm.c:224 acrn_vm_ram_map() error: uninitialized symbol 'ret'. net/ipv6/route.c:5712 rt6_fill_node() error: we previously assumed 'dst' could be null (see line 5697) Error/Warning ids grouped by kconfigs: gcc_recent_errors |-- alpha-allyesconfig | `-- drivers-usb-dwc3-core.c:warning:variable-hw_mode-set-but-not-used |-- arc-allmodconfig | `-- drivers-usb-dwc3-core.c:warning:variable-hw_mode-set-but-not-used |-- arc-allyesconfig | `-- drivers-usb-dwc3-core.c:warning:variable-hw_mode-set-but-not-used |-- arc-randconfig-r121-20240430 | |-- drivers-hwmon-pmbus-xdp710.c:sparse:sparse:symbol-micro_ohm_rsense-was-not-declared.-Should-it-be-static | |-- fs-bcachefs-btree_cache.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-task_struct-got-unsigned-long | `-- fs-ext4-orphan.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-restricted-__le32-_prev_-got-unsigned-long |-- arc-randconfig-r122-20240430 | |-- block-blk-mq.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-request | |-- block-blk-mq.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-request | |-- block-blk-mq.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-request-got-unsigned-long | |-- drivers-dma-buf-dma-fence-chain.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-dma_fence-noderef-__rcu | |-- drivers-dma-buf-dma-fence-chain.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-dma_fence-noderef-__rcu | |-- drivers-dma-buf-dma-fence-chain.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-dma_fence-noderef-__rcu-got-unsigned-long | |-- drivers-nvme-target-fabrics-cmd.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-nvmet_ctrl | |-- drivers-nvme-target-fabrics-cmd.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-nvmet_ctrl | |-- drivers-nvme-target-fabrics-cmd.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-nvmet_ctrl-got-unsigned-long | |-- fs-btrfs-raid56.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-btrfs_stripe_hash_table | |-- fs-btrfs-raid56.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-btrfs_stripe_hash_table | |-- fs-btrfs-raid56.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-btrfs_stripe_hash_table-got-unsigned-long | |-- fs-crypto-hooks.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-char | |-- fs-crypto-hooks.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-char | |-- fs-crypto-hooks.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-char-got-unsigned-long | |-- fs-crypto-keysetup.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-struct-fscrypt_inode_info | |-- fs-crypto-keysetup.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-struct-fscrypt_inode_info | |-- fs-crypto-keysetup.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-struct-fscrypt_inode_info-got-unsigned-long | |-- fs-debugfs-file.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-void | |-- fs-debugfs-file.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-void | |-- fs-debugfs-file.c:sparse:sparse:incorrect-type-in-assignment-(different-base-types)-expected-void-got-unsigned-long | |-- fs-ext4-orphan.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-new-got-restricted-__le32-_n_ | |-- fs-ext4-orphan.c:sparse:sparse:incorrect-type-in-argument-(different-base-types)-expected-unsigned-long-usertype-old-got-restricted-__le32-_o_ | |-- fs-libfs.c:sparse:sparse:incorrect-type-in-argument
[PULL] drm-intel-next
Hi Dave and Sima,
Here goes one extra, and really the last one targeting 6.10.
We have decided to do this extra one so we could include the
good clean-up on i915/xe's fbdev work done by Thomas Zimmermann.
And it looks like he has more work on top of that, so it would
be good to propagate this initial one sooner and sync our trees.
Thanks,
Rodrigo.
drm-intel-next-2024-04-30:
Core DRM:
- Export drm_client_dev_unregister (Thomas Zimmermann)
Display i915:
- More initial work to make display code more independent from i915 (Jani)
- Convert i915/xe fbdev to DRM client (Thomas Zimmermann)
- VLV/CHV DPIO register cleanup (Ville)
The following changes since commit 6068bc209ac8d07a5d04e93f168465195e22a4cc:
drm/i915/dsi: pass display to register macros instead of implicit variable
(2024-04-23 17:00:14 +0300)
are available in the Git repository at:
https://anongit.freedesktop.org/git/drm/drm-intel
tags/drm-intel-next-2024-04-30
for you to fetch changes up to 6f1923f54d77942376f47d05b08cddca19fc397f:
drm/i915/dpio: Extract vlv_dpio_phy_regs.h (2024-04-30 21:20:52 +0300)
Core DRM:
- Export drm_client_dev_unregister (Thomas Zimmermann)
Display i915:
- More initial work to make display code more independent from i915 (Jani)
- Convert i915/xe fbdev to DRM client (Thomas Zimmermann)
- VLV/CHV DPIO register cleanup (Ville)
Jani Nikula (13):
drm/i915: convert _MMIO_PIPE3()/_MMIO_PORT3() to accept base
drm/i915: pass dev_priv to _MMIO_PIPE2, _MMIO_TRANS2, _MMIO_CURSOR2
drm/i915/audio: move LPE audio regs to intel_audio_regs.h
drm/i915/color: move palette registers to intel_color_regs.h
drm/i915/display: split out intel_fbc_regs.h from i915_reg.h
drm/i915/display: split out intel_sprite_regs.h from i915_reg.h
drm/i915: pass dev_priv explicitly to PALETTE
drm/i915: pass dev_priv explicitly to PIPE_WGC_C01_C00
drm/i915: pass dev_priv explicitly to PIPE_WGC_C02
drm/i915: pass dev_priv explicitly to PIPE_WGC_C11_C10
drm/i915: pass dev_priv explicitly to PIPE_WGC_C12
drm/i915: pass dev_priv explicitly to PIPE_WGC_C21_C20
drm/i915: pass dev_priv explicitly to PIPE_WGC_C22
Thomas Zimmermann (6):
drm/client: Export drm_client_dev_unregister()
drm/i915: Move fbdev functions
drm/i915: Initialize fbdev DRM client with callback functions
drm/{i915,xe}: Unregister in-kernel clients
drm/{i915,xe}: Implement fbdev client callbacks
drm/{i915, xe}: Implement fbdev emulation as in-kernel client
Ville Syrjälä (14):
drm/i915/dpio: Remove pointless VLV_PCS01_DW8 read
drm/i915/dpio: s/VLV_REF_DW13/VLV_REF_DW11/
drm/i915/dpio: s/VLV_PLL_DW9_BCAST/VLV_PCS_DW17_BCAST/
drm/i915/dpio: Fix VLV DPIO PLL register dword numbering
drm/i915/dpio: Remove pointless variables from vlv/chv DPLL code
drm/i915/dpio: Rename some variables
drm/i915/dpio: s/port/ch/
drm/i915/dpio: s/pipe/ch/
drm/i915/dpio: Derive the phy from the port rather than pipe in encoder
hooks
drm/i915/dpio: Give VLV DPIO group register a clearer name
drm/i915/dpio: Rename a few CHV DPIO PHY registers
drm/i915/dpio: Clean up VLV/CHV DPIO PHY register defines
drm/i915/dpio: Clean up the vlv/chv PHY register bits
drm/i915/dpio: Extract vlv_dpio_phy_regs.h
drivers/gpu/drm/drm_client.c | 13 +
drivers/gpu/drm/i915/display/intel_audio_regs.h| 16 +
drivers/gpu/drm/i915/display/intel_color.c | 53 +-
drivers/gpu/drm/i915/display/intel_color_regs.h| 42 +-
drivers/gpu/drm/i915/display/intel_display.c |2 +-
.../gpu/drm/i915/display/intel_display_driver.c| 24 +-
.../drm/i915/display/intel_display_power_well.c| 16 +-
.../gpu/drm/i915/display/intel_display_reg_defs.h | 22 +-
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 148 ++-
drivers/gpu/drm/i915/display/intel_dpll.c | 262 +++--
drivers/gpu/drm/i915/display/intel_fbc.c |1 +
drivers/gpu/drm/i915/display/intel_fbc_regs.h | 120 +++
drivers/gpu/drm/i915/display/intel_fbdev.c | 265 ++---
drivers/gpu/drm/i915/display/intel_fbdev.h | 29 +-
drivers/gpu/drm/i915/display/intel_lpe_audio.c |2 +-
drivers/gpu/drm/i915/display/intel_psr_regs.h | 38 +-
drivers/gpu/drm/i915/display/intel_sprite.c|1 +
drivers/gpu/drm/i915/display/intel_sprite_regs.h | 348 ++
drivers/gpu/drm/i915/display/vlv_dpio_phy_regs.h | 309 ++
drivers/gpu/drm/i915/gt/intel_workarounds.c|2 +
drivers/gpu/drm/i915/gvt/cmd_parser.c |1 +
drivers/gpu/drm/i915/gvt/display.c |1 +
drivers/gpu/drm/i915/gvt/fb_decoder.c |5 +-
drivers/gpu/drm/i915/gvt/handlers.c|1 +
✗ Fi.CI.BUILD: failure for Make I2C terminology more inclusive for I2C Algobit and consumers (rev2)
== Series Details == Series: Make I2C terminology more inclusive for I2C Algobit and consumers (rev2) URL : https://patchwork.freedesktop.org/series/131867/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/131867/revisions/2/mbox/ not applied Applying: drm/amdgpu, drm/radeon: Make I2C terminology more inclusive Using index info to reconstruct a base tree... M drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c M drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c M drivers/gpu/drm/amd/display/dc/bios/bios_parser.c M drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c M drivers/gpu/drm/amd/display/dc/dc.h M drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c M drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c Auto-merging drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c Auto-merging drivers/gpu/drm/amd/display/dc/dc.h Auto-merging drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c Auto-merging drivers/gpu/drm/amd/display/dc/bios/bios_parser.c Auto-merging drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c CONFLICT (content): Merge conflict in drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c Auto-merging drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/amdgpu, drm/radeon: Make I2C terminology more inclusive When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". Build failed, no error log produced
✓ Fi.CI.BAT: success for Enable display support for Battlemage (rev3)
== Series Details == Series: Enable display support for Battlemage (rev3) URL : https://patchwork.freedesktop.org/series/132429/ State : success == Summary == CI Bug Log - changes from CI_DRM_14684 -> Patchwork_132429v3 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/index.html Participating hosts (40 -> 39) -- Additional (3): bat-dg2-11 bat-jsl-1 fi-elk-e7500 Missing(4): fi-kbl-7567u bat-dg1-7 fi-snb-2520m fi-kbl-8809g Known issues Here are the changes found in Patchwork_132429v3 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][2] ([i915#2190]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-jsl-1/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@verify-random: - bat-jsl-1: NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html * igt@gem_mmap@basic: - bat-dg2-11: NOTRUN -> [SKIP][4] ([i915#4083]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg2-11: NOTRUN -> [SKIP][5] ([i915#4077]) +2 other tests skip [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#4079]) +1 other test skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg2-11: NOTRUN -> [SKIP][7] ([i915#6621]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@execlists: - fi-bsw-nick:[PASS][8] -> [ABORT][9] ([i915#10594]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14684/fi-bsw-nick/igt@i915_selftest@l...@execlists.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/fi-bsw-nick/igt@i915_selftest@l...@execlists.html * igt@i915_selftest@live@gem_contexts: - bat-atsm-1: [PASS][10] -> [INCOMPLETE][11] ([i915#10461]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14684/bat-atsm-1/igt@i915_selftest@live@gem_contexts.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-atsm-1/igt@i915_selftest@live@gem_contexts.html * igt@i915_selftest@live@gt_lrc: - bat-adlp-6: [PASS][12] -> [INCOMPLETE][13] ([i915#10886] / [i915#10949]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14684/bat-adlp-6/igt@i915_selftest@live@gt_lrc.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-adlp-6/igt@i915_selftest@live@gt_lrc.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg2-11: NOTRUN -> [SKIP][14] ([i915#4212]) +7 other tests skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-11: NOTRUN -> [SKIP][15] ([i915#5190]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-11: NOTRUN -> [SKIP][16] ([i915#4215] / [i915#5190]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-dg2-11: NOTRUN -> [SKIP][17] ([i915#4103] / [i915#4213]) +1 other test skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-jsl-1: NOTRUN -> [SKIP][18] ([i915#4103]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-dg2-11: NOTRUN -> [SKIP][19] ([i915#3555] / [i915#3840]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_132429v3/bat-dg2-11/igt@kms_...@dsc-basic.html - bat-jsl-1: NOTRUN -> [SKIP][20] ([i915#3555] / [i915#9886]) [20]:
✗ Fi.CI.SPARSE: warning for Enable display support for Battlemage (rev3)
== Series Details == Series: Enable display support for Battlemage (rev3) URL : https://patchwork.freedesktop.org/series/132429/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for Enable display support for Battlemage (rev3)
== Series Details == Series: Enable display support for Battlemage (rev3) URL : https://patchwork.freedesktop.org/series/132429/ State : warning == Summary == Error: dim checkpatch failed f1746e09cce1 drm/i915/bmg: Lane reversal requires writes to both context lanes 1f4c0c333523 drm/i915/bmg: Define IS_BATTLEMAGE macro -:36: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'i915' may be better as '(i915)' to avoid precedence issues #36: FILE: drivers/gpu/drm/i915/i915_drv.h:545: +#define IS_LUNARLAKE(i915) (0 && i915) -:37: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'i915' may be better as '(i915)' to avoid precedence issues #37: FILE: drivers/gpu/drm/i915/i915_drv.h:546: +#define IS_BATTLEMAGE(i915) (0 && i915) total: 0 errors, 0 warnings, 2 checks, 16 lines checked 7646a5845c9e drm/i915/xe2hpd: Initial cdclk table 807b6ed291be drm/i915/bmg: Extend DG2 tc check to future b604b7e04284 drm/i915/xe2hpd: Properly disable power in port A 28ffde021d25 drm/i915/xe2hpd: Add new C20 PHY SRAM address -:80: WARNING:LONG_LINE: line length of 109 exceeds 100 columns #80: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2201: + PHY_C20_B_MPLLB_CNTX_CFG(i915, i)); -:86: WARNING:LONG_LINE: line length of 109 exceeds 100 columns #86: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2205: + PHY_C20_A_MPLLB_CNTX_CFG(i915, i)); -:96: WARNING:LONG_LINE: line length of 109 exceeds 100 columns #96: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2213: + PHY_C20_B_MPLLA_CNTX_CFG(i915, i)); -:102: WARNING:LONG_LINE: line length of 109 exceeds 100 columns #102: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2217: + PHY_C20_A_MPLLA_CNTX_CFG(i915, i)); -:195: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #195: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h:279: + ((_IS_XE2HPD_C20(i915) ? _XE2HPD_C20_A_TX_CNTX_CFG : _MTL_C20_A_TX_CNTX_CFG) - (idx)) -:197: WARNING:LONG_LINE: line length of 101 exceeds 100 columns #197: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h:281: + ((_IS_XE2HPD_C20(i915) ? _XE2HPD_C20_B_TX_CNTX_CFG : _MTL_C20_B_TX_CNTX_CFG) - (idx)) -:205: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #205: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h:285: + ((_IS_XE2HPD_C20(i915) ? _XE2HPD_C20_A_CMN_CNTX_CFG : _MTL_C20_A_CMN_CNTX_CFG) - (idx)) -:207: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #207: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h:287: + ((_IS_XE2HPD_C20(i915) ? _XE2HPD_C20_B_CMN_CNTX_CFG : _MTL_C20_B_CMN_CNTX_CFG) - (idx)) total: 0 errors, 8 warnings, 0 checks, 186 lines checked f5d924d272ac drm/i915/xe2hpd: Add support for eDP PLL configuration 09a439a2a899 drm/i915/xe2hpd: update pll values in sync with Bspec 4d5f82862e88 drm/i915/xe2hpd: Add display info ebdc8b9b543d drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes be26cf5266c1 drm/i915/xe2hpd: Add max memory bandwidth algorithm dd732ff9cfa4 drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits bfa9506dd656 drm/i915/bmg: BMG should re-use MTL's south display logic c2baf9f5c3f2 Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" b46debdf0a5f drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5 13550a8d9ec5 drm/xe/gt_print: add xe_gt_err_once() 5e8c3853eea1 drm/xe/device: implement transient flush b1166e0edf40 drm/i915/display: perform transient flush -:59: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #59: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 76 lines checked c91c4796 drm/xe/bmg: Enable the display support
✓ Fi.CI.BAT: success for drm/i915/guc: avoid FIELD_PREP warning (rev2)
== Series Details ==
Series: drm/i915/guc: avoid FIELD_PREP warning (rev2)
URL : https://patchwork.freedesktop.org/series/114145/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14684 -> Patchwork_114145v2
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114145v2/index.html
Participating hosts (40 -> 36)
--
Missing(4): fi-kbl-7567u bat-dg1-7 fi-snb-2520m fi-kbl-8809g
Known issues
Here are the changes found in Patchwork_114145v2 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@workarounds:
- bat-dg2-8: [PASS][1] -> [DMESG-FAIL][2] ([i915#9500])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14684/bat-dg2-8/igt@i915_selftest@l...@workarounds.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114145v2/bat-dg2-8/igt@i915_selftest@l...@workarounds.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10911]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10911
[i915#9500]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9500
Build changes
-
* Linux: CI_DRM_14684 -> Patchwork_114145v2
CI-20190529: 20190529
CI_DRM_14684: 8aebdf15c4291ea17c810781d54a16f7d12c19fb @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7826: ce6ce0f60dd1a6c0df93a01ad71a31964158a2cf @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114145v2: 8aebdf15c4291ea17c810781d54a16f7d12c19fb @
git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114145v2/index.html
✗ Fi.CI.SPARSE: warning for drm/i915/guc: avoid FIELD_PREP warning (rev2)
== Series Details == Series: drm/i915/guc: avoid FIELD_PREP warning (rev2) URL : https://patchwork.freedesktop.org/series/114145/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: avoid FIELD_PREP warning (rev2)
== Series Details == Series: drm/i915/guc: avoid FIELD_PREP warning (rev2) URL : https://patchwork.freedesktop.org/series/114145/ State : warning == Summary == Error: dim checkpatch failed 313ad2270b44 drm/i915/guc: avoid FIELD_PREP warning -:10: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?) #10: inlined from '__guc_context_set_prio.isra.67' at drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3292:3, total: 0 errors, 1 warnings, 0 checks, 12 lines checked
Re: [PATCH v3 18/19] drm/i915/display: perform transient flush
+Jani
On Tue, Apr 30, 2024 at 10:28:49AM GMT, Radhakrishna Sripada wrote:
From: Matthew Auld
Perform manual transient cache flush prior to flip and at the end of
frontbuffer_flush. This is needed to ensure display engine doesn't see
garbage if the surface is L3:XD dirty.
Testcase: igt@xe-pat@display-vs-wb-transient
Signed-off-by: Matthew Auld
Signed-off-by: Balasubramani Vivekanandan
Acked-by: Nirmoy Das
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
.../gpu/drm/i915/display/intel_frontbuffer.c | 2 ++
drivers/gpu/drm/i915/display/intel_tdf.h | 25 +++
drivers/gpu/drm/xe/Makefile | 3 ++-
drivers/gpu/drm/xe/display/xe_tdf.c | 13 ++
5 files changed, 45 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_tdf.h
create mode 100644 drivers/gpu/drm/xe/display/xe_tdf.c
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 00e583fc2a8c..294539b4ca99 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -109,6 +109,7 @@
#include "intel_sdvo.h"
#include "intel_snps_phy.h"
#include "intel_tc.h"
+#include "intel_tdf.h"
#include "intel_tv.h"
#include "intel_vblank.h"
#include "intel_vdsc.h"
@@ -7225,6 +7226,8 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
intel_atomic_commit_fence_wait(state);
+ intel_td_flush(dev_priv);
+
drm_atomic_helper_wait_for_dependencies(>base);
drm_dp_mst_atomic_wait_for_dependencies(>base);
intel_atomic_global_state_wait_for_dependencies(state);
diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 2ea37c0414a9..4923c340a0b6 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -65,6 +65,7 @@
#include "intel_fbc.h"
#include "intel_frontbuffer.h"
#include "intel_psr.h"
+#include "intel_tdf.h"
/**
* frontbuffer_flush - flush frontbuffer
@@ -93,6 +94,7 @@ static void frontbuffer_flush(struct drm_i915_private *i915,
trace_intel_frontbuffer_flush(i915, frontbuffer_bits, origin);
might_sleep();
+ intel_td_flush(i915);
intel_drrs_flush(i915, frontbuffer_bits);
intel_psr_flush(i915, frontbuffer_bits, origin);
intel_fbc_flush(i915, frontbuffer_bits, origin);
diff --git a/drivers/gpu/drm/i915/display/intel_tdf.h
b/drivers/gpu/drm/i915/display/intel_tdf.h
new file mode 100644
index ..353cde21f6c2
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_tdf.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef __INTEL_TDF_H__
+#define __INTEL_TDF_H__
+
+/*
+ * TDF (Transient-Data-Flush) is needed for Xe2+ where special L3:XD caching
can
+ * be enabled through various PAT index modes. Idea is to use this caching mode
+ * when for example rendering onto the display surface, with the promise that
+ * KMD will ensure transient cache entries are always flushed by the time we do
+ * the display flip, since display engine is never coherent with CPU/GPU
caches.
+ */
+
+struct drm_i915_private;
+
+#ifdef I915
+static inline void intel_td_flush(struct drm_i915_private *i915) {}
+#else
+void intel_td_flush(struct drm_i915_private *i915);
+#endif
+
+#endif
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index a67977edff5b..b620389761d5 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -206,7 +206,8 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/xe_dsb_buffer.o \
display/xe_fb_pin.o \
display/xe_hdcp_gsc.o \
- display/xe_plane_initial.o
+ display/xe_plane_initial.o \
+ display/xe_tdf.o
# SOC code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
diff --git a/drivers/gpu/drm/xe/display/xe_tdf.c
b/drivers/gpu/drm/xe/display/xe_tdf.c
new file mode 100644
index ..2c0d4e144e09
--- /dev/null
+++ b/drivers/gpu/drm/xe/display/xe_tdf.c
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "intel_display_types.h"
+#include "intel_tdf.h"
+
+void intel_td_flush(struct drm_i915_private *i915)
+{
+ xe_device_td_flush(i915);
this would be the display side "calling back onto xe". I think it's ok
given the current status quo, but Cc'ing Jani.
This also needs the previous 2 patches, which I'm ok with merging
through drm-intel-next if this user here is the correct way to
implement.
Lucas De Marchi
+}
--
2.34.1
Re: [PATCH v3 19/19] drm/xe/bmg: Enable the display support
On Tue, Apr 30, 2024 at 10:28:50AM GMT, Radhakrishna Sripada wrote:
From: Balasubramani Vivekanandan
Enable the display support for Battlemage
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Shekhar Chauhan
Signed-off-by: Radhakrishna Sripada
Acked-by: Lucas De Marchi
to merge this through drm-intel-next once we confirm it's passing CI
(and tested on BMG).
Lucas De Marchi
---
drivers/gpu/drm/xe/xe_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a0cf5dd803c2..b01b1d30976a 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -342,6 +342,7 @@ static const struct xe_device_desc lnl_desc = {
static const struct xe_device_desc bmg_desc __maybe_unused = {
DGFX_FEATURES,
PLATFORM(XE_BATTLEMAGE),
+ .has_display = true,
.require_force_probe = true,
};
--
2.34.1
[PATCH v1 12/12] fbdev/viafb: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/video/fbdev/via/chip.h| 8
drivers/video/fbdev/via/dvi.c | 24
drivers/video/fbdev/via/lcd.c | 6 +++---
drivers/video/fbdev/via/via_aux.h | 2 +-
drivers/video/fbdev/via/via_i2c.c | 12 ++--
drivers/video/fbdev/via/vt1636.c | 6 +++---
6 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/drivers/video/fbdev/via/chip.h b/drivers/video/fbdev/via/chip.h
index f0a19cbcb9e5..1ea6d4ce79e7 100644
--- a/drivers/video/fbdev/via/chip.h
+++ b/drivers/video/fbdev/via/chip.h
@@ -69,7 +69,7 @@
#define VT1632_TMDS 0x01
#define INTEGRATED_TMDS 0x42
-/* Definition TMDS Trasmitter I2C Slave Address */
+/* Definition TMDS Trasmitter I2C Client Address */
#define VT1632_TMDS_I2C_ADDR0x10
/**/
@@ -88,21 +88,21 @@
#define TX_DATA_DDR_MODE0x04
#define TX_DATA_SDR_MODE0x08
-/* Definition LVDS Trasmitter I2C Slave Address */
+/* Definition LVDS Trasmitter I2C Client Address */
#define VT1631_LVDS_I2C_ADDR0x70
#define VT3271_LVDS_I2C_ADDR0x80
#define VT1636_LVDS_I2C_ADDR0x80
struct tmds_chip_information {
int tmds_chip_name;
- int tmds_chip_slave_addr;
+ int tmds_chip_client_addr;
int output_interface;
int i2c_port;
};
struct lvds_chip_information {
int lvds_chip_name;
- int lvds_chip_slave_addr;
+ int lvds_chip_client_addr;
int output_interface;
int i2c_port;
};
diff --git a/drivers/video/fbdev/via/dvi.c b/drivers/video/fbdev/via/dvi.c
index 13147e3066eb..db7db26416c3 100644
--- a/drivers/video/fbdev/via/dvi.c
+++ b/drivers/video/fbdev/via/dvi.c
@@ -70,7 +70,7 @@ bool viafb_tmds_trasmitter_identify(void)
/* Check for VT1632: */
viaparinfo->chip_info->tmds_chip_info.tmds_chip_name = VT1632_TMDS;
viaparinfo->chip_info->
- tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
+ tmds_chip_info.tmds_chip_client_addr = VT1632_TMDS_I2C_ADDR;
viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_31;
if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) {
/*
@@ -128,14 +128,14 @@ bool viafb_tmds_trasmitter_identify(void)
viaparinfo->chip_info->
tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER;
viaparinfo->chip_info->tmds_chip_info.
- tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
+ tmds_chip_client_addr = VT1632_TMDS_I2C_ADDR;
return false;
}
static void tmds_register_write(int index, u8 data)
{
viafb_i2c_writebyte(viaparinfo->chip_info->tmds_chip_info.i2c_port,
-
viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr,
+
viaparinfo->chip_info->tmds_chip_info.tmds_chip_client_addr,
index, data);
}
@@ -144,7 +144,7 @@ static int tmds_register_read(int index)
u8 data;
viafb_i2c_readbyte(viaparinfo->chip_info->tmds_chip_info.i2c_port,
- (u8)
viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr,
+ (u8)
viaparinfo->chip_info->tmds_chip_info.tmds_chip_client_addr,
(u8) index, );
return data;
}
@@ -152,7 +152,7 @@ static int tmds_register_read(int index)
static int tmds_register_read_bytes(int index, u8 *buff, int buff_len)
{
viafb_i2c_readbytes(viaparinfo->chip_info->tmds_chip_info.i2c_port,
- (u8)
viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr,
+ (u8)
viaparinfo->chip_info->tmds_chip_info.tmds_chip_client_addr,
(u8) index, buff, buff_len);
return 0;
}
@@ -256,14 +256,14 @@ static int viafb_dvi_query_EDID(void)
DEBUG_MSG(KERN_INFO "viafb_dvi_query_EDID!!\n");
- restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr;
- viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0;
+ restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_client_addr;
+ viaparinfo->chip_info->tmds_chip_info.tmds_chip_client_addr = 0xA0;
data0 = (u8) tmds_register_read(0x00);
data1 = (u8) tmds_register_read(0x01);
if ((data0 == 0) && (data1 == 0xFF)) {
viaparinfo->chip_info->
-
[PATCH v1 11/12] fbdev/smscufx: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/video/fbdev/smscufx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/fbdev/smscufx.c b/drivers/video/fbdev/smscufx.c
index 35d682b110c4..1c80c1a3d516 100644
--- a/drivers/video/fbdev/smscufx.c
+++ b/drivers/video/fbdev/smscufx.c
@@ -1292,7 +1292,7 @@ static int ufx_realloc_framebuffer(struct ufx_data *dev,
struct fb_info *info)
return 0;
}
-/* sets up I2C Controller for 100 Kbps, std. speed, 7-bit addr, master,
+/* sets up I2C Controller for 100 Kbps, std. speed, 7-bit addr, host,
* restart enabled, but no start byte, enable controller */
static int ufx_i2c_init(struct ufx_data *dev)
{
@@ -1321,7 +1321,7 @@ static int ufx_i2c_init(struct ufx_data *dev)
/* 7-bit (not 10-bit) addressing */
tmp &= ~(0x10);
- /* enable restart conditions and master mode */
+ /* enable restart conditions and host mode */
tmp |= 0x21;
status = ufx_reg_write(dev, 0x1000, tmp);
--
2.34.1
[PATCH v1 10/12] sfc: falcon: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Reviewed-by: Martin Habets
Reviewed-by: Simon Horman
Signed-off-by: Easwar Hariharan
---
drivers/net/ethernet/sfc/falcon/falcon.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/sfc/falcon/falcon.c
b/drivers/net/ethernet/sfc/falcon/falcon.c
index 7a1c9337081b..36114ce88034 100644
--- a/drivers/net/ethernet/sfc/falcon/falcon.c
+++ b/drivers/net/ethernet/sfc/falcon/falcon.c
@@ -367,7 +367,7 @@ static const struct i2c_algo_bit_data
falcon_i2c_bit_operations = {
.getsda = falcon_getsda,
.getscl = falcon_getscl,
.udelay = 5,
- /* Wait up to 50 ms for slave to let us pull SCL high */
+ /* Wait up to 50 ms for target to let us pull SCL high */
.timeout= DIV_ROUND_UP(HZ, 20),
};
--
2.34.1
[PATCH v1 09/12] media: cx23885: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/media/pci/cx23885/cx23885-f300.c | 8
drivers/media/pci/cx23885/cx23885-i2c.c | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/media/pci/cx23885/cx23885-f300.c
b/drivers/media/pci/cx23885/cx23885-f300.c
index ac1c434e8e24..5f937c281793 100644
--- a/drivers/media/pci/cx23885/cx23885-f300.c
+++ b/drivers/media/pci/cx23885/cx23885-f300.c
@@ -92,7 +92,7 @@ static u8 f300_xfer(struct dvb_frontend *fe, u8 *buf)
f300_set_line(dev, F300_RESET, 0);/* begin to send data */
msleep(1);
- f300_send_byte(dev, 0xe0);/* the slave address is 0xe0, write */
+ f300_send_byte(dev, 0xe0);/* the client address is 0xe0, write */
msleep(1);
temp = buf[0];
@@ -112,10 +112,10 @@ static u8 f300_xfer(struct dvb_frontend *fe, u8 *buf)
}
if (i > 7) {
- pr_err("%s: timeout, the slave no response\n",
+ pr_err("%s: timeout, the client no response\n",
__func__);
- ret = 1; /* timeout, the slave no response */
- } else { /* the slave not busy, prepare for getting data */
+ ret = 1; /* timeout, the client no response */
+ } else { /* the client not busy, prepare for getting data */
f300_set_line(dev, F300_RESET, 0);/*ready...*/
msleep(1);
f300_send_byte(dev, 0xe1);/* 0xe1 is Read */
diff --git a/drivers/media/pci/cx23885/cx23885-i2c.c
b/drivers/media/pci/cx23885/cx23885-i2c.c
index f51fad33dc04..385af2a893b4 100644
--- a/drivers/media/pci/cx23885/cx23885-i2c.c
+++ b/drivers/media/pci/cx23885/cx23885-i2c.c
@@ -34,7 +34,7 @@ MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
#define I2C_EXTEND (1 << 3)
#define I2C_NOSTOP (1 << 4)
-static inline int i2c_slave_did_ack(struct i2c_adapter *i2c_adap)
+static inline int i2c_client_did_ack(struct i2c_adapter *i2c_adap)
{
struct cx23885_i2c *bus = i2c_adap->algo_data;
struct cx23885_dev *dev = bus->dev;
@@ -84,7 +84,7 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap,
cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2));
if (!i2c_wait_done(i2c_adap))
return -EIO;
- if (!i2c_slave_did_ack(i2c_adap))
+ if (!i2c_client_did_ack(i2c_adap))
return -ENXIO;
dprintk(1, "%s() returns 0\n", __func__);
@@ -163,7 +163,7 @@ static int i2c_readbytes(struct i2c_adapter *i2c_adap,
cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2) | 1);
if (!i2c_wait_done(i2c_adap))
return -EIO;
- if (!i2c_slave_did_ack(i2c_adap))
+ if (!i2c_client_did_ack(i2c_adap))
return -ENXIO;
--
2.34.1
[PATCH v1 04/12] media: au0828: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/media/usb/au0828/au0828-i2c.c | 4 ++--
drivers/media/usb/au0828/au0828-input.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/media/usb/au0828/au0828-i2c.c
b/drivers/media/usb/au0828/au0828-i2c.c
index 749f90d73b5b..3e66d42bf134 100644
--- a/drivers/media/usb/au0828/au0828-i2c.c
+++ b/drivers/media/usb/au0828/au0828-i2c.c
@@ -23,7 +23,7 @@ MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
#define I2C_WAIT_DELAY 25
#define I2C_WAIT_RETRY 1000
-static inline int i2c_slave_did_read_ack(struct i2c_adapter *i2c_adap)
+static inline int i2c_client_did_read_ack(struct i2c_adapter *i2c_adap)
{
struct au0828_dev *dev = i2c_adap->algo_data;
return au0828_read(dev, AU0828_I2C_STATUS_201) &
@@ -35,7 +35,7 @@ static int i2c_wait_read_ack(struct i2c_adapter *i2c_adap)
int count;
for (count = 0; count < I2C_WAIT_RETRY; count++) {
- if (!i2c_slave_did_read_ack(i2c_adap))
+ if (!i2c_client_did_read_ack(i2c_adap))
break;
udelay(I2C_WAIT_DELAY);
}
diff --git a/drivers/media/usb/au0828/au0828-input.c
b/drivers/media/usb/au0828/au0828-input.c
index 3d3368202cd0..98a57b6e02e2 100644
--- a/drivers/media/usb/au0828/au0828-input.c
+++ b/drivers/media/usb/au0828/au0828-input.c
@@ -30,7 +30,7 @@ struct au0828_rc {
int polling;
struct delayed_work work;
- /* i2c slave address of external device (if used) */
+ /* i2c client address of external device (if used) */
u16 i2c_dev_addr;
int (*get_key_i2c)(struct au0828_rc *ir);
--
2.34.1
[PATCH v1 08/12] media: ivtv: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/media/pci/ivtv/ivtv-i2c.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/media/pci/ivtv/ivtv-i2c.c
b/drivers/media/pci/ivtv/ivtv-i2c.c
index c052c57c6dce..967e6a025020 100644
--- a/drivers/media/pci/ivtv/ivtv-i2c.c
+++ b/drivers/media/pci/ivtv/ivtv-i2c.c
@@ -33,14 +33,14 @@
Some more general comments about what we are doing:
The i2c bus is a 2 wire serial bus, with clock (SCL) and data (SDA)
-lines. To communicate on the bus (as a master, we don't act as a slave),
+lines. To communicate on the bus (as a host, we don't act as a client),
we first initiate a start condition (ivtv_start). We then write the
address of the device that we want to communicate with, along with a flag
-that indicates whether this is a read or a write. The slave then issues
+that indicates whether this is a read or a write. The client then issues
an ACK signal (ivtv_ack), which tells us that it is ready for reading /
writing. We then proceed with reading or writing (ivtv_read/ivtv_write),
and finally issue a stop condition (ivtv_stop) to make the bus available
-to other masters.
+to other hosts.
There is an additional form of transaction where a write may be
immediately followed by a read. In this case, there is no intervening
@@ -379,7 +379,7 @@ static int ivtv_waitsda(struct ivtv *itv, int val)
return 0;
}
-/* Wait for the slave to issue an ACK */
+/* Wait for the client to issue an ACK */
static int ivtv_ack(struct ivtv *itv)
{
int ret = 0;
@@ -407,7 +407,7 @@ static int ivtv_ack(struct ivtv *itv)
return ret;
}
-/* Write a single byte to the i2c bus and wait for the slave to ACK */
+/* Write a single byte to the i2c bus and wait for the client to ACK */
static int ivtv_sendbyte(struct ivtv *itv, unsigned char byte)
{
int i, bit;
@@ -471,7 +471,7 @@ static int ivtv_readbyte(struct ivtv *itv, unsigned char
*byte, int nack)
return 0;
}
-/* Issue a start condition on the i2c bus to alert slaves to prepare for
+/* Issue a start condition on the i2c bus to alert clients to prepare for
an address write */
static int ivtv_start(struct ivtv *itv)
{
@@ -534,7 +534,7 @@ static int ivtv_stop(struct ivtv *itv)
return 0;
}
-/* Write a message to the given i2c slave. do_stop may be 0 to prevent
+/* Write a message to the given i2c client. do_stop may be 0 to prevent
issuing the i2c stop condition (when following with a read) */
static int ivtv_write(struct ivtv *itv, unsigned char addr, unsigned char
*data, u32 len, int do_stop)
{
@@ -558,7 +558,7 @@ static int ivtv_write(struct ivtv *itv, unsigned char addr,
unsigned char *data,
return ret;
}
-/* Read data from the given i2c slave. A stop condition is always issued. */
+/* Read data from the given i2c client. A stop condition is always issued. */
static int ivtv_read(struct ivtv *itv, unsigned char addr, unsigned char
*data, u32 len)
{
int retry, ret = -EREMOTEIO;
--
2.34.1
[PATCH v1 07/12] media: cx25821: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/media/pci/cx25821/cx25821-i2c.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/media/pci/cx25821/cx25821-i2c.c
b/drivers/media/pci/cx25821/cx25821-i2c.c
index 0ef4cd6528a0..bad8fb9f5319 100644
--- a/drivers/media/pci/cx25821/cx25821-i2c.c
+++ b/drivers/media/pci/cx25821/cx25821-i2c.c
@@ -33,7 +33,7 @@ do {
\
#define I2C_EXTEND (1 << 3)
#define I2C_NOSTOP (1 << 4)
-static inline int i2c_slave_did_ack(struct i2c_adapter *i2c_adap)
+static inline int i2c_client_did_ack(struct i2c_adapter *i2c_adap)
{
struct cx25821_i2c *bus = i2c_adap->algo_data;
struct cx25821_dev *dev = bus->dev;
@@ -85,7 +85,7 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap,
if (!i2c_wait_done(i2c_adap))
return -EIO;
- if (!i2c_slave_did_ack(i2c_adap))
+ if (!i2c_client_did_ack(i2c_adap))
return -EIO;
dprintk(1, "%s(): returns 0\n", __func__);
@@ -174,7 +174,7 @@ static int i2c_readbytes(struct i2c_adapter *i2c_adap,
cx_write(bus->reg_ctrl, bus->i2c_period | (1 << 2) | 1);
if (!i2c_wait_done(i2c_adap))
return -EIO;
- if (!i2c_slave_did_ack(i2c_adap))
+ if (!i2c_client_did_ack(i2c_adap))
return -EIO;
dprintk(1, "%s(): returns 0\n", __func__);
--
2.34.1
[PATCH v1 06/12] media: cx18: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
I2S specification has also updated the terms in v.3 to use "controller"
and "target" respectively. Make those changes in the relevant spaces as
well.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/media/pci/cx18/cx18-av-firmware.c | 8
drivers/media/pci/cx18/cx18-cards.c | 6 +++---
drivers/media/pci/cx18/cx18-cards.h | 4 ++--
drivers/media/pci/cx18/cx18-gpio.c| 6 +++---
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/media/pci/cx18/cx18-av-firmware.c
b/drivers/media/pci/cx18/cx18-av-firmware.c
index 61aeb8c9af7f..906e0b33cffc 100644
--- a/drivers/media/pci/cx18/cx18-av-firmware.c
+++ b/drivers/media/pci/cx18/cx18-av-firmware.c
@@ -140,22 +140,22 @@ int cx18_av_loadfw(struct cx18 *cx)
cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x78000);
/* Audio input control 1 set to Sony mode */
- /* Audio output input 2 is 0 for slave operation input */
+ /* Audio output input 2 is 0 for target operation input */
/* 0xC4000914[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
/* 0xC4000914[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
after WS transition for first bit of audio word. */
cx18_av_write4(cx, CXADEC_I2S_IN_CTL, 0x00A0);
/* Audio output control 1 is set to Sony mode */
- /* Audio output control 2 is set to 1 for master mode */
+ /* Audio output control 2 is set to 1 for controller mode */
/* 0xC4000918[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */
/* 0xC4000918[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge
after WS transition for first bit of audio word. */
- /* 0xC4000918[8]: 0 = slave operation, 1 = master (SCK_OUT and WS_OUT
+ /* 0xC4000918[8]: 0 = target operation, 1 = controller (SCK_OUT and
WS_OUT
are generated) */
cx18_av_write4(cx, CXADEC_I2S_OUT_CTL, 0x01A0);
- /* set alt I2s master clock to /0x16 and enable alt divider i2s
+ /* set alt I2s controller clock to /0x16 and enable alt divider i2s
passthrough */
cx18_av_write4(cx, CXADEC_PIN_CFG3, 0x5600B687);
diff --git a/drivers/media/pci/cx18/cx18-cards.c
b/drivers/media/pci/cx18/cx18-cards.c
index f5a30959a367..d9b859ee4b1b 100644
--- a/drivers/media/pci/cx18/cx18-cards.c
+++ b/drivers/media/pci/cx18/cx18-cards.c
@@ -82,7 +82,7 @@ static const struct cx18_card cx18_card_hvr1600_esmt = {
},
.gpio_init.initial_value = 0x3001,
.gpio_init.direction = 0x3001,
- .gpio_i2c_slave_reset = {
+ .gpio_i2c_client_reset = {
.active_lo_mask = 0x3001,
.msecs_asserted = 10,
.msecs_recovery = 40,
@@ -129,7 +129,7 @@ static const struct cx18_card cx18_card_hvr1600_s5h1411 = {
},
.gpio_init.initial_value = 0x3801,
.gpio_init.direction = 0x3801,
- .gpio_i2c_slave_reset = {
+ .gpio_i2c_client_reset = {
.active_lo_mask = 0x3801,
.msecs_asserted = 10,
.msecs_recovery = 40,
@@ -176,7 +176,7 @@ static const struct cx18_card cx18_card_hvr1600_samsung = {
},
.gpio_init.initial_value = 0x3001,
.gpio_init.direction = 0x3001,
- .gpio_i2c_slave_reset = {
+ .gpio_i2c_client_reset = {
.active_lo_mask = 0x3001,
.msecs_asserted = 10,
.msecs_recovery = 40,
diff --git a/drivers/media/pci/cx18/cx18-cards.h
b/drivers/media/pci/cx18/cx18-cards.h
index ae9cf5bfdd59..86f41ec6ca2f 100644
--- a/drivers/media/pci/cx18/cx18-cards.h
+++ b/drivers/media/pci/cx18/cx18-cards.h
@@ -69,7 +69,7 @@ struct cx18_gpio_init { /* set initial GPIO DIR and OUT
values */
u32 initial_value;
};
-struct cx18_gpio_i2c_slave_reset {
+struct cx18_gpio_i2c_client_reset {
u32 active_lo_mask; /* GPIO outputs that reset i2c chips when low */
u32 active_hi_mask; /* GPIO outputs that reset i2c chips when high */
int msecs_asserted; /* time period reset must remain asserted */
@@ -121,7 +121,7 @@ struct cx18_card {
/* GPIO card-specific settings */
u8 xceive_pin; /* XCeive tuner GPIO reset pin */
struct cx18_gpio_initgpio_init;
- struct cx18_gpio_i2c_slave_reset gpio_i2c_slave_reset;
+ struct cx18_gpio_i2c_client_reset gpio_i2c_client_reset;
struct cx18_gpio_audio_inputgpio_audio_input;
struct cx18_card_tuner tuners[CX18_CARD_MAX_TUNERS];
diff
[PATCH v1 05/12] media: cobalt: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/media/pci/cobalt/cobalt-i2c.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/media/pci/cobalt/cobalt-i2c.c
b/drivers/media/pci/cobalt/cobalt-i2c.c
index 10c9ee33f73e..d2963370f949 100644
--- a/drivers/media/pci/cobalt/cobalt-i2c.c
+++ b/drivers/media/pci/cobalt/cobalt-i2c.c
@@ -45,10 +45,10 @@ struct cobalt_i2c_regs {
/* I2C stop condition */
#define M00018_CR_BITMAP_STO_MSK (1 << 6)
-/* I2C read from slave */
+/* I2C read from client */
#define M00018_CR_BITMAP_RD_MSK(1 << 5)
-/* I2C write to slave */
+/* I2C write to client */
#define M00018_CR_BITMAP_WR_MSK(1 << 4)
/* I2C ack */
@@ -59,7 +59,7 @@ struct cobalt_i2c_regs {
/* SR[7:0] - Status register */
-/* Receive acknowledge from slave */
+/* Receive acknowledge from client */
#define M00018_SR_BITMAP_RXACK_MSK (1 << 7)
/* Busy, I2C bus busy (as defined by start / stop bits) */
--
2.34.1
[PATCH v1 03/12] drm/i915: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/gpu/drm/i915/display/dvo_ch7017.c | 14 -
drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 18 +--
drivers/gpu/drm/i915/display/dvo_ivch.c | 16 +-
drivers/gpu/drm/i915/display/dvo_ns2501.c | 18 +--
drivers/gpu/drm/i915/display/dvo_sil164.c | 18 +--
drivers/gpu/drm/i915/display/dvo_tfp410.c | 18 +--
drivers/gpu/drm/i915/display/intel_bios.c | 22 +++---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
.../gpu/drm/i915/display/intel_display_core.h | 2 +-
drivers/gpu/drm/i915/display/intel_dsi.h | 2 +-
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 20 ++---
drivers/gpu/drm/i915/display/intel_dvo.c | 14 -
drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +-
drivers/gpu/drm/i915/display/intel_gmbus.c| 4 +--
drivers/gpu/drm/i915/display/intel_sdvo.c | 30 +--
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 +--
drivers/gpu/drm/i915/gvt/edid.c | 28 -
drivers/gpu/drm/i915/gvt/edid.h | 4 +--
drivers/gpu/drm/i915/gvt/opregion.c | 2 +-
19 files changed, 119 insertions(+), 119 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/dvo_ch7017.c
b/drivers/gpu/drm/i915/display/dvo_ch7017.c
index d0c3880d7f80..493e730c685b 100644
--- a/drivers/gpu/drm/i915/display/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/display/dvo_ch7017.c
@@ -170,13 +170,13 @@ static bool ch7017_read(struct intel_dvo_device *dvo, u8
addr, u8 *val)
{
struct i2c_msg msgs[] = {
{
- .addr = dvo->slave_addr,
+ .addr = dvo->target_addr,
.flags = 0,
.len = 1,
.buf = ,
},
{
- .addr = dvo->slave_addr,
+ .addr = dvo->target_addr,
.flags = I2C_M_RD,
.len = 1,
.buf = val,
@@ -189,7 +189,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8
addr, u8 val)
{
u8 buf[2] = { addr, val };
struct i2c_msg msg = {
- .addr = dvo->slave_addr,
+ .addr = dvo->target_addr,
.flags = 0,
.len = 2,
.buf = buf,
@@ -197,7 +197,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8
addr, u8 val)
return i2c_transfer(dvo->i2c_bus, , 1) == 1;
}
-/** Probes for a CH7017 on the given bus and slave address. */
+/** Probes for a CH7017 on the given bus and target address. */
static bool ch7017_init(struct intel_dvo_device *dvo,
struct i2c_adapter *adapter)
{
@@ -227,13 +227,13 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
break;
default:
DRM_DEBUG_KMS("ch701x not detected, got %d: from %s "
- "slave %d.\n",
- val, adapter->name, dvo->slave_addr);
+ "target %d.\n",
+ val, adapter->name, dvo->target_addr);
goto fail;
}
DRM_DEBUG_KMS("%s detected on %s, addr %d\n",
- str, adapter->name, dvo->slave_addr);
+ str, adapter->name, dvo->target_addr);
return true;
fail:
diff --git a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
index 2e8e85da5a40..534b8544e0a4 100644
--- a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
@@ -153,13 +153,13 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo,
int addr, u8 *ch)
struct i2c_msg msgs[] = {
{
- .addr = dvo->slave_addr,
+ .addr = dvo->target_addr,
.flags = 0,
.len = 1,
.buf = out_buf,
},
{
- .addr = dvo->slave_addr,
+ .addr = dvo->target_addr,
.flags = I2C_M_RD,
.len = 1,
.buf = in_buf,
@@ -176,7 +176,7 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int
addr, u8 *ch)
if (!ch7xxx->quiet) {
DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
-
[PATCH v1 02/12] drm/gma500: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
drivers/gpu/drm/gma500/cdv_intel_lvds.c | 2 +-
drivers/gpu/drm/gma500/intel_bios.c | 22 ++---
drivers/gpu/drm/gma500/intel_bios.h | 4 ++--
drivers/gpu/drm/gma500/intel_gmbus.c| 2 +-
drivers/gpu/drm/gma500/psb_drv.h| 2 +-
drivers/gpu/drm/gma500/psb_intel_drv.h | 2 +-
drivers/gpu/drm/gma500/psb_intel_lvds.c | 4 ++--
drivers/gpu/drm/gma500/psb_intel_sdvo.c | 26 -
8 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
index f08a6803dc18..c7652a02b42e 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
@@ -565,7 +565,7 @@ void cdv_intel_lvds_init(struct drm_device *dev,
dev->dev, "I2C bus registration failed.\n");
goto err_encoder_cleanup;
}
- gma_encoder->i2c_bus->slave_addr = 0x2C;
+ gma_encoder->i2c_bus->target_addr = 0x2C;
dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
/*
diff --git a/drivers/gpu/drm/gma500/intel_bios.c
b/drivers/gpu/drm/gma500/intel_bios.c
index 8245b5603d2c..d5924ca3ed05 100644
--- a/drivers/gpu/drm/gma500/intel_bios.c
+++ b/drivers/gpu/drm/gma500/intel_bios.c
@@ -14,8 +14,8 @@
#include "psb_intel_drv.h"
#include "psb_intel_reg.h"
-#defineSLAVE_ADDR1 0x70
-#defineSLAVE_ADDR2 0x72
+#defineTARGET_ADDR10x70
+#defineTARGET_ADDR20x72
static void *find_section(struct bdb_header *bdb, int section_id)
{
@@ -357,10 +357,10 @@ parse_sdvo_device_mapping(struct drm_psb_private
*dev_priv,
/* skip the device block if device type is invalid */
continue;
}
- if (p_child->slave_addr != SLAVE_ADDR1 &&
- p_child->slave_addr != SLAVE_ADDR2) {
+ if (p_child->target_addr != TARGET_ADDR1 &&
+ p_child->target_addr != TARGET_ADDR2) {
/*
-* If the slave address is neither 0x70 nor 0x72,
+* If the target address is neither 0x70 nor 0x72,
* it is not a SDVO device. Skip it.
*/
continue;
@@ -371,22 +371,22 @@ parse_sdvo_device_mapping(struct drm_psb_private
*dev_priv,
DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
continue;
}
- DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
+ DRM_DEBUG_KMS("the SDVO device with target addr %2x is found on"
" %s port\n",
- p_child->slave_addr,
+ p_child->target_addr,
(p_child->dvo_port == DEVICE_PORT_DVOB) ?
"SDVOB" : "SDVOC");
p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
if (!p_mapping->initialized) {
p_mapping->dvo_port = p_child->dvo_port;
- p_mapping->slave_addr = p_child->slave_addr;
+ p_mapping->target_addr = p_child->target_addr;
p_mapping->dvo_wiring = p_child->dvo_wiring;
p_mapping->ddc_pin = p_child->ddc_pin;
p_mapping->i2c_pin = p_child->i2c_pin;
p_mapping->initialized = 1;
DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d,
ddc_pin=%d, i2c_pin=%d\n",
p_mapping->dvo_port,
- p_mapping->slave_addr,
+ p_mapping->target_addr,
p_mapping->dvo_wiring,
p_mapping->ddc_pin,
p_mapping->i2c_pin);
@@ -394,10 +394,10 @@ parse_sdvo_device_mapping(struct drm_psb_private
*dev_priv,
DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
"two SDVO device.\n");
}
- if (p_child->slave2_addr) {
+ if (p_child->target2_addr) {
/* Maybe this is a SDVO device with multiple inputs */
/* And the mapping info is not added */
[PATCH v1 01/12] drm/amdgpu, drm/radeon: Make I2C terminology more inclusive
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave"
with more appropriate terms. Inspired by and following on to Wolfram's
series to fix drivers/i2c/[1], fix the terminology for users of
I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists
in the specification.
Compile tested, no functionality changes intended
[1]:
https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/
Signed-off-by: Easwar Hariharan
---
.../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 8 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c | 10 +++
drivers/gpu/drm/amd/amdgpu/atombios_i2c.c | 8 +++---
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c| 20 ++---
.../gpu/drm/amd/display/dc/bios/bios_parser.c | 2 +-
.../drm/amd/display/dc/bios/bios_parser2.c| 2 +-
.../drm/amd/display/dc/core/dc_link_exports.c | 4 +--
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
drivers/gpu/drm/amd/display/dc/dce/dce_i2c.c | 4 +--
.../display/include/grph_object_ctrl_defs.h | 2 +-
drivers/gpu/drm/amd/include/atombios.h| 2 +-
drivers/gpu/drm/amd/include/atomfirmware.h| 26 -
.../powerplay/hwmgr/vega20_processpptables.c | 4 +--
.../amd/pm/powerplay/inc/smu11_driver_if.h| 2 +-
.../inc/pmfw_if/smu11_driver_if_arcturus.h| 2 +-
.../inc/pmfw_if/smu11_driver_if_navi10.h | 2 +-
.../pmfw_if/smu11_driver_if_sienna_cichlid.h | 2 +-
.../inc/pmfw_if/smu13_driver_if_aldebaran.h | 2 +-
.../inc/pmfw_if/smu13_driver_if_v13_0_0.h | 2 +-
.../inc/pmfw_if/smu13_driver_if_v13_0_7.h | 2 +-
.../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 4 +--
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 8 +++---
drivers/gpu/drm/radeon/atombios.h | 2 +-
drivers/gpu/drm/radeon/atombios_i2c.c | 4 +--
drivers/gpu/drm/radeon/radeon_combios.c | 28 +--
drivers/gpu/drm/radeon/radeon_i2c.c | 10 +++
drivers/gpu/drm/radeon/radeon_mode.h | 6 ++--
27 files changed, 85 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 6857c586ded7..37f50fc5d496 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -614,7 +614,7 @@ bool amdgpu_atomfirmware_ras_rom_addr(struct amdgpu_device
*adev,
if ((frev == 3 && crev >= 4) || (frev > 3)) {
firmware_info = (union firmware_info *)
(mode_info->atom_context->bios + data_offset);
- /* The ras_rom_i2c_slave_addr should ideally
+ /* The ras_rom_i2c_target_addr should ideally
* be a 19-bit EEPROM address, which would be
* used as is by the driver; see top of
* amdgpu_eeprom.c.
@@ -625,13 +625,13 @@ bool amdgpu_atomfirmware_ras_rom_addr(struct
amdgpu_device *adev,
* leave the check for the pointer.
*
* The reason this works right now is because
-* ras_rom_i2c_slave_addr contains the EEPROM
+* ras_rom_i2c_target_addr contains the EEPROM
* device type qualifier 1010b in the top 4
* bits.
*/
- if (firmware_info->v34.ras_rom_i2c_slave_addr) {
+ if (firmware_info->v34.ras_rom_i2c_target_addr) {
if (i2c_address)
- *i2c_address =
firmware_info->v34.ras_rom_i2c_slave_addr;
+ *i2c_address =
firmware_info->v34.ras_rom_i2c_target_addr;
return true;
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c
index d79cb13e1aa8..070049c92e2b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c
@@ -280,7 +280,7 @@ amdgpu_i2c_lookup(struct amdgpu_device *adev,
}
static void amdgpu_i2c_get_byte(struct amdgpu_i2c_chan *i2c_bus,
-u8 slave_addr,
+u8 target_addr,
u8 addr,
u8 *val)
{
@@ -288,13 +288,13 @@ static void amdgpu_i2c_get_byte(struct amdgpu_i2c_chan
*i2c_bus,
u8 in_buf[2];
struct i2c_msg msgs[] = {
{
- .addr = slave_addr,
+ .addr = target_addr,
.flags = 0,
.len = 1,
.buf = out_buf,
},
{
- .addr = slave_addr,
+ .addr =
[PATCH v1 00/12] Make I2C terminology more inclusive for I2C Algobit and consumers
I2C v7, SMBus 3.2, and I3C 1.1.1 specifications have replaced "master/slave" with more appropriate terms. Inspired by and following on to Wolfram's series to fix drivers/i2c/[1], fix the terminology for users of the I2C_ALGOBIT bitbanging interface, now that the approved verbiage exists in the specification. Compile tested, no functionality changes intended Please chime in with your opinions and suggestions. This series is based on v6.9-rc1. [1]: https://lore.kernel.org/all/20240322132619.6389-1-wsa+rene...@sang-engineering.com/ changelog: v0->v1: - Link: https://lore.kernel.org/all/20240329170038.3863998-1-eahar...@linux.microsoft.com/ - Drop drivers/infiniband patches [Leon, Dennis] - Switch to specification verbiage master->controller, slave->target, drop usage of client [Andi, Ville, Jani, Christian] - Add I3C specification version in commit messages [Andi] - Pick up Reviewed-bys from Martin and Simon [sfc] - Drop i2c/treewide patch to make this series independent from Wolfram's ([1]) [Wolfram] - Split away drm/nouveau patch to allow expansion into non-I2C non-inclusive terms Easwar Hariharan (12): drm/amdgpu, drm/radeon: Make I2C terminology more inclusive drm/gma500: Make I2C terminology more inclusive drm/i915: Make I2C terminology more inclusive media: au0828: Make I2C terminology more inclusive media: cobalt: Make I2C terminology more inclusive media: cx18: Make I2C terminology more inclusive media: cx25821: Make I2C terminology more inclusive media: ivtv: Make I2C terminology more inclusive media: cx23885: Make I2C terminology more inclusive sfc: falcon: Make I2C terminology more inclusive fbdev/smscufx: Make I2C terminology more inclusive fbdev/viafb: Make I2C terminology more inclusive .../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 8 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c | 10 +++ drivers/gpu/drm/amd/amdgpu/atombios_i2c.c | 8 ++--- drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c| 20 ++--- .../gpu/drm/amd/display/dc/bios/bios_parser.c | 2 +- .../drm/amd/display/dc/bios/bios_parser2.c| 2 +- .../drm/amd/display/dc/core/dc_link_exports.c | 4 +-- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- drivers/gpu/drm/amd/display/dc/dce/dce_i2c.c | 4 +-- .../display/include/grph_object_ctrl_defs.h | 2 +- drivers/gpu/drm/amd/include/atombios.h| 2 +- drivers/gpu/drm/amd/include/atomfirmware.h| 26 .../powerplay/hwmgr/vega20_processpptables.c | 4 +-- .../amd/pm/powerplay/inc/smu11_driver_if.h| 2 +- .../inc/pmfw_if/smu11_driver_if_arcturus.h| 2 +- .../inc/pmfw_if/smu11_driver_if_navi10.h | 2 +- .../pmfw_if/smu11_driver_if_sienna_cichlid.h | 2 +- .../inc/pmfw_if/smu13_driver_if_aldebaran.h | 2 +- .../inc/pmfw_if/smu13_driver_if_v13_0_0.h | 2 +- .../inc/pmfw_if/smu13_driver_if_v13_0_7.h | 2 +- .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 4 +-- .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 8 ++--- drivers/gpu/drm/gma500/cdv_intel_lvds.c | 2 +- drivers/gpu/drm/gma500/intel_bios.c | 22 +++--- drivers/gpu/drm/gma500/intel_bios.h | 4 +-- drivers/gpu/drm/gma500/intel_gmbus.c | 2 +- drivers/gpu/drm/gma500/psb_drv.h | 2 +- drivers/gpu/drm/gma500/psb_intel_drv.h| 2 +- drivers/gpu/drm/gma500/psb_intel_lvds.c | 4 +-- drivers/gpu/drm/gma500/psb_intel_sdvo.c | 26 drivers/gpu/drm/i915/display/dvo_ch7017.c | 14 - drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 18 +-- drivers/gpu/drm/i915/display/dvo_ivch.c | 16 +- drivers/gpu/drm/i915/display/dvo_ns2501.c | 18 +-- drivers/gpu/drm/i915/display/dvo_sil164.c | 18 +-- drivers/gpu/drm/i915/display/dvo_tfp410.c | 18 +-- drivers/gpu/drm/i915/display/intel_bios.c | 22 +++--- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- .../gpu/drm/i915/display/intel_display_core.h | 2 +- drivers/gpu/drm/i915/display/intel_dsi.h | 2 +- drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 20 ++--- drivers/gpu/drm/i915/display/intel_dvo.c | 14 - drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +- drivers/gpu/drm/i915/display/intel_gmbus.c| 4 +-- drivers/gpu/drm/i915/display/intel_sdvo.c | 30 +-- drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 +-- drivers/gpu/drm/i915/gvt/edid.c | 28 - drivers/gpu/drm/i915/gvt/edid.h | 4 +-- drivers/gpu/drm/i915/gvt/opregion.c | 2 +- drivers/gpu/drm/radeon/atombios.h | 2 +- drivers/gpu/drm/radeon/atombios_i2c.c | 4 +-- drivers/gpu/drm/radeon/radeon_combios.c | 28 - drivers/gpu/drm/radeon/radeon_i2c.c | 10 +++ drivers/gpu/drm/radeon/radeon_mode.h | 6 ++-- drivers/media/pci/cobalt/cobalt-i2c.c
[PATCH v3 14/19] Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping"
From: Ankit Nautiyal
This reverts commit 562f33836f519a235e5c5e71bcc723ab1faccd2f.
For BMG it seems that the VBT to DDI mapping does not follow DG1, and
DG2, but follows ADLP mapping given in Bspec:20124.
Signed-off-by: Ankit Nautiyal
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_bios.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 661842a3c2e6..cf770c866d13 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2231,15 +2231,14 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8
vbt_pin)
const u8 *ddc_pin_map;
int i, n_entries;
- if (IS_DGFX(i915))
- return vbt_pin;
-
if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {
ddc_pin_map = adlp_ddc_pin_map;
n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
} else if (IS_ALDERLAKE_S(i915)) {
ddc_pin_map = adls_ddc_pin_map;
n_entries = ARRAY_SIZE(adls_ddc_pin_map);
+ } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
+ return vbt_pin;
} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
--
2.34.1
[PATCH v3 13/19] drm/i915/bmg: BMG should re-use MTL's south display logic
From: Matt Roper
Battlemage's south display is the same as Meteor Lake's, including the
need to invert the HPD pins, which Lunar Lake does not need.
Signed-off-by: Matt Roper
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Dnyaneshwar Bhadane
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/soc/intel_pch.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/soc/intel_pch.c
b/drivers/gpu/drm/i915/soc/intel_pch.c
index 3cad6dac06b0..542eea50093c 100644
--- a/drivers/gpu/drm/i915/soc/intel_pch.c
+++ b/drivers/gpu/drm/i915/soc/intel_pch.c
@@ -218,10 +218,10 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
if (DISPLAY_VER(dev_priv) >= 20) {
dev_priv->pch_type = PCH_LNL;
return;
- } else if (IS_METEORLAKE(dev_priv)) {
+ } else if (IS_BATTLEMAGE(dev_priv) || IS_METEORLAKE(dev_priv)) {
/*
* Both north display and south display are on the SoC die.
-* The real PCH is uninvolved in display.
+* The real PCH (if it even exists) is uninvolved in display.
*/
dev_priv->pch_type = PCH_MTL;
return;
--
2.34.1
[PATCH v3 15/19] drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5
From: Balasubramani Vivekanandan Max supported speed by xe2hpd is UHBR13.5. Limit the max DP source rate to it. Bspec: 67066 Signed-off-by: Balasubramani Vivekanandan Reviewed-by: Shekhar Chauhan Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_dp.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index e05e25cd4a94..486361eb0070 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -477,6 +477,9 @@ static int mtl_max_source_rate(struct intel_dp *intel_dp) if (intel_encoder_is_c10phy(encoder)) return 81; + if (DISPLAY_VER_FULL(to_i915(encoder->base.dev)) == IP_VER(14, 1)) + return 135; + return 200; } -- 2.34.1
[PATCH v3 17/19] drm/xe/device: implement transient flush
From: Nirmoy Das
Display surfaces can be tagged as transient by mapping it using one of
the various L3:XD PAT index modes on Xe2. The expectation is that KMD
needs to request transient data flush at the start of flip sequence to
ensure all transient data in L3 cache is flushed to memory. Add a
routine for this which we can then call from the display code.
v2: rebase(RK)
Signed-off-by: Nirmoy Das
Co-developed-by: Matthew Auld
Signed-off-by: Matthew Auld
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 ++
drivers/gpu/drm/xe/xe_device.c | 49
drivers/gpu/drm/xe/xe_device.h | 1 +
3 files changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 83847f2da72a..b4f1a3264e8c 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -334,6 +334,9 @@
#define XE2LPM_L3SQCREG5 XE_REG_MCR(0xb658)
+#define XE2_TDF_CTRL XE_REG(0xb418)
+#define TRANSIENT_FLUSH_REQUEST REG_BIT(0)
+
#define XEHP_MERT_MOD_CTRL XE_REG_MCR(0xcf28)
#define RENDER_MOD_CTRLXE_REG_MCR(0xcf2c)
#define COMP_MOD_CTRL XE_REG_MCR(0xcf30)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index b61f8356e23e..05c28314b748 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -719,6 +719,55 @@ void xe_device_wmb(struct xe_device *xe)
xe_mmio_write32(gt, SOFTWARE_FLAGS_SPR33, 0);
}
+/**
+ * xe_device_td_flush() - Flush transient L3 cache entries
+ * @xe: The device
+ *
+ * Display engine has direct access to memory and is never coherent with L3/L4
+ * caches (or CPU caches), however KMD is responsible for specifically flushing
+ * transient L3 GPU cache entries prior to the flip sequence to ensure scanout
+ * can happen from such a surface without seeing corruption.
+ *
+ * Display surfaces can be tagged as transient by mapping it using one of the
+ * various L3:XD PAT index modes on Xe2.
+ *
+ * Note: On non-discrete xe2 platforms, like LNL, the entire L3 cache is
flushed
+ * at the end of each submission via PIPE_CONTROL for compute/render, since SA
+ * Media is not coherent with L3 and we want to support render-vs-media
+ * usescases. For other engines like copy/blt the HW internally forces uncached
+ * behaviour, hence why we can skip the TDF on such platforms.
+ */
+void xe_device_td_flush(struct xe_device *xe)
+{
+ struct xe_gt *gt;
+ u8 id;
+
+ if (!IS_DGFX(xe) || GRAPHICS_VER(xe) < 20)
+ return;
+
+ for_each_gt(gt, xe, id) {
+ if (xe_gt_is_media_type(gt))
+ continue;
+
+ if (xe_force_wake_get(gt_to_fw(gt), XE_FW_GT))
+ return;
+
+ xe_mmio_write32(gt, XE2_TDF_CTRL, TRANSIENT_FLUSH_REQUEST);
+ /*
+* FIXME: We can likely do better here with our choice of
+* timeout. Currently we just assume the worst case, i.e. 150us,
+* which is believed to be sufficient to cover the worst case
+* scenario on current platforms if all cache entries are
+* transient and need to be flushed..
+*/
+ if (xe_mmio_wait32(gt, XE2_TDF_CTRL, TRANSIENT_FLUSH_REQUEST, 0,
+ 150, NULL, false))
+ xe_gt_err_once(gt, "TD flush timeout\n");
+
+ xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
+ }
+}
+
u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size)
{
return xe_device_has_flat_ccs(xe) ?
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 82317580f4bf..f2a78b6a9bff 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -173,5 +173,6 @@ static inline bool xe_device_wedged(struct xe_device *xe)
}
void xe_device_declare_wedged(struct xe_device *xe);
+void xe_device_td_flush(struct xe_device *xe);
#endif
--
2.34.1
[PATCH v3 19/19] drm/xe/bmg: Enable the display support
From: Balasubramani Vivekanandan
Enable the display support for Battlemage
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Shekhar Chauhan
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/xe/xe_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a0cf5dd803c2..b01b1d30976a 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -342,6 +342,7 @@ static const struct xe_device_desc lnl_desc = {
static const struct xe_device_desc bmg_desc __maybe_unused = {
DGFX_FEATURES,
PLATFORM(XE_BATTLEMAGE),
+ .has_display = true,
.require_force_probe = true,
};
--
2.34.1
[PATCH v3 12/19] drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits
From: José Roberto de Souza
No display IP beyond Xe_LPD+ has "BW credits" bits in MBUS_DBOX_CTL
register. Restrict the programming only to Xe_LPD+.
BSpec: 49213
CC: Matt Roper
Signed-off-by: José Roberto de Souza
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
b/drivers/gpu/drm/i915/display/skl_watermark.c
index 7c6187b4479f..be9a4712c54e 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3604,7 +3604,7 @@ static void intel_mbus_dbox_update(struct
intel_atomic_state *state)
for_each_intel_crtc_in_pipe_mask(>drm, crtc,
new_dbuf_state->active_pipes) {
u32 pipe_val = val;
- if (DISPLAY_VER(i915) >= 14) {
+ if (DISPLAY_VER_FULL(i915) == IP_VER(14, 0)) {
if (xelpdp_is_only_pipe_per_dbuf_bank(crtc->pipe,
new_dbuf_state->active_pipes))
pipe_val |= MBUS_DBOX_BW_8CREDITS_MTL;
--
2.34.1
[PATCH v3 11/19] drm/i915/xe2hpd: Add max memory bandwidth algorithm
From: Matt Roper
Unlike DG2, Xe2_HPD does support multiple GV points with different
maximum memory bandwidths, but uses a much simpler algorithm than igpu
platforms use.
Bspec: 64631
CC: Jani Nikula
Signed-off-by: Matt Roper
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_bw.c | 65 -
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/soc/intel_dram.c | 4 ++
drivers/gpu/drm/xe/xe_device_types.h| 1 +
4 files changed, 69 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index 972ea887e232..47036d4abb33 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -22,6 +22,8 @@ struct intel_qgv_point {
u16 dclk, t_rp, t_rdpre, t_rc, t_ras, t_rcd;
};
+#define DEPROGBWPCLIMIT60
+
struct intel_psf_gv_point {
u8 clk; /* clock in multiples of 16. MHz */
};
@@ -241,6 +243,9 @@ static int icl_get_qgv_points(struct drm_i915_private
*dev_priv,
qi->channel_width = 16;
qi->deinterleave = 4;
break;
+ case INTEL_DRAM_GDDR:
+ qi->channel_width = 32;
+ break;
default:
MISSING_CASE(dram_info->type);
return -EINVAL;
@@ -387,6 +392,12 @@ static const struct intel_sa_info mtl_sa_info = {
.derating = 10,
};
+static const struct intel_sa_info xe2_hpd_sa_info = {
+ .derating = 30,
+ .deprogbwlimit = 53,
+ /* Other values not used by simplified algorithm */
+};
+
static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct
intel_sa_info *sa)
{
struct intel_qgv_info qi = {};
@@ -493,7 +504,7 @@ static int tgl_get_bw_info(struct drm_i915_private
*dev_priv, const struct intel
dclk_max = icl_sagv_max_dclk();
peakbw = num_channels * DIV_ROUND_UP(qi.channel_width, 8) * dclk_max;
- maxdebw = min(sa->deprogbwlimit * 1000, peakbw * 6 / 10); /* 60% */
+ maxdebw = min(sa->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 100);
ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
/*
@@ -598,6 +609,54 @@ static void dg2_get_bw_info(struct drm_i915_private *i915)
i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED;
}
+static int xe2_hpd_get_bw_info(struct drm_i915_private *i915,
+ const struct intel_sa_info *sa)
+{
+ struct intel_qgv_info qi = {};
+ int num_channels = i915->dram_info.num_channels;
+ int peakbw, maxdebw;
+ int ret, i;
+
+ ret = icl_get_qgv_points(i915, , true);
+ if (ret) {
+ drm_dbg_kms(>drm,
+ "Failed to get memory subsystem information,
ignoring bandwidth limits");
+ return ret;
+ }
+
+ peakbw = num_channels * qi.channel_width / 8 * icl_sagv_max_dclk();
+ maxdebw = min(sa->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 10);
+
+ for (i = 0; i < qi.num_points; i++) {
+ const struct intel_qgv_point *point = [i];
+ int bw = num_channels * (qi.channel_width / 8) * point->dclk;
+
+ i915->display.bw.max[0].deratedbw[i] =
+ min(maxdebw, (100 - sa->derating) * bw / 100);
+ i915->display.bw.max[0].peakbw[i] = bw;
+
+ drm_dbg_kms(>drm, "QGV %d: deratedbw=%u peakbw: %u\n",
+ i, i915->display.bw.max[0].deratedbw[i],
+ i915->display.bw.max[0].peakbw[i]);
+ }
+
+ /* Bandwidth does not depend on # of planes; set all groups the same */
+ i915->display.bw.max[0].num_planes = 1;
+ i915->display.bw.max[0].num_qgv_points = qi.num_points;
+ for (i = 1; i < ARRAY_SIZE(i915->display.bw.max); i++)
+ memcpy(>display.bw.max[i], >display.bw.max[0],
+ sizeof(i915->display.bw.max[0]));
+
+ /*
+* Xe2_HPD should always have exactly two QGV points representing
+* battery and plugged-in operation.
+*/
+ drm_WARN_ON(>drm, qi.num_points != 2);
+ i915->display.sagv.status = I915_SAGV_ENABLED;
+
+ return 0;
+}
+
static unsigned int icl_max_bw_index(struct drm_i915_private *dev_priv,
int num_planes, int qgv_point)
{
@@ -684,7 +743,9 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv)
if (!HAS_DISPLAY(dev_priv))
return;
- if (DISPLAY_VER(dev_priv) >= 14)
+ if (DISPLAY_VER_FULL(dev_priv) >= IP_VER(14, 1) && IS_DGFX(dev_priv))
+ xe2_hpd_get_bw_info(dev_priv, _hpd_sa_info);
+ else if (DISPLAY_VER(dev_priv) >= 14)
tgl_get_bw_info(dev_priv, _sa_info);
else
[PATCH v3 08/19] drm/i915/xe2hpd: update pll values in sync with Bspec
From: Ravi Kumar Vodapalli
DP/eDP and HDMI pll values are updated for Xe2_HPD platform
v2: Removed the unsupported mtl_c20_dp_uhbr20 from xehpd_c20_dp_tables
Bspec: 74165
Signed-off-by: Ravi Kumar Vodapalli
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 46 +++-
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index d16aab31349f..368daf43382a 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -1087,6 +1087,41 @@ static const struct intel_c20pll_state * const
xe2hpd_c20_edp_tables[] = {
NULL,
};
+static const struct intel_c20pll_state xe2hpd_c20_dp_uhbr13_5 = {
+ .clock = 135, /* 13.5 Gbps */
+ .tx = { 0xbea0, /* tx cfg0 */
+ 0x4800, /* tx cfg1 */
+ 0x, /* tx cfg2 */
+ },
+ .cmn = {0x0500, /* cmn cfg0*/
+ 0x0005, /* cmn cfg1 */
+ 0x, /* cmn cfg2 */
+ 0x, /* cmn cfg3 */
+ },
+ .mpllb = { 0x015f, /* mpllb cfg0 */
+ 0x2205, /* mpllb cfg1 */
+ 0x1b17, /* mpllb cfg2 */
+ 0xffc1, /* mpllb cfg3 */
+ 0xbd00, /* mpllb cfg4 */
+ 0x9ec3, /* mpllb cfg5 */
+ 0x2000, /* mpllb cfg6 */
+ 0x0001, /* mpllb cfg7 */
+ 0x4800, /* mpllb cfg8 */
+ 0x, /* mpllb cfg9 */
+ 0x, /* mpllb cfg10 */
+ },
+};
+
+static const struct intel_c20pll_state * const xe2hpd_c20_dp_tables[] = {
+ _c20_dp_rbr,
+ _c20_dp_hbr1,
+ _c20_dp_hbr2,
+ _c20_dp_hbr3,
+ _c20_dp_uhbr10,
+ _c20_dp_uhbr13_5,
+ NULL,
+};
+
/*
* HDMI link rates with 38.4 MHz reference clock.
*/
@@ -2203,13 +2238,20 @@ static const struct intel_c20pll_state * const *
intel_c20_pll_tables_get(struct intel_crtc_state *crtc_state,
struct intel_encoder *encoder)
{
- if (intel_crtc_has_dp_encoder(crtc_state))
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ if (intel_crtc_has_dp_encoder(crtc_state)) {
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
return xe2hpd_c20_edp_tables;
+
+ if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1))
+ return xe2hpd_c20_dp_tables;
else
return mtl_c20_dp_tables;
- else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
+
+ } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
return mtl_c20_hdmi_tables;
+ }
MISSING_CASE(encoder->type);
return NULL;
--
2.34.1
[PATCH v3 09/19] drm/i915/xe2hpd: Add display info
From: Lucas De Marchi
Add initial display info for xe2hpd. It is similar to xelpdp, but with no
PORT_B.
v2: Inherit from XE_LPDP_FEATURES instead of XE_LPD_FEATURES
Bspec: 67066
CC: Matt Roper
Signed-off-by: Lucas De Marchi
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display_device.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
index 120e209ee74a..56a2e17d7d9e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -771,6 +771,12 @@ static const struct intel_display_device_info
xe2_lpd_display = {
BIT(INTEL_FBC_C) | BIT(INTEL_FBC_D),
};
+static const struct intel_display_device_info xe2_hpd_display = {
+ XE_LPDP_FEATURES,
+ .__runtime_defaults.port_mask = BIT(PORT_A) |
+ BIT(PORT_TC1) | BIT(PORT_TC2) | BIT(PORT_TC3) | BIT(PORT_TC4),
+};
+
__diag_pop();
/*
@@ -852,6 +858,7 @@ static const struct {
const struct intel_display_device_info *display;
} gmdid_display_map[] = {
{ 14, 0, _lpdp_display },
+ { 14, 1, _hpd_display },
{ 20, 0, _lpd_display },
};
--
2.34.1
[PATCH v3 07/19] drm/i915/xe2hpd: Add support for eDP PLL configuration
From: Balasubramani Vivekanandan
Tables for eDP PHY PLL configuration for different link rates added for
Xe2_HPD. Previous platforms were using C10 PHY for eDP port whereas
Xe2_HPD has C20 PHY.
v2: Updated with a more appropriate Bspec number.
Bspec: 74165
CC: Clint Taylor
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 147 ++-
1 file changed, 146 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 866b943311f1..d16aab31349f 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -945,6 +945,148 @@ static const struct intel_c20pll_state * const
mtl_c20_dp_tables[] = {
NULL,
};
+/*
+ * eDP link rates with 38.4 MHz reference clock.
+ */
+
+static const struct intel_c20pll_state xe2hpd_c20_edp_r216 = {
+ .clock = 216000,
+ .tx = { 0xbe88,
+ 0x4800,
+ 0x,
+ },
+ .cmn = { 0x0500,
+0x0005,
+0x,
+0x,
+ },
+ .mpllb = { 0x50e1,
+ 0x2120,
+ 0x8e18,
+ 0xbfc1,
+ 0x9000,
+ 0x78f6,
+ 0x,
+ 0x,
+ 0x,
+ 0x,
+ 0x,
+ },
+};
+
+static const struct intel_c20pll_state xe2hpd_c20_edp_r243 = {
+ .clock = 243000,
+ .tx = { 0xbe88,
+ 0x4800,
+ 0x,
+ },
+ .cmn = { 0x0500,
+0x0005,
+0x,
+0x,
+ },
+ .mpllb = { 0x50fd,
+ 0x2120,
+ 0x8f18,
+ 0xbfc1,
+ 0xa200,
+ 0x8814,
+ 0x2000,
+ 0x0001,
+ 0x1000,
+ 0x,
+ 0x,
+ },
+};
+
+static const struct intel_c20pll_state xe2hpd_c20_edp_r324 = {
+ .clock = 324000,
+ .tx = { 0xbe88,
+ 0x4800,
+ 0x,
+ },
+ .cmn = { 0x0500,
+0x0005,
+0x,
+0x,
+ },
+ .mpllb = { 0x30a8,
+ 0x2110,
+ 0xcd9a,
+ 0xbfc1,
+ 0x6c00,
+ 0x5ab8,
+ 0x2000,
+ 0x0001,
+ 0x6000,
+ 0x,
+ 0x,
+ },
+};
+
+static const struct intel_c20pll_state xe2hpd_c20_edp_r432 = {
+ .clock = 432000,
+ .tx = { 0xbe88,
+ 0x4800,
+ 0x,
+ },
+ .cmn = { 0x0500,
+0x0005,
+0x,
+0x,
+ },
+ .mpllb = { 0x30e1,
+ 0x2110,
+ 0x8e18,
+ 0xbfc1,
+ 0x9000,
+ 0x78f6,
+ 0x,
+ 0x,
+ 0x,
+ 0x,
+ 0x,
+ },
+};
+
+static const struct intel_c20pll_state xe2hpd_c20_edp_r675 = {
+ .clock = 675000,
+ .tx = { 0xbe88,
+ 0x4800,
+ 0x,
+ },
+ .cmn = { 0x0500,
+0x0005,
+0x,
+0x,
+ },
+ .mpllb = { 0x10af,
+ 0x2108,
+ 0xce1a,
+ 0xbfc1,
+ 0x7080,
+ 0x5e80,
+ 0x2000,
+ 0x0001,
+ 0x6400,
+ 0x,
+ 0x,
+ },
+};
+
+static const struct intel_c20pll_state * const xe2hpd_c20_edp_tables[] = {
+ _c20_dp_rbr,
+ _c20_edp_r216,
+ _c20_edp_r243,
+ _c20_dp_hbr1,
+ _c20_edp_r324,
+ _c20_edp_r432,
+ _c20_dp_hbr2,
+ _c20_edp_r675,
+ _c20_dp_hbr3,
+ NULL,
+};
+
/*
* HDMI link rates with 38.4 MHz reference clock.
*/
@@ -2062,7 +2204,10 @@ intel_c20_pll_tables_get(struct intel_crtc_state
*crtc_state,
struct intel_encoder *encoder)
{
if (intel_crtc_has_dp_encoder(crtc_state))
- return mtl_c20_dp_tables;
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
+ return xe2hpd_c20_edp_tables;
+ else
+ return mtl_c20_dp_tables;
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return mtl_c20_hdmi_tables;
--
2.34.1
[PATCH v3 16/19] drm/xe/gt_print: add xe_gt_err_once()
From: Matthew Auld Needed in an upcoming patch, where we want GT level print, but only which to trigger once to avoid flooding dmesg. Signed-off-by: Matthew Auld Signed-off-by: Balasubramani Vivekanandan Reviewed-by: Nirmoy Das Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/xe/xe_gt_printk.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_printk.h b/drivers/gpu/drm/xe/xe_gt_printk.h index c2b004d3f48e..d6228baaff1e 100644 --- a/drivers/gpu/drm/xe/xe_gt_printk.h +++ b/drivers/gpu/drm/xe/xe_gt_printk.h @@ -13,6 +13,9 @@ #define xe_gt_printk(_gt, _level, _fmt, ...) \ drm_##_level(_to_xe(_gt)->drm, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__) +#define xe_gt_err_once(_gt, _fmt, ...) \ + xe_gt_printk((_gt), err_once, _fmt, ##__VA_ARGS__) + #define xe_gt_err(_gt, _fmt, ...) \ xe_gt_printk((_gt), err, _fmt, ##__VA_ARGS__) -- 2.34.1
[PATCH v3 18/19] drm/i915/display: perform transient flush
From: Matthew Auld
Perform manual transient cache flush prior to flip and at the end of
frontbuffer_flush. This is needed to ensure display engine doesn't see
garbage if the surface is L3:XD dirty.
Testcase: igt@xe-pat@display-vs-wb-transient
Signed-off-by: Matthew Auld
Signed-off-by: Balasubramani Vivekanandan
Acked-by: Nirmoy Das
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display.c | 3 +++
.../gpu/drm/i915/display/intel_frontbuffer.c | 2 ++
drivers/gpu/drm/i915/display/intel_tdf.h | 25 +++
drivers/gpu/drm/xe/Makefile | 3 ++-
drivers/gpu/drm/xe/display/xe_tdf.c | 13 ++
5 files changed, 45 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_tdf.h
create mode 100644 drivers/gpu/drm/xe/display/xe_tdf.c
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 00e583fc2a8c..294539b4ca99 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -109,6 +109,7 @@
#include "intel_sdvo.h"
#include "intel_snps_phy.h"
#include "intel_tc.h"
+#include "intel_tdf.h"
#include "intel_tv.h"
#include "intel_vblank.h"
#include "intel_vdsc.h"
@@ -7225,6 +7226,8 @@ static void intel_atomic_commit_tail(struct
intel_atomic_state *state)
intel_atomic_commit_fence_wait(state);
+ intel_td_flush(dev_priv);
+
drm_atomic_helper_wait_for_dependencies(>base);
drm_dp_mst_atomic_wait_for_dependencies(>base);
intel_atomic_global_state_wait_for_dependencies(state);
diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 2ea37c0414a9..4923c340a0b6 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -65,6 +65,7 @@
#include "intel_fbc.h"
#include "intel_frontbuffer.h"
#include "intel_psr.h"
+#include "intel_tdf.h"
/**
* frontbuffer_flush - flush frontbuffer
@@ -93,6 +94,7 @@ static void frontbuffer_flush(struct drm_i915_private *i915,
trace_intel_frontbuffer_flush(i915, frontbuffer_bits, origin);
might_sleep();
+ intel_td_flush(i915);
intel_drrs_flush(i915, frontbuffer_bits);
intel_psr_flush(i915, frontbuffer_bits, origin);
intel_fbc_flush(i915, frontbuffer_bits, origin);
diff --git a/drivers/gpu/drm/i915/display/intel_tdf.h
b/drivers/gpu/drm/i915/display/intel_tdf.h
new file mode 100644
index ..353cde21f6c2
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_tdf.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef __INTEL_TDF_H__
+#define __INTEL_TDF_H__
+
+/*
+ * TDF (Transient-Data-Flush) is needed for Xe2+ where special L3:XD caching
can
+ * be enabled through various PAT index modes. Idea is to use this caching mode
+ * when for example rendering onto the display surface, with the promise that
+ * KMD will ensure transient cache entries are always flushed by the time we do
+ * the display flip, since display engine is never coherent with CPU/GPU
caches.
+ */
+
+struct drm_i915_private;
+
+#ifdef I915
+static inline void intel_td_flush(struct drm_i915_private *i915) {}
+#else
+void intel_td_flush(struct drm_i915_private *i915);
+#endif
+
+#endif
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index a67977edff5b..b620389761d5 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -206,7 +206,8 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/xe_dsb_buffer.o \
display/xe_fb_pin.o \
display/xe_hdcp_gsc.o \
- display/xe_plane_initial.o
+ display/xe_plane_initial.o \
+ display/xe_tdf.o
# SOC code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
diff --git a/drivers/gpu/drm/xe/display/xe_tdf.c
b/drivers/gpu/drm/xe/display/xe_tdf.c
new file mode 100644
index ..2c0d4e144e09
--- /dev/null
+++ b/drivers/gpu/drm/xe/display/xe_tdf.c
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "intel_display_types.h"
+#include "intel_tdf.h"
+
+void intel_td_flush(struct drm_i915_private *i915)
+{
+ xe_device_td_flush(i915);
+}
--
2.34.1
[PATCH v3 05/19] drm/i915/xe2hpd: Properly disable power in port A
From: José Roberto de Souza
Xe2_HPD has a different value to power down port A.
BSpec: 65450
Signed-off-by: José Roberto de Souza
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 9930fa7313e4..2fee024d642b 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2900,17 +2900,28 @@ void intel_mtl_pll_enable(struct intel_encoder *encoder,
intel_cx0pll_enable(encoder, crtc_state);
}
+static u8 cx0_power_control_disable_val(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ if (intel_encoder_is_c10phy(encoder))
+ return CX0_P2PG_STATE_DISABLE;
+
+ if (IS_BATTLEMAGE(i915) && encoder->port == PORT_A)
+ return CX0_P2PG_STATE_DISABLE;
+
+ return CX0_P4PG_STATE_DISABLE;
+}
+
static void intel_cx0pll_disable(struct intel_encoder *encoder)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
enum phy phy = intel_encoder_to_phy(encoder);
- bool is_c10 = intel_encoder_is_c10phy(encoder);
intel_wakeref_t wakeref = intel_cx0_phy_transaction_begin(encoder);
/* 1. Change owned PHY lane power to Disable state. */
intel_cx0_powerdown_change_sequence(encoder, INTEL_CX0_BOTH_LANES,
- is_c10 ? CX0_P2PG_STATE_DISABLE :
- CX0_P4PG_STATE_DISABLE);
+
cx0_power_control_disable_val(encoder));
/*
* 2. Follow the Display Voltage Frequency Switching Sequence Before
--
2.34.1
[PATCH v3 00/19] Enable display support for Battlemage
Adds display support for Battlemage. v4: * Dropped patch "drm/i915/xe2hpd: Skip CCS modifiers" as there is already a patch merged taking care of this fix. * Dropped patch "drm/i915/display: Enable RM timeout detection" as it is not really a BMG enablement patch. Will be posted as a separate series. * Macros renamed and rearranged to match the existing style in the file for patch "Add new C20 PHY SRAM address" v3: * use s/XE_LPDP_FEATURES/XE_LPD_FEATURE as base for BMG display info structure * Limit "BW Credits" programming only to xelpdp * Removed UHBR20 support * Commit description improved for patch - "Skip CCS modifiers for Xe2 platforms" * Still retained the patch "Enable RM timeout detection" in this series hoping there are no further comments and could be merged with this series. * Removed the check where RM timeout interrupt was enabled only for xe2hpd * Redesigned how the right C20 PHY offsets are selected for different display IP versions v2: Rebased on latest drm-tip v3: Rebase and fix a white space error(RK) Ankit Nautiyal (1): Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" Anusha Srivatsa (1): drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes Balasubramani Vivekanandan (5): drm/i915/bmg: Define IS_BATTLEMAGE macro drm/i915/xe2hpd: Add new C20 PHY SRAM address drm/i915/xe2hpd: Add support for eDP PLL configuration drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5 drm/xe/bmg: Enable the display support Clint Taylor (2): drm/i915/bmg: Lane reversal requires writes to both context lanes drm/i915/xe2hpd: Initial cdclk table José Roberto de Souza (2): drm/i915/xe2hpd: Properly disable power in port A drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits Lucas De Marchi (1): drm/i915/xe2hpd: Add display info Matt Roper (2): drm/i915/xe2hpd: Add max memory bandwidth algorithm drm/i915/bmg: BMG should re-use MTL's south display logic Matthew Auld (2): drm/xe/gt_print: add xe_gt_err_once() drm/i915/display: perform transient flush Nirmoy Das (1): drm/xe/device: implement transient flush Radhakrishna Sripada (1): drm/i915/bmg: Extend DG2 tc check to future Ravi Kumar Vodapalli (1): drm/i915/xe2hpd: update pll values in sync with Bspec drivers/gpu/drm/i915/display/intel_bios.c | 5 +- drivers/gpu/drm/i915/display/intel_bw.c | 65 +++- drivers/gpu/drm/i915/display/intel_cdclk.c| 11 + drivers/gpu/drm/i915/display/intel_cx0_phy.c | 285 +++--- .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 48 ++- drivers/gpu/drm/i915/display/intel_display.c | 10 +- .../drm/i915/display/intel_display_device.c | 7 + .../drm/i915/display/intel_display_power.c| 4 + drivers/gpu/drm/i915/display/intel_dp.c | 3 + .../gpu/drm/i915/display/intel_frontbuffer.c | 2 + drivers/gpu/drm/i915/display/intel_tdf.h | 25 ++ drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 11 +- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/soc/intel_dram.c | 4 + drivers/gpu/drm/i915/soc/intel_pch.c | 4 +- drivers/gpu/drm/xe/Makefile | 3 +- drivers/gpu/drm/xe/display/xe_tdf.c | 13 + drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 + drivers/gpu/drm/xe/xe_device.c| 49 +++ drivers/gpu/drm/xe/xe_device.h| 1 + drivers/gpu/drm/xe/xe_device_types.h | 1 + drivers/gpu/drm/xe/xe_gt_printk.h | 3 + drivers/gpu/drm/xe/xe_pci.c | 1 + 24 files changed, 504 insertions(+), 57 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_tdf.h create mode 100644 drivers/gpu/drm/xe/display/xe_tdf.c -- 2.34.1
[PATCH v3 10/19] drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes
From: Anusha Srivatsa Add step 9 from initialize display sequence. v2: Commit subject improved Bpsec: 49189 Signed-off-by: Anusha Srivatsa Signed-off-by: Balasubramani Vivekanandan Reviewed-by: Matt Roper Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_display_power.c | 4 drivers/gpu/drm/i915/i915_reg.h| 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 03dc7edcc443..a860d88a65da 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -1688,6 +1688,10 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, if (IS_DG2(dev_priv)) intel_snps_phy_wait_for_calibration(dev_priv); + /* 9. XE2_HPD: Program CHICKEN_MISC_2 before any cursor or planes are enabled */ + if (DISPLAY_VER_FULL(dev_priv) == IP_VER(14, 1)) + intel_de_rmw(dev_priv, CHICKEN_MISC_2, BMG_DARB_HALF_BLK_END_BURST, 1); + if (resume) intel_dmc_load_program(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index beed2b97d4b2..962c1b307bde 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3792,6 +3792,7 @@ #define CHICKEN_MISC_2 _MMIO(0x42084) #define CHICKEN_MISC_DISABLE_DPT REG_BIT(30) /* adl,dg2 */ +#define BMG_DARB_HALF_BLK_END_BURST REG_BIT(27) #define KBL_ARB_FILL_SPARE_14REG_BIT(14) #define KBL_ARB_FILL_SPARE_13REG_BIT(13) #define GLK_CL2_PWR_DOWN REG_BIT(12) -- 2.34.1
[PATCH v3 06/19] drm/i915/xe2hpd: Add new C20 PHY SRAM address
From: Balasubramani Vivekanandan
Xe2_HPD has different offsets for C20 PHY SRAM configuration context
location. Use the display version to select the right address.
Note that Xe2_LPD uses the same C20 SRAM offsets used by Xe_LPDP (i.e.
MTL's display). According to the BSpec, currently, only Xe2_HPD has
different offsets, so make sure it is the only display using them in the
driver.
v2:
* Redesigned how the right offsets are selected for different display
IP versions.
v3: Fix white space error(RK)
Bspec: 67610
Cc: Clint Taylor
Cc: Gustavo Sousa
Cc: Jani Nikula
Signed-off-by: Balasubramani Vivekanandan
Signed-off-by: Lucas De Marchi
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 65 ---
.../gpu/drm/i915/display/intel_cx0_phy_regs.h | 48 +++---
2 files changed, 81 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 2fee024d642b..866b943311f1 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2161,6 +2161,7 @@ static void intel_c20pll_readout_hw_state(struct
intel_encoder *encoder,
bool cntx;
intel_wakeref_t wakeref;
int i;
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
wakeref = intel_cx0_phy_transaction_begin(encoder);
@@ -2170,42 +2171,50 @@ static void intel_c20pll_readout_hw_state(struct
intel_encoder *encoder,
/* Read Tx configuration */
for (i = 0; i < ARRAY_SIZE(pll_state->tx); i++) {
if (cntx)
- pll_state->tx[i] = intel_c20_sram_read(encoder,
INTEL_CX0_LANE0,
-
PHY_C20_B_TX_CNTX_CFG(i));
+ pll_state->tx[i] = intel_c20_sram_read(encoder,
+ INTEL_CX0_LANE0,
+
PHY_C20_B_TX_CNTX_CFG(i915, i));
else
- pll_state->tx[i] = intel_c20_sram_read(encoder,
INTEL_CX0_LANE0,
-
PHY_C20_A_TX_CNTX_CFG(i));
+ pll_state->tx[i] = intel_c20_sram_read(encoder,
+ INTEL_CX0_LANE0,
+
PHY_C20_A_TX_CNTX_CFG(i915, i));
}
/* Read common configuration */
for (i = 0; i < ARRAY_SIZE(pll_state->cmn); i++) {
if (cntx)
- pll_state->cmn[i] = intel_c20_sram_read(encoder,
INTEL_CX0_LANE0,
-
PHY_C20_B_CMN_CNTX_CFG(i));
+ pll_state->cmn[i] = intel_c20_sram_read(encoder,
+ INTEL_CX0_LANE0,
+
PHY_C20_B_CMN_CNTX_CFG(i915, i));
else
- pll_state->cmn[i] = intel_c20_sram_read(encoder,
INTEL_CX0_LANE0,
-
PHY_C20_A_CMN_CNTX_CFG(i));
+ pll_state->cmn[i] = intel_c20_sram_read(encoder,
+ INTEL_CX0_LANE0,
+
PHY_C20_A_CMN_CNTX_CFG(i915, i));
}
if (intel_c20phy_use_mpllb(pll_state)) {
/* MPLLB configuration */
for (i = 0; i < ARRAY_SIZE(pll_state->mpllb); i++) {
if (cntx)
- pll_state->mpllb[i] =
intel_c20_sram_read(encoder, INTEL_CX0_LANE0,
-
PHY_C20_B_MPLLB_CNTX_CFG(i));
+ pll_state->mpllb[i] =
intel_c20_sram_read(encoder,
+
INTEL_CX0_LANE0,
+
PHY_C20_B_MPLLB_CNTX_CFG(i915, i));
else
- pll_state->mpllb[i] =
intel_c20_sram_read(encoder, INTEL_CX0_LANE0,
-
PHY_C20_A_MPLLB_CNTX_CFG(i));
+ pll_state->mpllb[i] =
intel_c20_sram_read(encoder,
+
INTEL_CX0_LANE0,
+
PHY_C20_A_MPLLB_CNTX_CFG(i915, i));
}
} else {
/* MPLLA configuration */
for (i = 0; i < ARRAY_SIZE(pll_state->mplla); i++) {
if (cntx)
-
[PATCH v3 02/19] drm/i915/bmg: Define IS_BATTLEMAGE macro
From: Balasubramani Vivekanandan Display code uses IS_BATTLEMAGE macro but the platform support doesn't exist in i915. So fake IS_BATTLEMAGE macro defined to enable building i915 code. We should make sure the macro parameter is used in the always-false expression so that we don't run into "unused variable" warnings from i915 builds if the IS_BATTLEMAGE() check is the only place the i915 pointer gets used in a function. While we're at it, also update the IS_LUNARLAKE macro to include the parameter in the false expression for consistency. Signed-off-by: Balasubramani Vivekanandan Reviewed-by: Matt Roper Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/i915_drv.h | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ee0d7d5f135d..481ddce038b2 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -535,7 +535,15 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_ALDERLAKE_P(i915) IS_PLATFORM(i915, INTEL_ALDERLAKE_P) #define IS_DG2(i915) IS_PLATFORM(i915, INTEL_DG2) #define IS_METEORLAKE(i915) IS_PLATFORM(i915, INTEL_METEORLAKE) -#define IS_LUNARLAKE(i915) 0 +/* + * Display code shared by i915 and Xe relies on macros like IS_LUNARLAKE, + * so we need to define these even on platforms that the i915 base driver + * doesn't support. Ensure the parameter is used in the definition to + * avoid 'unused variable' warnings when compiling the shared display code + * for i915. + */ +#define IS_LUNARLAKE(i915) (0 && i915) +#define IS_BATTLEMAGE(i915) (0 && i915) #define IS_DG2_G10(i915) \ IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10) -- 2.34.1
[PATCH v3 01/19] drm/i915/bmg: Lane reversal requires writes to both context lanes
From: Clint Taylor
Write both CX0 Lanes for Context Toggle for all except TC pin assignment D.
v2: Update title(RK)
Bspec: 64539
CC: Jani Nikula
Signed-off-by: Clint Taylor
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 8e3b13884bb8..9930fa7313e4 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2337,7 +2337,7 @@ static void intel_c20_pll_program(struct drm_i915_private
*i915,
{
const struct intel_c20pll_state *pll_state =
_state->dpll_hw_state.cx0pll.c20;
bool dp = false;
- int lane = crtc_state->lane_count > 2 ? INTEL_CX0_BOTH_LANES :
INTEL_CX0_LANE0;
+ u8 owned_lane_mask = intel_cx0_get_owned_lane_mask(encoder);
u32 clock = crtc_state->port_clock;
bool cntx;
int i;
@@ -2402,19 +2402,19 @@ static void intel_c20_pll_program(struct
drm_i915_private *i915,
}
/* 4. Program custom width to match the link protocol */
- intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_WIDTH,
+ intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_WIDTH,
PHY_C20_CUSTOM_WIDTH_MASK,
PHY_C20_CUSTOM_WIDTH(intel_get_c20_custom_width(clock,
dp)),
MB_WRITE_COMMITTED);
/* 5. For DP or 6. For HDMI */
if (dp) {
- intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,
+ intel_cx0_rmw(encoder, owned_lane_mask,
PHY_C20_VDR_CUSTOM_SERDES_RATE,
BIT(6) | PHY_C20_CUSTOM_SERDES_MASK,
BIT(6) |
PHY_C20_CUSTOM_SERDES(intel_c20_get_dp_rate(clock)),
MB_WRITE_COMMITTED);
} else {
- intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,
+ intel_cx0_rmw(encoder, owned_lane_mask,
PHY_C20_VDR_CUSTOM_SERDES_RATE,
BIT(7) | PHY_C20_CUSTOM_SERDES_MASK,
is_hdmi_frl(clock) ? BIT(7) : 0,
MB_WRITE_COMMITTED);
@@ -2428,7 +2428,7 @@ static void intel_c20_pll_program(struct drm_i915_private
*i915,
* 7. Write Vendor specific registers to toggle context setting to load
* the updated programming toggle context bit
*/
- intel_cx0_rmw(encoder, lane, PHY_C20_VDR_CUSTOM_SERDES_RATE,
+ intel_cx0_rmw(encoder, owned_lane_mask, PHY_C20_VDR_CUSTOM_SERDES_RATE,
BIT(0), cntx ? 0 : 1, MB_WRITE_COMMITTED);
}
--
2.34.1
[PATCH v3 03/19] drm/i915/xe2hpd: Initial cdclk table
From: Clint Taylor
Add Xe2_HPD specific CDCLK table and use MTL Funcs.
Bspec: 65243
CC: Lucas De Marchi
Signed-off-by: Clint Taylor
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 7a833b5f2de2..b78154c82a71 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1443,6 +1443,14 @@ static const struct intel_cdclk_vals
xe2lpd_cdclk_table[] = {
{}
};
+/*
+ * Xe2_HPD always uses the minimal cdclk table from Wa_15015413771
+ */
+static const struct intel_cdclk_vals xe2hpd_cdclk_table[] = {
+ { .refclk = 38400, .cdclk = 652800, .ratio = 34, .waveform = 0x },
+ {}
+};
+
static const int cdclk_squash_len = 16;
static int cdclk_squash_divider(u16 waveform)
@@ -3778,6 +3786,9 @@ void intel_init_cdclk_hooks(struct drm_i915_private
*dev_priv)
if (DISPLAY_VER(dev_priv) >= 20) {
dev_priv->display.funcs.cdclk = _cdclk_funcs;
dev_priv->display.cdclk.table = xe2lpd_cdclk_table;
+ } else if (DISPLAY_VER_FULL(dev_priv) >= IP_VER(14, 1)) {
+ dev_priv->display.funcs.cdclk = _cdclk_funcs;
+ dev_priv->display.cdclk.table = xe2hpd_cdclk_table;
} else if (DISPLAY_VER(dev_priv) >= 14) {
dev_priv->display.funcs.cdclk = _cdclk_funcs;
dev_priv->display.cdclk.table = mtl_cdclk_table;
--
2.34.1
[PATCH v3 04/19] drm/i915/bmg: Extend DG2 tc check to future
Discrete cards use the Port numbers TC1-4 for the offsets. The regular
flow for type-c subsystem port initialization can be skipped. This check
is present in DG2. Extend this to future discrete products.
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Balasubramani Vivekanandan
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index f45e5f02096d..00e583fc2a8c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1893,11 +1893,10 @@ bool intel_phy_is_combo(struct drm_i915_private
*dev_priv, enum phy phy)
bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
{
/*
-* DG2's "TC1", although TC-capable output, doesn't share the same flow
-* as other platforms on the display engine side and rather rely on the
-* SNPS PHY, that is programmed separately
+* Discrete GPU phy's are not attached to FIA's to support TC
+* subsystem Legacy or non-legacy, and only support native DP/HDMI
*/
- if (IS_DG2(dev_priv))
+ if (IS_DGFX(dev_priv))
return false;
if (DISPLAY_VER(dev_priv) >= 13)
--
2.34.1
[PATCH] drm/i915/guc: avoid FIELD_PREP warning
From: Arnd Bergmann
With gcc-7 and earlier, there are lots of warnings like
In file included from :0:0:
In function '__guc_context_policy_add_priority.isra.66',
inlined from '__guc_context_set_prio.isra.67' at
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3292:3,
inlined from 'guc_context_set_prio' at
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:3320:2:
include/linux/compiler_types.h:399:38: error: call to
'__compiletime_assert_631' declared with attribute error: FIELD_PREP: mask is
not constant
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
^
...
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:2422:3: note: in expansion of
macro 'FIELD_PREP'
FIELD_PREP(GUC_KLV_0_KEY, GUC_CONTEXT_POLICIES_KLV_ID_##id) | \
^~
Make sure that GUC_KLV_0_KEY is an unsigned value to avoid the warning.
Fixes: 77b6f79df66e ("drm/i915/guc: Update to GuC version 69.0.3")
Signed-off-by: Arnd Bergmann
Reviewed-by: Michal Wajdeczko
Signed-off-by: Julia Filipchuk
---
Resubmit of a previous patch that was reviewed but never merged.
Patch resolves warnings on some older GCC versions of failed
constant propagation. Issue has been reported again; hoping to
resolve.
Previous Unmerged Patch:
https://patchwork.freedesktop.org/series/114145/
Reported Issue:
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10821
drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
index bebf28e3c479..525587cfe1af 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
@@ -29,9 +29,9 @@
*/
#define GUC_KLV_LEN_MIN1u
-#define GUC_KLV_0_KEY (0x << 16)
-#define GUC_KLV_0_LEN (0x << 0)
-#define GUC_KLV_n_VALUE(0x << 0)
+#define GUC_KLV_0_KEY (0xu << 16)
+#define GUC_KLV_0_LEN (0xu << 0)
+#define GUC_KLV_n_VALUE(0xu << 0)
/**
* DOC: GuC Self Config KLVs
--
2.43.2
✓ Fi.CI.BAT: success for drm/i915: fix missing linux/debugfs.h includes
== Series Details ==
Series: drm/i915: fix missing linux/debugfs.h includes
URL : https://patchwork.freedesktop.org/series/133075/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14682 -> Patchwork_133075v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/index.html
Participating hosts (40 -> 35)
--
Additional (1): fi-kbl-8809g
Missing(6): bat-kbl-2 fi-apl-guc fi-snb-2520m fi-elk-e7500 bat-mtlp-8
bat-arls-3
Known issues
Here are the changes found in Patchwork_133075v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][1] ([i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-8809g: NOTRUN -> [SKIP][2] ([i915#4613]) +3 other tests skip
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/fi-kbl-8809g/igt@gem_lmem_swapp...@basic.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-kbl-8809g: NOTRUN -> [SKIP][3] +30 other tests skip
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/fi-kbl-8809g/igt@kms_force_connector_ba...@force-load-detect.html
Possible fixes
* igt@i915_pm_rpm@module-reload:
- {bat-mtlp-9}: [CRASH][4] ([i915#10911]) -> [PASS][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14682/bat-mtlp-9/igt@i915_pm_...@module-reload.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/bat-mtlp-9/igt@i915_pm_...@module-reload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10911]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10911
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
Build changes
-
* Linux: CI_DRM_14682 -> Patchwork_133075v1
CI-20190529: 20190529
CI_DRM_14682: 016b4f46551e7a9b3da9607e546b18df2ca31cbc @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7826: ce6ce0f60dd1a6c0df93a01ad71a31964158a2cf @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_133075v1: 016b4f46551e7a9b3da9607e546b18df2ca31cbc @
git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133075v1/index.html
Re: [PATCH] drm/i915: fix missing linux/debugfs.h includes
On 4/30/24 16:53, Jani Nikula wrote:
On Tue, 30 Apr 2024, Danilo Krummrich wrote:
After dropping linux/debugfs.h include from drm/drm_print.h the following
files in i915 miss the linux/debugfs.h include: i915_debugfs.c,
i915_debugfs_params.c and i915_gpu_error.c.
Add the include to fix the corresponding build errors.
Reported-by: kernel test robot
Fixes: 33d5ae6cacf4 ("drm/print: drop include debugfs.h and include where
needed")
Closes:
https://lore.kernel.org/oe-kbuild-all/202404260726.nyguvl59-...@intel.com/
Signed-off-by: Danilo Krummrich
Thanks, but it's already fixed by commit 7fa043eafdb7 ("drm/i915: fix
build with missing debugfs includes") in drm-next.
Even better, note that drm-misc-next is still broken though.
- Danilo
BR,
Jani.
---
drivers/gpu/drm/i915/i915_debugfs.c| 1 +
drivers/gpu/drm/i915/i915_debugfs_params.c | 1 +
drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 24c78873b3cf..b552e27cdcd5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -26,6 +26,7 @@
*
*/
+#include
#include
#include
#include
diff --git a/drivers/gpu/drm/i915/i915_debugfs_params.c
b/drivers/gpu/drm/i915/i915_debugfs_params.c
index 8bca02025e09..295486b8ceb1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs_params.c
+++ b/drivers/gpu/drm/i915/i915_debugfs_params.c
@@ -3,6 +3,7 @@
* Copyright © 2019 Intel Corporation
*/
+#include
#include
#include "i915_debugfs_params.h"
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 2594eb10c559..625b3c024540 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -28,6 +28,7 @@
*/
#include
+#include
#include
#include
#include
base-commit: 4a9a567ab101e659a4fafb7a691ff6b84531a10a
✗ Fi.CI.CHECKPATCH: warning for drm/i915: fix missing linux/debugfs.h includes
== Series Details ==
Series: drm/i915: fix missing linux/debugfs.h includes
URL : https://patchwork.freedesktop.org/series/133075/
State : warning
== Summary ==
Error: dim checkpatch failed
20b2bfeb6ee9 drm/i915: fix missing linux/debugfs.h includes
-:12: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed
by Closes: with a URL to the report
#12:
Reported-by: kernel test robot
Fixes: 33d5ae6cacf4 ("drm/print: drop include debugfs.h and include where
needed")
total: 0 errors, 1 warnings, 0 checks, 14 lines checked
[PATCH v8 20/35] dyndbg-doc: add classmap info to howto
Describe the 3 API macros providing dynamic_debug's classmaps DYNDBG_CLASSMAP_DEFINE - create, exports a module's classmap DYNDBG_CLASSMAP_USE- refer to exported map DYNDBG_CLASSMAP_PARAM - bind control param to the classmap DYNDBG_CLASSMAP_PARAM_REF + use module's storage - __drm_debug cc: linux-...@vger.kernel.org Signed-off-by: Jim Cromie --- v5 adjustments per Randy Dunlap v7 checkpatch fixes v8 more --- .../admin-guide/dynamic-debug-howto.rst | 63 ++- 1 file changed, 62 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 6a8ce5a34382..742eb4230c6e 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -225,7 +225,6 @@ the ``p`` flag has meaning, other flags are ignored. Note the regexp ``^[-+=][fslmpt_]+$`` matches a flags specification. To clear all flags at once, use ``=_`` or ``-fslmpt``. - Debug messages during Boot Process == @@ -375,3 +374,65 @@ just a shortcut for ``print_hex_dump(KERN_DEBUG)``. For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is its ``prefix_str`` argument, if it is constant string; or ``hexdump`` in case ``prefix_str`` is built dynamically. + +Dynamic Debug classmaps +=== + +Dyndbg allows selection/grouping of *prdbg* callsites using structural +info: module, file, function, line. Classmaps allow authors to add +their own domain-oriented groupings using class-names. Classmaps are +exported, so they referencable from other modules. + + # enable classes individually + :#> ddcmd class DRM_UT_CORE +p + :#> ddcmd class DRM_UT_KMS +p + # or more selectively + :#> ddcmd class DRM_UT_CORE module drm +p + +The "class FOO" syntax protects class'd prdbgs from generic overwrite:: + + # IOW this doesn't wipe any DRM.debug settings + :#> ddcmd -p + +To support the DRM.debug parameter, DYNDBG_CLASSMAP_PARAM* updates all +classes in a classmap, mapping param-bits 0..N onto the classes: +DRM_UT_<*> for the DRM use-case. + +Dynamic Debug Classmap API +== + +DYNDBG_CLASSMAP_DEFINE - modules use this to create classmaps, naming +each of the classes (stringified enum-symbols: "DRM_UT_<*>"), and +type, and mapping the class-names to consecutive _class_ids. + +By doing so, modules tell dyndbg that they have prdbgs with those +class_ids, and they authorize dyndbg to accept "class FOO" for the +module defining the classmap, and its contained classnames. + +DYNDBG_CLASSMAP_USE - drm drivers invoke this to ref the CLASSMAP that +drm DEFINEs. This shares the classmap definition, and authorizes +dyndbg to apply changes to the user module's class'd pr_debugs. It +also tells dyndbg how to initialize the user's prdbgs at modprobe, +based upon the current setting of the parent's controlling param. + +There are 2 types of classmaps: + + DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, like DRM.debug + DD_CLASS_TYPE_LEVEL_NUM: classes are relative, ordered (V3 > V2) + +DYNDBG_CLASSMAP_PARAM - modelled after module_param_cb, it refers to a +DEFINEd classmap, and associates it to the param's data-store. This +state is then applied to DEFINEr and USEr modules when they're modprobed. + +This interface also enforces the DD_CLASS_TYPE_LEVEL_NUM relation +amongst the contained classnames; all classes are independent in the +control parser itself. + +Modules or module-groups (drm & drivers) can define multiple +classmaps, as long as they share the limited 0..62 per-module-group +_class_id range, without overlap. + +``#define DEBUG`` will enable all pr_debugs in scope, including any +class'd ones. This won't be reflected in the PARAM readback value, +but the class'd pr_debug callsites can be forced off by toggling the +classmap-kparam all-on then all-off. -- 2.44.0
[PATCH v8 21/35] dyndbg: treat comma as a token separator
Treat comma as a token terminator, just like a space. This allows a
user to avoid quoting hassles when spaces are otherwise needed:
:#> modprobe drm dyndbg=class,DRM_UT_CORE,+p\;class,DRM_UT_KMS,+p
or as a boot arg:
drm.dyndbg=class,DRM_UT_CORE,+p # todo: support multi-query here
Given the many ways a boot-line +args can be assembled and then passed
in/down/around shell based tools, this may allow side-stepping all
sorts of quoting hassles thru those layers.
existing query format:
modprobe test_dynamic_debug dyndbg="class D2_CORE +p"
new format:
modprobe test_dynamic_debug dyndbg=class,D2_CORE,+p
Signed-off-by: Jim Cromie
Co-developed-by: Łukasz Bartosik
Signed-off-by: Łukasz Bartosik
---
lib/dynamic_debug.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 31fd67597928..c1bc728cb050 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -290,6 +290,14 @@ static int ddebug_change(const struct ddebug_query *query,
return nfound;
}
+static char *skip_spaces_and_commas(const char *str)
+{
+ str = skip_spaces(str);
+ while (*str == ',')
+ str = skip_spaces(++str);
+ return (char *)str;
+}
+
/*
* Split the buffer `buf' into space-separated words.
* Handles simple " and ' quoting, i.e. without nested,
@@ -303,8 +311,8 @@ static int ddebug_tokenize(char *buf, char *words[], int
maxwords)
while (*buf) {
char *end;
- /* Skip leading whitespace */
- buf = skip_spaces(buf);
+ /* Skip leading whitespace and comma */
+ buf = skip_spaces_and_commas(buf);
if (!*buf)
break; /* oh, it was trailing whitespace */
if (*buf == '#')
@@ -320,7 +328,7 @@ static int ddebug_tokenize(char *buf, char *words[], int
maxwords)
return -EINVAL; /* unclosed quote */
}
} else {
- for (end = buf; *end && !isspace(*end); end++)
+ for (end = buf; *end && !isspace(*end) && *end != ',';
end++)
;
if (end == buf) {
pr_err("parse err after word:%d=%s\n", nwords,
@@ -592,7 +600,8 @@ static int ddebug_exec_queries(char *query, const char
*modname)
if (split)
*split++ = '\0';
- query = skip_spaces(query);
+ query = skip_spaces_and_commas(query);
+
if (!query || !*query || *query == '#')
continue;
--
2.44.0
[PATCH v8 18/35] selftests-dyndbg: exit 127 if no facility
Test if /proc/dynamic_debug/control exists, exit 127 otherwise.
This distinguishes an untestable config from both pass & fail.
The 127 choice is pretty arbitrary, but imitating bisect.
That control file's presense guarantees that dynamic-debugging is
configured (unless /proc is off, unusually), without dealing with the
mount.
Signed-off-by: Jim Cromie
---
tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh | 5 +
1 file changed, 5 insertions(+)
diff --git a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
index 1be70af26a38..cb77ae142520 100755
--- a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
+++ b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
@@ -11,6 +11,11 @@ CYAN="\033[0;36m"
NC="\033[0;0m"
error_msg=""
+[ -e /proc/dynamic_debug/control ] || {
+echo -e "${RED}: kernel not configured for this test ${NC}"
+exit 127
+}
+
function vx () {
echo $1 > /sys/module/dynamic_debug/parameters/verbose
}
--
2.44.0
[PATCH v8 04/35] dyndbg: reword "class unknown, " to "class:_UNKNOWN_"
When a dyndbg classname is unknown to a kernel module (as before previous patch), the callsite is un-addressable via >control queries. The control-file displays this condition as "class unknown," currently. That spelling is sub-optimal, so change it to "class:_UNKNOWN_" to loudly announce the erroneous situation, and to make it exceedingly greppable. Signed-off-by: Jim Cromie --- lib/dynamic_debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c index f2c5e7910bb1..73ccf947d4aa 100644 --- a/lib/dynamic_debug.c +++ b/lib/dynamic_debug.c @@ -1154,7 +1154,7 @@ static int ddebug_proc_show(struct seq_file *m, void *p) if (class) seq_printf(m, " class:%s", class); else - seq_printf(m, " class unknown, _id:%d", dp->class_id); + seq_printf(m, " class:_UNKNOWN_ _id:%d", dp->class_id); } seq_puts(m, "\n"); -- 2.44.0
[PATCH v8 06/35] dyndbg: replace classmap list with a vector
Classmaps are stored in an elf section/array, but are individually
list-linked onto dyndbg's per-module ddebug_table for operation.
This is unnecessary; even when ddebug_attach_classmap() is handling
the builtin section (with classmaps for multiple builtin modules), its
contents are ordered, so a module's possibly multiple classmaps will
be consecutive in the section, and could be treated as a vector/block,
since both start-addy and subrange length are in the ddebug_info arg.
IOW, this treats classmaps similarly to _ddebugs, which are already
kept as vector-refs (address+len).
So this changes:
struct ddebug_class_map drops list-head link.
struct ddebug_table drops the list-head maps, and gets: classes &
num_classes for the start-addy and num_classes, placed to improve
struct packing.
The loading: in ddebug_attach_module_classes(), replace the
for-the-modname list-add loop, with a forloop that finds the module's
subrange (start,length) of matching classmaps within the possibly
builtin classmaps vector, and saves those to the ddebug_table.
The reading/using: change list-foreach loops in ddebug_class_name() &
ddebug_find_valid_class() to walk the array from start to length.
Also:
Move #define __outvar up, above an added use in a fn-prototype.
Simplify ddebug_attach_module_classes args, ref has both addy,len.
no functional changes
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 1 -
lib/dynamic_debug.c | 61 ++-
2 files changed, 32 insertions(+), 30 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 5231aaf361c4..b53217e4b711 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -83,7 +83,6 @@ enum class_map_type {
};
struct ddebug_class_map {
- struct list_head link;
struct module *mod;
const char *mod_name; /* needed for builtins */
const char **class_names;
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 152b04c05981..46e4cdd8e6be 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -45,10 +45,11 @@ extern struct ddebug_class_map __start___dyndbg_classes[];
extern struct ddebug_class_map __stop___dyndbg_classes[];
struct ddebug_table {
- struct list_head link, maps;
+ struct list_head link;
const char *mod_name;
- unsigned int num_ddebugs;
struct _ddebug *ddebugs;
+ struct ddebug_class_map *classes;
+ unsigned int num_ddebugs, num_classes;
};
struct ddebug_query {
@@ -147,13 +148,15 @@ static void vpr_info_dq(const struct ddebug_query *query,
const char *msg)
query->first_lineno, query->last_lineno, query->class_string);
}
+#define __outvar /* filled by callee */
static struct ddebug_class_map *ddebug_find_valid_class(struct ddebug_table
const *dt,
- const char
*class_string, int *class_id)
+ const char
*class_string,
+ __outvar int *class_id)
{
struct ddebug_class_map *map;
- int idx;
+ int i, idx;
- list_for_each_entry(map, >maps, link) {
+ for (map = dt->classes, i = 0; i < dt->num_classes; i++, map++) {
idx = match_string(map->class_names, map->length, class_string);
if (idx >= 0) {
*class_id = idx + map->base;
@@ -164,7 +167,6 @@ static struct ddebug_class_map
*ddebug_find_valid_class(struct ddebug_table cons
return NULL;
}
-#define __outvar /* filled by callee */
/*
* Search the tables for _ddebug's which match the given `query' and
* apply the `flags' and `mask' to them. Returns number of matching
@@ -1114,9 +1116,10 @@ static void *ddebug_proc_next(struct seq_file *m, void
*p, loff_t *pos)
static const char *ddebug_class_name(struct ddebug_iter *iter, struct _ddebug
*dp)
{
- struct ddebug_class_map *map;
+ struct ddebug_class_map *map = iter->table->classes;
+ int i, nc = iter->table->num_classes;
- list_for_each_entry(map, >table->maps, link)
+ for (i = 0; i < nc; i++, map++)
if (class_in_range(dp->class_id, map))
return map->class_names[dp->class_id - map->base];
@@ -1200,30 +1203,31 @@ static const struct proc_ops proc_fops = {
.proc_write = ddebug_proc_write
};
-static void ddebug_attach_module_classes(struct ddebug_table *dt,
-struct ddebug_class_map *classes,
-int num_classes)
+static void ddebug_attach_module_classes(struct ddebug_table *dt, struct
_ddebug_info *di)
{
struct ddebug_class_map *cm;
- int i, j, ct = 0;
+ int i, nc = 0;
- for (cm = classes, i = 0; i < num_classes; i++, cm++) {
+ /*
+* Find this module's classmaps in a
[PATCH v8 33/35] drm-drivers: DRM_CLASSMAP_USE in 2nd batch of drivers, helpers
Add a DRM_CLASSMAP_USE declaration to 2nd batch of helpers and *_drv.c
files. For drivers, add the decl just above the module's PARAMs,
since it identifies the "inherited" drm.debug param.
Note: with CONFIG_DRM_USE_DYNAMIC_DEBUG=y, a module not also declaring
DRM_CLASSMAP_USE will have its class'd prdbgs stuck in the initial
(disabled, but for DEBUG) state.
The stuck sites are evident in /proc/dynamic_debug/control as:
class:_UNKNOWN_ _id:N# control's last column
rather than a proper "enumeration":
class:DRM_UT_CORE
TLDR: This set of updates was found by choosing M for all DRM-config
items I found (not allmodconfig), building & modprobing them, and
grepping "class unknown," control. There may yet be others.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 2 ++
drivers/gpu/drm/gud/gud_drv.c | 2 ++
drivers/gpu/drm/mgag200/mgag200_drv.c | 2 ++
drivers/gpu/drm/qxl/qxl_drv.c | 2 ++
drivers/gpu/drm/radeon/radeon_drv.c| 2 ++
drivers/gpu/drm/udl/udl_main.c | 2 ++
drivers/gpu/drm/vkms/vkms_drv.c| 2 ++
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c| 2 ++
8 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
b/drivers/gpu/drm/drm_gem_shmem_helper.c
index e435f986cd13..066d906e3199 100644
--- a/drivers/gpu/drm/drm_gem_shmem_helper.c
+++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
@@ -23,6 +23,8 @@
#include
#include
+DRM_CLASSMAP_USE(drm_debug_classes);
+
MODULE_IMPORT_NS(DMA_BUF);
/**
diff --git a/drivers/gpu/drm/gud/gud_drv.c b/drivers/gpu/drm/gud/gud_drv.c
index 9d7bf8ee45f1..5b555045fce4 100644
--- a/drivers/gpu/drm/gud/gud_drv.c
+++ b/drivers/gpu/drm/gud/gud_drv.c
@@ -31,6 +31,8 @@
#include "gud_internal.h"
+DRM_CLASSMAP_USE(drm_debug_classes);
+
/* Only used internally */
static const struct drm_format_info gud_drm_format_r1 = {
.format = GUD_DRM_FORMAT_R1,
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c
b/drivers/gpu/drm/mgag200/mgag200_drv.c
index 573dbe256aa8..88c5e24cc894 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -25,6 +25,8 @@ static int mgag200_modeset = -1;
MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
module_param_named(modeset, mgag200_modeset, int, 0400);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
int mgag200_init_pci_options(struct pci_dev *pdev, u32 option, u32 option2)
{
struct device *dev = >dev;
diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c
index beee5563031a..1971bfa8a8a6 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.c
+++ b/drivers/gpu/drm/qxl/qxl_drv.c
@@ -65,6 +65,8 @@ module_param_named(modeset, qxl_modeset, int, 0400);
MODULE_PARM_DESC(num_heads, "Number of virtual crtcs to expose (default 4)");
module_param_named(num_heads, qxl_num_crtc, int, 0400);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
static struct drm_driver qxl_driver;
static struct pci_driver qxl_pci_driver;
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
b/drivers/gpu/drm/radeon/radeon_drv.c
index 7bf08164140e..d22308328c76 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -247,6 +247,8 @@ int radeon_cik_support = 1;
MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 =
disabled)");
module_param_named(cik_support, radeon_cik_support, int, 0444);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
static struct pci_device_id pciidlist[] = {
radeon_PCI_IDS
};
diff --git a/drivers/gpu/drm/udl/udl_main.c b/drivers/gpu/drm/udl/udl_main.c
index 3ebe2ce55dfd..ba57c14454e5 100644
--- a/drivers/gpu/drm/udl/udl_main.c
+++ b/drivers/gpu/drm/udl/udl_main.c
@@ -19,6 +19,8 @@
#define NR_USB_REQUEST_CHANNEL 0x12
+DRM_CLASSMAP_USE(drm_debug_classes);
+
#define MAX_TRANSFER (PAGE_SIZE*16 - BULK_SIZE)
#define WRITES_IN_FLIGHT (20)
#define MAX_VENDOR_DESCRIPTOR_SIZE 256
diff --git a/drivers/gpu/drm/vkms/vkms_drv.c b/drivers/gpu/drm/vkms/vkms_drv.c
index dd0af086e7fa..086797c4b82b 100644
--- a/drivers/gpu/drm/vkms/vkms_drv.c
+++ b/drivers/gpu/drm/vkms/vkms_drv.c
@@ -39,6 +39,8 @@
static struct vkms_config *default_config;
+DRM_CLASSMAP_USE(drm_debug_classes);
+
static bool enable_cursor = true;
module_param_named(enable_cursor, enable_cursor, bool, 0444);
MODULE_PARM_DESC(enable_cursor, "Enable/Disable cursor support");
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 58fb40c93100..c159f4d186a3 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -275,6 +275,8 @@ static int vmw_probe(struct pci_dev *, const struct
pci_device_id *);
static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
void *ptr);
+DRM_CLASSMAP_USE(drm_debug_classes);
+
MODULE_PARM_DESC(restrict_iommu, "Try to limit IOMMU usage for TTM pages");
module_param_named(restrict_iommu, vmw_restrict_iommu, int,
[PATCH v8 15/35] dyndbg-API: remove DD_CLASS_TYPE_(DISJOINT|LEVEL)_NAMES and code
Remove the NAMED class types; these 2 classmap types accept class
names at the PARAM interface, for example:
echo +DRM_UT_CORE,-DRM_UT_KMS > /sys/module/drm/parameters/debug_names
The code works, but its only used by test-dynamic-debug, and wasn't
asked for by anyone else, so reduce test-surface, simplify things.
also rename enum class_map_type to enum ddebug_class_map_type.
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 23 ++--
lib/dynamic_debug.c | 102 +++---
lib/test_dynamic_debug.c | 26 -
3 files changed, 14 insertions(+), 137 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 8116d0a0d33a..dd304e231f08 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -58,27 +58,16 @@ struct _ddebug {
#endif
} __attribute__((aligned(8)));
-enum class_map_type {
+enum ddebug_class_map_type {
DD_CLASS_TYPE_DISJOINT_BITS,
/**
-* DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, one per bit.
-* expecting hex input. Built for drm.debug, basis for other types.
+* DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, mapped to
bits[0..N].
+* Expects hex input. Built for drm.debug, basis for other types.
*/
DD_CLASS_TYPE_LEVEL_NUM,
/**
-* DD_CLASS_TYPE_LEVEL_NUM: input is numeric level, 0-N.
-* N turns on just bits N-1 .. 0, so N=0 turns all bits off.
-*/
- DD_CLASS_TYPE_DISJOINT_NAMES,
- /**
-* DD_CLASS_TYPE_DISJOINT_NAMES: input is a CSV of [+-]CLASS_NAMES,
-* classes are independent, like _DISJOINT_BITS.
-*/
- DD_CLASS_TYPE_LEVEL_NAMES,
- /**
-* DD_CLASS_TYPE_LEVEL_NAMES: input is a CSV of [+-]CLASS_NAMES,
-* intended for names like: INFO,DEBUG,TRACE, with a module prefix
-* avoid EMERG,ALERT,CRIT,ERR,WARNING: they're not debug
+* DD_CLASS_TYPE_LEVEL_NUM: input is numeric level, 0..N.
+* Input N turns on bits 0..N-1
*/
};
@@ -88,7 +77,7 @@ struct ddebug_class_map {
const char **class_names;
const int length;
const int base; /* index of 1st .class_id, allows split/shared
space */
- enum class_map_type map_type;
+ enum ddebug_class_map_type map_type;
};
/**
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 43a8e04b8599..d5701207febc 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -636,76 +636,6 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
#define CLASSMAP_BITMASK(width) ((1UL << (width)) - 1)
-/* accept comma-separated-list of [+-] classnames */
-static int param_set_dyndbg_classnames(const char *instr, const struct
kernel_param *kp)
-{
- const struct ddebug_class_param *dcp = kp->arg;
- const struct ddebug_class_map *map = dcp->map;
- unsigned long curr_bits, old_bits;
- char *cl_str, *p, *tmp;
- int cls_id, totct = 0;
- bool wanted;
-
- cl_str = tmp = kstrdup_and_replace(instr, '\n', '\0', GFP_KERNEL);
- if (!tmp)
- return -ENOMEM;
-
- /* start with previously set state-bits, then modify */
- curr_bits = old_bits = *dcp->bits;
- vpr_info("\"%s\" > %s:0x%lx\n", cl_str, KP_NAME(kp), curr_bits);
-
- for (; cl_str; cl_str = p) {
- p = strchr(cl_str, ',');
- if (p)
- *p++ = '\0';
-
- if (*cl_str == '-') {
- wanted = false;
- cl_str++;
- } else {
- wanted = true;
- if (*cl_str == '+')
- cl_str++;
- }
- cls_id = match_string(map->class_names, map->length, cl_str);
- if (cls_id < 0) {
- pr_err("%s unknown to %s\n", cl_str, KP_NAME(kp));
- continue;
- }
-
- /* have one or more valid class_ids of one *_NAMES type */
- switch (map->map_type) {
- case DD_CLASS_TYPE_DISJOINT_NAMES:
- /* the +/- pertains to a single bit */
- if (test_bit(cls_id, _bits) == wanted) {
- v3pr_info("no change on %s\n", cl_str);
- continue;
- }
- curr_bits ^= BIT(cls_id);
- totct += ddebug_apply_class_bitmap(dcp, _bits,
*dcp->bits, NULL);
- *dcp->bits = curr_bits;
- v2pr_info("%s: changed bit %d:%s\n", KP_NAME(kp),
cls_id,
- map->class_names[cls_id]);
- break;
- case DD_CLASS_TYPE_LEVEL_NAMES:
- /* cls_id = N in 0..max. wanted +/- determines N or N-1
*/
-
[PATCH v8 25/35] docs/dyndbg: explain new delimiters: comma, percent
Add mention of comma and percent delimiters into the respective paragraphs describing their equivalents: space and newline. Signed-off-by: Jim Cromie --- .../admin-guide/dynamic-debug-howto.rst| 18 ++ 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 742eb4230c6e..7b570f29ae98 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -73,16 +73,18 @@ Command Language Reference == At the basic lexical level, a command is a sequence of words separated -by spaces or tabs. So these are all equivalent:: +by spaces, tabs, or commas. So these are all equivalent:: :#> ddcmd file svcsock.c line 1603 +p :#> ddcmd "file svcsock.c line 1603 +p" :#> ddcmd ' file svcsock.c line 1603 +p ' + :#> ddcmd file,svcsock.c,line,1603,+p -Command submissions are bounded by a write() system call. -Multiple commands can be written together, separated by ``;`` or ``\n``:: +Command submissions are bounded by a write() system call. Multiple +commands can be written together, separated by ``%``, ``;`` or ``\n``:: - :#> ddcmd "func pnpacpi_get_resources +p; func pnp_assign_mem +p" + :#> ddcmd func foo +p % func bar +p + :#> ddcmd func foo +p \; func bar +p :#> ddcmd <<"EOC" func pnpacpi_get_resources +p func pnp_assign_mem +p @@ -104,7 +106,6 @@ The match-spec's select *prdbgs* from the catalog, upon which to apply the flags-spec, all constraints are ANDed together. An absent keyword is the same as keyword "*". - A match specification is a keyword, which selects the attribute of the callsite to be compared, and a value to compare against. Possible keywords are::: @@ -128,7 +129,6 @@ keywords are::: ``line-range`` cannot contain space, e.g. "1-30" is valid range but "1 - 30" is not. - The meanings of each keyword are: func @@ -153,9 +153,11 @@ module The given string is compared against the module name of each callsite. The module name is the string as seen in ``lsmod``, i.e. without the directory or the ``.ko`` -suffix and with ``-`` changed to ``_``. Examples:: +suffix and with ``-`` changed to ``_``. + +Examples:: - module sunrpc + module,sunrpc # with ',' as token separator module nfsd module drm* # both drm, drm_kms_helper -- 2.44.0
[PATCH v8 34/35] drm: restore CONFIG_DRM_USE_DYNAMIC_DEBUG un-BROKEN
Time for some quality CI Signed-off-by: Jim Cromie --- drivers/gpu/drm/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 5a0c476361c3..b2ea73ae48f0 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -54,8 +54,7 @@ config DRM_DEBUG_MM config DRM_USE_DYNAMIC_DEBUG bool "use dynamic debug to implement drm.debug" - default n - depends on BROKEN + default y depends on DRM depends on DYNAMIC_DEBUG || DYNAMIC_DEBUG_CORE depends on JUMP_LABEL -- 2.44.0
[PATCH v8 03/35] test-dyndbg: fixup CLASSMAP usage error
A more careful reading of logging output from test_dynamic_debug.ko
reveals:
lib/test_dynamic_debug.c:103 [test_dynamic_debug]do_cats =pmf "doing
categories\n"
lib/test_dynamic_debug.c:105 [test_dynamic_debug]do_cats =p "LOW msg\n"
class:MID
lib/test_dynamic_debug.c:106 [test_dynamic_debug]do_cats =p "MID msg\n" class:HI
lib/test_dynamic_debug.c:107 [test_dynamic_debug]do_cats =_ "HI msg\n" class
unknown, _id:13
107 says: HI is unknown, 105,106 have LOW/MID and MID/HI skew.
The enum's 1st val (explicitly initialized) was wrong; it must be
_base, not _base+1 (a DECLARE_DYNDBG_CLASSMAP param). So the last
enumeration exceeded the range of mapped class-id's, which triggered
the "class unknown" report. I coded in an error, intending to verify
err detection, then forgot, and missed that it was there.
So this patch fixes a bad usage of DECLARE_DYNDBG_CLASSMAP(), showing
that it is too error-prone. As noted in test-mod comments:
* Using the CLASSMAP api:
* - classmaps must have corresponding enum
* - enum symbols must match/correlate with class-name strings in the map.
* - base must equal enum's 1st value
* - multiple maps must set their base to share the 0-62 class_id space !!
Signed-off-by: Jim Cromie
---
lib/test_dynamic_debug.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/test_dynamic_debug.c b/lib/test_dynamic_debug.c
index 8dd250ad022b..a01f0193a419 100644
--- a/lib/test_dynamic_debug.c
+++ b/lib/test_dynamic_debug.c
@@ -75,7 +75,7 @@ DD_SYS_WRAP(disjoint_bits, p);
DD_SYS_WRAP(disjoint_bits, T);
/* symbolic input, independent bits */
-enum cat_disjoint_names { LOW = 11, MID, HI };
+enum cat_disjoint_names { LOW = 10, MID, HI };
DECLARE_DYNDBG_CLASSMAP(map_disjoint_names, DD_CLASS_TYPE_DISJOINT_NAMES, 10,
"LOW", "MID", "HI");
DD_SYS_WRAP(disjoint_names, p);
--
2.44.0
[PATCH v8 21/35] dyndbg: treat comma as a token separator
Treat comma as a token terminator, just like a space. This allows a
user to avoid quoting hassles when spaces are otherwise needed:
:#> modprobe drm dyndbg=class,DRM_UT_CORE,+p\;class,DRM_UT_KMS,+p
or as a boot arg:
drm.dyndbg=class,DRM_UT_CORE,+p # todo: support multi-query here
Given the many ways a boot-line +args can be assembled and then passed
in/down/around shell based tools, this may allow side-stepping all
sorts of quoting hassles thru those layers.
existing query format:
modprobe test_dynamic_debug dyndbg="class D2_CORE +p"
new format:
modprobe test_dynamic_debug dyndbg=class,D2_CORE,+p
Signed-off-by: Jim Cromie
Co-developed-by: Łukasz Bartosik
Signed-off-by: Łukasz Bartosik
---
lib/dynamic_debug.c | 17 +
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 31fd67597928..c1bc728cb050 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -290,6 +290,14 @@ static int ddebug_change(const struct ddebug_query *query,
return nfound;
}
+static char *skip_spaces_and_commas(const char *str)
+{
+ str = skip_spaces(str);
+ while (*str == ',')
+ str = skip_spaces(++str);
+ return (char *)str;
+}
+
/*
* Split the buffer `buf' into space-separated words.
* Handles simple " and ' quoting, i.e. without nested,
@@ -303,8 +311,8 @@ static int ddebug_tokenize(char *buf, char *words[], int
maxwords)
while (*buf) {
char *end;
- /* Skip leading whitespace */
- buf = skip_spaces(buf);
+ /* Skip leading whitespace and comma */
+ buf = skip_spaces_and_commas(buf);
if (!*buf)
break; /* oh, it was trailing whitespace */
if (*buf == '#')
@@ -320,7 +328,7 @@ static int ddebug_tokenize(char *buf, char *words[], int
maxwords)
return -EINVAL; /* unclosed quote */
}
} else {
- for (end = buf; *end && !isspace(*end); end++)
+ for (end = buf; *end && !isspace(*end) && *end != ',';
end++)
;
if (end == buf) {
pr_err("parse err after word:%d=%s\n", nwords,
@@ -592,7 +600,8 @@ static int ddebug_exec_queries(char *query, const char
*modname)
if (split)
*split++ = '\0';
- query = skip_spaces(query);
+ query = skip_spaces_and_commas(query);
+
if (!query || !*query || *query == '#')
continue;
--
2.44.0
[PATCH v8 28/35] dyndbg-doc: explain flags parse 1st
When writing queries to >control, flags are parsed 1st, since they are the only required field. So if the flags draw an error, then keyword errors aren't reported. This can be mildly confusing/annoying, so explain it instead. This note could be moved up to just after the grammar id's the flags, and before the match-spec is detailed. Opinions ? Signed-off-by: Jim Cromie --- Documentation/admin-guide/dynamic-debug-howto.rst | 10 ++ 1 file changed, 10 insertions(+) diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 7b570f29ae98..ccf3704f2143 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -106,6 +106,16 @@ The match-spec's select *prdbgs* from the catalog, upon which to apply the flags-spec, all constraints are ANDed together. An absent keyword is the same as keyword "*". +Note: because the match-spec can be empty, the flags are checked 1st, +then the pairs of keyword values. Flag errs will hide keyword errs: + + bash-5.2# ddcmd mod bar +foo + dyndbg: read 13 bytes from userspace + dyndbg: query 0: "mod bar +foo" mod:* + dyndbg: unknown flag 'o' + dyndbg: flags parse failed + dyndbg: processed 1 queries, with 0 matches, 1 errs + A match specification is a keyword, which selects the attribute of the callsite to be compared, and a value to compare against. Possible keywords are::: -- 2.44.0
[PATCH v8 29/35] dyndbg: add __counted_by annotations
Tell the compiler about our vectors (array,length), in 2 places:
h: struct _ddebug_info, which keeps refs to the __dyndbg_* ELF/DATA
sections, these are all vectors with a length.
c: struct ddebug_table, which has sub-refs into _ddebug_info.*
Signed-off-by: Jim Cromie
---
include/linux/dynamic_debug.h | 6 +++---
lib/dynamic_debug.c | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index 090fe9554db7..c54d2a4e1d48 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -146,9 +146,9 @@ struct ddebug_class_user {
/* encapsulate linker provided built-in (or module) dyndbg data */
struct _ddebug_info {
- struct _ddebug *descs;
- struct ddebug_class_map *classes;
- struct ddebug_class_user *class_users;
+ struct _ddebug *descs __counted_by(num_descs);
+ struct ddebug_class_map *classes __counted_by(num_classes);
+ struct ddebug_class_user *class_users __counted_by(num_class_users);
unsigned int num_descs;
unsigned int num_classes;
unsigned int num_class_users;
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 625838bd74aa..390a35508fb6 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -49,9 +49,9 @@ extern struct ddebug_class_user __stop___dyndbg_class_users[];
struct ddebug_table {
struct list_head link;
const char *mod_name;
- struct _ddebug *ddebugs;
- struct ddebug_class_map *classes;
- struct ddebug_class_user *class_users;
+ struct _ddebug *ddebugs __counted_by(num_ddebugs);
+ struct ddebug_class_map *classes __counted_by(num_classes);
+ struct ddebug_class_user *class_users __counted_by(num_class_users);
unsigned int num_ddebugs, num_classes, num_class_users;
};
--
2.44.0
[PATCH v8 30/35] drm+drivers: adapt to use DYNDBG_CLASSMAP_{DEFINE, USE}
Follow dynamic_debug API change from DECLARE_DYNDBG_CLASSMAP to
DYNDBG_CLASSMAP_{DEFINE,USE}.
Prior to this, we used DECLARE_DYNDBG_CLASSMAP, which was preserved to
decouple DRM conversion. I'm unsure of the full functionality
in-between, a round of lkp-testing will help.
Fixes: f158936b60a7 ("drm: POC drm on dyndbg - use in core, 2 helpers, 3
drivers.")
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 12 +---
drivers/gpu/drm/display/drm_dp_helper.c | 12 +---
drivers/gpu/drm/drm_crtc_helper.c | 12 +---
drivers/gpu/drm/drm_print.c | 25 +
drivers/gpu/drm/i915/i915_params.c | 12 +---
drivers/gpu/drm/nouveau/nouveau_drm.c | 12 +---
include/drm/drm_print.h | 8
7 files changed, 26 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index e4277298cf1a..b287f0cfd8fa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -217,17 +217,7 @@ int amdgpu_damage_clips = -1; /* auto */
static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);
-DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
- "DRM_UT_CORE",
- "DRM_UT_DRIVER",
- "DRM_UT_KMS",
- "DRM_UT_PRIME",
- "DRM_UT_ATOMIC",
- "DRM_UT_VBL",
- "DRM_UT_STATE",
- "DRM_UT_LEASE",
- "DRM_UT_DP",
- "DRM_UT_DRMRES");
+DRM_CLASSMAP_USE(drm_debug_classes);
struct amdgpu_mgpu_info mgpu_info = {
.mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.c
index f5d4be897866..d3a7df09846f 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -41,17 +41,7 @@
#include "drm_dp_helper_internal.h"
-DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
- "DRM_UT_CORE",
- "DRM_UT_DRIVER",
- "DRM_UT_KMS",
- "DRM_UT_PRIME",
- "DRM_UT_ATOMIC",
- "DRM_UT_VBL",
- "DRM_UT_STATE",
- "DRM_UT_LEASE",
- "DRM_UT_DP",
- "DRM_UT_DRMRES");
+DRM_CLASSMAP_USE(drm_debug_classes);
struct dp_aux_backlight {
struct backlight_device *base;
diff --git a/drivers/gpu/drm/drm_crtc_helper.c
b/drivers/gpu/drm/drm_crtc_helper.c
index 2dafc39a27cb..e9d229a393f4 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -50,17 +50,7 @@
#include "drm_crtc_helper_internal.h"
-DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
- "DRM_UT_CORE",
- "DRM_UT_DRIVER",
- "DRM_UT_KMS",
- "DRM_UT_PRIME",
- "DRM_UT_ATOMIC",
- "DRM_UT_VBL",
- "DRM_UT_STATE",
- "DRM_UT_LEASE",
- "DRM_UT_DP",
- "DRM_UT_DRMRES");
+DRM_CLASSMAP_USE(drm_debug_classes);
/**
* DOC: overview
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index 699b7dbffd7b..4a5f2317229b 100644
--- a/drivers/gpu/drm/drm_print.c
+++ b/drivers/gpu/drm/drm_print.c
@@ -55,18 +55,19 @@ MODULE_PARM_DESC(debug, "Enable debug output, where each
bit enables a debug cat
#if !defined(CONFIG_DRM_USE_DYNAMIC_DEBUG)
module_param_named(debug, __drm_debug, ulong, 0600);
#else
-/* classnames must match vals of enum drm_debug_category */
-DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
- "DRM_UT_CORE",
- "DRM_UT_DRIVER",
- "DRM_UT_KMS",
- "DRM_UT_PRIME",
- "DRM_UT_ATOMIC",
- "DRM_UT_VBL",
- "DRM_UT_STATE",
- "DRM_UT_LEASE",
- "DRM_UT_DP",
- "DRM_UT_DRMRES");
+/* classnames must match value-symbols of enum drm_debug_category */
+DRM_CLASSMAP_DEFINE(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS,
+ DRM_UT_CORE,
+ "DRM_UT_CORE",
+ "DRM_UT_DRIVER",
+ "DRM_UT_KMS",
+ "DRM_UT_PRIME",
+ "DRM_UT_ATOMIC",
+ "DRM_UT_VBL",
+ "DRM_UT_STATE",
+ "DRM_UT_LEASE",
+ "DRM_UT_DP",
+ "DRM_UT_DRMRES");
static struct ddebug_class_param
[PATCH v8 14/35] dyndbg: reduce verbose=3 messages in ddebug_add_module
When modprobing a module, dyndbg currently logs/says "add-module", and
then "skipping" if the module has no prdbgs. Instead just check 1st
and return quietly.
no functional change
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index d4a0ae31d059..43a8e04b8599 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -1245,11 +1245,10 @@ static int ddebug_add_module(struct _ddebug_info *di,
const char *modname)
{
struct ddebug_table *dt;
- v3pr_info("add-module: %s.%d sites\n", modname, di->num_descs);
- if (!di->num_descs) {
- v3pr_info(" skip %s\n", modname);
+ if (!di->num_descs)
return 0;
- }
+
+ v3pr_info("add-module: %s %d sites\n", modname, di->num_descs);
dt = kzalloc(sizeof(*dt), GFP_KERNEL);
if (dt == NULL) {
--
2.44.0
[PATCH v8 32/35] drm: use correct ccflags-y spelling
Incorrectly spelled CFLAGS- failed to add -DDYNAMIC_DEBUG_MODULE,
which broke builds with:
CONFIG_DRM_USE_DYNAMIC_DEBUG=y
CONFIG_DYNAMIC_DEBUG_CORE=y
CONFIG_DYNAMIC_DEBUG=n
Also add subdir-ccflags so that all drivers pick up the addition.
Fixes: 84ec67288c10 ("drm_print: wrap drm_*_dbg in dyndbg descriptor factory
macro")
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/Makefile | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 104b42df2e95..313516fc2ad5 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -3,7 +3,8 @@
# Makefile for the drm device driver. This driver provides support for the
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
-CFLAGS-$(CONFIG_DRM_USE_DYNAMIC_DEBUG) += -DDYNAMIC_DEBUG_MODULE
+ccflags-$(CONFIG_DRM_USE_DYNAMIC_DEBUG)+=
-DDYNAMIC_DEBUG_MODULE
+subdir-ccflags-$(CONFIG_DRM_USE_DYNAMIC_DEBUG) += -DDYNAMIC_DEBUG_MODULE
drm-y := \
drm_aperture.o \
--
2.44.0
[PATCH v8 19/35] dyndbg-API: promote DYNDBG_CLASSMAP_PARAM to API
move the DYNDBG_CLASSMAP_PARAM macro from test-dynamic-debug.c into
the header, and refine it, by distinguishing the 2 use cases:
1.DYNDBG_CLASSMAP_PARAM_REF
for DRM, to pass in extern __drm_debug by name.
dyndbg keeps bits in it, so drm can still use it as before
2.DYNDBG_CLASSMAP_PARAM
new user (test_dynamic_debug) doesn't need to share state,
decls a static long unsigned int to store the bitvec.
__DYNDBG_CLASSMAP_PARAM
bottom layer - allocate,init a ddebug-class-param, module-param-cb.
Also clean up and improve comments in test-code, and add
MODULE_DESCRIPTIONs.
Signed-off-by: Jim Cromie
---
fixup drm-print.h add PARAM_REF forwarding macros
with DYNDBG_CLASSMAP_PARAM_REF in the API, add DRM_ variant
---
include/linux/dynamic_debug.h | 37 -
lib/dynamic_debug.c | 70 ++---
lib/test_dynamic_debug.c| 50 +--
lib/test_dynamic_debug_submod.c | 9 -
4 files changed, 110 insertions(+), 56 deletions(-)
diff --git a/include/linux/dynamic_debug.h b/include/linux/dynamic_debug.h
index d1fc3035e19c..090fe9554db7 100644
--- a/include/linux/dynamic_debug.h
+++ b/include/linux/dynamic_debug.h
@@ -91,7 +91,7 @@ struct ddebug_class_map {
* used to validate a "class FOO .." >control command on the module
*/
#define __DYNDBG_CLASSMAP_DEFINE(_var, _maptype, _base, ...) \
- const char *_var##_classnames[] = { __VA_ARGS__ }; \
+ static const char *_var##_classnames[] = { __VA_ARGS__ }; \
struct ddebug_class_map __aligned(8) __used \
__section("__dyndbg_classes") _var = { \
.mod = THIS_MODULE, \
@@ -163,6 +163,41 @@ struct ddebug_class_param {
const struct ddebug_class_map *map;
};
+/**
+ * DYNDBG_CLASSMAP_PARAM - wrap a dyndbg-classmap with a controlling sys-param
+ * @_name sysfs node name
+ * @_var name of the struct classmap var defining the controlled classes
+ * @_flags flags to be toggled, typically just 'p'
+ *
+ * Creates a sysfs-param to control the classes defined by the
+ * classmap. Keeps bits in a private/static
+ */
+#define DYNDBG_CLASSMAP_PARAM(_name, _var, _flags) \
+ static unsigned long _name##_bvec; \
+ __DYNDBG_CLASSMAP_PARAM(_name, _name##_bvec, _var, _flags)
+
+/**
+ * DYNDBG_CLASSMAP_PARAM_REF - wrap a dyndbg-classmap with a controlling
sys-param
+ * @_name sysfs node name
+ * @_bits name of the module's unsigned long bit-vector, ex: __drm_debug
+ * @_var name of the struct classmap var defining the controlled classes
+ * @_flags flags to be toggled, typically just 'p'
+ *
+ * Creates a sysfs-param to control the classmap, keeping bitvec in user
@_bits.
+ * This lets drm use __drm_debug elsewhere too.
+ */
+#define DYNDBG_CLASSMAP_PARAM_REF(_name, _bits, _var, _flags) \
+ __DYNDBG_CLASSMAP_PARAM(_name, _bits, _var, _flags)
+
+#define __DYNDBG_CLASSMAP_PARAM(_name, _bits, _var, _flags)\
+ static struct ddebug_class_param _name##_##_flags = { \
+ .bits = &(_bits), \
+ .flags = #_flags, \
+ .map = &(_var), \
+ }; \
+ module_param_cb(_name, _ops_dyndbg_classes, \
+ &_name##_##_flags, 0600)
+
/*
* pr_debug() and friends are globally enabled or modules have selectively
* enabled them.
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index f0a274a3cc9e..31fd67597928 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -657,6 +657,30 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
#define CLASSMAP_BITMASK(width) ((1UL << (width)) - 1)
+static void ddebug_class_param_clamp_input(unsigned long *inrep, const struct
kernel_param *kp)
+{
+ const struct ddebug_class_param *dcp = kp->arg;
+ const struct ddebug_class_map *map = dcp->map;
+
+ switch (map->map_type) {
+ case DD_CLASS_TYPE_DISJOINT_BITS:
+ /* expect bits. mask and warn if too many */
+ if (*inrep & ~CLASSMAP_BITMASK(map->length)) {
+ pr_warn("%s: input: 0x%lx exceeds mask: 0x%lx,
masking\n",
+ KP_NAME(kp), *inrep,
CLASSMAP_BITMASK(map->length));
+ *inrep &= CLASSMAP_BITMASK(map->length);
+ }
+ break;
+ case DD_CLASS_TYPE_LEVEL_NUM:
+ /* input is bitpos, of highest verbosity to be enabled */
+ if (*inrep > map->length) {
+ pr_warn("%s: level:%ld exceeds max:%d, clamping\n",
+ KP_NAME(kp), *inrep,
[PATCH v8 31/35] drm-dyndbg: adapt to use DYNDBG_CLASSMAP_PARAM
use new export
---
drivers/gpu/drm/drm_print.c | 8 ++--
include/drm/drm_print.h | 6 --
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index 4a5f2317229b..efdf82f8cbbb 100644
--- a/drivers/gpu/drm/drm_print.c
+++ b/drivers/gpu/drm/drm_print.c
@@ -69,12 +69,8 @@ DRM_CLASSMAP_DEFINE(drm_debug_classes,
DD_CLASS_TYPE_DISJOINT_BITS,
"DRM_UT_DP",
"DRM_UT_DRMRES");
-static struct ddebug_class_param drm_debug_bitmap = {
- .bits = &__drm_debug,
- .flags = "p",
- .map = _debug_classes,
-};
-module_param_cb(debug, _ops_dyndbg_classes, _debug_bitmap, 0600);
+DRM_CLASSMAP_PARAM_REF(debug, __drm_debug, drm_debug_classes, p);
+
#endif
void __drm_puts_coredump(struct drm_printer *p, const char *str)
diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
index 905fc25bf65a..95c667934bbb 100644
--- a/include/drm/drm_print.h
+++ b/include/drm/drm_print.h
@@ -141,11 +141,13 @@ enum drm_debug_category {
};
#ifdef CONFIG_DRM_USE_DYNAMIC_DEBUG
-#define DRM_CLASSMAP_DEFINE(...) DYNDBG_CLASSMAP_DEFINE(__VA_ARGS__)
-#define DRM_CLASSMAP_USE(name) DYNDBG_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_DEFINE(...)DYNDBG_CLASSMAP_DEFINE(__VA_ARGS__)
+#define DRM_CLASSMAP_USE(name) DYNDBG_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_PARAM_REF(...) DYNDBG_CLASSMAP_PARAM_REF(__VA_ARGS__)
#else
#define DRM_CLASSMAP_DEFINE(...)
#define DRM_CLASSMAP_USE(name)
+#define DRM_CLASSMAP_PARAM_REF(...)
#endif
static inline bool drm_debug_enabled_raw(enum drm_debug_category category)
--
2.44.0
[PATCH v8 23/35] dyndbg: split multi-query strings with %
Multi-query strings have long allowed:
modprobe drm dyndbg="class DRM_UT_CORE +p; class DRM_UT_KMS +p"
modprobe drm dyndbg=<
[ 203.902703] dyndbg: query parse failed
[ 203.902871] dyndbg: processed 2 queries, with 0 matches, 2 errs
bash: echo: write error: Invalid argument
The '%' splits the input into 2 queries, and both fail. Given the
limited utility of matching against the working parts of a format
string "foo: %d bar %s", nothing is actually lost here.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index c1bc728cb050..625838bd74aa 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -596,7 +596,7 @@ static int ddebug_exec_queries(char *query, const char
*modname)
int i, errs = 0, exitcode = 0, rc, nfound = 0;
for (i = 0; query; query = split) {
- split = strpbrk(query, ";\n");
+ split = strpbrk(query, "%;\n");
if (split)
*split++ = '\0';
--
2.44.0
[PATCH v8 35/35] drm-print: workaround compiler meh
For some reason I cannot grok, I get an unused variable 'category'
warning/error, though the usage follows immediately. This drops the
local var and directly derefs in the macro-call, which somehow avoids
the warning.
commit 9fd6f61a297e ("drm/print: add drm_dbg_printer() for drm device specific
printer")
CC: Jani Nikula
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_print.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
index efdf82f8cbbb..c400441cd77e 100644
--- a/drivers/gpu/drm/drm_print.c
+++ b/drivers/gpu/drm/drm_print.c
@@ -183,11 +183,10 @@ void __drm_printfn_dbg(struct drm_printer *p, struct
va_format *vaf)
{
const struct drm_device *drm = p->arg;
const struct device *dev = drm ? drm->dev : NULL;
- enum drm_debug_category category = p->category;
const char *prefix = p->prefix ?: "";
const char *prefix_pad = p->prefix ? " " : "";
- if (!__drm_debug_enabled(category))
+ if (!__drm_debug_enabled(p->category))
return;
/* Note: __builtin_return_address(0) is useless here. */
--
2.44.0
[PATCH v8 12/35] dyndbg: tighten ddebug_class_name() 1st arg type
Change function's 1st arg-type, and deref in the caller.
The fn doesn't need any other fields in the struct.
no functional change.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 8320cadeb251..882354e1e78f 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -1120,12 +1120,12 @@ static void *ddebug_proc_next(struct seq_file *m, void
*p, loff_t *pos)
#define class_in_range(class_id, map) \
(class_id >= map->base && class_id < map->base + map->length)
-static const char *ddebug_class_name(struct ddebug_iter *iter, struct _ddebug
*dp)
+static const char *ddebug_class_name(struct ddebug_table *dt, struct _ddebug
*dp)
{
- struct ddebug_class_map *map = iter->table->classes;
- int i, nc = iter->table->num_classes;
+ struct ddebug_class_map *map = dt->classes;
+ int i;
- for (i = 0; i < nc; i++, map++)
+ for (i = 0; i < dt->num_classes; i++, map++)
if (class_in_range(dp->class_id, map))
return map->class_names[dp->class_id - map->base];
@@ -1159,7 +1159,7 @@ static int ddebug_proc_show(struct seq_file *m, void *p)
seq_puts(m, "\"");
if (dp->class_id != _DPRINTK_CLASS_DFLT) {
- class = ddebug_class_name(iter, dp);
+ class = ddebug_class_name(iter->table, dp);
if (class)
seq_printf(m, " class:%s", class);
else
--
2.44.0
[PATCH v8 26/35] selftests-dyndbg: add test_mod_submod
This new test-fn runs 3 module/submodule modprobe scenarios, variously
using both the generic dyndbg= modprobe arg, and the
test-module's classmap-params to manipulate the test-mod*'s pr_debugs.
In all cases, the current flag-settings are counted and tested vs
expectations.
The 3rd scenario recapitulates the DRM_USE_DYNAMIC_DEBUG=y failure.
1. 2 modprobes (super then sub), with separate dyndbg=class-settings
check module specific flag settings
2. modprobe submod, supermod is auto-loaded
set supermod class-params
check expected enablements in super & submod
3. modprobe super, with param=setting (like drm.debug=0x1ef)
modprobe submod
validate submod's class'd pr_debugs get properly enabled
The test uses multi-queries, with both commas and percents (to avoid
spaces and quoting). This is the main reason the test wasn't earlier
in the patchset, closer to the classmap patches its validating.
With some tedium, the tests could be refactored to split out early
tests which avoid multi-cmds, and test only the class-params.
Signed-off-by: Jim Cromie
---
.../dynamic_debug/dyndbg_selftest.sh | 60 +++
1 file changed, 60 insertions(+)
diff --git a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
index ddb04c0a7fd2..54acee58cb4e 100755
--- a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
+++ b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
@@ -250,10 +250,70 @@ function test_percent_splitting {
ifrmmod test_dynamic_debug
}
+function test_mod_submod {
+echo -e "${GREEN}# TEST_MOD_SUBMOD ${NC}"
+ifrmmod test_dynamic_debug_submod
+ifrmmod test_dynamic_debug
+ddcmd =_
+
+# modprobe with class enablements
+modprobe test_dynamic_debug
dyndbg=class,D2_CORE,+pf%class,D2_KMS,+pt%class,D2_ATOMIC,+pm
+check_match_ct '\[test_dynamic_debug\]' 23 -r
+check_match_ct =pf 1
+check_match_ct =pt 1
+check_match_ct =pm 1
+
+modprobe test_dynamic_debug_submod
+check_match_ct test_dynamic_debug_submod 23 -r
+check_match_ct '\[test_dynamic_debug\]' 23 -r
+check_match_ct test_dynamic_debug 46 -r
+
+# change classes again, this time submod too
+ddcmd class,D2_CORE,+mf%class,D2_KMS,+lt%class,D2_ATOMIC,+ml "# add some
prefixes"
+check_match_ct =pmf 1 -v
+check_match_ct =plt 1 -v
+check_match_ct =pml 1 -v
+# submod changed too
+check_match_ct =mf 1 -v
+check_match_ct =lt 1 -v
+check_match_ct =ml 1 -v
+
+# now work the classmap-params
+# fresh start, to clear all above flags (test-fn limits)
+ifrmmod test_dynamic_debug_submod
+ifrmmod test_dynamic_debug
+modprobe test_dynamic_debug_submod # get supermod too
+
+echo 1 > /sys/module/test_dynamic_debug/parameters/p_disjoint_bits
+echo 4 > /sys/module/test_dynamic_debug/parameters/p_level_num
+# 2 mods * ( V1-3 + D2_CORE )
+check_match_ct =p 8 -v
+echo 3 > /sys/module/test_dynamic_debug/parameters/p_disjoint_bits
+echo 0 > /sys/module/test_dynamic_debug/parameters/p_level_num
+# 2 mods * ( D2_CORE, D2_DRIVER )
+check_match_ct =p 4 -v
+echo 0x16 > /sys/module/test_dynamic_debug/parameters/p_disjoint_bits
+echo 0 > /sys/module/test_dynamic_debug/parameters/p_level_num
+# 2 mods * ( D2_DRIVER, D2_KMS, D2_ATOMIC )
+check_match_ct =p 6 -v
+
+# recap DRM_USE_DYNAMIC_DEBUG regression
+ifrmmod test_dynamic_debug_submod
+ifrmmod test_dynamic_debug
+# set super-mod params
+modprobe test_dynamic_debug p_disjoint_bits=0x16 p_level_num=5
+check_match_ct =p 7 -v
+modprobe test_dynamic_debug_submod
+# see them picked up by submod
+check_match_ct =p 14 -v
+}
+
tests_list=(
basic_tests
+# these require test_dynamic_debug*.ko
comma_terminator_tests
test_percent_splitting
+test_mod_submod
)
# Run tests
--
2.44.0
[PATCH v8 08/35] dyndbg: split param_set_dyndbg_classes to _module & wrapper fns
Split api-fn: param_set_dyndbg_classes(), adding modname param and
passing NULL in from api-fn.
The new arg allows caller to specify that only one module is affected
by a prdbgs update. This selectivity will be used later to narrow the
scope of changes made.
no functional change.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 37 ++---
1 file changed, 22 insertions(+), 15 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index a1fd2e9dbafb..4a48f830507f 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -711,18 +711,9 @@ static int param_set_dyndbg_classnames(const char *instr,
const struct kernel_pa
return 0;
}
-/**
- * param_set_dyndbg_classes - class FOO >control
- * @instr: string echo>d to sysfs, input depends on map_type
- * @kp:kp->arg has state: bits/lvl, map, map_type
- *
- * Enable/disable prdbgs by their class, as given in the arguments to
- * DECLARE_DYNDBG_CLASSMAP. For LEVEL map-types, enforce relative
- * levels by bitpos.
- *
- * Returns: 0 or <0 if error.
- */
-int param_set_dyndbg_classes(const char *instr, const struct kernel_param *kp)
+static int param_set_dyndbg_module_classes(const char *instr,
+ const struct kernel_param *kp,
+ const char *modnm)
{
const struct ddebug_class_param *dcp = kp->arg;
const struct ddebug_class_map *map = dcp->map;
@@ -759,8 +750,8 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
KP_NAME(kp), inrep,
CLASSMAP_BITMASK(map->length));
inrep &= CLASSMAP_BITMASK(map->length);
}
- v2pr_info("bits:%lx > %s\n", inrep, KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, , dcp->bits,
NULL);
+ v2pr_info("bits:0x%lx > %s.%s\n", inrep, modnm ?: "*",
KP_NAME(kp));
+ totct += ddebug_apply_class_bitmap(dcp, , dcp->bits,
modnm);
*dcp->bits = inrep;
break;
case DD_CLASS_TYPE_LEVEL_NUM:
@@ -773,7 +764,7 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
old_bits = CLASSMAP_BITMASK(*dcp->lvl);
new_bits = CLASSMAP_BITMASK(inrep);
v2pr_info("lvl:%ld bits:0x%lx > %s\n", inrep, new_bits,
KP_NAME(kp));
- totct += ddebug_apply_class_bitmap(dcp, _bits, _bits,
NULL);
+ totct += ddebug_apply_class_bitmap(dcp, _bits, _bits,
modnm);
*dcp->lvl = inrep;
break;
default:
@@ -782,6 +773,22 @@ int param_set_dyndbg_classes(const char *instr, const
struct kernel_param *kp)
vpr_info("%s: total matches: %d\n", KP_NAME(kp), totct);
return 0;
}
+
+/**
+ * param_set_dyndbg_classes - class FOO >control
+ * @instr: string echo>d to sysfs, input depends on map_type
+ * @kp:kp->arg has state: bits/lvl, map, map_type
+ *
+ * Enable/disable prdbgs by their class, as given in the arguments to
+ * DECLARE_DYNDBG_CLASSMAP. For LEVEL map-types, enforce relative
+ * levels by bitpos.
+ *
+ * Returns: 0 or <0 if error.
+ */
+int param_set_dyndbg_classes(const char *instr, const struct kernel_param *kp)
+{
+ return param_set_dyndbg_module_classes(instr, kp, NULL);
+}
EXPORT_SYMBOL(param_set_dyndbg_classes);
/**
--
2.44.0
[PATCH v8 01/35] dyndbg: fix old BUG_ON in >control parser
Fix a BUG_ON from 2009. Even if it looks "unreachable" (I didn't
really look), lets make sure by removing it, doing pr_err and return
-EINVAL instead.
cc: sta...@vger.kernel.org
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index c78f335fa981..f2c5e7910bb1 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -302,7 +302,11 @@ static int ddebug_tokenize(char *buf, char *words[], int
maxwords)
} else {
for (end = buf; *end && !isspace(*end); end++)
;
- BUG_ON(end == buf);
+ if (end == buf) {
+ pr_err("parse err after word:%d=%s\n", nwords,
+ nwords ? words[nwords - 1] : "");
+ return -EINVAL;
+ }
}
/* `buf' is start of word, `end' is one past its end */
--
2.44.0
[PATCH v8 20/35] dyndbg-doc: add classmap info to howto
Describe the 3 API macros providing dynamic_debug's classmaps DYNDBG_CLASSMAP_DEFINE - create, exports a module's classmap DYNDBG_CLASSMAP_USE- refer to exported map DYNDBG_CLASSMAP_PARAM - bind control param to the classmap DYNDBG_CLASSMAP_PARAM_REF + use module's storage - __drm_debug cc: linux-...@vger.kernel.org Signed-off-by: Jim Cromie --- v5 adjustments per Randy Dunlap v7 checkpatch fixes v8 more --- .../admin-guide/dynamic-debug-howto.rst | 63 ++- 1 file changed, 62 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst index 6a8ce5a34382..742eb4230c6e 100644 --- a/Documentation/admin-guide/dynamic-debug-howto.rst +++ b/Documentation/admin-guide/dynamic-debug-howto.rst @@ -225,7 +225,6 @@ the ``p`` flag has meaning, other flags are ignored. Note the regexp ``^[-+=][fslmpt_]+$`` matches a flags specification. To clear all flags at once, use ``=_`` or ``-fslmpt``. - Debug messages during Boot Process == @@ -375,3 +374,65 @@ just a shortcut for ``print_hex_dump(KERN_DEBUG)``. For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is its ``prefix_str`` argument, if it is constant string; or ``hexdump`` in case ``prefix_str`` is built dynamically. + +Dynamic Debug classmaps +=== + +Dyndbg allows selection/grouping of *prdbg* callsites using structural +info: module, file, function, line. Classmaps allow authors to add +their own domain-oriented groupings using class-names. Classmaps are +exported, so they referencable from other modules. + + # enable classes individually + :#> ddcmd class DRM_UT_CORE +p + :#> ddcmd class DRM_UT_KMS +p + # or more selectively + :#> ddcmd class DRM_UT_CORE module drm +p + +The "class FOO" syntax protects class'd prdbgs from generic overwrite:: + + # IOW this doesn't wipe any DRM.debug settings + :#> ddcmd -p + +To support the DRM.debug parameter, DYNDBG_CLASSMAP_PARAM* updates all +classes in a classmap, mapping param-bits 0..N onto the classes: +DRM_UT_<*> for the DRM use-case. + +Dynamic Debug Classmap API +== + +DYNDBG_CLASSMAP_DEFINE - modules use this to create classmaps, naming +each of the classes (stringified enum-symbols: "DRM_UT_<*>"), and +type, and mapping the class-names to consecutive _class_ids. + +By doing so, modules tell dyndbg that they have prdbgs with those +class_ids, and they authorize dyndbg to accept "class FOO" for the +module defining the classmap, and its contained classnames. + +DYNDBG_CLASSMAP_USE - drm drivers invoke this to ref the CLASSMAP that +drm DEFINEs. This shares the classmap definition, and authorizes +dyndbg to apply changes to the user module's class'd pr_debugs. It +also tells dyndbg how to initialize the user's prdbgs at modprobe, +based upon the current setting of the parent's controlling param. + +There are 2 types of classmaps: + + DD_CLASS_TYPE_DISJOINT_BITS: classes are independent, like DRM.debug + DD_CLASS_TYPE_LEVEL_NUM: classes are relative, ordered (V3 > V2) + +DYNDBG_CLASSMAP_PARAM - modelled after module_param_cb, it refers to a +DEFINEd classmap, and associates it to the param's data-store. This +state is then applied to DEFINEr and USEr modules when they're modprobed. + +This interface also enforces the DD_CLASS_TYPE_LEVEL_NUM relation +amongst the contained classnames; all classes are independent in the +control parser itself. + +Modules or module-groups (drm & drivers) can define multiple +classmaps, as long as they share the limited 0..62 per-module-group +_class_id range, without overlap. + +``#define DEBUG`` will enable all pr_debugs in scope, including any +class'd ones. This won't be reflected in the PARAM readback value, +but the class'd pr_debug callsites can be forced off by toggling the +classmap-kparam all-on then all-off. -- 2.44.0
[PATCH v8 16/35] dyndbg-API: fix DECLARE_DYNDBG_CLASSMAP
DECLARE_DYNDBG_CLASSMAP() has a design error; its usage fails a basic
K rule: "define once, refer many times".
It is used across DRM core & drivers, each use re-defines the classmap
understood by that module; and all must match for the modules to
respond together when DRM.debug categories are enabled. This is
brittle, rubbish.
Worse, it causes the CONFIG_DRM_USE_DYNAMIC_DEBUG=Y regression; 1st
drm.ko loads, and dyndbg initializes its DRM.debug callsites, then a
drm-driver loads, but too late - it missed the DRM.debug enablement.
So replace it with 2 macros:
DYNDBG_CLASSMAP_DEFINE - invoked once from core - drm.ko
DYNDBG_CLASSMAP_USE- from all drm drivers and helpers.
DYNDBG_CLASSMAP_DEFINE: it reuses a renamed DECLARE_DYNDBG_CLASSMAP to
construct the struct classmap variable, but it drops the static
qualifier, and exports it instead.
DYNDBG_CLASSMAP_USE: then refers to the exported var by name:
* used from drivers, helper-mods
* lets us drop the repetitive "classname" args
* fixes 2nd-defn problem
* creates a ddebug_class_user record in new __dyndbg_class_users section
this allows ddebug_add_module(etal) to handle them per-module.
DECLARE_DYNDBG_CLASSMAP is preserved temporarily, to decouple DRM
adaptation work and avoid compile-errs before its done. IOW, DRM
gets fixed when they commit the adopt-new-api patches.
The DEFINE,USE distinction, and the separate usage record, allows
dyndbg to initialize the drivers & helpers DRM.debug callsites
separately after each is modprobed.
Basically, the classmap init-scan repeated for classmap-users.
To review, dyndbg's existing __dyndbg_classes[] section does:
. catalogs the classmaps defined by a module (or builtin modules)
. authorizes dyndbg to >control those class'd prdbgs for the module.
. DYNDBG_CLASSMAP_DEFINE creates classmaps in this section.
This patch adds __dyndbg_class_users[] section:
. catalogs uses/references to the classmap definitions.
. authorizes dyndbg to >control those class'd prdbgs in ref'g module.
. DYNDBG_CLASSMAP_USE() creates classmap-user records in this new section.
Now ddebug_add_module(etal) can handle classmap-uses similar to (and
after) classmaps; when a dependent module is loaded, its parent's
kernel params are scanned to find if a param is wired to dyndbg's
param-ops, whose classmap ref is the one being looked for.
To support this, theres a few data/header changes:
new struct ddebug_class_user
contains: user-module-name,
it records drm-driver's use of a classmap in the section, allowing lookup
struct ddebug_info gets 2 more fields to keep the new section with the others:
class_users, num_class_users.
set by dynamic_debug_init() for builtins.
or by kernel/module/main:load_info() for loadable modules.
vmlinux.lds.h: new BOUNDED_SECTION for __dyndbg_class_users
dynamic_debug.c has 2 changes in ddebug_add_module(), ddebug_change():
ddebug_add_module() already calls ddebug_attach_module_classes()
to handle classmaps DEFINEd by a module, now it also calls
ddebug_attach_user_module_classes() to handle USEd classmaps. To
avoid this work when possible, 1st scan the module's descriptors and
count the number of class'd pr_debugs.
ddebug_attach_user_module_classes() scans the module's class_users
section, follows the refs to the parent's classmap, and calls
ddebug_apply_params() on each. It also avoids work by checking the
module's class-ct.
ddebug_apply_params(new fn):
It scans module's/builtin kernel-params, calls ddebug_match_apply_kparam
for each to find the params/sysfs-nodes which may be wired to a classmap.
ddebug_match_apply_kparam(new fn):
1st, it tests the kernel-param.ops is dyndbg's; this guarantees that
the attached arg is a struct ddebug_class_param, which has a ref to
the param's state, and to the classmap defining the param's handling.
2nd, it requires that the classmap ref'd by the kparam is the one
we're called for; modules can use many separate classmaps (as
test_dynamic_debug does).
Then apply the "parent" kparam's setting to the dependent module,
using ddebug_apply_class_bitmap().
ddebug_change(and callees) also gets adjustments:
ddebug_find_valid_class(): This does a search over the module's
classmaps, looking for the class FOO echo'd to >control. So now it
searches over __dyndbg_class_users[] after __dyndbg_classes[].
ddebug_class_name(): return class-names for defined AND used classes.
test_dynamic_debug.c, test_dynamic_debug_submod.c:
This demonstrates the 2 types of classmaps & sysfs-params, following
the 4-part recipe:
1. define an enum for the classmap: DRM.debug has DRM_UT_{CORE,KMS,...}
multiple classes must share 0-62 classid space.
2. DYNDBG_CLASSMAP_DEFINE(.. DRM_UT_{CORE,KMS,...})
3. DYNDBG_CLASSMAP_PARAM* (classmap)
4. DYNDBG_CLASSMAP_USE()
by _submod only, skipping 2,3
Move all the enum declarations together, to better explain how they
share the 0..62 class-id space available to a module (non-overlapping
subranges).
reorg macros 2,3 by name.
[PATCH v8 27/35] selftests-dyndbg: test dyndbg-to-tracefs
Add a series of trace-tests: test_actual_trace() etc, to validate that
the dyndbg-to-tracefs feature (using +T flag) works as intended. The
1st test uses the global tracebuf, the rest use/excercise private
tracebufs.
These tests are currently optional, via "TRACE" arg1, because the
feature code is in-the-lab. But its an objective test, and pretty
user-interface oriented.
IOW this passes:
:#> ./tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
but this fails:
:#> ./tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh TRACE
So its won't break selftests success.
This allows the patch to be committed now w/o inducing selftest
failures, and the tests enabled later, with the promised code.
Signed-off-by: Jim Cromie
Co-developed-by: Łukasz Bartosik
Signed-off-by: Łukasz Bartosik
---
.../dynamic_debug/dyndbg_selftest.sh | 435 ++
1 file changed, 435 insertions(+)
diff --git a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
index 54acee58cb4e..65f31418870f 100755
--- a/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
+++ b/tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
@@ -308,6 +308,405 @@ function test_mod_submod {
check_match_ct =p 14 -v
}
+# tests below here are all actually using dyndbg->trace,
+# and verifying the writes
+
+function test_actual_trace {
+echo -e "${GREEN}# TEST_ACTUAL_TRACE ${NC}"
+ddcmd =_
+echo > /sys/kernel/tracing/trace
+echo 1 >/sys/kernel/tracing/tracing_on
+echo 1 >/sys/kernel/tracing/events/dyndbg/enable
+modprobe test_dynamic_debug dyndbg=class,D2_CORE,+T:0
+search_trace "D2_CORE msg"
+search_trace_name 0 1 "D2_CORE msg"
+check_match_ct =T 1
+tmark "trace-mark"
+search_trace "trace-mark"
+doprints
+search_trace "D2_CORE msg"
+ifrmmod test_dynamic_debug
+}
+
+function self_start {
+echo \# open, modprobe +T:selftest
+ddcmd open selftest
+check_trace_instance_dir selftest 1
+is_trace_instance_opened selftest
+modprobe test_dynamic_debug dyndbg=+T:selftest.mf
+check_match_ct =T:selftest.mf 5
+}
+
+function self_end_normal {
+echo \# disable -T:selftest, rmmod, close
+ddcmd module test_dynamic_debug -T:selftest # leave mf
+check_match_ct =:selftest.mf 5 -v
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+is_trace_instance_closed selftest
+ifrmmod test_dynamic_debug
+}
+
+function self_end_disable_anon {
+echo \# disable, close, rmmod
+ddcmd module test_dynamic_debug -T
+check_match_ct =:selftest.mf 5
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+is_trace_instance_closed selftest
+ifrmmod test_dynamic_debug
+}
+
+function self_end_disable_anon_mf {
+echo \# disable, close, rmmod
+ddcmd module test_dynamic_debug -Tf
+check_match_ct =:selftest.m 5
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+is_trace_instance_closed selftest
+ifrmmod test_dynamic_debug
+}
+
+function self_end_nodisable {
+echo \# SKIPPING: ddcmd module test_dynamic_debug -T:selftest
+ddcmd close selftest fail # close fails because selftest is still being
used
+check_err_msg "Device or resource busy"
+check_match_ct =T:selftest.mf 5
+rmmod test_dynamic_debug
+ddcmd close selftest # now selftest can be closed because rmmod removed
+ # all callsites which were using it
+is_trace_instance_closed selftest
+}
+
+function self_end_delete_directory {
+del_trace_instance_dir selftest 0
+check_err_msg "Device or resource busy"
+ddcmd module test_dynamic_debug -mT:selftest
+check_match_ct =:selftest.f 5
+del_trace_instance_dir selftest 0
+check_err_msg "Device or resource busy"
+ddcmd module test_dynamic_debug +:0
+ddcmd close selftest
+check_trace_instance_dir selftest 1
+is_trace_instance_closed selftest
+del_trace_instance_dir selftest 1
+check_trace_instance_dir selftest 0
+}
+
+function test_early_close () {
+ddcmd open kparm_stream
+ddcmd module usbcore +T:kparm_stream.mf
+check_match_ct =T:usb_stream.mf 161
+echo ":not-running # ddcmd module usbcore -T:kparm_stream.mf"
+ddcmd close kparm_stream
+}
+
+function self_test_ {
+echo "# SELFTEST $1"
+self_start
+self_end_$1
+}
+
+function cycle_tests_normal {
+echo -e "${GREEN}# CYCLE_TESTS_NORMAL ${NC}"
+self_test_ normal # ok
+self_test_ disable_anon # ok
+self_test_ normal # ok
+self_test_ disable_anon_mf # ok
+}
+
+function cycle_not_best_practices {
+echo -e "${GREEN}# CYCLE_TESTS_PROBLEMS ${NC}"
+self_test_ nodisable
+self_test_ normal
+self_test_ delete_directory
+}
+
+# proper life cycle - open, enable:named, disable:named, close
+function test_private_trace_simple_proper {
+echo -e "${GREEN}# TEST_PRIVATE_TRACE_1 ${NC}"
+# ddcmd
[PATCH v8 00/35] fix CONFIG_DRM_USE_DYNAMIC_DEBUG=y regression
hi Greg, Jason, DRM-folk,
This patchset fixes the CONFIG_DRM_USE_DYNAMIC_DEBUG=y regression,
Fixes: bb2ff6c27bc9 ("drm: Disable dynamic debug as broken")
this is v8.
Its also here:
https://github.com/jimc/linux/tree/dd-classmap-fix-8a
v7 had at least 2 problems:
https://lore.kernel.org/lkml/20231101002609.3533731-1-jim.cro...@gmail.com/
https://patchwork.freedesktop.org/series/125066/
1. missing __align(8) in METATDATA macro, giving too much placement
freedom to linker, caused weird segvs following non-ptr vals, but for
builtin modules only. found by lkp-test.
2. the main patch changed both the dyndbg API, and the drm/drivers.
This was a flag-day annoyance, and not practical. Fix by preserving
old API macro until "later", and splitting the patch and set into 2
sequential subsets. removal can wait.
What was broken ?
Booting a modular kernel with drm.debug=0x1ff, this enabled pr_debugs
only in drm itself, not the yet-to-be loaded driver + helpers. I had
tested with scripts doing lots of modprobes with dyndbg=<> options
permuting. I didn't notice that I didn't really test without them.
The deeper cause was my design error, a violation of the K rule:
"define once, refer many times".
DECLARE_DYNDBG_CLASSMAP defined the classmap, and was used everywhere,
re-declaring the same static classmap repeatedly. Jani Nikula actually
picked up on this at the time, but didn't scream loudly enough for
anyone to notice, I know I didn't get it then. One patchset across 2
trees didn't help either.
The revised classmap API "splits" it to def & ref.
DYNDBG_CLASSMAP_DEFINE fixes & updates the busted macro, EXPORTing the
classmap instead. It gets invoked once per subsystem, by the
parent/builtin, drm.ko for DRM.
DYNDBG_CLASSMAP_USE in drivers and helpers refer to the classmap by
name, which links the 2 modules (like __drm_debug already does).
These 2 tell dyndbg to map "class FOO" to the defined FOO_ID, which
allows it to make those changes via >control.
DYNDBG_CLASSMAP_PARAM*, defines the controlling kparam, and binds it
to both the _var, and the _DEFINEd classmap. So drm uses this to bind
the classmap to __drm_debug.
It provides the common control-point for the sub-system; it is applied
to the classmaps during modprobe of both _DEFINEr and USErs. It also
enforces the relative nature of LEVEL classmaps, ie V3>V2.
DECLARE_DYNDBG_CLASSMAP is preserved to decouple the DRM patches.
A new struct and elf section contain the _USEs; on modprobe, these are
scanned similarly to the _DEFINEs, but follow the references to their
defining modules, find the kparam wired to the classmap, and apply its
classmap settings to the USEr. This action is what V1 missed, which
is why drivers failed to enable debug during modprobe.
In order to recapitulate the regression scenario without involving
DRM, the patchset (v6 I think) adds test_dynamic_debug_submod, which
is a duplicate of its parent; _submod.c #defines _SUBMOD, and then
includes parent.
This puts _DEFINE and _USE close together in the same file, for
obviousness. It also guarantees that the submod always has the same
complement of debug()s, giving consistent output from both when
classmaps are working properly, as tested when changing callsites via
both param and >control.
To provide a turn-key selftest, the patchset also adds
./tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh, pilfered
from a debug-to-trace patchset I and Lukasz Bartozik have been working
out. It starts with basic_tests, then to test 2 new parsing
delimiters, which simplify testing of the classmap functionality.
It works nicely from virtme-ng:
[jimc@frodo vx]$ vrun_ --
./tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
doing: vng --verbose --name v6.9-rc5-34-g2f1ace6e1c68 \
--user root --cwd ../.. \
-a dynamic_debug.verbose=2 -p 4 \
-- ./tools/testing/selftests/dynamic_debug/dyndbg_selftest.sh
virtme: waiting for virtiofsd to start
...
[3.546739] ip (260) used greatest stack depth: 12368 bytes left
[3.609288] virtme-init: starting script
test_dynamic_debug_submod not there
test_dynamic_debug not there
# BASIC_TESTS
...
# Done on: Fri Apr 26 20:45:08 MDT 2024
[4.765751] virtme-init: script returned {0}
Powering off.
[4.805790] ACPI: PM: Preparing to enter system sleep state S5
[4.806223] kvm: exiting hardware virtualization
[4.806564] reboot: Power down
[jimc@frodo vx]$
I've been running the kernel on my x86 desktop & laptop, booting with
drm.debug=0x1f, then turning it all-off after sleep 15.
a few highlights from a bare-metal boot:
here modprobe amdgpu; dyndbg applies last bit/class/category, and finishes init,
then drm and amdgpu start logging as they execute
...
[9.019696] gandalf kernel: dyndbg: query 0: "class DRM_UT_ATOMIC +p"
mod:amdgpu
[9.019704] gandalf kernel: dyndbg: class-ref: amdgpu.DRM_UT_ATOMIC
module:amdgpu nd:4754 nc:0 nu:1
[9.020012] gandalf kernel: dyndbg: processed 1 queries, with 21
[PATCH v8 11/35] dyndbg: silence debugs with no-change updates
In ddebug_apply_class_bitmap(), check for actual changes to the bits
before announcing them, to declutter logs.
no functional change.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 368381dbd266..8320cadeb251 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -595,7 +595,7 @@ static int ddebug_exec_queries(char *query, const char
*modname)
return nfound;
}
-/* apply a new bitmap to the sys-knob's current bit-state */
+/* apply a new class-param setting */
static int ddebug_apply_class_bitmap(const struct ddebug_class_param *dcp,
unsigned long *new_bits, unsigned long
*old_bits,
const char *query_modname)
@@ -606,8 +606,9 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
int matches = 0;
int bi, ct;
- v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
- query_modname ?: "");
+ if (*new_bits != *old_bits)
+ v2pr_info("apply bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
+ *old_bits, query_modname ?: "'*'");
for (bi = 0; bi < map->length; bi++) {
if (test_bit(bi, new_bits) == test_bit(bi, old_bits))
@@ -622,8 +623,9 @@ static int ddebug_apply_class_bitmap(const struct
ddebug_class_param *dcp,
v2pr_info("bit_%d: %d matches on class: %s -> 0x%lx\n", bi,
ct, map->class_names[bi], *new_bits);
}
- v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
*old_bits,
- query_modname ?: "");
+ if (*new_bits != *old_bits)
+ v2pr_info("applied bitmap: 0x%lx to: 0x%lx for %s\n", *new_bits,
+ *old_bits, query_modname ?: "'*'");
return matches;
}
--
2.44.0
[PATCH v8 10/35] dyndbg: reduce verbose/debug clutter
currently, for verbose=3, these are logged (blank lines for clarity):
dyndbg: query 0: "class DRM_UT_CORE +p" mod:*
dyndbg: split into words: "class" "DRM_UT_CORE" "+p"
dyndbg: op='+'
dyndbg: flags=0x1
dyndbg: *flagsp=0x1 *maskp=0x
dyndbg: parsed: func="" file="" module="" format="" lineno=0-0 class=...
dyndbg: no matches for query
dyndbg: no-match: func="" file="" module="" format="" lineno=0-0 class=...
dyndbg: processed 1 queries, with 0 matches, 0 errs
That is excessive, so this patch:
- shrinks 3 lines of 2nd stanza to single line
- drops 1st 2 lines of 3rd stanza
3rd line is like 1st, with result, not procedure.
2nd line is just status, retold in 4th, with more info.
New output:
dyndbg: query 0: "class DRM_UT_CORE +p" mod:*
dyndbg: split into words: "class" "DRM_UT_CORE" "+p"
dyndbg: op='+' flags=0x1 *flagsp=0x1 *maskp=0x
dyndbg: no-match: func="" file="" module="" format="" lineno=0-0 class=...
dyndbg: processed 1 queries, with 0 matches, 0 errs
no functional change.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c
index 4a48f830507f..368381dbd266 100644
--- a/lib/dynamic_debug.c
+++ b/lib/dynamic_debug.c
@@ -266,9 +266,6 @@ static int ddebug_change(const struct ddebug_query *query,
}
mutex_unlock(_lock);
- if (!nfound && verbose)
- pr_info("no matches for query\n");
-
return nfound;
}
@@ -501,7 +498,6 @@ static int ddebug_parse_flags(const char *str, struct
flag_settings *modifiers)
pr_err("bad flag-op %c, at start of %s\n", *str, str);
return -EINVAL;
}
- v3pr_info("op='%c'\n", op);
for (; *str ; ++str) {
for (i = ARRAY_SIZE(opt_array) - 1; i >= 0; i--) {
@@ -515,7 +511,6 @@ static int ddebug_parse_flags(const char *str, struct
flag_settings *modifiers)
return -EINVAL;
}
}
- v3pr_info("flags=0x%x\n", modifiers->flags);
/* calculate final flags, mask based upon op */
switch (op) {
@@ -531,7 +526,7 @@ static int ddebug_parse_flags(const char *str, struct
flag_settings *modifiers)
modifiers->flags = 0;
break;
}
- v3pr_info("*flagsp=0x%x *maskp=0x%x\n", modifiers->flags,
modifiers->mask);
+ v3pr_info("op='%c' flags=0x%x maskp=0x%x\n", op, modifiers->flags,
modifiers->mask);
return 0;
}
@@ -541,7 +536,7 @@ static int ddebug_exec_query(char *query_string, const char
*modname)
struct flag_settings modifiers = {};
struct ddebug_query query = {};
#define MAXWORDS 9
- int nwords, nfound;
+ int nwords;
char *words[MAXWORDS];
nwords = ddebug_tokenize(query_string, words, MAXWORDS);
@@ -559,10 +554,7 @@ static int ddebug_exec_query(char *query_string, const
char *modname)
return -EINVAL;
}
/* actually go and implement the change */
- nfound = ddebug_change(, );
- vpr_info_dq(, nfound ? "applied" : "no-match");
-
- return nfound;
+ return ddebug_change(, );
}
/* handle multiple queries in query string, continue on error, return
--
2.44.0
