[Libva] Mailing list moving to a new site: https://lists.01.org/mailman/listinfo/intel-vaapi-media

[Sean V Kelley]

Hello,

In order to consolidate some of our mailing list management with the core
01.org site, we've moved the mailing list to the following site:

https://lists.01.org/mailman/listinfo/intel-vaapi-media

Rather than mass move people who are current subscribers to this list, you
can subscribe to the new list at your leisure.   This list will remain in
archive form.  It will shortly become read only, and members will be mass
unsubscribed with this same message suggesting to subscribe at the new site.

Thanks,

Sean



-- 
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>
Open Source Technology Center / SSG
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Re: [Libva] libyami 1.1.0 release

[Sean V Kelley]

On Friday, January 20, 2017 10:33:03 PM PST you wrote:
> On Friday, January 20, 2017 1:32:36 AM PST Xu, Guangxin wrote:
> > Hi all:
> > 
> > Libyami 1.1.0 released. You can get the code at
> > https://github.com/01org/libyami/releases/tag/libyami-1.1.0
> > https://github.com/01org/libyami-utils/releases/tag/1.1.0
> > 
> > Here is release summary:
> > libyami 1.1.0(API:0.4.0) release, work with libva 1.7.3 release
> > =
> > We add following major features:
> > +3daae20 add Hue, Saturation, Brightness and Contrast to vpp
> > +0c8299c fix memory leak issue in v4l2
> > +71ec018 fix h264 baseline encoder fail issue
> > +d39104d fix h264/h265 encoder generate invalid frame for long GOP
> > +c7364f0 add h265 10 bits encoder
> > 
> > We change API from 0.3.2 to 0.4.0 since following interface changes
> > +7c6050b add enablePrefixNalUnit to h264 encoder
> > +3daae20 add Hue, Saturation, Brightness and Contrast to vpp
> > +c7364f0 add h265 10 bits encoder
> > 
> > 
> > This release brought you by:
> > Halley Zhao
> > He Qiang
> > Li Zhijian
> > Linda Yu
> > Sebastian Ramacher
> > U. Artie Eoff
> > Wu Dongping
> > Xu Guangxin
> > Yu Jiankang
> > 
> > Best Regards.
> > 
> > 
> > From: libyami [mailto:libyami-boun...@lists.01.org] On Behalf Of Xu,
> > Guangxin Sent: Friday, November 11, 2016 3:12 PM
> > To: 'liby...@lists.01.org' ;
> > libva@lists.freedesktop.org Cc: Luo, Focus ; Chehab,
> > John ; Zhuang, Lena 
> > Subject:
> > [libyami] libyami 1.0.1 release
> > 
> > Hi all:
> > We have released a minor version for H264 SVC Temporal (frame rate)
> > scalability encoder (https://en.wikipedia.org/wiki/Scalable_Video_Coding).
> > 
> > We implemented a subset for SVC-T, which includes following features:
> > 1.SVC-T hierarchical P coding.
> > (http://iphome.hhi.de/wiegand/assets/pdfs/2010_12_PCS_h264.pdf) 2.
> > 
> >   CQP and per layer CBR bitrate control. Maximum 4 layers supported.(This
> > 
> > need libva 1.7.3)
> > 
> > It will make generated stream tolerable  to transmission errors. Two
> > target
> > usages will get direct benefit from this. Video chat or DSS(digital
> > security and surveillance).
> > 
> > You can have a try.
> > 
> > 
> > Best Regards.
> > 
> > 
> > 
> > libyami 1.0.1(API:0.3.2) release, work with libva 1.7.3 release
> > =
> > This release mainly for SVC-T CBR support.We add following features:
> > +0a241d2 add h264 SVC-T CBR support. This need libva 1.7.3.
> > +77ba612 fix h264/h265 nalread issue in 32 bits arch
> > +2c1fcf3 h264parser: change luma_weight_lx from int8_t to int16_t to avoid
> > overflow +e2a9e07 vp8parser: fix one decoder conformance issue.
> > +fb83012 make yocto buildable
> > +518088e add wireframe function to ocl filters
> > +other small issues.
> > 
> > We change API from 0.3.0 to 0.3.2 since following interface change
> > +518088e add wireframe function to ocl filters
> > +0a241d2 add h264 SVC-T CBR support.
> > 
> > 
> > From: Xu, Guangxin
> > Sent: Friday, September 30, 2016 10:43 AM
> > To: 'liby...@lists.01.org'
> > >;
> > 'media-internal-de...@linux.intel.com'
> >  > t
> > el.com>>; libva@lists.freedesktop.org
> > Cc: Chehab, John >;
> > Zhuang, Lena >; Li,
> > Jocelyn >; Xiang, Haihao
> > >; Kelley, Sean V
> > >; Luo, Focus
> > > Subject: libyami 1.0.0
> > release
> > 
> > Hi all:
> > We define libyami as lightweight media infrastructure, which is YUMMY to
> > your video experience on Linux like platform. We want it have small
> > footprint, fully utilize our hardware capability and have easy to use
> > interface. After 3 years collaboration from both Intel and community, we
> > think libyami fulfilled our original concept ; we will release it as 1.0
> > 
> > Thanks to everyone who contribute to libyami project, without your
> > valuable
> > work. We cannot reach this milestone.
> > 
> > If you are not try libyami yet. You see detailed information at
> > https://github.com/01org/libyami/blob/apache/README
> > 
> > Best Regards.
> > 
> > 
> > libyami 1.0.0(API:0.3.0) release, work with libva 2016Q3 release
> > =
> > We add following major features:
> > + 7423a97 add vp9 encoder
> > + f6f1483 add sharpening, denoise, deinterlace for vpp
> > + 366d909 add support for 422H, 422V and 444P
> > + 2d4a536 add wayland support to v4l2decoder
> > + 784ea0f improve h264 encoder speed for memory limited system
> > + e57989f improve mpeg2 pass rate from 70% to 

[Libva] [PATCH V1] libva-intel-driver: fix i965 encoder wrong bits shift operation

[Sean V Kelley]

From: Kuang-che Wu <k...@chromium.org>

shift uint32_t by 32 bits is undefined behavior.

For this particular case: when invoke avc_bitstream_put_ui() with 32
bits value at byte position of multiple of 4, existing 32 bits garbage
data in the buffer may be retained instead of cleared. The result is,
the position of NALU start code (0x0001) looks like overwritten by
garbage value.

Patch has been tested and used upstream:
https://chromium-review.googlesource.com/#/c/410541/

Signed-off-by: Kuang-che Wu <k...@chromium.org>
Signed-off-by: Sean V Kelley <sea...@posteo.de>
---
 src/i965_encoder_utils.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/i965_encoder_utils.c b/src/i965_encoder_utils.c
index ac58cd1..8db1b87 100644
--- a/src/i965_encoder_utils.c
+++ b/src/i965_encoder_utils.c
@@ -134,7 +134,11 @@ avc_bitstream_put_ui(avc_bitstream *bs, unsigned int val, 
int size_in_bits)
 bs->buffer[pos] = (bs->buffer[pos] << size_in_bits | val);
 } else {
 size_in_bits -= bit_left;
-bs->buffer[pos] = (bs->buffer[pos] << bit_left) | (val >> 
size_in_bits);
+if (bit_left == 32) {
+bs->buffer[pos] = val;
+} else {
+bs->buffer[pos] = (bs->buffer[pos] << bit_left) | (val >> 
size_in_bits);
+}
 bs->buffer[pos] = swap32(bs->buffer[pos]);
 
 if (pos + 1 == bs->max_size_in_dword) {
-- 
2.11.0

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Re: [Libva] [PATCH] libva-intel-driver: fix i965 encoder wrong bits shift operation

[Sean V Kelley]

On Tue, Jan 17, 2017 at 6:48 PM, Xiang, Haihao <haihao.xi...@intel.com>
wrote:

> On Tue, 2017-01-17 at 13:15 -0800, Sean V Kelley wrote:
> > From: Kuang-che Wu <k...@chromium.org>
> >
> > shift uint32_t by 32 bits is undefined behavior.
> >
> > For this particular case: when invoke avc_bitstream_put_ui() with 32
> > bits value at byte position of multiple of 4, existing 32 bits garbage
> > data in the buffer may be retained instead of cleared. The result is,
> > the position of NALU start code (0x0001) looks like overwritten by
> > garbage value.
> >
> > Patch has been tested and used upstream:
> > https://chromium-review.googlesource.com/#/c/410541/
> >
> > Signed-off-by: Kuang-che Wu <k...@chromium.org>
> > Signed-off-by: Sean V Kelley <sea...@posteo.de>
> > ---
> >  src/i965_encoder_utils.c | 6 +-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/i965_encoder_utils.c b/src/i965_encoder_utils.c
> > index ac58cd1a..e061d071 100644
> > --- a/src/i965_encoder_utils.c
> > +++ b/src/i965_encoder_utils.c
> > @@ -134,7 +134,11 @@ avc_bitstream_put_ui(avc_bitstream *bs, unsigned
> int val, int size_in_bits)
> >  bs->buffer[pos] = (bs->buffer[pos] << size_in_bits | val);
> >  } else {
> >  size_in_bits -= bit_left;
> > -bs->buffer[pos] = (bs->buffer[pos] << bit_left) | (val >>
> size_in_bits);
> > +if (bit_left == 32) {
> > +bs->buffer[pos] = (val >> size_in_bits);
>
> The input value of size_in_bits should be less than or equal to 32, so now
> the
> value of size_in_bits is 0 for this case, I think  "bs->buffer[pos] = val"
> is
> more clear.
>

That's a reasonable change.  Thanks Haihao.  I'll update the patch.

Sean


>
> > +} else {
> > +bs->buffer[pos] = (bs->buffer[pos] << bit_left) | (val >>
> size_in_bits);
> > +}
> >  bs->buffer[pos] = swap32(bs->buffer[pos]);
> >
> >  if (pos + 1 == bs->max_size_in_dword) {
> ___
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[Libva] [PATCH] libva-intel-driver: fix i965 encoder wrong bits shift operation

[Sean V Kelley]

From: Kuang-che Wu <k...@chromium.org>

shift uint32_t by 32 bits is undefined behavior.

For this particular case: when invoke avc_bitstream_put_ui() with 32
bits value at byte position of multiple of 4, existing 32 bits garbage
data in the buffer may be retained instead of cleared. The result is,
the position of NALU start code (0x0001) looks like overwritten by
garbage value.

Patch has been tested and used upstream:
https://chromium-review.googlesource.com/#/c/410541/

Signed-off-by: Kuang-che Wu <k...@chromium.org>
Signed-off-by: Sean V Kelley <sea...@posteo.de>
---
 src/i965_encoder_utils.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/i965_encoder_utils.c b/src/i965_encoder_utils.c
index ac58cd1a..e061d071 100644
--- a/src/i965_encoder_utils.c
+++ b/src/i965_encoder_utils.c
@@ -134,7 +134,11 @@ avc_bitstream_put_ui(avc_bitstream *bs, unsigned int val, 
int size_in_bits)
 bs->buffer[pos] = (bs->buffer[pos] << size_in_bits | val);
 } else {
 size_in_bits -= bit_left;
-bs->buffer[pos] = (bs->buffer[pos] << bit_left) | (val >> 
size_in_bits);
+if (bit_left == 32) {
+bs->buffer[pos] = (val >> size_in_bits);
+} else {
+bs->buffer[pos] = (bs->buffer[pos] << bit_left) | (val >> 
size_in_bits);
+}
 bs->buffer[pos] = swap32(bs->buffer[pos]);
 
 if (pos + 1 == bs->max_size_in_dword) {
-- 
2.11.0

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Re: [Libva] [LIBVA-INTEL-DRIVER PATCH 1/5] H264 Encoding:Free aux_batchbuffer to configure access domain correctly for PAK_OBJ command buffer

[Sean V Kelley]

On Tue, 2017-01-17 at 08:40 +0800, Zhao Yakui wrote:
> The access domain is not configured correctly for PAK_OBJ command
> buffer.
> And it causes that the buffer content is not synchronized correctly.
> 
> At the same time the 64-byte is aligned for the boundary between
> CPU and GPU access instead of 16-byte.
> 
> Signed-off-by: Zhao Yakui 


Reviewed and tested all five patches in this series on core Linux and
Chrome.  lgtm, applied.

Thanks,

Sean

> ---
>  src/gen8_mfc.c | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/src/gen8_mfc.c b/src/gen8_mfc.c
> index 8e68c7c..7efe66e 100644
> --- a/src/gen8_mfc.c
> +++ b/src/gen8_mfc.c
> @@ -1562,7 +1562,7 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP
> ctx,
>  
>  intel_avc_slice_insert_packed_data(ctx, encode_state,
> encoder_context, slice_index, slice_batch);
>  
> -intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword
> */
> +intel_batchbuffer_align(slice_batch, 64); /* aligned by an
> Cache-line */
>  head_offset = intel_batchbuffer_used_size(slice_batch);
>  
>  slice_batch->ptr += pSliceParameter->num_macroblocks *
> AVC_PAK_LEN_IN_BYTE;
> @@ -1576,7 +1576,7 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP
> ctx,
>  
>  
>  /* Aligned for tail */
> -intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword
> */
> +intel_batchbuffer_align(slice_batch, 64); /* aligned by Cache-
> line */
>  if (last_slice) {
>  mfc_context->insert_object(ctx,
> encoder_context,
> @@ -1637,6 +1637,9 @@
> gen8_mfc_avc_batchbuffer_pipeline(VADriverContextP ctx,
>  OUT_BATCH(batch, CMD_MEDIA_STATE_FLUSH);
>  OUT_BATCH(batch, 0);
>  ADVANCE_BATCH(batch);
> +
> +intel_batchbuffer_free(slice_batch);
> +mfc_context->aux_batchbuffer = NULL;
>  }
>  
>  intel_batchbuffer_end_atomic(batch);


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Re: [Libva] [PATCH 00/31] Encoder Architecture Changes (Primarily AVC)

[Sean V Kelley]

On Wed, Jan 11, 2017 at 11:15 AM, Mark Thompson <s...@jkqxz.net> wrote:

> On 10/01/17 23:37, Sean V Kelley wrote:
> > Encoder architecture restructuring for H.264 (with some impact to HEVC
> now) on HSW+
> > * Improvements to the shaders
> > * Improvements to the B frame efficiency
> > * Improvements to the low bit rate mode
> > * Improved features in two stage VME/PAK pipeline
> >
> >
> > Pengfei Qu (31):
> >   ENC: move gpe related function into src/i965_gpe_utils.h/c
> >   ENC: add common structure for AVC/HEVC encoder
> >   ENC:add context init function for AVC/HEVC encoder
> >   ENC: add const data/table for AVC encoder
> >   ENC: add AVC kernel binary on SKL
>
> This patch (5/31) is missing?  (Not in the archive either: <
> https://lists.freedesktop.org/archives/libva/2017-January/thread.html>.)
>
> Looks like it is this part:
>
> >  src/gen9_avc_encoder.h |  2345 
> >  src/gen9_avc_encoder_kernels.c | 12081 ++
> +
>
> so maybe it was rejected by the ML for being too big?
>


Yes, I need to just approve it in the mailing list moderation.

Sean



>
> Thanks,
>
> - Mark
> ___________
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Re: [Libva] [PATCH 2/4] Set the pipeline to use the new VP8 encoding shaders on BSW

[Sean V Kelley]

On Tue, Jan 10, 2017 at 4:21 PM, Mark Thompson <s...@jkqxz.net> wrote:

> On 10/01/17 22:02, Sean V Kelley wrote:
> > From: "Xiang, Haihao" <haihao.xi...@intel.com>
> >
> > Currently only one temporal layer is supported
> >
> > Signed-off-by: Xiang, Haihao <haihao.xi...@intel.com>
> > Reviewed-by: Sean V Kelley <sea...@posteo.de>
> > ---
> >  src/Makefile.am|3 +
> >  src/gen8_encoder_vp8.c |  140 +
> >  src/gen8_mfc.c |8 +-
> >  src/gen8_vme.c |5 +
> >  src/i965_defines.h |   10 +
> >  src/i965_encoder.c |2 +
> >  src/i965_encoder_vp8.c | 6697 ++
> ++
> >  src/i965_encoder_vp8.h | 2643 +++
> >  8 files changed, 9507 insertions(+), 1 deletion(-)
>
> I had a go with this on Kaby Lake.  In general, big win - looks like it
> can be under half the bitrate at comparable quality (though it was pretty
> terrible before...).
>
> However, the rate control seems to do odd things at low bitrate relative
> to the frame size?  I can get GPU hangs and wildly varying output bitrate
> with it, though it seems ok at high bitrate.
>

That's a concern.  Please report the If it really is a GPU hang, I need the
error report for the DRM card0 log.

cat /sys/class/drm/card0/error

Please rerun and capture the DRM (i915) card0 error log.


>
> I had a look around the rate control and found two minor issues in the RC
> configuration, though I don't think either of them are relevant to my
> problem (see below).  I can try to make a reproducer if this is not already
> known?
>
> Please do attempt to reproduce.  That's why I've put the patches out here
to test.

Thanks,

Sean


> Thanks,
>
> - Mark
>
>
> > ...
> > +
> > +static void
> > +i965_encoder_vp8_get_misc_parameters(VADriverContextP ctx,
> > + struct encode_state *encode_state,
> > + struct intel_encoder_context
> *encoder_context)
> > +{
> > +struct i965_encoder_vp8_context *vp8_context =
> encoder_context->vme_context;
> > +
> > +if (vp8_context->internal_rate_mode == I965_BRC_CQP) {
> > +vp8_context->init_vbv_buffer_fullness_in_bit = 0;
> > +vp8_context->vbv_buffer_size_in_bit = 0;
> > +vp8_context->target_bit_rate = 0;
> > +vp8_context->max_bit_rate = 0;
> > +vp8_context->min_bit_rate = 0;
> > +vp8_context->brc_need_reset = 0;
> > +} else {
> > +vp8_context->gop_size = encoder_context->brc.gop_size;
> > +
> > +if (encoder_context->brc.need_reset) {
> > +vp8_context->framerate = encoder_context->brc.framerate[0];
> > +vp8_context->vbv_buffer_size_in_bit =
> encoder_context->brc.hrd_buffer_size;
> > +vp8_context->init_vbv_buffer_fullness_in_bit =
> encoder_context->brc.hrd_initial_buffer_fullness;
> > +vp8_context->max_bit_rate = 
> > encoder_context->brc.bits_per_second[0];
> // currently only one layer is supported
> > +vp8_context->brc_need_reset = (vp8_context->brc_initted &&
> encoder_context->brc.need_reset);
> > +
> > +if (vp8_context->internal_rate_mode == I965_BRC_CBR) {
> > +vp8_context->min_bit_rate = vp8_context->max_bit_rate;
> > +vp8_context->target_bit_rate =
> vp8_context->max_bit_rate;
> > +} else {
> > +assert(vp8_context->internal_rate_mode ==
> I965_BRC_VBR);
> > +vp8_context->min_bit_rate = vp8_context->max_bit_rate *
> (2 * encoder_context->brc.target_percentage[0] - 100) / 100;
>
> If target percentage is < 50 then (2 * 
> encoder_context->brc.target_percentage[0]
> - 100) is negative.  Since it's unsigned, you end up with a garbage number
> in min_bit_rate.
>

That's a concern, also we may need to reconcile this with our handling for
VP9 encode.


>
> > +vp8_context->target_bit_rate =
> vp8_context->max_bit_rate * encoder_context->brc.target_percentage[0] /
> 100;
> > +}
> > +}
> > +}
> > +
> > +if (encoder_context->quality_level == ENCODER_LOW_QUALITY)
> > +vp8_context->hme_16x_supported = 0;
> > +}
> > +
> > ...
> > +
> > +static void
> > +i965_encoder_vp8_vme_brc_init_reset_set_curbe(VADriverContextP ctx,
> > +

[Libva] [PATCH 31/31] ENC:support more quality level and switch to new AVC encoder solution on SKL

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Signed-off-by: Sean V Kelley <sea...@posteo.de>
---
 src/Makefile.am  | 11 +++
 src/i965_drv_video.c |  8 ++--
 src/i965_drv_video.h |  2 ++
 src/i965_encoder.c   | 39 +++
 4 files changed, 50 insertions(+), 10 deletions(-)

diff --git a/src/Makefile.am b/src/Makefile.am
index 424812b3..9a5e44bc 100755
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -101,6 +101,11 @@ source_c = \
gen9_vp9_encoder_kernels.c  \
gen9_vp9_const_def.c  \
gen9_vp9_encoder.c  \
+   i965_avc_encoder_common.c  \
+   i965_encoder_common.c  \
+   gen9_avc_encoder_kernels.c  \
+   gen9_avc_const_def.c  \
+   gen9_avc_encoder.c  \
intel_common_vpp_internal.c   \
$(NULL)
 
@@ -154,6 +159,12 @@ source_h = \
gen9_vp9_encapi.h   \
gen9_vp9_const_def.h  \
gen9_vp9_encoder_kernels.h   \
+   i965_encoder_api.h   \
+   i965_avc_encoder_common.h   \
+   i965_encoder_common.h   \
+   gen9_avc_encoder.h   \
+   gen9_avc_const_def.h  \
+   gen9_avc_encoder_kernels.h   \
intel_gen_vppapi.h   \
intel_common_vpp_internal.h   \
$(NULL)
diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index cc371905..64cc0e20 100644
--- a/src/i965_drv_video.c
+++ b/src/i965_drv_video.c
@@ -911,6 +911,7 @@ i965_GetConfigAttributes(VADriverContextP ctx,
  VAConfigAttrib *attrib_list,  /* in/out */
  int num_attribs)
 {
+struct i965_driver_data * const i965 = i965_driver_data(ctx);
 VAStatus va_status;
 int i;
 
@@ -1003,8 +1004,11 @@ i965_GetConfigAttributes(VADriverContextP ctx,
 attrib_list[i].value = 1;
 if (profile == VAProfileH264ConstrainedBaseline ||
 profile == VAProfileH264Main ||
-profile == VAProfileH264High )
-attrib_list[i].value = ENCODER_QUALITY_RANGE;
+profile == VAProfileH264High ){
+attrib_list[i].value = ENCODER_QUALITY_RANGE;
+if(IS_GEN9(i965->intel.device_info))
+attrib_list[i].value = ENCODER_QUALITY_RANGE_AVC;
+}
 break;
 }
 break;
diff --git a/src/i965_drv_video.h b/src/i965_drv_video.h
index 7cba3a37..334b7882 100644
--- a/src/i965_drv_video.h
+++ b/src/i965_drv_video.h
@@ -69,7 +69,9 @@
 #define DEFAULT_SATURATION  50
 
 #define ENCODER_QUALITY_RANGE 2
+#define ENCODER_QUALITY_RANGE_AVC 8
 #define ENCODER_DEFAULT_QUALITY   1
+#define ENCODER_DEFAULT_QUALITY_AVC   4
 #define ENCODER_HIGH_QUALITY  ENCODER_DEFAULT_QUALITY
 #define ENCODER_LOW_QUALITY   2
 
diff --git a/src/i965_encoder.c b/src/i965_encoder.c
index 0a648d4d..beac9115 100644
--- a/src/i965_encoder.c
+++ b/src/i965_encoder.c
@@ -41,6 +41,7 @@
 #include "gen6_mfc.h"
 
 #include "i965_post_processing.h"
+#include "i965_encoder_api.h"
 
 static struct intel_fraction
 reduce_fraction(struct intel_fraction f)
@@ -789,6 +790,7 @@ 
intel_encoder_check_temporal_layer_structure(VADriverContextP ctx,
 
 static VAStatus
 intel_encoder_check_misc_parameter(VADriverContextP ctx,
+  VAProfile profile,
   struct encode_state *encode_state,
   struct intel_encoder_context 
*encoder_context)
 {
@@ -800,12 +802,23 @@ intel_encoder_check_misc_parameter(VADriverContextP ctx,
 VAEncMiscParameterBufferQualityLevel* param_quality_level = 
(VAEncMiscParameterBufferQualityLevel*)pMiscParam->data;
 encoder_context->quality_level = param_quality_level->quality_level;
 
-if (encoder_context->quality_level == 0)
-encoder_context->quality_level = ENCODER_DEFAULT_QUALITY;
-else if (encoder_context->quality_level > 
encoder_context->quality_range) {
-ret = VA_STATUS_ERROR_INVALID_PARAMETER;
-goto out;
+switch (profile) {
+case VAProfileH264ConstrainedBaseline:
+case VAProfileH264Main:
+case VAProfileH264High:
+if (encoder_context->quality_level == 0)
+encoder_context->quality_level = ENCODER_DEFAULT_QUALITY_AVC;
+break;
+default:
+if (encoder_context->quality_level == 0)
+encoder_context->quality_level = ENCODER_DEFAULT_QUALITY;
+break;
 }
+
+ if (encoder_context->quality_level > encoder_context->quality_range) {
+ ret = VA_STATUS_ERROR_INVALID_PARAMETER;
+ goto out;
+ }

[Libva] [PATCH 25/31] ENC: add MFX command for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 399 +
 1 file changed, 399 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 629a0dab..8b11c5a3 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -5625,3 +5625,402 @@ gen9_avc_kernel_init(VADriverContextP ctx,
 generic_ctx->pfn_send_sfd_surface = gen9_avc_send_surface_sfd;
 generic_ctx->pfn_send_wp_surface = gen9_avc_send_surface_wp;
 }
+
+/*
+PAK pipeline related function
+*/
+extern int
+intel_avc_enc_slice_type_fixup(int slice_type);
+
+static void
+gen9_mfc_avc_pipe_mode_select(VADriverContextP ctx,
+  struct encode_state *encode_state,
+  struct intel_encoder_context *encoder_context)
+{
+struct encoder_vme_mfc_context * pak_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )pak_context->private_enc_ctx;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )pak_context->generic_enc_state;
+struct intel_batchbuffer *batch = encoder_context->base.batch;
+
+BEGIN_BCS_BATCH(batch, 5);
+
+OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2));
+OUT_BCS_BATCH(batch,
+  (0 << 29) |
+  (MFX_LONG_MODE << 17) |   /* Must be long format for 
encoder */
+  (MFD_MODE_VLD << 15) |
+  (0 << 13) |   /* VDEnc mode  is 1*/
+  ((generic_state->curr_pak_pass != 
(generic_state->num_pak_passes -1)) << 10) |   /* Stream-Out 
Enable */
+  ((!!avc_ctx->res_post_deblocking_output.bo) << 9)  |/* 
Post Deblocking Output */
+  ((!!avc_ctx->res_pre_deblocking_output.bo) << 8)  | /* 
Pre Deblocking Output */
+  (0 << 7)  |   /* Scaled surface enable */
+  (0 << 6)  |   /* Frame statistics stream out 
enable, always '1' in VDEnc mode */
+  (0 << 5)  |   /* not in stitch mode */
+  (1 << 4)  |   /* encoding mode */
+  (MFX_FORMAT_AVC << 0));
+OUT_BCS_BATCH(batch,
+  (0 << 7)  | /* expand NOA bus flag */
+  (0 << 6)  | /* disable slice-level clock gating */
+  (0 << 5)  | /* disable clock gating for NOA */
+  (0 << 4)  | /* terminate if AVC motion and POC table error 
occurs */
+  (0 << 3)  | /* terminate if AVC mbdata error occurs */
+  (0 << 2)  | /* terminate if AVC CABAC/CAVLC decode error 
occurs */
+  (0 << 1)  |
+  (0 << 0));
+OUT_BCS_BATCH(batch, 0);
+OUT_BCS_BATCH(batch, 0);
+
+ADVANCE_BCS_BATCH(batch);
+}
+
+static void
+gen9_mfc_avc_surface_state(VADriverContextP ctx,
+   struct intel_encoder_context *encoder_context,
+   struct i965_gpe_resource *gpe_resource,
+   int id)
+{
+struct intel_batchbuffer *batch = encoder_context->base.batch;
+
+BEGIN_BCS_BATCH(batch, 6);
+
+OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2));
+OUT_BCS_BATCH(batch, id);
+OUT_BCS_BATCH(batch,
+  ((gpe_resource->height - 1) << 18) |
+  ((gpe_resource->width - 1) << 4));
+OUT_BCS_BATCH(batch,
+  (MFX_SURFACE_PLANAR_420_8 << 28) |/* 420 planar YUV 
surface */
+  (1 << 27) |   /* must be 1 for 
interleave U/V, hardware requirement */
+  ((gpe_resource->pitch - 1) << 3) |/* pitch */
+  (0 << 2)  |   /* must be 0 for 
interleave U/V */
+  (1 << 1)  |   /* must be tiled */
+  (I965_TILEWALK_YMAJOR << 0)); /* tile walk, 
TILEWALK_YMAJOR */
+OUT_BCS_BATCH(batch,
+  (0 << 16) |  /* must be 0 for 
interleave U/V */
+  (gpe_resource->y_cb_offset)); /* y offset for U(cb) 
*/
+OUT_BCS_BATCH(batch,
+  (0 << 16) |  /* must be 0 for 
interleave U/V */
+  (gpe_resource->y_cb_offset)); /* y offset for U(cb) 
*/
+
+ADVANCE_BCS_BATCH(batch);
+}
+
+static void
+gen9_mfc_avc_pipe_buf_addr_state(VADriverContextP ctx, struct 
intel_encoder_context *encoder_context)
+

[Libva] [PATCH 27/31] ENC: add MFX Picture/slice level command init for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 213 +
 1 file changed, 213 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index ccbd26cc..f0da2d89 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -6585,3 +6585,216 @@ gen9_mfc_avc_weightoffset_state(VADriverContextP ctx,
 ADVANCE_BCS_BATCH(batch);
 }
 }
+
+static void
+gen9_mfc_avc_single_slice(VADriverContextP ctx,
+  struct encode_state *encode_state,
+  struct intel_encoder_context *encoder_context,
+  VAEncSliceParameterBufferH264 *slice_param,
+  VAEncSliceParameterBufferH264 *next_slice_param,
+  int slice_index)
+{
+VAEncPictureParameterBufferH264 *pic_param = 
(VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
+struct gpe_mi_batch_buffer_start_parameter second_level_batch;
+struct intel_batchbuffer *batch = encoder_context->base.batch;
+struct object_surface *obj_surface;
+struct gen9_surface_avc *avc_priv_surface;
+
+gen9_mfc_avc_ref_idx_state(ctx, encode_state, encoder_context, 
slice_param);
+gen9_mfc_avc_weightoffset_state(ctx,
+encode_state,
+encoder_context,
+pic_param,
+slice_param);
+gen9_mfc_avc_slice_state(ctx,
+ encode_state,
+ encoder_context,
+ pic_param,
+ slice_param,
+ next_slice_param);
+gen9_mfc_avc_inset_headers(ctx,
+   encode_state,
+   encoder_context,
+   slice_param,
+   slice_index);
+/* insert mb code as second levle.*/
+obj_surface = encode_state->reconstructed_object;
+assert(obj_surface->private_data);
+avc_priv_surface = (struct gen9_surface_avc *)obj_surface->private_data;
+
+memset(_level_batch, 0, sizeof(second_level_batch));
+second_level_batch.is_second_level = 1; /* Must be the second level batch 
buffer */
+second_level_batch.offset = slice_param->macroblock_address * 16 * 4;
+second_level_batch.bo = avc_priv_surface->res_mb_code_surface.bo;
+gen8_gpe_mi_batch_buffer_start(ctx, batch, _level_batch);
+
+}
+
+static void
+gen9_avc_pak_slice_level(VADriverContextP ctx,
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
+{
+struct intel_batchbuffer *batch = encoder_context->base.batch;
+struct gpe_mi_flush_dw_parameter mi_flush_dw_params;
+VAEncSliceParameterBufferH264 *slice_param, *next_slice_param, 
*next_slice_group_param;
+int i, j;
+int slice_index = 0;
+int is_frame_level = 1;   /* TODO: check it for SKL,now single slice 
per frame */
+int has_tail = 0; /* TODO: check it later */
+
+for (j = 0; j < encode_state->num_slice_params_ext; j++) {
+slice_param = (VAEncSliceParameterBufferH264 
*)encode_state->slice_params_ext[j]->buffer;
+
+if (j == encode_state->num_slice_params_ext - 1)
+next_slice_group_param = NULL;
+else
+next_slice_group_param = (VAEncSliceParameterBufferH264 
*)encode_state->slice_params_ext[j + 1]->buffer;
+
+for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) {
+if (i < encode_state->slice_params_ext[j]->num_elements - 1)
+next_slice_param = slice_param + 1;
+else
+next_slice_param = next_slice_group_param;
+
+gen9_mfc_avc_single_slice(ctx,
+  encode_state,
+  encoder_context,
+  slice_param,
+  next_slice_param,
+  slice_index);
+slice_param++;
+slice_index++;
+
+if (is_frame_level)
+break;
+else {
+/* TODO: remove assert(0) and add other commands here */
+assert(0);
+}
+}
+
+if (is_frame_level)
+break;
+}
+
+if (has_tail) {
+/* TODO: insert a tail if required */
+}
+
+memset(_flush_dw_params, 0, sizeof(mi_flush_dw_params));
+mi_flush_dw_params.video_pipeline_cache_invalidate = 1;
+gen8_gpe_mi_flush_dw(ctx, batch, _flush_dw_params);
+}
+static void
+gen9_avc_pak_picture_level

[Libva] [PATCH 26/31] ENC: add MFX command for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 561 +
 1 file changed, 561 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 8b11c5a3..ccbd26cc 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -6024,3 +6024,564 @@ gen9_mfc_avc_fqm_state(VADriverContextP ctx,
 gen9_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, fqm, 32, 
encoder_context);
 }
 }
+
+static void
+gen9_mfc_avc_insert_object(VADriverContextP ctx,
+   struct intel_encoder_context *encoder_context,
+   unsigned int *insert_data, int lenght_in_dws, int 
data_bits_in_last_dw,
+   int skip_emul_byte_count, int is_last_header, int 
is_end_of_slice, int emulation_flag,
+   int slice_header_indicator)
+{
+struct intel_batchbuffer *batch = encoder_context->base.batch;
+
+if (data_bits_in_last_dw == 0)
+   data_bits_in_last_dw = 32;
+
+BEGIN_BCS_BATCH(batch, lenght_in_dws + 2);
+
+OUT_BCS_BATCH(batch, MFX_INSERT_OBJECT | (lenght_in_dws));
+OUT_BCS_BATCH(batch,
+  (0 << 16) |   /* always start at offset 0 */
+  (slice_header_indicator << 14) |
+  (data_bits_in_last_dw << 8) |
+  (skip_emul_byte_count << 4) |
+  (!!emulation_flag << 3) |
+  ((!!is_last_header) << 2) |
+  ((!!is_end_of_slice) << 1) |
+  (0 << 0));/* TODO: check this flag */
+intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4);
+
+ADVANCE_BCS_BATCH(batch);
+}
+
+static void
+gen9_mfc_avc_insert_slice_packed_data(VADriverContextP ctx,
+  struct encode_state *encode_state,
+  struct intel_encoder_context 
*encoder_context,
+  int slice_index)
+{
+VAEncPackedHeaderParameterBuffer *param = NULL;
+unsigned int length_in_bits;
+unsigned int *header_data = NULL;
+int count, i, start_index;
+int slice_header_index;
+
+if (encode_state->slice_header_index[slice_index] == 0)
+slice_header_index = -1;
+else
+slice_header_index = (encode_state->slice_header_index[slice_index] & 
SLICE_PACKED_DATA_INDEX_MASK);
+
+count = encode_state->slice_rawdata_count[slice_index];
+start_index = (encode_state->slice_rawdata_index[slice_index] & 
SLICE_PACKED_DATA_INDEX_MASK);
+
+for (i = 0; i < count; i++) {
+unsigned int skip_emul_byte_cnt;
+
+header_data = (unsigned int 
*)encode_state->packed_header_data_ext[start_index + i]->buffer;
+
+param = (VAEncPackedHeaderParameterBuffer 
*)(encode_state->packed_header_params_ext[start_index + i]->buffer);
+
+/* skip the slice header packed data type as it is lastly inserted */
+if (param->type == VAEncPackedHeaderSlice)
+continue;
+
+length_in_bits = param->bit_length;
+
+skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char 
*)header_data, length_in_bits);
+
+/* as the slice header is still required, the last header flag is set 
to
+ * zero.
+ */
+gen9_mfc_avc_insert_object(ctx,
+   encoder_context,
+   header_data,
+   ALIGN(length_in_bits, 32) >> 5,
+   length_in_bits & 0x1f,
+   skip_emul_byte_cnt,
+   0,
+   0,
+   !param->has_emulation_bytes,
+   0);
+}
+
+if (slice_header_index == -1) {
+VAEncSequenceParameterBufferH264 *seq_param = 
(VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer;
+VAEncPictureParameterBufferH264 *pic_param = 
(VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
+VAEncSliceParameterBufferH264 *slice_params = 
(VAEncSliceParameterBufferH264 
*)encode_state->slice_params_ext[slice_index]->buffer;
+unsigned char *slice_header = NULL;
+int slice_header_length_in_bits = 0;
+
+/* No slice header data is passed. And the driver needs to generate it 
*/
+/* For the Normal H264 */
+slice_header_length_in_bits = build_avc_slice_header(seq_param,
+ pic_param,
+ slice_params,
+ _header);
+ 

[Libva] [PATCH 24/31] ENC: VME pipeline init/prepare/run function for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 442 +
 1 file changed, 442 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 04cf30f0..629a0dab 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -5183,3 +5183,445 @@ gen9_avc_encode_check_parameter(VADriverContextP ctx,
 
 return VA_STATUS_SUCCESS;
 }
+
+static VAStatus
+gen9_avc_vme_gpe_kernel_prepare(VADriverContextP ctx,
+struct encode_state *encode_state,
+struct intel_encoder_context *encoder_context)
+{
+VAStatus va_status;
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->private_enc_ctx;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+
+struct object_surface *obj_surface;
+struct object_buffer *obj_buffer;
+VAEncSliceParameterBufferH264 * slice_param = avc_state->slice_param[0];
+VAEncPictureParameterBufferH264  *pic_param = avc_state->pic_param;
+struct i965_coded_buffer_segment *coded_buffer_segment;
+
+struct gen9_surface_avc *avc_priv_surface;
+dri_bo *bo;
+struct avc_surface_param surface_param;
+int i,j = 0;
+unsigned char * pdata;
+
+/* Setup current reconstruct frame */
+obj_surface = encode_state->reconstructed_object;
+va_status = i965_check_alloc_surface_bo(ctx, obj_surface, 1, 
VA_FOURCC_NV12, SUBSAMPLE_YUV420);
+
+if (va_status != VA_STATUS_SUCCESS)
+return va_status;
+memset(_param,0,sizeof(surface_param));
+surface_param.frame_width = generic_state->frame_width_in_pixel;
+surface_param.frame_height = generic_state->frame_height_in_pixel;
+va_status = gen9_avc_init_check_surfaces(ctx,
+ obj_surface,
+ encoder_context,
+ _param);
+if (va_status != VA_STATUS_SUCCESS)
+return va_status;
+{
+/* init the member of avc_priv_surface,frame_store_id,qp_value*/
+   avc_priv_surface = (struct gen9_surface_avc *)obj_surface->private_data;
+   avc_state->top_field_poc[NUM_MFC_AVC_DMV_BUFFERS-2] = 0;
+   avc_state->top_field_poc[NUM_MFC_AVC_DMV_BUFFERS-1] = 0;
+   
i965_free_gpe_resource(_ctx->res_direct_mv_buffersr[NUM_MFC_AVC_DMV_BUFFERS-2]);
+   
i965_free_gpe_resource(_ctx->res_direct_mv_buffersr[NUM_MFC_AVC_DMV_BUFFERS-1]);
+   
i965_dri_object_to_buffer_gpe_resource(_ctx->res_direct_mv_buffersr[NUM_MFC_AVC_DMV_BUFFERS-2],avc_priv_surface->dmv_top);
+   
i965_dri_object_to_buffer_gpe_resource(_ctx->res_direct_mv_buffersr[NUM_MFC_AVC_DMV_BUFFERS-1],avc_priv_surface->dmv_bottom);
+   dri_bo_reference(avc_priv_surface->dmv_top);
+   dri_bo_reference(avc_priv_surface->dmv_bottom);
+   avc_priv_surface->qp_value = pic_param->pic_init_qp + 
slice_param->slice_qp_delta;
+   avc_priv_surface->frame_store_id = 0;
+   avc_priv_surface->frame_idx = pic_param->CurrPic.frame_idx;
+   avc_priv_surface->top_field_order_cnt = 
pic_param->CurrPic.TopFieldOrderCnt;
+   avc_priv_surface->is_as_ref = 
pic_param->pic_fields.bits.reference_pic_flag;
+   avc_state->top_field_poc[NUM_MFC_AVC_DMV_BUFFERS-2] = 
avc_priv_surface->top_field_order_cnt;
+   avc_state->top_field_poc[NUM_MFC_AVC_DMV_BUFFERS-1] = 
avc_priv_surface->top_field_order_cnt + 1;
+}
+i965_free_gpe_resource(_ctx->res_reconstructed_surface);
+
i965_object_surface_to_2d_gpe_resource(_ctx->res_reconstructed_surface, 
obj_surface);
+
+/* input YUV surface*/
+obj_surface = encode_state->input_yuv_object;
+va_status = i965_check_alloc_surface_bo(ctx, obj_surface, 1, 
VA_FOURCC_NV12, SUBSAMPLE_YUV420);
+
+if (va_status != VA_STATUS_SUCCESS)
+return va_status;
+i965_free_gpe_resource(_ctx->res_uncompressed_input_surface);
+
i965_object_surface_to_2d_gpe_resource(_ctx->res_uncompressed_input_surface,
 obj_surface);
+
+/* Reference surfaces */
+for (i = 0; i < ARRAY_ELEMS(avc_ctx->list_reference_res); i++) {
+i965_free_gpe_resource(_ctx->list_reference_res[i]);
+i965_free_gpe_resource(_ctx->res_direct_mv_buffersr[i*2]);
+i965_free_gpe_resource(_ctx->res_direct_mv_buffersr[i*2 + 1]);
+obj_surface = encode_state->reference_objects[i];
+avc_state->top_field_poc[2

[Libva] [PATCH 28/31] ENC: add MFX pipeline init/prepare/run for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 311 +
 1 file changed, 311 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index f0da2d89..8aff0c8b 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -6798,3 +6798,314 @@ gen9_avc_read_mfc_status(VADriverContextP ctx, struct 
intel_encoder_context *enc
 
 return;
 }
+
+static void
+gen9_avc_pak_brc_prepare(struct encode_state *encode_state,
+  struct intel_encoder_context *encoder_context)
+{
+struct encoder_vme_mfc_context * pak_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )pak_context->generic_enc_state;
+unsigned int rate_control_mode = encoder_context->rate_control_mode;
+
+switch (rate_control_mode & 0x7f) {
+case VA_RC_CBR:
+generic_state->internal_rate_mode = INTEL_BRC_CBR;
+break;
+
+case VA_RC_VBR:
+generic_state->internal_rate_mode = INTEL_BRC_VBR;//AVBR
+break;
+
+case VA_RC_CQP:
+default:
+generic_state->internal_rate_mode = INTEL_BRC_CQP;
+break;
+}
+
+}
+
+static VAStatus
+gen9_avc_pak_pipeline_prepare(VADriverContextP ctx,
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
+{
+VAStatus va_status;
+struct i965_driver_data *i965 = i965_driver_data(ctx);
+struct encoder_vme_mfc_context * pak_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )pak_context->private_enc_ctx;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )pak_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)pak_context->private_enc_state;
+
+struct object_surface *obj_surface;
+VAEncPictureParameterBufferH264  *pic_param = avc_state->pic_param;
+VAEncSliceParameterBufferH264 *slice_param = avc_state->slice_param[0];
+
+struct gen9_surface_avc *avc_priv_surface;
+int i, j, enable_avc_ildb = 0;
+unsigned int allocate_flag = 1;
+unsigned int size;
+unsigned int w_mb = generic_state->frame_width_in_mbs;
+unsigned int h_mb = generic_state->frame_height_in_mbs;
+struct avc_surface_param surface_param;
+
+/* update the parameter and check slice parameter */
+for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == 
0; j++) {
+assert(encode_state->slice_params_ext && 
encode_state->slice_params_ext[j]->buffer);
+slice_param = (VAEncSliceParameterBufferH264 
*)encode_state->slice_params_ext[j]->buffer;
+
+for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) {
+assert((slice_param->slice_type == SLICE_TYPE_I) ||
+   (slice_param->slice_type == SLICE_TYPE_SI) ||
+   (slice_param->slice_type == SLICE_TYPE_P) ||
+   (slice_param->slice_type == SLICE_TYPE_SP) ||
+   (slice_param->slice_type == SLICE_TYPE_B));
+
+if (slice_param->disable_deblocking_filter_idc != 1) {
+enable_avc_ildb = 1;
+break;
+}
+
+slice_param++;
+}
+}
+avc_state->enable_avc_ildb = enable_avc_ildb;
+
+/* setup the all surface and buffer for PAK */
+/* Setup current reconstruct frame */
+obj_surface = encode_state->reconstructed_object;
+va_status = i965_check_alloc_surface_bo(ctx, obj_surface, 1, 
VA_FOURCC_NV12, SUBSAMPLE_YUV420);
+
+if (va_status != VA_STATUS_SUCCESS)
+return va_status;
+memset(_param,0,sizeof(surface_param));
+surface_param.frame_width = generic_state->frame_width_in_pixel;
+surface_param.frame_height = generic_state->frame_height_in_pixel;
+va_status = gen9_avc_init_check_surfaces(ctx,
+ obj_surface,encoder_context,
+ _param);
+if (va_status != VA_STATUS_SUCCESS)
+return va_status;
+/* init the member of avc_priv_surface,frame_store_id,qp_value */
+{
+   avc_priv_surface = (struct gen9_surface_avc *)obj_surface->private_data;
+   avc_state->top_field_poc[NUM_MFC_AVC_DMV_BUFFERS-2] = 0;
+   avc_state->top_field_poc[NUM_MFC_AVC_DMV_BUFFERS-1] = 0;
+   
i965_free_gpe_resource(_ctx->res_direct_mv_buffersr[NUM_MFC_AVC_DMV_BUFFERS-2]);
+   
i965_free_gpe_resource(_ctx->res_direct_mv_buffersr[NUM

[Libva] [PATCH 14/31] ENC: add const data/table init function for AVC RC logic

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 434 +
 1 file changed, 434 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index e27d8eb5..878345ee 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -1496,3 +1496,437 @@ gen9_avc_kernel_scaling(VADriverContextP ctx,
 
 return VA_STATUS_SUCCESS;
 }
+/*
+frame/mb brc related function
+*/
+static void
+gen9_avc_init_mfx_avc_img_state(VADriverContextP ctx,
+struct encode_state *encode_state,
+struct intel_encoder_context *encoder_context,
+struct gen9_mfx_avc_img_state *pstate)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+
+VAEncSequenceParameterBufferH264 *seq_param = avc_state->seq_param;
+VAEncPictureParameterBufferH264  *pic_param = avc_state->pic_param;
+
+memset(pstate, 0, sizeof(*pstate));
+
+pstate->dw0.dword_length = (sizeof(struct gen9_mfx_avc_img_state)) / 4 -2;
+pstate->dw0.sub_opcode_b = 0;
+pstate->dw0.sub_opcode_a = 0;
+pstate->dw0.command_opcode = 1;
+pstate->dw0.pipeline = 2;
+pstate->dw0.command_type = 3;
+
+pstate->dw1.frame_size_in_mbs = generic_state->frame_width_in_mbs * 
generic_state->frame_height_in_mbs ;
+
+pstate->dw2.frame_width_in_mbs_minus1 = generic_state->frame_width_in_mbs 
- 1;
+pstate->dw2.frame_height_in_mbs_minus1 = 
generic_state->frame_height_in_mbs - 1;
+
+pstate->dw3.image_structure = 0;//frame is zero
+pstate->dw3.weighted_bipred_idc = 
pic_param->pic_fields.bits.weighted_bipred_idc;
+pstate->dw3.weighted_pred_flag = 
pic_param->pic_fields.bits.weighted_pred_flag;
+pstate->dw3.brc_domain_rate_control_enable = 0;//1,set for vdenc;
+pstate->dw3.chroma_qp_offset = pic_param->chroma_qp_index_offset;
+pstate->dw3.second_chroma_qp_offset = 
pic_param->second_chroma_qp_index_offset;
+
+pstate->dw4.field_picture_flag = 0;
+pstate->dw4.mbaff_mode_active = 
seq_param->seq_fields.bits.mb_adaptive_frame_field_flag;
+pstate->dw4.frame_mb_only_flag = 
seq_param->seq_fields.bits.frame_mbs_only_flag;
+pstate->dw4.transform_8x8_idct_mode_flag = 
pic_param->pic_fields.bits.transform_8x8_mode_flag;
+pstate->dw4.direct_8x8_interface_flag = 
seq_param->seq_fields.bits.direct_8x8_inference_flag;
+pstate->dw4.constrained_intra_prediction_flag = 
pic_param->pic_fields.bits.constrained_intra_pred_flag;
+pstate->dw4.entropy_coding_flag = 
pic_param->pic_fields.bits.entropy_coding_mode_flag;
+pstate->dw4.mb_mv_format_flag = 1;
+pstate->dw4.chroma_format_idc = 
seq_param->seq_fields.bits.chroma_format_idc;
+pstate->dw4.mv_unpacked_flag = 1;
+pstate->dw4.insert_test_flag = 0;
+pstate->dw4.load_slice_pointer_flag = 0;
+pstate->dw4.macroblock_stat_enable = 0;/* disable in the first 
pass */
+pstate->dw4.minimum_frame_size = 0;
+pstate->dw5.intra_mb_max_bit_flag = 1;
+pstate->dw5.inter_mb_max_bit_flag = 1;
+pstate->dw5.frame_size_over_flag = 1;
+pstate->dw5.frame_size_under_flag = 1;
+pstate->dw5.intra_mb_ipcm_flag = 1;
+pstate->dw5.mb_rate_ctrl_flag = 0; /* Always 0 in VDEnc mode */
+pstate->dw5.non_first_pass_flag = 0;
+pstate->dw5.aq_enable = pstate->dw5.aq_rounding = 0;
+pstate->dw5.aq_chroma_disable = 1;
+if(pstate->dw4.entropy_coding_flag && (avc_state->tq_enable))
+{
+pstate->dw5.aq_enable = avc_state->tq_enable;
+pstate->dw5.aq_rounding = avc_state->tq_rounding;
+}else
+{
+pstate->dw5.aq_rounding = 0;
+}
+
+pstate->dw6.intra_mb_max_size = 2700;
+pstate->dw6.inter_mb_max_size = 4095;
+
+pstate->dw8.slice_delta_qp_max0 = 0;
+pstate->dw8.slice_delta_qp_max1 = 0;
+pstate->dw8.slice_delta_qp_max2 = 0;
+pstate->dw8.slice_delta_qp_max3 = 0;
+
+pstate->dw9.slice_delta_qp_min0 = 0;
+pstate->dw9.slice_delta_qp_min1 = 0;
+pstate->dw9.slice_delta_qp_min2 = 0;
+pstate->dw9.slice_delta_qp_min3 = 0;
+
+pstate->dw10.frame_bitrate_min = 0;
+pstate->dw10.frame_bitrate_min_unit = 1;
+pstate->dw10.frame_bitrate_min_unit_mode = 1;
+pstate->dw10.frame_bitrate_max = (1 << 14) - 1;
+pstate->dw10.fra

[Libva] [PATCH 19/31] ENC: MBENC kernel for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 927 +
 1 file changed, 927 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index cd847a88..af581fc7 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -2844,3 +2844,930 @@ gen9_avc_load_mb_brc_const_data(VADriverContextP ctx,
 }
 i965_unmap_gpe_resource(gpe_resource);
 }
+
+static void
+gen9_avc_set_curbe_mbenc(VADriverContextP ctx,
+ struct encode_state *encode_state,
+ struct i965_gpe_context *gpe_context,
+ struct intel_encoder_context *encoder_context,
+ void * param)
+{
+struct i965_driver_data *i965 = i965_driver_data(ctx);
+gen9_avc_mbenc_curbe_data *cmd;
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+
+VAEncSliceParameterBufferH264 * slice_param = avc_state->slice_param[0];
+VAEncPictureParameterBufferH264  *pic_param = avc_state->pic_param;
+VASurfaceID surface_id;
+struct object_surface *obj_surface;
+
+struct mbenc_param * curbe_param = (struct mbenc_param *)param ;
+unsigned char qp = 0;
+unsigned char me_method = 0;
+unsigned int mbenc_i_frame_dist_in_use = 
curbe_param->mbenc_i_frame_dist_in_use;
+unsigned int table_idx = 0;
+
+unsigned int preset = generic_state->preset;
+me_method = (generic_state->frame_type == SLICE_TYPE_B)? 
gen9_avc_b_me_method[preset]:gen9_avc_p_me_method[preset];
+qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
+
+cmd = (gen9_avc_mbenc_curbe_data *)i965_gpe_context_map_curbe(gpe_context);
+memset(cmd,0,sizeof(gen9_avc_mbenc_curbe_data));
+
+if(mbenc_i_frame_dist_in_use)
+{
+
memcpy(cmd,gen9_avc_mbenc_curbe_i_frame_dist_init_data,sizeof(gen9_avc_mbenc_curbe_data));
+
+}else
+{
+switch(generic_state->frame_type)
+{
+case SLICE_TYPE_I:
+
memcpy(cmd,gen9_avc_mbenc_curbe_normal_i_frame_init_data,sizeof(gen9_avc_mbenc_curbe_data));
+break;
+case SLICE_TYPE_P:
+
memcpy(cmd,gen9_avc_mbenc_curbe_normal_p_frame_init_data,sizeof(gen9_avc_mbenc_curbe_data));
+break;
+case SLICE_TYPE_B:
+
memcpy(cmd,gen9_avc_mbenc_curbe_normal_b_frame_init_data,sizeof(gen9_avc_mbenc_curbe_data));
+break;
+default:
+assert(0);
+}
+
+}
+cmd->dw0.adaptive_enable = gen9_avc_enable_adaptive_search[preset];
+cmd->dw37.adaptive_enable = gen9_avc_enable_adaptive_search[preset];
+cmd->dw0.t8x8_flag_for_inter_enable = 
pic_param->pic_fields.bits.transform_8x8_mode_flag;
+cmd->dw37.t8x8_flag_for_inter_enable = 
pic_param->pic_fields.bits.transform_8x8_mode_flag;
+
+cmd->dw2.max_len_sp = gen9_avc_max_len_sp[preset];
+cmd->dw38.max_len_sp = 0;
+
+cmd->dw3.src_access = 0;
+cmd->dw3.ref_access = 0;
+
+if(avc_state->ftq_enable && (generic_state->frame_type != SLICE_TYPE_I))
+{
+if(avc_state->ftq_override)
+{
+cmd->dw3.ftq_enable = avc_state->ftq_enable;
+
+}else
+{
+if(generic_state->frame_type == SLICE_TYPE_P)
+{
+cmd->dw3.ftq_enable = gen9_avc_max_ftq_based_skip[preset] & 
0x01;
+
+}else
+{
+cmd->dw3.ftq_enable = (gen9_avc_max_ftq_based_skip[preset] >> 
1) & 0x01;
+}
+}
+}else
+{
+cmd->dw3.ftq_enable = 0;
+}
+
+if(avc_state->disable_sub_mb_partion)
+cmd->dw3.sub_mb_part_mask = 0x7;
+
+if(mbenc_i_frame_dist_in_use)
+{
+cmd->dw2.pitch_width = generic_state->downscaled_width_4x_in_mb;
+cmd->dw4.picture_height_minus1 = 
generic_state->downscaled_height_4x_in_mb - 1;
+cmd->dw5.slice_mb_height = (avc_state->slice_height + 4 - 1)/4;
+cmd->dw6.batch_buffer_end = 0;
+cmd->dw31.intra_compute_type = 1;
+
+}else
+{
+cmd->dw2.pitch_width = generic_state->frame_width_in_mbs;
+cmd->dw4.picture_height_minus1 = generic_state->frame_height_in_mbs - 
1;
+cmd->dw5.slice_mb_height = 
(avc_state->arbitrary_num_mbs_in_slice)?generic_state->frame_height_in_mbs:avc_state->slice_height;
+
+{
+
memcpy(&(cmd->dw8),gen9_avc_mode_mv_cost_table[slice_type_kernel[g

[Libva] [PATCH 08/31] ENC: add misc parameter check for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 548 +
 1 file changed, 548 insertions(+)
 create mode 100755 src/gen9_avc_encoder.c

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
new file mode 100755
index ..8f1ad79f
--- /dev/null
+++ b/src/gen9_avc_encoder.c
@@ -0,0 +1,548 @@
+/*
+ * Copyright ? 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWAR
+ *
+ * Authors:
+ *Pengfei Qu <pengfei...@intel.com>
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "intel_batchbuffer.h"
+#include "intel_driver.h"
+
+#include "i965_defines.h"
+#include "i965_structs.h"
+#include "i965_drv_video.h"
+#include "i965_encoder.h"
+#include "i965_encoder_utils.h"
+#include "intel_media.h"
+
+#include "i965_gpe_utils.h"
+#include "i965_encoder_common.h"
+#include "i965_avc_encoder_common.h"
+#include "gen9_avc_encoder_kernels.h"
+#include "gen9_avc_encoder.h"
+#include "gen9_avc_const_def.h"
+
+#define MAX_URB_SIZE4096 /* In register */
+#define NUM_KERNELS_PER_GPE_CONTEXT 1
+#define MBENC_KERNEL_BASE GEN9_AVC_KERNEL_MBENC_QUALITY_I
+
+#define OUT_BUFFER_2DW(batch, bo, is_target, delta)  do {   \
+if (bo) {   \
+OUT_BCS_RELOC(batch,\
+bo, \
+I915_GEM_DOMAIN_INSTRUCTION,\
+is_target ? I915_GEM_DOMAIN_INSTRUCTION : 0, \
+delta); \
+OUT_BCS_BATCH(batch, 0);\
+} else {\
+OUT_BCS_BATCH(batch, 0);\
+OUT_BCS_BATCH(batch, 0);\
+}   \
+} while (0)
+
+#define OUT_BUFFER_3DW(batch, bo, is_target, delta, attr)  do { \
+OUT_BUFFER_2DW(batch, bo, is_target, delta);\
+OUT_BCS_BATCH(batch, attr); \
+} while (0)
+
+
+static const uint32_t qm_flat[16] = {
+0x10101010, 0x10101010, 0x10101010, 0x10101010,
+0x10101010, 0x10101010, 0x10101010, 0x10101010,
+0x10101010, 0x10101010, 0x10101010, 0x10101010,
+0x10101010, 0x10101010, 0x10101010, 0x10101010
+};
+
+static const uint32_t fqm_flat[32] = {
+0x10001000, 0x10001000, 0x10001000, 0x10001000,
+0x10001000, 0x10001000, 0x10001000, 0x10001000,
+0x10001000, 0x10001000, 0x10001000, 0x10001000,
+0x10001000, 0x10001000, 0x10001000, 0x10001000,
+0x10001000, 0x10001000, 0x10001000, 0x10001000,
+0x10001000, 0x10001000, 0x10001000, 0x10001000,
+0x10001000, 0x10001000, 0x10001000, 0x10001000,
+0x10001000, 0x10001000, 0x10001000, 0x10001000
+};
+
+static unsigned int slice_type_kernel[3] = {1,2,0};
+
+const gen9_avc_brc_init_reset_curbe_data 
gen9_avc_brc_init_reset_curbe_init_data =
+{
+// unsigned int 0
+{
+0
+},
+
+// unsigned int 1
+{
+0
+},
+
+// unsigned int 2
+{
+0
+},
+
+// unsigned int 3
+{
+0
+},
+
+// unsigned int 4
+{
+0
+},
+
+// unsigned int 5
+{
+0
+},
+
+// unsigned int 6
+{
+0
+},
+
+// unsigned int 7
+{
+0
+},
+
+  

[Libva] [PATCH 12/31] ENC: add kernel media object related functions for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 175 +
 1 file changed, 175 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 692cd8e2..cf1b1234 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -1020,3 +1020,178 @@ gen9_avc_free_resources(struct encoder_vme_mfc_context 
* vme_context)
 }
 
 }
+
+static void
+gen9_avc_run_kernel_media_object(VADriverContextP ctx,
+ struct intel_encoder_context *encoder_context,
+ struct i965_gpe_context *gpe_context,
+ int media_function,
+ struct gpe_media_object_parameter *param)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->private_enc_ctx;
+
+struct intel_batchbuffer *batch = encoder_context->base.batch;
+struct encoder_status_buffer_internal *status_buffer;
+struct gpe_mi_store_data_imm_parameter mi_store_data_imm;
+
+if (!batch)
+return;
+
+intel_batchbuffer_start_atomic(batch, 0x1000);
+
+status_buffer = &(avc_ctx->status_buffer);
+memset(_store_data_imm, 0, sizeof(mi_store_data_imm));
+mi_store_data_imm.bo = status_buffer->bo;
+mi_store_data_imm.offset = status_buffer->media_index_offset;
+mi_store_data_imm.dw0 = media_function;
+gen8_gpe_mi_store_data_imm(ctx, batch, _store_data_imm);
+
+intel_batchbuffer_emit_mi_flush(batch);
+gen9_gpe_pipeline_setup(ctx, gpe_context, batch);
+gen8_gpe_media_object(ctx, gpe_context, batch, param);
+gen8_gpe_media_state_flush(ctx, gpe_context, batch);
+
+gen9_gpe_pipeline_end(ctx, gpe_context, batch);
+
+intel_batchbuffer_end_atomic(batch);
+
+intel_batchbuffer_flush(batch);
+}
+
+static void
+gen9_avc_run_kernel_media_object_walker(VADriverContextP ctx,
+struct intel_encoder_context 
*encoder_context,
+struct i965_gpe_context *gpe_context,
+int media_function,
+struct gpe_media_object_walker_parameter 
*param)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->private_enc_ctx;
+
+struct intel_batchbuffer *batch = encoder_context->base.batch;
+struct encoder_status_buffer_internal *status_buffer;
+struct gpe_mi_store_data_imm_parameter mi_store_data_imm;
+
+if (!batch)
+return;
+
+intel_batchbuffer_start_atomic(batch, 0x1000);
+
+intel_batchbuffer_emit_mi_flush(batch);
+
+status_buffer = &(avc_ctx->status_buffer);
+memset(_store_data_imm, 0, sizeof(mi_store_data_imm));
+mi_store_data_imm.bo = status_buffer->bo;
+mi_store_data_imm.offset = status_buffer->media_index_offset;
+mi_store_data_imm.dw0 = media_function;
+gen8_gpe_mi_store_data_imm(ctx, batch, _store_data_imm);
+
+gen9_gpe_pipeline_setup(ctx, gpe_context, batch);
+gen8_gpe_media_object_walker(ctx, gpe_context, batch, param);
+gen8_gpe_media_state_flush(ctx, gpe_context, batch);
+
+gen9_gpe_pipeline_end(ctx, gpe_context, batch);
+
+intel_batchbuffer_end_atomic(batch);
+
+intel_batchbuffer_flush(batch);
+}
+
+static void
+gen9_init_gpe_context_avc(VADriverContextP ctx,
+  struct i965_gpe_context *gpe_context,
+  struct encoder_kernel_parameter *kernel_param)
+{
+struct i965_driver_data *i965 = i965_driver_data(ctx);
+
+gpe_context->curbe.length = kernel_param->curbe_size; // in bytes
+
+gpe_context->sampler.entry_size = 0;
+gpe_context->sampler.max_entries = 0;
+
+if (kernel_param->sampler_size) {
+gpe_context->sampler.entry_size = ALIGN(kernel_param->sampler_size, 
64);
+gpe_context->sampler.max_entries = 1;
+}
+
+gpe_context->idrt.entry_size = ALIGN(sizeof(struct 
gen8_interface_descriptor_data), 64); // 8 dws, 1 register
+gpe_context->idrt.max_entries = NUM_KERNELS_PER_GPE_CONTEXT;
+
+gpe_context->surface_state_binding_table.max_entries = 
MAX_AVC_ENCODER_SURFACES;
+gpe_context->surface_state_binding_table.binding_table_offset = 0;
+gpe_context->surface_state_binding_table.surface_state_offset = 
ALIGN(MAX_AVC_ENCODER_SURFACES * 4, 64);
+gpe_context->surface_state_binding_table.length = 
ALIGN(MAX_AVC_ENCODER_SURFACES * 4, 64) + ALIGN(MAX_AVC_ENCODER_SURFACES * 
SURFACE_STATE_PADDED_SIZE_GE

[Libva] [PATCH 29/31] ENC: add VME/MFX context init for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 298 +
 1 file changed, 298 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 8aff0c8b..7f73c95e 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -7109,3 +7109,301 @@ gen9_avc_pak_context_destroy(void * context)
 i965_free_gpe_resource(_ctx->res_direct_mv_buffersr[i]);
 }
 }
+
+static VAStatus
+gen9_avc_get_coded_status(VADriverContextP ctx,
+  struct intel_encoder_context *encoder_context,
+  struct i965_coded_buffer_segment *coded_buf_seg)
+{
+struct encoder_status *avc_encode_status;
+
+if (!encoder_context || !coded_buf_seg)
+return VA_STATUS_ERROR_INVALID_BUFFER;
+
+avc_encode_status = (struct encoder_status 
*)coded_buf_seg->codec_private_data;
+coded_buf_seg->base.size = avc_encode_status->bs_byte_count;
+
+return VA_STATUS_SUCCESS;
+}
+
+Bool
+gen9_avc_vme_context_init(VADriverContextP ctx, struct intel_encoder_context 
*encoder_context)
+{
+/* VME & PAK share the same context */
+struct encoder_vme_mfc_context * vme_context = NULL;
+struct generic_encoder_context * generic_ctx = NULL;
+struct gen9_avc_encoder_context * avc_ctx = NULL;
+struct generic_enc_codec_state * generic_state = NULL;
+struct avc_enc_state * avc_state = NULL;
+struct encoder_status_buffer_internal *status_buffer;
+uint32_t base_offset = offsetof(struct i965_coded_buffer_segment, 
codec_private_data);
+
+vme_context = calloc(1, sizeof(struct encoder_vme_mfc_context));
+generic_ctx = calloc(1, sizeof(struct generic_encoder_context));
+avc_ctx = calloc(1, sizeof(struct gen9_avc_encoder_context));
+generic_state = calloc(1, sizeof(struct generic_enc_codec_state));
+avc_state = calloc(1, sizeof(struct avc_enc_state));
+
+if(!vme_context || !generic_ctx || !avc_ctx || !generic_state || 
!avc_state)
+goto allocate_structure_failed;
+
+memset(vme_context,0,sizeof(struct encoder_vme_mfc_context));
+memset(generic_ctx,0,sizeof(struct generic_encoder_context));
+memset(avc_ctx,0,sizeof(struct gen9_avc_encoder_context));
+memset(generic_state,0,sizeof(struct generic_enc_codec_state));
+memset(avc_state,0,sizeof(struct avc_enc_state));
+
+encoder_context->vme_context = vme_context;
+vme_context->generic_enc_ctx = generic_ctx;
+vme_context->private_enc_ctx = avc_ctx;
+vme_context->generic_enc_state = generic_state;
+vme_context->private_enc_state = avc_state;
+
+avc_ctx->ctx = ctx;
+/* initialize misc ? */
+generic_ctx->use_hw_scoreboard = 1;
+generic_ctx->use_hw_non_stalling_scoreboard = 1;
+
+/* initialize generic state */
+
+generic_state->kernel_mode = INTEL_ENC_KERNEL_NORMAL;
+generic_state->preset = INTEL_PRESET_RT_SPEED;
+generic_state->seq_frame_number = 0;
+generic_state->total_frame_number = 0;
+generic_state->frame_type = 0;
+generic_state->first_frame = 1;
+
+generic_state->frame_width_in_pixel = 0;
+generic_state->frame_height_in_pixel = 0;
+generic_state->frame_width_in_mbs = 0;
+generic_state->frame_height_in_mbs = 0;
+generic_state->frame_width_4x = 0;
+generic_state->frame_height_4x = 0;
+generic_state->frame_width_16x = 0;
+generic_state->frame_height_16x = 0;
+generic_state->frame_width_32x = 0;
+generic_state->downscaled_width_4x_in_mb = 0;
+generic_state->downscaled_height_4x_in_mb = 0;
+generic_state->downscaled_width_16x_in_mb = 0;
+generic_state->downscaled_height_16x_in_mb = 0;
+generic_state->downscaled_width_32x_in_mb = 0;
+generic_state->downscaled_height_32x_in_mb = 0;
+
+generic_state->hme_supported = 1;
+generic_state->b16xme_supported = 1;
+generic_state->b32xme_supported = 0;
+generic_state->hme_enabled = 0;
+generic_state->b16xme_enabled = 0;
+generic_state->b32xme_enabled = 0;
+generic_state->brc_distortion_buffer_supported = 1;
+generic_state->brc_constant_buffer_supported = 0;
+
+
+generic_state->frame_rate = 30;
+generic_state->brc_allocated = 0;
+generic_state->brc_inited = 0;
+generic_state->brc_need_reset = 0;
+generic_state->is_low_delay = 0;
+generic_state->brc_enabled = 0;//default
+generic_state->internal_rate_mode = 0;
+generic_state->curr_pak_pass = 0;
+generic_state->num_pak_passes = MAX_AVC_PAK_PASS_NUM;
+generic_state->is_first_pass = 1;
+generic_state->is_last_pass = 0;
+generic_state->mb_brc_enabled = 0; // enable mb brc
+generic_state->brc_roi_enable = 0;
+generic_state

[Libva] [PATCH 20/31] ENC: ME kernel for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 441 +
 1 file changed, 441 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index af581fc7..d64694ca 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -3771,3 +3771,444 @@ gen9_avc_kernel_mbenc(VADriverContextP ctx,
 _object_walker_param);
 return VA_STATUS_SUCCESS;
 }
+
+/*
+me kernle related function
+*/
+static void
+gen9_avc_set_curbe_me(VADriverContextP ctx,
+  struct encode_state *encode_state,
+  struct i965_gpe_context *gpe_context,
+  struct intel_encoder_context *encoder_context,
+  void * param)
+{
+gen9_avc_me_curbe_data *curbe_cmd;
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+
+VAEncSliceParameterBufferH264 * slice_param = avc_state->slice_param[0];
+
+struct me_param * curbe_param = (struct me_param *)param ;
+unsigned char  use_mv_from_prev_step = 0;
+unsigned char write_distortions = 0;
+unsigned char qp_prime_y = 0;
+unsigned char me_method = gen9_avc_p_me_method[generic_state->preset];
+unsigned char seach_table_idx = 0;
+unsigned char mv_shift_factor = 0, prev_mv_read_pos_factor = 0;
+unsigned int downscaled_width_in_mb, downscaled_height_in_mb;
+unsigned int scale_factor = 0;
+
+qp_prime_y = avc_state->pic_param->pic_init_qp + 
slice_param->slice_qp_delta;
+switch(curbe_param->hme_type)
+{
+case INTEL_ENC_HME_4x :
+{
+use_mv_from_prev_step = (generic_state->b16xme_enabled)? 1:0;
+write_distortions = 1;
+mv_shift_factor = 2;
+scale_factor = 4;
+prev_mv_read_pos_factor = 0;
+break;
+}
+case INTEL_ENC_HME_16x :
+{
+use_mv_from_prev_step = (generic_state->b32xme_enabled)? 1:0;
+write_distortions = 0;
+mv_shift_factor = 2;
+scale_factor = 16;
+prev_mv_read_pos_factor = 1;
+break;
+}
+case INTEL_ENC_HME_32x :
+{
+use_mv_from_prev_step = 0;
+write_distortions = 0;
+mv_shift_factor = 1;
+scale_factor = 32;
+prev_mv_read_pos_factor = 0;
+break;
+}
+default:
+assert(0);
+
+}
+curbe_cmd = i965_gpe_context_map_curbe(gpe_context);
+
+if (!curbe_cmd)
+return;
+
+downscaled_width_in_mb = 
ALIGN(generic_state->frame_width_in_pixel/scale_factor,16)/16;
+downscaled_height_in_mb = 
ALIGN(generic_state->frame_height_in_pixel/scale_factor,16)/16;
+
+
memcpy(curbe_cmd,gen9_avc_me_curbe_init_data,sizeof(gen9_avc_me_curbe_data));
+
+curbe_cmd->dw3.sub_pel_mode = 3;
+if(avc_state->field_scaling_output_interleaved)
+{
+/*frame set to zero,field specified*/
+curbe_cmd->dw3.src_access = 0;
+curbe_cmd->dw3.ref_access = 0;
+curbe_cmd->dw7.src_field_polarity = 0;
+}
+curbe_cmd->dw4.picture_height_minus1 = downscaled_height_in_mb - 1;
+curbe_cmd->dw4.picture_width = downscaled_width_in_mb;
+curbe_cmd->dw5.qp_prime_y = qp_prime_y;
+
+curbe_cmd->dw6.use_mv_from_prev_step = use_mv_from_prev_step;
+curbe_cmd->dw6.write_distortions = write_distortions;
+curbe_cmd->dw6.super_combine_dist = 
gen9_avc_super_combine_dist[generic_state->preset];
+curbe_cmd->dw6.max_vmvr = 
i965_avc_get_max_mv_len(avc_state->seq_param->level_idc) * 4;//frame only
+
+if(generic_state->frame_type == SLICE_TYPE_B)
+{
+curbe_cmd->dw1.bi_weight = 32;
+curbe_cmd->dw13.num_ref_idx_l1_minus1 = 
slice_param->num_ref_idx_l1_active_minus1;
+me_method = gen9_avc_b_me_method[generic_state->preset];
+seach_table_idx = 1;
+}
+
+if(generic_state->frame_type == SLICE_TYPE_P ||
+   generic_state->frame_type == SLICE_TYPE_B )
+   curbe_cmd->dw13.num_ref_idx_l0_minus1 = 
slice_param->num_ref_idx_l0_active_minus1;
+
+curbe_cmd->dw13.ref_streamin_cost = 5;
+curbe_cmd->dw13.roi_enable = 0;
+
+curbe_cmd->dw15.prev_mv_read_pos_factor = prev_mv_read_pos_factor;
+curbe_cmd->dw15.mv_shift_factor = mv_shift_factor;
+
+
memcpy(_cmd->dw16,table_enc_search_path[seach_table_idx][me_method],14*sizeof(int));
+
+curbe_cmd->dw32._4x_m

[Libva] [PATCH 17/31] ENC: add BRC MB level update kernel for AVC RC logic

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 135 +
 1 file changed, 135 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 65a4bc95..a025f563 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -2483,3 +2483,138 @@ gen9_avc_kernel_brc_frame_update(VADriverContextP ctx,
 
 return VA_STATUS_SUCCESS;
 }
+
+static void
+gen9_avc_set_curbe_brc_mb_update(VADriverContextP ctx,
+ struct encode_state *encode_state,
+ struct i965_gpe_context *gpe_context,
+ struct intel_encoder_context *encoder_context,
+ void * param)
+{
+gen9_avc_mb_brc_curbe_data *cmd;
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+
+cmd = i965_gpe_context_map_curbe(gpe_context);
+memset(cmd,0,sizeof(gen9_avc_mb_brc_curbe_data));
+
+cmd->dw0.cur_frame_type = generic_state->frame_type;
+if(generic_state->brc_roi_enable)
+{
+cmd->dw0.enable_roi = 1;
+}else
+{
+cmd->dw0.enable_roi = 0;
+}
+
+i965_gpe_context_unmap_curbe(gpe_context);
+
+return;
+}
+
+static void
+gen9_avc_send_surface_brc_mb_update(VADriverContextP ctx,
+struct encode_state *encode_state,
+struct i965_gpe_context *gpe_context,
+struct intel_encoder_context 
*encoder_context,
+void * param_mbenc)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->private_enc_ctx;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+
+/* brc history buffer*/
+gen9_add_buffer_gpe_surface(ctx,
+gpe_context,
+_ctx->res_brc_history_buffer,
+0,
+avc_ctx->res_brc_history_buffer.size,
+0,
+GEN9_AVC_MB_BRC_UPDATE_HISTORY_INDEX);
+
+/* MB qp data buffer is it same as res_mbbrc_mb_qp_data_surface*/
+if(generic_state->mb_brc_enabled)
+{
+gen9_add_buffer_2d_gpe_surface(ctx,
+   gpe_context,
+   _ctx->res_mbbrc_mb_qp_data_surface,
+   1,
+   I965_SURFACEFORMAT_R8_UNORM,
+   GEN9_AVC_MB_BRC_UPDATE_MB_QP_INDEX);
+
+}
+
+/* BRC roi feature*/
+if(generic_state->brc_roi_enable)
+{
+gen9_add_buffer_gpe_surface(ctx,
+gpe_context,
+_ctx->res_mbbrc_roi_surface,
+0,
+avc_ctx->res_mbbrc_roi_surface.size,
+0,
+GEN9_AVC_MB_BRC_UPDATE_ROI_INDEX);
+
+}
+
+/* MB statistical data surface*/
+gen9_add_buffer_gpe_surface(ctx,
+gpe_context,
+_ctx->res_mb_status_buffer,
+0,
+avc_ctx->res_mb_status_buffer.size,
+0,
+GEN9_AVC_MB_BRC_UPDATE_MB_STATUS_INDEX);
+
+return;
+}
+
+static VAStatus
+gen9_avc_kernel_brc_mb_update(VADriverContextP ctx,
+  struct encode_state *encode_state,
+  struct intel_encoder_context *encoder_context)
+
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->private_enc_ctx;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct generic_encoder_context * generic_ctx = (struct 
generic_encoder_context * )vme_context->generic_enc_ctx;
+
+struct i965_gpe_context *gpe_context;
+struct gpe_media_object_walker_parameter media_object_walker_param;
+struct gpe_encoder_kernel_walker_parameter kernel_wa

[Libva] [PATCH 16/31] ENC: add BRC frame update kernel for AVC RC logic

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 335 +
 1 file changed, 335 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index fd042c5f..65a4bc95 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -2148,3 +2148,338 @@ gen9_avc_kernel_brc_init_reset(VADriverContextP ctx,
 
 return VA_STATUS_SUCCESS;
 }
+
+static void
+gen9_avc_set_curbe_brc_frame_update(VADriverContextP ctx,
+struct encode_state *encode_state,
+struct i965_gpe_context *gpe_context,
+struct intel_encoder_context 
*encoder_context,
+void * param)
+{
+gen9_avc_frame_brc_update_curbe_data *cmd;
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+struct object_surface *obj_surface;
+struct gen9_surface_avc *avc_priv_surface;
+struct avc_param common_param;
+VAEncSequenceParameterBufferH264 * seq_param = avc_state->seq_param;
+
+obj_surface = encode_state->reconstructed_object;
+
+if (!obj_surface || !obj_surface->private_data)
+return;
+avc_priv_surface = obj_surface->private_data;
+
+cmd = i965_gpe_context_map_curbe(gpe_context);
+
+
memcpy(cmd,_avc_frame_brc_update_curbe_init_data,sizeof(gen9_avc_frame_brc_update_curbe_data));
+
+cmd->dw5.target_size_flag = 0 ;
+if(generic_state->brc_init_current_target_buf_full_in_bits > 
(double)generic_state->brc_init_reset_buf_size_in_bits)
+{
+/*overflow*/
+generic_state->brc_init_current_target_buf_full_in_bits -= 
(double)generic_state->brc_init_reset_buf_size_in_bits;
+cmd->dw5.target_size_flag = 1 ;
+}
+
+if(generic_state->skip_frame_enbale)
+{
+cmd->dw6.num_skip_frames = generic_state->num_skip_frames ;
+cmd->dw7.size_skip_frames = generic_state->size_skip_frames;
+
+generic_state->brc_init_current_target_buf_full_in_bits += 
generic_state->brc_init_reset_input_bits_per_frame * 
generic_state->num_skip_frames;
+
+}
+cmd->dw0.target_size = (unsigned 
int)generic_state->brc_init_current_target_buf_full_in_bits ;
+cmd->dw1.frame_number = generic_state->seq_frame_number ;
+cmd->dw2.size_of_pic_headers = generic_state->herder_bytes_inserted << 3 ;
+cmd->dw5.cur_frame_type = generic_state->frame_type ;
+cmd->dw5.brc_flag = 0 ;
+cmd->dw5.brc_flag |= 
(avc_priv_surface->is_as_ref)?INTEL_ENCODE_BRCUPDATE_IS_REFERENCE:0 ;
+
+if(avc_state->multi_pre_enable)
+{
+cmd->dw5.brc_flag  |= INTEL_ENCODE_BRCUPDATE_IS_ACTUALQP ;
+cmd->dw14.qp_index_of_cur_pic = avc_priv_surface->frame_idx ; //do not 
know this. use -1
+}
+
+cmd->dw5.max_num_paks = generic_state->num_pak_passes ;
+if(avc_state->min_max_qp_enable)
+{
+switch(generic_state->frame_type)
+{
+case SLICE_TYPE_I:
+cmd->dw6.minimum_qp = avc_state->min_qp_i ;
+cmd->dw6.maximum_qp = avc_state->max_qp_i ;
+break;
+case SLICE_TYPE_P:
+cmd->dw6.minimum_qp = avc_state->min_qp_p ;
+cmd->dw6.maximum_qp = avc_state->max_qp_p ;
+break;
+case SLICE_TYPE_B:
+cmd->dw6.minimum_qp = avc_state->min_qp_b ;
+cmd->dw6.maximum_qp = avc_state->max_qp_b ;
+break;
+}
+}else
+{
+cmd->dw6.minimum_qp = 0 ;
+cmd->dw6.maximum_qp = 0 ;
+}
+cmd->dw6.enable_force_skip = avc_state->enable_force_skip ;
+cmd->dw6.enable_sliding_window = 0 ;
+
+generic_state->brc_init_current_target_buf_full_in_bits += 
generic_state->brc_init_reset_input_bits_per_frame;
+
+if(generic_state->internal_rate_mode == INTEL_BRC_AVBR)
+{
+cmd->dw3.start_gadj_frame0 = (unsigned int)((10 *   
generic_state->avbr_convergence) / (double)150);
+cmd->dw3.start_gadj_frame1 = (unsigned int)((50 *   
generic_state->avbr_convergence) / (double)150);
+cmd->dw4.start_gadj_frame2 = (unsigned int)((100 *  
generic_state->avbr_convergence) / (double)150);
+cmd->dw4.start_gadj_frame3 = (unsigned int)((150 *  
generic_state->avbr_convergence) / (double)150);
+cmd->dw11.g_rate_ratio_threshold_0 = (unsigned int)((100 - 
(generic_state

[Libva] [PATCH 21/31] ENC: WP/SFD kernel for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 277 +
 1 file changed, 277 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index d64694ca..ea83cbd0 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -4212,3 +4212,280 @@ gen9_avc_kernel_me(VADriverContextP ctx,
 
 return VA_STATUS_SUCCESS;
 }
+
+/*
+wp related function
+*/
+static void
+gen9_avc_set_curbe_wp(VADriverContextP ctx,
+ struct encode_state *encode_state,
+ struct i965_gpe_context *gpe_context,
+ struct intel_encoder_context *encoder_context,
+ void * param)
+{
+gen9_avc_wp_curbe_data *cmd;
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+VAEncSliceParameterBufferH264 * slice_param = avc_state->slice_param[0];
+struct wp_param * curbe_param = (struct wp_param *)param;
+
+cmd = i965_gpe_context_map_curbe(gpe_context);
+
+if (!cmd)
+return;
+memset(cmd,0,sizeof(gen9_avc_wp_curbe_data));
+if(curbe_param->ref_list_idx)
+{
+cmd->dw0.default_weight = slice_param->luma_weight_l1[0];
+cmd->dw0.default_offset = slice_param->luma_offset_l1[0];
+}else
+{
+cmd->dw0.default_weight = slice_param->luma_weight_l0[0];
+cmd->dw0.default_offset = slice_param->luma_offset_l0[0];
+}
+
+cmd->dw49.input_surface = GEN9_AVC_WP_INPUT_REF_SURFACE_INDEX;
+cmd->dw50.output_surface = GEN9_AVC_WP_OUTPUT_SCALED_SURFACE_INDEX;
+
+i965_gpe_context_unmap_curbe(gpe_context);
+
+}
+
+static void
+gen9_avc_send_surface_wp(VADriverContextP ctx,
+ struct encode_state *encode_state,
+ struct i965_gpe_context *gpe_context,
+ struct intel_encoder_context *encoder_context,
+ void * param)
+{
+struct i965_driver_data *i965 = i965_driver_data(ctx);
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->private_enc_ctx;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+struct wp_param * curbe_param = (struct wp_param *)param;
+struct object_surface *obj_surface;
+VAEncSliceParameterBufferH264 * slice_param = avc_state->slice_param[0];
+VASurfaceID surface_id;
+
+if(curbe_param->ref_list_idx)
+{
+surface_id = slice_param->RefPicList1[0].picture_id;
+obj_surface = SURFACE(surface_id);
+if (!obj_surface || !obj_surface->private_data)
+avc_state->weighted_ref_l1_enable = 0;
+else
+avc_state->weighted_ref_l1_enable = 1;
+}else
+{
+surface_id = slice_param->RefPicList0[0].picture_id;
+obj_surface = SURFACE(surface_id);
+if (!obj_surface || !obj_surface->private_data)
+avc_state->weighted_ref_l0_enable = 0;
+else
+avc_state->weighted_ref_l0_enable = 1;
+}
+if(!obj_surface)
+obj_surface = encode_state->reference_objects[0];
+
+
+gen9_add_adv_gpe_surface(ctx, gpe_context,
+ obj_surface,
+ GEN9_AVC_WP_INPUT_REF_SURFACE_INDEX);
+
+obj_surface = 
avc_ctx->wp_output_pic_select_surface_obj[curbe_param->ref_list_idx];
+gen9_add_adv_gpe_surface(ctx, gpe_context,
+ obj_surface,
+ GEN9_AVC_WP_OUTPUT_SCALED_SURFACE_INDEX);
+}
+
+
+static VAStatus
+gen9_avc_kernel_wp(VADriverContextP ctx,
+   struct encode_state *encode_state,
+   struct intel_encoder_context *encoder_context,
+   unsigned int list1_in_use)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->private_enc_ctx;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct generic_encoder_context * generic_ctx = (struct 
generic_encoder_context * )vme_context->generic_enc_ctx;
+
+struct i965_gpe_context *gpe_context;
+struct gpe_media_object_walker_parameter media_object_walker_param;
+struct gpe_encoder_kernel_walker_parameter kernel_walker_param;
+int media_function = INTEL_MEDIA_STATE_ENC_WP

[Libva] [PATCH 13/31] ENC: add scaling kernel for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 301 +
 1 file changed, 301 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index cf1b1234..e27d8eb5 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -1195,3 +1195,304 @@ gen9_init_vfe_scoreboard_avc(struct i965_gpe_context 
*gpe_context,
 gpe_context->vfe_desc7.scoreboard2.delta_y6 = 0xE;
 }
 }
+/*
+VME pipeline related function
+*/
+
+/*
+scaling kernel related function
+*/
+static void
+gen9_avc_set_curbe_scaling4x(VADriverContextP ctx,
+   struct encode_state *encode_state,
+   struct i965_gpe_context *gpe_context,
+   struct intel_encoder_context *encoder_context,
+   void *param)
+{
+gen9_avc_scaling4x_curbe_data *curbe_cmd;
+struct scaling_param *surface_param = (struct scaling_param *)param;
+
+curbe_cmd = i965_gpe_context_map_curbe(gpe_context);
+
+if (!curbe_cmd)
+return;
+
+memset(curbe_cmd, 0, sizeof(gen9_avc_scaling4x_curbe_data));
+
+curbe_cmd->dw0.input_picture_width  = surface_param->input_frame_width;
+curbe_cmd->dw0.input_picture_height = surface_param->input_frame_height;
+
+curbe_cmd->dw1.input_y_bti = GEN9_AVC_SCALING_FRAME_SRC_Y_INDEX;
+curbe_cmd->dw2.output_y_bti = GEN9_AVC_SCALING_FRAME_DST_Y_INDEX;
+
+
+curbe_cmd->dw5.flatness_threshold = 128;
+curbe_cmd->dw6.enable_mb_flatness_check = 
surface_param->enable_mb_flatness_check;
+curbe_cmd->dw7.enable_mb_variance_output = 
surface_param->enable_mb_variance_output;
+curbe_cmd->dw8.enable_mb_pixel_average_output = 
surface_param->enable_mb_pixel_average_output;
+
+if (curbe_cmd->dw6.enable_mb_flatness_check ||
+curbe_cmd->dw7.enable_mb_variance_output ||
+curbe_cmd->dw8.enable_mb_pixel_average_output)
+{
+curbe_cmd->dw10.mbv_proc_stat_bti = 
GEN9_AVC_SCALING_FRAME_MBVPROCSTATS_DST_INDEX;
+}
+
+i965_gpe_context_unmap_curbe(gpe_context);
+return;
+}
+
+static void
+gen9_avc_set_curbe_scaling2x(VADriverContextP ctx,
+   struct encode_state *encode_state,
+   struct i965_gpe_context *gpe_context,
+   struct intel_encoder_context *encoder_context,
+   void *param)
+{
+gen9_avc_scaling2x_curbe_data *curbe_cmd;
+struct scaling_param *surface_param = (struct scaling_param *)param;
+
+curbe_cmd = i965_gpe_context_map_curbe(gpe_context);
+
+if (!curbe_cmd)
+return;
+
+memset(curbe_cmd, 0, sizeof(gen9_avc_scaling2x_curbe_data));
+
+curbe_cmd->dw0.input_picture_width  = surface_param->input_frame_width;
+curbe_cmd->dw0.input_picture_height = surface_param->input_frame_height;
+
+curbe_cmd->dw8.input_y_bti = GEN9_AVC_SCALING_FRAME_SRC_Y_INDEX;
+curbe_cmd->dw9.output_y_bti = GEN9_AVC_SCALING_FRAME_DST_Y_INDEX;
+
+i965_gpe_context_unmap_curbe(gpe_context);
+return;
+}
+
+static void
+gen9_avc_send_surface_scaling(VADriverContextP ctx,
+  struct encode_state *encode_state,
+  struct i965_gpe_context *gpe_context,
+  struct intel_encoder_context *encoder_context,
+  void *param)
+{
+struct scaling_param *surface_param = (struct scaling_param *)param;
+unsigned int surface_format;
+unsigned int res_size;
+
+if (surface_param->scaling_out_use_32unorm_surf_fmt)
+surface_format = I965_SURFACEFORMAT_R32_UNORM;
+else if (surface_param->scaling_out_use_16unorm_surf_fmt)
+surface_format = I965_SURFACEFORMAT_R16_UNORM;
+else
+surface_format = I965_SURFACEFORMAT_R8_UNORM;
+
+gen9_add_2d_gpe_surface(ctx, gpe_context,
+surface_param->input_surface,
+0, 1, surface_format,
+GEN9_AVC_SCALING_FRAME_SRC_Y_INDEX);
+
+gen9_add_2d_gpe_surface(ctx, gpe_context,
+surface_param->output_surface,
+0, 1, surface_format,
+GEN9_AVC_SCALING_FRAME_DST_Y_INDEX);
+
+/*add buffer mv_proc_stat, here need change*/
+if (surface_param->mbv_proc_stat_enabled)
+{
+res_size = 16 * (surface_param->input_frame_width/16) * 
(surface_param->input_frame_height/16) * sizeof(unsigned int);
+
+gen9_add_buffer_gpe_surface(ctx,
+gpe_context,
+surface_param->pres_mbv_proc_stat_buffer,
+

[Libva] [PATCH 18/31] ENC: add REF frame QA caculation and MB level const data init for AVC MBenc stage

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 226 +
 1 file changed, 226 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index a025f563..cd847a88 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -2618,3 +2618,229 @@ gen9_avc_kernel_brc_mb_update(VADriverContextP ctx,
 
 return VA_STATUS_SUCCESS;
 }
+
+/*
+mbenc kernel related function,it include intra dist kernel
+*/
+static int
+gen9_avc_get_biweight(int dist_scale_factor_ref_id0_list0, unsigned short 
weighted_bipredidc)
+{
+int biweight = 32;  // default value
+
+/* based on kernel HLD*/
+if (weighted_bipredidc != INTEL_AVC_WP_MODE_IMPLICIT)
+{
+biweight = 32;
+}
+else
+{
+biweight = (dist_scale_factor_ref_id0_list0 + 2) >> 2;
+
+if (biweight != 16 && biweight != 21 &&
+biweight != 32 && biweight != 43 && biweight != 48)
+{
+biweight = 32;// If # of B-pics between two refs is more 
than 3. VME does not support it.
+}
+}
+
+return biweight;
+}
+
+static void
+gen9_avc_get_dist_scale_factor(VADriverContextP ctx,
+   struct encode_state *encode_state,
+   struct intel_encoder_context *encoder_context)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+VAEncSliceParameterBufferH264 * slice_param = avc_state->slice_param[0];
+VAEncPictureParameterBufferH264  *pic_param = avc_state->pic_param;
+
+int max_num_references;
+VAPictureH264 *curr_pic;
+VAPictureH264 *ref_pic_l0;
+VAPictureH264 *ref_pic_l1;
+int i = 0;
+int tb = 0;
+int td = 0;
+int tx = 0;
+int tmp = 0;
+int poc0 = 0;
+int poc1 = 0;
+
+max_num_references = pic_param->num_ref_idx_l0_active_minus1 + 1;
+
+memset(avc_state->dist_scale_factor_list0,0,32*sizeof(unsigned int));
+curr_pic = _param->CurrPic;
+for(i = 0; i < max_num_references; i++)
+{
+ref_pic_l0 = &(slice_param->RefPicList0[i]);
+
+if((ref_pic_l0->flags & VA_PICTURE_H264_INVALID) ||
+   (ref_pic_l0->picture_id == VA_INVALID_SURFACE) )
+break;
+ref_pic_l1 = &(slice_param->RefPicList1[0]);
+if((ref_pic_l0->flags & VA_PICTURE_H264_INVALID) ||
+   (ref_pic_l0->picture_id == VA_INVALID_SURFACE) )
+break;
+
+poc0 = (curr_pic->TopFieldOrderCnt - ref_pic_l0->TopFieldOrderCnt);
+poc1 = (ref_pic_l1->TopFieldOrderCnt - ref_pic_l0->TopFieldOrderCnt);
+CLIP(poc0,-128,127);
+CLIP(poc1,-128,127);
+tb = poc0;
+td = poc1;
+
+if(td == 0)
+{
+td = 1;
+}
+tmp = (td/2 > 0)?(td/2):(-(td/2));
+tx = (16384 + tmp)/td ;
+tmp = (tb*tx+32)>>6;
+CLIP(tmp,-1024,1023);
+avc_state->dist_scale_factor_list0[i] = tmp;
+}
+return;
+}
+
+static unsigned int
+gen9_avc_get_qp_from_ref_list(VADriverContextP ctx,
+  VAEncSliceParameterBufferH264 *slice_param,
+  int list,
+  int ref_frame_idx)
+{
+struct i965_driver_data *i965 = i965_driver_data(ctx);
+struct object_surface *obj_surface;
+struct gen9_surface_avc *avc_priv_surface;
+VASurfaceID surface_id;
+
+assert(slice_param);
+assert(list < 2);
+
+if(list == 0)
+{
+if(ref_frame_idx < slice_param->num_ref_idx_l0_active_minus1 + 1)
+surface_id = slice_param->RefPicList0[ref_frame_idx].picture_id;
+else
+return 0;
+}else
+{
+if(ref_frame_idx < slice_param->num_ref_idx_l1_active_minus1 + 1)
+surface_id = slice_param->RefPicList1[ref_frame_idx].picture_id;
+else
+return 0;
+}
+obj_surface = SURFACE(surface_id);
+if(obj_surface && obj_surface->private_data)
+{
+avc_priv_surface = obj_surface->private_data;
+return avc_priv_surface->qp_value;
+}else
+{
+return 0;
+}
+}
+
+static void
+gen9_avc_load_mb_brc_const_data(VADriverContextP ctx,
+struct encode_state *encode_state,
+struct intel_encoder_context *encoder_context)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct gen9_avc_encoder_context * avc_ctx = (struct 
gen9_avc_encoder_context * )vme_context->priv

[Libva] [PATCH 30/31] ENC: add Misc parameter check for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 204 +
 1 file changed, 204 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 7f73c95e..72a8c005 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -410,6 +410,210 @@ const gen9_avc_frame_brc_update_curbe_data 
gen9_avc_frame_brc_update_curbe_init_
 },
 
 };
+
+static void
+gen9_avc_update_rate_control_parameters(VADriverContextP ctx,
+struct intel_encoder_context 
*encoder_context,
+VAEncMiscParameterRateControl *misc)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+
+generic_state->max_bit_rate = ALIGN(misc->bits_per_second, 1000) / 1000;
+generic_state->window_size = misc->window_size;
+
+if (generic_state->internal_rate_mode == INTEL_BRC_CBR) {
+generic_state->min_bit_rate = generic_state->max_bit_rate;
+generic_state->mb_brc_enabled = misc->rc_flags.bits.mb_rate_control;
+
+if (generic_state->target_bit_rate != generic_state->max_bit_rate) {
+generic_state->target_bit_rate = generic_state->max_bit_rate;
+generic_state->brc_need_reset = 1;
+}
+} else if (generic_state->internal_rate_mode == INTEL_BRC_VBR) {
+generic_state->min_bit_rate = generic_state->max_bit_rate * (2 * 
misc->target_percentage - 100) / 100;
+generic_state->mb_brc_enabled = misc->rc_flags.bits.mb_rate_control;
+
+if (generic_state->target_bit_rate != generic_state->max_bit_rate * 
misc->target_percentage / 100) {
+generic_state->target_bit_rate = generic_state->max_bit_rate * 
misc->target_percentage / 100;
+generic_state->brc_need_reset = 1;
+}
+}
+}
+
+static void
+gen9_avc_update_hrd_parameters(VADriverContextP ctx,
+   struct intel_encoder_context *encoder_context,
+   VAEncMiscParameterHRD *misc)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+
+if (generic_state->internal_rate_mode == INTEL_BRC_CQP)
+return;
+
+generic_state->vbv_buffer_size_in_bit = misc->buffer_size;
+generic_state->init_vbv_buffer_fullness_in_bit = 
misc->initial_buffer_fullness;
+}
+
+static void
+gen9_avc_update_framerate_parameters(VADriverContextP ctx,
+ struct intel_encoder_context 
*encoder_context,
+ VAEncMiscParameterFrameRate *misc)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+
+generic_state->frames_per_100s = misc->framerate * 100; /* misc->framerate 
is multiple of 100 */
+generic_state->frame_rate = misc->framerate ;
+}
+
+static void
+gen9_avc_update_roi_parameters(VADriverContextP ctx,
+   struct intel_encoder_context *encoder_context,
+   VAEncMiscParameterBufferROI *misc)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+int i;
+
+if (!misc || !misc->roi) {
+generic_state->num_roi = 0;
+return;
+}
+
+generic_state->num_roi = MIN(misc->num_roi, 3);
+generic_state->max_delta_qp = misc->max_delta_qp;
+generic_state->min_delta_qp = misc->min_delta_qp;
+
+for (i = 0; i < generic_state->num_roi; i++) {
+generic_state->roi[i].left = misc->roi->roi_rectangle.x;
+generic_state->roi[i].right = generic_state->roi[i].left + 
misc->roi->roi_rectangle.width;
+generic_state->roi[i].top = misc->roi->roi_rectangle.y;
+generic_state->roi[i].bottom = generic_state->roi[i].top + 
misc->roi->roi_rectangle.height;
+generic_state->roi[i].value = misc->roi->roi_value;
+
+generic_state->roi[i].left /= 16;
+generic_state->roi[i].right /= 16;
+generic_state->roi[i].

[Libva] [PATCH 23/31] ENC: kernel related parameter check function for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 388 +
 1 file changed, 388 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index f8dc45c6..04cf30f0 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -4795,3 +4795,391 @@ gen9_avc_kernel_destroy(struct encoder_vme_mfc_context 
* vme_context)
 gen8_gpe_context_destroy(_ctx->context_sfd.gpe_contexts);
 
 }
+
+/*
+vme pipeline
+*/
+static void
+gen9_avc_update_parameters(VADriverContextP ctx,
+ VAProfile profile,
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context)
+{
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+VAEncSequenceParameterBufferH264 *seq_param;
+VAEncPictureParameterBufferH264 *pic_param ;
+VAEncSliceParameterBufferH264 * slice_param;
+int i,j;
+unsigned int preset = generic_state->preset;
+
+/* seq/pic/slice parameter setting */
+generic_state->b16xme_supported = gen9_avc_super_hme[preset];
+generic_state->b32xme_supported = gen9_avc_ultra_hme[preset];
+
+avc_state->seq_param =  (VAEncSequenceParameterBufferH264 
*)encode_state->seq_param_ext->buffer;
+avc_state->pic_param = (VAEncPictureParameterBufferH264 
*)encode_state->pic_param_ext->buffer;
+
+
+avc_state->enable_avc_ildb = 0;
+avc_state->slice_num = 0;
+for (j = 0; j < encode_state->num_slice_params_ext && 
avc_state->enable_avc_ildb == 0; j++) {
+assert(encode_state->slice_params_ext && 
encode_state->slice_params_ext[j]->buffer);
+slice_param = (VAEncSliceParameterBufferH264 
*)encode_state->slice_params_ext[j]->buffer;
+
+for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) {
+assert((slice_param->slice_type == SLICE_TYPE_I) ||
+   (slice_param->slice_type == SLICE_TYPE_SI) ||
+   (slice_param->slice_type == SLICE_TYPE_P) ||
+   (slice_param->slice_type == SLICE_TYPE_SP) ||
+   (slice_param->slice_type == SLICE_TYPE_B));
+
+if (slice_param->disable_deblocking_filter_idc != 1) {
+avc_state->enable_avc_ildb = 1;
+}
+
+avc_state->slice_param[i] = slice_param;
+slice_param++;
+avc_state->slice_num++;
+}
+}
+
+/* how many slices support by now? 1 slice or multi slices, but row 
slice.not slice group. */
+seq_param = avc_state->seq_param;
+pic_param = avc_state->pic_param;
+slice_param = avc_state->slice_param[0];
+
+generic_state->frame_type = avc_state->slice_param[0]->slice_type;
+
+if (slice_param->slice_type == SLICE_TYPE_I ||
+slice_param->slice_type == SLICE_TYPE_SI)
+generic_state->frame_type = SLICE_TYPE_I;
+else if(slice_param->slice_type == SLICE_TYPE_P)
+generic_state->frame_type = SLICE_TYPE_P;
+else if(slice_param->slice_type == SLICE_TYPE_B)
+generic_state->frame_type = SLICE_TYPE_B;
+if (profile == VAProfileH264High)
+avc_state->transform_8x8_mode_enable = 
!!pic_param->pic_fields.bits.transform_8x8_mode_flag;
+else
+avc_state->transform_8x8_mode_enable = 0;
+
+/* rc init*/
+if(generic_state->brc_enabled &&(!generic_state->brc_inited || 
generic_state->brc_need_reset ))
+{
+generic_state->target_bit_rate = ALIGN(seq_param->bits_per_second, 
1000) / 1000;
+generic_state->init_vbv_buffer_fullness_in_bit = 
seq_param->bits_per_second;
+generic_state->vbv_buffer_size_in_bit = 
(uint64_t)seq_param->bits_per_second << 1;
+generic_state->frames_per_100s = 3000; /* 30fps */
+}
+
+generic_state->gop_size = seq_param->intra_period;
+generic_state->gop_ref_distance = seq_param->ip_period;
+
+if (generic_state->internal_rate_mode == INTEL_BRC_CBR) {
+generic_state->max_bit_rate = generic_state->target_bit_rate;
+generic_state->min_bit_rate = generic_state->target_bit_rate;
+}
+
+if(generic_state->frame_type == SLICE_TYPE_I || generic_state->first_frame)
+{
+gen9_avc_update_misc_parameters(ctx, encode_state, encoder_context);
+}
+
+generic_state->preset = encoder_contex

[Libva] [PATCH 09/31] ENC: add resource and surface allocation and free function for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 679 +
 1 file changed, 679 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 8f1ad79f..f0c695db 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -546,3 +546,682 @@ gen9_avc_update_misc_parameters(VADriverContextP ctx,
 }
 }
 }
+
+static bool
+intel_avc_get_kernel_header_and_size(void 
*pvbinary,
+ int  
binary_size,
+ INTEL_GENERIC_ENC_OPERATION  
operation,
+ int  
krnstate_idx,
+ struct i965_kernel   
*ret_kernel)
+{
+typedef uint32_t BIN_PTR[4];
+
+char *bin_start;
+gen9_avc_encoder_kernel_header  *pkh_table;
+kernel_header  *pcurr_header, *pinvalid_entry, *pnext_header;
+int next_krnoffset;
+
+if (!pvbinary || !ret_kernel)
+return false;
+
+bin_start = (char *)pvbinary;
+pkh_table = (gen9_avc_encoder_kernel_header *)pvbinary;
+pinvalid_entry = &(pkh_table->static_detection) + 1;
+next_krnoffset = binary_size;
+
+if (operation == INTEL_GENERIC_ENC_SCALING4X)
+{
+pcurr_header = _table->ply_dscale_ply;
+}
+else if (operation == INTEL_GENERIC_ENC_SCALING2X)
+{
+pcurr_header = _table->ply_2xdscale_ply;
+}
+else if (operation == INTEL_GENERIC_ENC_ME)
+{
+pcurr_header = _table->me_p;
+}
+else if (operation == INTEL_GENERIC_ENC_BRC)
+{
+pcurr_header = _table->frame_brc_init;
+}
+else if (operation == INTEL_GENERIC_ENC_MBENC)
+{
+pcurr_header = _table->mbenc_quality_I;
+}
+else if (operation == INTEL_GENERIC_ENC_WP)
+{
+pcurr_header = _table->wp;
+}
+else if (operation == INTEL_GENERIC_ENC_SFD)
+{
+pcurr_header = _table->static_detection;
+}
+else
+{
+return false;
+}
+
+pcurr_header += krnstate_idx;
+ret_kernel->bin = (const BIN_PTR *)(bin_start + 
(pcurr_header->kernel_start_pointer << 6));
+
+pnext_header = (pcurr_header + 1);
+if (pnext_header < pinvalid_entry)
+{
+next_krnoffset = pnext_header->kernel_start_pointer << 6;
+}
+ret_kernel->size = next_krnoffset - (pcurr_header->kernel_start_pointer << 
6);
+
+return true;
+}
+
+static void
+gen9_free_surfaces_avc(void **data)
+{
+struct gen9_surface_avc *avc_surface;
+
+if (!data || !*data)
+return;
+
+avc_surface = *data;
+
+if (avc_surface->scaled_4x_surface_obj) {
+i965_DestroySurfaces(avc_surface->ctx, 
_surface->scaled_4x_surface_id, 1);
+avc_surface->scaled_4x_surface_id = VA_INVALID_SURFACE;
+avc_surface->scaled_4x_surface_obj = NULL;
+}
+
+if (avc_surface->scaled_16x_surface_obj) {
+i965_DestroySurfaces(avc_surface->ctx, 
_surface->scaled_16x_surface_id, 1);
+avc_surface->scaled_16x_surface_id = VA_INVALID_SURFACE;
+avc_surface->scaled_16x_surface_obj = NULL;
+}
+
+if (avc_surface->scaled_32x_surface_obj) {
+i965_DestroySurfaces(avc_surface->ctx, 
_surface->scaled_32x_surface_id, 1);
+avc_surface->scaled_32x_surface_id = VA_INVALID_SURFACE;
+avc_surface->scaled_32x_surface_obj = NULL;
+}
+
+i965_free_gpe_resource(_surface->res_mb_code_surface);
+i965_free_gpe_resource(_surface->res_mv_data_surface);
+i965_free_gpe_resource(_surface->res_ref_pic_select_surface);
+
+dri_bo_unreference(avc_surface->dmv_top);
+avc_surface->dmv_top = NULL;
+dri_bo_unreference(avc_surface->dmv_bottom);
+avc_surface->dmv_bottom = NULL;
+
+free(avc_surface);
+
+*data = NULL;
+
+return;
+}
+
+static VAStatus
+gen9_avc_init_check_surfaces(VADriverContextP ctx,
+ struct object_surface *obj_surface,
+ struct intel_encoder_context *encoder_context,
+ struct avc_surface_param *surface_param)
+{
+struct i965_driver_data *i965 = i965_driver_data(ctx);
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+
+struct gen9_surface_avc *avc_surface;
+int downscaled_width_4x, downscaled_height_4x;
+int downscaled_width_16x, downscaled_he

[Libva] [PATCH 00/31] Encoder Architecture Changes (Primarily AVC)

[Sean V Kelley]

Encoder architecture restructuring for H.264 (with some impact to HEVC now) on 
HSW+
* Improvements to the shaders
* Improvements to the B frame efficiency
* Improvements to the low bit rate mode
* Improved features in two stage VME/PAK pipeline


Pengfei Qu (31):
  ENC: move gpe related function into src/i965_gpe_utils.h/c
  ENC: add common structure for AVC/HEVC encoder
  ENC:add context init function for AVC/HEVC encoder
  ENC: add const data/table for AVC encoder
  ENC: add AVC kernel binary on SKL
  ENC: add AVC common structure and functions
  ENC: add kernel related structure and define for AVC
  ENC: add misc parameter check for AVC encoder
  ENC: add resource and surface allocation and free function for AVC
encoder
  ENC: add init table for frame/mb brc update
  ENC: add resource/surface allocation/free function for AVC encoder
  ENC: add kernel media object related functions for AVC encoder
  ENC: add scaling kernel for AVC encoder
  ENC: add const data/table init function for AVC RC logic
  ENC: add BRC init/reset kernel for AVC RC logic
  ENC: add BRC frame update kernel for AVC RC logic
  ENC: add BRC MB level update kernel for AVC RC logic
  ENC: add REF frame QA caculation and MB level const data init for AVC
MBenc stage
  ENC: MBENC kernel for AVC encoder
  ENC: ME kernel for AVC encoder
  ENC: WP/SFD kernel for AVC encoder
  ENC: kernel init/destroy function for AVC encoder
  ENC: kernel related parameter check function for AVC encoder
  ENC: VME pipeline init/prepare/run function for AVC encoder
  ENC: add MFX command for AVC encoder
  ENC: add MFX command for AVC encoder
  ENC: add MFX Picture/slice level command init for AVC encoder
  ENC: add MFX pipeline init/prepare/run for AVC encoder
  ENC: add VME/MFX context init for AVC encoder
  ENC: add Misc parameter check for AVC encoder
  ENC:support more quality level and switch to new AVC encoder solution
on SKL

 src/Makefile.am|11 +
 src/gen9_avc_const_def.c   |  1090 
 src/gen9_avc_const_def.h   |   115 +
 src/gen9_avc_encoder.c |  7613 
 src/gen9_avc_encoder.h |  2345 
 src/gen9_avc_encoder_kernels.c | 12081 +++
 src/gen9_avc_encoder_kernels.h |36 +
 src/gen9_vp9_encoder.c |   154 +-
 src/gen9_vp9_encoder.h |10 -
 src/i965_avc_encoder_common.c  |   319 ++
 src/i965_avc_encoder_common.h  |   305 +
 src/i965_drv_video.c   | 8 +-
 src/i965_drv_video.h   | 2 +
 src/i965_encoder.c |39 +-
 src/i965_encoder_api.h |59 +
 src/i965_encoder_common.c  |   124 +
 src/i965_encoder_common.h  |   533 ++
 src/i965_gpe_utils.c   |   265 +-
 src/i965_gpe_utils.h   |87 +
 19 files changed, 25026 insertions(+), 170 deletions(-)
 create mode 100755 src/gen9_avc_const_def.c
 create mode 100755 src/gen9_avc_const_def.h
 create mode 100755 src/gen9_avc_encoder.c
 create mode 100755 src/gen9_avc_encoder.h
 create mode 100755 src/gen9_avc_encoder_kernels.c
 create mode 100755 src/gen9_avc_encoder_kernels.h
 create mode 100755 src/i965_avc_encoder_common.c
 create mode 100755 src/i965_avc_encoder_common.h
 create mode 100755 src/i965_encoder_api.h
 create mode 100755 src/i965_encoder_common.c
 create mode 100755 src/i965_encoder_common.h

-- 
2.11.0

___
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Libva@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/libva

[Libva] [PATCH 10/31] ENC: add init table for frame/mb brc update

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 815 -
 1 file changed, 815 deletions(-)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index f0c695db..823de87e 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -410,818 +410,3 @@ const gen9_avc_frame_brc_update_curbe_data 
gen9_avc_frame_brc_update_curbe_init_
 },
 
 };
-
-static void
-gen9_avc_update_rate_control_parameters(VADriverContextP ctx,
-struct intel_encoder_context 
*encoder_context,
-VAEncMiscParameterRateControl *misc)
-{
-struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
-struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
-
-generic_state->max_bit_rate = ALIGN(misc->bits_per_second, 1000) / 1000;
-generic_state->window_size = misc->window_size;
-
-if (generic_state->internal_rate_mode == INTEL_BRC_CBR) {
-generic_state->min_bit_rate = generic_state->max_bit_rate;
-generic_state->mb_brc_enabled = misc->rc_flags.bits.mb_rate_control;
-
-if (generic_state->target_bit_rate != generic_state->max_bit_rate) {
-generic_state->target_bit_rate = generic_state->max_bit_rate;
-generic_state->brc_need_reset = 1;
-}
-} else if (generic_state->internal_rate_mode == INTEL_BRC_VBR) {
-generic_state->min_bit_rate = generic_state->max_bit_rate * (2 * 
misc->target_percentage - 100) / 100;
-generic_state->mb_brc_enabled = misc->rc_flags.bits.mb_rate_control;
-
-if (generic_state->target_bit_rate != generic_state->max_bit_rate * 
misc->target_percentage / 100) {
-generic_state->target_bit_rate = generic_state->max_bit_rate * 
misc->target_percentage / 100;
-generic_state->brc_need_reset = 1;
-}
-}
-}
-
-static void
-gen9_avc_update_hrd_parameters(VADriverContextP ctx,
-   struct intel_encoder_context *encoder_context,
-   VAEncMiscParameterHRD *misc)
-{
-struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
-struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
-
-if (generic_state->internal_rate_mode == INTEL_BRC_CQP)
-return;
-
-generic_state->vbv_buffer_size_in_bit = misc->buffer_size;
-generic_state->init_vbv_buffer_fullness_in_bit = 
misc->initial_buffer_fullness;
-}
-
-static void
-gen9_avc_update_framerate_parameters(VADriverContextP ctx,
- struct intel_encoder_context 
*encoder_context,
- VAEncMiscParameterFrameRate *misc)
-{
-struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
-struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
-
-generic_state->frames_per_100s = misc->framerate * 100; /* misc->framerate 
is multiple of 100 */
-generic_state->frame_rate = misc->framerate ;
-}
-
-static void
-gen9_avc_update_roi_parameters(VADriverContextP ctx,
-   struct intel_encoder_context *encoder_context,
-   VAEncMiscParameterBufferROI *misc)
-{
-struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
-struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
-int i;
-
-if (!misc || !misc->roi) {
-generic_state->num_roi = 0;
-return;
-}
-
-generic_state->num_roi = MIN(misc->num_roi, 3);
-generic_state->max_delta_qp = misc->max_delta_qp;
-generic_state->min_delta_qp = misc->min_delta_qp;
-
-for (i = 0; i < generic_state->num_roi; i++) {
-generic_state->roi[i].left = misc->roi->roi_rectangle.x;
-generic_state->roi[i].right = generic_state->roi[i].left + 
misc->roi->roi_rectangle.width;
-generic_state->roi[i].top = misc->roi->roi_rectangle.y;
-generic_state->roi[i].bottom = generic_state->roi[i].top + 
misc->roi->roi_rectangle.height;
-generic_state->roi[i].value = misc->roi->roi_value;
-
-generic_state->roi[i].left /= 16;
-generic_state->roi[i].right /= 16;
-generic_state->roi[i].

[Libva] [PATCH 15/31] ENC: add BRC init/reset kernel for AVC RC logic

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 218 +
 1 file changed, 218 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 878345ee..fd042c5f 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -1930,3 +1930,221 @@ gen9_avc_init_brc_const_data_old(VADriverContextP ctx,
 
 i965_unmap_gpe_resource(gpe_resource);
 }
+static void
+gen9_avc_set_curbe_brc_init_reset(VADriverContextP ctx,
+  struct encode_state *encode_state,
+  struct i965_gpe_context *gpe_context,
+  struct intel_encoder_context 
*encoder_context,
+  void * param)
+{
+gen9_avc_brc_init_reset_curbe_data *cmd;
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+double input_bits_per_frame = 0;
+double bps_ratio = 0;
+VAEncSequenceParameterBufferH264 * seq_param = avc_state->seq_param;
+struct avc_param common_param;
+
+cmd = i965_gpe_context_map_curbe(gpe_context);
+
+
memcpy(cmd,_avc_brc_init_reset_curbe_init_data,sizeof(gen9_avc_brc_init_reset_curbe_data));
+
+memset(_param,0,sizeof(common_param));
+common_param.frame_width_in_pixel = generic_state->frame_width_in_pixel;
+common_param.frame_height_in_pixel = generic_state->frame_height_in_pixel;
+common_param.frame_width_in_mbs = generic_state->frame_width_in_mbs;
+common_param.frame_height_in_mbs = generic_state->frame_height_in_mbs;
+common_param.frames_per_100s = generic_state->frames_per_100s;
+common_param.vbv_buffer_size_in_bit = 
generic_state->vbv_buffer_size_in_bit;
+common_param.target_bit_rate = generic_state->target_bit_rate;
+
+cmd->dw0.profile_level_max_frame = 
i965_avc_get_profile_level_max_frame(_param,seq_param->level_idc);
+cmd->dw1.init_buf_full_in_bits = 
generic_state->init_vbv_buffer_fullness_in_bit;
+cmd->dw2.buf_size_in_bits = generic_state->vbv_buffer_size_in_bit;
+cmd->dw3.average_bit_rate = generic_state->target_bit_rate * 1000;
+cmd->dw4.max_bit_rate = generic_state->max_bit_rate * 1000;
+cmd->dw8.gop_p = 
(generic_state->gop_ref_distance)?((generic_state->gop_size 
-1)/generic_state->gop_ref_distance):0;
+cmd->dw9.gop_b = (generic_state->gop_size - 1 - cmd->dw8.gop_p);
+cmd->dw9.frame_width_in_bytes = generic_state->frame_width_in_pixel;
+cmd->dw10.frame_height_in_bytes = generic_state->frame_height_in_pixel;
+cmd->dw12.no_slices = avc_state->slice_num;
+
+//VUI
+if(seq_param->vui_parameters_present_flag && 
generic_state->internal_rate_mode != INTEL_BRC_AVBR )
+{
+cmd->dw4.max_bit_rate = cmd->dw4.max_bit_rate;
+if(generic_state->internal_rate_mode == INTEL_BRC_CBR)
+{
+cmd->dw3.average_bit_rate = cmd->dw4.max_bit_rate;
+
+}
+
+}
+cmd->dw6.frame_rate_m = generic_state->frames_per_100s;
+cmd->dw7.frame_rate_d = 100;
+cmd->dw8.brc_flag = 0;
+cmd->dw8.brc_flag |= (generic_state->mb_brc_enabled)? 0 : 0x8000;
+
+
+if(generic_state->internal_rate_mode == INTEL_BRC_CBR)
+{ //CBR
+cmd->dw4.max_bit_rate = cmd->dw3.average_bit_rate;
+cmd->dw8.brc_flag = cmd->dw8.brc_flag |INTEL_ENCODE_BRCINIT_ISCBR;
+
+}else if(generic_state->internal_rate_mode == INTEL_BRC_VBR)
+{//VBR
+if(cmd->dw4.max_bit_rate < cmd->dw3.average_bit_rate)
+{
+cmd->dw4.max_bit_rate = cmd->dw3.average_bit_rate << 1;
+}
+cmd->dw8.brc_flag = cmd->dw8.brc_flag |INTEL_ENCODE_BRCINIT_ISVBR;
+
+}else if(generic_state->internal_rate_mode == INTEL_BRC_AVBR)
+{ //AVBR
+cmd->dw4.max_bit_rate =cmd->dw3.average_bit_rate;
+cmd->dw8.brc_flag = cmd->dw8.brc_flag |INTEL_ENCODE_BRCINIT_ISAVBR;
+
+}
+//igonre icq/vcm/qvbr
+
+cmd->dw10.avbr_accuracy = generic_state->avbr_curracy;
+cmd->dw11.avbr_convergence = generic_state->avbr_convergence;
+
+//frame bits
+input_bits_per_frame = (double)(cmd->dw4.max_bit_rate) * 
(double)(cmd->dw7.frame_rate_d)/(double)(cmd->dw6.frame_rate_m);;
+
+if(cmd->dw2.buf_size_in_bits == 0)
+{
+   cmd->dw2.buf_size_in_bits = (unsigned int)(input_bits_per_frame * 4);
+}
+
+if(cmd->dw1.init_buf_full_in_bits == 0

[Libva] [PATCH 03/31] ENC:add context init function for AVC/HEVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/i965_encoder_api.h | 59 ++
 1 file changed, 59 insertions(+)
 create mode 100755 src/i965_encoder_api.h

diff --git a/src/i965_encoder_api.h b/src/i965_encoder_api.h
new file mode 100755
index ..0f1ab6cd
--- /dev/null
+++ b/src/i965_encoder_api.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Pengfei Qu <pengfei...@intel.com>
+ *
+ */
+
+#ifndef _I965_ENCODER_API_H_
+#define _I965_ENCODER_API_H_
+
+#include 
+
+struct intel_encoder_context;
+struct hw_context;
+
+/* H264/AVC */
+extern Bool
+gen9_avc_vme_context_init(VADriverContextP ctx, struct intel_encoder_context 
*encoder_context);
+
+extern Bool
+gen9_avc_pak_context_init(VADriverContextP ctx, struct intel_encoder_context 
*encoder_context);
+
+extern VAStatus
+gen9_avc_coded_status(VADriverContextP ctx, char *buffer, struct hw_context 
*hw_context);
+
+
+/* H265/HEVC */
+extern Bool
+gen9_hevc_vme_context_init(VADriverContextP ctx, struct intel_encoder_context 
*encoder_context);
+
+extern Bool
+gen9_hevc_pak_context_init(VADriverContextP ctx, struct intel_encoder_context 
*encoder_context);
+
+extern VAStatus
+gen9_hevc_coded_status(VADriverContextP ctx, char *buffer, struct hw_context 
*hw_context);
+
+
+#endif  // _I965_ENCODER_API_H_
-- 
2.11.0

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[Libva] [PATCH 11/31] ENC: add resource/surface allocation/free function for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.c | 610 +
 1 file changed, 610 insertions(+)

diff --git a/src/gen9_avc_encoder.c b/src/gen9_avc_encoder.c
index 823de87e..692cd8e2 100755
--- a/src/gen9_avc_encoder.c
+++ b/src/gen9_avc_encoder.c
@@ -410,3 +410,613 @@ const gen9_avc_frame_brc_update_curbe_data 
gen9_avc_frame_brc_update_curbe_init_
 },
 
 };
+static void
+gen9_free_surfaces_avc(void **data)
+{
+struct gen9_surface_avc *avc_surface;
+
+if (!data || !*data)
+return;
+
+avc_surface = *data;
+
+if (avc_surface->scaled_4x_surface_obj) {
+i965_DestroySurfaces(avc_surface->ctx, 
_surface->scaled_4x_surface_id, 1);
+avc_surface->scaled_4x_surface_id = VA_INVALID_SURFACE;
+avc_surface->scaled_4x_surface_obj = NULL;
+}
+
+if (avc_surface->scaled_16x_surface_obj) {
+i965_DestroySurfaces(avc_surface->ctx, 
_surface->scaled_16x_surface_id, 1);
+avc_surface->scaled_16x_surface_id = VA_INVALID_SURFACE;
+avc_surface->scaled_16x_surface_obj = NULL;
+}
+
+if (avc_surface->scaled_32x_surface_obj) {
+i965_DestroySurfaces(avc_surface->ctx, 
_surface->scaled_32x_surface_id, 1);
+avc_surface->scaled_32x_surface_id = VA_INVALID_SURFACE;
+avc_surface->scaled_32x_surface_obj = NULL;
+}
+
+i965_free_gpe_resource(_surface->res_mb_code_surface);
+i965_free_gpe_resource(_surface->res_mv_data_surface);
+i965_free_gpe_resource(_surface->res_ref_pic_select_surface);
+
+dri_bo_unreference(avc_surface->dmv_top);
+avc_surface->dmv_top = NULL;
+dri_bo_unreference(avc_surface->dmv_bottom);
+avc_surface->dmv_bottom = NULL;
+
+free(avc_surface);
+
+*data = NULL;
+
+return;
+}
+
+static VAStatus
+gen9_avc_init_check_surfaces(VADriverContextP ctx,
+ struct object_surface *obj_surface,
+ struct intel_encoder_context *encoder_context,
+ struct avc_surface_param *surface_param)
+{
+struct i965_driver_data *i965 = i965_driver_data(ctx);
+struct encoder_vme_mfc_context * vme_context = (struct 
encoder_vme_mfc_context *)encoder_context->vme_context;
+struct avc_enc_state * avc_state = (struct avc_enc_state * 
)vme_context->private_enc_state;
+struct generic_enc_codec_state * generic_state = (struct 
generic_enc_codec_state * )vme_context->generic_enc_state;
+
+struct gen9_surface_avc *avc_surface;
+int downscaled_width_4x, downscaled_height_4x;
+int downscaled_width_16x, downscaled_height_16x;
+int downscaled_width_32x, downscaled_height_32x;
+int size = 0;
+unsigned int frame_width_in_mbs = ALIGN(surface_param->frame_width,16) / 
16;
+unsigned int frame_height_in_mbs = ALIGN(surface_param->frame_height,16) / 
16;
+unsigned int frame_mb_nums = frame_width_in_mbs * frame_height_in_mbs;
+int allocate_flag = 1;
+int width,height;
+
+if (!obj_surface || !obj_surface->bo)
+return VA_STATUS_ERROR_INVALID_SURFACE;
+
+if (obj_surface->private_data &&
+obj_surface->free_private_data != gen9_free_surfaces_avc) {
+obj_surface->free_private_data(_surface->private_data);
+obj_surface->private_data = NULL;
+}
+
+if (obj_surface->private_data) {
+return VA_STATUS_SUCCESS;
+}
+
+avc_surface = calloc(1, sizeof(struct gen9_surface_avc));
+
+if (!avc_surface)
+return VA_STATUS_ERROR_ALLOCATION_FAILED;
+
+avc_surface->ctx = ctx;
+obj_surface->private_data = avc_surface;
+obj_surface->free_private_data = gen9_free_surfaces_avc;
+
+downscaled_width_4x = generic_state->frame_width_4x;
+downscaled_height_4x = generic_state->frame_height_4x;
+
+i965_CreateSurfaces(ctx,
+downscaled_width_4x,
+downscaled_height_4x,
+VA_RT_FORMAT_YUV420,
+1,
+_surface->scaled_4x_surface_id);
+
+avc_surface->scaled_4x_surface_obj = 
SURFACE(avc_surface->scaled_4x_surface_id);
+
+if (!avc_surface->scaled_4x_surface_obj) {
+return VA_STATUS_ERROR_ALLOCATION_FAILED;
+}
+
+i965_check_alloc_surface_bo(ctx, avc_surface->scaled_4x_surface_obj, 1,
+VA_FOURCC('N', 'V', '1', '2'), 
SUBSAMPLE_YUV420);
+
+downscaled_width_16x = generic_state->frame_width_16x;
+downscaled_height_16x = generic_state->frame_height_16x;
+i965_CreateSurfaces(ctx,
+downscaled_width_16x,
+downscaled_height_16x,
+VA_RT_FORMAT_YUV420,
+

[Libva] [PATCH 07/31] ENC: add kernel related structure and define for AVC

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_encoder.h | 2345 
 1 file changed, 2345 insertions(+)
 create mode 100755 src/gen9_avc_encoder.h

diff --git a/src/gen9_avc_encoder.h b/src/gen9_avc_encoder.h
new file mode 100755
index ..e63ef08d
--- /dev/null
+++ b/src/gen9_avc_encoder.h
@@ -0,0 +1,2345 @@
+/*
+ * Copyright ? 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWAR
+ *
+ * Authors:
+ *Pengfei Qu <pengfei...@intel.com>
+ *
+ */
+
+#ifndef GEN9_AVC_ENCODER_H
+#define GEN9_AVC_ENCODER_H
+
+#include "i965_encoder_common.h"
+/*
+common structure and define
+gen9_avc_surface structure
+*/
+#define MAX_AVC_ENCODER_SURFACES64
+#define MAX_AVC_PAK_PASS_NUM4
+
+#define ENCODER_AVC_CONST_SURFACE_WIDTH 64
+#define ENCODER_AVC_CONST_SURFACE_HEIGHT 44
+#define WIDTH_IN_MACROBLOCKS(width) (ALIGN(width, 16) >> 4)
+
+#define AVC_BRC_HISTORY_BUFFER_SIZE 864
+#define AVC_BRC_CONSTANTSURFACE_SIZE1664
+#define AVC_ADAPTIVE_TX_DECISION_THRESHOLD   128
+#define AVC_MB_TEXTURE_THRESHOLD 1024
+#define AVC_SFD_COST_TABLE_BUFFER_SIZ52
+#define AVC_INVALID_ROUNDING_VALUE255
+
+/* BRC define */
+#define CLIP(x, min, max) \
+{   \
+(x) = (((x) > (max)) ? (max) : (((x) < (min)) ? (min) : (x)));  \
+}
+
+typedef struct _kernel_header_
+{
+uint32_t   reserved: 6;
+uint32_t   kernel_start_pointer: 26;
+} kernel_header;
+
+struct generic_search_path_delta
+{
+uint8_t search_path_delta_x:4;
+uint8_t search_path_delta_y:4;
+};
+
+struct scaling_param
+{
+VASurfaceID curr_pic;
+void*p_scaling_bti;
+struct object_surface   *input_surface;
+struct object_surface   *output_surface;
+uint32_tinput_frame_width;
+uint32_tinput_frame_height;
+uint32_toutput_frame_width;
+uint32_toutput_frame_height;
+uint32_tvert_line_stride;
+uint32_tvert_line_stride_offset;
+boolscaling_out_use_16unorm_surf_fmt;
+boolscaling_out_use_32unorm_surf_fmt;
+boolmbv_proc_stat_enabled;
+boolenable_mb_flatness_check;
+boolenable_mb_variance_output;
+boolenable_mb_pixel_average_output;
+booluse_4x_scaling;
+booluse_16x_scaling;
+booluse_32x_scaling;
+boolblk8x8_stat_enabled;
+struct i965_gpe_resource*pres_mbv_proc_stat_buffer;
+struct i965_gpe_resource*pres_flatness_check_surface;
+};
+
+struct avc_surface_param{
+uint32_t frame_width;
+uint32_t frame_height;
+};
+struct me_param{
+uint32_t hme_type;
+};
+struct wp_param{
+uint32_t ref_list_idx;
+};
+
+struct brc_param{
+struct i965_gpe_context * gpe_context_brc_frame_update;
+struct i965_gpe_context * gpe_context_mbenc;
+};
+
+struct mbenc_param{
+uint32_t frame_width_in_mb;
+uint32_t frame_height_in_mb;
+uint32_t mbenc_i_frame_dist_in_use;
+uint32_t mad_enable;
+uint32_t roi_enabled;
+uint32_t brc_enabled;
+uint32_t slice_height;
+uint32_t mb_const_data_buffer_in_use;
+uint32_t mb_qp_buffer_in_use;
+uint32_t mb_vproc_stats_enable;
+};
+
+struct gen9_surface_avc
+{
+VADriverContextP ctx;
+VASurfaceID scaled_4x_surface_id;
+struct object_surf

[Libva] [PATCH 04/31] ENC: add const data/table for AVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/gen9_avc_const_def.c | 1090 ++
 src/gen9_avc_const_def.h |  115 +
 2 files changed, 1205 insertions(+)
 create mode 100755 src/gen9_avc_const_def.c
 create mode 100755 src/gen9_avc_const_def.h

diff --git a/src/gen9_avc_const_def.c b/src/gen9_avc_const_def.c
new file mode 100755
index ..e0edfd41
--- /dev/null
+++ b/src/gen9_avc_const_def.c
@@ -0,0 +1,1090 @@
+/*
+ * Copyright ? 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWAR
+ *
+ * Authors:
+ *Pengfei Qu <pengfei...@intel.com>
+ *
+ */
+
+
+#include "gen9_avc_const_def.h"
+
+/*
+init const table for scaling/sfd/curbe
+*/
+
+const char gen9_avc_sfd_cost_table_p_frame[AVC_QP_MAX] =
+{
+44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 60, 60, 
60, 60,
+73, 73, 73, 76, 76, 76, 88, 89, 89, 91, 92, 93, 104, 104, 106, 107, 108, 
109, 120,
+120, 122, 123, 124, 125, 136, 136, 138, 139, 140, 141, 143, 143
+};
+
+const char gen9_avc_sfd_cost_table_b_frame[AVC_QP_MAX] =
+{
+57, 57, 57, 57, 57, 57, 57, 57, 57, 57, 57, 57, 57, 57, 57, 57, 73, 73, 
73, 73,
+77, 77, 77, 89, 89, 89, 91, 93, 93, 95, 105, 106, 107, 108, 110, 111, 121, 
122,
+123, 124, 125, 127, 137, 138, 139, 140, 142, 143, 143, 143, 143, 143
+};
+
+/*
+MBBRC const: mv mode cost  ,skip value,scaling factor
+*/
+const unsigned int gen9_avc_old_intra_mode_cost[AVC_QP_MAX] =
+{
+0x1e03000a, 0x1e03000a, 0x1e03000a, 0x1e03000a, 0x1e03000a, 0x1e03000a, 
0x1e03000a, 0x1e03000a,
+0x1e03000a, 0x1e03000a, 0x1e03000a, 0x1e03000a, 0x1e03000a, 0x1e03000a, 
0x1e03000a, 0x1e03000a,
+0x2e06001a, 0x2e06001a, 0x2e06001a, 0x2e06001a, 0x3b09001f, 0x3b09001f, 
0x3b09001f, 0x3e0c002a,
+0x3e0c002a, 0x3e0c002a, 0x490f002d, 0x4b19002f, 0x4b19002f, 0x4c1b0039, 
0x4e1c003a, 0x581e003b,
+0x591f003d, 0x5a28003e, 0x5b2a0048, 0x5c2b0049, 0x5e2c004a, 0x682e004b, 
0x692f004d, 0x6a39004e,
+0x6b390058, 0x6d3b0059, 0x6e3c005a, 0x783e005b, 0x793f005d, 0x7a48005e, 
0x7b4a0068, 0x7c4b0069,
+0x7e4c006a, 0x884e006b, 0x894f006d, 0x8a59006e
+};
+
+const unsigned int gen9_avc_mv_cost_p_skip_adjustment[AVC_QP_MAX] =
+{
+0x09060500, 0x09060500, 0x09060500, 0x09060500, 0x09060500, 0x09060500, 
0x09060500, 0x09060500,
+0x09060500, 0x09060500, 0x09060500, 0x09060500, 0x09060500, 0x09060500, 
0x09060500, 0x09060500,
+0x190c0a00, 0x190c0a00, 0x190c0a00, 0x190c0a00, 0x1e190f00, 0x1e190f00, 
0x1e190f00, 0x291c1a00,
+0x291c1a00, 0x291c1a00, 0x2b1f1d00, 0x2e291f00, 0x2e291f00, 0x382b2900, 
0x392c2a00, 0x3a2e2b00,
+0x3b2f2d00, 0x3c382e00, 0x3f3a3800, 0x483b3900, 0x493c3a00, 0x4a3e3b00, 
0x4b3f3d00, 0x4d493e00,
+0x4e494800, 0x584b4900, 0x594c4a00, 0x5a4e4b00, 0x5b4f4d00, 0x5d584e00, 
0x5e5a5800, 0x685b5900,
+0x695c5a00, 0x6a5e5b00, 0x6b5f5d00, 0x6d695e00
+};
+
+const unsigned short gen9_avc_skip_value_p[2][2][64] =
+{
+{
+// Block Based Skip = 0 and Transform Flag = 0
+{
+0x, 0x, 0x, 0x, 0x, 0x, 0x, 0x0006,
+0x0006, 0x000c, 0x000c, 0x0015, 0x0015, 0x0021, 0x0021, 0x0033,
+0x0033, 0x004b, 0x004b, 0x0069, 0x0069, 0x0096, 0x0096, 0x00cc,
+0x00cc, 0x0111, 0x0111, 0x0165, 0x0165, 0x01cb, 0x01cb, 0x0246,
+0x0246, 0x02d3, 0x02d3, 0x0378, 0x0378, 0x0438, 0x0438, 0x0510,
+0x0510, 0x0603, 0x0603, 0x0714, 0x0714, 0x0846, 0x0846, 0x0999,
+0x0999, 0x0b10, 0x0b10, 0x0c3c, 0x, 0x, 0x, 0x,
+0x, 0x, 0x, 0x, 0x, 0x, 0x, 0x
+},
+
+// Block Based Skip = 0 and Transform Flag = 1
+{
+0x, 0x, 0x, 0x, 0x, 0x, 0x, 0x0006,
+

[Libva] [PATCH 06/31] ENC: add AVC common structure and functions

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/i965_avc_encoder_common.c | 319 ++
 src/i965_avc_encoder_common.h | 305 
 2 files changed, 624 insertions(+)
 create mode 100755 src/i965_avc_encoder_common.c
 create mode 100755 src/i965_avc_encoder_common.h

diff --git a/src/i965_avc_encoder_common.c b/src/i965_avc_encoder_common.c
new file mode 100755
index ..3fc2b54e
--- /dev/null
+++ b/src/i965_avc_encoder_common.c
@@ -0,0 +1,319 @@
+
+/*
+ * Copyright ? 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWAR
+ *
+ * Authors:
+ * Pengfei Qu <pengfei...@intel.com>
+ *
+ */
+
+#include "i965_avc_encoder_common.h"
+int
+i965_avc_get_max_mbps(int level_idc)
+{
+int max_mbps = 11880;
+
+switch (level_idc) {
+case INTEL_AVC_LEVEL_2:
+max_mbps = 11880;
+break;
+
+case INTEL_AVC_LEVEL_21:
+max_mbps = 19800;
+break;
+
+case INTEL_AVC_LEVEL_22:
+max_mbps = 20250;
+break;
+
+case INTEL_AVC_LEVEL_3:
+max_mbps = 40500;
+break;
+
+case INTEL_AVC_LEVEL_31:
+max_mbps = 108000;
+break;
+
+case INTEL_AVC_LEVEL_32:
+max_mbps = 216000;
+break;
+
+case INTEL_AVC_LEVEL_4:
+case INTEL_AVC_LEVEL_41:
+max_mbps = 245760;
+break;
+
+case INTEL_AVC_LEVEL_42:
+max_mbps = 522240;
+break;
+
+case INTEL_AVC_LEVEL_5:
+max_mbps = 589824;
+break;
+
+case INTEL_AVC_LEVEL_51:
+max_mbps = 983040;
+break;
+
+case INTEL_AVC_LEVEL_52:
+max_mbps = 2073600;
+break;
+
+default:
+break;
+}
+
+return max_mbps;
+};
+
+unsigned int
+i965_avc_get_profile_level_max_frame(struct avc_param * param,
+   int level_idc)
+{
+double bits_per_mb, tmpf;
+int max_mbps, num_mb_per_frame;
+uint64_t max_byte_per_frame0, max_byte_per_frame1;
+unsigned int ret;
+unsigned int scale_factor = 4;
+
+
+if (level_idc >= INTEL_AVC_LEVEL_31 && level_idc <= INTEL_AVC_LEVEL_4)
+bits_per_mb = 96.0;
+else
+{
+bits_per_mb = 192.0;
+scale_factor = 2;
+
+}
+
+max_mbps = i965_avc_get_max_mbps(level_idc);
+num_mb_per_frame = param->frame_width_in_mbs * param->frame_height_in_mbs;
+
+tmpf = (double)num_mb_per_frame;
+
+if (tmpf < max_mbps / 172.0)
+tmpf = max_mbps / 172.0;
+
+max_byte_per_frame0 = (uint64_t)(tmpf * bits_per_mb);
+max_byte_per_frame1 = (uint64_t)(((double)max_mbps * 100) / 
param->frames_per_100s *bits_per_mb);
+
+/* TODO: check VAEncMiscParameterTypeMaxFrameSize */
+ret = (unsigned int)MIN(max_byte_per_frame0, max_byte_per_frame1);
+ret = (unsigned int)MIN(ret, param->frame_width_in_pixel * 
param->frame_height_in_pixel *3 /(2*scale_factor));
+
+return ret;
+}
+
+int
+i965_avc_calculate_initial_qp(struct avc_param * param)
+{
+float x0 = 0, y0 = 1.19f, x1 = 1.75f, y1 = 1.75f;
+unsigned frame_size;
+int qp, delat_qp;
+
+frame_size = (param->frame_width_in_pixel * param->frame_height_in_pixel * 
3 / 2);
+qp = (int)(1.0 / 1.2 * pow(10.0,
+   (log10(frame_size * 2.0 / 3.0 * 
((float)param->frames_per_100s) /
+  ((float)(param->target_bit_rate * 1000) 
* 100)) - x0) *
+   (y1 - y0) / (x1 - x0) + y0) + 0.5);
+qp += 2;
+delat_qp = (int)(9 - (param->vbv_buffer_size_in_bit * 
((float)param->frames_per_100s) /
+  ((float)(param->target_bit_rate * 1000) * 100)));
+if (delat_qp > 0)
+qp += dela

[Libva] [PATCH 02/31] ENC: add common structure for AVC/HEVC encoder

[Sean V Kelley]

From: Pengfei Qu <pengfei...@intel.com>

Signed-off-by: Pengfei Qu <pengfei...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/i965_encoder_common.c | 124 +++
 src/i965_encoder_common.h | 533 ++
 2 files changed, 657 insertions(+)
 create mode 100755 src/i965_encoder_common.c
 create mode 100755 src/i965_encoder_common.h

diff --git a/src/i965_encoder_common.c b/src/i965_encoder_common.c
new file mode 100755
index ..930aba99
--- /dev/null
+++ b/src/i965_encoder_common.c
@@ -0,0 +1,124 @@
+/*
+ * Copyright ? 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWAR
+ *
+ * Authors:
+ * Pengfei Qu <pengfei...@intel.com>
+ *
+ */
+#include 
+#include 
+#include "intel_batchbuffer.h"
+#include "intel_driver.h"
+#include "i965_encoder_common.h"
+#include "i965_gpe_utils.h"
+
+
+const unsigned int table_enc_search_path[2][8][16] =
+{
+// I-Frame & P-Frame
+{
+// MEMethod: 0
+{
+0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 
0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211,
+0x0DE0, 0x11201F1F, 0x1105F1CF, 0x, 0x, 
0x, 0x, 0x
+},
+// MEMethod: 1
+{
+0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 
0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211,
+0x0DE0, 0x11201F1F, 0x1105F1CF, 0x, 0x, 
0x, 0x, 0x
+},
+// MEMethod: 2
+{
+0x, 0x, 0x, 0x, 0x, 
0x, 0x, 0x,
+0x, 0x, 0x, 0x, 0x, 
0x, 0x, 0x
+},
+// MEMethod: 3
+{
+0x01010101, 0x11010101, 0x01010101, 0x11010101, 0x01010101, 
0x11010101, 0x01010101, 0x11010101,
+0x01010101, 0x11010101, 0x01010101, 0x00010101, 0x, 
0x, 0x, 0x
+},
+// MEMethod: 4
+{
+0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 
0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
+0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 
0xF0F0F0F0, 0x, 0x
+},
+// MEMethod: 5
+{
+0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 
0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
+0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 
0xF0F0F0F0, 0x, 0x
+},
+// MEMethod: 6
+{
+0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 
0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211,
+0x0DE0, 0x11201F1F, 0x1105F1CF, 0x, 0x, 
0x, 0x, 0x
+},
+// MEMethod: 7 used for mpeg2 encoding P frames
+{
+0x1F11F10F, 0x2E22E2FE, 0x20E220DF, 0x2EDD06FC, 0x11D33FF1, 
0xEB1FF33D, 0x02F1F1F1, 0x1F20,
+0xF1EFFF0C, 0xF01104F1, 0x10FF0A50, 0x000FF1C0, 0x, 
0x, 0x, 0x
+}
+},
+// B-Frame
+{
+// MEMethod: 0
+{
+0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 
0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
+0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 
0xF0F0F0F0, 0x, 0x
+},
+// MEMethod: 1
+{
+0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 
0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
+0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 
0xF0F0F0F0, 0x, 0x
+},
+// MEMethod: 2
+{
+0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 
0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
+0x01010

[Libva] [PATCH 4/4] Set the pipeline to use the new VP8 encoding shaders on SKL/BXT/KBL

[Sean V Kelley]

From: "Xiang, Haihao" <haihao.xi...@intel.com>

Signed-off-by: Xiang, Haihao <haihao.xi...@intel.com>
Reviewed-by: Sean V Kelley <sea...@posteo.de>
---
 src/Makefile.am|   1 +
 src/gen9_encoder_vp8.c | 142 +
 src/gen9_mfc.c |   4 ++
 src/gen9_vme.c |   4 ++
 src/i965_encoder_vp8.c |   7 ++-
 5 files changed, 157 insertions(+), 1 deletion(-)
 create mode 100644 src/gen9_encoder_vp8.c

diff --git a/src/Makefile.am b/src/Makefile.am
index 7980836e..6ffd0aff 100755
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -63,6 +63,7 @@ source_c = \
gen8_mfc.c  \
gen8_mfd.c  \
gen8_vme.c  \
+   gen9_encoder_vp8.c  \
gen9_vme.c  \
gen9_mfc.c  \
gen9_mfc_hevc.c \
diff --git a/src/gen9_encoder_vp8.c b/src/gen9_encoder_vp8.c
new file mode 100644
index ..23c40065
--- /dev/null
+++ b/src/gen9_encoder_vp8.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWAR
+ *
+ * Authors:
+ *Xiang, Haihao <haihao.xi...@intel.com>
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "intel_batchbuffer.h"
+#include "intel_driver.h"
+
+#include "i965_defines.h"
+#include "i965_drv_video.h"
+#include "i965_encoder.h"
+#include "i965_encoder_vp8.h"
+
+#define DEFAULT_MOCS  0x02
+
+extern struct i965_kernel vp8_kernels_brc_init_reset[NUM_VP8_BRC_RESET];
+extern struct i965_kernel vp8_kernels_scaling[NUM_VP8_SCALING];
+extern struct i965_kernel vp8_kernels_me[NUM_VP8_ME];
+extern struct i965_kernel vp8_kernels_mbenc[NUM_VP8_MBENC];
+extern struct i965_kernel vp8_kernels_mpu[NUM_VP8_MPU];
+extern struct i965_kernel vp8_kernels_tpu[NUM_VP8_TPU];
+extern struct i965_kernel vp8_kernels_brc_update[NUM_VP8_BRC_UPDATE];
+
+static const uint32_t gen9_brc_init_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_brc_init_genx_0.g9b"
+};
+
+static const uint32_t gen9_brc_reset_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_brc_reset_genx_0.g9b"
+};
+
+static const uint32_t gen9_scaling_bin_vp8[][4] = {
+#include "shaders/brc/skl/hme_downscale_genx_0.g9b"
+};
+
+static const uint32_t gen9_me_bin_vp8[][4] = {
+#include "shaders/brc/skl/hme_genx_0.g9b"
+};
+
+static const uint32_t gen9_mbenc_i_frame_dist_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_intra_distortion_genx_0.g9b"
+};
+
+static const uint32_t gen9_mbenc_i_frame_luma_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_enc_genx_0.g9b"
+};
+
+static const uint32_t gen9_mbenc_i_frame_chroma_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_enc_genx_1.g9b"
+};
+
+static const uint32_t gen9_mbenc_p_frame_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_enc_genx_2.g9b"
+};
+
+static const uint32_t gen9_mpu_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_mpu_genx_0.g9b"
+};
+
+static const uint32_t gen9_tpu_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_tpu_genx_0.g9b"
+};
+
+static const uint32_t gen9_brc_update_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_brc_update_genx_0.g9b"
+};
+
+Bool
+gen9_encoder_vp8_context_init(VADriverContextP ctx,
+  struct intel_encoder_context *encoder_context,
+  struct i965_encoder_vp8_context *vp8_context)
+{
+vp8_kernels_brc_init_reset[VP8_BRC_INIT].bin = gen9_brc_init_bin_vp8;
+vp8_kernels_brc_init_reset[VP8_BRC_INIT].size = 
sizeof(gen9_brc_init_bin_vp8);
+vp8_kernels_brc_init_reset[VP8_BRC_RESET].bin = gen9_brc_reset_bin_vp8;
+vp8_kernels_brc_init_reset[VP8_BRC_RESET].size = 
sizeof(gen9_brc_reset_bin_vp8);
+
+/* scaling 4x

Re: [Libva] g45-h264 branch status

[Sean V Kelley]

On Thu, 2016-12-15 at 20:05 +0200, Bob Bib wrote:
> On 15/12/16 09:44, Xiang, Haihao wrote:
> > It was removed for this git repository. Please check https://lists.
> > free
> > desktop.org/archives/libva/2016-June/004018.html . You may fork
> > g45-
> > h264 branch from git://people.freedesktop.org/~haihao/libva-intel-
> > driver.
> 
> Thanks for the info.
> 
> I've checked it, and the last commit dates back to October 2014. It's
> no 
> longer supported, right?

We do not actively work on it, unfortunately.  But if you have
questions or patches or changes feel free to voice them on this list.

Thanks,

Sean

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Re: [Libva] [PATCH 2/3] H.265 main 10 encoder supports only 10bpp render targets

[Sean V Kelley]

On Thu, 2016-12-15 at 13:04 +, Mark Thompson wrote:
> On 05/12/16 17:54, Mark Thompson wrote:
> > Signed-off-by: Mark Thompson 
> > ---
> > The supported surface formats are already correct (i.e. only P010);
> > this makes the render target format right as well (before this, it
> > declares that it supports only YUV 4:2:0 8-bit).
> > 
> >  src/i965_drv_video.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
> > index d83427c..9e1c92a 100644
> > --- a/src/i965_drv_video.c
> > +++ b/src/i965_drv_video.c
> > @@ -880,6 +880,8 @@
> > i965_get_default_chroma_formats(VADriverContextP ctx, VAProfile
> > profile,
> >  break;
> >  
> >  case VAProfileHEVCMain10:
> > +if (HAS_HEVC10_ENCODING(i965) && entrypoint ==
> > VAEntrypointEncSlice)
> > +chroma_formats = VA_RT_FORMAT_YUV420_10BPP;
> >  if (HAS_HEVC10_DECODING(i965) && entrypoint ==
> > VAEntrypointVLD)
> >  chroma_formats |= i965->codec_info-
> > >hevc_dec_chroma_formats;
> >  break;
> > 
> 
> Ping.  (The other patches in this series have been considered
> separately.)

Yes this is a good catch.  It was overlooked with the addition of 10bit
support.  We may need to make further adjustment when we roll in new
encoder formats too.

lgtm.

applied.

Sean


> Thanks,
> 
> - Mark
> 
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Re: [Libva] [PATCH v2 0/7] Host1x IOMMU support + VIC support

[Sean V Kelley]

Hi,

Comments below:

> On Dec 14, 2016, at 6:48 AM, Daniel Vetter  wrote:
> 
> On Wed, Dec 14, 2016 at 3:11 PM, Daniel Vetter  wrote:
>> On Wed, Dec 14, 2016 at 03:32:16PM +0200, Mikko Perttunen wrote:
>>> On 14.12.2016 15:05, Daniel Vetter wrote:
 On Wed, Dec 14, 2016 at 02:41:28PM +0200, Mikko Perttunen wrote:
> On 14.12.2016 14:30, Daniel Vetter wrote:
>> On Wed, Dec 14, 2016 at 01:16:10PM +0200, Mikko Perttunen wrote:
>>> This series adds IOMMU support to Host1x and TegraDRM
>>> and adds support for the VIC (Video Image Compositor)
>>> host1x client. The series is available as a git repository at
>>> git://github.com/cyndis/linux.git; branch vic-2.
>>> 
>>> A userspace test case for VIC can be found at
>>> https://github.com/cyndis/drm/tree/work/tegra.
>>> The testcase is in tests/tegra and is called submit_vic.
>>> The testcase/TRM include full headers and documentation
>>> to program the unit. The unit by itself, however, does not
>>> readily map to existing userspace library interfaces, so
>>> implementations for those are not provided.
>> 
>> Afaik libva has an entire pile of post-processing support. Pretty sure
>> other video transcode libraries have similar interfaces, so should all be
>> possible to implement this.
> 
> We don't have any actual video transcoding support though, so unless it's
> possible to just implement a part of libva and defer the rest to some CPU
> implementation, I don't see how this is useful. I suppose I could 
> implement
> a GStreamer plugin for colorspace conversion or resizing, since those are
> very modular.
 
 Hm, I guess the question then is, how did that get enabled?
>>> 
>>> What is "that"? I'm not exactly sure.
>>> 
>>> Our architecture is such that there's the VIC that handles colorspace
>>> conversion, rescaling, blitting and can do some 2d postprocessing effects as
>>> well.
>>> 
>>> Then there's the separate NVDEC that is a video bitstream decoder. There's
>>> no support for that at the moment. I am working on the IP side of that.
>>> 
>>> The video processing pipeline is then such that NVDEC is fed the bitstream;
>>> NVDEC outputs a YUV picture in a specific format; VIC takes that YUV picture
>>> and converts/rescales it into the desired format. Or if we are encoding
>>> video, VIC takes your RGB image, converts it into a format that NVENC
>>> understands, and so on.
>>> 
>>> So with just VIC support, I could implement some simple 2D things. I don't
>>> know if anyone would want to specifically use the VIC for those since
>>> applications already have fast CPU algorithms. For the video pipeline using
>>> VIC is nice since these units can synchronize work without CPU involvement
>>> and when you're already using NVDEC or NVENC it's barely any extra effort to
>>> involve VIC as well. It can also be useful in power usage sensitive
>>> situations, but we aren't really fit for those situations with the upstream
>>> kernel anyway :)
>> 
>> Ah I thought the nvdec was already enabled, since for i915 that's how we
>> went about things (we have a pretty much exactly matching split in the
>> various video related engines). But if that's not there yet then no
>> worries, all fine.
>> 
>> Since you do seem to plan to enable everything anyway, might be worth it
>> to go directly with something like libva or libvdpau or whatever the cool
>> thing is. libva is my recommendation since it works on non-X11 too afaik,
>> but I have 0 clue. And might be worth it to check out whether you can't do
>> a super-basic libva driver that only does the post processing stuff. With
>> libva you can import/export images, so it might be possible even ... And
>> directly doing the full video engine support instead of a one-off in
>> gstreamer sounds more sensible to me.
> 
> Silly me forgot to add the experts, i.e. Sean (current libva
> maintainer) and libva mailing lists.
> -Daniel


From a purely VPP standpoint libva is something that would give VIC a readily 
available API in user space.  You don’t have to have a transcoding use case to 
leverage VPP with a surface with VA-API.  On top of that we do support DMA but 
import and export to provide flexibility in sharing the memory.  It’s entirely 
possible to support a subset of entry points (say VPP only) for VA-API through 
Libva and share that information in a query on the config say for your 
applications.  We do that all the time with various backends having feature 
subsets such as our hybrid Intel driver, or the IMG based PVR driver.  I 
believe there is also a Rock-Chip project experimenting with Libva for their 
media driver.

I’ll take a look at your link.

Sean

Intel, Corp.




> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [Libva] Observed random hang on intel platform like baytrail, haswell and skylake

[Sean V Kelley]

Hi Veeranna,

Could you file your bug here:
https://bugs.freedesktop.org/enter_bug.cgi?product=libva

We can give you feedback, request logs, etc..

Thanks,

Sean


On Tue, Dec 13, 2016 at 7:21 AM, ViruS Tadala <tadala.veerannab...@gmail.com
> wrote:

> Hi,
>
> I have downloaded krogoth version of yocto and build it.
>
> Kernel version : 4.4
> gstreamer-vaapi : 1.8.0
> libva : 1.7.0
> Intel-driver : 1.7.0
>
> Then flashed the built image on haswell(Intel i5-4590) and launched
> multiple instances of below pipeline and observed system hang at some point.
>
> gst-launch-1.0 videotestsrc is-live=true pattern=22 horizontal-speed=20 !
> 'video/x-raw, format=(string)I420, width=(int)864, height=(int)480,
> framerate=(fraction)10/1' ! vaapiencode_h264 min-qp=20 ! queue !
> vaapidecode ! queue ! vaapisink
>
> Didn't get any kernel logs or gstreamer error messages when it occurs. I
> tried below tests but didn't get helped.
>
> 1. Tried kernel version 4.8
> 2. Other versions of gstreamer-vaapi and libva.
>
>
> Looking forward for your suggestions and let me know if you need more
> information.
>
> Best Regards,
> Veeranna
>
>
>
>
>
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>


-- 
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Open Source Technology Center / SSG
Intel Corp.
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Re: [Libva] libyami and libyami-utils are in Debian now.

[Sean V Kelley]

Glad to see it packaged and maintained with Debian, great work!

Sean

On Sun, Dec 11, 2016 at 11:15 PM, Yu, Jiankang <jiankang...@intel.com>
wrote:

> Libyami and libyami-utils which are SDK based on libva have been added
> into Debian now.
> Packages can be found using “apt-cache search” command, and install with
> “apt-get install”
> ~$ apt-cache search libyami
> libyami-dev - SDK base on Video Acceleration(VA) API -- development files
> libyami1 - SDK base on Video Acceleration (VA) API -- runtime
> libyami1-dbgsym - Debug symbols for libyami1
> libyami-utils - SDK base on Video Acceleration(VA) API -- utils program
>
> Best regards,
> Jiankang
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-- 
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Open Source Technology Center / SSG
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Re: [Libva] [PATCH 3/3] VP9 encode: support fractional framerate

[Sean V Kelley]

; >+} else {
> >+vp9_state->frame_rate_num =
> misc_param_fr->framerate;
> >+vp9_state->frame_rate_den = 1;
> >+}
> > } else {
> > /* Assign the default frame rate */
> >-vp9_state->frame_rate = 30;
> >+vp9_state->frame_rate_num = 30;
> >+vp9_state->frame_rate_den = 1;
> > }
> >
> > /* RC misc will override HRD parameter */ @@ -3999,10
> +4004,17 @@
> >gen9_encode_vp9_check_parameter(VADriverContextP ctx,
> > encode_state-
> >>misc_param[VAEncMiscParameterTypeFrameRate][0]->buffer;
> > misc_param_fr = (VAEncMiscParameterFrameRate
> *)misc_param-
> >>data;
> >
> >-vp9_state->frame_rate = misc_param_fr->framerate;
> >+if (misc_param_fr->framerate & 0x) {
> >+vp9_state->frame_rate_num =
> misc_param_fr->framerate >>
> >16 & 0x;
> >+vp9_state->frame_rate_den =
> misc_param_fr->framerate   &
> >0x;
> >+} else {
> >+vp9_state->frame_rate_num =
> misc_param_fr->framerate;
> >+vp9_state->frame_rate_den = 1;
> >+}
> > } else {
> > /* Assign the default frame rate */
> >-vp9_state->frame_rate = 30;
> >+vp9_state->frame_rate_num = 30;
> >+vp9_state->frame_rate_den = 1;
> > }
> >
> > if (vp9_state->brc_flag_check & VP9_BRC_RC) { @@ -4031,14
> >+4043,25 @@ gen9_encode_vp9_check_parameter(VADriverContextP ctx,
> > /* If the parameter related with RC is changed. Reset BRC */
> > if (vp9_state->brc_flag_check & VP9_BRC_FR) {
> >VAEncMiscParameterFrameRate *misc_param_fr;
> >+   uint32_t num, den;
> >
> >misc_param = (VAEncMiscParameterBuffer *)
> >encode_state-
> >>misc_param[VAEncMiscParameterTypeFrameRate][0]->buffer;
> >misc_param_fr = (VAEncMiscParameterFrameRate *)misc_param-
> >>data;
> >
> >-   if (vp9_state->frame_rate != misc_param_fr->framerate) {
> >+   if (misc_param_fr->framerate & 0x) {
> >+   num = misc_param_fr->framerate >> 16 & 0x;
> >+   den = misc_param_fr->framerate   & 0x;
> >+   } else {
> >+   num = misc_param_fr->framerate;
> >+   den = 1;
> >+   }
> >+
> >+   if (vp9_state->frame_rate_num != num ||
> >+   vp9_state->frame_rate_den != den) {
> >vp9_state->brc_reset = 1;
> >-   vp9_state->frame_rate = misc_param_fr->framerate;
> >+   vp9_state->frame_rate_num = num;
> >+   vp9_state->frame_rate_den = den;
> >}
> > }
> >
> >diff --git a/src/gen9_vp9_encoder.h b/src/gen9_vp9_encoder.h index
> >ad2d875..260b8d5 100644
> >--- a/src/gen9_vp9_encoder.h
> >+++ b/src/gen9_vp9_encoder.h
> >@@ -1552,7 +1552,6 @@ struct gen9_vp9_brc_curbe_param
> > int32_t   brc_num_pak_passes;
> > bool  multi_ref_qp_check;
> > int16_t   frame_number;
> >-int32_t   frame_rate;
> > VP9_MEDIA_STATE_TYPE   media_state_type;
> > };
> >
> >@@ -1925,7 +1924,8 @@ struct gen9_vp9_state {
> > unsigned long init_vbv_buffer_fullness_in_bit;
> > unsigned long vbv_buffer_size_in_bit;
> > int  frame_number;
> >-uint32_t frame_rate;
> >+uint32_t frame_rate_num;
> >+uint32_t frame_rate_den;
> > uint8_t  ref_frame_flag;
> > uint8_t  dys_ref_frame_flag;
> > uint8_t  picture_coding_type;
> >--
> >2.10.2
> >___
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Re: [Libva] BSD ring selection

[Sean V Kelley]

+Kimmo

Hi Trvrko,

As I mentioned in email yesterday, I would be looking into this next quarter.

Why are you jumping into this now?

Please work through me on these requests.


Thanks,

Sean

> On 24 Samh 2016, at 00:07, Tvrtko Ursulin  
> wrote:
> 
> 
> Hi all,
> 
> I am curious on the current operation of the driver with regards to the ring 
> selection and usage.
> 
> As far as I can gather from the code, the driver is happy for the kernel to 
> choose the ring (on configurations with more than one ring of course) and 
> seems to be able to run mostly independently of the selection. (I said mostly 
> because there are some batches which are explicitly sent to BSD0 ring, based 
> on the feature matrix.)
> 
> Have I missed something or there is really nothing else special the driver 
> does with respect to which ring it is running?
> 
> I am looking into this in the context of the long standing desire to 
> auto-balance workloads better. For example 
> https://bugs.freedesktop.org/show_bug.cgi?id=97872 expresses the need to 
> balance per batch buffer as well.
> 
> This leads me to the second part of the question and that is the hardware 
> state. Does the driver currently depend on the hardware state?
> 
> Because if we would to implement per batch buffer load balancing in the 
> kernel, the driver would have to make sure that it doesn't depend on any 
> state left by the previous batch. Perhaps this is not a concern, I really 
> know nothing of how the BSD engines are used.
> 
> If perhaps it doesn't already, then the change to support this could be quite 
> simple and I could perhaps prototype something as an RFC.
> 
> Regards,
> 
> Tvrtko
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Re: [Libva] [PATCH intel-driver 0/5] JPEG Encode Test Speed Optimization

[Sean V Kelley]

lso tested0, applied.
>> > >
>> > > Thanks,
>> > >
>> > > Sean
>> > >
>> > > >
>> > > > U. Artie Eoff (5):
>> > > >   test: add a timer class
>> > > >   test: use C random library for random numbers
>> > > >   test: add YUVImage class
>> > > >   test: streamable valarray
>> > > >   test: use YUVImage in JPEG encode tests
>> > > >
>> > > >  test/Makefile.am   |   2 +
>> > > >  test/i965_jpeg_encode_test.cpp | 135 +++-
>> > > >  test/i965_jpeg_test_data.cpp   | 196 ++-
>> > > >  test/i965_jpeg_test_data.h |  26 +-
>> > > >  test/i965_streamable.h |  25 ++
>> > > >  test/i965_test_environment.cpp |   7 +
>> > > >  test/i965_test_image_utils.cpp | 747
>> > > > +
>> > > >  test/i965_test_image_utils.h   |  66 
>> > > >  test/object_heap_test.cpp  |   4 -
>> > > >  test/test_utils.h  |  45 ++-
>> > > >  10 files changed, 970 insertions(+), 283 deletions(-)
>> > > >  create mode 100644 test/i965_test_image_utils.cpp
>> > > >  create mode 100644 test/i965_test_image_utils.h
>> > > >
>> > > ___
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>> > > Libva@lists.freedesktop.org
>> > > https://lists.freedesktop.org/mailman/listinfo/libva
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Re: [Libva] [PATCH] drm: remove va_drm_is_authenticated check

[Sean V Kelley]

On Tue, 2016-11-15 at 15:24 +, Emil Velikov wrote:
> If we do not use a render node we must authenticate. Doing the extra
> GetClient calls/ioctls does not help much, so don't bother.
> 
> Cc: David Herrmann 
> Cc: Daniel Vetter 
> Signed-off-by: Emil Velikov 

After some discussion in this thread, lgtm, applied.

Thanks,

Sean


> ---
> David, Daniel, I believe things are perfectly reasonable on kernel
> side.
> If not please shout.
> ---
>  va/drm/va_drm.c  |  8 ++--
>  va/drm/va_drm_auth.c | 35 ---
>  va/drm/va_drm_auth.h |  4 
>  3 files changed, 2 insertions(+), 45 deletions(-)
> 
> diff --git a/va/drm/va_drm.c b/va/drm/va_drm.c
> index 08071cf..59e33fa 100644
> --- a/va/drm/va_drm.c
> +++ b/va/drm/va_drm.c
> @@ -74,12 +74,8 @@ va_DisplayContextGetDriverName(
>  if (ret < 0)
>  return VA_STATUS_ERROR_OPERATION_FAILED;
>  
> -if (!va_drm_is_authenticated(drm_state->fd)) {
> -if (!va_drm_authenticate(drm_state->fd, magic))
> -return VA_STATUS_ERROR_OPERATION_FAILED;
> -if (!va_drm_is_authenticated(drm_state->fd))
> -return VA_STATUS_ERROR_OPERATION_FAILED;
> -}
> +if (!va_drm_authenticate(drm_state->fd, magic))
> +return VA_STATUS_ERROR_OPERATION_FAILED;
>  }
>  
>  drm_state->auth_type = VA_DRM_AUTH_CUSTOM;
> diff --git a/va/drm/va_drm_auth.c b/va/drm/va_drm_auth.c
> index 53794d3..592381d 100644
> --- a/va/drm/va_drm_auth.c
> +++ b/va/drm/va_drm_auth.c
> @@ -28,41 +28,6 @@
>  #include "va_drm_auth.h"
>  #include "va_drm_auth_x11.h"
>  
> -#if defined __linux__
> -# include 
> -#endif
> -
> -/* Checks whether the thread id is the current thread */
> -static bool
> -is_local_tid(pid_t tid)
> -{
> -#if defined __linux__
> -/* On Linux systems, drmGetClient() would return the thread ID
> -   instead of the actual process ID */
> -return syscall(SYS_gettid) == tid;
> -#else
> -return false;
> -#endif
> -}
> -
> -/* Checks whether DRM connection is authenticated */
> -bool
> -va_drm_is_authenticated(int fd)
> -{
> -pid_t client_pid;
> -int i, auth, pid, uid;
> -unsigned long magic, iocs;
> -bool is_authenticated = false;
> -
> -client_pid = getpid();
> -for (i = 0; !is_authenticated; i++) {
> -if (drmGetClient(fd, i, , , , , ) !=
> 0)
> -break;
> -is_authenticated = auth && (pid == client_pid ||
> is_local_tid(pid));
> -}
> -return is_authenticated;
> -}
> -
>  /* Try to authenticate the DRM connection with the supplied magic id
> */
>  bool
>  va_drm_authenticate(int fd, uint32_t magic)
> diff --git a/va/drm/va_drm_auth.h b/va/drm/va_drm_auth.h
> index 1aa6989..a8ca794 100644
> --- a/va/drm/va_drm_auth.h
> +++ b/va/drm/va_drm_auth.h
> @@ -30,10 +30,6 @@
>  
>  DLL_HIDDEN
>  bool
> -va_drm_is_authenticated(int fd);
> -
> -DLL_HIDDEN
> -bool
>  va_drm_authenticate(int fd, uint32_t magic);
>  
>  #endif /* VA_DRM_AUTH_H */


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Re: [Libva] [PATCH] drm: remove va_drm_is_authenticated check

[Sean V Kelley]

On Thu, 2016-11-17 at 18:17 +, Xiang, Haihao wrote:
> > -Original Message-
> > From: Sean V Kelley [mailto:sea...@posteo.de]
> > Sent: Friday, November 18, 2016 12:47 AM
> > To: Emil Velikov <emil.l.veli...@gmail.com>; Xiang, Haihao
> > <haihao.xi...@intel.com>
> > Cc: Daniel Vetter <daniel.vet...@ffwll.ch>; libva@lists.freedesktop
> > .org; David
> > Herrmann <dh.herrm...@gmail.com>
> > Subject: Re: [Libva] [PATCH] drm: remove va_drm_is_authenticated
> > check
> > 
> > On Thu, 2016-11-17 at 16:42 +, Emil Velikov wrote:
> > > On 17 November 2016 at 15:38, Xiang, Haihao <haihao.xiang@intel.c
> > > om>
> > > wrote:
> > > > > From: Libva [mailto:libva-boun...@lists.freedesktop.org] On
> > > > > Behalf
> > > > > Of Emil Velikov
> > > > > Sent: Tuesday, November 15, 2016 11:24 PM
> > > > > To: libva@lists.freedesktop.org
> > > > > Cc: Daniel Vetter <daniel.vet...@ffwll.ch>; David Herrmann
> > > > > <dh.herrm...@gmail.com>
> > > > > Subject: [Libva] [PATCH] drm: remove va_drm_is_authenticated
> > > > > check
> > > > > 
> > > > > If we do not use a render node we must authenticate.
> > > > 
> > > > It is not true.  A root or master user can access
> > > > /dev/dri/card0
> > > > without authentication in drm.
> > > > va_drm_is_authenticated() is used to check for this cases.
> > > > 
> > > 
> > > Surely you're not suggesting that running your video player as
> > > root is
> > > a wise idea ;-)
> > 
> > Agreed.
> 
> I also agree we should run video player as a normal user, however
> some customer prefers root.
> 
> > 
> > > 
> > > Regardless, there's something _really_ fishy with libva if it
> > > needs
> > > va_drm_is_authenticated.
> > > Any other software out there does not need to (or do so) - some
> > > examples include Xorg, Wayland and other Weston compositors,
> > > Mesa, IGT
> > > (a ton of GPU tests) ... be that as root, user or otherwise.
> > 
> > 
> > We don't need it, in my opinion.
> 
> We can still run VAAPI application as root to access /dev/dri/card0
> with this patch, but cannot
> run 2+ VAAPI applications at the same time.  We can suggest customer
> to use render node first because
> authentication isn't needed for render node.
> 
> I am fine to apply the patch.

Good.  I'm glad we are aligned. 

Thanks,

Sean

> 
> > 
> > Sean
> > 
> > > 
> > > Emil
> > > ___
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Re: [Libva] [PATCH] drm: remove va_drm_is_authenticated check

[Sean V Kelley]

On Thu, 2016-11-17 at 16:42 +, Emil Velikov wrote:
> On 17 November 2016 at 15:38, Xiang, Haihao 
> wrote:
> > > From: Libva [mailto:libva-boun...@lists.freedesktop.org] On
> > > Behalf Of Emil
> > > Velikov
> > > Sent: Tuesday, November 15, 2016 11:24 PM
> > > To: libva@lists.freedesktop.org
> > > Cc: Daniel Vetter ; David Herrmann
> > > 
> > > Subject: [Libva] [PATCH] drm: remove va_drm_is_authenticated
> > > check
> > > 
> > > If we do not use a render node we must authenticate.
> > 
> > It is not true.  A root or master user can access /dev/dri/card0
> > without authentication in drm.
> > va_drm_is_authenticated() is used to check for this cases.
> > 
> 
> Surely you're not suggesting that running your video player as root
> is
> a wise idea ;-)

Agreed.

> 
> Regardless, there's something _really_ fishy with libva if it needs
> va_drm_is_authenticated.
> Any other software out there does not need to (or do so) - some
> examples include Xorg, Wayland and other Weston compositors, Mesa,
> IGT
> (a ton of GPU tests) ... be that as root, user or otherwise.


We don't need it, in my opinion.

Sean

> 
> Emil
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Re: [Libva] [PATCH] drm: remove va_drm_is_authenticated check

[Sean V Kelley]

On Thu, 2016-11-17 at 15:38 +, Xiang, Haihao wrote:
> > From: Libva [mailto:libva-boun...@lists.freedesktop.org] On Behalf
> > Of Emil
> > Velikov
> > Sent: Tuesday, November 15, 2016 11:24 PM
> > To: libva@lists.freedesktop.org
> > Cc: Daniel Vetter ; David Herrmann
> > 
> > Subject: [Libva] [PATCH] drm: remove va_drm_is_authenticated check
> > 
> > If we do not use a render node we must authenticate. 
> 
> It is not true.  A root or master user can access /dev/dri/card0
> without authentication in drm. 
> va_drm_is_authenticated() is used to check for this cases.

That's true but that is also not a recommended use case, root user
accessing card0 for video playback/encode.

Sean

> 
> > Doing the extra
> > GetClient calls/ioctls does not help much, so don't bother.
> > 
> > Cc: David Herrmann 
> > Cc: Daniel Vetter 
> > Signed-off-by: Emil Velikov 
> > ---
> > David, Daniel, I believe things are perfectly reasonable on kernel
> > side.
> > If not please shout.
> > ---
> > va/drm/va_drm.c  |  8 ++--
> > va/drm/va_drm_auth.c | 35 ---
> > va/drm/va_drm_auth.h |  4 
> > 3 files changed, 2 insertions(+), 45 deletions(-)
> > 
> > diff --git a/va/drm/va_drm.c b/va/drm/va_drm.c
> > index 08071cf..59e33fa 100644
> > --- a/va/drm/va_drm.c
> > +++ b/va/drm/va_drm.c
> > @@ -74,12 +74,8 @@ va_DisplayContextGetDriverName(
> > if (ret < 0)
> > return VA_STATUS_ERROR_OPERATION_FAILED;
> > 
> > -if (!va_drm_is_authenticated(drm_state->fd)) {
> > -if (!va_drm_authenticate(drm_state->fd, magic))
> > -return VA_STATUS_ERROR_OPERATION_FAILED;
> > -if (!va_drm_is_authenticated(drm_state->fd))
> > -return VA_STATUS_ERROR_OPERATION_FAILED;
> > -}
> > +if (!va_drm_authenticate(drm_state->fd, magic))
> > +return VA_STATUS_ERROR_OPERATION_FAILED;
> > }
> > 
> > drm_state->auth_type = VA_DRM_AUTH_CUSTOM;
> > diff --git a/va/drm/va_drm_auth.c b/va/drm/va_drm_auth.c
> > index 53794d3..592381d 100644
> > --- a/va/drm/va_drm_auth.c
> > +++ b/va/drm/va_drm_auth.c
> > @@ -28,41 +28,6 @@
> > #include "va_drm_auth.h"
> > #include "va_drm_auth_x11.h"
> > 
> > -#if defined __linux__
> > -# include 
> > -#endif
> > -
> > -/* Checks whether the thread id is the current thread */
> > -static bool
> > -is_local_tid(pid_t tid)
> > -{
> > -#if defined __linux__
> > -/* On Linux systems, drmGetClient() would return the thread ID
> > -   instead of the actual process ID */
> > -return syscall(SYS_gettid) == tid;
> > -#else
> > -return false;
> > -#endif
> > -}
> > -
> > -/* Checks whether DRM connection is authenticated */
> > -bool
> > -va_drm_is_authenticated(int fd)
> > -{
> > -pid_t client_pid;
> > -int i, auth, pid, uid;
> > -unsigned long magic, iocs;
> > -bool is_authenticated = false;
> > -
> > -client_pid = getpid();
> > -for (i = 0; !is_authenticated; i++) {
> > -if (drmGetClient(fd, i, , , , , )
> > != 0)
> > -break;
> > -is_authenticated = auth && (pid == client_pid ||
> > is_local_tid(pid));
> > -}
> > -return is_authenticated;
> > -}
> > -
> > /* Try to authenticate the DRM connection with the supplied magic
> > id */
> > bool
> > va_drm_authenticate(int fd, uint32_t magic)
> > diff --git a/va/drm/va_drm_auth.h b/va/drm/va_drm_auth.h
> > index 1aa6989..a8ca794 100644
> > --- a/va/drm/va_drm_auth.h
> > +++ b/va/drm/va_drm_auth.h
> > @@ -30,10 +30,6 @@
> > 
> > DLL_HIDDEN
> > bool
> > -va_drm_is_authenticated(int fd);
> > -
> > -DLL_HIDDEN
> > -bool
> > va_drm_authenticate(int fd, uint32_t magic);
> > 
> > #endif /* VA_DRM_AUTH_H */
> > --
> > 2.10.2
> > 
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Re: [Libva] [PATCH] drm: remove va_drm_is_authenticated check

[Sean V Kelley]

> On 15 Samh 2016, at 09:44, Emil Velikov  wrote:
> 
> On 15 November 2016 at 15:42, David Herrmann  > wrote:
>> Hi
>> 
>> On Tue, Nov 15, 2016 at 4:24 PM, Emil Velikov > > wrote:
>>> If we do not use a render node we must authenticate. Doing the extra
>>> GetClient calls/ioctls does not help much, so don't bother.
>>> 
>>> Cc: David Herrmann 
>>> Cc: Daniel Vetter 
>>> Signed-off-by: Emil Velikov 
>>> ---
>>> David, Daniel, I believe things are perfectly reasonable on kernel side.
>>> If not please shout.
>>> ---
>>> va/drm/va_drm.c  |  8 ++--
>>> va/drm/va_drm_auth.c | 35 ---
>>> va/drm/va_drm_auth.h |  4 
>>> 3 files changed, 2 insertions(+), 45 deletions(-)
>>> 
>>> diff --git a/va/drm/va_drm.c b/va/drm/va_drm.c
>>> index 08071cf..59e33fa 100644
>>> --- a/va/drm/va_drm.c
>>> +++ b/va/drm/va_drm.c
>>> @@ -74,12 +74,8 @@ va_DisplayContextGetDriverName(
>>> if (ret < 0)
>>> return VA_STATUS_ERROR_OPERATION_FAILED;
>>> 
>>> -if (!va_drm_is_authenticated(drm_state->fd)) {
>>> -if (!va_drm_authenticate(drm_state->fd, magic))
>>> -return VA_STATUS_ERROR_OPERATION_FAILED;
>>> -if (!va_drm_is_authenticated(drm_state->fd))
>>> -return VA_STATUS_ERROR_OPERATION_FAILED;
>>> -}
>>> +if (!va_drm_authenticate(drm_state->fd, magic))
>>> +return VA_STATUS_ERROR_OPERATION_FAILED;
>> 
>> va_drm_authenticate() on native DRM returns EINVAL (via
>> drmAuthMagic()) if already authenticated. Hence, this solution only
>> works if you can guarantee that @drm_state->fd is not already
>> authenticated.
>> 
>> I don't know the VA internals, so cannot see whether this matters.
>> 
> The API (vaGetDisplayDRM) isn't explicit if the device has to be auth.
> yet I'm leaning towards no. Not to mention that every user of vaapi
> [that I know of] does not do auth.

Indeed the intent has been to allow vaGetDisplayDRM() to accept DRM 
Render-Nodes bypassing authentication to facilitate headless or remote based 
modes, e.g., ssh remotely with no auth on system display.  We really don’t do 
auth at all.  Auth has always been a byproduct of what ever backend we needed 
to support, or work around, e.g., Android.  I’m inclined to be okay with this 
patch.

Thanks,

Sean

> On the libva side, it's done once during vaInitialize and only when
> using the DRM display (vaGetDisplayDRM).
> 
> -Emil
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Re: [Libva] [PATCH] va/x11: Require synchronisation to vblank with DRI2SwapBuffers

[Sean V Kelley]

On Thu, 2016-11-17 at 01:22 +, Xiang, Haihao wrote:
> Hi,
> 
> Someone got lockup with this patch and I don't see the issue is
> resolved, please check the thread below
> 
> https://lists.freedesktop.org/archives/intel-gfx/2015-December/083572
> .h
> tml  ([Intel-gfx] vsync + vaapi question).
> 
> and this is the last response:
> 
> https://lists.freedesktop.org/archives/intel-gfx/2015-December/083862
> .h
> tml
> 
> I will revert this patch until we root the cause.


Good catch Haihao, I had assumed it was resolved.

Sean

> 
> Thanks
> Haihao
> 
> 
> > On Wed, Nov 16, 2016 at 1:35 AM, Chris Wilson  > o.
> > uk> wrote:
> > > On Thu, Dec 24, 2015 at 03:48:07PM +, Chris Wilson wrote:
> > > > On Thu, Dec 24, 2015 at 03:42:37PM +, Chris Wilson wrote:
> > > > > By passing divisor=0, we imply we do not care about
> > > > > synchronisation of
> > > > > this request to the vertical refresh - the spec says that if
> > > > > we
> > > > > miss the
> > > > > target frame, the swap will be presented as quickly as
> > > > > possible
> > > > > and may
> > > > > forgo waiting until the next vblank. By using divisor=1, we
> > > > > request that
> > > > > the swap be presented upon the vertical refresh immediately
> > > > > following
> > > > > recipe, enforcing the synchronisation to vblank and avoiding
> > > > > tearing.
> > > > 
> > > >   ^receipt
> > > 
> > > Ping.
> > > -Chris
> > > 
> > 
> > 
> > This fell through, this is fine.
> > 
> > lgtm, applied.
> > 
> > Sean
> > 
> > 
> > > --
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> > > https://lists.freedesktop.org/mailman/listinfo/libva
> > 
> > 
> > 
> 
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Re: [Libva] [PATCH] va/x11: Require synchronisation to vblank with DRI2SwapBuffers

[Sean V Kelley]

On Wed, Nov 16, 2016 at 1:35 AM, Chris Wilson <ch...@chris-wilson.co.uk> wrote:
> On Thu, Dec 24, 2015 at 03:48:07PM +, Chris Wilson wrote:
>> On Thu, Dec 24, 2015 at 03:42:37PM +, Chris Wilson wrote:
>> > By passing divisor=0, we imply we do not care about synchronisation of
>> > this request to the vertical refresh - the spec says that if we miss the
>> > target frame, the swap will be presented as quickly as possible and may
>> > forgo waiting until the next vblank. By using divisor=1, we request that
>> > the swap be presented upon the vertical refresh immediately following
>> > recipe, enforcing the synchronisation to vblank and avoiding tearing.
>>   ^receipt
>
> Ping.
> -Chris
>


This fell through, this is fine.

lgtm, applied.

Sean


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Re: [Libva] [LIBVA_INTEL_DRIVER][PATCH V2 5/8] Initialize one 10bit-scaling gpe_context for Gen9

[Sean V Kelley]

Hi Yakui,

On Tue, Nov 15, 2016 at 11:53 PM, Zhao Yakui <yakui.z...@intel.com> wrote:
> On 11/16/2016 09:01 AM, Zhao Yakui wrote:
>>
>> On 11/15/2016 06:43 AM, Sean V Kelley wrote:
>>>
>>> On Thu, Nov 10, 2016 at 5:56 PM, Zhao Yakui<yakui.z...@intel.com> wrote:
>>>>
>>>> V1->V2: Add the conv_p010.g9b shader into the dist list
>>>>
>>>>
>>>> + width, height, pitch,
>>>> + gpe_resource->bo->offset64 + gpe_surface->offset,
>>>> + 0);
>>>> +
>>>> + dri_bo_emit_reloc(gpe_context->surface_state_binding_table.bo,
>>>> + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
>>>> + gpe_surface->offset,
>>>> + surface_state_offset + offsetof(struct gen9_surface_state, ss8),
>>>> + gpe_resource->bo);
>>>
>>>
>>> A good rule of thumb:
>>>
>>> If you're going to be rendering to a surface using the 3D engine, or
>>> otherwise writing it via the GPU, I'd suggest I915_GEM_DOMAIN_RENDER.
>>>
>>> If you're only sampling from it, or reading constant data, I'd use
>>> I915_GEM_DOMAIN_SAMPLER.
>>>
>>> It looks like to me you are only sampling from the binding table.
>>> Please correct me if I am wrong.
>>
>>
>> Thanks for the review.
>>
>> For the usage scenario of 10bit sampling, it is OK to use the
>> DOMAIN_SAMPLER.
>> But the above code path also covers the other reading function, which is
>> based on Render cache. So the DOMAIN_RENDER is used for read domain. And
>> it is also safe to configure DOMAIN_RENDER for sampling engine.
>>
>>>
>>> I believe the thinking was that GEM would originally handle the
>>> situation where buffers would switch from one domain to another, and
>>> flush write/read caches as appropriate to ensure coherency. Nowadays,
>>> the kernel just flushes most of them between batches anyway, since we
>>> never observed reducing that to help performance, and it helped a lot
>>> with stability (what with all the necessary workarounds).
>>
>>
>> Right. The current kernel GEM driver doesn't distinguish the
>> DOMAIN_SAMPLER and DOMAIN_RENDER very clearly especially for the latest
>> hw platform. They only care the domain switch to ensure CPU/GPU cache
>> coherency. In such case I think that it is safe/simple to configure the
>> DOMAIN_RENDER for read and write domain.
>
>
> Hi, Sean
>
> More info is added.
> It is also OK that the read domain is configured to DOMAIN_RENDER or
> DOMAIN_SAMPLER if we can know the corresponding GPU cache type. But in such
> case we have to distinguish the corresponding reading operation for the
> given surfaces. And more fields are required to record the corresponding
> domain for the given operation. It will become quite complex. So IMO it will
> be simple to configure the DOMAIN_RENDER for the read domain and then the
> kernel GEM driver helps to handle the cache coherency.

Agreed, based on the use case here where we also have to cover read
operations from the render cache.

>
> BTW: The Beignet OpenCL also uses the simple mechanism for the sampling
> engine. (The DOMAIN_RENDER is used for the read domain).


Okay.


lgtm.

Sean

>
> Thanks
>   Yakui
>
>
>>
>>
>>>
>>> Thanks,
>>>
>>> Sean
>>>
>>>
>>>> + } else if (gpe_surface->is_2d_surface&& gpe_surface->is_uv_surface) {
>>>> unsigned int cbcr_offset;
>>>> struct gen9_surface_state *ss = (struct gen9_surface_state *)(buf +
>>>> surface_state_offset);
>>>>
>>>> diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
>>>> index a70638b..0cbef43 100644
>>>> --- a/src/i965_gpe_utils.h
>>>> +++ b/src/i965_gpe_utils.h
>>>> @@ -418,6 +418,8 @@ struct i965_gpe_surface
>>>> unsigned int is_media_block_rw:1;
>>>> unsigned int is_raw_buffer:1;
>>>> unsigned int is_16bpp :1;
>>>> + /* use the override_offset for 2d_surface */
>>>> + unsigned int is_override_offset : 1;
>>>>
>>>> unsigned int vert_line_stride_offset;
>>>> unsigned int vert_line_stride;
>>>> @@ -425,7 +427,7 @@ struct i965_gpe_surface
>>>> unsigned int format; // 2d surface only
>>>> unsigned int v_direction; // adv surface only
>>>> unsigned int size; // buffer only
>>>> - unsigned int offset; // buffer only
>>>> + unsigned int offset;
>>>>
>>&g

Re: [Libva] libyami 1.0.1 release

[Sean V Kelley]

in middleware, gstreamer-vaapi for example
>
>
>
>   the detects are:
>
>   - so far, only plain rendering is supported:
> wl_surface_attach/wl_surface_damage;
>
> texture video rendering is still a gap
>
>   - the shared wl_display/wl_window/wl_event_queue are complex and
> problematic
>
>
>
>   it should be much easier with dma_buf.
>
>   We needn't do anything special for native window system in either vaapi
> driver or
>
>   codec library. with dma_buf handle exported, application can draw the
> video
>
>   frame (dma_buf) by EGL/GLES, EGL handle native window system
> automatically(including
>
>   wrap it into a wl_buffer internally).
>
>
>
> + GStreamer support
>
>   We usually do a lot on hw video buffer sharing in GStreamer, hw video
> buffer are
>
>   platform dependent, but the framework requires to wrap them in a generic
> way. we do
>
>   a lot in decoder to wrap a platform dependent handle into a subclass of
> base
>
>   video buffer, then unwrap it in video sink. and tries best to hide hw
> detail when
>
>   a sw component request to access the frame data.
>
>
>
>   it becomes simple when hw codec support dma_buf, since dma_buf is Linux
> generic.
>
>   it is possible that hw video become not the 2nd class citizen any more. we
> don't
>
>   need additional wrapper in decoder side, and we don't need a special video
> sink
>
>   for each hw video type.
>
>
>
> + dma_buf rendering for legacy support
>
>   in the above ideas, we usually consider EGL/GLES rendering context, how
> about
>
>   legacy usage? it is simple as well.
>
>
>
>   DRI3 protocol support dma_buf, it means a dma_buf handle can be sent to
> server
>
>   for window update. Keith said mesa is using it, and on server side glamor
> handle
>
>   the dma_buf. the remaining gap is that YUV buffer hasn't been supported
> yet, but
>
>   not hard to add it.
>
>
>
>
>
> From: Zhao, Halley
> Sent: Friday, November 28, 2014 2:26 PM
> To: liby...@lists.01.org
> Cc: Li, Jocelyn; Kelley, Sean V
> Subject: libyami 0.1.4 release
>
>
>
> libyami 0.1.4 release
>
> =
>
>
>
> features update
>
> ---
>
> -   Additional fixes(most are thread race condition) for v4l2 wrapper
> (egl/gles)
>
> -   Add glx support in v4l2 wrapper
>
> -   Basic transcoding support: encoder test accepts input data from
> decoder output
>
> -   Testscript is added, it supports one-run-for-all: with a folder
> including h264/vp8/jpeg/raw-ref,
>
> we can test them in one run. It serves as BAT (basic acceptance
> test) for pull request merge.
>
> -   Report fps in decode test, support decoding only test (skip
> rendering)
>
> -   Vp8/jpeg are supported in v4l2 decoder as well
>
> -   Decode test can be built/run without X11
>
> -   Code refinement for decoder test output and encoder classes
>
> -   dma_buf fixes, when video frame is exported as dma_buf, it renders
> well as texture
>
> -   with additional patch for chrome:
>
> V4L2VDA/V4L2VEA pass chrome video unit test
>
> video playback in browser draft ok
>
> -   for v4l2 wrapper, see:
> https://github.com/halleyzhao/yami-share/blob/master/Yami_V4L2_wrapper_for_Chrome.pdf
>
>
>
> known issues
>
> ---
>
> -   this release has been fully tested by validation team
>
> -   some jpeg file similarity <0.99 (~0.98) after decoding
>
> https://github.com/01org/libyami/issues/108
>
>
>
> future release plan:
>
> 
>
> Dec: v0.2
>
> jpeg encoder
>
> vp9 decoder
>
> vp8 encoder (depends on driver availability)
>
> initial ffmpeg support
>
>
>
> Feb'15: v0.3
>
> unified input/output buffer of yami
>
> transcoding support with unified input/output buffer
>
> camera dma_buf support, camera with jpeg input
>
> use yami in ffmpeg for hw codec
>
>
>
> Future:
>
> h265 decoder



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Re: [Libva] [PATCH 8/8] Align coordinate/width of DST rect for 10-bit VPP conversion

[Sean V Kelley]

On Wed, Nov 9, 2016 at 11:39 AM, Zhao Yakui <yakui.z...@intel.com> wrote:
> This is the HW requirement and it is handled internally.
>
> Signed-off-by: Zhao Yakui <yakui.z...@intel.com>

lgtm,

Sean

> ---
>  src/gen75_picture_process.c | 8 
>  1 file changed, 8 insertions(+)
>
> diff --git a/src/gen75_picture_process.c b/src/gen75_picture_process.c
> index 4f7f794..3c2e251 100644
> --- a/src/gen75_picture_process.c
> +++ b/src/gen75_picture_process.c
> @@ -213,6 +213,8 @@ gen75_proc_picture(VADriverContextP ctx,
>  intel_gpe_support_10bit_scaling(proc_ctx)) {
>  struct i965_proc_context *gpe_proc_ctx;
>  struct i965_surface src_surface, dst_surface;
> +unsigned int tmp_width, tmp_x;
> +
>
>  src_surface.base = (struct object_base *)obj_src_surf;
>  src_surface.type = I965_SURFACE_TYPE_SURFACE;
> @@ -220,6 +222,12 @@ gen75_proc_picture(VADriverContextP ctx,
>  dst_surface.type = I965_SURFACE_TYPE_SURFACE;
>  gpe_proc_ctx = (struct i965_proc_context 
> *)proc_ctx->vpp_fmt_cvt_ctx;
>
> +tmp_x = ALIGN_FLOOR(dst_rect.x, 2);
> +tmp_width = dst_rect.x + dst_rect.width;
> +tmp_width = tmp_width - tmp_x;
> +dst_rect.x = tmp_x;
> +dst_rect.width = tmp_width;
> +
>  return gen9_p010_scaling_post_processing(ctx, 
> _proc_ctx->pp_context,
>   _surface, _rect,
>   _surface, 
> _rect);
> --
> 2.8.3
>
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Re: [Libva] [PATCH 7/8] Execute the 10-bit scaling for P010 surface on Gen9+

[Sean V Kelley]

On Thu, Nov 10, 2016 at 11:21 PM, Zhao Yakui <yakui.z...@intel.com> wrote:
> On 11/11/2016 03:05 PM, Xiang, Haihao wrote:
>>
>> On Wed, 2016-11-09 at 14:39 -0500, Zhao Yakui wrote:
>>>
>>> Now the 10-bit scaling based on GPU shader is supported on Gen9+. In
>>> such
>>> case it will use the 10-bit scaling based on GPU shader instead of
>>> three-steps
>>> by using VEBOX(VEBOX->NV12->Scale NV12->VEBOX).
>>
>>
>> The 2nd step (NV12 to scale NV12) doesn't use VEBOX.
>
>
> Yes. This is only to indicate that it needs the intermediate buffer for the
> corresponding conversion.
>
> I will update the change log in next version.

Agree, otherwise rest lgtm.

Sean

>
>
>>
>>>   Of course when the size is
>>> not changed, it still falls back to VEBOX.
>>>
>>>
>>> Signed-off-by: Zhao Yakui<yakui.z...@intel.com>
>>> ---
>>>   src/gen75_picture_process.c | 50
>>> +++--
>>>   1 file changed, 44 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/src/gen75_picture_process.c
>>> b/src/gen75_picture_process.c
>>> index 069088a..4f7f794 100644
>>> --- a/src/gen75_picture_process.c
>>> +++ b/src/gen75_picture_process.c
>>> @@ -38,6 +38,7 @@
>>>   #include "i965_drv_video.h"
>>>   #include "i965_post_processing.h"
>>>   #include "gen75_picture_process.h"
>>> +#include "gen8_post_processing.h"
>>>
>>>   extern struct hw_context *
>>>   i965_proc_context_init(VADriverContextP ctx,
>>> @@ -91,6 +92,21 @@ gen75_vpp_vebox(VADriverContextP ctx,
>>>return va_status;
>>>   }
>>>
>>> +static int intel_gpe_support_10bit_scaling(struct
>>> intel_video_process_context *proc_ctx)
>>> +{
>>> +struct i965_proc_context *gpe_proc_ctx;
>>> +
>>> +if (!proc_ctx || !proc_ctx->vpp_fmt_cvt_ctx)
>>> +return 0;
>>> +
>>> +gpe_proc_ctx = (struct i965_proc_context *)proc_ctx-
>>>>
>>>> vpp_fmt_cvt_ctx;
>>>
>>> +
>>> +if (gpe_proc_ctx->pp_context.scaling_context_initialized)
>>> +return 1;
>>> +else
>>> +return 0;
>>> +}
>>> +
>>>   VAStatus
>>>   gen75_proc_picture(VADriverContextP ctx,
>>>  VAProfile profile,
>>> @@ -165,12 +181,6 @@ gen75_proc_picture(VADriverContextP ctx,
>>>   i965_check_alloc_surface_bo(ctx, obj_dst_surf, is_tiled,
>>> fourcc, sampling);
>>>   }
>>>
>>> -proc_ctx->surface_render_output_object = obj_dst_surf;
>>> -proc_ctx->surface_pipeline_input_object = obj_src_surf;
>>> -assert(pipeline_param->num_filters<= 4);
>>> -
>>> -int vpp_stage1 = 0, vpp_stage2 = 1, vpp_stage3 = 0;
>>> -
>>>   if (pipeline_param->surface_region) {
>>>   src_rect.x = pipeline_param->surface_region->x;
>>>   src_rect.y = pipeline_param->surface_region->y;
>>> @@ -195,6 +205,34 @@ gen75_proc_picture(VADriverContextP ctx,
>>>   dst_rect.height = obj_dst_surf->orig_height;
>>>   }
>>>
>>> +if (pipeline_param->num_filters == 0 || pipeline_param->filters
>>> == NULL ){
>>> +if ((obj_src_surf->fourcc == VA_FOURCC_P010)&&
>>> +(obj_dst_surf->fourcc == VA_FOURCC_P010)&&
>>> +(src_rect.width != dst_rect.width ||
>>> + src_rect.height != dst_rect.height)&&
>>> +intel_gpe_support_10bit_scaling(proc_ctx)) {
>>> +struct i965_proc_context *gpe_proc_ctx;
>>> +struct i965_surface src_surface, dst_surface;
>>> +
>>> +src_surface.base = (struct object_base *)obj_src_surf;
>>> +src_surface.type = I965_SURFACE_TYPE_SURFACE;
>>> +dst_surface.base = (struct object_base *)obj_dst_surf;
>>> +dst_surface.type = I965_SURFACE_TYPE_SURFACE;
>>> +gpe_proc_ctx = (struct i965_proc_context *)proc_ctx-
>>>>
>>>> vpp_fmt_cvt_ctx;
>>>
>>> +
>>> +return gen9_p010_scaling_post_processing(ctx,
>>> _proc_ctx->pp_context,
>>> +_surface,
>>> _rect,
>>> +_surface,
>>> _rect);
>>> +}
>>> +}
>>> +
>>> +proc_ctx->surface_render_output_object = obj_dst_surf;
>>> +proc_ctx->surface_pipeline_input_object = obj_src_surf;
>>> +assert(pipeline_param->num_filters<= 4);
>>> +
>>> +int vpp_stage1 = 0, vpp_stage2 = 1, vpp_stage3 = 0;
>>> +
>>> +
>>>   if(obj_src_surf->fourcc == VA_FOURCC_P010) {
>>>   vpp_stage1 = 1;
>>>   vpp_stage2 = 0;
>
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Re: [Libva] [LIBVA_INTEL_DRIVER][PATCH V2 4/8] Initialize internal context based on Render ring earlier

[Sean V Kelley]

On Thu, Nov 10, 2016 at 5:56 PM, Zhao Yakui <yakui.z...@intel.com> wrote:
> V1->V2: Remove the unnecessary implicit initialization in gen75_vpp_fmt_cvt
> as it is already initalized.
>
> Signed-off-by: Zhao Yakui <yakui.z...@intel.com>


lgtm.

Sean


> ---
>  src/gen75_picture_process.c | 11 ++-
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/src/gen75_picture_process.c b/src/gen75_picture_process.c
> index 0b681f1..6e1102a 100644
> --- a/src/gen75_picture_process.c
> +++ b/src/gen75_picture_process.c
> @@ -53,11 +53,6 @@ gen75_vpp_fmt_cvt(VADriverContextP ctx,
>  struct intel_video_process_context *proc_ctx =
>   (struct intel_video_process_context *)hw_context;
>
> -/* implicity surface format coversion and scaling */
> -if(proc_ctx->vpp_fmt_cvt_ctx == NULL){
> - proc_ctx->vpp_fmt_cvt_ctx = i965_proc_context_init(ctx, NULL);
> -}
> -
>  va_status = i965_proc_picture(ctx, profile, codec_state,
>proc_ctx->vpp_fmt_cvt_ctx);
>
> @@ -148,6 +143,12 @@ gen75_proc_picture(VADriverContextP ctx,
>  goto error;
>  }
>
> +if (pipeline_param->num_filters == 0 || pipeline_param->filters == NULL 
> ){
> +/* explicitly initialize the VPP based on Render ring */
> +if (proc_ctx->vpp_fmt_cvt_ctx == NULL)
> +proc_ctx->vpp_fmt_cvt_ctx = i965_proc_context_init(ctx, NULL);
> +}
> +
>  if (!obj_dst_surf->bo) {
>  unsigned int is_tiled = 1;
>  unsigned int fourcc = VA_FOURCC_NV12;
> --
> 1.9.0
>
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Re: [Libva] [PATCH 3/8] Add one API to initialize MEDIA_OBJECT_WALKER parameter for video post-processing

[Sean V Kelley]

On Wed, Nov 9, 2016 at 11:39 AM, Zhao Yakui <yakui.z...@intel.com> wrote:
> Signed-off-by: Zhao Yakui <yakui.z...@intel.com>


lgtm

Sean

> ---
>  src/i965_gpe_utils.c | 48 
>  src/i965_gpe_utils.h | 14 ++
>  2 files changed, 62 insertions(+)
>
> diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
> index 3cd41e8..30529e1 100644
> --- a/src/i965_gpe_utils.c
> +++ b/src/i965_gpe_utils.c
> @@ -2082,3 +2082,51 @@ gen9_gpe_media_object_walker(VADriverContextP ctx,
>
>  ADVANCE_BATCH(batch);
>  }
> +
> +
> +void
> +intel_vpp_init_media_object_walker_parameter(struct 
> intel_vpp_kernel_walker_parameter *kernel_walker_param,
> +struct 
> gpe_media_object_walker_parameter *walker_param)
> +{
> +memset(walker_param, 0, sizeof(*walker_param));
> +
> +walker_param->use_scoreboard = kernel_walker_param->use_scoreboard;
> +
> +walker_param->block_resolution.x = kernel_walker_param->resolution_x;
> +walker_param->block_resolution.y = kernel_walker_param->resolution_y;
> +
> +walker_param->global_resolution.x = kernel_walker_param->resolution_x;
> +walker_param->global_resolution.y = kernel_walker_param->resolution_y;
> +
> +walker_param->global_outer_loop_stride.x = 
> kernel_walker_param->resolution_x;
> +walker_param->global_outer_loop_stride.y = 0;
> +
> +walker_param->global_inner_loop_unit.x = 0;
> +walker_param->global_inner_loop_unit.y = 
> kernel_walker_param->resolution_y;
> +
> +walker_param->local_loop_exec_count = 0x;  //MAX VALUE
> +walker_param->global_loop_exec_count = 0x;  //MAX VALUE
> +
> +if (kernel_walker_param->no_dependency) {
> +/* The no_dependency is used for VPP */
> +walker_param->scoreboard_mask = 0;
> +walker_param->use_scoreboard = 0;
> +// Raster scan walking pattern
> +walker_param->local_outer_loop_stride.x = 0;
> +walker_param->local_outer_loop_stride.y = 1;
> +walker_param->local_inner_loop_unit.x = 1;
> +walker_param->local_inner_loop_unit.y = 0;
> +walker_param->local_end.x = kernel_walker_param->resolution_x - 1;
> +walker_param->local_end.y = 0;
> +} else {
> +walker_param->local_end.x = 0;
> +walker_param->local_end.y = 0;
> +
> +// 26 degree
> +walker_param->scoreboard_mask = 0x0F;
> +walker_param->local_outer_loop_stride.x = 1;
> +walker_param->local_outer_loop_stride.y = 0;
> +walker_param->local_inner_loop_unit.x = -2;
> +walker_param->local_inner_loop_unit.y = 1;
> +}
> +}
> diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
> index c56d3d5..383fcdf 100644
> --- a/src/i965_gpe_utils.h
> +++ b/src/i965_gpe_utils.h
> @@ -508,4 +508,18 @@ gen9_gpe_media_object_walker(VADriverContextP ctx,
>   struct intel_batchbuffer *batch,
>   struct gpe_media_object_walker_parameter 
> *param);
>
> +
> +struct intel_vpp_kernel_walker_parameter
> +{
> +unsigned intuse_scoreboard;
> +unsigned intscoreboard_mask;
> +unsigned intno_dependency;
> +unsigned intresolution_x;
> +unsigned intresolution_y;
> +};
> +
> +extern void
> +intel_vpp_init_media_object_walker_parameter(struct 
> intel_vpp_kernel_walker_parameter *kernel_walker_param,
> + struct 
> gpe_media_object_walker_parameter *walker_param);
> +
>  #endif /* _I965_GPE_UTILS_H_ */
> --
> 2.8.3
>
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Re: [Libva] [PATCH 1/8] Fix the incorrect sampler_state offset for INTERFACE_DESCRIPTOR_DATA on BDW+

[Sean V Kelley]

lgtm.

On Wed, Nov 9, 2016 at 11:39 AM, Zhao Yakui <yakui.z...@intel.com> wrote:
> Signed-off-by: Zhao Yakui <yakui.z...@intel.com>
> ---
>  src/i965_gpe_utils.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
> index 3ec164d..a29237b 100644
> --- a/src/i965_gpe_utils.c
> +++ b/src/i965_gpe_utils.c
> @@ -1684,7 +1684,7 @@ gen8_gpe_setup_interface_data(VADriverContextP ctx,
>  memset(desc, 0, sizeof(*desc));
>  desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6;
>  desc->desc3.sampler_count = 0;
> -desc->desc3.sampler_state_pointer = gpe_context->sampler_offset;
> +desc->desc3.sampler_state_pointer = (gpe_context->sampler_offset >> 
> 5);
>  desc->desc4.binding_table_entry_count = 0;
>  desc->desc4.binding_table_pointer = 
> (gpe_context->surface_state_binding_table.binding_table_offset >> 5);
>  desc->desc5.constant_urb_entry_read_offset = 0;
> --
> 2.8.3
>
> ___________
> Libva mailing list
> Libva@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/libva



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Re: [Libva] [PATCH] avoid asserts when color convertion fails

[Sean V Kelley]

On Mon, 2016-11-14 at 15:44 +0100, Víctor Manuel Jáquez Leal wrote:
> This patch exposes the color convertion failure in this case
> 
> gst-play-1.0 HPCAMOLQ_BRCM_B.264 --videosink=xvimagesink
> 
> This pipeline will ask to the VPP to convert from GRAY8 to YV12,
> which is the negotiated format with the XV renderer.
> 
> But this conversion fails. Without this patch, an assert will show
> up:
> 
> i965_proc_picture(VADriverContextP, VAProfile, union codec_state *,
> struct hw_context *): Assertion `status == 0x' failed.
> 
> With this patch, the error is handled correctly, throwing a
> meaningful error in GStreamer:
> 
> 0:00:00.802303348  3584 0x7feff0003400 ERROR  vaapipostproc
> gstvaapipostproc.c:805:gst_vaapipostproc_process_vpp:
> failed to apply VPP filters (error 2)
> 
> Though, the correct fix implies to enable VPP with this color
> conversion.


lgtm, applied.

Thanks,

Sean


> ---
>  src/gen75_picture_process.c | 4 +++-
>  src/i965_post_processing.c  | 6 --
>  2 files changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/src/gen75_picture_process.c
> b/src/gen75_picture_process.c
> index 0b681f1..2b82314 100644
> --- a/src/gen75_picture_process.c
> +++ b/src/gen75_picture_process.c
> @@ -286,7 +286,9 @@ gen75_proc_picture(VADriverContextP ctx,
>  if(pipeline_param->num_filters == 0 || pipeline_param-
> >filters == NULL ){
>  /* implicity surface format coversion and scaling */
>  
> -gen75_vpp_fmt_cvt(ctx, profile, codec_state,
> hw_context);
> +status = gen75_vpp_fmt_cvt(ctx, profile, codec_state,
> hw_context);
> +if(status != VA_STATUS_SUCCESS)
> +goto error;
>  }else if(pipeline_param->num_filters == 1) {
> struct object_buffer * obj_buf = BUFFER((*filter_id) +
> 0);
>  
> diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
> index 969f84b..1b4036f 100755
> --- a/src/i965_post_processing.c
> +++ b/src/i965_post_processing.c
> @@ -6034,7 +6034,8 @@ i965_proc_picture(VADriverContextP ctx,
>   VA_RT_FORMAT_YUV420,
>   1,
>   _surface_id);
> -assert(status == VA_STATUS_SUCCESS);
> +if (status != VA_STATUS_SUCCESS)
> +goto error;
>  tmp_surfaces[num_tmp_surfaces++] = out_surface_id;
>  obj_surface = SURFACE(out_surface_id);
>  assert(obj_surface);
> @@ -6053,7 +6054,8 @@ i965_proc_picture(VADriverContextP ctx,
> _rect,
> _surface,
> _rect);
> -assert(status == VA_STATUS_SUCCESS);
> +if (status != VA_STATUS_SUCCESS)
> +goto error;
>  
>  src_surface.base = (struct object_base *)obj_surface;
>  src_surface.type = I965_SURFACE_TYPE_SURFACE;


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Re: [Libva] [PATCH 0/2 v3][libva-intel-driver] report unsupported profile

[Sean V Kelley]

On Thu, 2016-11-10 at 15:08 -0800, Daniel Charles wrote:
> This is a re-send of patch 1/2 and a new patch that modifies the current
> unittests to properly test the unsupported profile condition.
> 
> As mentioned in the commit messages, UNSUPPORTED_PROFILE will be returned
> when a queried profile is not supported by any entrypoint.
> 
> If squashing the patches is preferred, let me know and I'll resubmit.
> 

lgtm, added Artie's review tag, applied.

Thanks,

Sean

> 
v2: do not change the checks for specific h/w, i.e. IS_SKL as it will
> change the purpose of the test
> 
> v3: fix the config tests for all components available so far using the same
> purpose as the original test.
> 
> 
> Daniel Charles (2):
>   i965_validate_config: return unsupported profile
>   i965_test_config: return properly unsupported profile
> 
>  src/i965_drv_video.c| 49 +-
>  test/i965_avcd_config_test.cpp  | 71 +
>  test/i965_avce_config_test.cpp  | 78 
> ++---
>  test/i965_jpegd_config_test.cpp | 29 +--
>  test/i965_jpege_config_test.cpp | 29 ---
>  5 files changed, 214 insertions(+), 42 deletions(-)
> 
> 
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Re: [Libva] [PATCH intel-driver 0/5] JPEG Encode Test Speed Optimization

[Sean V Kelley]

On Wed, 2016-10-26 at 13:24 -0700, U. Artie Eoff wrote:
> This patch series splits out the general YUV input data fields and
> routines
> from the ::JPEG::Encode::TestInput class into it's own class.  This
> new class,
> YUVImage, was then refactored to use std::valarray/std::slice to
> manage the
> underlying YUV byte data.  The JPEG encode tests are updated
> accordingly.  This
> change allows for faster comparison and conversion operations on YUV
> byte data
> input/output results and helps reduce some of the copying overhead.
> 
> Also changed the random value generator to improve it's speed.
> 
> With these changes, I observe ~2x improvement in runtime speed on the
> JPEG
> Encode test cases.
> 
> Finally, included is a Timer class for convenience that can be used
> for future
> test development.


Nice refactoring that will make it easier for adding the other
encoders.

lgtm (also tested0, applied.

Thanks,

Sean

> 
> U. Artie Eoff (5):
>   test: add a timer class
>   test: use C random library for random numbers
>   test: add YUVImage class
>   test: streamable valarray
>   test: use YUVImage in JPEG encode tests
> 
>  test/Makefile.am   |   2 +
>  test/i965_jpeg_encode_test.cpp | 135 +++-
>  test/i965_jpeg_test_data.cpp   | 196 ++-
>  test/i965_jpeg_test_data.h |  26 +-
>  test/i965_streamable.h |  25 ++
>  test/i965_test_environment.cpp |   7 +
>  test/i965_test_image_utils.cpp | 747
> +
>  test/i965_test_image_utils.h   |  66 
>  test/object_heap_test.cpp  |   4 -
>  test/test_utils.h  |  45 ++-
>  10 files changed, 970 insertions(+), 283 deletions(-)
>  create mode 100644 test/i965_test_image_utils.cpp
>  create mode 100644 test/i965_test_image_utils.h
> 


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Re: [Libva] How to implement a EGL or DRM display in VA-API driver

[Sean V Kelley]

On Fri, 2016-10-28 at 10:05 +0800, Randy Li wrote:
> 
> On 10/27/2016 11:03 PM, Xiang, Haihao wrote:
> > > -Original Message-
> > > From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org]
> > > On Behalf
> > > Of Randy Li
> > > Sent: Monday, October 24, 2016 3:59 PM
> > > To: libva@lists.freedesktop.org
> > > Cc: gwenole.beauche...@intel.com; dri-de...@lists.freedesktop.org
> > > ; linux-
> > > rockc...@lists.infradead.org; Jaquez, VictorX  > > el.com>;
> > > eddie.cai ; 林金发  > > om>;
> > > herman.c...@rock-chips.com; vjaq...@igalia.com
> > > Subject: How to implement a EGL or DRM display in VA-API driver
> > > 
> > > Hello:
> > >   I am going to implement a EGL and DRM display for Rockchip VA-
> > > API driver.
> > > We do have a EGL implementation in Rockchip VA-API driver, but it
> > > is
> > > implemented in the standard way, we did that as a X11 display.
> > >   I didn't see the usage of struct VADriverVTableEGL in
> > > gstreamer, and I have
> > > no idea about where should I implement something functions like
> > > eglExportDRMImageMESA().
> > 
> > VADriverVTableEGL is deprecated in libva, we has a more efficient
> > way to use vaapi and egl.
> > You can refer to the examples in libyami-utils (https://github.com/
> > 01org/libyami-utils.git) for
> > how to use vaapi and egl.
> 
> I see, thank you.
> > 
> > >   The DRM seems more complex, the reason I want to use the DRM is
> > > that,
> > > GPU would not work with the 4K video rendering, so the DRM means
> > > that
> > > directly output the video into video controller in our platform.
> > > But still have no
> > > idea what kind of thing I should implement in the VA-API driver.
> > > It seems that
> > > the VA-API base library would open a DRM instance for the driver,
> > > but leaving
> > > those configure for connector, encoder, planes to VA-API driver?
> 
> About the DRM, I have implemented a version which pretends a X
> output, I 
> would like to know a better way.

Connector properties and their configuration are entirely display port
oriented.  "Pretending an X output" is independent of KMS configuration
for your display port.

Sean

> > 
> > configure for connector, encoder, planes aren't a part of va-api
> > driver.  You should check libdrm and drm/i915.
> > You can refer to the test case of modetest in libdrm
> > (git.freedesktop.org/git/mesa/drm)
> > 
> > 
> > >   Could you guys give me same sample code or example of those
> > > kind of
> > > display in VA-API or the documents would help(I would not image
> > > there is a
> > > VA-API documents)
> > > 
> > > --
> > > Randy Li
> > > The third produce department
> > > 
> > > ___
> > > dri-devel mailing list
> > > dri-de...@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> > 
> > ___
> > dri-devel mailing list
> > dri-de...@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> > 
> 
> 


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Re: [Libva] [Libva-intel-driver][PATCH] vdenc: Always use the 1st VCS ring

[Sean V Kelley]

On Fri, 2016-10-28 at 13:32 +0800, Xiang, Haihao wrote:
> VDEnc/HuC only works with the 1st VCS ring, however SKL GT3+ has 2
> VCS rings.
> To avoid executing the corresponding batch buffer from the 2nd VCS
> ring in i915, we
> have to specify the 1st ring in the driver.
> 
> SKL GT1/GT2 has only one VCS ring, so specifying the 1st ring in the
> driver has no
> any impact to GT1/GT2
> 
> v2: Use the right bug URL
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97872
> Signed-off-by: Xiang, Haihao 

lgtm, applied.

Thanks,

Sean


> ---
>  src/gen9_vdenc.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/src/gen9_vdenc.c b/src/gen9_vdenc.c
> index 46da334..2bc15b7 100644
> --- a/src/gen9_vdenc.c
> +++ b/src/gen9_vdenc.c
> @@ -3567,7 +3567,8 @@ gen9_vdenc_avc_encode_picture(VADriverContextP
> ctx,
>  vdenc_context->is_first_pass = (vdenc_context->current_pass
> == 0);
>  vdenc_context->is_last_pass = (vdenc_context->current_pass
> == (vdenc_context->num_passes - 1));
>  
> -intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
> +intel_batchbuffer_start_atomic_bcs_override(batch, 0x1000,
> BSD_RING0);
> +
>  intel_batchbuffer_emit_mi_flush(batch);
>  
>  if (vdenc_context->brc_enabled) {


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Re: [Libva] [Libva-intel-driver][PATCH] svct: hrd check per layer

[Sean V Kelley]

On Thu, 2016-10-27 at 22:41 +0800, Xiang, Haihao wrote:
> Hence we can use separate parameters to estimate QP per layer and get
> more
> accurate QP for next frame in the same layer.
> 
> Tested-by: Wang, Fei W 
> Signed-off-by: Xiang, Haihao 


Yes, I was going to ask why we weren't also tracking HRD per layer.
Needed addition.

lgtm, applied.

Sean

> ---
>  src/gen6_mfc.h|  8 
>  src/gen6_mfc_common.c | 47 ++---
> --
>  src/gen8_mfc.c| 24 
>  3 files changed, 42 insertions(+), 37 deletions(-)
> 
> diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h
> index 025858d..30b5fd9 100644
> --- a/src/gen6_mfc.h
> +++ b/src/gen6_mfc.h
> @@ -244,10 +244,10 @@ struct gen6_mfc_context
>  } brc;
>  
>  struct {
> -double current_buffer_fullness;
> -double target_buffer_fullness;
> -double buffer_capacity;
> -unsigned int buffer_size;
> +double current_buffer_fullness[MAX_TEMPORAL_LAYERS];
> +double target_buffer_fullness[MAX_TEMPORAL_LAYERS];
> +double buffer_capacity[MAX_TEMPORAL_LAYERS];
> +unsigned int buffer_size[MAX_TEMPORAL_LAYERS];
>  unsigned int violation_noted;
>  } hrd;
>  
> diff --git a/src/gen6_mfc_common.c b/src/gen6_mfc_common.c
> index add73a6..68d030e 100644
> --- a/src/gen6_mfc_common.c
> +++ b/src/gen6_mfc_common.c
> @@ -98,7 +98,7 @@ static void intel_mfc_brc_init(struct encode_state
> *encode_state,
>  double frame_per_bits = 8 * 3 * encoder_context-
> >frame_width_in_pixel * encoder_context->frame_height_in_pixel / 2;
>  double qp1_size = 0.1 * frame_per_bits;
>  double qp51_size = 0.001 * frame_per_bits;
> -double bpf, factor;
> +double bpf, factor, hrd_factor;
>  int inum = encoder_context->brc.num_iframes_in_gop,
>  pnum = encoder_context->brc.num_pframes_in_gop,
>  bnum = encoder_context->brc.num_bframes_in_gop; /* Gop
> structure: number of I, P, B frames in the Gop. */
> @@ -110,12 +110,6 @@ static void intel_mfc_brc_init(struct
> encode_state *encode_state,
>  
>  mfc_context->brc.mode = encoder_context->rate_control_mode;
>  
> -mfc_context->hrd.buffer_size = encoder_context-
> >brc.hrd_buffer_size;
> -mfc_context->hrd.current_buffer_fullness =
> -(double)(encoder_context->brc.hrd_initial_buffer_fullness <
> mfc_context->hrd.buffer_size) ?
> -encoder_context->brc.hrd_initial_buffer_fullness :
> mfc_context->hrd.buffer_size / 2.;
> -mfc_context->hrd.target_buffer_fullness = (double)mfc_context-
> >hrd.buffer_size/2.;
> -mfc_context->hrd.buffer_capacity = (double)mfc_context-
> >hrd.buffer_size/qp1_size;
>  mfc_context->hrd.violation_noted = 0;
>  
>  for (i = 0; i < encoder_context->layer.num_layers; i++) {
> @@ -136,6 +130,16 @@ static void intel_mfc_brc_init(struct
> encode_state *encode_state,
>  else
>  factor = (double)encoder_context-
> >brc.framerate_per_100s[i] / encoder_context-
> >brc.framerate_per_100s[encoder_context->layer.num_layers - 1];
>  
> +hrd_factor = (double)bitrate / encoder_context-
> >brc.bits_per_second[encoder_context->layer.num_layers - 1];
> +
> +mfc_context->hrd.buffer_size[i] = (unsigned
> int)(encoder_context->brc.hrd_buffer_size * hrd_factor);
> +mfc_context->hrd.current_buffer_fullness[i] =
> +(double)(encoder_context-
> >brc.hrd_initial_buffer_fullness < encoder_context-
> >brc.hrd_buffer_size) ?
> +encoder_context->brc.hrd_initial_buffer_fullness :
> encoder_context->brc.hrd_buffer_size / 2.;
> +mfc_context->hrd.current_buffer_fullness[i] *= hrd_factor;
> +mfc_context->hrd.target_buffer_fullness[i] =
> (double)encoder_context->brc.hrd_buffer_size * hrd_factor / 2.;
> +mfc_context->hrd.buffer_capacity[i] =
> (double)encoder_context->brc.hrd_buffer_size * hrd_factor / qp1_size;
> +
>  if (encoder_context->layer.num_layers > 1) {
>  if (i == 0) {
>  intra_period = (int)(encoder_context->brc.gop_size *
> factor);
> @@ -183,21 +187,22 @@ int intel_mfc_update_hrd(struct encode_state
> *encode_state,
>   int frame_bits)
>  {
>  struct gen6_mfc_context *mfc_context = encoder_context-
> >mfc_context;
> -double prev_bf = mfc_context->hrd.current_buffer_fullness;
> +int layer_id = encoder_context->layer.curr_frame_layer_id;
> +double prev_bf = mfc_context-
> >hrd.current_buffer_fullness[layer_id];
>  
> -mfc_context->hrd.current_buffer_fullness -= frame_bits;
> +mfc_context->hrd.current_buffer_fullness[layer_id] -=
> frame_bits;
>  
> -if (mfc_context->hrd.buffer_size > 0 && mfc_context-
> >hrd.current_buffer_fullness <= 0.) {
> -mfc_context->hrd.current_buffer_fullness = prev_bf;
> +if (mfc_context->hrd.buffer_size[layer_id] > 0 && mfc_context-
> 

Re: [Libva] problem when tiling is disabled on decoded surfaces

[Sean V Kelley]

On Thu, 2016-10-27 at 16:00 +, Xiang, Haihao wrote:
> > -Original Message-
> > From: Julien Isorce [mailto:julien.iso...@gmail.com]
> > Sent: Wednesday, October 26, 2016 4:43 PM
> > To: Xiang, Haihao <haihao.xi...@intel.com>
> > Cc: Zhao, Yakui <yakui.z...@intel.com>; Kelley, Sean V
> > <sean.v.kel...@intel.com>; libva@lists.freedesktop.org
> > Subject: Re: [Libva] problem when tiling is disabled on decoded
> > surfaces
> > 
> > Hi,
> > 
> > 
> > Thx for the detailed.
> > 
> > 
> > If I understand correctly, the intel HW video decoder can only
> > output a tiled
> > layout. But if I export the surface as a dmabuf and I use mmap on
> > it, I will still
> > be able to access pixels using width/pitch like if it was linear.
> 
> You do not need to export the surface as a dmabuf if you only want to
> access pixels in your program.
> the purpose of exporting a surface as a dmabuf is for buffer sharing.

Indeed, if you do need to use dmabuf export in a non VA_SURFACE
context, we do have changes we need to make in the fugure for better
sharing of the export.

> 
> > 
> > If I need to share it with a non-intel gpu I would need VPP since
> > this unit can
> > output a linear layout (I can configure it by clearing the flag
> > VA_SURFACE_EXTBUF_DESC_ENABLE_TILING when calling vaCreateSurfaces)
> 
> Yes.


Agreed.

Thanks,

Sean

> 
> > 
> > 
> > Is it correct ?
> > 
> > 
> > Cheers
> > 
> > Julien
> > 
> > 
> > 
> > On 8 October 2016 at 04:09, Xiang, Haihao <haihao.xi...@intel.com
> > <mailto:haihao.xi...@intel.com> > wrote:
> > 
> > 
> > 
> > Hi Julien,
> > 
> > Please do not set obj_surface->user_disable_tiling to true
> > unless you
> > know the usage, e.g. your applicate allocates a VA surface via
> > libva
> > and shares this surface between libva and camera, some cameras
> > only
> >     support linear memory.
> > 
> > In your case, it is the right behavior if you saw garbage
> > because all
> > surfaces are linear however HW requires a tiled surface for
> > decoding.
> > 
> > Thanks
> > Haihao
> > 
> > 
> > 
> > > On 10/08/2016 02:13 AM, Sean V Kelley wrote:
> > > > On Fri, Oct 7, 2016 at 11:00 AM, Sean V Kelley > y@intel.
> > > > com>  wrote:
> > > > > On Thu, Oct 6, 2016 at 1:20 AM, Julien Isorce > ce@gmail
> > > > > .com>  wrote:
> > > > > > Hi,
> > > > > >
> > > > > > In intel vaapi driver I tried disabling tiling with:
> > > > > >
> > > > > > ---   a/src/i965_drv_video.c
> > > > > > +++ b/src/i965_drv_video.c
> > > > > > @@ -1534,7 +1534,7 @@ i965_CreateSurfaces2(
> > > > > >   obj_surface->orig_height = height;
> > > > > > -obj_surface->user_disable_tiling = false;
> > > > > > +   obj_surface->user_disable_tiling = true;
> > > > > >   obj_surface->user_h_stride_set = false;
> > > > > >
> > > > > > But then gst-launch-1.0 filesrc
> > > > > > location=~/Downloads/simpson.mp4 ! qtdemux !
> > > > > > vaapih264dec ! xvimagesink shows garbage, like if the
> > memory
> > > > > > was still
> > > > > > tiled.
> > > > > >
> > > > >
> > > > > We implemented disable tiling for a very specific
> > purpose.  We
> > > > > were
> > > > > sharing surfaces decoded via Imagination Tech driver on a
> > > > > Baytrail,
> > > > > and wrapped that for the X11 backend rendering.  I was
> > using
> > two
> > > > > drivers (IMG and GEN).
> > > > > At the time, the driver assumed that all surfaces were
> > > > > tiled.  Since
> > > > > IMG was not tiled, we needed a way to pass through.  I'll
> > look at
> > > > > this
> > > > > more closely.
> > > > >
> > > > > But for hardware GEN decoding we assume the surface to be
> > > > > tiled.  The
> > > > > intent was never to allow disabling tilint for purposes
> > of a

Re: [Libva] [PATCH] Add callbacks for error and info messages.

[Sean V Kelley]

On Wed, 2016-10-19 at 13:37 +0100, Emmanuel Gil Peyrot wrote:
> This lets any application using libva choose the best way to report
> info and error messages to the user, for example graphical
> application
> can open a popup on errors and write info messages in the toolbar.


What version of Libva are you testing this with?

Sean

> 
> Signed-off-by: Emmanuel Gil Peyrot 
> ---
>  va/sysdeps.h | 20 
>  va/va.c  | 53
> +
>  va/va.h  | 15 +++
>  3 files changed, 68 insertions(+), 20 deletions(-)
> 
> diff --git a/va/sysdeps.h b/va/sysdeps.h
> index 4de764d..164a274 100644
> --- a/va/sysdeps.h
> +++ b/va/sysdeps.h
> @@ -46,26 +46,6 @@
>  
>  /* Android logging utilities */
>  # include 
> -
> -# ifdef ANDROID_ALOG
> -#  define va_log_error(buffer)  do { ALOGE("%s", buffer); } while
> (0)
> -#  define va_log_info(buffer)   do { ALOGI("%s", buffer); } while
> (0)
> -# elif ANDROID_LOG
> -#  define va_log_error(buffer)  do { LOGE("%s", buffer); } while (0)
> -#  define va_log_info(buffer)   do { LOGI("%s", buffer); } while (0)
> -# endif
> -#endif
> -
> -#ifndef va_log_error
> -#define va_log_error(buffer) do {   \
> -fprintf(stderr, "libva error: %s", buffer); \
> -} while (0)
> -#endif
> -
> -#ifndef va_log_info
> -#define va_log_info(buffer) do {\
> -fprintf(stderr, "libva info: %s", buffer);  \
> -} while (0)
>  #endif
>  
>  #if defined __GNUC__ && defined HAVE_GNUC_VISIBILITY_ATTRIBUTE
> diff --git a/va/va.c b/va/va.c
> index b524fc7..5cf7220 100644
> --- a/va/va.c
> +++ b/va/va.c
> @@ -106,12 +106,62 @@ int vaDisplayIsValid(VADisplay dpy)
>  return pDisplayContext && (pDisplayContext->vadpy_magic ==
> VA_DISPLAY_MAGIC) && pDisplayContext->vaIsValid(pDisplayContext);
>  }
>  
> +static void default_log_error(const char *buffer)
> +{
> +# ifdef ANDROID_ALOG
> +ALOGE("%s", buffer);
> +# elif ANDROID_LOG
> +LOGE("%s", buffer);
> +# else
> +fprintf(stderr, "libva error: %s", buffer);
> +# endif
> +}
> +
> +static void default_log_info(const char *buffer)
> +{
> +# ifdef ANDROID_ALOG
> +ALOGI("%s", buffer);
> +# elif ANDROID_LOG
> +LOGI("%s", buffer);
> +# else
> +fprintf(stderr, "libva info: %s", buffer);
> +# endif
> +}
> +
> +static vaMessageCallback va_log_error = default_log_error;
> +static vaMessageCallback va_log_info = default_log_info;
> +
> +/**
> + * Set the callback for error messages, or NULL for no logging.
> + * Returns the previous one, or NULL if it was disabled.
> + */
> +vaMessageCallback vaSetErrorCallback(vaMessageCallback callback)
> +{
> +vaMessageCallback old_callback = va_log_error;
> +va_log_error = callback;
> +return old_callback;
> +}
> +
> +/**
> + * Set the callback for info messages, or NULL for no logging.
> + * Returns the previous one, or NULL if it was disabled.
> + */
> +vaMessageCallback vaSetInfoCallback(vaMessageCallback callback)
> +{
> +vaMessageCallback old_callback = va_log_info;
> +va_log_info = callback;
> +return old_callback;
> +}
> +
>  void va_errorMessage(const char *msg, ...)
>  {
>  char buf[512], *dynbuf;
>  va_list args;
>  int n, len;
>  
> +if (va_log_error == NULL)
> +return;
> +
>  va_start(args, msg);
>  len = vsnprintf(buf, sizeof(buf), msg, args);
>  va_end(args);
> @@ -137,6 +187,9 @@ void va_infoMessage(const char *msg, ...)
>  va_list args;
>  int n, len;
>  
> +if (va_log_info == NULL)
> +return;
> +
>  va_start(args, msg);
>  len = vsnprintf(buf, sizeof(buf), msg, args);
>  va_end(args);
> diff --git a/va/va.h b/va/va.h
> index 665aafb..88628a8 100644
> --- a/va/va.h
> +++ b/va/va.h
> @@ -230,6 +230,21 @@ typedef struct _VARectangle
>  unsigned short height;
>  } VARectangle;
>  
> +/** Type of a message callback, used for both error and info log. */
> +typedef void (*vaMessageCallback)(const char *message);
> +
> +/**
> + * Set the callback for error messages, or NULL for no logging.
> + * Returns the previous one, or NULL if it was disabled.
> + */
> +vaMessageCallback vaSetErrorCallback(vaMessageCallback);
> +
> +/**
> + * Set the callback for info messages, or NULL for no logging.
> + * Returns the previous one, or NULL if it was disabled.
> + */
> +vaMessageCallback vaSetInfoCallback(vaMessageCallback);
> +
>  /**
>   * Initialization:
>   * A display must be obtained by calling vaGetDisplay() before
> calling


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Re: [Libva] [Libva-intel-driver][PATCH 0/5] Update bitrate control per layer

[Sean V Kelley]

On Mon, 2016-10-24 at 12:49 +0800, Xiang, Haihao wrote:
> This patch series updates the bitrate control per layer and makes the
> bitrate per
> layer is close to the setting.
> 
> Xiang, Haihao (5):
>   svct: Usa an array to store QP rounding accumulator
>   svct: Save the current frame size per layer
>   svct: Save the current slice type per layer
>   svct: Save the frame numbers for each frame type in a GOP per layer
>   svct: Adjust the estimated frame size for QP=1

Better tracking.  Reviewed. lgtm.

Applied, thanks.

Sean

> 
>  src/gen6_mfc.h|  6 +++--
>  src/gen6_mfc_common.c | 63 +++
> 
>  src/gen8_mfc.c| 16 ++---
>  3 files changed, 55 insertions(+), 30 deletions(-)
> 


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Re: [Libva] [Libva-intel-driver][PATCH] Use Media Read message if possible on Gen8+

[Sean V Kelley]

Yes, I want to throttle the pace of the changes until we qualify and
understand the performance and test failure issues. Then we can resume
normal flow.

For these tests to be meaningful they have to be consistent across
distributions and platforms.

Thanks,

Sean


On Sun, Oct 16, 2016 at 8:11 PM, Xiang, Haihao <haihao.xi...@intel.com> wrote:
>
> Hi Sean,
>
> I can't reproduce the issue mentioned by you and Artie on my SKL. I am
> using Ubuntu 14.04 but built kernel and libdrm from source code:
>
> Linux kernel:
> aab15c274da587bcab19376d2caa9d6626440335 (drm-intel-nightly: 2016y-09m-
> 26d-12h-11m-33s)
>
> libdrm: 2.4.70
>
> I don't think the bus error is related to this patch, but I would hold
> off on merging this patch if you reproduced the error with
> Common/JPEGEncodeInputTest.Full/95 only.
>
> Thanks
> Haihao
>
>
>
>> On 10/15/2016 03:58 AM, Eoff, Ullysses A wrote:
>> >
>> > > -Original Message-
>> > > From: Libva [mailto:libva-boun...@lists.freedesktop.org] On
>> > > Behalf Of Sean V Kelley
>> > > Sent: Friday, October 14, 2016 11:44 AM
>> > > To: Zhao, Yakui<yakui.z...@intel.com>; Xiang, Haihao> > > @intel.com>
>> > > Cc: libva@lists.freedesktop.org
>> > > Subject: Re: [Libva] [Libva-intel-driver][PATCH] Use Media Read
>> > > message if possible on Gen8+
>> > >
>> > > On Fri, 2016-10-14 at 08:37 +0800, Zhao Yakui wrote:
>> > > > On 10/13/2016 03:07 AM, Xiang, Haihao wrote:
>> > > > > AVS can't gurantee bit-match for a large surface. This fixes
>> > > > > the
>> > > > > failure reported by gtest case
>> > > > > Common/JPEGEncodeInputTest.Full/95.
>> > > > >
>> > > > > before:
>> > > > > [  FAILED  ] Common/JPEGEncodeInputTest.Full/95, where
>> > > > > GetParam() =
>> > > > > (Fixed Size 7680x4320, 0x501176 pointing to "I420") (9239 ms)
>> > > > > [--] 1 test from Common/JPEGEncodeInputTest (9239 ms
>> > > > > total)
>> > > > >
>> > > > > [--] Global test environment tear-down
>> > > > > [==] 1 test from 1 test case ran. (9361 ms total)
>> > > > > [  PASSED  ] 0 tests.
>> > > > > [  FAILED  ] 1 test, listed below:
>> > > > > [  FAILED  ] Common/JPEGEncodeInputTest.Full/95, where
>> > > > > GetParam() =
>> > > > > (Fixed Size 7680x4320, 0x501176 pointing to "I420")
>> > > > >
>> > > > > after:
>> > > > > [   OK ] Common/JPEGEncodeInputTest.Full/95 (15250 ms)
>> > > > > [--] 1 test from Common/JPEGEncodeInputTest (15250 ms
>> > > > > total)
>> > > > >
>> > > > > [--] Global test environment tear-down
>> > > > > [==] 1 test from 1 test case ran. (15365 ms total)
>> > > > > [  PASSED  ] 1 test.
>> > > > >
>> > > > > Signed-off-by: Xiang, Haihao<haihao.xi...@intel.com>
>> > > >
>> > > > This looks good to me.
>> > > >
>> > > > Add: Reviewed-by: Zhao Yakui<yakui.z...@intel.com>
>> > >
>> > >
>> > > Getting a core dump although the test is now passing.  We'll need
>> > > to
>> > > debug further.
>> > >
>> >
>> > I don't get any core dump on my SKL...  And the test passes for me
>> > with
>> > this patch.  Are you running the test in isolation or with the
>> > entire suite?
>> > If with the entire suite, does the core dump occur during this test
>> > case or
>> > another?
>> >
>> > I've noticed that I occasionally get a "bus error" with the
>> > Big/JPEGEncodeInputTest.* test cases (i.e. 8192x8192) even without
>> > this patch.  Perhaps this is what you're encountering?
>>
>> Hi, Sean/Artie
>>
>>  Is it possible that you can send out the dmesg log when the
>> bus_error is triggered?
>>  I try the test several times on one KBL machine(similar to SKL)
>> and
>> unfortunately there is no "sig_bus error".
>>
>> Thanks
>> Yakui
>>
>> >
>> > U. Artie
>> >
>> > > Sean
>> > >
>> > > >
>> > > > Thanks
>> > > > Yakui
>&g

Re: [Libva] [PATCH intel-driver 0/2] Speed up jpeg encode tests

[Sean V Kelley]

On Mon, Oct 17, 2016 at 7:04 AM, Scott D Phillips
<scott.d.phill...@intel.com> wrote:
> On Sun, Oct 16, 2016 at 09:20:49PM -0700, Xiang, Haihao wrote:
>>
>> Hi Scott,
>>
>> Does your patches change the pass criteria? I don't see any failure
>> after applying your patches, but Common/JPEGEncodeInputTest.Full/95
>> should be failed if no change to pass criteria.
>
> It should not alter the pass-criteria for any test. Looking closer at the
> change, because the comparison is done with int8_t, it is possible that a
> surface of all 0 will compare as 'close enough' to a surface of all 255. Let 
> me see if I
> can fix that.

Yes, I was seeing the same thing as Haihao, and was expecting the failure.

Sean

>
>>
>> Thanks
>> Haihao
>>
>>
>> > For me these two patches take the Big encode test from 44sec to
>> > ~7sec.
>> >
>> > Scott D Phillips (2):
>> >   test: use valarray for raw image comparison
>> >   test: read jpeg test data from /dev/urandom
>> >
>> >  test/i965_jpeg_encode_test.cpp | 29 +
>> >  test/i965_jpeg_test_data.cpp   |  6 +++---
>> >  2 files changed, 16 insertions(+), 19 deletions(-)
>> >
> ___
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> Libva@lists.freedesktop.org
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-- 
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Open Source Technology Center / SSG
Intel Corp.
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Re: [Libva] Patchwork

[Sean V Kelley]

On Fri, 2016-10-14 at 20:09 +, Eoff, Ullysses A wrote:
> The VAAPI project on  does not
> show any patches.
> 
> Who can help to get patchwork working for the VAAPI project at  ://patchwork.freedesktop.org>?
> 
> My email client tends to mangle the patches, making it hard to apply
> them locally.  Getting patchwork configured for the VAAPI projects
> would make it much easier to retrieve and test patches from the ML
> via command-line (i.e. pwclient).



Artie,

I'm the one who put it in place there.  I'm working on it.

Thanks,

Sean

> 
> 
> U. Artie
> 
> 
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Re: [Libva] [Libva-intel-driver][PATCH] Use Media Read message if possible on Gen8+

[Sean V Kelley]

On Fri, 2016-10-14 at 19:58 +, Eoff, Ullysses A wrote:
> > -Original Message-
> > From: Libva [mailto:libva-boun...@lists.freedesktop.org] On Behalf
> > Of Sean V Kelley
> > Sent: Friday, October 14, 2016 11:44 AM
> > To: Zhao, Yakui <yakui.z...@intel.com>; Xiang, Haihao  > @intel.com>
> > Cc: libva@lists.freedesktop.org
> > Subject: Re: [Libva] [Libva-intel-driver][PATCH] Use Media Read
> > message if possible on Gen8+
> > 
> > On Fri, 2016-10-14 at 08:37 +0800, Zhao Yakui wrote:
> > > On 10/13/2016 03:07 AM, Xiang, Haihao wrote:
> > > > AVS can't gurantee bit-match for a large surface. This fixes
> > > > the
> > > > failure reported by gtest case
> > > > Common/JPEGEncodeInputTest.Full/95.
> > > > 
> > > > before:
> > > > [  FAILED  ] Common/JPEGEncodeInputTest.Full/95, where
> > > > GetParam() =
> > > > (Fixed Size 7680x4320, 0x501176 pointing to "I420") (9239 ms)
> > > > [--] 1 test from Common/JPEGEncodeInputTest (9239 ms
> > > > total)
> > > > 
> > > > [--] Global test environment tear-down
> > > > [==] 1 test from 1 test case ran. (9361 ms total)
> > > > [  PASSED  ] 0 tests.
> > > > [  FAILED  ] 1 test, listed below:
> > > > [  FAILED  ] Common/JPEGEncodeInputTest.Full/95, where
> > > > GetParam() =
> > > > (Fixed Size 7680x4320, 0x501176 pointing to "I420")
> > > > 
> > > > after:
> > > > [   OK ] Common/JPEGEncodeInputTest.Full/95 (15250 ms)
> > > > [--] 1 test from Common/JPEGEncodeInputTest (15250 ms
> > > > total)
> > > > 
> > > > [--] Global test environment tear-down
> > > > [==] 1 test from 1 test case ran. (15365 ms total)
> > > > [  PASSED  ] 1 test.
> > > > 
> > > > Signed-off-by: Xiang, Haihao<haihao.xi...@intel.com>
> > > 
> > > This looks good to me.
> > > 
> > > Add: Reviewed-by: Zhao Yakui <yakui.z...@intel.com>
> > 
> > 
> > Getting a core dump although the test is now passing.  We'll need
> > to
> > debug further.
> > 
> 
> I don't get any core dump on my SKL...  And the test passes for me
> with
> this patch.  Are you running the test in isolation or with the entire
> suite?
> If with the entire suite, does the core dump occur during this test
> case or
> another?
> 
> I've noticed that I occasionally get a "bus error" with the
> Big/JPEGEncodeInputTest.* test cases (i.e. 8192x8192) even without
> this patch.  Perhaps this is what you're encountering?

I'm consistently seeing this on a SKL system.  It is also quite slow
for execution.  Actually tested this on my Arch sytem with Kernel 4.7
and the older LTS 4.4.  Same bus error and slow execution performance.

We need to isolate the root cause here because I suspect this is what
Haihao has also been seeing.

Takes nearly a minute on one system and far less time on an Ubuntu
system with the same kernel and essentially the same SKL SKU.

Sean



> 
> U. Artie
> 
> > Sean
> > 
> > > 
> > > Thanks
> > >    Yakui
> > > 
> > > > ---
> > > >   src/gen8_post_processing.c | 56
> > > > +-
> > > >   src/shaders/post_processing/gen8/Makefile.am   |  2 +
> > > >   .../gen8/PL2_media_read_buf0123.g8a| 65
> > > > +
> > > >   .../gen8/PL3_media_read_buf0123.g8a| 68
> > > > ++
> > > >   src/shaders/post_processing/gen8/pl2_to_pl2.asm|  2 +
> > > >   src/shaders/post_processing/gen8/pl2_to_pl2.g8b| 44
> > > > ++
> > > >   src/shaders/post_processing/gen8/pl2_to_pl3.asm|  2 +
> > > >   src/shaders/post_processing/gen8/pl2_to_pl3.g8b| 44
> > > > ++
> > > >   src/shaders/post_processing/gen8/pl3_to_pl2.asm|  2 +
> > > >   src/shaders/post_processing/gen8/pl3_to_pl2.g8b| 47
> > > > +++
> > > >   src/shaders/post_processing/gen8/pl3_to_pl3.asm|  4 +-
> > > >   src/shaders/post_processing/gen8/pl3_to_pl3.g8b| 47
> > > > +++
> > > >   src/shaders/post_processing/gen9/pl2_to_pl2.g9b| 44
> > > > ++
> > > >   src/shaders/post_processing/gen

Re: [Libva] [Libva-intel-driver][PATCH] Use Media Read message if possible on Gen8+

[Sean V Kelley]

On Fri, 2016-10-14 at 08:37 +0800, Zhao Yakui wrote:
> On 10/13/2016 03:07 AM, Xiang, Haihao wrote:
> > AVS can't gurantee bit-match for a large surface. This fixes the
> > failure reported by gtest case Common/JPEGEncodeInputTest.Full/95.
> > 
> > before:
> > [  FAILED  ] Common/JPEGEncodeInputTest.Full/95, where GetParam() =
> > (Fixed Size 7680x4320, 0x501176 pointing to "I420") (9239 ms)
> > [--] 1 test from Common/JPEGEncodeInputTest (9239 ms total)
> > 
> > [--] Global test environment tear-down
> > [==] 1 test from 1 test case ran. (9361 ms total)
> > [  PASSED  ] 0 tests.
> > [  FAILED  ] 1 test, listed below:
> > [  FAILED  ] Common/JPEGEncodeInputTest.Full/95, where GetParam() =
> > (Fixed Size 7680x4320, 0x501176 pointing to "I420")
> > 
> > after:
> > [   OK ] Common/JPEGEncodeInputTest.Full/95 (15250 ms)
> > [--] 1 test from Common/JPEGEncodeInputTest (15250 ms
> > total)
> > 
> > [--] Global test environment tear-down
> > [==] 1 test from 1 test case ran. (15365 ms total)
> > [  PASSED  ] 1 test.
> > 
> > Signed-off-by: Xiang, Haihao
> 
> This looks good to me.
> 
> Add: Reviewed-by: Zhao Yakui 


Getting a core dump although the test is now passing.  We'll need to
debug further.

Sean

> 
> Thanks
>    Yakui
> 
> > ---
> >   src/gen8_post_processing.c | 56
> > +-
> >   src/shaders/post_processing/gen8/Makefile.am   |  2 +
> >   .../gen8/PL2_media_read_buf0123.g8a| 65
> > +
> >   .../gen8/PL3_media_read_buf0123.g8a| 68
> > ++
> >   src/shaders/post_processing/gen8/pl2_to_pl2.asm|  2 +
> >   src/shaders/post_processing/gen8/pl2_to_pl2.g8b| 44
> > ++
> >   src/shaders/post_processing/gen8/pl2_to_pl3.asm|  2 +
> >   src/shaders/post_processing/gen8/pl2_to_pl3.g8b| 44
> > ++
> >   src/shaders/post_processing/gen8/pl3_to_pl2.asm|  2 +
> >   src/shaders/post_processing/gen8/pl3_to_pl2.g8b| 47
> > +++
> >   src/shaders/post_processing/gen8/pl3_to_pl3.asm|  4 +-
> >   src/shaders/post_processing/gen8/pl3_to_pl3.g8b| 47
> > +++
> >   src/shaders/post_processing/gen9/pl2_to_pl2.g9b| 44
> > ++
> >   src/shaders/post_processing/gen9/pl2_to_pl3.g9b| 44
> > ++
> >   src/shaders/post_processing/gen9/pl3_to_pl2.g9b| 47
> > +++
> >   src/shaders/post_processing/gen9/pl3_to_pl3.g9b| 47
> > +++
> >   16 files changed, 563 insertions(+), 2 deletions(-)
> >   create mode 100644
> > src/shaders/post_processing/gen8/PL2_media_read_buf0123.g8a
> >   create mode 100644
> > src/shaders/post_processing/gen8/PL3_media_read_buf0123.g8a
> > 
> > diff --git a/src/gen8_post_processing.c
> > b/src/gen8_post_processing.c
> > index 375bbe0..687cedc 100644
> > --- a/src/gen8_post_processing.c
> > +++ b/src/gen8_post_processing.c
> > @@ -630,6 +630,31 @@
> > gen8_pp_set_media_rw_message_surface(VADriverContextP ctx, struct
> > i965_post_proc
> >  SURFACE_FORMAT_R8_UNORM,
> > 0,
> >  base_index + 2);
> >   }
> > +
> > +gen8_pp_set_surface_state(ctx, pp_context,
> > +  bo, 0,
> > +  ALIGN(width[0], 4) / 4,
> > height[0], pitch[0],
> > +  I965_SURFACEFORMAT_R8_UINT,
> > +  base_index + 3, 1);
> > +
> > +if (fourcc_info->num_planes == 2) {
> > +gen8_pp_set_surface_state(ctx, pp_context,
> > +  bo, offset[1],
> > +  ALIGN(width[1], 2) / 2,
> > height[1], pitch[1],
> > +  I965_SURFACEFORMAT_R8G8_SINT
> > ,
> > +  base_index + 4, 1);
> > +} else if (fourcc_info->num_planes == 3) {
> > +gen8_pp_set_surface_state(ctx, pp_context,
> > +  bo, offset[1],
> > +  ALIGN(width[1], 4) / 4,
> > height[1], pitch[1],
> > +  I965_SURFACEFORMAT_R8_SINT,
> > +  base_index + 4, 1);
> > +gen8_pp_set_surface_state(ctx, pp_context,
> > +  bo, offset[2],
> > +  ALIGN(width[2], 4) / 4,
> > height[2], pitch[2],
> > +  I965_SURFACEFORMAT_R8_SINT,
> > +  base_index + 5, 1);
> > +}
> >   }
> >   }
> > 
> > @@ -788,6 +813,33 @@ gen8_pp_get_8tap_filter_mode(VADriverContextP
> > ctx,
> >   return 3;
> >   }
> > 
> > +static int
> > +gen8_pp_kernel_use_media_read_msg(VADriverContextP ctx,
> > +  

Re: [Libva] [PATCH intel-driver 3/3] test: add some avce context tests

[Sean V Kelley]

On Tue, 2016-10-11 at 12:21 -0700, U. Artie Eoff wrote:
> Add some simple avce context tests to verify various
> encode context fields are appropriately configured.
> 
> Signed-off-by: U. Artie Eoff 
> ---
>  test/Makefile.am|   3 +
>  test/i965_avce_context_test.cpp | 258
> 
>  test/i965_avce_test_common.cpp  |  85 +
>  test/i965_avce_test_common.h|  39 ++
>  test/i965_internal_decl.h   |   1 +
>  5 files changed, 386 insertions(+)
>  create mode 100644 test/i965_avce_context_test.cpp
>  create mode 100644 test/i965_avce_test_common.cpp
>  create mode 100644 test/i965_avce_test_common.h
> 
> diff --git a/test/Makefile.am b/test/Makefile.am
> index 08df3395a383..7a5437e71450 100644
> --- a/test/Makefile.am
> +++ b/test/Makefile.am
> @@ -44,6 +44,7 @@ EXTRA_DIST =
>   \
>  # test_i965_drv_video
>  noinst_PROGRAMS = test_i965_drv_video
>  noinst_HEADERS = 
> \
> + i965_avce_test_common.h 
>   \
>   i965_config_test.h  
> \
>   i965_internal_decl.h
> \
>   i965_jpeg_test_data.h   
>   \
> @@ -56,6 +57,8 @@ noinst_HEADERS =
>   \
>  test_i965_drv_video_SOURCES =
>   \
>   i965_avcd_config_test.cpp   
> \
>   i965_avce_config_test.cpp   
> \
> + i965_avce_context_test.cpp  
> \
> + i965_avce_test_common.cpp   
> \
>   i965_chipset_test.cpp   
>   \
>   i965_config_test.cpp
> \
>   i965_initialize_test.cpp
> \
> diff --git a/test/i965_avce_context_test.cpp
> b/test/i965_avce_context_test.cpp
> new file mode 100644
> index ..4777c9e6a13f
> --- /dev/null
> +++ b/test/i965_avce_context_test.cpp
> @@ -0,0 +1,258 @@
> +/*
> + * Copyright (C) 2016 Intel Corporation. All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person
> obtaining a
> + * copy of this software and associated documentation files (the
> + * "Software"), to deal in the Software without restriction,
> including
> + * without limitation the rights to use, copy, modify, merge,
> publish,
> + * distribute, sub license, and/or sell copies of the Software, and
> to
> + * permit persons to whom the Software is furnished to do so,
> subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including
> the
> + * next paragraph) shall be included in all copies or substantial
> portions
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-
> INFRINGEMENT.
> + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE
> LIABLE FOR
> + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
> CONTRACT,
> + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "i965_avce_test_common.h"
> +#include "i965_streamable.h"
> +#include "i965_test_fixture.h"
> +
> +#include 
> +#include 
> +#include 
> +
> +namespace AVC {
> +namespace Encode {
> +
> +class AVCEContextTest
> +: public I965TestFixture
> +, public ::testing::WithParamInterface<
> +std::tuple >
> +{
> +protected:
> +void SetUp()
> +{
> +I965TestFixture::SetUp();
> +std::tie(profile, entrypoint) = GetParam();
> +}
> +
> +void TearDown()
> +{
> +if (context != VA_INVALID_ID)
> +destroyContext(context);
> +if (config != VA_INVALID_ID)
> +destroyConfig(config);
> +I965TestFixture::TearDown();
> +}
> +
> +operator struct intel_encoder_context const *()
> +{
> +if (config == VA_INVALID_ID) return NULL;
> +
> +struct i965_driver_data *i965(*this);
> +if (not i965) return NULL;
> +
> +struct object_context const *obj_context = CONTEXT(context);
> +if (not obj_context) return NULL;
> +
> +return reinterpret_cast *>(
> +obj_context->hw_context);
> +}
> +
> +VAProfile   profile;
> +VAEntrypointentrypoint;
> +VAConfigID  config = VA_INVALID_ID;
> +VAContextID context = VA_INVALID_ID;
> +};
> +
> +TEST_P(AVCEContextTest, RateControl)
> +{
> 

Re: [Libva] [PATCH intel-driver 1/3] test: allow default surface param for create context

[Sean V Kelley]

On Tue, 2016-10-11 at 12:21 -0700, U. Artie Eoff wrote:
> The driver does not require surfaces to create a context.
> That is, i965_CreateContext can accept an empty render_targets
> list.  Thus, make Surfaces an optional parameter to
> I965TestFixture::createContext so that simple tests don't
> have to bother with Surfaces if they are irrelevant to
> the test case.


lgtm, applied.

Thanks,

Sean

> 
> Signed-off-by: U. Artie Eoff 
> ---
>  test/i965_test_fixture.cpp | 5 +++--
>  test/i965_test_fixture.h   | 3 ++-
>  2 files changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/test/i965_test_fixture.cpp b/test/i965_test_fixture.cpp
> index 8fd914209467..74403f875a56 100644
> --- a/test/i965_test_fixture.cpp
> +++ b/test/i965_test_fixture.cpp
> @@ -83,12 +83,13 @@ void I965TestFixture::destroyConfig(VAConfigID
> id)
>  }
>  
>  VAContextID I965TestFixture::createContext(
> -VAConfigID config, int w, int h, int flags, Surfaces& targets)
> +VAConfigID config, int w, int h, int flags, const Surfaces&
> targets)
>  {
>  VAContextID id = VA_INVALID_ID;
>  EXPECT_STATUS(
>  i965_CreateContext(
> -*this, config, w, h, flags, targets.data(),
> targets.size(), ));
> +*this, config, w, h, flags,
> +const_cast(targets.data()),
> targets.size(), ));
>  EXPECT_ID(id);
>  
>  return id;
> diff --git a/test/i965_test_fixture.h b/test/i965_test_fixture.h
> index 9122d848e129..3fc11c34fa75 100644
> --- a/test/i965_test_fixture.h
> +++ b/test/i965_test_fixture.h
> @@ -88,7 +88,8 @@ public:
>   * Convenience wrapper for i965_CreateContext.  May generate a
> non-fatal
>   * test assertion failure.
>   */
> -VAContextID createContext(VAConfigID, int, int, int, Surfaces&);
> +VAContextID createContext(VAConfigID, int, int, int = 0,
> +const Surfaces& = Surfaces());
>  
>  /**
>   * Convenience wrapper for i965_DestroyContext.  May generate a
> non-fatal


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Re: [Libva] problem when tiling is disabled on decoded surfaces

[Sean V Kelley]

On Fri, Oct 7, 2016 at 11:00 AM, Sean V Kelley <sean.v.kel...@intel.com> wrote:
> On Thu, Oct 6, 2016 at 1:20 AM, Julien Isorce <julien.iso...@gmail.com> wrote:
>> Hi,
>>
>> In intel vaapi driver I tried disabling tiling with:
>>
>> ---   a/src/i965_drv_video.c
>> +++ b/src/i965_drv_video.c
>> @@ -1534,7 +1534,7 @@ i965_CreateSurfaces2(
>>  obj_surface->orig_height = height;
>> -obj_surface->user_disable_tiling = false;
>> +   obj_surface->user_disable_tiling = true;
>>  obj_surface->user_h_stride_set = false;
>>
>> But then gst-launch-1.0 filesrc location=~/Downloads/simpson.mp4 ! qtdemux !
>> vaapih264dec ! xvimagesink shows garbage, like if the memory was still
>> tiled.
>>
>
> We implemented disable tiling for a very specific purpose.  We were
> sharing surfaces decoded via Imagination Tech driver on a Baytrail,
> and wrapped that for the X11 backend rendering.  I was using two
> drivers (IMG and GEN).
> At the time, the driver assumed that all surfaces were tiled.  Since
> IMG was not tiled, we needed a way to pass through.  I'll look at this
> more closely.
>
> But for hardware GEN decoding we assume the surface to be tiled.  The
> intent was never to allow disabling tilint for purposes of actual h264
> decode.

The GEN hardware really only uses the tiling format for
decoding/encoding.  The flag
is historical and used with other drivers (remember VA-API can be used
with IMG).  In my
case I triggered it by our having added a new VA memory type for when
I needed to share surfaces.

But again, we don't decode non-tiled.  We simply give you the
flexibility to create those surfaces non-tiled
for historical and conversion reasons as the one above I gave you.

Sean


>
> I'll have to refresh my memory a bit.  I'll let Haihao chime in.
>
> Sean
>
>
>> I tried to debug it and but all calls to dri_bo_get_tiling returns
>> I915_TILING_NONE as expected.
>>
>> Also see vainfo output below.
>>
>> Thx
>> Julien
>>
>> libva info: VA-API version 0.39.4
>> libva info: va_getDriverName() returns 0
>> libva info: Trying to open
>> /home/julien/gst/master/prefix/lib/dri/i965_drv_video.so
>> libva info: Found init function __vaDriverInit_0_39
>> libva info: va_openDriver() returns 0
>> vainfo: VA-API version: 0.39 (libva 1.7.3.pre1)
>> vainfo: Driver version: Intel i965 driver for Intel(R) Haswell Mobile -
>> 1.7.3.pre1 (1.7.2-115-gfa3d1c3)
>> vainfo: Supported profile and entrypoints
>>   VAProfileMPEG2Simple:VAEntrypointVLD
>>   VAProfileMPEG2Simple:VAEntrypointEncSlice
>>   VAProfileMPEG2Main  :VAEntrypointVLD
>>   VAProfileMPEG2Main  :VAEntrypointEncSlice
>>   VAProfileH264ConstrainedBaseline:VAEntrypointVLD
>>   VAProfileH264ConstrainedBaseline:VAEntrypointEncSlice
>>   VAProfileH264Main   :VAEntrypointVLD
>>   VAProfileH264Main   :VAEntrypointEncSlice
>>   VAProfileH264High   :VAEntrypointVLD
>>   VAProfileH264High   :VAEntrypointEncSlice
>>   VAProfileH264MultiviewHigh  :VAEntrypointVLD
>>   VAProfileH264MultiviewHigh  :VAEntrypointEncSlice
>>   VAProfileH264StereoHigh :VAEntrypointVLD
>>   VAProfileH264StereoHigh :VAEntrypointEncSlice
>>   VAProfileVC1Simple  :VAEntrypointVLD
>>   VAProfileVC1Main:VAEntrypointVLD
>>   VAProfileVC1Advanced:VAEntrypointVLD
>>   VAProfileNone   :VAEntrypointVideoProc
>>   VAProfileJPEGBaseline   :VAEntrypointVLD
>>   VAProfileVP9Profile0:VAEntrypointVLD
>>
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>> Libva@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/libva
>>
>
>
>
> --
> Sean V. Kelley <sean.v.kel...@intel.com>
> Open Source Technology Center / SSG
> Intel Corp.



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Re: [Libva] problem when tiling is disabled on decoded surfaces

[Sean V Kelley]

On Thu, Oct 6, 2016 at 1:20 AM, Julien Isorce <julien.iso...@gmail.com> wrote:
> Hi,
>
> In intel vaapi driver I tried disabling tiling with:
>
> ---   a/src/i965_drv_video.c
> +++ b/src/i965_drv_video.c
> @@ -1534,7 +1534,7 @@ i965_CreateSurfaces2(
>  obj_surface->orig_height = height;
> -obj_surface->user_disable_tiling = false;
> +   obj_surface->user_disable_tiling = true;
>  obj_surface->user_h_stride_set = false;
>
> But then gst-launch-1.0 filesrc location=~/Downloads/simpson.mp4 ! qtdemux !
> vaapih264dec ! xvimagesink shows garbage, like if the memory was still
> tiled.
>

We implemented disable tiling for a very specific purpose.  We were
sharing surfaces decoded via Imagination Tech driver on a Baytrail,
and wrapped that for the X11 backend rendering.  I was using two
drivers (IMG and GEN).
At the time, the driver assumed that all surfaces were tiled.  Since
IMG was not tiled, we needed a way to pass through.  I'll look at this
more closely.

But for hardware GEN decoding we assume the surface to be tiled.  The
intent was never to allow disabling tilint for purposes of actual h264
decode.

I'll have to refresh my memory a bit.  I'll let Haihao chime in.

Sean


> I tried to debug it and but all calls to dri_bo_get_tiling returns
> I915_TILING_NONE as expected.
>
> Also see vainfo output below.
>
> Thx
> Julien
>
> libva info: VA-API version 0.39.4
> libva info: va_getDriverName() returns 0
> libva info: Trying to open
> /home/julien/gst/master/prefix/lib/dri/i965_drv_video.so
> libva info: Found init function __vaDriverInit_0_39
> libva info: va_openDriver() returns 0
> vainfo: VA-API version: 0.39 (libva 1.7.3.pre1)
> vainfo: Driver version: Intel i965 driver for Intel(R) Haswell Mobile -
> 1.7.3.pre1 (1.7.2-115-gfa3d1c3)
> vainfo: Supported profile and entrypoints
>   VAProfileMPEG2Simple:VAEntrypointVLD
>   VAProfileMPEG2Simple:VAEntrypointEncSlice
>   VAProfileMPEG2Main  :VAEntrypointVLD
>   VAProfileMPEG2Main  :VAEntrypointEncSlice
>   VAProfileH264ConstrainedBaseline:VAEntrypointVLD
>   VAProfileH264ConstrainedBaseline:VAEntrypointEncSlice
>   VAProfileH264Main   :VAEntrypointVLD
>   VAProfileH264Main   :VAEntrypointEncSlice
>   VAProfileH264High   :VAEntrypointVLD
>   VAProfileH264High   :VAEntrypointEncSlice
>   VAProfileH264MultiviewHigh  :VAEntrypointVLD
>   VAProfileH264MultiviewHigh  :VAEntrypointEncSlice
>   VAProfileH264StereoHigh :VAEntrypointVLD
>   VAProfileH264StereoHigh :VAEntrypointEncSlice
>   VAProfileVC1Simple  :VAEntrypointVLD
>   VAProfileVC1Main:VAEntrypointVLD
>   VAProfileVC1Advanced:VAEntrypointVLD
>   VAProfileNone   :VAEntrypointVideoProc
>   VAProfileJPEGBaseline   :VAEntrypointVLD
>   VAProfileVP9Profile0:VAEntrypointVLD
>
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Re: [Libva] [PATCH intel-driver 0/4] Test Environment and some AVC Enc/Dec Tests

[Sean V Kelley]

On Wed, 2016-10-05 at 10:54 -0700, U. Artie Eoff wrote:
> This patch series moves the responsibility of the VADisplay creation
> and vaInitialize/vaTerminate sequence to a I965TestEnvironment
> singleton class.  This environment is added to the GTest global test
> environment so that those aforementioned responsibilities are
> handled during the environment SetUp and TearDown (which are executed
> by GTest before and after executing the *test suite*).  In essence,
> only one VADisplay is created and shared amongst all the test cases
> for each run of the test suite.  This also allows tests to obtain
> the VADisplay instance outside of the I965TestFixture.  As of which
> allows for a simpler, common I965ConfigTest fixture to be defined
> (part of this series).
> 
> Finally, included in this series are AVC enc/dec CreateConfig test
> cases that use the common I965ConfigTest fixture.  Additionally,
> the appropriate JPEG enc/dec cases (Entrypoint) now use the common
> test fixture.


I'm glad you are doing this now rather than later - after adding more
codecs.

lgtm, applied.

Thanks,

Sean

> 
> U. Artie Eoff (4):
>   test: move vaInitialize/vaTerminate to a global test environment
>   test: add ostream operators for VAProfile and VAEntrypoint
>   test: add avce/avcd create config tests
>   test: use common I965ConfigTest fixture for jpeg enc/dec
> 
>  test/Makefile.am|  10 +++-
>  test/i965_avcd_config_test.cpp  |  72 ++
>  test/i965_avce_config_test.cpp  | 109
> 
>  test/i965_config_test.cpp   |  63 +++
>  test/i965_config_test.h |  56 +
>  test/i965_jpeg_decode_test.cpp  |  22 
>  test/i965_jpeg_encode_test.cpp  |  18 ---
>  test/i965_jpegd_config_test.cpp |  50 ++
>  test/i965_jpege_config_test.cpp |  57 +
>  test/i965_streamable.h  |  84
> +++
>  test/i965_test_environment.cpp  |  86
> +++
>  test/i965_test_environment.h| 100
> 
>  test/i965_test_fixture.cpp  |  94 --
> 
>  test/i965_test_fixture.h|  72 --
>  test/test_main.cpp  |   4 ++
>  15 files changed, 699 insertions(+), 198 deletions(-)
>  create mode 100644 test/i965_avcd_config_test.cpp
>  create mode 100644 test/i965_avce_config_test.cpp
>  create mode 100644 test/i965_config_test.cpp
>  create mode 100644 test/i965_config_test.h
>  create mode 100644 test/i965_jpegd_config_test.cpp
>  create mode 100644 test/i965_jpege_config_test.cpp
>  create mode 100644 test/i965_test_environment.cpp
>  create mode 100644 test/i965_test_environment.h
> 


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Re: [Libva] [Libva-intel-driver][PATCH] Set default framerate to 30fps if user doesn't set the corresponding sequence parameter

[Sean V Kelley]

On Wed, 2016-09-28 at 09:04 +0800, Zhao Yakui wrote:
> On 09/27/2016 10:49 PM, Xiang, Haihao wrote:
> > 
> > User can update framerate using VAEncMiscParameterTypeFrameRate
> > buffer later
> 
> It looks good to me.
> 
> Add: Reviewed-by: Zhao Yakui 

Sorry Yakui, didn't see your reply until after I reviewed and pushed.

Thanks,

Sean

> 
> Thanks
> Yakui
> 
> > 
> > 
> > Signed-off-by: Xiang, Haihao
> > ---
> >   src/i965_encoder.c | 7 ++-
> >   1 file changed, 6 insertions(+), 1 deletion(-)
> > 
> > diff --git a/src/i965_encoder.c b/src/i965_encoder.c
> > index 7e44a5a..8587fd5 100644
> > --- a/src/i965_encoder.c
> > +++ b/src/i965_encoder.c
> > @@ -312,7 +312,12 @@
> > intel_encoder_check_brc_h264_sequence_parameter(VADriverContextP
> > ctx,
> > 
> >   assert(seq_param);
> >   bits_per_second = seq_param->bits_per_second; // for the
> > highest layer
> > -framerate_per_100s = seq_param->time_scale * 100 / (2 *
> > seq_param->num_units_in_tick); // for the highest layer
> > +
> > +if (!seq_param->num_units_in_tick || !seq_param->time_scale)
> > +framerate_per_100s = 3000;
> > +else
> > +framerate_per_100s = seq_param->time_scale * 100 / (2 *
> > seq_param->num_units_in_tick); // for the highest layer
> > +
> >   encoder_context->brc.num_iframes_in_gop = 1; // Always 1
> > 
> >   if (seq_param->intra_period == 0) { // E.g. IDRPP... /
> > IDR(PBB)... (no IDR/I any more)
> 
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Re: [Libva] [Libva-intel-driver][PATCH] Set default framerate to 30fps if user doesn't set the corresponding sequence parameter

[Sean V Kelley]

On Tue, 2016-09-27 at 22:49 +0800, Xiang, Haihao wrote:
> User can update framerate using VAEncMiscParameterTypeFrameRate
> buffer later


I am okay with this.  lgtm, applied.

Thanks,

Sean

> 
> Signed-off-by: Xiang, Haihao 
> ---
>  src/i965_encoder.c | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/src/i965_encoder.c b/src/i965_encoder.c
> index 7e44a5a..8587fd5 100644
> --- a/src/i965_encoder.c
> +++ b/src/i965_encoder.c
> @@ -312,7 +312,12 @@
> intel_encoder_check_brc_h264_sequence_parameter(VADriverContextP ctx,
>  
>  assert(seq_param);
>  bits_per_second = seq_param->bits_per_second; // for the highest
> layer
> -framerate_per_100s = seq_param->time_scale * 100 / (2 *
> seq_param->num_units_in_tick); // for the highest layer
> +
> +if (!seq_param->num_units_in_tick || !seq_param->time_scale)
> +framerate_per_100s = 3000;
> +else
> +framerate_per_100s = seq_param->time_scale * 100 / (2 *
> seq_param->num_units_in_tick); // for the highest layer
> +
>  encoder_context->brc.num_iframes_in_gop = 1; // Always 1
>  
>  if (seq_param->intra_period == 0) { // E.g. IDRPP... /
> IDR(PBB)... (no IDR/I any more)


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Re: [Libva] [PATCH intel-driver] test: add create surface test

[Sean V Kelley]

On Mon, 2016-10-03 at 13:21 -0700, U. Artie Eoff wrote:
> Add test to verify correct result for create surfaces with
> supported and unsupported pixel formats.
> 
> Currently the IYUV pixel format case fails... see
> https://bugs.freedesktop.org/show_bug.cgi?id=98033


I've confirmed the failure with IYUV when filtered on these specific
tests.

Otherwise, lgtm, reviewed, applied.

Thanks,

Sean


> 
> Signed-off-by: U. Artie Eoff 
> ---
>  test/Makefile.am   |   1 +
>  test/i965_surface_test.cpp | 120
> +
>  test/test.h|   1 +
>  3 files changed, 122 insertions(+)
>  create mode 100644 test/i965_surface_test.cpp
> 
> diff --git a/test/Makefile.am b/test/Makefile.am
> index 99560f8d8a54..7d1ba43435ec 100644
> --- a/test/Makefile.am
> +++ b/test/Makefile.am
> @@ -58,6 +58,7 @@ test_i965_drv_video_SOURCES =   
>   \
>   i965_test_fixture.cpp   
>   \
>   i965_jpeg_decode_test.cpp   
> \
>   i965_jpeg_encode_test.cpp   
> \
> + i965_surface_test.cpp   
>   \
>   object_heap_test.cpp
> \
>   test_main.cpp   
>   \
>   $(NULL)
> diff --git a/test/i965_surface_test.cpp b/test/i965_surface_test.cpp
> new file mode 100644
> index ..10539ce31e1c
> --- /dev/null
> +++ b/test/i965_surface_test.cpp
> @@ -0,0 +1,120 @@
> +/*
> + * Copyright (C) 2016 Intel Corporation. All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person
> obtaining a
> + * copy of this software and associated documentation files (the
> + * "Software"), to deal in the Software without restriction,
> including
> + * without limitation the rights to use, copy, modify, merge,
> publish,
> + * distribute, sub license, and/or sell copies of the Software, and
> to
> + * permit persons to whom the Software is furnished to do so,
> subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including
> the
> + * next paragraph) shall be included in all copies or substantial
> portions
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-
> INFRINGEMENT.
> + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE
> LIABLE FOR
> + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
> CONTRACT,
> + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "i965_test_fixture.h"
> +
> +#include 
> +#include 
> +
> +static const std::set pixelFormats = {
> +/** Defined in va/va.h **/
> +VA_FOURCC_NV12, VA_FOURCC_AI44, VA_FOURCC_RGBA, VA_FOURCC_RGBX,
> +VA_FOURCC_BGRA, VA_FOURCC_BGRX, VA_FOURCC_ARGB, VA_FOURCC_XRGB,
> +VA_FOURCC_ABGR, VA_FOURCC_XBGR, VA_FOURCC_UYVY, VA_FOURCC_YUY2,
> +VA_FOURCC_AYUV, VA_FOURCC_NV11, VA_FOURCC_YV12, VA_FOURCC_P208,
> +VA_FOURCC_IYUV, VA_FOURCC_YV24, VA_FOURCC_YV32, VA_FOURCC_Y800,
> +VA_FOURCC_IMC3, VA_FOURCC_411P, VA_FOURCC_422H, VA_FOURCC_422V,
> +VA_FOURCC_444P, VA_FOURCC_RGBP, VA_FOURCC_BGRP, VA_FOURCC_411R,
> +VA_FOURCC_YV16, VA_FOURCC_P010, VA_FOURCC_P016,
> +
> +/** Defined in i965_fourcc.h **/
> +VA_FOURCC_I420, VA_FOURCC_IA44, VA_FOURCC_IA88, VA_FOURCC_AI88,
> +VA_FOURCC_IMC1, VA_FOURCC_YVY2,
> +
> +/** Bogus pixel formats **/
> +VA_FOURCC('B','E','E','F'), VA_FOURCC('P','O','R','K'),
> +VA_FOURCC('F','I','S','H'),
> +};
> +
> +class CreateSurfacesTest
> +: public I965TestFixture
> +{
> +protected:
> +const std::set supported = {
> +VA_FOURCC_NV12, VA_FOURCC_I420, VA_FOURCC_IYUV,
> VA_FOURCC_IMC3,
> +VA_FOURCC_YV12, VA_FOURCC_IMC1, VA_FOURCC_P010,
> VA_FOURCC_422H,
> +VA_FOURCC_422V, VA_FOURCC_YV16, VA_FOURCC_YUY2,
> VA_FOURCC_UYVY,
> +VA_FOURCC_444P, VA_FOURCC_411P, VA_FOURCC_Y800,
> VA_FOURCC_RGBA,
> +VA_FOURCC_RGBX, VA_FOURCC_BGRA, VA_FOURCC_BGRX,
> +};
> +};
> +
> +TEST_F(CreateSurfacesTest, SupportedPixelFormats)
> +{
> +SurfaceAttribs attributes(1);
> +attributes.front().flags = VA_SURFACE_ATTRIB_SETTABLE;
> +attributes.front().type = VASurfaceAttribPixelFormat;
> +attributes.front().value.type = VAGenericValueTypeInteger;
> +
> +for (const unsigned fourcc : supported) {
> +SCOPED_TRACE(
> +::testing::Message()
> +<< std::string(reinterpret_cast(),
> 4)
> +<< "(0x" << std::hex << fourcc << std::dec << ")");
> +
> +const i965_fourcc_info *info = 

Re: [Libva] libyami 1.0.0 release

[Sean V Kelley]

gt;
>   legacy usage? it is simple as well.
>
>
>
>   DRI3 protocol support dma_buf, it means a dma_buf handle can be sent to
> server
>
>   for window update. Keith said mesa is using it, and on server side
> glamor handle
>
>   the dma_buf. the remaining gap is that YUV buffer hasn't been supported
> yet, but
>
>   not hard to add it.
>
>
>
>
>
> *From:* Zhao, Halley
> *Sent:* Friday, November 28, 2014 2:26 PM
> *To:* liby...@lists.01.org
> *Cc:* Li, Jocelyn; Kelley, Sean V
> *Subject:* libyami 0.1.4 release
>
>
>
> libyami 0.1.4 release
>
> =
>
>
>
> features update
>
> ---
>
> -   Additional fixes(most are thread race condition) for v4l2 wrapper
> (egl/gles)
>
> -   Add glx support in v4l2 wrapper
>
> -   Basic transcoding support: encoder test accepts input data from
> decoder output
>
> -   Testscript is added, it supports one-run-for-all: with a folder
> including h264/vp8/jpeg/raw-ref,
>
> we can test them in one run. It serves as BAT (basic acceptance
> test) for pull request merge.
>
> -   Report fps in decode test, support decoding only test (skip
> rendering)
>
> -   Vp8/jpeg are supported in v4l2 decoder as well
>
> -   Decode test can be built/run without X11
>
> -   Code refinement for decoder test output and encoder classes
>
> -   dma_buf fixes, when video frame is exported as dma_buf, it renders
> well as texture
>
> -   with additional patch for chrome:
>
> V4L2VDA/V4L2VEA pass chrome video unit test
>
> video playback in browser draft ok
>
> -   for v4l2 wrapper, see: https://github.com/halleyzhao/
> yami-share/blob/master/Yami_V4L2_wrapper_for_Chrome.pdf
>
>
>
> known issues
>
> ---
>
> -   this release has been fully tested by validation team
>
> -   some jpeg file similarity <0.99 (~0.98) after decoding
>
> https://github.com/01org/libyami/issues/108
>
>
>
> future release plan:
>
> 
>
> Dec: v0.2
>
> jpeg encoder
>
> vp9 decoder
>
> vp8 encoder (depends on driver availability)
>
> initial ffmpeg support
>
>
>
> Feb'15: v0.3
>
> unified input/output buffer of yami
>
> transcoding support with unified input/output buffer
>
> camera dma_buf support, camera with jpeg input
>
> use yami in ffmpeg for hw codec
>
>
>
> Future:
>
> h265 decoder
>



-- 
Sean V. Kelley <sean.v.kel...@intel.com>
Open Source Technology Center / SSG
Intel Corp.
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Re: [Libva] [PATCH intel-driver] jpeg/dec: gen8+ set correct fourcc for monochrome decode

[Sean V Kelley]

On Wed, 2016-09-28 at 13:22 -0700, U. Artie Eoff wrote:
> When the jpeg picture params have 1 component the
> fourcc needs to be set to VA_FOURCC_Y800.

lgtm, verified, applied.

Thanks,

Sean

> 
> Signed-off-by: U. Artie Eoff 
> ---
>  src/gen8_mfd.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/src/gen8_mfd.c b/src/gen8_mfd.c
> index 23eaca31a22a..98526644758b 100644
> --- a/src/gen8_mfd.c
> +++ b/src/gen8_mfd.c
> @@ -1880,9 +1880,10 @@ gen8_mfd_jpeg_decode_init(VADriverContextP
> ctx,
>  
>  pic_param = (VAPictureParameterBufferJPEGBaseline
> *)decode_state->pic_param->buffer;
>  
> -if (pic_param->num_components == 1)
> +if (pic_param->num_components == 1) {
>  subsampling = SUBSAMPLE_YUV400;
> -else if (pic_param->num_components == 3) {
> +fourcc = VA_FOURCC_Y800;
> +} else if (pic_param->num_components == 3) {
>  int h1 = pic_param->components[0].h_sampling_factor;
>  int h2 = pic_param->components[1].h_sampling_factor;
>  int h3 = pic_param->components[2].h_sampling_factor;


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Re: [Libva] [PATCH intel-driver 01/11] test: move ASSERT_NO_FAILURE macro to test.h

[Sean V Kelley]

On Thu, 2016-09-29 at 15:19 +, Eoff, Ullysses A wrote:
> Yes, my apologies… I will be sure to add a cover from now on.
>  
> FWIW…
>  
> This patch series moves several of the auxiliary data input
> routines/classes for encode into the jpeg test data files in order to
> clean up the actual test implementation file.  Also move some of the
> common/generic test macros and functions to appropriate files.  The
> JPEG::Encode::TestInput class was refactored to only allow it to be
> created with a shared_ptr.  In addition, there is a typedef fix (not
> critical) and YUV format conversion was moved to the class.  YUV
> input initialization and conversion functions were also optimized a
> bit to avoid excessive intermediate copies.  Finally, added support
> to cover YUY2, UYVY, and Y800 input formats in the JPEG encode tests.
>  
> Note that the Y800 test cases expose a decode bug in the driver for
> gen8+ and causes the test program to abort.  The “jpeg/dec: gen8+ set
> correct fourcc for monochrome decode” driver patch will fix this and
> is on the ML.


lgtm, applied.

Thanks,

Sean


>  
> Thanks,
> U. Artie
>  
> From: Sean V Kelley [mailto:sea...@posteo.de] 
> Sent: Wednesday, September 28, 2016 1:48 PM
> To: Eoff, Ullysses A <ullysses.a.e...@intel.com>; libva@lists.freedes
> ktop.org
> Subject: Re: [Libva] [PATCH intel-driver 01/11] test: move
> ASSERT_NO_FAILURE macro to test.h
>  
>  
> On Wed, 2016-09-28 at 13:36 -0700, U. Artie Eoff wrote:
> Both jpeg decode and encode test files use this macro.
> So move it to the common test.h header to avoid duplicating
> it.
>  
> Please add brief cover in the future  (patch 00/N) when you have a
> large series, even if they are mostly refactoring.  I would like to
> see a concise summary for a large number of changes.
>  
> Thanks,
>  
> Sean
>  
>  
> Signed-off-by: U. Artie Eoff <ullysses.a.e...@intel.com>
> ---
>  test/i965_jpeg_decode_test.cpp | 4 
>  test/i965_jpeg_encode_test.cpp | 4 
>  test/test.h    | 4 
>  3 files changed, 4 insertions(+), 8 deletions(-)
>  
> diff --git a/test/i965_jpeg_decode_test.cpp
> b/test/i965_jpeg_decode_test.cpp
> index b022c2e67c3e..6b8462564cfd 100644
> --- a/test/i965_jpeg_decode_test.cpp
> +++ b/test/i965_jpeg_decode_test.cpp
> @@ -194,10 +194,6 @@ protected:
>  PictureData::SharedConst pd;
>  };
>  
> -#define ASSERT_NO_FAILURE(statement) \
> -    statement; \
> -    ASSERT_FALSE(HasFailure());
> -
>  TEST_P(FourCCTest, Decode)
>  {
>  struct i965_driver_data *i965(*this);
> diff --git a/test/i965_jpeg_encode_test.cpp
> b/test/i965_jpeg_encode_test.cpp
> index 08d80c4f75b7..80ca1fdc62be 100644
> --- a/test/i965_jpeg_encode_test.cpp
> +++ b/test/i965_jpeg_encode_test.cpp
> @@ -157,10 +157,6 @@ const TestInput::Shared NV12toI420(const
> TestInput::SharedConst& nv12)
>  return i420;
>  }
>  
> -#define ASSERT_NO_FAILURE(statement) \
> -    statement; \
> -    ASSERT_FALSE(HasFailure());
> -
>  class JPEGEncodeInputTest
>  : public JPEGEncodeTest
>  , public ::testing::WithParamInterface<
> diff --git a/test/test.h b/test/test.h
> index afca9a5ed2d6..000284a2ca2e 100644
> --- a/test/test.h
> +++ b/test/test.h
> @@ -66,6 +66,10 @@
>  #define ASSERT_PTR_NULL(ptr) \
>  ASSERT_TRUE(NULL == (ptr))
>  
> +#define ASSERT_NO_FAILURE(statement) \
> +    statement; \
> +    ASSERT_FALSE(HasFailure());
> +
>  class VaapiStatus
>  {
>  public:
>  


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Re: [Libva] [PATCH intel-driver 01/11] test: move ASSERT_NO_FAILURE macro to test.h

[Sean V Kelley]

On Wed, 2016-09-28 at 13:36 -0700, U. Artie Eoff wrote:
> Both jpeg decode and encode test files use this macro.
> So move it to the common test.h header to avoid duplicating
> it.
> 
Please add brief cover in the future  (patch 00/N) when you have a
large series, even if they are mostly refactoring.  I would like to see
a concise summary for a large number of changes.

Thanks,

Sean


> > Signed-off-by: U. Artie Eoff 
---
 test/i965_jpeg_decode_test.cpp | 4 
 test/i965_jpeg_encode_test.cpp | 4 
 test/test.h| 4 
 3 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/test/i965_jpeg_decode_test.cpp b/test/i965_jpeg_decode_test.cpp
index b022c2e67c3e..6b8462564cfd 100644
--- a/test/i965_jpeg_decode_test.cpp
+++ b/test/i965_jpeg_decode_test.cpp
@@ -194,10 +194,6 @@ protected:
 PictureData::SharedConst pd;
 };
 
-#define ASSERT_NO_FAILURE(statement) \
-statement; \
-ASSERT_FALSE(HasFailure());
-
 TEST_P(FourCCTest, Decode)
 {
 struct i965_driver_data *i965(*this);
diff --git a/test/i965_jpeg_encode_test.cpp b/test/i965_jpeg_encode_test.cpp
index 08d80c4f75b7..80ca1fdc62be 100644
--- a/test/i965_jpeg_encode_test.cpp
+++ b/test/i965_jpeg_encode_test.cpp
@@ -157,10 +157,6 @@ const TestInput::Shared NV12toI420(const 
TestInput::SharedConst& nv12)
 return i420;
 }
 
-#define ASSERT_NO_FAILURE(statement) \
-statement; \
-ASSERT_FALSE(HasFailure());
-
 class JPEGEncodeInputTest
 : public JPEGEncodeTest
 , public ::testing::WithParamInterface<
diff --git a/test/test.h b/test/test.h
index afca9a5ed2d6..000284a2ca2e 100644
--- a/test/test.h
+++ b/test/test.h
@@ -66,6 +66,10 @@
 #define ASSERT_PTR_NULL(ptr) \
 ASSERT_TRUE(NULL == (ptr))
 
+#define ASSERT_NO_FAILURE(statement) \
+statement; \
+ASSERT_FALSE(HasFailure());
+
 class VaapiStatus
 {
 public:

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Re: [Libva] [Libva-intel-driver][PATCH 1/2] Check whether there is a fully loaded HuC firmware

[Sean V Kelley]

On Wed, 2016-09-28 at 08:42 +0800, Xiang, Haihao wrote:
> > Signed-off-by: Xiang, Haihao 

lgtm, applied.

Now we just need the kernel patches merged and we should be good.

Thanks,

Sean


> ---
 src/intel_driver.c | 12 
 src/intel_driver.h |  1 +
 2 files changed, 13 insertions(+)

diff --git a/src/intel_driver.c b/src/intel_driver.c
index 96c1994..bb19401 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -44,6 +44,12 @@ uint32_t g_intel_debug_option_flags = 0;
 #define LOCAL_I915_PARAM_HAS_BSD2  30
 #endif
 
+#ifdef I915_PARAM_HAS_HUC
+#define LOCAL_I915_PARAM_HAS_HUC I915_PARAM_HAS_HUC
+#else
+#define LOCAL_I915_PARAM_HAS_HUC 42
+#endif
+
 static Bool
 intel_driver_get_param(struct intel_driver_data *intel, int param, int *value)
 {
@@ -130,6 +136,12 @@ intel_driver_init(VADriverContextP ctx)
 if (intel_driver_get_param(intel, LOCAL_I915_PARAM_HAS_BSD2, _value))
 intel->has_bsd2 = !!ret_value;
 
+intel->has_huc = 0;
+ret_value = 0;
+
+if (intel_driver_get_param(intel, LOCAL_I915_PARAM_HAS_HUC, _value))
+intel->has_huc = !!ret_value;
+
 intel_driver_get_revid(intel, >revision);
 return true;
 }
diff --git a/src/intel_driver.h b/src/intel_driver.h
index c9a80c8..dcdc03b 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -181,6 +181,7 @@ struct intel_driver_data
 unsigned int has_blt: 1; /* Flag: has BLT unit? */
 unsigned int has_vebox  : 1; /* Flag: has VEBOX unit */
 unsigned int has_bsd2   : 1; /* Flag: has the second BSD video ring unit */
+unsigned int has_huc: 1; /* Flag: has a fully loaded HuC firmware? */
 
 const struct intel_device_info *device_info;
 };

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Re: [Libva] [PATCH intel-driver v2 7/7] test: add some jpeg encode tests

[Sean V Kelley]

On Mon, 2016-09-26 at 13:11 -0700, U. Artie Eoff wrote:
> Add JPEG encode tests that encode raw I420 and NV12 data
> at quality 100 and then decodes them to verify proper
> encoding.
> 
> Currently, the 7680x4320 I420 test fails because ~40-60
> Y-values (i.e. plane 0) in each line from the decoded
> bitstream are off by more than 2 of the original raw
> I420 values.  It is not clear why only this resolution
> exhibits this problem.


Ah this was the one we talked about.  Accepted.

Sean

> > 
v2: don't create any input data in test fixture if
jpeg encoding is not supported.

Signed-off-by: U. Artie Eoff 
---
 test/Makefile.am   |   1 +
 test/i965_jpeg_encode_test.cpp | 699 +
 test/i965_jpeg_test_data.h | 198 +++-
 test/i965_test_fixture.h   |   1 +
 4 files changed, 895 insertions(+), 4 deletions(-)
 create mode 100644 test/i965_jpeg_encode_test.cpp

diff --git a/test/Makefile.am b/test/Makefile.am
index 2e9edda648a4..99560f8d8a54 100644
--- a/test/Makefile.am
+++ b/test/Makefile.am
@@ -57,6 +57,7 @@ test_i965_drv_video_SOURCES = 
\
i965_jpeg_test_data.cpp \
i965_test_fixture.cpp   \
i965_jpeg_decode_test.cpp   \
+   i965_jpeg_encode_test.cpp   \
object_heap_test.cpp\
test_main.cpp   \
$(NULL)
diff --git a/test/i965_jpeg_encode_test.cpp b/test/i965_jpeg_encode_test.cpp
new file mode 100644
index ..08d80c4f75b7
--- /dev/null
+++ b/test/i965_jpeg_encode_test.cpp
@@ -0,0 +1,699 @@
+/*
+ * Copyright (C) 2016 Intel Corporation. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "i965_jpeg_test_data.h"
+#include "test_utils.h"
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+namespace JPEG {
+namespace Encode {
+
+class JPEGEncodeTest
+: public I965TestFixture
+{
+public:
+JPEGEncodeTest()
+: I965TestFixture()
+, config(VA_INVALID_ID) // invalid
+, context(VA_INVALID_ID) // invalid
+{ }
+
+protected:
+virtual void TearDown()
+{
+if (context != VA_INVALID_ID) {
+destroyContext(context);
+context = VA_INVALID_ID;
+}
+
+if (config != VA_INVALID_ID) {
+destroyConfig(config);
+config = VA_INVALID_ID;
+}
+
+I965TestFixture::TearDown();
+}
+
+VAConfigID config;
+VAContextID context;
+};
+
+TEST_F(JPEGEncodeTest, Entrypoint)
+{
+ConfigAttribs attributes;
+struct i965_driver_data *i965(*this);
+
+ASSERT_PTR(i965);
+
+if (HAS_JPEG_ENCODING(i965)) {
+config = createConfig(profile, entrypoint, attributes);
+} else {
+VAStatus status = i965_CreateConfig(
+*this, profile, entrypoint, attributes.data(), attributes.size(),
+);
+EXPECT_STATUS_EQ(VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT, status);
+EXPECT_INVALID_ID(config);
+}
+}
+
+class TestInputCreator
+{
+public:
+typedef std::shared_ptr Shared;
+typedef std::shared_ptr SharedConst;
+
+TestInput::Shared create(const unsigned fourcc) const
+{
+const std::array res = getResolution();
+
+TestInput::Shared input(new TestInput(fourcc, res[0], res[1]));
+ByteData& bytes = input->bytes;
+
+RandomValueGenerator rg(0x00, 0xff);
+for (size_t i(0); i < input->planes; ++i)
+std::generate_n(
+std::back_inserter(bytes), input->sizes[i],
+[]{ return rg(); });
+return input;
+}
+
+

Re: [Libva] [PATCH intel-driver 1/7] test: split jpeg test data into header and cpp

[Sean V Kelley]

On Mon, 2016-09-26 at 12:09 -0700, U. Artie Eoff wrote:
> Move static definitions of JPEG TestPatternData into the .cpp
> so that multiple files can include the i965_jpeg_test_data.h
> header file.  Otherwise, there will be "multiple definition"
> compiler errors.
> 
> Also, change generateSolid to be inline for the same reason.
> 


Please take a look  at 

[  FAILED  ] 1 test, listed below:
[  FAILED  ] Common/JPEGEncodeInputTest.Full/38, where GetParam() =
(Fixed Size 7680x4320, 0x4f3502 pointing to "I420")

on make check-local


Sean
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Re: [Libva] [Libva-intel-driver][PATCH v3 00/18] Add H.264/SVC-T CBR support

[Sean V Kelley]

On Tue, 2016-09-13 at 16:02 +0800, Xiang, Haihao wrote:
> VA-API adds new interface for bitrate control per temporal layer.
> This patch series 
> adds the support for bitrate control per temporal layer for
> H.264/SVC-T in the driver.
> 
> v2: Rename frame_width_in_mbs and frame_height_in_mbs to
> frame_width_in_pixel and frame_height_in_pixel.
> Set right temporal layer id for current frame.
> Ignore bitrate control per temporal layer if the layer structure
> is not provided.
> 
> v3: Don't store framerate and bitrate buffers per layer if the layer
> structure is not
> provided before.

v3 lgtm.  reviewed, rebaed.

Added also review tags for Yakui.

appled.

Thanks,

Sean

> 
> Xiang, Haihao (18):
>   intel_mfc_brc_prepare() only works for H.264 or H.264 MVC
>   Add an internal flag to indicate the start of a new sequence
>   Add some new internal variables for a new sequence
>   Check bitrate control related parameters in sequence and misc
> parameters
>   Remove unnecessary code in H.264 BRC
>   Do not use the input parameters directly in H.264 BRC
>   Remove unused fields and code in H.264/VP8 BRC
>   move QpPrimeY to another inner structure for H.264/VP8 BRC
>   Use a 2-dimensional array to store misc parameters
>   Store buffers for VAEncMiscParameterTypeRateControl and
> VAEncMiscParameterTypeFrameRate per temporal layer
>   Check temporal layer structure
>   Use arrays to store bitrate and framerate
>   Save bitrate and framerate per temporal layer
>   Change the type of the 2nd parameter of intel_mfc_update_hrd()
>   Use arrays to store BRC related parameters per temporal layer
>   Initialize internal related parameters per temporal layer for H.264
> BRC
>   Update CBR algo for H.264 per tempolar layer
>   Add support for VAConfigAttribEncRateControlExt attribute
> 
>  src/gen6_mfc.c |  10 +-
>  src/gen6_mfc.h |  16 +--
>  src/gen6_mfc_common.c  | 268 +++--
> ---
>  src/gen6_vme.c |   2 +-
>  src/gen75_mfc.c|   6 +-
>  src/gen75_vme.c|   4 +-
>  src/gen7_vme.c |   2 +-
>  src/gen8_mfc.c |  96 ++--
>  src/gen8_vme.c |   2 +-
>  src/gen9_mfc_hevc.c|   4 +-
>  src/gen9_vdenc.c   |   4 +-
>  src/gen9_vdenc.h   |   3 -
>  src/gen9_vme.c |   2 +-
>  src/gen9_vp9_encoder.c |  26 ++---
>  src/i965_drv_video.c   |  63 +--
>  src/i965_drv_video.h   |   4 +-
>  src/i965_encoder.c | 296
> +++--
>  src/i965_encoder.h |  28 +
>  18 files changed, 557 insertions(+), 279 deletions(-)
> 


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Re: [Libva] [PATCH 1/3] Merge and modify encoding bit-rate control per temporal layer.

[Sean V Kelley]

 for region-of-interest (ROI) parameters. */
> -VAEncMiscParameterTypeROI   = 10
> +VAEncMiscParameterTypeROI   = 10,
> +/** \brief Buffer type used for temporal layer structure */
> +VAEncMiscParameterTypeTemporalLayerStructure   = 12,
>  } VAEncMiscParameterType;
>  
>  /** \brief Packed header type. */
> @@ -1154,6 +1206,22 @@ typedef struct _VAEncMiscParameterBuffer
>  unsigned int data[0];
>  } VAEncMiscParameterBuffer;
>  
> +/** \brief Temporal layer Structure*/
> +typedef struct _VAEncMiscParameterTemporalLayerStructure
> +{
> +/** \brief The number of temporal layers */
> +unsigned int number_of_layers;
> +/** \brief The length of the array defining frame layer membership. 
> Should be 1-32 */
> +unsigned int periodicity;
> +/**
> + * \brief The array indicating the layer id for each frame
> + *
> + * The layer id for the first frame in a coded sequence is always 0, so 
> layer_id[] specifies the layer
> + * ids for frames starting from the 2nd frame.
> + */
> +unsigned int layer_id[32];
> +} VAEncMiscParameterTemporalLayerStructure;
> +
>  
>  /** \brief Rate control parameters */
>  typedef struct _VAEncMiscParameterRateControl
> @@ -1181,6 +1249,11 @@ typedef struct _VAEncMiscParameterRateControl
>  unsigned int disable_frame_skip : 1; /* Disable frame skip in 
> rate control mode */
>  unsigned int disable_bit_stuffing : 1; /* Disable bit stuffing 
> in rate control mode */
>  unsigned int mb_rate_control : 4; /* Control VA_RC_MB 0: 
> default, 1: enable, 2: disable, other: reserved*/
> +/*
> + * The temporal layer that the rate control parameters are 
> specified for.
> + */
> +unsigned int temporal_id : 8;
> +unsigned int reserved : 17;
>  } bits;
>  unsigned int value;
>  } rc_flags;
> @@ -1189,6 +1262,18 @@ typedef struct _VAEncMiscParameterRateControl
>  typedef struct _VAEncMiscParameterFrameRate
>  {
>  unsigned int framerate;
> +union
> +{
> +struct
> +    {
> +/*
> + * The temporal id the framerate parameters are specified for.
> + */
> +unsigned int temporal_id : 8;
> +unsigned int reserved : 24;
> + } bits;
> + unsigned int value;
> + } framerate_flags;
>  } VAEncMiscParameterFrameRate;
>  
>  /**
> -- 
> 1.9.1
> 
> ___
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-- 
-- 
Sean V. Kelley <sean.v.kel...@intel.com>
Open Source Technology Center / SSG
Intel Corp.


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Re: [Libva] [PATCH intel-driver] test: fix jpeg decode invalid indexing

[Sean V Kelley]

> On Sep 7, 2016, at 12:22 PM, U. Artie Eoff  wrote:
> 
> Use hsample and vsample factor in printComponentDataTo to
> avoid invalid indexes into the data array.
> 
> This fixes a segfault in the jpeg fourcc tests that may be
> triggered during 'make check'.
> 
> Signed-off-by: U. Artie Eoff 


The issue here is really with random garbage in the test as written, not the 
Gtest project itself.

I suppose enough repeated test loops on the test should trigger the random 
issue.

applied.

Sean

> ---
> test/i965_jpeg_decode_test.cpp | 65 +-
> 1 file changed, 32 insertions(+), 33 deletions(-)
> 
> diff --git a/test/i965_jpeg_decode_test.cpp b/test/i965_jpeg_decode_test.cpp
> index 6a17d1e98d18..3a1c68f1fa4d 100644
> --- a/test/i965_jpeg_decode_test.cpp
> +++ b/test/i965_jpeg_decode_test.cpp
> @@ -133,43 +133,42 @@ protected:
> }
> }
> 
> -TestPattern::SharedConst testPattern;
> -PictureData::SharedConst pd;
> -};
> -
> -void printComponentDataTo(std::ostream& os, const uint8_t * const data,
> -unsigned w, unsigned h, unsigned pitch)
> -{
> -os << "";
> -for (unsigned i(0); i < w; ++i)
> -os << std::setw(4) << i << " ";
> -os << std::endl;
> -
> -const uint8_t *row = data;
> -for (unsigned i(0); i < h; ++i) {
> -os << std::dec << std::setfill(' ') << std::setw(3) << (i * w) << " 
> ";
> -for (size_t j(0); j < w; ++j) {
> -os  << "0x" << std::hex << std::setfill('0') << std::setw(2)
> -<< (uint32_t)row[j] << ",";
> +void printComponentDataTo(std::ostream& os, const uint8_t * const data,
> +unsigned w, unsigned h, unsigned pitch, unsigned hsample = 1,
> +unsigned vsample = 1)
> +{
> +const uint8_t *row = data;
> +for (unsigned i(0); i < (h/vsample); ++i) {
> +for (size_t j(0); j < (w/hsample); ++j) {
> +os  << "0x" << std::hex << std::setfill('0') << std::setw(2)
> +<< (uint32_t)row[j] << ",";
> +}
> +os << std::endl;
> +row += pitch;
> }
> -os << std::endl;
> -row += pitch;
> +os << std::setw(0) << std::setfill(' ') << std::dec << std::endl;
> }
> -os << std::setw(0) << std::setfill(' ') << std::dec << std::endl;
> -}
> 
> -void printImageOutputTo(std::ostream& os, const VAImage& image,
> -const uint8_t * const output)
> -{
> -printComponentDataTo(os, output + image.offsets[0], image.width,
> -image.height, image.pitches[0]); // Y
> -
> -printComponentDataTo(os, output + image.offsets[1], image.width,
> -image.height, image.pitches[1]); // U
> +void printImageOutputTo(std::ostream& os, const VAImage& image,
> +const uint8_t * const output)
> +{
> +printComponentDataTo(os, output + image.offsets[0], image.width,
> +image.height, image.pitches[0]); // Y
> +
> +printComponentDataTo(os, output + image.offsets[1], image.width,
> +image.height, image.pitches[1],
> +pd->pparam.components[0].h_sampling_factor,
> +pd->pparam.components[0].v_sampling_factor); // U
> +
> +printComponentDataTo(os, output + image.offsets[2], image.width,
> +image.height, image.pitches[2],
> +pd->pparam.components[0].h_sampling_factor,
> +pd->pparam.components[0].v_sampling_factor); // V
> +}
> 
> -printComponentDataTo(os, output + image.offsets[2], image.width,
> -image.height, image.pitches[2]); // V
> -}
> +TestPattern::SharedConst testPattern;
> +PictureData::SharedConst pd;
> +};
> 
> #define ASSERT_NO_FAILURE(statement) \
> statement; \
> --
> 2.1.0
> 
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Re: [Libva] [PATCH RFC intel-driver 00/11] Automated (Unit) Test Suite

[Sean V Kelley]

On Thu, 2016-09-01 at 12:59 -0700, U. Artie Eoff wrote:
> The following patchset integrates the Google Test Framework
> into the source tree.  This test framework provides a rich
> set of features like automatic test discovery, assertion macros,
> test fixtures, structured console and/or xml test results, and more.
> These kinds of features allow developers to spend more time
> focusing on writing the tests rather than the test framework
> itself.  You can learn more about GTest here:
> 
>    >
> 
> The intention is to give developers a simple way to write and
> execute [unit] tests for the vaapi-intel-driver.  With an
> "integrated"
> automated test suite/framework, developers are enabled to develop
> tests that can exercise internal driver functions, features and
> concepts.  It also helps developers to identify regressions before
> submitting new patches.  All of which, hopefully, leads to an overall
> higher quality driver.
> 
> As part of this patch series, I have provided a driver test fixture
> that can be used as a foundation for most test cases.  I've also
> developed several test cases that can be used as a reference for
> other
> developers to get started on developing their own test cases.
> 
> This patch series is not meant to address *every* need that we might
> have to test the driver.  Rather, it serves as a point to get us
> started.  As new tests are developed, I would expect that this test
> suite will evolve to accommodate additional needs.
> 
> One foreseeable addition is that, sooner than later, new tests will
> need
> to determine if the hardware supports a tested driver feature or not
> (e.g. JPEG encode, HEVC decode, ...) and return early if needed.  I'm
> thinking we can just move the HAS_* macros (i.e.  HAS_JPEG_ENCODING,
> HAS_HEVC_DECODING, ...) out of the src/i965_drv_video.c
> implementation
> file and put them into the src/i965_drv_video.h header file.  This
> will
> allow tests to use the same macros that the driver uses, for example:
> 
> TEST_F(JPEGEncodeTest, Simple)
> {
> struct i965_driver_data *i965(*this);
> ASSERT_PTR(i965);
> if (!HAS_JPEG_ENCODING(i965)) {
> RecordProperty("skipped", true);
> std::cout << “[SKIPPED] “ << testname() << “ unsupported”
> return;
> }
> 
> // do jpeg encode test
> }
> 
> Does this seem reasonable enough?  Are there other suggestions or
> recommendations?
> 
> Cheers.
> 
> U. Artie Eoff (11):
>   test: add googletest release-1.8.0 source
>   toolchain: build gtest convenience library
>   test: add initial test_i965_drv_video target
>   i965: compile driver source as convenience library
>   test: link to i965 convenience library
>   test: add i965 test fixture
>   test: add an i965 initialize test
>   test: add some JPEG decode test cases
>   test: add some object_heap tests
>   test: add some chipset tests
>   test: add TESTING readme file



lgtm. reviewed, tested.
(Unable to reproduce Haihao's issue but works fully well with
upstream).
Please file a bug if you can reproduce with more detail.

applied.

Sean


> 
>  Makefile.am|5 +
>  README |7 +-
>  TESTING|  147 +
>  configure.ac   |   11 +-
>  src/Makefile.am|   17 +-
>  test/Makefile.am   |   91 +
>  test/gtest/LICENSE |   28 +
>  test/gtest/README.md   |  280 +
>  test/gtest/docs/AdvancedGuide.md   | 2182 
>  test/gtest/docs/DevGuide.md|  126 +
>  test/gtest/docs/Documentation.md   |   14 +
>  test/gtest/docs/FAQ.md | 1087 
>  test/gtest/docs/Primer.md  |  502 ++
>  test/gtest/docs/PumpManual.md  |  177 +
>  test/gtest/docs/Samples.md |   14 +
>  test/gtest/docs/XcodeGuide.md  |   93 +
>  test/gtest/include/gtest/gtest-death-test.h|  294 ++
>  test/gtest/include/gtest/gtest-message.h   |  250 +
>  test/gtest/include/gtest/gtest-param-test.h| 1444 ++
>  test/gtest/include/gtest/gtest-param-test.h.pump   |  510 ++
>  test/gtest/include/gtest/gtest-printers.h  |  993 
>  test/gtest/include/gtest/gtest-spi.h   |  232 +
>  test/gtest/include/gtest/gtest-test-part.h |  179 +
>  test/gtest/include/gtest/gtest-typed-test.h|  263 +
>  test/gtest/include/gtest/gtest.h   | 2236 
>  test/gtest/include/gtest/gtest_pred_impl.h |  358 ++
>  test/gtest/include/gtest/gtest_prod.h  |   58 +
>  .../include/gtest/internal/custom/gtest-port.h |   69 +
>  

Re: [Libva] [PATCH RFC intel-driver 00/11] Automated (Unit) Test Suite

[Sean V Kelley]

On Wed, 2016-09-07 at 02:42 +, Xiang, Haihao wrote:
> Hi Artie,
> 
> First I applied your patches to the latest master branch, then build
> the library and run test with the following steps:
> 
> 1. ./autogen.sh --enable-tests --prefix=/usr --
> libdir=/usr/lib/x86_64-
> linux-gnu/
> 
> 2.  make ; sudo make install
> 
> 3. cd test
> 
> 4. ./test_i965_drv_video
> 
> 5. make check-local
> 
> step 4 is OK, but there is segmentation fault in step 5. 
> 
> hw:
> Haswell
> 
> sw: 
> I am using Ubuntu 14.04.3 LTS but installed some packages from source
> code:
> libdrm 2.4.68
> linux kernel 4.5.0
> libva: master
> libva-intel-driver: master+your patches


Works for me.

ArchLinux
libdrm 2.4.70-1
linux kernel 4.7.2-1
Libva: matster
Libva-intel-driver: master + gtest patch series

Thanks,

Sean

> 
> Thanks
> Haihao
> 
> 
> 
> 
> > 
> > Hi Haihao,
> > 
> > I am unable to duplicate your segmentation fault.  Could you
> > provide
> > more output and details on your setup?
> > 
> > Thanks,
> > 
> > 
> > U. Artie
> > 
> > > 
> > > -Original Message-
> > > From: Xiang, Haihao
> > > Sent: Friday, September 02, 2016 1:40 AM
> > > To: Eoff, Ullysses A ; li...@lists.fre
> > > ed
> > > esktop.org
> > > Subject: Re: [Libva] [PATCH RFC intel-driver 00/11] Automated
> > > (Unit) Test Suite
> > > 
> > > 
> > > Thanks for the patches to integrate gtest framework into libva-
> > > intel-
> > > driver. test_i965_drv_video works well for me, but I got
> > > segmentation
> > > fault when I ran 'make check-local', could you have a look at
> > > this
> > > issue?
> > > 
> > > libva info: Found init function __vaDriverInit_0_39
> > > libva info: va_openDriver() returns 0
> > > make: *** [check-local] Segmentation fault
> > > 
> > > Thanks
> > > Haihao
> > > 
> > > > 
> > > > The following patchset integrates the Google Test Framework
> > > > into the source tree.  This test framework provides a rich
> > > > set of features like automatic test discovery, assertion
> > > > macros,
> > > > test fixtures, structured console and/or xml test results, and
> > > > more.
> > > > These kinds of features allow developers to spend more time
> > > > focusing on writing the tests rather than the test framework
> > > > itself.  You can learn more about GTest here:
> > > > 
> > > >    > > > le
> > > > test
> > > > > 
> > > > > 
> > > > 
> > > > The intention is to give developers a simple way to write and
> > > > execute [unit] tests for the vaapi-intel-driver.  With an
> > > > "integrated"
> > > > automated test suite/framework, developers are enabled to
> > > > develop
> > > > tests that can exercise internal driver functions, features and
> > > > concepts.  It also helps developers to identify regressions
> > > > before
> > > > submitting new patches.  All of which, hopefully, leads to an
> > > > overall
> > > > higher quality driver.
> > > > 
> > > > As part of this patch series, I have provided a driver test
> > > > fixture
> > > > that can be used as a foundation for most test cases.  I've
> > > > also
> > > > developed several test cases that can be used as a reference
> > > > for
> > > > other
> > > > developers to get started on developing their own test cases.
> > > > 
> > > > This patch series is not meant to address *every* need that we
> > > > might
> > > > have to test the driver.  Rather, it serves as a point to get
> > > > us
> > > > started.  As new tests are developed, I would expect that this
> > > > test
> > > > suite will evolve to accommodate additional needs.
> > > > 
> > > > One foreseeable addition is that, sooner than later, new tests
> > > > will
> > > > need
> > > > to determine if the hardware supports a tested driver feature
> > > > or
> > > > not
> > > > (e.g. JPEG encode, HEVC decode, ...) and return early if
> > > > needed.  I'm
> > > > thinking we can just move the HAS_* macros
> > > > (i.e.  HAS_JPEG_ENCODING,
> > > > HAS_HEVC_DECODING, ...) out of the src/i965_drv_video.c
> > > > implementation
> > > > file and put them into the src/i965_drv_video.h header
> > > > file.  This
> > > > will
> > > > allow tests to use the same macros that the driver uses, for
> > > > example:
> > > > 
> > > > TEST_F(JPEGEncodeTest, Simple)
> > > > {
> > > > struct i965_driver_data *i965(*this);
> > > > ASSERT_PTR(i965);
> > > > if (!HAS_JPEG_ENCODING(i965)) {
> > > > RecordProperty("skipped", true);
> > > > std::cout << “[SKIPPED] “ << testname() << “
> > > > unsupported”
> > > > return;
> > > > }
> > > > 
> > > > // do jpeg encode test
> > > > }
> > > > 
> > > > Does this seem reasonable enough?  Are there other suggestions
> > > > or
> > > > recommendations?
> > > > 
> > > > Cheers.
> > > > 
> > > > U. Artie Eoff (11):
> > > >   test: add googletest release-1.8.0 source
> > > >   toolchain: build gtest convenience library
> > > >   test: add 

Re: [Libva] [Libva-intel-driver][PATCH] Code cleanup for vme/mfc initializing on SKL

[Sean V Kelley]

On Wed, 2016-09-07 at 13:49 +0800, Zhao Yakui wrote:
> On 09/07/2016 11:01 AM, Xiang, Haihao wrote:
> > 
> > 
> > i965_encoder.c is a general file, it would be better not to include
> > more HW/implementation related code in this file.
> > 
> > Actually it is more clear if you look into the new
> > gen9_vme_context_init() and gen9_mfc_context_init(). Previous it
> > selects different path both in gen9_enc_hw_context_init(),
> > gen9_enc_hw_context_init(), gen9_mfc_context_init() per codec.
> 
> I see it.
> 
> In fact there is no much difference.
> 
> Of course it is still OK to me that the callback function is selected
> in 
> gen9_vme_context_init/gen9_mfc_context_init.


I do prefer keeping i965_encoder.c more generic, otherwise we risk
introducing a blurring of the lines between GEN specific changes.

Sean


> 
> Thanks
> Yakui
> > 
> > 
> > Thanks
> > Haihao
> > 
> > 
> > 
> > 
> > > 
> > > On 09/06/2016 11:39 PM, Xiang, Haihao wrote:
> > > > 
> > > > It keeps i965_encoder.c simple
> > > > 
> > > 
> > > Thanks for the patch.
> > > But I don't think that this patch is necessary. The code looks
> > > more
> > > clear if it can select the different initialization callback
> > > function
> > > earlier based on the corresponding profile/entrypoint . At the
> > > same
> > > time
> > > it can also avoid that the gen9_vme.c/gen9_mfc.c calls the other
> > > API
> > > implementation.
> > > 
> > > > 
> > > > Signed-off-by: Xiang, Haihao
> > > > ---
> > > >    src/gen6_mfc.h |  6 ++
> > > >    src/gen6_vme.h |  2 +-
> > > >    src/gen9_mfc.c | 25 +++--
> > > >    src/gen9_vme.c | 15 ++-
> > > >    src/i965_encoder.c | 37 ++
> > > > ---
> > > >    5 files changed, 46 insertions(+), 39 deletions(-)
> > > > 
> > > > diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h
> > > > index 4561d43..702596b 100644
> > > > --- a/src/gen6_mfc.h
> > > > +++ b/src/gen6_mfc.h
> > > > @@ -346,6 +346,12 @@ VAStatus
> > > > gen6_mfc_pipeline(VADriverContextP
> > > > ctx,
> > > >    void gen6_mfc_context_destroy(void *context);
> > > > 
> > > >    extern
> > > > +Bool gen6_mfc_context_init(VADriverContextP ctx, struct
> > > > intel_encoder_context *encoder_context);
> > > > +
> > > > +extern
> > > > +Bool gen7_mfc_context_init(VADriverContextP ctx, struct
> > > > intel_encoder_context *encoder_context);
> > > > +
> > > > +extern
> > > >    Bool gen75_mfc_context_init(VADriverContextP ctx, struct
> > > > intel_encoder_context *encoder_context);
> > > > 
> > > > 
> > > > diff --git a/src/gen6_vme.h b/src/gen6_vme.h
> > > > index e8f4742..f94085f 100644
> > > > --- a/src/gen6_vme.h
> > > > +++ b/src/gen6_vme.h
> > > > @@ -116,7 +116,7 @@ struct gen6_vme_context
> > > >    #define  MPEG2_LEVEL_MAIN0x08
> > > >    #define  MPEG2_LEVEL_HIGH0x04
> > > > 
> > > > -
> > > > +Bool gen6_vme_context_init(VADriverContextP ctx, struct
> > > > intel_encoder_context *encoder_context);
> > > >    Bool gen75_vme_context_init(VADriverContextP ctx, struct
> > > > intel_encoder_context *encoder_context);
> > > > 
> > > >    extern void intel_vme_update_mbmv_cost(VADriverContextP ctx,
> > > > diff --git a/src/gen9_mfc.c b/src/gen9_mfc.c
> > > > index b3d6e78..ce038b1 100644
> > > > --- a/src/gen9_mfc.c
> > > > +++ b/src/gen9_mfc.c
> > > > @@ -39,18 +39,31 @@
> > > >    #include "i965_drv_video.h"
> > > >    #include "i965_encoder.h"
> > > >    #include "gen6_mfc.h"
> > > > +#include "gen9_mfc.h"
> > > > +#include "gen9_vdenc.h"
> > > > +#include "gen9_vp9_encapi.h"
> > > > 
> > > >    Bool gen9_mfc_context_init(VADriverContextP ctx, struct
> > > > intel_encoder_context *encoder_context)
> > > >    {
> > > > -if ((encoder_context->codec == CODEC_H264) ||
> > > > -(encoder_context->codec == CODEC_H264_MVC)) {
> > > > +switch (encoder_context->codec) {
> > > > +case CODEC_VP8:
> > > > +case CODEC_MPEG2:
> > > > +case CODEC_JPEG:
> > > > +return gen8_mfc_context_init(ctx, encoder_context);
> > > > +
> > > > +case CODEC_H264:
> > > > +case CODEC_H264_MVC:
> > > > +if (encoder_context->low_power_mode)
> > > > +return gen9_vdenc_context_init(ctx,
> > > > encoder_context);
> > > > +else
> > > >    return gen8_mfc_context_init(ctx,
> > > > encoder_context);
> > > > -}
> > > > 
> > > > +case CODEC_HEVC:
> > > > +return gen9_hcpe_context_init(ctx, encoder_context);
> > > > 
> > > > -if ((encoder_context->codec == CODEC_VP8) ||
> > > > -(encoder_context->codec == CODEC_MPEG2))
> > > > -return gen8_mfc_context_init(ctx, encoder_context);
> > > > +case CODEC_VP9:
> > > > +return gen9_vp9_pak_context_init(ctx,
> > > > encoder_context);
> > > > +}
> > > > 
> > > >    /* Other profile/entrypoint pairs never get here, see
> > > > gen9_enc_hw_context_init() */
> > > >    assert(0);
> > > > diff --git 

Re: [Libva] [PATCH RFC intel-driver 00/11] Automated (Unit) Test Suite

[Sean V Kelley]

Hi Yakui,

As I mentioned before to Haihao who asked the same question, the focus here is 
on driver unit testing.  The intent is not to test Libva API.  That is a 
separate area.

Gtest is intended for the driver as unit tests and a first step in getting CI 
in place.  VA-API conformance is a separate project that we will be adding at a 
later date.

This is not meant to validate VA-API.

Thanks,

Sean

> On 1 MFómh 2016, at 19:52, Zhao Yakui  wrote:
> 
> On 09/02/2016 03:59 AM, U. Artie Eoff wrote:
> 
> HI, Artie
> 
>   thanks for your patch set.
>   It is great idea to add gtest test-suite, which is helpful to improve the 
> code quality and avoid the regression.
> 
>   I have one main concern. Can we add it into the libva instead of driver? In 
> such case it is helpful to test the behaviour of VAAPI.
> 
> Thanks
> Yakui
> 
>> The following patchset integrates the Google Test Framework
>> into the source tree.  This test framework provides a rich
>> set of features like automatic test discovery, assertion macros,
>> test fixtures, structured console and/or xml test results, and more.
>> These kinds of features allow developers to spend more time
>> focusing on writing the tests rather than the test framework
>> itself.  You can learn more about GTest here:
>> 
>>  
>> 
>> The intention is to give developers a simple way to write and
>> execute [unit] tests for the vaapi-intel-driver.  With an "integrated"
>> automated test suite/framework, developers are enabled to develop
>> tests that can exercise internal driver functions, features and
>> concepts.  It also helps developers to identify regressions before
>> submitting new patches.  All of which, hopefully, leads to an overall
>> higher quality driver.
>> 
>> As part of this patch series, I have provided a driver test fixture
>> that can be used as a foundation for most test cases.  I've also
>> developed several test cases that can be used as a reference for other
>> developers to get started on developing their own test cases.
>> 
>> This patch series is not meant to address *every* need that we might
>> have to test the driver.  Rather, it serves as a point to get us
>> started.  As new tests are developed, I would expect that this test
>> suite will evolve to accommodate additional needs.
>> 
>> One foreseeable addition is that, sooner than later, new tests will need
>> to determine if the hardware supports a tested driver feature or not
>> (e.g. JPEG encode, HEVC decode, ...) and return early if needed.  I'm
>> thinking we can just move the HAS_* macros (i.e.  HAS_JPEG_ENCODING,
>> HAS_HEVC_DECODING, ...) out of the src/i965_drv_video.c implementation
>> file and put them into the src/i965_drv_video.h header file.  This will
>> allow tests to use the same macros that the driver uses, for example:
>> 
>>TEST_F(JPEGEncodeTest, Simple)
>>{
>>struct i965_driver_data *i965(*this);
>>ASSERT_PTR(i965);
>>if (!HAS_JPEG_ENCODING(i965)) {
>>RecordProperty("skipped", true);
>>std::cout<<  “[SKIPPED] “<<  testname()<<  “ unsupported”
>>return;
>>}
>> 
>>// do jpeg encode test
>>}
>> 
>> Does this seem reasonable enough?  Are there other suggestions or
>> recommendations?
>> 
>> Cheers.
>> 
>> U. Artie Eoff (11):
>>  test: add googletest release-1.8.0 source
>>  toolchain: build gtest convenience library
>>  test: add initial test_i965_drv_video target
>>  i965: compile driver source as convenience library
>>  test: link to i965 convenience library
>>  test: add i965 test fixture
>>  test: add an i965 initialize test
>>  test: add some JPEG decode test cases
>>  test: add some object_heap tests
>>  test: add some chipset tests
>>  test: add TESTING readme file
>> 
>> Makefile.am|5 +
>> README |7 +-
>> TESTING|  147 +
>> configure.ac   |   11 +-
>> src/Makefile.am|   17 +-
>> test/Makefile.am   |   91 +
>> test/gtest/LICENSE |   28 +
>> test/gtest/README.md   |  280 +
>> test/gtest/docs/AdvancedGuide.md   | 2182 
>> test/gtest/docs/DevGuide.md|  126 +
>> test/gtest/docs/Documentation.md   |   14 +
>> test/gtest/docs/FAQ.md | 1087 
>> test/gtest/docs/Primer.md  |  502 ++
>> test/gtest/docs/PumpManual.md  |  177 +
>> test/gtest/docs/Samples.md |   14 +
>> test/gtest/docs/XcodeGuide.md  |   93 +
>> test/gtest/include/gtest/gtest-death-test.h|  294 ++
>> test/gtest/include/gtest/gtest-message.h   

Re: [Libva] [PATCH RFC intel-driver 00/11] Automated (Unit) Test Suite

[Sean V Kelley]

Hi Yakui,

As I mentioned before to Haihao who asked the same question, the focus here is 
on driver unit testing.  The intent is not to test Libva API.  That is a 
separate area.  

Gtest is intended for the driver as unit tests and a first step in getting CI 
in place.  VA-API conformance is a separate project that we will be adding at a 
later date.

This is not meant to validate VA-API.

Thanks,

Sean

> On 1 MFómh 2016, at 19:52, Zhao Yakui  wrote:
> 
> On 09/02/2016 03:59 AM, U. Artie Eoff wrote:
> 
> HI, Artie
> 
>thanks for your patch set.
>It is great idea to add gtest test-suite, which is helpful to improve the 
> code quality and avoid the regression.
> 
>I have one main concern. Can we add it into the libva instead of driver? 
> In such case it is helpful to test the behaviour of VAAPI.
> 
> Thanks
>  Yakui
> 
>> The following patchset integrates the Google Test Framework
>> into the source tree.  This test framework provides a rich
>> set of features like automatic test discovery, assertion macros,
>> test fixtures, structured console and/or xml test results, and more.
>> These kinds of features allow developers to spend more time
>> focusing on writing the tests rather than the test framework
>> itself.  You can learn more about GTest here:
>> 
>>   
>> 
>> The intention is to give developers a simple way to write and
>> execute [unit] tests for the vaapi-intel-driver.  With an "integrated"
>> automated test suite/framework, developers are enabled to develop
>> tests that can exercise internal driver functions, features and
>> concepts.  It also helps developers to identify regressions before
>> submitting new patches.  All of which, hopefully, leads to an overall
>> higher quality driver.
>> 
>> As part of this patch series, I have provided a driver test fixture
>> that can be used as a foundation for most test cases.  I've also
>> developed several test cases that can be used as a reference for other
>> developers to get started on developing their own test cases.
>> 
>> This patch series is not meant to address *every* need that we might
>> have to test the driver.  Rather, it serves as a point to get us
>> started.  As new tests are developed, I would expect that this test
>> suite will evolve to accommodate additional needs.
>> 
>> One foreseeable addition is that, sooner than later, new tests will need
>> to determine if the hardware supports a tested driver feature or not
>> (e.g. JPEG encode, HEVC decode, ...) and return early if needed.  I'm
>> thinking we can just move the HAS_* macros (i.e.  HAS_JPEG_ENCODING,
>> HAS_HEVC_DECODING, ...) out of the src/i965_drv_video.c implementation
>> file and put them into the src/i965_drv_video.h header file.  This will
>> allow tests to use the same macros that the driver uses, for example:
>> 
>> TEST_F(JPEGEncodeTest, Simple)
>> {
>> struct i965_driver_data *i965(*this);
>> ASSERT_PTR(i965);
>> if (!HAS_JPEG_ENCODING(i965)) {
>> RecordProperty("skipped", true);
>> std::cout<<  “[SKIPPED] “<<  testname()<<  “ unsupported”
>> return;
>> }
>> 
>> // do jpeg encode test
>> }
>> 
>> Does this seem reasonable enough?  Are there other suggestions or
>> recommendations?
>> 
>> Cheers.
>> 
>> U. Artie Eoff (11):
>>   test: add googletest release-1.8.0 source
>>   toolchain: build gtest convenience library
>>   test: add initial test_i965_drv_video target
>>   i965: compile driver source as convenience library
>>   test: link to i965 convenience library
>>   test: add i965 test fixture
>>   test: add an i965 initialize test
>>   test: add some JPEG decode test cases
>>   test: add some object_heap tests
>>   test: add some chipset tests
>>   test: add TESTING readme file
>> 
>>  Makefile.am|5 +
>>  README |7 +-
>>  TESTING|  147 +
>>  configure.ac   |   11 +-
>>  src/Makefile.am|   17 +-
>>  test/Makefile.am   |   91 +
>>  test/gtest/LICENSE |   28 +
>>  test/gtest/README.md   |  280 +
>>  test/gtest/docs/AdvancedGuide.md   | 2182 
>>  test/gtest/docs/DevGuide.md|  126 +
>>  test/gtest/docs/Documentation.md   |   14 +
>>  test/gtest/docs/FAQ.md | 1087 
>>  test/gtest/docs/Primer.md  |  502 ++
>>  test/gtest/docs/PumpManual.md  |  177 +
>>  test/gtest/docs/Samples.md |   14 +
>>  test/gtest/docs/XcodeGuide.md  |   93 +
>>  test/gtest/include/gtest/gtest-death-test.h|  294 ++
>>  

Re: [Libva] [Libva-intel-driver][PATCH] Set the right transform 8x8 flag for Intra macroblock in VME output on BDW+

[Sean V Kelley]

On Wed, 2016-08-17 at 09:59 +0800, Xiang, Haihao wrote:
> VME message doesn't output the transform 8x8 flag, the shader
> set the right flag accordingly.
> 
> Signed-off-by: Xiang, Haihao 
> Tested-by: Meng, Jia 

lgtm, applied.

thanks,

Sean

> ---
>  src/shaders/vme/inter_frame_gen8.asm | 13 +
>  src/shaders/vme/inter_frame_gen8.g8b |  9 +++--
>  src/shaders/vme/inter_frame_gen9.g9b |  9 +++--
>  src/shaders/vme/intra_frame_gen8.asm | 13 +
>  src/shaders/vme/intra_frame_gen8.g8b |  5 +
>  src/shaders/vme/intra_frame_gen9.g9b |  5 +
>  src/shaders/vme/vme8.inc |  5 +
>  7 files changed, 55 insertions(+), 4 deletions(-)
> 
> diff --git a/src/shaders/vme/inter_frame_gen8.asm
> b/src/shaders/vme/inter_frame_gen8.asm
> index 17bc412..6296aa1 100644
> --- a/src/shaders/vme/inter_frame_gen8.asm
> +++ b/src/shaders/vme/inter_frame_gen8.asm
> @@ -458,6 +458,19 @@ send (8)
>  mlen sic_vme_msg_length
>  rlen vme_wb_length
>  {align1};
> +
> +/* Check whether mb type is 0 */
> +and.z.f0.0 (1) null<1>:UD vme_wb.0<0,1,0>:UD W0_INTRA_MB_TYPE_MASK
> {align1};
> +(-f0.0) jmpi (1) __write_intra_output;
> +
> +/* Check whether intra mb mode is INTRA_8x8 */
> +and (1) tmp_reg2<1>:UD vme_wb.0<0,1,0>:UD W0_INTRA_MB_MODE_MASK
> {align1};
> +cmp.z.f0.0 (1) null<1>:UD tmp_reg2<0,1,0>:UD W0_INTRA_8x8 {align1};
> +
> +/* Set transform 8x8 flag */
> +(f0.0) or (1) vme_wb.0<1>:UD vme_wb.0<0,1,0>:UD
> W0_TRANSFORM_8x8_FLAG {align1};
> +
> +__write_intra_output:
>  /*
>   * Oword Block Write message
>   */
> diff --git a/src/shaders/vme/inter_frame_gen8.g8b
> b/src/shaders/vme/inter_frame_gen8.g8b
> index d0cc25d..ddc96fc 100644
> --- a/src/shaders/vme/inter_frame_gen8.g8b
> +++ b/src/shaders/vme/inter_frame_gen8.g8b
> @@ -146,13 +146,13 @@
> { 0x0001, 0x2fa41a68, 0x0b04, 0x },
> { 0x0001, 0x2fa81a68, 0x0b24, 0x },
> { 0x0040, 0x2fe8, 0x06001400, 0x0020 },
> -   { 0x0020, 0x3400, 0x0e001400, 0x0a20 },
> +   { 0x0020, 0x3400, 0x0e001400, 0x0a70 },
> { 0x0001, 0x2ac01a68, 0x0fe4, 0x },
> { 0x0001, 0x2fa01a68, 0x0ae6, 0x },
> { 0x0001, 0x2fa41a68, 0x0b06, 0x },
> { 0x0001, 0x2fa81a68, 0x0b26, 0x },
> { 0x0040, 0x2fe8, 0x06001400, 0x0020 },
> -   { 0x0020, 0x3400, 0x0e001400, 0x09c0 },
> +   { 0x0020, 0x3400, 0x0e001400, 0x0a10 },
> { 0x0001, 0x2ac21a68, 0x0fe4, 0x },
> { 0x002c, 0x2a801a68, 0x1e450ac0, 0x00020002 },
> { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 },
> @@ -183,6 +183,11 @@
> { 0x0001, 0x244c0608, 0x, 0x0080 },
> { 0x0061, 0x28000208, 0x008d0440, 0x },
> { 0x0d600031, 0x21800a08, 0x0e000800, 0x10782000 },
> +   { 0x0105, 0x2200, 0x06000180, 0x001f },
> +   { 0x00110020, 0x3400, 0x0e001400, 0x0030 },
> +   { 0x0005, 0x24400208, 0x06000180, 0x0030 },
> +   { 0x0110, 0x2200, 0x06000440, 0x0010 },
> +   { 0x00010006, 0x21800208, 0x06000180, 0x8000 },
> { 0x0061, 0x28000208, 0x008d0480, 0x },
> { 0x0001, 0x28200208, 0x0180, 0x },
> { 0x0001, 0x28240208, 0x0190, 0x },
> diff --git a/src/shaders/vme/inter_frame_gen9.g9b
> b/src/shaders/vme/inter_frame_gen9.g9b
> index b79042c..1a7376c 100644
> --- a/src/shaders/vme/inter_frame_gen9.g9b
> +++ b/src/shaders/vme/inter_frame_gen9.g9b
> @@ -146,13 +146,13 @@
> { 0x0001, 0x2fa41a68, 0x0b04, 0x },
> { 0x0001, 0x2fa81a68, 0x0b24, 0x },
> { 0x0040, 0x2fe8, 0x06001400, 0x0020 },
> -   { 0x0020, 0x3400, 0x0e001400, 0x0a20 },
> +   { 0x0020, 0x3400, 0x0e001400, 0x0a70 },
> { 0x0001, 0x2ac01a68, 0x0fe4, 0x },
> { 0x0001, 0x2fa01a68, 0x0ae6, 0x },
> { 0x0001, 0x2fa41a68, 0x0b06, 0x },
> { 0x0001, 0x2fa81a68, 0x0b26, 0x },
> { 0x0040, 0x2fe8, 0x06001400, 0x0020 },
> -   { 0x0020, 0x3400, 0x0e001400, 0x09c0 },
> +   { 0x0020, 0x3400, 0x0e001400, 0x0a10 },
> { 0x0001, 0x2ac21a68, 0x0fe4, 0x },
> { 0x002c, 0x2a801a68, 0x1e450ac0, 0x00020002 },
> { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 },
> @@ -183,6 +183,11 @@
> { 0x0001, 0x244c0608, 0x, 0x0080 },
> { 0x0061, 0x28000208, 0x008d0440, 0x },
> { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 },
> +   { 0x0105, 0x2200, 0x06000180, 0x001f },
> +   { 0x00110020, 0x3400, 0x0e001400, 0x0030 },
> +   { 0x0005, 0x24400208, 0x06000180, 0x0030 },
> +   { 0x0110, 0x2200, 0x06000440, 0x0010 },
> +   { 0x00010006, 0x21800208, 0x06000180, 0x8000 },
>    

Re: [Libva] [Libva-intel-driver][PATCH] Set cost to 0 for CHROMA INTRA mode

[Sean V Kelley]

On Tue, 2016-08-16 at 12:10 +0800, Xiang, Haihao wrote:
> Commit 1cd6795 causes quality drop for U/V plane.
> 
> Reported-by: Wang, Fei W 
> Signed-off-by: Xiang, Haihao 
> Tested-by: Wang, Fei W 

Good catch.  lgtm. applied.

Thanks,

Sean

> ---
>  src/gen6_mfc_common.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/gen6_mfc_common.c b/src/gen6_mfc_common.c
> index b0342da..9f041d8 100644
> --- a/src/gen6_mfc_common.c
> +++ b/src/gen6_mfc_common.c
> @@ -776,7 +776,7 @@ void intel_h264_calc_mbmvcost_qp(int qp,
>  lambda = intel_lambda_qp(qp);
>  
>  m_cost = lambda;
> -vme_state_message[MODE_CHROMA_INTRA] =
> intel_format_lutvalue(m_cost, 0x8f);
> +vme_state_message[MODE_CHROMA_INTRA] = 0;
>  vme_state_message[MODE_REFID_COST] =
> intel_format_lutvalue(m_cost, 0x8f);
>  
>  if (slice_type == SLICE_TYPE_I) {


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Re: [Libva] [Libva-intel-driver][PATCH 2/2] Encode/VP9: Don't use hardcoded offsets

[Sean V Kelley]

On Fri, 2016-08-19 at 10:28 +0800, Zhao Yakui wrote:
> On 08/15/2016 10:46 AM, Xiang, Haihao wrote:
> > 
> > codec_private_data in struct i965_coded_buffer_segment is used to
> > store
> > codec related data. Add 'struct vp9_encode_status' for the data
> > that will
> > be written into codec_private_data
> > 
> > Signed-off-by: Xiang, Haihao
> 
> This looks good to me.
> 
> Add: Reviewed-by: Zhao Yakui 
> 
> Thanks
> Yakui

lgtm, applied.

Thanks,

Sean

> 
> > 
> > ---
> >   src/gen9_vp9_encoder.c | 26 --
> >   src/gen9_vp9_encoder.h | 12 
> >   2 files changed, 16 insertions(+), 22 deletions(-)
> > 
> > diff --git a/src/gen9_vp9_encoder.c b/src/gen9_vp9_encoder.c
> > index edfbda6..76cd1d7 100644
> > --- a/src/gen9_vp9_encoder.c
> > +++ b/src/gen9_vp9_encoder.c
> > @@ -5985,15 +5985,16 @@ gen9_vp9_vme_context_init(VADriverContextP
> > ctx, struct intel_encoder_context *en
> >   /* the definition of status buffer offset for VP9 */
> >   {
> >   struct vp9_encode_status_buffer_internal *status_buffer;
> > +uint32_t base_offset = offsetof(struct
> > i965_coded_buffer_segment, codec_private_data);
> > 
> >   status_buffer =_state->status_buffer;
> >   memset(status_buffer, 0,
> >  sizeof(struct vp9_encode_status_buffer_internal));
> > 
> > -status_buffer->bs_byte_count_offset = 2048;
> > -status_buffer->image_status_mask_offset = 2052;
> > -status_buffer->image_status_ctrl_offset = 2056;
> > -status_buffer->media_index_offset   = 2060;
> > +status_buffer->bs_byte_count_offset = base_offset +
> > offsetof(struct vp9_encode_status, bs_byte_count);
> > +status_buffer->image_status_mask_offset = base_offset +
> > offsetof(struct vp9_encode_status, image_status_mask);
> > +status_buffer->image_status_ctrl_offset = base_offset +
> > offsetof(struct vp9_encode_status, image_status_ctrl);
> > +status_buffer->media_index_offset   = base_offset +
> > offsetof(struct vp9_encode_status, media_index);
> > 
> >   status_buffer->vp9_bs_frame_reg_offset = 0x1E9E0;
> >   status_buffer->vp9_image_mask_reg_offset = 0x1E9F0;
> > @@ -6014,24 +6015,13 @@ gen9_vp9_get_coded_status(VADriverContextP
> > ctx,
> > struct intel_encoder_context
> > *encoder_context,
> > struct i965_coded_buffer_segment
> > *coded_buf_seg)
> >   {
> > -struct gen9_vp9_state *vp9_state = NULL;
> > -struct vp9_encode_status_buffer_internal *status_buffer;
> > -unsigned int *buf_ptr;
> > +struct vp9_encode_status *vp9_encode_status;
> > 
> >   if (!encoder_context || !coded_buf_seg)
> >   return VA_STATUS_ERROR_INVALID_BUFFER;
> > 
> > -vp9_state = (struct gen9_vp9_state *)(encoder_context-
> > >enc_priv_state);
> > -
> > -if (!vp9_state)
> > -return VA_STATUS_ERROR_INVALID_BUFFER;
> > -
> > -status_buffer =_state->status_buffer;
> > -
> > -buf_ptr = (unsigned int *)((char *)coded_buf_seg +
> > status_buffer->bs_byte_count_offset);
> > -
> > -/* the stream size is writen into the bs_byte_count_offset
> > address of buffer */
> > -coded_buf_seg->base.size = *buf_ptr;
> > +vp9_encode_status = (struct vp9_encode_status *)coded_buf_seg-
> > >codec_private_data;
> > +coded_buf_seg->base.size = vp9_encode_status->bs_byte_count;
> > 
> >   /* One VACodedBufferSegment for VP9 will be added later.
> >    * It will be linked to the next element of coded_buf_seg-
> > >base.next
> > diff --git a/src/gen9_vp9_encoder.h b/src/gen9_vp9_encoder.h
> > index 8034240..ad2d875 100644
> > --- a/src/gen9_vp9_encoder.h
> > +++ b/src/gen9_vp9_encoder.h
> > @@ -1849,15 +1849,19 @@ enum INTEL_ENC_VP9_TU_MODE
> >   #define VP9_GOLDEN_REF 0x02
> >   #define VP9_ALT_REF0x04
> > 
> > -/* the vp9_encode_status_buffer is the shadow
> > - * of vp9_encode_status_buffer_internal.
> > - */
> > +struct vp9_encode_status
> > +{
> > +uint32_t bs_byte_count;
> > +uint32_t image_status_mask;
> > +uint32_t image_status_ctrl;
> > +uint32_t media_index;
> > +};
> > +
> >   struct vp9_encode_status_buffer_internal
> >   {
> >   uint32_t bs_byte_count_offset;
> >   uint32_t reserved[15];
> > 
> > -/* the above is shared with the gen9_encode_status_buffer */
> >   uint32_t image_status_mask_offset;
> >   uint32_t image_status_ctrl_offset;
> > 
> 
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