[ACTIVITY] 18-22 July 2016

[Yao Qi]

# Progress #

* TCWG-518, ARM range stepping patches.  [2/10]
  The last one is approved, and all patches are committed!  Need to
  enable range stepping and collect the performance data.  Range
  stepping should speed up remote debugging.

* TCWG-655, Workaround ARM linux kernel ptrace bug on setting VFP
  registers.  No response from upstreams.

* TCWG-333, Thumb mode function pointer assignment in GDB.  [3/10]
  Try a different approach, still causes regressions.  I'll ask upstream
  how to do it.

* TCWG-547, Change software_single_step interface to return a vector of
  address.  [4/10].
  Patches are done, but need to figure out how to hook them together.

* TCWG-685, GDB 7.12 release.  [1/10]
  The release will be in Sep, and hopefully it can be done before the
  Linaro Connect.  Discuss on how/when to pick up 7.12 in Linaro
  toolchain release.  I am inclined to upgrade GDB in linaro release
  from 7.11 to 7.12 in fall or winter.

# Plan #

* Off on Tue and Wed.
* GDB 7.12 release testing for ARM and AArch64.
* US visa application.

--
Yao
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[ACTIVITY] 18-22 July 2016

[Peter Smith]

== Progress ==

TCWG-680 Some analysis on what non-compiler support would be required
for an llvm based EBC (UEFI) toolchain.

TCWG-612 ARM TLS support in LLD: Initial support and tests for
standard model upstreamed. There is still some work to be done for
corner cases where LLD's relaxations will cause assertion failures.
Static linking also needs some work as the TLS module index needs to
be written into the GOT without a dynamic relocation. I have a
prototype fix that needs cleaning up and tests written.

Did some experiments with static linking and TLS to work out what I'll
need to look at next. Discovered GNU ifunc support when static linking
is not working.

Did some thinking about what would be needed to support C++ exceptions
in LLD for ARM. This is probably the next major chunk of work as
supporting exceptions is needed when static linking against the C
library startup code.

== Plans ==
Plans for next 4 weeks:

On Sabbatical back on the 22nd August. Will probably have limited
access to email if there is anything urgent.

Peter
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Re: What -mfpu option is used with neon, vfpv3 and vfpd32 flag?

[Richard Earnshaw]

On 22/07/16 05:21, Jeffrey Walton wrote:
> On Fri, Jul 22, 2016 at 12:19 AM, Jim Wilson  wrote:
>> On Thu, Jul 21, 2016 at 9:13 PM, Jeffrey Walton  wrote:
>>> So I guess the question is, what do I use for -mfpu=neon-vfp3 (or
>>> -mfpu=neon-vfp3-d32)? Is -mfpu=neon enough?
>>
>> The -mfpu=neon option is enough.  neon implies vfpv3 and 32 D registers.
>
> Perfect, thanks.
>
> Jeff
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According to https://beagleboard.org/black, this board contains a
Cortex-A8.  So -mfpu=neon is correct.


https://community.arm.com/groups/tools/blog/2013/04/15/arm-cortex-a-processors-and-gcc-command-lines

R.
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