Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
On Fri, Jul 13, 2018 at 2:15 AM, Andrey Smirnov wrote: > I wanted to avoid relying on defaults be it register reset values or > settings that bootloader left us with. Default value of 0xa5 works, > but, given how the pin is IRQ_TYPE_LEVEL_HIGH, I though it would be > better to configure it to have a pulldown. Do you want me to add that > to commit log? Yes, that would be nice. Thanks
Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
On Fri, Jul 13, 2018 at 2:15 AM, Andrey Smirnov wrote: > I wanted to avoid relying on defaults be it register reset values or > settings that bootloader left us with. Default value of 0xa5 works, > but, given how the pin is IRQ_TYPE_LEVEL_HIGH, I though it would be > better to configure it to have a pulldown. Do you want me to add that > to commit log? Yes, that would be nice. Thanks
Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
On Thu, Jul 12, 2018 at 6:37 AM Fabio Estevam wrote:
>
> Hi Andrey,
>
> On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
> wrote:
>
> > + pinctrl_switch: switchgrp {
> > + fsl,pins = <
> > + MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
>
> The i.MX51 Reference Manual states that 0xa5 is the default reset
> value for the register IOMUXC_SW_PAD_CTL_PAD_AUD3_BB_CK.
>
> By reading your commit log I had the impression you wanted to provide
> the default value explicitly.
>
> Please clarify.
I wanted to avoid relying on defaults be it register reset values or
settings that bootloader left us with. Default value of 0xa5 works,
but, given how the pin is IRQ_TYPE_LEVEL_HIGH, I though it would be
better to configure it to have a pulldown. Do you want me to add that
to commit log?
Thanks,
Andrey Smirnov
Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
On Thu, Jul 12, 2018 at 6:37 AM Fabio Estevam wrote:
>
> Hi Andrey,
>
> On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
> wrote:
>
> > + pinctrl_switch: switchgrp {
> > + fsl,pins = <
> > + MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
>
> The i.MX51 Reference Manual states that 0xa5 is the default reset
> value for the register IOMUXC_SW_PAD_CTL_PAD_AUD3_BB_CK.
>
> By reading your commit log I had the impression you wanted to provide
> the default value explicitly.
>
> Please clarify.
I wanted to avoid relying on defaults be it register reset values or
settings that bootloader left us with. Default value of 0xa5 works,
but, given how the pin is IRQ_TYPE_LEVEL_HIGH, I though it would be
better to configure it to have a pulldown. Do you want me to add that
to commit log?
Thanks,
Andrey Smirnov
Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
Hi Andrey,
On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
wrote:
> + pinctrl_switch: switchgrp {
> + fsl,pins = <
> + MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
The i.MX51 Reference Manual states that 0xa5 is the default reset
value for the register IOMUXC_SW_PAD_CTL_PAD_AUD3_BB_CK.
By reading your commit log I had the impression you wanted to provide
the default value explicitly.
Please clarify.
Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
Hi Andrey,
On Wed, Jul 11, 2018 at 11:33 PM, Andrey Smirnov
wrote:
> + pinctrl_switch: switchgrp {
> + fsl,pins = <
> + MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
The i.MX51 Reference Manual states that 0xa5 is the default reset
value for the register IOMUXC_SW_PAD_CTL_PAD_AUD3_BB_CK.
By reading your commit log I had the impression you wanted to provide
the default value explicitly.
Please clarify.
Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
On Wed, Jul 11, 2018 at 07:33:36PM -0700, Andrey Smirnov wrote: > Add DT code to explicitly configure PAD_AUD3_BB_CK and avoid relying > on defaults. > > Cc: Fabio Estevam > Cc: Nikita Yushchenko > Cc: Lucas Stach > Cc: cphe...@gmail.com > Cc: Shawn Guo > Cc: Rob Herring > Cc: Mark Rutland > Cc: linux-arm-ker...@lists.infradead.org > Cc: devicet...@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: Andrew Lunn > Signed-off-by: Andrey Smirnov Thanks for adding this. Reviewed-by: Andrew Lunn Andrew
Re: [PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
On Wed, Jul 11, 2018 at 07:33:36PM -0700, Andrey Smirnov wrote: > Add DT code to explicitly configure PAD_AUD3_BB_CK and avoid relying > on defaults. > > Cc: Fabio Estevam > Cc: Nikita Yushchenko > Cc: Lucas Stach > Cc: cphe...@gmail.com > Cc: Shawn Guo > Cc: Rob Herring > Cc: Mark Rutland > Cc: linux-arm-ker...@lists.infradead.org > Cc: devicet...@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: Andrew Lunn > Signed-off-by: Andrey Smirnov Thanks for adding this. Reviewed-by: Andrew Lunn Andrew
[PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
Add DT code to explicitly configure PAD_AUD3_BB_CK and avoid relying
on defaults.
Cc: Fabio Estevam
Cc: Nikita Yushchenko
Cc: Lucas Stach
Cc: cphe...@gmail.com
Cc: Shawn Guo
Cc: Rob Herring
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Andrew Lunn
Signed-off-by: Andrey Smirnov
---
arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
index 2941a92d40f1..0bb42c00d72b 100644
--- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
+++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
@@ -221,6 +221,8 @@
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_switch>;
ports {
#address-cells = <1>;
@@ -426,6 +428,12 @@
>;
};
+ pinctrl_switch: switchgrp {
+ fsl,pins = <
+ MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
--
2.17.1
[PATCH 1/2] ARM: dts: imx51-zii-scu3-esb: Add switch IRQ line pinumx config
Add DT code to explicitly configure PAD_AUD3_BB_CK and avoid relying
on defaults.
Cc: Fabio Estevam
Cc: Nikita Yushchenko
Cc: Lucas Stach
Cc: cphe...@gmail.com
Cc: Shawn Guo
Cc: Rob Herring
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Andrew Lunn
Signed-off-by: Andrey Smirnov
---
arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
index 2941a92d40f1..0bb42c00d72b 100644
--- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
+++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
@@ -221,6 +221,8 @@
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_switch>;
ports {
#address-cells = <1>;
@@ -426,6 +428,12 @@
>;
};
+ pinctrl_switch: switchgrp {
+ fsl,pins = <
+ MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
--
2.17.1
