Re: [PATCH V3 2/6] ARM: AM43xx: fix dpll init in bypass mode

2014-04-11 Thread Paul Walmsley
Hi Tomi.

On Tue, 8 Apr 2014, Tomi Valkeinen wrote:

> On 24/03/14 13:01, Sathya Prakash M R wrote:
> > From: Tomi Valkeinen 
> > 
> > On AM43xx, if a PLL is in bypass at kernel init, the code in
> > omap2_get_dpll_rate() will not realize this and will try to calculate
> > the clock rate using the multiplier and the divider, resulting in
> > errors.
> > 
> > omap2_init_dpll_parent() has similar issue.
> > 
> > Add the missing soc_is_am43xx() check to make the code work on AM43xx.
> > 
> > Signed-off-by: Tomi Valkeinen 
> > Signed-off-by: Sathya Prakash M R 
> > ---
> >  arch/arm/mach-omap2/clkt_dpll.c |4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> Can you queue this for 3.15 fixes?

Done.  Thanks for pointing it out - I had missed the repost due to not 
being in the Cc:.


- Paul
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Re: [PATCH V3 2/6] ARM: AM43xx: fix dpll init in bypass mode

2014-04-11 Thread Paul Walmsley
On Mon, 24 Mar 2014, Sathya Prakash M R wrote:

> From: Tomi Valkeinen 
> 
> On AM43xx, if a PLL is in bypass at kernel init, the code in
> omap2_get_dpll_rate() will not realize this and will try to calculate
> the clock rate using the multiplier and the divider, resulting in
> errors.
> 
> omap2_init_dpll_parent() has similar issue.
> 
> Add the missing soc_is_am43xx() check to make the code work on AM43xx.
> 
> Signed-off-by: Tomi Valkeinen 
> Signed-off-by: Sathya Prakash M R 

Thanks, queued for v3.15-rc.

- Paul
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Re: [PATCH V3 2/6] ARM: AM43xx: fix dpll init in bypass mode

2014-04-08 Thread Tomi Valkeinen
Hi Paul,

On 24/03/14 13:01, Sathya Prakash M R wrote:
> From: Tomi Valkeinen 
> 
> On AM43xx, if a PLL is in bypass at kernel init, the code in
> omap2_get_dpll_rate() will not realize this and will try to calculate
> the clock rate using the multiplier and the divider, resulting in
> errors.
> 
> omap2_init_dpll_parent() has similar issue.
> 
> Add the missing soc_is_am43xx() check to make the code work on AM43xx.
> 
> Signed-off-by: Tomi Valkeinen 
> Signed-off-by: Sathya Prakash M R 
> ---
>  arch/arm/mach-omap2/clkt_dpll.c |4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Can you queue this for 3.15 fixes?

 Tomi




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[PATCH V3 2/6] ARM: AM43xx: fix dpll init in bypass mode

2014-03-24 Thread Sathya Prakash M R
From: Tomi Valkeinen 

On AM43xx, if a PLL is in bypass at kernel init, the code in
omap2_get_dpll_rate() will not realize this and will try to calculate
the clock rate using the multiplier and the divider, resulting in
errors.

omap2_init_dpll_parent() has similar issue.

Add the missing soc_is_am43xx() check to make the code work on AM43xx.

Signed-off-by: Tomi Valkeinen 
Signed-off-by: Sathya Prakash M R 
---
 arch/arm/mach-omap2/clkt_dpll.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 924c230..14e9e45 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS)
return 1;
-   } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
+   } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS)
@@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS)
return __clk_get_rate(dd->clk_bypass);
-   } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
+   } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS)
-- 
1.7.9.5

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