Re: [PATCH] dt-bindings: mmc: sh_mmcif: Document r8a7744 DT bindings
On 25 September 2018 at 19:27, Biju Das wrote: > Add support for r8a7744 SoC. Renesas RZ/G1N (R8A7744) MMCIF is identical > to the R-Car Gen2 family. > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson Applied for next, thanks! Kind regards Uffe > --- > Documentation/devicetree/bindings/mmc/renesas,mmcif.txt | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt > b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt > index 5ff1e12..c064af5 100644 > --- a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt > +++ b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt > @@ -12,6 +12,7 @@ Required properties: > - "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs > - "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs > - "renesas,mmcif-r8a7743" for the MMCIF found in r8a7743 SoCs > + - "renesas,mmcif-r8a7744" for the MMCIF found in r8a7744 SoCs > - "renesas,mmcif-r8a7745" for the MMCIF found in r8a7745 SoCs > - "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs > - "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs > @@ -23,7 +24,8 @@ Required properties: > - interrupts: Some SoCs have only 1 shared interrupt, while others have > either >2 or 3 individual interrupts (error, int, card detect). Below is the number >of interrupts for each SoC: > -1: r8a73a4, r8a7743, r8a7745, r8a7778, r8a7790, r8a7791, r8a7793, r8a7794 > +1: r8a73a4, r8a7743, r8a7744, r8a7745, r8a7778, r8a7790, r8a7791, > r8a7793, > + r8a7794 > 2: r8a7740, sh73a0 > 3: r7s72100 > > -- > 2.7.4 >
Re: [PATCH] dt-bindings: mmc: renesas_sdhi: Add r8a7744 support
On 25 September 2018 at 19:23, Biju Das wrote: > Add support for r8a7744 SoC. Renesas RZ/G1N (R8A7744) SDHI is identical > to the R-Car Gen2 family. > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson Applied for next, thanks! Kind regards Uffe > --- > Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt > b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt > index 8f3a113..21d671a 100644 > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt > +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt > @@ -16,6 +16,7 @@ Required properties: > "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC > "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC > "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC > + "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC > "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC > "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC > "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC > -- > 2.7.4 >
RE: [PATCH 1/4] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
Hello Geert,
> Subject: Re: [PATCH 1/4] dt-bindings: mmc: renesas_sdhi: Add r8a77470 support
>
> Hi Fabrizio,
>
> On Mon, Sep 24, 2018 at 8:34 PM Fabrizio Castro
> wrote:
> > > Subject: Re: [PATCH 1/4] dt-bindings: mmc: renesas_sdhi: Add r8a77470
> > > support
> > > On Fri, Sep 21, 2018 at 1:55 PM Fabrizio Castro
> > > wrote:
> > > > Document SDHI support for the RZ/G1C (a.k.a. R8A77470) SoC.
> > > >
> > > > Signed-off-by: Fabrizio Castro
> > > > Reviewed-by: Biju Das
>
> > > > --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > > > +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> > > > @@ -17,6 +17,7 @@ Required properties:
> > > > "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
> > > > "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
> > > > "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
> > > > + "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
> > > > "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
> > > > "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
> > > > "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
> > >
> > > It seems RZ/G1C has two slighty different types of SD card interfaces:
> > > 1. SDHI0 and SDHI2 use SYS-DMAC,
> > > 2. SDHI1 can also be used as an MMC interface, and has an internal DMAC.
> > >
> > > Do we need to distinguish between them using the compatible value, or
> > > are there other ways?
> >
> > The most sensible thing to do here is probably to distinguish between them
> > using
> > the compatible value, we were thinking about using the following for SDHI1:
> > compatible = "renesas,sdhi-mmc-r8a77470", "renesas,rcar-gen3-sdhi";
> >
> > What do you guys think?
>
> Oh, so it's identical (or "sufficiently compatible") with the SD card
> interface on R-Car Gen3?
It seems identical to R-Car Gen3. I have done proper testing now and everything
seems to be working as expected.
> "renesas,sdhi-mmc-r8a77470" may be a good way to distinguish.
> I'm a bit reluctant to add "renesas,rcar-gen3-sdhi", though.
We could just use "renesas,sdhi-mmc-r8a77470" for SDHI1 and "renesas,sdhi-
r8a77470"
for SDHI0 and SDHI2 then, without generic compatible strings, or maybe we could
use "renesas,rcar-gen2-sdhi" for both even though that would be incorrect as
per the
current implementation of the drivers.
Today I have given some thought on how to distinguish the two types of IP from
the
two different drivers without having driver specific compatible strings, and
unfortunately
we would still need to take into account some information coming from the
device tree
(like the memory address of the interface) in order to decide if we need to
fail the probing.
I can't use the VERSION register to make any decision as to read the registers
in a meaningful
way we still need to know bus_shift, and then the DMA properties are optional,
therefore
using different compatible strings for the two types of IP still feels like the
best option to me.
I am dropping all of the patches from this series and I am going to send
another version
to address the comments on the implementation of r8a77470_pin_to_pocctrl, but
also
to address both SD card and eMMC, so that we can reason about what's the best
thing to do
by looking at the implementation of a working example.
Cheers,
Fab
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH v2] mmc: tmio: Add initial setting of interrupt mask register
From: Masaharu Hayakawa The initial value of the interrupt mask register may be different from the H/W manual at the startup of the kernel by setting from the bootloader. Since the error interrupts may be unmasked, the driver sets initial value. The initial value is only known for R-Car Gen2 and Gen3 platforms so limit the initialization to those platforms. Signed-off-by: Masaharu Hayakawa Signed-off-by: Niklas Söderlund --- * Changes since v1 - Limit the initialization to Gen2+ platforms by checking the TMIO_MMC_MIN_RCAR2 flag. - Rename the constant for the initialization value to reflect it's only for R-Car Gen2+ platforms. --- drivers/mmc/host/tmio_mmc.h | 1 + drivers/mmc/host/tmio_mmc_core.c | 4 2 files changed, 5 insertions(+) diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index a9972dc60c6fbb8c..00673cec47a4de13 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -99,6 +99,7 @@ /* Define some IRQ masks */ /* This is the mask used at reset by the chip */ +#define TMIO_MASK_INIT_RCAR2 0x8b7f031d /* Initial value for R-Car Gen2+ */ #define TMIO_MASK_ALL 0x837f031d #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c index f05c3a622f090cd6..5aae7e2129400671 100644 --- a/drivers/mmc/host/tmio_mmc_core.c +++ b/drivers/mmc/host/tmio_mmc_core.c @@ -1232,6 +1232,10 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host) _host->set_clock(_host, 0); tmio_mmc_reset(_host); + if (pdata->flags & TMIO_MMC_MIN_RCAR2) + sd_ctrl_write32_as_16_and_16(_host, CTL_IRQ_MASK, +TMIO_MASK_INIT_RCAR2); + _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); -- 2.19.0
Re: [PATCH] clk: renesas: r7s9210: Add SPI clocks
On Wed, Sep 26, 2018 at 3:40 PM Chris Brandt wrote:
> Add RSPI clocks for RZ/A2.
>
> Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v4.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH] pinctrl: sh-pfc: Rename automotive-only arrays to automotive
Renesas RZ/G SoCs are pin compatible with R-Car SoCs, but lack several
automotive-specific peripherals.
Currently pin groups and functions for automotive-specific peripherals
are grouped in arrays named after the automative SoC part numbers.
Rename them to "automotive" for clarity and consistency.
Signed-off-by: Geert Uytterhoeven
---
To be queued in sh-pfc-for-v4.20.
drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 16
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 12 ++--
drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 8
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 5c6c9cd0dcc8db9e..209f74a6e6ce5a6f 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -4455,7 +4455,7 @@ static const unsigned int vin2_clk_mux[] = {
static const struct {
struct sh_pfc_pin_group common[346];
- struct sh_pfc_pin_group r8a779x[9];
+ struct sh_pfc_pin_group automotive[9];
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(audio_clk_a),
@@ -4805,7 +4805,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin2_clkenb),
SH_PFC_PIN_GROUP(vin2_clk),
},
- .r8a779x = {
+ .automotive = {
SH_PFC_PIN_GROUP(adi_common),
SH_PFC_PIN_GROUP(adi_chsel0),
SH_PFC_PIN_GROUP(adi_chsel1),
@@ -5362,7 +5362,7 @@ static const char * const vin2_groups[] = {
static const struct {
struct sh_pfc_function common[58];
- struct sh_pfc_function r8a779x[2];
+ struct sh_pfc_function automotive[2];
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(audio_clk),
@@ -5424,7 +5424,7 @@ static const struct {
SH_PFC_FUNCTION(vin1),
SH_PFC_FUNCTION(vin2),
},
- .r8a779x = {
+ .automotive = {
SH_PFC_FUNCTION(adi),
SH_PFC_FUNCTION(mlb),
}
@@ -6665,10 +6665,10 @@ const struct sh_pfc_soc_info r8a7791_pinmux_info = {
.nr_pins = ARRAY_SIZE(pinmux_pins),
.groups = pinmux_groups.common,
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
-ARRAY_SIZE(pinmux_groups.r8a779x),
+ARRAY_SIZE(pinmux_groups.automotive),
.functions = pinmux_functions.common,
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
- ARRAY_SIZE(pinmux_functions.r8a779x),
+ ARRAY_SIZE(pinmux_functions.automotive),
.cfg_regs = pinmux_config_regs,
@@ -6689,10 +6689,10 @@ const struct sh_pfc_soc_info r8a7793_pinmux_info = {
.nr_pins = ARRAY_SIZE(pinmux_pins),
.groups = pinmux_groups.common,
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
-ARRAY_SIZE(pinmux_groups.r8a779x),
+ARRAY_SIZE(pinmux_groups.automotive),
.functions = pinmux_functions.common,
.nr_functions = ARRAY_SIZE(pinmux_functions.common) +
- ARRAY_SIZE(pinmux_functions.r8a779x),
+ ARRAY_SIZE(pinmux_functions.automotive),
.cfg_regs = pinmux_config_regs,
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index c896e99d986a453e..3a6d21d871070b92 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -4125,7 +4125,7 @@ static const unsigned int vin5_clk_mux[] = {
static const struct {
struct sh_pfc_pin_group common[307];
- struct sh_pfc_pin_group r8a779x[33];
+ struct sh_pfc_pin_group automotive[33];
} pinmux_groups = {
.common = {
SH_PFC_PIN_GROUP(audio_clk_a_a),
@@ -4436,7 +4436,7 @@ static const struct {
SH_PFC_PIN_GROUP(vin5_clkenb),
SH_PFC_PIN_GROUP(vin5_clk),
},
- .r8a779x = {
+ .automotive = {
SH_PFC_PIN_GROUP(canfd0_data_a),
SH_PFC_PIN_GROUP(canfd0_data_b),
SH_PFC_PIN_GROUP(canfd1_data),
@@ -4968,7 +4968,7 @@ static const char * const vin5_groups[] = {
static const struct {
struct sh_pfc_function common[45];
- struct sh_pfc_function r8a779x[6];
+ struct sh_pfc_function automotive[6];
} pinmux_functions = {
.common = {
SH_PFC_FUNCTION(audio_clk),
@@ -5017,7 +5017,7 @@ static const struct {
SH_PFC_FUNCTION(vin4),
SH_PFC_FUNCTION(vin5),
},
- .r8a779x = {
+ .automotive = {
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
SH_PFC_FUNCTION(drif0),
@@ -6185,10 +6185,10 @@ const struct sh_pfc_soc_info r8a7796_pinmux_info = {
.nr_pins = ARRAY_SIZE(pinmux_pins),
.groups = pinmux_groups.common,
.nr_groups = ARRAY_SIZE(pinmux_groups.common) +
-
[PATCH] clk: renesas: r7s9210: Add SPI clocks
Add RSPI clocks for RZ/A2.
Signed-off-by: Chris Brandt
---
drivers/clk/renesas/r7s9210-cpg-mssr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c
b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index d8ff4cb0defc..5135f13ec628 100644
--- a/drivers/clk/renesas/r7s9210-cpg-mssr.c
+++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c
@@ -95,6 +95,9 @@ static const struct mssr_mod_clk r7s9210_mod_clks[]
__initconst = {
DEF_MOD_STB("i2c1", 86,R7S9210_CLK_P1),
DEF_MOD_STB("i2c0", 87,R7S9210_CLK_P1),
+ DEF_MOD_STB("spi2", 95,R7S9210_CLK_P1),
+ DEF_MOD_STB("spi1", 96,R7S9210_CLK_P1),
+ DEF_MOD_STB("spi0", 97,R7S9210_CLK_P1),
};
/* The clock dividers in the table vary based on DT and register settings */
--
2.16.1
RE: [PATCH v2 3/3] clk: renesas: r7s9210: Move table update to separate function
Hi Geert, On Wednesday, September 26, 2018, Geert Uytterhoeven wrote: > > +/* The clock dividers in the table vary based on DT and register > settings */ > > +static void r7s9210_update_clk_table(struct clk *extal_clk, void > __iomem *base) > > Can be __init. > > Reviewed-by: Geert Uytterhoeven > i.e. will queue in clk-renesas-for-v4.20, with the above fixed. OK, thank you! Chris
RE: [PATCH v2 1/3] clk: renesas: cpg-mssr: Add early clock support
Hi Geert
On Wednesday, September 26, 2018, Geert Uytterhoeven wrote:
> Thanks for the update!
> Works fine on R-Car Gen2 and Gen3.
Thank you for checking!
> > struct clk **clks;
>
> In v1, you initialized clks to NULL, which was needed ...
~~~
> > + priv->base = of_iomap(np, 0);
> > + if (!priv->base) {
> > + error = -ENOMEM;
> > + goto out_err;
>
> ... because else it's still uninitialized here ...
~~~
> > +out_err:
> > + kfree(clks);
>
> ... and freed here.
Damn! I could not remember why I set it to NULL. And I moved so much
code around I thought it was a mistake, so I took it out.
> Reviewed-by: Geert Uytterhoeven
> i.e. will queue in clk-renesas-for-v4.20, with the above fixed.
OK, I'll send a new version out shortly.
Chris
RE: [PATCH] ARM: dts: iwg20d-q7-dbcm-ca: Improve model string
Hello Geert,
> From: devicetree-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Geert Uytterhoeven
> Sent: 26 September 2018 12:41
>
> Hi Chris,
>
> On Wed, Sep 26, 2018 at 12:01 PM Chris Paterson
> wrote:
> > Update the model string for this platform configuration and fix the
> > grammar at the same time.
> >
> > This brings the syntax in line with the RZ/G1E iWave board.
> >
> > Signed-off-by: Chris Paterson
> > ---
> > Perhaps this patch isn't really needed, but the current string annoys me.
> >
> > Patch applies cleanly to renesas-devel-20180925-v4.19-rc5.
> > ---
> > arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> > b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> > index 0d006aea99da1b40..6811ddc4af6460ce 100644
> > --- a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> > +++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> > @@ -11,7 +11,7 @@
> > #include "iwg20d-q7-dbcm-ca.dtsi"
> >
> > / {
> > - model = "iW-RainboW-G20D-Q7 RZ/G1M based plus camera daughter
> board";
> > + model = "iWave RainboW-G20D-Q7 RZ/G1M based board with camera
> > + add-on";
> > compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
> > };
>
> Perhaps you want to harmonize the other differences, too?
> - "iWave" vs. "iWave Systems",
> - "Q7" vs. "Qseven",
> - "iW-Rainbow" vs. "Rainbow".
Probably not a bad idea...
Chris
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
Re: [PATCH v5 3/3] ARM: dts: r9a06g032: Add pinctrl node
On Wed, Sep 26, 2018 at 11:11 AM Phil Edworthy
wrote:
> This provides a pinctrl driver for the Renesas R9A06G032 SoC
>
> Based on a patch originally written by Michel Pollet at Renesas.
>
> Signed-off-by: Phil Edworthy
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] ARM: dts: iwg20d-q7-dbcm-ca: Improve model string
Hi Chris,
On Wed, Sep 26, 2018 at 12:01 PM Chris Paterson
wrote:
> Update the model string for this platform configuration and fix the
> grammar at the same time.
>
> This brings the syntax in line with the RZ/G1E iWave board.
>
> Signed-off-by: Chris Paterson
> ---
> Perhaps this patch isn't really needed, but the current string annoys me.
>
> Patch applies cleanly to renesas-devel-20180925-v4.19-rc5.
> ---
> arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> index 0d006aea99da1b40..6811ddc4af6460ce 100644
> --- a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> +++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> @@ -11,7 +11,7 @@
> #include "iwg20d-q7-dbcm-ca.dtsi"
>
> / {
> - model = "iW-RainboW-G20D-Q7 RZ/G1M based plus camera daughter board";
> + model = "iWave RainboW-G20D-Q7 RZ/G1M based board with camera add-on";
> compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
> };
Perhaps you want to harmonize the other differences, too?
- "iWave" vs. "iWave Systems",
- "Q7" vs. "Qseven",
- "iW-Rainbow" vs. "Rainbow".
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] ARM: shmobile: Document iWave RZ/G1N SOM
On Wed, Sep 26, 2018 at 10:28 AM Biju Das wrote:
> Document the iW-RainboW-G20M-RZ/G1N Qseven device tree bindings,
> listing it as a supported system on module.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
> ---
> iWave uses the same "iW-RainboW-G20M-Qseven" name for both
> iWave-RZ/G1N and iWave-RZ/G1M Q7 SOM. Details can be found
> in the below link
> https://www.iwavesystems.com/rz-g1m-qseven-module.html
Makes perfect sense, as the SoCs are pin-compatible.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] dt-bindings: mmc: sh_mmcif: Document r8a7744 DT bindings
On Tue, Sep 25, 2018 at 7:34 PM Biju Das wrote:
> Add support for r8a7744 SoC. Renesas RZ/G1N (R8A7744) MMCIF is identical
> to the R-Car Gen2 family.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
On Tue, Sep 25, 2018 at 7:25 PM Biju Das wrote:
> Document SoC specific compatible strings for r8a7744. No driver change
> is needed as the fallback strings will activate the right code.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
On Tue, Sep 25, 2018 at 7:14 PM Biju Das wrote:
> RZ/G1N (R8A7744) watchdog implementation is compatible with R-Car
> Gen2, therefore add relevant documentation.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] dt-bindings: thermal: rcar: Add device tree support for r8a7744
On Tue, Sep 25, 2018 at 7:08 PM Biju Das wrote:
> Add thermal sensor support for r8a7744 SoC. The Renesas RZ/G1N
> (r8a7744) thermal sensor module is identical to the R-Car Gen2 family.
>
> No driver change is needed due to the fallback compatible value
> "renesas,rcar-gen2-thermal".
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] dt-bindings: irqchip: renesas-irqc: Document r8a7744 support
On Tue, Sep 25, 2018 at 7:03 PM Biju Das wrote:
> Document RZ/G1N (R8A7744) SoC bindings.
>
> Signed-off-by: Biju Das
> Reviewed-by: Chris Paterson
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH] dt-bindings: arm: Document iW-RainboW-G20D-Qseven-RZG1N board
Document the iW-RainboW-G20D-Qseven-RZG1N device tree bindings, listing it as a supported board. Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- *) This patch is tested against linux-next and depend upon the below patch https://patchwork.kernel.org/patch/10615399/ *) Details of this board can be found in below link https://www.iwavesystems.com/rz-g1m-qseven-development-kit.html --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 4cfb567..144f045a 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -101,6 +101,8 @@ Boards: compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743" - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) compatible = "iwave,g20m", "renesas,r8a7743" + - iWave Systems RZ/G1N Qseven Development Platform (iW-RainboW-G20D-Qseven) +compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7744" - iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven) compatible = "iwave,g20m", "renesas,r8a7744" - Kingfisher (SBEV-RCAR-KF-M03) -- 2.7.4
[ANNOUNCE] Renesas tree closed for v4.20
Hi, I would like to stop accepting non-bug-fix patches for v4.20 and get the last pull requests posted by the end of this week. This is in order for them to be sent before the release of v4.19-rc6, the deadline set by the ARM SoC maintainers. As patches should ideally progress from the renesas tree into linux-next before sending pull requests there is a few days lead time involved. I intend to begin queueing up patches for v4.21 as they are ready.
Re: [PATCH/RFT] arm64: dts: renesas: r8a77965: Add Sound and Audio DMAC device nodes
On Mon, Sep 24, 2018 at 02:26:25PM +0200, Simon Horman wrote: > On Thu, Jul 26, 2018 at 05:39:50AM +0900, Yoshihiro Kaneko wrote: > > From: Takeshi Kihara > > > > Based on a similar patch of the R8A7796 device tree > > by Kuninori Morimoto . > > > > Signed-off-by: Takeshi Kihara > > Signed-off-by: Yoshihiro Kaneko > > --- > > > > The following patches were squashed into this patch: > > > > arm64: dts: r8a77965: Add Audio-DMAC device nodes > > arm64: dts: r8a77965: Add Sound device node and SSI support > > arm64: dts: r8a77965: Add Sound SRC support > > arm64: dts: r8a77965: Add Sound DVC device nodes > > arm64: dts: r8a77965: Add Sound CTU support > > arm64: dts: r8a77965: Add Sound MIX support > > > > This patch is based on the devel branch of Simon Horman's renesas tree. > > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi | 245 > > -- > > 1 file changed, 234 insertions(+), 11 deletions(-) > > I have tested playback and record using a loopback cable and this patce > appears to work well on top of a merge of: > > * renesas-devel-20180919-v4.19-rc4 > * renesas-drivers-2018-09-11-v4.19-rc3 > > I plan to accept this patch for v4.20 in the coming days if there are no > objections. I have now applied this for v4.20. > Tested-by: Simon Horman Testing was on a Salvator-XS board.
Re: [PATCH v3 2/4] arm64: dts: renesas: r8a77995: Add LVDS support
On Wed, Sep 26, 2018 at 12:46:12PM +0300, Sergei Shtylyov wrote:
> On 9/26/2018 12:13 PM, Simon Horman wrote:
>
> > > > From: Kieran Bingham
> > > >
> > > > The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
> > > >
> > > > Signed-off-by: Kieran Bingham
> > > > [uli: moved lvds* into the soc node, added PM domains, resets]
> > > > Signed-off-by: Ulrich Hecht
> > > > Reviewed-by: Laurent Pinchart
> > > > Tested-by: Jacopo Mondi
> > > > ---
> > > >arch/arm64/boot/dts/renesas/r8a77995.dtsi | 56
> > > > +++
> > > >1 file changed, 56 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > > b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > > index 89a04a4496fd..214f4954b321 100644
> > > > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > > > @@ -972,12 +972,68 @@
> > > > port@1 {
> > > > reg = <1>;
> > > > du_out_lvds0: endpoint {
> > > > + remote-endpoint =
> > > > <_in>;
> > > > };
> > > > };
> > > > port@2 {
> > > > reg = <2>;
> > > > du_out_lvds1: endpoint {
> > > > + remote-endpoint =
> > > > <_in>;
> > > > + };
> > > > + };
> > > > + };
> > > > + };
> > > > +
> > > > + lvds0: lvds-encoder@feb9 {
> > > > + compatible = "renesas,r8a77995-lvds";
> > > > + reg = <0 0xfeb9 0 0x20>;
> > > > + clocks = < CPG_MOD 727>;
> > > > + power-domains = < R8A77995_PD_ALWAYS_ON>;
> > > > + resets = < 727>;
> > > > + status = "disabled";
> > > > +
> > > > + ports {
> > > > + #address-cells = <1>;
> > > > + #size-cells = <0>;
> > > > +
> > > > + port@0 {
> > > > + reg = <0>;
> > > > + lvds0_in: endpoint {
> > > > + remote-endpoint =
> > > > <_out_lvds0>;
> > > > + };
> > > > + };
> > > > +
> > > > + port@1 {
> > > > + reg = <1>;
> > > > + lvds0_out: endpoint {
> > > > + };
> > > > + };
> > > > + };
> > > > + };
> > > > +
> > > > + lvds1: lvds-encoder@feb90100 {
> > > > + compatible = "renesas,r8a77995-lvds";
> > > > + reg = <0 0xfeb90100 0 0x20>;
> > > > + clocks = < CPG_MOD 727>;
> > >
> > > Not 726?
> > >
> > > > + power-domains = < R8A77995_PD_ALWAYS_ON>;
> > > > + resets = < 726>;
> > >
> > > ... like here?
> >
> > I believe that discussion was already had for v2 of the similar patch
> > for r8a77990 and that it is intentional.
>
>Ah, sorry, missed that. Still looks like a documentation error... :-)
Yes, that is my understanding too.
RE: [PATCH] ARM: dts: iwg20d-q7-dbcm-ca: Improve model string
> Subject: [PATCH] ARM: dts: iwg20d-q7-dbcm-ca: Improve model string
>
> Update the model string for this platform configuration and fix the
> grammar at the same time.
>
> This brings the syntax in line with the RZ/G1E iWave board.
>
> Signed-off-by: Chris Paterson
Reviewed-by: Fabrizio Castro
> ---
> Perhaps this patch isn't really needed, but the current string annoys me.
>
> Patch applies cleanly to renesas-devel-20180925-v4.19-rc5.
> ---
> arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> index 0d006aea99da1b40..6811ddc4af6460ce 100644
> --- a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> +++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
> @@ -11,7 +11,7 @@
> #include "iwg20d-q7-dbcm-ca.dtsi"
>
> / {
> -model = "iW-RainboW-G20D-Q7 RZ/G1M based plus camera daughter board";
> +model = "iWave RainboW-G20D-Q7 RZ/G1M based board with camera add-on";
> compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
> };
>
> --
> 1.9.1
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH] ARM: dts: iwg20d-q7-dbcm-ca: Improve model string
Update the model string for this platform configuration and fix the
grammar at the same time.
This brings the syntax in line with the RZ/G1E iWave board.
Signed-off-by: Chris Paterson
---
Perhaps this patch isn't really needed, but the current string annoys me.
Patch applies cleanly to renesas-devel-20180925-v4.19-rc5.
---
arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
index 0d006aea99da1b40..6811ddc4af6460ce 100644
--- a/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
+++ b/arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts
@@ -11,7 +11,7 @@
#include "iwg20d-q7-dbcm-ca.dtsi"
/ {
- model = "iW-RainboW-G20D-Q7 RZ/G1M based plus camera daughter board";
+ model = "iWave RainboW-G20D-Q7 RZ/G1M based board with camera add-on";
compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743";
};
--
1.9.1
Re: [PATCH v3 2/4] arm64: dts: renesas: r8a77995: Add LVDS support
On 9/26/2018 12:13 PM, Simon Horman wrote:
From: Kieran Bingham
The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
Signed-off-by: Kieran Bingham
[uli: moved lvds* into the soc node, added PM domains, resets]
Signed-off-by: Ulrich Hecht
Reviewed-by: Laurent Pinchart
Tested-by: Jacopo Mondi
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 56
+++
1 file changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 89a04a4496fd..214f4954b321 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -972,12 +972,68 @@
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
+ remote-endpoint = <_in>;
};
};
port@2 {
reg = <2>;
du_out_lvds1: endpoint {
+ remote-endpoint = <_in>;
+ };
+ };
+ };
+ };
+
+ lvds0: lvds-encoder@feb9 {
+ compatible = "renesas,r8a77995-lvds";
+ reg = <0 0xfeb9 0 0x20>;
+ clocks = < CPG_MOD 727>;
+ power-domains = < R8A77995_PD_ALWAYS_ON>;
+ resets = < 727>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ lvds0_in: endpoint {
+ remote-endpoint =
<_out_lvds0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ lvds0_out: endpoint {
+ };
+ };
+ };
+ };
+
+ lvds1: lvds-encoder@feb90100 {
+ compatible = "renesas,r8a77995-lvds";
+ reg = <0 0xfeb90100 0 0x20>;
+ clocks = < CPG_MOD 727>;
Not 726?
+ power-domains = < R8A77995_PD_ALWAYS_ON>;
+ resets = < 726>;
... like here?
I believe that discussion was already had for v2 of the similar patch
for r8a77990 and that it is intentional.
Ah, sorry, missed that. Still looks like a documentation error... :-)
MBR, Sergei
Re: [PATCH v2 3/3] clk: renesas: r7s9210: Move table update to separate function
On Mon, Sep 24, 2018 at 6:50 PM Chris Brandt wrote:
> Same functionality, just easier to read.
>
> Signed-off-by: Chris Brandt
> ---
> drivers/clk/renesas/r7s9210-cpg-mssr.c | 94
> ++
> 1 file changed, 49 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c
> b/drivers/clk/renesas/r7s9210-cpg-mssr.c
> index 7ab9030ef8b9..f9c22b61883b 100644
> --- a/drivers/clk/renesas/r7s9210-cpg-mssr.c
> +++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c
> @@ -97,6 +97,53 @@ static const struct mssr_mod_clk r7s9210_mod_clks[]
> __initconst = {
>
> };
>
> +/* The clock dividers in the table vary based on DT and register settings */
> +static void r7s9210_update_clk_table(struct clk *extal_clk, void __iomem
> *base)
Can be __init.
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v4.20, with the above fixed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 2/3] clk: renesas: r7s9210: Convert some clocks to early
On Mon, Sep 24, 2018 at 6:50 PM Chris Brandt wrote:
> The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
> ostm module clocks to be registers early in boot.
>
> Signed-off-by: Chris Brandt
> ---
> v2:
> * List early clocks first
> * Remove unnecessary comments
> * Removed new function r7s9210_update_clk_table (to be included in a
>separate patch)
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v4.20.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 1/3] clk: renesas: cpg-mssr: Add early clock support
Hi Chris,
On Mon, Sep 24, 2018 at 6:50 PM Chris Brandt wrote:
> Add support for SoCs that need to register core and module clocks early in
> order to use OF drivers that exclusively use macros such as
> TIMER_OF_DECLARE.
>
> Signed-off-by: Chris Brandt
> ---
> v2:
> * List early clocks first
> * Renamed early_priv to cpg_mssr_priv and make it static
> * Always set cpg_mssr_priv(early_priv) because it is used for early and
>non-early cases.
> * of_iomap returns NULL on error, not negative number
> * Removed various unnecessary comments
> * Add __init to cpg_mssr_common_init
> * fixed dev_set_drvdata was not being called for early drivers
Thanks for the update!
Works fine on R-Car Gen2 and Gen3.
> --- a/drivers/clk/renesas/renesas-cpg-mssr.c
> +++ b/drivers/clk/renesas/renesas-cpg-mssr.c
> @@ -877,42 +879,43 @@ static const struct dev_pm_ops cpg_mssr_pm = {
> #define DEV_PM_OPS NULL
> #endif /* CONFIG_PM_SLEEP && CONFIG_ARM_PSCI_FW */
>
> -static int __init cpg_mssr_probe(struct platform_device *pdev)
> +static int __init cpg_mssr_common_init(struct device *dev,
> + struct device_node *np,
> + const struct cpg_mssr_info *info)
> {
> - struct device *dev = >dev;
> - struct device_node *np = dev->of_node;
> - const struct cpg_mssr_info *info;
> struct cpg_mssr_priv *priv;
> unsigned int nclks, i;
> - struct resource *res;
> struct clk **clks;
In v1, you initialized clks to NULL, which was needed ...
> int error;
>
> - info = of_device_get_match_data(dev);
> if (info->init) {
> error = info->init(dev);
> if (error)
> return error;
> }
>
> - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + priv = kzalloc(sizeof(*priv), GFP_KERNEL);
> if (!priv)
> return -ENOMEM;
>
> + priv->np = np;
> priv->dev = dev;
> spin_lock_init(>rmw_lock);
>
> - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - priv->base = devm_ioremap_resource(dev, res);
> - if (IS_ERR(priv->base))
> - return PTR_ERR(priv->base);
> + priv->base = of_iomap(np, 0);
> + if (!priv->base) {
> + error = -ENOMEM;
> + goto out_err;
... because else it's still uninitialized here ...
> + }
>
> nclks = info->num_total_core_clks + info->num_hw_mod_clks;
> - clks = devm_kmalloc_array(dev, nclks, sizeof(*clks), GFP_KERNEL);
> - if (!clks)
> - return -ENOMEM;
> + clks = kmalloc_array(nclks, sizeof(*clks), GFP_KERNEL);
> + if (!clks) {
> + error = -ENOMEM;
> + goto out_err;
> + }
>
> - dev_set_drvdata(dev, priv);
> + cpg_mssr_priv = priv;
> priv->clks = clks;
> priv->num_core_clks = info->num_total_core_clks;
> priv->num_mod_clks = info->num_hw_mod_clks;
> @@ -923,16 +926,68 @@ static int __init cpg_mssr_probe(struct platform_device
> *pdev)
> for (i = 0; i < nclks; i++)
> clks[i] = ERR_PTR(-ENOENT);
>
> + error = of_clk_add_provider(np, cpg_mssr_clk_src_twocell_get, priv);
> + if (error)
> + goto out_err;
> +
> + return 0;
> +
> +out_err:
> + kfree(clks);
... and freed here.
> + if (priv->base)
> + iounmap(priv->base);
> + kfree(priv);
> +
> + return error;
> +}
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v4.20, with the above fixed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v3 0/4] R-Car D3/E3 display DT enablement
On Tue, Sep 25, 2018 at 07:33:33PM +0300, Laurent Pinchart wrote: > Hello, > > The patches in this series enable display support for the D3 and E3 SoCs, on > the Draak and Ebisu boards respectively. They were previously part of the > "[PATCH v2 00/16] R-Car D3/E3 display support (with LVDS PLL)" series, and > have been split out now that the DT bindings have been accepted andon their > way to v4.20 through the DRM tree, along with the code changes. > > Compared to v2, the VSPI MSTP clock index has been fixed, and the > patches rebased on top of Simon's latest devel branch. > > Simon, could you please consider this as an update for v4.20 ? Thanks, applied for v4.20.
Re: [PATCH v3 2/4] arm64: dts: renesas: r8a77995: Add LVDS support
On Wed, Sep 26, 2018 at 11:27:53AM +0300, Sergei Shtylyov wrote:
> On 9/25/2018 7:33 PM, Laurent Pinchart wrote:
>
> > From: Kieran Bingham
> >
> > The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
> >
> > Signed-off-by: Kieran Bingham
> > [uli: moved lvds* into the soc node, added PM domains, resets]
> > Signed-off-by: Ulrich Hecht
> > Reviewed-by: Laurent Pinchart
> > Tested-by: Jacopo Mondi
> > ---
> > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 56
> > +++
> > 1 file changed, 56 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > index 89a04a4496fd..214f4954b321 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> > @@ -972,12 +972,68 @@
> > port@1 {
> > reg = <1>;
> > du_out_lvds0: endpoint {
> > + remote-endpoint = <_in>;
> > };
> > };
> > port@2 {
> > reg = <2>;
> > du_out_lvds1: endpoint {
> > + remote-endpoint = <_in>;
> > + };
> > + };
> > + };
> > + };
> > +
> > + lvds0: lvds-encoder@feb9 {
> > + compatible = "renesas,r8a77995-lvds";
> > + reg = <0 0xfeb9 0 0x20>;
> > + clocks = < CPG_MOD 727>;
> > + power-domains = < R8A77995_PD_ALWAYS_ON>;
> > + resets = < 727>;
> > + status = "disabled";
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + lvds0_in: endpoint {
> > + remote-endpoint =
> > <_out_lvds0>;
> > + };
> > + };
> > +
> > + port@1 {
> > + reg = <1>;
> > + lvds0_out: endpoint {
> > + };
> > + };
> > + };
> > + };
> > +
> > + lvds1: lvds-encoder@feb90100 {
> > + compatible = "renesas,r8a77995-lvds";
> > + reg = <0 0xfeb90100 0 0x20>;
> > + clocks = < CPG_MOD 727>;
>
>Not 726?
>
> > + power-domains = < R8A77995_PD_ALWAYS_ON>;
> > + resets = < 726>;
>
>... like here?
I believe that discussion was already had for v2 of the similar patch
for r8a77990 and that it is intentional.
Re: [PATCH] dt-bindings: thermal: rcar: Add device tree support for r8a7744
On Tue, Sep 25, 2018 at 06:01:04PM +0100, Biju Das wrote: > Add thermal sensor support for r8a7744 SoC. The Renesas RZ/G1N > (r8a7744) thermal sensor module is identical to the R-Car Gen2 family. > > No driver change is needed due to the fallback compatible value > "renesas,rcar-gen2-thermal". > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson Reviewed-by: Simon Horman
Re: [PATCH] dt-bindings: mmc: sh_mmcif: Document r8a7744 DT bindings
On Tue, Sep 25, 2018 at 06:27:24PM +0100, Biju Das wrote: > Add support for r8a7744 SoC. Renesas RZ/G1N (R8A7744) MMCIF is identical > to the R-Car Gen2 family. > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson Reviewed-by: Simon Horman
Re: [PATCH] dt-bindings: mmc: renesas_sdhi: Add r8a7744 support
On Tue, Sep 25, 2018 at 06:23:07PM +0100, Biju Das wrote: > Add support for r8a7744 SoC. Renesas RZ/G1N (R8A7744) SDHI is identical > to the R-Car Gen2 family. > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson Reviewed-by: Simon Horman
Re: [PATCH] dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
On Tue, Sep 25, 2018 at 06:18:16PM +0100, Biju Das wrote: > Document SoC specific compatible strings for r8a7744. No driver change > is needed as the fallback strings will activate the right code. > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson Reviewed-by: Simon Horman
Re: [PATCH] dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
On Tue, Sep 25, 2018 at 06:07:21PM +0100, Biju Das wrote: > RZ/G1N (R8A7744) watchdog implementation is compatible with R-Car > Gen2, therefore add relevant documentation. > > Signed-off-by: Biju Das > Reviewed-by: Chris Paterson Reviewed-by: Simon Horman
[PATCH] ARM: shmobile: Document iWave RZ/G1N SOM
Document the iW-RainboW-G20M-RZ/G1N Qseven device tree bindings, listing it as a supported system on module. Signed-off-by: Biju Das Reviewed-by: Chris Paterson --- iWave uses the same "iW-RainboW-G20M-Qseven" name for both iWave-RZ/G1N and iWave-RZ/G1M Q7 SOM. Details can be found in the below link https://www.iwavesystems.com/rz-g1m-qseven-module.html --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index f5e0f82..4cfb567 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -101,6 +101,8 @@ Boards: compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743" - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven) compatible = "iwave,g20m", "renesas,r8a7743" + - iWave Systems RZ/G1N Qseven System On Module (iW-RainboW-G20M-Qseven) +compatible = "iwave,g20m", "renesas,r8a7744" - Kingfisher (SBEV-RCAR-KF-M03) compatible = "shimafuji,kingfisher" - Koelsch (RTP0RC7791SEB00010S) -- 2.7.4
Re: [PATCH v3 2/4] arm64: dts: renesas: r8a77995: Add LVDS support
On 9/25/2018 7:33 PM, Laurent Pinchart wrote:
From: Kieran Bingham
The r8a77995 D3 platform has 2 LVDS channels connected to the DU.
Signed-off-by: Kieran Bingham
[uli: moved lvds* into the soc node, added PM domains, resets]
Signed-off-by: Ulrich Hecht
Reviewed-by: Laurent Pinchart
Tested-by: Jacopo Mondi
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 56 +++
1 file changed, 56 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 89a04a4496fd..214f4954b321 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -972,12 +972,68 @@
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
+ remote-endpoint = <_in>;
};
};
port@2 {
reg = <2>;
du_out_lvds1: endpoint {
+ remote-endpoint = <_in>;
+ };
+ };
+ };
+ };
+
+ lvds0: lvds-encoder@feb9 {
+ compatible = "renesas,r8a77995-lvds";
+ reg = <0 0xfeb9 0 0x20>;
+ clocks = < CPG_MOD 727>;
+ power-domains = < R8A77995_PD_ALWAYS_ON>;
+ resets = < 727>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ lvds0_in: endpoint {
+ remote-endpoint =
<_out_lvds0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ lvds0_out: endpoint {
+ };
+ };
+ };
+ };
+
+ lvds1: lvds-encoder@feb90100 {
+ compatible = "renesas,r8a77995-lvds";
+ reg = <0 0xfeb90100 0 0x20>;
+ clocks = < CPG_MOD 727>;
Not 726?
+ power-domains = < R8A77995_PD_ALWAYS_ON>;
+ resets = < 726>;
... like here?
[...]
MBR, Sergei
