Re: [GIT PULL 2/3] Samsung dt-2 for v3.8
On Fri, Nov 23, 2012 at 10:37:20AM +0900, Kukjin Kim wrote: Arnd, Olof, Here is second Samsung DT stuff for v3.8. This is including power domain DT support for exynos and Google ARM Chromebook, Snow board and exynos4210-origen updates. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/dt-samsung-2 Pulled in as samsung/dt2 -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 3/3] Samsung exynos5440 for v3.8
On Fri, Nov 23, 2012 at 10:37:03AM +0900, Kukjin Kim wrote: Arnd, Olof, This is adding support for exynos5440, including Quad ARM Cortex-A15 cores and its reference board SSDK5440. Note, at this moment, just enabled minimal system part for initial kernel boot and pinctrl driver. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/soc-exynos5440 Merged. This caused some new conflicts with previous samsung contents, since you add DT contents in several branches, etc. Please try to work on getting your amount of conflicts down a bit. If you want a good example to look at, see how Tony Lindgren handles OMAP. He's juggling a large number of topics with nearly no conflicts left for us to resolve at our level, by making sure new work is based on appropriate base branches. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: S3C2443: introduce soc_is_s3c2443 macro
Signed-off-by: Alexander Varnin fenix...@mail.ru --- arch/arm/plat-samsung/include/plat/cpu.h | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index ace4451..613f492 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -23,6 +23,9 @@ extern unsigned long samsung_cpu_id; #define S3C24XX_CPU_ID 0x3240 #define S3C24XX_CPU_MASK 0xFFF0 +#define S3C2443_CPU_ID 0x32443001 +#define S3C2443_CPU_MASK 0x + #define S3C6400_CPU_ID 0x3640 #define S3C6410_CPU_ID 0x3641 #define S3C64XX_CPU_MASK 0xF000 @@ -52,6 +55,7 @@ static inline int is_samsung_##name(void) \ } IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) +IS_SAMSUNG_CPU(s3c2443, S3C2443_CPU_ID, S3C2443_CPU_MASK) IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK) @@ -72,6 +76,12 @@ IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) # define soc_is_s3c24xx() 0 #endif +#if defined(CONFIG_CPU_S3C2443) +# define soc_is_s3c2443() is_samsung_s3c2443() +#else +# define soc_is_s3c2443() 0 +#endif + #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) # define soc_is_s3c64xx() (is_samsung_s3c6400() || is_samsung_s3c6410()) #else -- 1.7.2.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/plat-s3c24xx/irq.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..bb36fc9 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,21 @@ s3c_irqext_type(struct irq_data *data, unsigned int type)
}
value = __raw_readl(extint_reg);
+
+ if( (samsung_cpu_id 0xf) == 0x43001) //Hack for 2443 error
workaround
+ {
+ int i;
+ int fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg == S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) | ((value
((7-i)*4-3)) 8)) i*4;
+ else
+ for(i=0; i7;i++)
+ fixed |= ( (value (7-i)*4) 0xf ) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue extint_offset);
__raw_writel(value, extint_reg);
--
1.7.2.5
--
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Re: [PATCH 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
Sorry, an old version.
26.11.2012 12:40, Alexander Varnin пишет:
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/plat-s3c24xx/irq.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..bb36fc9 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,21 @@ s3c_irqext_type(struct irq_data *data, unsigned int type)
}
value = __raw_readl(extint_reg);
+
+ if( (samsung_cpu_id 0xf) == 0x43001) //Hack for 2443 error
workaround
+ {
+ int i;
+ int fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg == S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) | ((value ((7-i)*4-3))
8)) i*4;
+ else
+ for(i=0; i7;i++)
+ fixed |= ( (value (7-i)*4) 0xf ) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue extint_offset);
__raw_writel(value, extint_reg);
--
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[PATCH 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/plat-s3c24xx/irq.c | 26 ++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..ed19996 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,32 @@ s3c_irqext_type(struct irq_data *data, unsigned int type)
}
value = __raw_readl(extint_reg);
+
+ /*
+ * S3C2443 CPU has a problem with EXTINTn registers.
+ * Essentially register-reads returned transformed data, but the write
+ * is done according to the datasheet.
+ *
+ * There is hack introduced for 2443 error workaround.
+ *
+ * For detais refer to the document S3C2443 GUIDE TO EXTRA GPIO found
on the web.
+ *
+ * A. Varnin fenix...@mail.ru
+ */
+ if(soc_is_s3c2443())
+ {
+ int i;
+ int fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg ==
S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) |
((value ((7-i)*4-3)) 8)) i*4;
+ else
+ for(i=0; i7;i++)
+ fixed |= ( (value (7-i)*4) 0xf ) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue extint_offset);
__raw_writel(value, extint_reg);
--
1.7.2.5
--
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Re: DMABUF V4L2 patches got merged
Hi Aditya. FYI, just in case you have not seen this email. Thanks, Thomas. On 26 November 2012 01:32, Mauro Carvalho Chehab mche...@redhat.com wrote: Hi all, Today, I finally merged the DMABUF V4L2 patches from Tomasz. The DMABUF allows replacing the old V4L2 Overlay method by something more robust and safer. It was a long road to get them ready for their upstream inclusion, and to be able to test on both embedded and personal computers. Along this weekend, I was able to test it using 4 different test scenarios: - vivi + s5p-tv; - uvcvideo + fimc (m2m) + s5p-tv; - s5k4ecgx + fimc (m2m) + s5p-tv; - uvcvideo + i915. The first 3 tests ran on a Samsung Origen Rev. A board; the 4th one on a notebook, with a Sandy Bridge i5core processor with GPU, and an embedded UVC camera. While testing the s5k4ecgx sensor driver, I also added support for multiplane at libv4l, via its plugin interface: http://git.linuxtv.org/v4l-utils.git/commit/ced1be346fe4f61c864cba9d81f66089d4e32a56 Such tests wouldn't be possible without the help of Linaro and Samsung, with donated me some hardware for the tests, and Ideas on Board for making uvcvideo + i915 driver to work especially for this test. Thank you all for your support! In particular, Sylwester helped me a lot to fix several non-related issues with the Origen board, that was not running with an upstream Kernel. There are a number of patches required to make the Origen board to work with an Upstream Kernel. Also, its sensor driver (s5k4ecgx) was not submitted upstream yet. In order to help others that may need to do similar tests, I added the needed patches on my experimental tree, at branch origen+dmabuf: http://git.linuxtv.org/mchehab/experimental.git/shortlog/refs/heads/origen%2Bdmabuf Still missing there are the wireless/bluetooth support. It seems that there are some patches for it already, but they aren't submitted upstream, nor I didn't test they. I expect that Linaro and Samsung will be able to submit real soon the pending patches needed by Origen in time for its addition on 3.8. Thank you all! Mauro -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: S3C2443: introduce soc_is_s3c2443 macro
Am Montag, 26. November 2012, 09:40:02 schrieb Alexander Varnin: Signed-off-by: Alexander Varnin fenix...@mail.ru Acked-by: Heiko Stuebner he...@sntech.de --- arch/arm/plat-samsung/include/plat/cpu.h | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index ace4451..613f492 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -23,6 +23,9 @@ extern unsigned long samsung_cpu_id; #define S3C24XX_CPU_ID 0x3240 #define S3C24XX_CPU_MASK 0xFFF0 +#define S3C2443_CPU_ID 0x32443001 +#define S3C2443_CPU_MASK 0x + #define S3C6400_CPU_ID 0x3640 #define S3C6410_CPU_ID 0x3641 #define S3C64XX_CPU_MASK 0xF000 @@ -52,6 +55,7 @@ static inline int is_samsung_##name(void) \ } IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) +IS_SAMSUNG_CPU(s3c2443, S3C2443_CPU_ID, S3C2443_CPU_MASK) IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK) @@ -72,6 +76,12 @@ IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) # define soc_is_s3c24xx() 0 #endif +#if defined(CONFIG_CPU_S3C2443) +# define soc_is_s3c2443()is_samsung_s3c2443() +#else +# define soc_is_s3c2443()0 +#endif + #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) # define soc_is_s3c64xx()(is_samsung_s3c6400() || is_samsung_s3c6410()) #else -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
Hi Alexander,
I think this patch needs a bit more love :-) .
Please run scripts/checkpatch.pl on it and fix all the reported problems.
And I'd change the comment to something like:
/*
* S3C2443 CPU has a problem with EXTINTn registers.
* Essentially register-reads return transformed data, but the write
* is done according to the datasheet.
*
* Fix this by transforming the read data to the correct format.
*
* For details refer to the document S3C2443 GUIDE TO EXTRA GPIO
*/
Especially the mail address does not need to be in the code - the git history
preserves the committer identity quite well.
Heiko
Am Montag, 26. November 2012, 09:44:41 schrieb Alexander Varnin:
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/plat-s3c24xx/irq.c | 26 ++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..ed19996 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,32 @@ s3c_irqext_type(struct irq_data *data, unsigned int
type) }
value = __raw_readl(extint_reg);
+
+ /*
+ * S3C2443 CPU has a problem with EXTINTn registers.
+ * Essentially register-reads returned transformed data, but the write
+ * is done according to the datasheet.
+ *
+ * There is hack introduced for 2443 error workaround.
+ *
+ * For detais refer to the document S3C2443 GUIDE TO EXTRA GPIO found
on
the web. +*
+ * A. Varnin fenix...@mail.ru
+ */
+ if(soc_is_s3c2443())
+ {
+ int i;
+ int fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg ==
S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) |
((value ((7-
i)*4-3))
8)) i*4; + else
+ for(i=0; i7;i++)
+ fixed |= ( (value (7-i)*4) 0xf ) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue extint_offset);
__raw_writel(value, extint_reg);
--
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Re: [PATCH 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
Is it ok, to send only one last patch after changes, without the one,
who make macro?
26.11.2012 13:12, Heiko Stübner пишет:
Hi Alexander,
I think this patch needs a bit more love :-) .
Please run scripts/checkpatch.pl on it and fix all the reported problems.
And I'd change the comment to something like:
/*
* S3C2443 CPU has a problem with EXTINTn registers.
* Essentially register-reads return transformed data, but the write
* is done according to the datasheet.
*
* Fix this by transforming the read data to the correct format.
*
* For details refer to the document S3C2443 GUIDE TO EXTRA GPIO
*/
Especially the mail address does not need to be in the code - the git history
preserves the committer identity quite well.
Heiko
Am Montag, 26. November 2012, 09:44:41 schrieb Alexander Varnin:
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/plat-s3c24xx/irq.c | 26 ++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..ed19996 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,32 @@ s3c_irqext_type(struct irq_data *data, unsigned int
type) }
value = __raw_readl(extint_reg);
+
+ /*
+ * S3C2443 CPU has a problem with EXTINTn registers.
+ * Essentially register-reads returned transformed data, but the write
+ * is done according to the datasheet.
+ *
+ * There is hack introduced for 2443 error workaround.
+ *
+ * For detais refer to the document S3C2443 GUIDE TO EXTRA GPIO found
on
the web. + *
+ * A. Varnin fenix...@mail.ru
+ */
+ if(soc_is_s3c2443())
+ {
+ int i;
+ int fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg ==
S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) | ((value
((7-
i)*4-3))
8)) i*4; + else
+ for(i=0; i7;i++)
+ fixed |= ( (value (7-i)*4) 0xf ) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue extint_offset);
__raw_writel(value, extint_reg);
--
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Re: [PATCH 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
Am Montag, 26. November 2012, 10:23:17 schrieb Alexander Varnin:
Is it ok, to send only one last patch after changes, without the one,
who make macro?
I'd think so, as this series isn't this big. Just include a version into the
patch subject, i.e.
[PATCH v2 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
to denote the most recent version and include a short summary of the changes
_after_ the --- of the main commit message.
26.11.2012 13:12, Heiko Stübner пишет:
Hi Alexander,
I think this patch needs a bit more love :-) .
Please run scripts/checkpatch.pl on it and fix all the reported problems.
And I'd change the comment to something like:
/*
* S3C2443 CPU has a problem with EXTINTn registers.
* Essentially register-reads return transformed data, but the write
* is done according to the datasheet.
*
* Fix this by transforming the read data to the correct format.
*
* For details refer to the document S3C2443 GUIDE TO EXTRA GPIO
*/
Especially the mail address does not need to be in the code - the git
history preserves the committer identity quite well.
Heiko
Am Montag, 26. November 2012, 09:44:41 schrieb Alexander Varnin:
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
arch/arm/plat-s3c24xx/irq.c | 26 ++
1 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..ed19996 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,32 @@ s3c_irqext_type(struct irq_data *data, unsigned int
type) }
value = __raw_readl(extint_reg);
+
+ /*
+ * S3C2443 CPU has a problem with EXTINTn registers.
+ * Essentially register-reads returned transformed data, but the write
+ * is done according to the datasheet.
+ *
+ * There is hack introduced for 2443 error workaround.
+ *
+ * For detais refer to the document S3C2443 GUIDE TO EXTRA GPIO
found
on the web. + *
+ * A. Varnin fenix...@mail.ru
+ */
+ if(soc_is_s3c2443())
+ {
+ int i;
+ int fixed = 0;
+ if(extint_reg == S3C24XX_EXTINT1 || extint_reg ==
S3C24XX_EXTINT2)
+ for(i=0; i7;i++)
+ fixed |= (((value ((7-i)*4+1)) 7) |
((value ((7-
i)*4-3))
8)) i*4; + else
+ for(i=0; i7;i++)
+ fixed |= ( (value (7-i)*4) 0xf ) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue
extint_offset); __raw_writel(value, extint_reg);
--
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[PATCH v2 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
---
styling and comment fixes
arch/arm/plat-s3c24xx/irq.c | 25 +
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..b05c573 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,31 @@ s3c_irqext_type(struct irq_data *data, unsigned int type)
}
value = __raw_readl(extint_reg);
+
+ /*
+* S3C2443 CPU has a problem with EXTINTn registers.
+* Essentially register-reads return transformed data, but the write
+* is done according to the datasheet.
+*
+* Fix this by transforming the read data to the correct format.
+*
+* For details refer to the document S3C2443 GUIDE TO EXTRA GPIO
+*/
+ if (soc_is_s3c2443()) {
+ int i;
+ int fixed = 0;
+ if (extint_reg == S3C24XX_EXTINT1
+ || extint_reg == S3C24XX_EXTINT2)
+ for (i = 0; i 7; i++)
+ fixed |= (((value ((7-i)*4+1)) 7)
+ | ((value ((7-i)*4-3)) 8)) i*4;
+ else
+ for (i = 0; i 7; i++)
+ fixed |= ((value (7-i)*4) 0xf) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue extint_offset);
__raw_writel(value, extint_reg);
--
1.7.2.5
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Re: [PATCH 3/3] regulator: add device tree support for max8997
On Sat, Nov 24, 2012 at 11:46:51PM +0530, Thomas Abraham wrote: The max8997 driver is mainlined. I actually meant to say that, this v6 version of dt support patch for max8997, is similar in functionality to the v5 version of this patch. I did prepare this patch based on your latest for-next branch. I find it hard to believe that this was generated against for-next, this was where I tried to apply it... signature.asc Description: Digital signature
Re: [PATCH v2 2/2] ARM: S3C2443: Workaround for 2443 EXTINT error
Am Montag, 26. November 2012, 10:43:21 schrieb Alexander Varnin:
S3C2443 CPU has a problem with incorrect reading from EXTINTn
registers. So s3c_irqext_type function wrongly modifies them.
So add special check to s3c_irqext_type, to handle this case.
Signed-off-by: Alexander Varnin fenix...@mail.ru
Acked-by: Heiko Stuebner he...@sntech.de
---
styling and comment fixes
arch/arm/plat-s3c24xx/irq.c | 25 +
1 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index fe57bbb..b05c573 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -219,6 +219,31 @@ s3c_irqext_type(struct irq_data *data, unsigned int
type) }
value = __raw_readl(extint_reg);
+
+ /*
+ * S3C2443 CPU has a problem with EXTINTn registers.
+ * Essentially register-reads return transformed data, but the write
+ * is done according to the datasheet.
+ *
+ * Fix this by transforming the read data to the correct format.
+ *
+ * For details refer to the document S3C2443 GUIDE TO EXTRA GPIO
+ */
+ if (soc_is_s3c2443()) {
+ int i;
+ int fixed = 0;
+ if (extint_reg == S3C24XX_EXTINT1
+ || extint_reg == S3C24XX_EXTINT2)
+ for (i = 0; i 7; i++)
+ fixed |= (((value ((7-i)*4+1)) 7)
+ | ((value ((7-i)*4-3)) 8)) i*4;
+ else
+ for (i = 0; i 7; i++)
+ fixed |= ((value (7-i)*4) 0xf) i*4;
+ fixed |= (((value1) 7) | ((value3) 8)) 27;
+ value = fixed;
+ }
+
value = (value ~(7 extint_offset)) | (newvalue extint_offset);
__raw_writel(value, extint_reg);
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Re: [RFC 1/2] ARM: S3C24XX: add devicetree support for interrupts
Hi Heiko,
On 25 November 2012 06:17, Heiko Stübner he...@sntech.de wrote:
This adds devicetree parsing of the controller-data for the
interrupt controllers on S3C24XX architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../interrupt-controller/samsung,s3c24xx-irq.txt | 57 ++
arch/arm/mach-s3c24xx/common.h |1 +
arch/arm/plat-s3c24xx/irq.c| 197
3 files changed, 255 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt
new file mode 100644
index 000..c637637
--- /dev/null
+++
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt
@@ -0,0 +1,57 @@
+Samsung S3C24XX Interrupt Controllers
+
+The S3C24XX SoCs contain custom set of interrupt controllers providing a
+varying number of interrupt sources.
+
+The set consists of a main- and a sub-controller as well as a controller
+for the external interrupts and on newer SoCs even a second main controller.
+
+The bit-to-interrupt and parent mapping of the controllers is not fixed
+over all SoCs and therefore must be defined in the controller description.
+
+Required properties:
+- compatible: Compatible property value should be samsung,s3c24xx-irq.
+
+- reg: Physical base address of the controller and length of memory mapped
+ region.
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value shall be 2.
+
+- s3c24xx,irqlist : List of irqtypes found on this controller as
+ two-value pairs consisting of irqtype and parent-irq
+
+ parent-irq is always the list position of the irq in the irqlist
+ of the parent controller (0..31)
+
+ irqtypes are:
+ - 0 .. none
+ - 1 .. external interrupts in the main register (GPF0 .. GPF3)
+ - 2 .. edge irq in the main register
+ - 3 .. for parent-irqs, that have sub-irqs in child controllers
+ - 4 .. level irqs in the sub-register
+ - 5 .. edge irqs in the sub-register
+ - 6 .. external irqs in the external irq register (starting with GPF4)
+ - 7 .. irq in the second base irq controller of S3C2416/S3C2450 SoCs
Instead of defining the type of interrupt controller as above, is it
possible to create multiple device nodes, with each node representing
a type of interrupt controller with a unique compatible string and
corresponding properties. There will be a init function for each type
of interrupt controller. There should be a irq-domain for each of
these different types of interrupt controller. And then, in the device
tree source file, a proper tree like hierarchy of interrupt
controllers can defined (using the interrupt-parent property for each
controller node). The client nodes that generate the interrupt can
specify the parent node and the interrupt number within the parent to
which they generate the interrupt.
Thanks,
Thomas.
+
+Optional properties:
+- interrupt_parent : The parent interrupt controller
+
+Example:
+
+ intc2:interrupt-controller@4a40 {
+ compatible = samsung,s3c24xx-irq;
+ reg = 0x4a40 0x18;
+ interrupt-controller;
+ #interrupt-cells = 2;
+
+ s3c24xx,irqlist = 7 0 /* 2D */
+ 7 0 /* IIC1 */
+ 0 0 /* reserved */
+ 0 0 /* reserved */
+ 7 0 /* PCM0 */
+ 7 0 /* PCM1 */
+ 7 0 /* I2S0 */
+ 7 0; /* I2S1 */
+ };
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
index ed6276f..7a7b770 100644
--- a/arch/arm/mach-s3c24xx/common.h
+++ b/arch/arm/mach-s3c24xx/common.h
@@ -16,5 +16,6 @@ void s3c2410_restart(char mode, const char *cmd);
void s3c244x_restart(char mode, const char *cmd);
extern struct syscore_ops s3c24xx_irq_syscore_ops;
+extern void s3c24xx_init_irq_of(void);
#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 0510627..4f8fe4a 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -25,6 +25,9 @@
#include linux/slab.h
#include linux/irqdomain.h
+#include linux/of.h
+#include linux/of_irq.h
+#include linux/of_address.h
#include asm/irq.h
#include asm/mach/irq.h
@@ -956,3 +959,197 @@ void __init s3c2443_init_irq(void)
s3c24xx_init_irq();
}
#endif
+
+#ifdef CONFIG_OF
+static int __init s3c24xx_init_intc_of(struct device_node *np,
+
Re: [PATCH] ARM: Exynos: Remove unused non-dt support for dwmci controller
On 11/26/12, Thomas Abraham thomas.abra...@linaro.org wrote:
With device tree support enabled for dwmci controller, the unused non-dt
support
for dwmci controller can be removed.
Are there no problem to use legacy board? e.g., universal_c210.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/mach-exynos/Makefile |1 -
arch/arm/mach-exynos/dev-dwmci.c | 75
-
arch/arm/mach-exynos/include/mach/dwmci.h | 20
3 files changed, 0 insertions(+), 96 deletions(-)
delete mode 100644 arch/arm/mach-exynos/dev-dwmci.c
delete mode 100644 arch/arm/mach-exynos/include/mach/dwmci.h
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index c12ed6a..b189881 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -50,7 +50,6 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) +=
mach-exynos5-dt.o
obj-y+= dev-uart.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
-obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
diff --git a/arch/arm/mach-exynos/dev-dwmci.c
b/arch/arm/mach-exynos/dev-dwmci.c
deleted file mode 100644
index 7903501..000
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/dev-dwmci.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Platform device for Synopsys DesignWare Mobile Storage IP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include linux/kernel.h
-#include linux/dma-mapping.h
-#include linux/platform_device.h
-#include linux/interrupt.h
-#include linux/ioport.h
-#include linux/mmc/dw_mmc.h
-
-#include plat/devs.h
-
-#include mach/map.h
-
-static int exynos4_dwmci_get_bus_wd(u32 slot_id)
-{
- return 4;
-}
-
-static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void
*data)
-{
- return 0;
-}
-
-static struct resource exynos4_dwmci_resource[] = {
- [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
- [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
-};
-
-static struct dw_mci_board exynos4_dwci_pdata = {
- .num_slots = 1,
- .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
- .bus_hz = 80 * 1000 * 1000,
- .detect_delay_ms= 200,
- .init = exynos4_dwmci_init,
- .get_bus_wd = exynos4_dwmci_get_bus_wd,
-};
-
-static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device exynos4_device_dwmci = {
- .name = dw_mmc,
- .id = -1,
- .num_resources = ARRAY_SIZE(exynos4_dwmci_resource),
- .resource = exynos4_dwmci_resource,
- .dev= {
- .dma_mask = exynos4_dwmci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = exynos4_dwci_pdata,
- },
-};
-
-void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd)
-{
- struct dw_mci_board *npd;
-
- npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
- exynos4_device_dwmci);
-
- if (!npd-init)
- npd-init = exynos4_dwmci_init;
- if (!npd-get_bus_wd)
- npd-get_bus_wd = exynos4_dwmci_get_bus_wd;
-}
diff --git a/arch/arm/mach-exynos/include/mach/dwmci.h
b/arch/arm/mach-exynos/include/mach/dwmci.h
deleted file mode 100644
index 7ce6574..000
--- a/arch/arm/mach-exynos/include/mach/dwmci.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/dwmci.h
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * Synopsys DesignWare Mobile Storage for EXYNOS4210
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARM_ARCH_DWMCI_H
-#define __ASM_ARM_ARCH_DWMCI_H __FILE__
-
-#include linux/mmc/dw_mmc.h
-
-extern void exynos4_dwmci_set_platdata(struct dw_mci_board *pd);
-
-#endif /* __ASM_ARM_ARCH_DWMCI_H */
--
1.7.5.4
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[PATCH] ARM: dts: add initial dts file for ORIGEN4QUAD
From: Kyuho Choi kh.c...@insignal.co.kr
This patch adds initial dts file for ORIGEN4QUAD board.
ORIGEN4QUAD board based on Samsung EXYNOS4412 SoC.
More properties will be added later.
Signed-off-by: Kyuho Choi kh.c...@insignal.co.kr
---
arch/arm/boot/dts/exynos4412-origen4quad.dts | 45 ++
1 files changed, 45 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos4412-origen4quad.dts
diff --git a/arch/arm/boot/dts/exynos4412-origen4quad.dts
b/arch/arm/boot/dts/exynos4412-origen4quad.dts
new file mode 100644
index 000..390a2ab
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-origen4quad.dts
@@ -0,0 +1,45 @@
+/*
+ * Samsung's Exynos4412 based Origen4Quad board device tree source
+ *
+ * Copyright (c) 2012-2013 Isnignal Co., Ltd.
+ * http://www.insignal.co.kr
+ *
+ * Device tree source file for Insignal's Origen4Quad board which is based on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ exynos4412.dtsi
+
+/ {
+ model = Insignal Origen4Quad board based on Exynos4412;
+ compatible = insignal,origen4quad, samsung,exynos4412;
+
+ memory {
+ reg = 0x4000 0x4000;
+ };
+
+ chosen {
+ bootargs =root=/dev/ram0 rw ramdisk=32768
initrd=0x4100,32M console=ttySAC2,115200 init=/linuxrc;
+ };
+
+ serial@1380 {
+ status = okay;
+ };
+
+ serial@1381 {
+ status = okay;
+ };
+
+ serial@1382 {
+ status = okay;
+ };
+
+ serial@1383 {
+ status = okay;
+ };
+};
--
1.7.5.4
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Re: [PATCH] ARM: dts: add initial dts file for ORIGEN4QUAD
Hi,
On 11/26/12, chlrb...@gmail.com chlrb...@gmail.com wrote:
From: Kyuho Choi kh.c...@insignal.co.kr
This patch adds initial dts file for ORIGEN4QUAD board.
ORIGEN4QUAD board based on Samsung EXYNOS4412 SoC.
More properties will be added later.
Signed-off-by: Kyuho Choi kh.c...@insignal.co.kr
---
arch/arm/boot/dts/exynos4412-origen4quad.dts | 45
++
1 files changed, 45 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos4412-origen4quad.dts
diff --git a/arch/arm/boot/dts/exynos4412-origen4quad.dts
b/arch/arm/boot/dts/exynos4412-origen4quad.dts
new file mode 100644
index 000..390a2ab
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-origen4quad.dts
@@ -0,0 +1,45 @@
+/*
+ * Samsung's Exynos4412 based Origen4Quad board device tree source
+ *
+ * Copyright (c) 2012-2013 Isnignal Co., Ltd.
+ * http://www.insignal.co.kr
+ *
+ * Device tree source file for Insignal's Origen4Quad board which is based
on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ exynos4412.dtsi
+
+/ {
+ model = Insignal Origen4Quad board based on Exynos4412;
+ compatible = insignal,origen4quad, samsung,exynos4412;
+
+ memory {
+ reg = 0x4000 0x4000;
+ };
does it test to boot with this dts file?
does it support 1GiB memory section?
Thank you,
Kyungmin Park
+
+ chosen {
+ bootargs =root=/dev/ram0 rw ramdisk=32768 initrd=0x4100,32M
console=ttySAC2,115200 init=/linuxrc;
+ };
+
+ serial@1380 {
+ status = okay;
+ };
+
+ serial@1381 {
+ status = okay;
+ };
+
+ serial@1382 {
+ status = okay;
+ };
+
+ serial@1383 {
+ status = okay;
+ };
+};
--
1.7.5.4
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Re: [RFC 1/2] ARM: S3C24XX: add devicetree support for interrupts
Hi Thomas,
Am Montag, 26. November 2012, 12:03:22 schrieb Thomas Abraham:
Hi Heiko,
On 25 November 2012 06:17, Heiko Stübner he...@sntech.de wrote:
This adds devicetree parsing of the controller-data for the
interrupt controllers on S3C24XX architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../interrupt-controller/samsung,s3c24xx-irq.txt | 57 ++
arch/arm/mach-s3c24xx/common.h |1 +
arch/arm/plat-s3c24xx/irq.c| 197
3 files changed, 255 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-
irq.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx
-irq.txt
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx
-irq.txt new file mode 100644
index 000..c637637
--- /dev/null
+++
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx
-irq.txt @@ -0,0 +1,57 @@
+Samsung S3C24XX Interrupt Controllers
+
+The S3C24XX SoCs contain custom set of interrupt controllers providing a
+varying number of interrupt sources.
+
+The set consists of a main- and a sub-controller as well as a controller
+for the external interrupts and on newer SoCs even a second main
controller. +
+The bit-to-interrupt and parent mapping of the controllers is not fixed
+over all SoCs and therefore must be defined in the controller
description. +
+Required properties:
+- compatible: Compatible property value should be samsung,s3c24xx-irq.
+
+- reg: Physical base address of the controller and length of memory
mapped + region.
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value shall be 2.
+
+- s3c24xx,irqlist : List of irqtypes found on this controller as
+ two-value pairs consisting of irqtype and parent-irq
+
+ parent-irq is always the list position of the irq in the irqlist
+ of the parent controller (0..31)
+
+ irqtypes are:
+ - 0 .. none
+ - 1 .. external interrupts in the main register (GPF0 .. GPF3)
+ - 2 .. edge irq in the main register
+ - 3 .. for parent-irqs, that have sub-irqs in child controllers
+ - 4 .. level irqs in the sub-register
+ - 5 .. edge irqs in the sub-register
+ - 6 .. external irqs in the external irq register (starting with GPF4)
+ - 7 .. irq in the second base irq controller of S3C2416/S3C2450 SoCs
Instead of defining the type of interrupt controller as above, is it
possible to create multiple device nodes, with each node representing
a type of interrupt controller with a unique compatible string and
corresponding properties. There will be a init function for each type
of interrupt controller. There should be a irq-domain for each of
these different types of interrupt controller. And then, in the device
tree source file, a proper tree like hierarchy of interrupt
controllers can defined (using the interrupt-parent property for each
controller node). The client nodes that generate the interrupt can
specify the parent node and the interrupt number within the parent to
which they generate the interrupt.
I'm not sure I understand yet :-). The list describes the types of interrupts
inside the individual controllers.
On all the s3c24xx we have three register sets denoting the main (SRCPND,
INTPND, INTMSK), sub (SUBSRCPEND, INTSUBMASK) and extint (EINTPEND, EINTMASK)
controllers. The bits of these registers are used for quite different irqs.
For example is bit 17 of the main register set used as DMA0 on earlier socs
while the dma interrupts moved to the subint registers for s3c2443 and later.
So the entries in the irqlist describe the needed handlers for the hwirq bits
of the indidual controllers. So in this scheme you set for dt-devices the
interrupt parent to the correct register set and the interrupts field then
matches the bit of the register, according to the datasheet.
When I changed the basic interrupt handling in the previous set, the changed
irq.c can for exmaple be found on [0], I created these lists in the code and
soc specific routines to init them for the still valid non-dt case.
But as dt is about describing the hardware, I found the current solution nice,
because will I only need exactly one dt-init-function for all s3c24xx-socs,
instead of representing all the slight variances in code.
I'm definitly not sure if all the different types of individual irq handlers
are strictly necessary yet, but they represent all the variants that were in
use in the original code.
Heiko
[0] https://github.com/mmind/linux-es600/blob/topic/es600-devel/arch/arm/plat-
s3c24xx/irq.c
+
+Optional properties:
+- interrupt_parent : The parent interrupt controller
+
+Example:
+
+
Re: [PATCH 3/3] regulator: add device tree support for max8997
On 26 November 2012 15:21, Mark Brown broo...@opensource.wolfsonmicro.com wrote: On Sat, Nov 24, 2012 at 11:46:51PM +0530, Thomas Abraham wrote: The max8997 driver is mainlined. I actually meant to say that, this v6 version of dt support patch for max8997, is similar in functionality to the v5 version of this patch. I did prepare this patch based on your latest for-next branch. I find it hard to believe that this was generated against for-next, this was where I tried to apply it... I tried again to apply this patch on 'for-next' branch of your regulator tree (git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git) on top of commit 6aa588f43d4a (Merge remote-tracking branches 'regulator/fix/wm831x', 'regulator/topic/as3711', 'regulator/topic/da9055', 'regulator/topic/hotplug', 'regulator/topic/lp8788'.) and this patch applied cleanly. Could you please let me know if there is anything I need to be doing differently for this. Thanks, Thomas. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 0/3] thermal: Add support for interrupt based notification to thermal layer
Changes since V1: Used the new thermal trend type macro The patch submitted by Jonghwa Lee (https://patchwork.kernel.org/patch/1683441/) adds support for interrupt based notification to thermal layer. This is a good feature but the current code need more fixes to support that feature so using 2 new thermal trend type to implement this feature and some falling interrupt fixes. All these patches are based on thermal maintainer thermal branch. git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git thermal Amit Daniel Kachhap (2): thermal: exynos: Miscellaneous fixes to support falling threshold interrupt thermal: exynos: Use the new thermal trend type for quick cooling action. Jonghwa Lee (1): Thermal: exynos: Add support for temperature falling interrupt. drivers/thermal/exynos_thermal.c | 108 +++--- include/linux/platform_data/exynos_thermal.h |3 + 2 files changed, 67 insertions(+), 44 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 1/3] Thermal: exynos: Add support for temperature falling interrupt.
From: Jonghwa Lee jonghwa3@samsung.com
This patch introduces using temperature falling interrupt in exynos
thermal driver. Former patch, it only use polling way to check
whether if system themperature is fallen. However, exynos SOC also
provides temperature falling interrupt way to do same things by hw.
This feature is not supported in exynos4210.
Signed-off-by: Jonghwa Lee jonghwa3@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
drivers/thermal/exynos_thermal.c | 81 +++---
include/linux/platform_data/exynos_thermal.h |3 +
2 files changed, 49 insertions(+), 35 deletions(-)
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index e2ef8a3..3b6c387 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -94,6 +94,7 @@
#define SENSOR_NAME_LEN16
#define MAX_TRIP_COUNT 8
#define MAX_COOLING_DEVICE 4
+#define MAX_THRESHOLD_LEVS 4
#define ACTIVE_INTERVAL 500
#define IDLE_INTERVAL 1
@@ -133,6 +134,7 @@ struct exynos_tmu_data {
struct thermal_trip_point_conf {
int trip_val[MAX_TRIP_COUNT];
int trip_count;
+ u8 trigger_falling;
};
struct thermal_cooling_conf {
@@ -182,7 +184,8 @@ static int exynos_set_mode(struct thermal_zone_device
*thermal,
mutex_lock(th_zone-therm_dev-lock);
- if (mode == THERMAL_DEVICE_ENABLED)
+ if (mode == THERMAL_DEVICE_ENABLED
+ !th_zone-sensor_conf-trip_data.trigger_falling)
th_zone-therm_dev-polling_delay = IDLE_INTERVAL;
else
th_zone-therm_dev-polling_delay = 0;
@@ -421,7 +424,8 @@ static void exynos_report_trigger(void)
break;
}
- if (th_zone-mode == THERMAL_DEVICE_ENABLED) {
+ if (th_zone-mode == THERMAL_DEVICE_ENABLED
+ !th_zone-sensor_conf-trip_data.trigger_falling) {
if (i 0)
th_zone-therm_dev-polling_delay = ACTIVE_INTERVAL;
else
@@ -460,7 +464,8 @@ static int exynos_register_thermal(struct
thermal_sensor_conf *sensor_conf)
th_zone-therm_dev = thermal_zone_device_register(sensor_conf-name,
EXYNOS_ZONE_COUNT, 0, NULL, exynos_dev_ops, NULL, 0,
- IDLE_INTERVAL);
+ sensor_conf-trip_data.trigger_falling ?
+ 0 : IDLE_INTERVAL);
if (IS_ERR(th_zone-therm_dev)) {
pr_err(Failed to register thermal zone device\n);
@@ -567,8 +572,9 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
{
struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct exynos_tmu_platform_data *pdata = data-pdata;
- unsigned int status, trim_info, rising_threshold;
- int ret = 0, threshold_code;
+ unsigned int status, trim_info;
+ unsigned int rising_threshold = 0, falling_threshold = 0;
+ int ret = 0, threshold_code, i, trigger_levs = 0;
mutex_lock(data-lock);
clk_enable(data-clk);
@@ -593,6 +599,11 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
(data-temp_error2 != 0))
data-temp_error1 = pdata-efuse_value;
+ /* Count trigger levels to be enabled */
+ for (i = 0; i MAX_THRESHOLD_LEVS; i++)
+ if (pdata-trigger_levels[i])
+ trigger_levs++;
+
if (data-soc == SOC_ARCH_EXYNOS4210) {
/* Write temperature code for threshold */
threshold_code = temp_to_code(data, pdata-threshold);
@@ -602,44 +613,38 @@ static int exynos_tmu_initialize(struct platform_device
*pdev)
}
writeb(threshold_code,
data-base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
-
- writeb(pdata-trigger_levels[0],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL0);
- writeb(pdata-trigger_levels[1],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL1);
- writeb(pdata-trigger_levels[2],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL2);
- writeb(pdata-trigger_levels[3],
- data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL3);
+ for (i = 0; i trigger_levs; i++)
+ writeb(pdata-trigger_levels[i],
+ data-base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4);
writel(EXYNOS4210_TMU_INTCLEAR_VAL,
data-base + EXYNOS_TMU_REG_INTCLEAR);
} else if (data-soc == SOC_ARCH_EXYNOS) {
- /* Write temperature code for threshold */
- threshold_code = temp_to_code(data, pdata-trigger_levels[0]);
- if (threshold_code 0) {
- ret = threshold_code;
- goto out;
- }
-
[PATCH V2 2/3] thermal: exynos: Miscellaneous fixes to support falling threshold interrupt
Below fixes are done to support falling threshold interrupt,
* Falling interrupt status macro corrected according to exynos5 data sheet.
* The get trend function modified to calculate trip temperature correctly.
* The clearing of interrupt status in the isr is now done after handling
the event that caused the interrupt.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
drivers/thermal/exynos_thermal.c | 21 +++--
1 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index 3b6c387..54b3fea 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -82,7 +82,7 @@
#define EXYNOS_TRIMINFO_RELOAD 0x1
#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
-#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 16)
+#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 12)
#define EXYNOS_MUX_ADDR_VALUE 6
#define EXYNOS_MUX_ADDR_SHIFT 20
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
@@ -373,12 +373,19 @@ static int exynos_get_temp(struct thermal_zone_device
*thermal,
static int exynos_get_trend(struct thermal_zone_device *thermal,
int trip, enum thermal_trend *trend)
{
- if (thermal-temperature = trip)
+ int ret = 0;
+ unsigned long trip_temp;
+
+ ret = exynos_get_trip_temp(thermal, trip, trip_temp);
+ if (ret 0)
+ return ret;
+
+ if (thermal-temperature = trip_temp)
*trend = THERMAL_TREND_RAISING;
else
*trend = THERMAL_TREND_DROPPING;
- return 0;
+ return ret;
}
/* Operation callback functions for thermal zone */
static struct thermal_zone_device_ops const exynos_dev_ops = {
@@ -716,6 +723,11 @@ static void exynos_tmu_work(struct work_struct *work)
clk_enable(data-clk);
+
+ clk_disable(data-clk);
+ mutex_unlock(data-lock);
+ exynos_report_trigger();
+ clk_enable(data-clk);
if (data-soc == SOC_ARCH_EXYNOS)
writel(EXYNOS_TMU_CLEAR_RISE_INT |
EXYNOS_TMU_CLEAR_FALL_INT,
@@ -723,10 +735,7 @@ static void exynos_tmu_work(struct work_struct *work)
else
writel(EXYNOS4210_TMU_INTCLEAR_VAL,
data-base + EXYNOS_TMU_REG_INTCLEAR);
-
clk_disable(data-clk);
- mutex_unlock(data-lock);
- exynos_report_trigger();
enable_irq(data-irq);
}
--
1.7.1
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[PATCH V2 3/3] thermal: exynos: Use the new thermal trend type for quick cooling action.
This patch uses the quick thermal cooling trend type macros. This is needed
as exynos5 and other thermal sensors now supports only interrupt method for
thresold temperature check.
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
drivers/thermal/exynos_thermal.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index 54b3fea..2490901 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -295,7 +295,7 @@ static int exynos_bind(struct thermal_zone_device *thermal,
case MONITOR_ZONE:
case WARN_ZONE:
if (thermal_zone_bind_cooling_device(thermal, i, cdev,
- level, level)) {
+ level, 0)) {
pr_err(error binding cdev inst %d\n, i);
ret = -EINVAL;
}
@@ -381,9 +381,9 @@ static int exynos_get_trend(struct thermal_zone_device
*thermal,
return ret;
if (thermal-temperature = trip_temp)
- *trend = THERMAL_TREND_RAISING;
+ *trend = THERMAL_TREND_RAISE_FULL;
else
- *trend = THERMAL_TREND_DROPPING;
+ *trend = THERMAL_TREND_DROP_FULL;
return ret;
}
--
1.7.1
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Re: [PATCH 3/3] regulator: add device tree support for max8997
On Mon, Nov 26, 2012 at 07:16:04PM +0530, Thomas Abraham wrote: and this patch applied cleanly. Could you please let me know if there is anything I need to be doing differently for this. Hrm, try applying it on the relevant topic branch. Your comments about rebasing on top of MFD changes did suggest that there's something in the MFD tree so I didn't check terribly closely. signature.asc Description: Digital signature
Re: [PATCH 3/3] regulator: add device tree support for max8997
On 26 November 2012 19:41, Mark Brown broo...@opensource.wolfsonmicro.com wrote: On Mon, Nov 26, 2012 at 07:16:04PM +0530, Thomas Abraham wrote: and this patch applied cleanly. Could you please let me know if there is anything I need to be doing differently for this. Hrm, try applying it on the relevant topic branch. Your comments about rebasing on top of MFD changes did suggest that there's something in the MFD tree so I didn't check terribly closely. I tried applying this patch on the max8997 branch in your regulator tree. But this patch does not apply cleanly on that branch because commits 5eb9f2b96381 (regulator: remove use of __devexit_p), a5023574d120 (regulator: remove use of __devinit) and 8dc995f56ef7 (regulator: remove use of __devexit) are not available on this branch but these commits are already in your for-next branch. I am not sure if it is of any help in rebasing this patch to the existing max8997 branch. If you could suggest on how I could prepare this patch so that applies cleanly for you, I could do that. Thanks, Thomas. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH] ASoC: Samsung: Register the audio platform device
Hi,
On Wed, Nov 14, 2012 at 5:39 PM, Padmavathi Venna padm...@samsung.com wrote:
Audio platform device is not a hardware peripherial.
So this device can't be added in the dt devices list.
So expanded the module_platform_driver and registered
this device using platform_device_register_simple.
Also added the soc-core pm ops structure in the audio
platform driver.
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
sound/soc/samsung/smdk_wm8994.c | 31 ++-
1 files changed, 30 insertions(+), 1 deletions(-)
diff --git a/sound/soc/samsung/smdk_wm8994.c b/sound/soc/samsung/smdk_wm8994.c
index 48dd4dd..7f97969 100644
--- a/sound/soc/samsung/smdk_wm8994.c
+++ b/sound/soc/samsung/smdk_wm8994.c
@@ -173,16 +173,45 @@ static int __devexit smdk_audio_remove(struct
platform_device *pdev)
return 0;
}
+static struct platform_device *smdk_audio_device;
+
static struct platform_driver smdk_audio_driver = {
.driver = {
.name = smdk-audio,
.owner = THIS_MODULE,
+ .pm = snd_soc_pm_ops,
},
.probe = smdk_audio_probe,
.remove = __devexit_p(smdk_audio_remove),
};
-module_platform_driver(smdk_audio_driver);
+static int __init smdk_audio_init(void)
+{
+ int ret;
+
+ ret = platform_driver_register(smdk_audio_driver);
+ if (ret) {
+ pr_err(unable to register driver\n);
+ return ret;
+ }
+
+ smdk_audio_device = platform_device_register_simple(smdk-audio, -1,
NULL, 0);
+ if (IS_ERR(smdk_audio_device)) {
+ platform_driver_unregister(smdk_audio_driver);
+ return PTR_ERR(smdk_audio_device);
+ }
+
+ return 0;
+}
+
+static void __exit smdk_audio_exit(void)
+{
+ platform_device_unregister(smdk_audio_device);
+ platform_driver_unregister(smdk_audio_driver);
+}
+
+module_init(smdk_audio_init);
+module_exit(smdk_audio_exit);
Ping. Any comments on this patch?
Thanks
Padma
MODULE_DESCRIPTION(ALSA SoC SMDK WM8994);
MODULE_LICENSE(GPL);
--
1.7.4.4
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Re: [PATCH 3/3] regulator: add device tree support for max8997
On Mon, Nov 26, 2012 at 08:13:23PM +0530, Thomas Abraham wrote: I tried applying this patch on the max8997 branch in your regulator tree. But this patch does not apply cleanly on that branch because commits 5eb9f2b96381 (regulator: remove use of __devexit_p), a5023574d120 (regulator: remove use of __devinit) and 8dc995f56ef7 (regulator: remove use of __devexit) are not available on this branch but these commits are already in your for-next branch. I am not sure if it is of any help in rebasing this patch to the existing max8997 branch. If you could suggest on how I could prepare this patch so that applies cleanly for you, I could do that. Send something against the topic branch. signature.asc Description: Digital signature
Re: [RFC PATCH] ASoC: Samsung: Register the audio platform device
On Mon, Nov 26, 2012 at 08:15:12PM +0530, Padma Venkat wrote: On Wed, Nov 14, 2012 at 5:39 PM, Padmavathi Venna padm...@samsung.com wrote: +module_init(smdk_audio_init); +module_exit(smdk_audio_exit); Ping. Any comments on this patch? Don't send contentless pings and delete irrelevant context from replies. Please refer to the feedback I sent in response to Sangbeom's pull request - in short, this isn't the way to do this - do what the other platforms do. signature.asc Description: Digital signature
Re: [RFC 1/2] ARM: S3C24XX: add devicetree support for interrupts
On 26 November 2012 17:43, Heiko Stübner he...@sntech.de wrote:
Hi Thomas,
Am Montag, 26. November 2012, 12:03:22 schrieb Thomas Abraham:
Hi Heiko,
On 25 November 2012 06:17, Heiko Stübner he...@sntech.de wrote:
This adds devicetree parsing of the controller-data for the
interrupt controllers on S3C24XX architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../interrupt-controller/samsung,s3c24xx-irq.txt | 57 ++
arch/arm/mach-s3c24xx/common.h |1 +
arch/arm/plat-s3c24xx/irq.c| 197
3 files changed, 255 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-
irq.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx
-irq.txt
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx
-irq.txt new file mode 100644
index 000..c637637
--- /dev/null
+++
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx
-irq.txt @@ -0,0 +1,57 @@
+Samsung S3C24XX Interrupt Controllers
+
+The S3C24XX SoCs contain custom set of interrupt controllers providing a
+varying number of interrupt sources.
+
+The set consists of a main- and a sub-controller as well as a controller
+for the external interrupts and on newer SoCs even a second main
controller. +
+The bit-to-interrupt and parent mapping of the controllers is not fixed
+over all SoCs and therefore must be defined in the controller
description. +
+Required properties:
+- compatible: Compatible property value should be samsung,s3c24xx-irq.
+
+- reg: Physical base address of the controller and length of memory
mapped + region.
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The value shall be 2.
+
+- s3c24xx,irqlist : List of irqtypes found on this controller as
+ two-value pairs consisting of irqtype and parent-irq
+
+ parent-irq is always the list position of the irq in the irqlist
+ of the parent controller (0..31)
+
+ irqtypes are:
+ - 0 .. none
+ - 1 .. external interrupts in the main register (GPF0 .. GPF3)
+ - 2 .. edge irq in the main register
+ - 3 .. for parent-irqs, that have sub-irqs in child controllers
+ - 4 .. level irqs in the sub-register
+ - 5 .. edge irqs in the sub-register
+ - 6 .. external irqs in the external irq register (starting with GPF4)
+ - 7 .. irq in the second base irq controller of S3C2416/S3C2450 SoCs
Instead of defining the type of interrupt controller as above, is it
possible to create multiple device nodes, with each node representing
a type of interrupt controller with a unique compatible string and
corresponding properties. There will be a init function for each type
of interrupt controller. There should be a irq-domain for each of
these different types of interrupt controller. And then, in the device
tree source file, a proper tree like hierarchy of interrupt
controllers can defined (using the interrupt-parent property for each
controller node). The client nodes that generate the interrupt can
specify the parent node and the interrupt number within the parent to
which they generate the interrupt.
I'm not sure I understand yet :-). The list describes the types of interrupts
inside the individual controllers.
On all the s3c24xx we have three register sets denoting the main (SRCPND,
INTPND, INTMSK), sub (SUBSRCPEND, INTSUBMASK) and extint (EINTPEND, EINTMASK)
controllers. The bits of these registers are used for quite different irqs.
We could consider main, sub and extint as three separate interrupt
controllers and thus three different nodes in device tree. So the
interrupt nodes could be something like (referring to 2416 manual).
main@0x4a00 {
compatible = samsung,s3c2410-main;
reg = 0x4a00 0x100;
interrupt-controller;
#interrupt-cells = 2;
};
sub@0x4a001000 {
compatible = samsung,s3c2410-sub;
reg = 0x4a001000 0x100;
interrupt-controller;
#interrupt-cells = 2;
interrupt-parent = main;
interrupts = 28 0, 23 0, . /*uart0/uart1/..*/
};
eint@0x4a002000 {
compatible = samsung,s3c2410-eint;
reg = 0x4a002000 0x100;
interrupt-controller;
#interrupt-cells = 2;
interrupt-parent = main;
interrupts = 0 0, 1 0,
2 0, 3 0,
4 0, 5 0;
};
There should be a corresponding irqchip driver code to handle each of
these types of controllers. They should have their own irq-domain
supported.
Then the client nodes can specify the interrupt parent and interrupt
number. For
[PATCH] ARM: SAMSUNG: Fix build of I2S driver
Commit 48a2050d36f0da5a7d22e3bd7dbf3bf8a5a538bc (ARM: SAMSUNG: Delete
the unnecessary variable) removed the src_clk field from the platform
data header for the I2S driver without a corresponding change having
been made in the I2S driver to stop using the field, causing build
breaks.
This change should not be being made independently of removal of the
uses of the field since it will cause build failures in any tree where
it has been merged but the removals have not been merged. Currently
the removal of the users in the ASoC driver has not been merged.
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
---
include/linux/platform_data/asoc-s3c.h |6 ++
1 file changed, 6 insertions(+)
diff --git a/include/linux/platform_data/asoc-s3c.h
b/include/linux/platform_data/asoc-s3c.h
index 8827259..aa9875f 100644
--- a/include/linux/platform_data/asoc-s3c.h
+++ b/include/linux/platform_data/asoc-s3c.h
@@ -38,6 +38,12 @@ struct samsung_i2s {
#define QUIRK_NEED_RSTCLR (1 3)
/* Quirks of the I2S controller */
u32 quirks;
+
+ /*
+* Array of clock names that can be used to generate I2S signals.
+* Also corresponds to clocks of I2SMOD[10]
+*/
+ const char **src_clk;
dma_addr_t idma_addr;
};
--
1.7.10.4
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[PATCH] ARM: S3C64XX: Add registration of WM2200 Bells device on Cragganmore
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
---
arch/arm/mach-s3c64xx/mach-crag6410.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c
b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 2abe95d..c06bcfa 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -287,16 +287,21 @@ static struct platform_device littlemill_device = {
.id = -1,
};
-static struct platform_device bells_wm5102_device = {
+static struct platform_device bells_wm2200_device = {
.name = bells,
.id = 0,
};
-static struct platform_device bells_wm5110_device = {
+static struct platform_device bells_wm5102_device = {
.name = bells,
.id = 1,
};
+static struct platform_device bells_wm5110_device = {
+ .name = bells,
+ .id = 2,
+};
+
static struct regulator_consumer_supply wallvdd_consumers[] = {
REGULATOR_SUPPLY(SPKVDD, 1-001a),
REGULATOR_SUPPLY(SPKVDD1, 1-001a),
@@ -376,6 +381,7 @@ static struct platform_device *crag6410_devices[]
__initdata = {
tobermory_device,
littlemill_device,
lowland_device,
+ bells_wm2200_device,
bells_wm5102_device,
bells_wm5110_device,
wallvdd_device,
--
1.7.10.4
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Re: [RFC 1/2] ARM: S3C24XX: add devicetree support for interrupts
Hi Thomas,
Am Montag, 26. November 2012, 16:23:00 schrieb Thomas Abraham:
On 26 November 2012 17:43, Heiko Stübner he...@sntech.de wrote:
Hi Thomas,
Am Montag, 26. November 2012, 12:03:22 schrieb Thomas Abraham:
Hi Heiko,
On 25 November 2012 06:17, Heiko Stübner he...@sntech.de wrote:
This adds devicetree parsing of the controller-data for the
interrupt controllers on S3C24XX architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../interrupt-controller/samsung,s3c24xx-irq.txt | 57 ++
arch/arm/mach-s3c24xx/common.h |1 +
arch/arm/plat-s3c24xx/irq.c| 197
3 files changed, 255 insertions(+), 0
deletions(-) create mode 100644
Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24x
x- irq.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24
xx -irq.txt
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24
xx -irq.txt new file mode 100644
index 000..c637637
--- /dev/null
+++
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24
xx -irq.txt @@ -0,0 +1,57 @@
+Samsung S3C24XX Interrupt Controllers
+
+The S3C24XX SoCs contain custom set of interrupt controllers
providing a +varying number of interrupt sources.
+
+The set consists of a main- and a sub-controller as well as a
controller +for the external interrupts and on newer SoCs even a
second main controller. +
+The bit-to-interrupt and parent mapping of the controllers is not
fixed +over all SoCs and therefore must be defined in the controller
description. +
+Required properties:
+- compatible: Compatible property value should be
samsung,s3c24xx-irq. +
+- reg: Physical base address of the controller and length of memory
mapped + region.
+
+- interrupt-controller : Identifies the node as an interrupt
controller +- #interrupt-cells : Specifies the number of cells needed
to encode an + interrupt source. The value shall be 2.
+
+- s3c24xx,irqlist : List of irqtypes found on this controller as
+ two-value pairs consisting of irqtype and parent-irq
+
+ parent-irq is always the list position of the irq in the irqlist
+ of the parent controller (0..31)
+
+ irqtypes are:
+ - 0 .. none
+ - 1 .. external interrupts in the main register (GPF0 .. GPF3)
+ - 2 .. edge irq in the main register
+ - 3 .. for parent-irqs, that have sub-irqs in child controllers
+ - 4 .. level irqs in the sub-register
+ - 5 .. edge irqs in the sub-register
+ - 6 .. external irqs in the external irq register (starting with
GPF4) + - 7 .. irq in the second base irq controller of
S3C2416/S3C2450 SoCs
Instead of defining the type of interrupt controller as above, is it
possible to create multiple device nodes, with each node representing
a type of interrupt controller with a unique compatible string and
corresponding properties. There will be a init function for each type
of interrupt controller. There should be a irq-domain for each of
these different types of interrupt controller. And then, in the device
tree source file, a proper tree like hierarchy of interrupt
controllers can defined (using the interrupt-parent property for each
controller node). The client nodes that generate the interrupt can
specify the parent node and the interrupt number within the parent to
which they generate the interrupt.
I'm not sure I understand yet :-). The list describes the types of
interrupts inside the individual controllers.
On all the s3c24xx we have three register sets denoting the main (SRCPND,
INTPND, INTMSK), sub (SUBSRCPEND, INTSUBMASK) and extint (EINTPEND,
EINTMASK) controllers. The bits of these registers are used for quite
different irqs.
We could consider main, sub and extint as three separate interrupt
controllers and thus three different nodes in device tree. So the
interrupt nodes could be something like (referring to 2416 manual).
main@0x4a00 {
compatible = samsung,s3c2410-main;
reg = 0x4a00 0x100;
interrupt-controller;
#interrupt-cells = 2;
};
sub@0x4a001000 {
compatible = samsung,s3c2410-sub;
reg = 0x4a001000 0x100;
interrupt-controller;
#interrupt-cells = 2;
interrupt-parent = main;
interrupts = 28 0, 23 0, . /*uart0/uart1/..*/
};
eint@0x4a002000 {
compatible = samsung,s3c2410-eint;
reg = 0x4a002000 0x100;
interrupt-controller;
#interrupt-cells = 2;
interrupt-parent = main;
interrupts = 0 0, 1 0,
2 0, 3 0,
4 0, 5 0;
};
There should be a
Re: [PATCH v4 00/12] clk: exynos4: migrate to common clock framework
Quoting Thomas Abraham (2012-11-24 13:17:53) Changes since v3: - Includes changes suggested by Tomasz Figa tomasz.f...@gmail.com Hi Thomas, 3.7-rc7 is out and I do not wish to take any large changes this close to the merge window opening up. I will review these patches and give any feedback now on the common clk bits, but merging in the drivers/clk/samsung parts would have to wait until after clk-next is rebased onto 3.8-rc. Which tree do you want to merge this through? Samsung or clk-next? Will you split the patches or take it all once you have gathered ACKs? Thanks, Mike This patch series migrates the Samsung Exynos4 SoC clock code to adopt the common clock framework. The use of Samsung specific clock structures has been removed and all board support code has been updated. imx-style of clock registration and lookup has been adopted for device tree based exynos4 platforms. This patch series is based on the for-next branch of Samsung maintainer's tree with all patches merged from clk-next branch of Mike's tree. This series has been tested on Exynos4210 based Origen board and Exynos4412 based smdk board. Thomas Abraham (12): clk: samsung: add common clock framework helper functions for Samsung platforms clk: samsung: add pll clock registration helper functions clk: exynos4: register clocks using common clock framework ARM: Exynos: Rework timer initialization sequence ARM: Exynos4: Migrate clock support to common clock framework ARM: dts: add exynos4 clock controller nodes ARM: dts: add xxti and xusbxti fixed rate clock nodes for exynos4 based platforms ARM: Exynos4: allow legacy board support to specify xxti and xusbxti clock speed ARM: dts: add clock provider information for all controllers in Exynos4 SoC ARM: Exynos4: remove auxdata table from machine file ARM: Exynos: use fin_pll clock as the tick clock source for mct ARM: Exynos: add support for mct clock setup .../devicetree/bindings/clock/exynos4-clock.txt| 215 +++ arch/arm/boot/dts/exynos4.dtsi | 48 + arch/arm/boot/dts/exynos4210-origen.dts| 12 + arch/arm/boot/dts/exynos4210-smdkv310.dts | 12 + arch/arm/boot/dts/exynos4210.dtsi |6 + arch/arm/boot/dts/exynos4412-smdk4412.dts | 12 + arch/arm/boot/dts/exynos4x12.dtsi |6 + arch/arm/mach-exynos/Kconfig |1 + arch/arm/mach-exynos/Makefile |3 - arch/arm/mach-exynos/clock-exynos4.c | 1602 arch/arm/mach-exynos/clock-exynos4.h | 35 - arch/arm/mach-exynos/clock-exynos4210.c| 188 --- arch/arm/mach-exynos/clock-exynos4212.c| 192 --- arch/arm/mach-exynos/common.c | 57 +- arch/arm/mach-exynos/common.h | 21 +- arch/arm/mach-exynos/mach-armlex4210.c |3 +- arch/arm/mach-exynos/mach-exynos4-dt.c | 71 +- arch/arm/mach-exynos/mach-exynos5-dt.c |2 +- arch/arm/mach-exynos/mach-nuri.c |5 +- arch/arm/mach-exynos/mach-origen.c |5 +- arch/arm/mach-exynos/mach-smdk4x12.c |5 +- arch/arm/mach-exynos/mach-smdkv310.c |7 +- arch/arm/mach-exynos/mach-universal_c210.c |3 +- arch/arm/mach-exynos/mct.c | 32 +- arch/arm/plat-samsung/Kconfig |4 +- drivers/clk/Makefile |1 + drivers/clk/samsung/Makefile |6 + drivers/clk/samsung/clk-exynos4.c | 655 drivers/clk/samsung/clk-pll.c | 400 + drivers/clk/samsung/clk-pll.h | 38 + drivers/clk/samsung/clk.c | 180 +++ drivers/clk/samsung/clk.h | 216 +++ 32 files changed, 1905 insertions(+), 2138 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/exynos4-clock.txt delete mode 100644 arch/arm/mach-exynos/clock-exynos4.c delete mode 100644 arch/arm/mach-exynos/clock-exynos4.h delete mode 100644 arch/arm/mach-exynos/clock-exynos4210.c delete mode 100644 arch/arm/mach-exynos/clock-exynos4212.c create mode 100644 drivers/clk/samsung/Makefile create mode 100644 drivers/clk/samsung/clk-exynos4.c create mode 100644 drivers/clk/samsung/clk-pll.c create mode 100644 drivers/clk/samsung/clk-pll.h create mode 100644 drivers/clk/samsung/clk.c create mode 100644 drivers/clk/samsung/clk.h -- 1.7.4.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: SAMSUNG: Fix build of I2S driver
Mark Brown wrote:
Commit 48a2050d36f0da5a7d22e3bd7dbf3bf8a5a538bc (ARM: SAMSUNG: Delete
the unnecessary variable) removed the src_clk field from the platform
data header for the I2S driver without a corresponding change having
been made in the I2S driver to stop using the field, causing build
breaks.
This change should not be being made independently of removal of the
uses of the field since it will cause build failures in any tree where
it has been merged but the removals have not been merged. Currently
the removal of the users in the ASoC driver has not been merged.
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
---
include/linux/platform_data/asoc-s3c.h |6 ++
1 file changed, 6 insertions(+)
diff --git a/include/linux/platform_data/asoc-s3c.h
b/include/linux/platform_data/asoc-s3c.h
index 8827259..aa9875f 100644
--- a/include/linux/platform_data/asoc-s3c.h
+++ b/include/linux/platform_data/asoc-s3c.h
@@ -38,6 +38,12 @@ struct samsung_i2s {
#define QUIRK_NEED_RSTCLR(1 3)
/* Quirks of the I2S controller */
u32 quirks;
+
+ /*
+ * Array of clock names that can be used to generate I2S signals.
+ * Also corresponds to clocks of I2SMOD[10]
+ */
+ const char **src_clk;
dma_addr_t idma_addr;
};
--
1.7.10.4
I checked Samsung audio driver stuff just now. If you don't mind, I will
drop the patch 48a2050d (ARM: SAMSUNG: Delete the unnecessary variable)
instead of applying this.
If any unprepared patches for Samsung audio in my tree, please let me know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim kgene@samsung.com, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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RE: [GIT PULL 1/3] Samsung devel-2 for v3.8
Olof Johansson wrote: Hi Kgene, Hi :-) On Fri, Nov 23, 2012 at 10:37:30AM +0900, Kukjin Kim wrote: Hi Arnd, Olof Here is second Samsung development patches for v3.8. Please start sorting your branches more. When someone sends in a large devel branch, it doesn't fit our tree organization very well. The branch below contains fixes, new features and cleanups all in one branch. OK, I see and I will sorting it out more carefully. This includes properly enabling PM support and UART3 DEBUG_LL for exynos5 and CAMIF for s3c24xx/s3c64xx. Properly enabling PM support sounds like worthy of a branch on its own, for example. Agreed, I will re-send pull-request tonight. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [GIT PULL 3/3] Samsung exynos5440 for v3.8
Olof Johansson wrote: On Fri, Nov 23, 2012 at 10:37:03AM +0900, Kukjin Kim wrote: Arnd, Olof, This is adding support for exynos5440, including Quad ARM Cortex-A15 cores and its reference board SSDK5440. Note, at this moment, just enabled minimal system part for initial kernel boot and pinctrl driver. Please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git next/soc-exynos5440 Merged. This caused some new conflicts with previous samsung contents, since you add DT contents in several branches, etc. Please try to work on getting your amount of conflicts down a bit. Oops could be, it's my fault. Sorry for inconvenience. If you want a good example to look at, see how Tony Lindgren handles OMAP. He's juggling a large number of topics with nearly no conflicts left for us to resolve at our level, by making sure new work is based on appropriate base branches. Sure, I will. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: Exynos: Remove unused non-dt support for dwmci controller
Thomas Abraham wrote:
With device tree support enabled for dwmci controller, the unused non-dt
support
for dwmci controller can be removed.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/mach-exynos/Makefile |1 -
arch/arm/mach-exynos/dev-dwmci.c | 75
---
--
arch/arm/mach-exynos/include/mach/dwmci.h | 20
3 files changed, 0 insertions(+), 96 deletions(-)
delete mode 100644 arch/arm/mach-exynos/dev-dwmci.c
delete mode 100644 arch/arm/mach-exynos/include/mach/dwmci.h
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index c12ed6a..b189881 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -50,7 +50,6 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-
exynos5-dt.o
obj-y+= dev-uart.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
-obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
diff --git a/arch/arm/mach-exynos/dev-dwmci.c b/arch/arm/mach-exynos/dev-
dwmci.c
deleted file mode 100644
index 7903501..000
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/dev-dwmci.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Platform device for Synopsys DesignWare Mobile Storage IP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include linux/kernel.h
-#include linux/dma-mapping.h
-#include linux/platform_device.h
-#include linux/interrupt.h
-#include linux/ioport.h
-#include linux/mmc/dw_mmc.h
-
-#include plat/devs.h
-
-#include mach/map.h
-
-static int exynos4_dwmci_get_bus_wd(u32 slot_id)
-{
- return 4;
-}
-
-static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void
*data)
-{
- return 0;
-}
-
-static struct resource exynos4_dwmci_resource[] = {
- [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
- [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
-};
-
-static struct dw_mci_board exynos4_dwci_pdata = {
- .num_slots = 1,
- .quirks =
DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
- .bus_hz = 80 * 1000 * 1000,
- .detect_delay_ms= 200,
- .init = exynos4_dwmci_init,
- .get_bus_wd = exynos4_dwmci_get_bus_wd,
-};
-
-static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device exynos4_device_dwmci = {
- .name = dw_mmc,
- .id = -1,
- .num_resources = ARRAY_SIZE(exynos4_dwmci_resource),
- .resource = exynos4_dwmci_resource,
- .dev= {
- .dma_mask = exynos4_dwmci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = exynos4_dwci_pdata,
- },
-};
-
-void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd)
-{
- struct dw_mci_board *npd;
-
- npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
- exynos4_device_dwmci);
-
- if (!npd-init)
- npd-init = exynos4_dwmci_init;
- if (!npd-get_bus_wd)
- npd-get_bus_wd = exynos4_dwmci_get_bus_wd;
-}
diff --git a/arch/arm/mach-exynos/include/mach/dwmci.h b/arch/arm/mach-
exynos/include/mach/dwmci.h
deleted file mode 100644
index 7ce6574..000
--- a/arch/arm/mach-exynos/include/mach/dwmci.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/dwmci.h
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * Synopsys DesignWare Mobile Storage for EXYNOS4210
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARM_ARCH_DWMCI_H
-#define __ASM_ARM_ARCH_DWMCI_H __FILE__
-
-#include linux/mmc/dw_mmc.h
-
-extern void exynos4_dwmci_set_platdata(struct dw_mci_board *pd);
-
-#endif /* __ASM_ARM_ARCH_DWMCI_H */
--
1.7.5.4
Looks good to me, applied.
Thanks.
Best regards,
Kgene.
--
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SW Solution Development Team, Samsung Electronics Co., Ltd.
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RE: [PATCH] ARM: Exynos: Remove unused regs-mem.h file
Thomas Abraham wrote: Remove the unused regs-mem.h file Signed-off-by: Thomas Abraham thomas.abra...@linaro.org --- arch/arm/mach-exynos/include/mach/regs-mem.h | 23 -- - 1 files changed, 0 insertions(+), 23 deletions(-) delete mode 100644 arch/arm/mach-exynos/include/mach/regs-mem.h diff --git a/arch/arm/mach-exynos/include/mach/regs-mem.h b/arch/arm/mach- exynos/include/mach/regs-mem.h deleted file mode 100644 index 0368b5a..000 --- a/arch/arm/mach-exynos/include/mach/regs-mem.h +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/arch/arm/mach-exynos4/include/mach/regs-mem.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS4 - SROMC and DMC register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_MEM_H -#define __ASM_ARCH_REGS_MEM_H __FILE__ - -#include mach/map.h - -#define S5P_DMC0_MEMCON_OFFSET 0x04 - -#define S5P_DMC0_MEMTYPE_SHIFT 8 -#define S5P_DMC0_MEMTYPE_MASK0xF - -#endif /* __ASM_ARCH_REGS_MEM_H */ -- 1.6.6.rc2 OK, applied. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v4 00/12] clk: exynos4: migrate to common clock framework
Mike Turquette wrote: Quoting Thomas Abraham (2012-11-24 13:17:53) Changes since v3: - Includes changes suggested by Tomasz Figa tomasz.f...@gmail.com Hi Thomas, Hi Mike, 3.7-rc7 is out and I do not wish to take any large changes this close to the merge window opening up. I will review these patches and give any feedback now on the common clk bits, but merging in the drivers/clk/samsung parts would have to wait until after clk-next is rebased onto 3.8-rc. I agree. Would be better if this could be provided early 3.8-rc. Which tree do you want to merge this through? Samsung or clk-next? Will you split the patches or take it all once you have gathered ACKs? Mike, if you're ok, I'd like to take this series in Samsung tree because this changes are very important and touches many Samsung stuff. Of course, I can create topic branch for your clk-next if you want. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. Thanks, Mike This patch series migrates the Samsung Exynos4 SoC clock code to adopt the common clock framework. The use of Samsung specific clock structures has been removed and all board support code has been updated. imx-style of clock registration and lookup has been adopted for device tree based exynos4 platforms. This patch series is based on the for-next branch of Samsung maintainer's tree with all patches merged from clk-next branch of Mike's tree. This series has been tested on Exynos4210 based Origen board and Exynos4412 based smdk board. Thomas Abraham (12): clk: samsung: add common clock framework helper functions for Samsung platforms clk: samsung: add pll clock registration helper functions clk: exynos4: register clocks using common clock framework ARM: Exynos: Rework timer initialization sequence ARM: Exynos4: Migrate clock support to common clock framework ARM: dts: add exynos4 clock controller nodes ARM: dts: add xxti and xusbxti fixed rate clock nodes for exynos4 based platforms ARM: Exynos4: allow legacy board support to specify xxti and xusbxti clock speed ARM: dts: add clock provider information for all controllers in Exynos4 SoC ARM: Exynos4: remove auxdata table from machine file ARM: Exynos: use fin_pll clock as the tick clock source for mct ARM: Exynos: add support for mct clock setup .../devicetree/bindings/clock/exynos4-clock.txt| 215 +++ arch/arm/boot/dts/exynos4.dtsi | 48 + arch/arm/boot/dts/exynos4210-origen.dts| 12 + arch/arm/boot/dts/exynos4210-smdkv310.dts | 12 + arch/arm/boot/dts/exynos4210.dtsi |6 + arch/arm/boot/dts/exynos4412-smdk4412.dts | 12 + arch/arm/boot/dts/exynos4x12.dtsi |6 + arch/arm/mach-exynos/Kconfig |1 + arch/arm/mach-exynos/Makefile |3 - arch/arm/mach-exynos/clock-exynos4.c | 1602 - --- arch/arm/mach-exynos/clock-exynos4.h | 35 - arch/arm/mach-exynos/clock-exynos4210.c| 188 --- arch/arm/mach-exynos/clock-exynos4212.c| 192 --- arch/arm/mach-exynos/common.c | 57 +- arch/arm/mach-exynos/common.h | 21 +- arch/arm/mach-exynos/mach-armlex4210.c |3 +- arch/arm/mach-exynos/mach-exynos4-dt.c | 71 +- arch/arm/mach-exynos/mach-exynos5-dt.c |2 +- arch/arm/mach-exynos/mach-nuri.c |5 +- arch/arm/mach-exynos/mach-origen.c |5 +- arch/arm/mach-exynos/mach-smdk4x12.c |5 +- arch/arm/mach-exynos/mach-smdkv310.c |7 +- arch/arm/mach-exynos/mach-universal_c210.c |3 +- arch/arm/mach-exynos/mct.c | 32 +- arch/arm/plat-samsung/Kconfig |4 +- drivers/clk/Makefile |1 + drivers/clk/samsung/Makefile |6 + drivers/clk/samsung/clk-exynos4.c | 655 drivers/clk/samsung/clk-pll.c | 400 + drivers/clk/samsung/clk-pll.h | 38 + drivers/clk/samsung/clk.c | 180 +++ drivers/clk/samsung/clk.h | 216 +++ 32 files changed, 1905 insertions(+), 2138 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/exynos4- clock.txt delete mode 100644 arch/arm/mach-exynos/clock-exynos4.c delete mode 100644 arch/arm/mach-exynos/clock-exynos4.h delete mode 100644 arch/arm/mach-exynos/clock-exynos4210.c delete mode 100644 arch/arm/mach-exynos/clock-exynos4212.c create mode 100644 drivers/clk/samsung/Makefile create mode 100644
RE: [PATCH] ARM: Exynos: Remove unused non-dt support for dwmci controller
Kyungmin Park wrote: On 11/26/12, Thomas Abraham thomas.abra...@linaro.org wrote: With device tree support enabled for dwmci controller, the unused non-dt support for dwmci controller can be removed. Are there no problem to use legacy board? e.g., universal_c210. I cannot find anywhere the exynos4_dwmci_set_platdata() and exynos4_device_dwmci are used. Thanks. Best regards, Kgene. -- Kukjin Kim kgene@samsung.com, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: Exynos: Remove unused non-dt support for dwmci controller
On Monday, November 26, 2012, Thomas Abraham thomas.abra...@linaro.org wrote:
With device tree support enabled for dwmci controller, the unused non-dt
support
for dwmci controller can be removed.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/mach-exynos/Makefile |1 -
arch/arm/mach-exynos/dev-dwmci.c | 75
-
arch/arm/mach-exynos/include/mach/dwmci.h | 20
3 files changed, 0 insertions(+), 96 deletions(-)
delete mode 100644 arch/arm/mach-exynos/dev-dwmci.c
delete mode 100644 arch/arm/mach-exynos/include/mach/dwmci.h
Hi Thomas,
The following parts are remained. Also, no used code.
Could you check it?
./plat-samsung/include/plat/devs.h:126:extern struct platform_device
exynos4_device_dwmci;
./Kconfig:111:config EXYNOS4_DEV_DWMCI
Thanks,
Seungwon Jeon
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index c12ed6a..b189881 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -50,7 +50,6 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) +=
mach-exynos5-dt.o
obj-y+= dev-uart.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
-obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
diff --git a/arch/arm/mach-exynos/dev-dwmci.c
b/arch/arm/mach-exynos/dev-dwmci.c
deleted file mode 100644
index 7903501..000
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/dev-dwmci.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Platform device for Synopsys DesignWare Mobile Storage IP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include linux/kernel.h
-#include linux/dma-mapping.h
-#include linux/platform_device.h
-#include linux/interrupt.h
-#include linux/ioport.h
-#include linux/mmc/dw_mmc.h
-
-#include plat/devs.h
-
-#include mach/map.h
-
-static int exynos4_dwmci_get_bus_wd(u32 slot_id)
-{
- return 4;
-}
-
-static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
-{
- return 0;
-}
-
-static struct resource exynos4_dwmci_resource[] = {
- [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
- [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
-};
-
-static struct dw_mci_board exynos4_dwci_pdata = {
- .num_slots = 1,
- .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
- .bus_hz = 80 * 1000 * 1000,
- .detect_delay_ms= 200,
- .init = exynos4_dwmci_init,
- .get_bus_wd = exynos4_dwmci_get_bus_wd,
-};
-
-static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device exynos4_device_dwmci = {
- .name = dw_mmc,
- .id = -1,
- .num_resources = ARRAY_SIZE(exynos4_dwmci_resource),
- .resource = exynos4_dwmci_resource,
- .dev= {
- .dma_mask = exynos4_dwmci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = exynos4_dwci_pdata,
- },
-};
-
-void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd)
-{
- struct dw_mci_board *npd;
-
- npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
- exynos4_device_dwmci);
-
- if (!npd-init)
- npd-init = exynos4_dwmci_init;
- if (!npd-get_bus_wd)
- npd-get_bus_wd = exynos4_dwmci_get_bus_wd;
-}
diff --git a/arch/arm/mach-exynos/include/mach/dwmci.h
b/arch/arm/mach-exynos/include/mach/dwmci.h
deleted file mode 100644
index 7ce6574..000
--- a/arch/arm/mach-exynos/include/mach/dwmci.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/dwmci.h
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * Synopsys DesignWare Mobile Storage for EXYNOS4210
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARM_ARCH_DWMCI_H
-#define __ASM_ARM_ARCH_DWMCI_H __FILE__
-
-#include linux/mmc/dw_mmc.h
-
-extern void exynos4_dwmci_set_platdata(struct dw_mci_board *pd);
-
-#endif /* __ASM_ARM_ARCH_DWMCI_H */
--
1.7.5.4
--
To
Re: [PATCH] ARM: Exynos: Remove unused non-dt support for dwmci controller
Hi Mr. Park,
On 26 November 2012 16:57, Kyungmin Park kmp...@infradead.org wrote:
On 11/26/12, Thomas Abraham thomas.abra...@linaro.org wrote:
With device tree support enabled for dwmci controller, the unused non-dt
support
for dwmci controller can be removed.
Are there no problem to use legacy board? e.g., universal_c210.
The objective of this patch was to reduce the gap that mach-exynos has
to participate in multi-platform kernel builds. It is difficult to
reduce this gap if we continue to add further non-dt support to
existing not-dt (legacy) board files. Exynos5 is fully dt-enabled now
and all further additions to mach-exynos will be/should be dt-only
code.
So what is currently holding us back in letting mach-exynos
participate in multi-platform kernel builds is the mainly the four
legacy board files (origen, smdkv310, nuri and universal) and
hopefully there will be some efforts towards getting them dt-enabled.
I understand that there is lot of work here to do but we have to start
somewhere.
Thanks,
Thomas.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
---
arch/arm/mach-exynos/Makefile |1 -
arch/arm/mach-exynos/dev-dwmci.c | 75
-
arch/arm/mach-exynos/include/mach/dwmci.h | 20
3 files changed, 0 insertions(+), 96 deletions(-)
delete mode 100644 arch/arm/mach-exynos/dev-dwmci.c
delete mode 100644 arch/arm/mach-exynos/include/mach/dwmci.h
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index c12ed6a..b189881 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -50,7 +50,6 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) +=
mach-exynos5-dt.o
obj-y+= dev-uart.o
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
-obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
diff --git a/arch/arm/mach-exynos/dev-dwmci.c
b/arch/arm/mach-exynos/dev-dwmci.c
deleted file mode 100644
index 7903501..000
--- a/arch/arm/mach-exynos/dev-dwmci.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos4/dev-dwmci.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Platform device for Synopsys DesignWare Mobile Storage IP
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include linux/kernel.h
-#include linux/dma-mapping.h
-#include linux/platform_device.h
-#include linux/interrupt.h
-#include linux/ioport.h
-#include linux/mmc/dw_mmc.h
-
-#include plat/devs.h
-
-#include mach/map.h
-
-static int exynos4_dwmci_get_bus_wd(u32 slot_id)
-{
- return 4;
-}
-
-static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void
*data)
-{
- return 0;
-}
-
-static struct resource exynos4_dwmci_resource[] = {
- [0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
- [1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
-};
-
-static struct dw_mci_board exynos4_dwci_pdata = {
- .num_slots = 1,
- .quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
- .bus_hz = 80 * 1000 * 1000,
- .detect_delay_ms= 200,
- .init = exynos4_dwmci_init,
- .get_bus_wd = exynos4_dwmci_get_bus_wd,
-};
-
-static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device exynos4_device_dwmci = {
- .name = dw_mmc,
- .id = -1,
- .num_resources = ARRAY_SIZE(exynos4_dwmci_resource),
- .resource = exynos4_dwmci_resource,
- .dev= {
- .dma_mask = exynos4_dwmci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = exynos4_dwci_pdata,
- },
-};
-
-void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd)
-{
- struct dw_mci_board *npd;
-
- npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
- exynos4_device_dwmci);
-
- if (!npd-init)
- npd-init = exynos4_dwmci_init;
- if (!npd-get_bus_wd)
- npd-get_bus_wd = exynos4_dwmci_get_bus_wd;
-}
diff --git a/arch/arm/mach-exynos/include/mach/dwmci.h
b/arch/arm/mach-exynos/include/mach/dwmci.h
deleted file mode 100644
index 7ce6574..000
--- a/arch/arm/mach-exynos/include/mach/dwmci.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/dwmci.h
- *
- *
Re: [RFC 1/2] ARM: S3C24XX: add devicetree support for interrupts
On 26 November 2012 21:34, Heiko Stübner he...@sntech.de wrote:
Hi Thomas,
Am Montag, 26. November 2012, 16:23:00 schrieb Thomas Abraham:
On 26 November 2012 17:43, Heiko Stübner he...@sntech.de wrote:
Hi Thomas,
Am Montag, 26. November 2012, 12:03:22 schrieb Thomas Abraham:
Hi Heiko,
On 25 November 2012 06:17, Heiko Stübner he...@sntech.de wrote:
This adds devicetree parsing of the controller-data for the
interrupt controllers on S3C24XX architectures.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
.../interrupt-controller/samsung,s3c24xx-irq.txt | 57 ++
arch/arm/mach-s3c24xx/common.h |1 +
arch/arm/plat-s3c24xx/irq.c| 197
3 files changed, 255 insertions(+), 0
deletions(-) create mode 100644
Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24x
x- irq.txt
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24
xx -irq.txt
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24
xx -irq.txt new file mode 100644
index 000..c637637
--- /dev/null
+++
b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24
xx -irq.txt @@ -0,0 +1,57 @@
+Samsung S3C24XX Interrupt Controllers
+
+The S3C24XX SoCs contain custom set of interrupt controllers
providing a +varying number of interrupt sources.
+
+The set consists of a main- and a sub-controller as well as a
controller +for the external interrupts and on newer SoCs even a
second main controller. +
+The bit-to-interrupt and parent mapping of the controllers is not
fixed +over all SoCs and therefore must be defined in the controller
description. +
+Required properties:
+- compatible: Compatible property value should be
samsung,s3c24xx-irq. +
+- reg: Physical base address of the controller and length of memory
mapped + region.
+
+- interrupt-controller : Identifies the node as an interrupt
controller +- #interrupt-cells : Specifies the number of cells needed
to encode an + interrupt source. The value shall be 2.
+
+- s3c24xx,irqlist : List of irqtypes found on this controller as
+ two-value pairs consisting of irqtype and parent-irq
+
+ parent-irq is always the list position of the irq in the irqlist
+ of the parent controller (0..31)
+
+ irqtypes are:
+ - 0 .. none
+ - 1 .. external interrupts in the main register (GPF0 .. GPF3)
+ - 2 .. edge irq in the main register
+ - 3 .. for parent-irqs, that have sub-irqs in child controllers
+ - 4 .. level irqs in the sub-register
+ - 5 .. edge irqs in the sub-register
+ - 6 .. external irqs in the external irq register (starting with
GPF4) + - 7 .. irq in the second base irq controller of
S3C2416/S3C2450 SoCs
Instead of defining the type of interrupt controller as above, is it
possible to create multiple device nodes, with each node representing
a type of interrupt controller with a unique compatible string and
corresponding properties. There will be a init function for each type
of interrupt controller. There should be a irq-domain for each of
these different types of interrupt controller. And then, in the device
tree source file, a proper tree like hierarchy of interrupt
controllers can defined (using the interrupt-parent property for each
controller node). The client nodes that generate the interrupt can
specify the parent node and the interrupt number within the parent to
which they generate the interrupt.
I'm not sure I understand yet :-). The list describes the types of
interrupts inside the individual controllers.
On all the s3c24xx we have three register sets denoting the main (SRCPND,
INTPND, INTMSK), sub (SUBSRCPEND, INTSUBMASK) and extint (EINTPEND,
EINTMASK) controllers. The bits of these registers are used for quite
different irqs.
We could consider main, sub and extint as three separate interrupt
controllers and thus three different nodes in device tree. So the
interrupt nodes could be something like (referring to 2416 manual).
main@0x4a00 {
compatible = samsung,s3c2410-main;
reg = 0x4a00 0x100;
interrupt-controller;
#interrupt-cells = 2;
};
sub@0x4a001000 {
compatible = samsung,s3c2410-sub;
reg = 0x4a001000 0x100;
interrupt-controller;
#interrupt-cells = 2;
interrupt-parent = main;
interrupts = 28 0, 23 0, . /*uart0/uart1/..*/
};
eint@0x4a002000 {
compatible = samsung,s3c2410-eint;
reg = 0x4a002000 0x100;
interrupt-controller;
#interrupt-cells = 2;
interrupt-parent = main;
interrupts = 0 0, 1 0,
2 0, 3 0,
Re: [PATCH] ARM: SAMSUNG: Fix build of I2S driver
On Tue, Nov 27, 2012 at 09:33:43AM +0900, Kukjin Kim wrote: I checked Samsung audio driver stuff just now. If you don't mind, I will drop the patch 48a2050d (ARM: SAMSUNG: Delete the unnecessary variable) instead of applying this. That works just as well for me, thanks. Padma, as I said in the commit log this should be done as part of a single patch series rather than sending separately to ARM or ASoC so that both trees continue to build at each point. If any unprepared patches for Samsung audio in my tree, please let me know. Will do. signature.asc Description: Digital signature
Re: [PATCH] ARM: SAMSUNG: Fix build of I2S driver
On Tue, Nov 27, 2012 at 12:13 PM, Mark Brown broo...@opensource.wolfsonmicro.com wrote: On Tue, Nov 27, 2012 at 09:33:43AM +0900, Kukjin Kim wrote: I checked Samsung audio driver stuff just now. If you don't mind, I will drop the patch 48a2050d (ARM: SAMSUNG: Delete the unnecessary variable) instead of applying this. That works just as well for me, thanks. Padma, as I said in the commit log this should be done as part of a single patch series rather than sending separately to ARM or ASoC so that both trees continue to build at each point. Ok. I will send as a single patch. If any unprepared patches for Samsung audio in my tree, please let me know. Will do. Thanks Padma -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
