Re: [PATCH 0/2] USB 3.2 initial support

2018-03-15 Thread Oliver Neukum 
Am Donnerstag, den 15.03.2018, 09:33 +0200 schrieb Mathias Nyman:
> On 14.03.2018 12:29, Oliver Neukum wrote:
> > 
> > We should also export all raw data we have. User space can be trusted
> > to get a multiplication right and it is not the kernels job
> > to interpret such data.
> 
> Do I understand correctly that you propose the "speed" sysfs entry
> should only show the lane signaling rate, i.e. 5000 or 1 for USB 3.x.

Yes. Well actually we should call it rate then.
And if you are paranoid split it in tx and rx.

> Adding rx_lanes and tx_lanes and keeping "speed" as lane signaling rate
> is probably the cleanest and most straight forward approach.
> 
> I still would like to add  a "Gen XxY" or "SSIC" to the
> "new/reset SuperSpeed USB device number  using " dev_info string.

Definitely

> It's a quick way of checking if the device works at the expected speed when
> connecting a device.

Indeed. In the journal everything is fair and we definitely want
to tell at glance whether we got the lane count or the rate wrong.

Regards
Oliver

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Re: [PATCH 0/2] USB 3.2 initial support

2018-03-15 Thread Mathias Nyman 

On 14.03.2018 12:29, Oliver Neukum wrote:

Am Dienstag, den 13.03.2018, 19:22 +0200 schrieb Mathias Nyman:


My understanding is that Gen XxY notion is only used for symmetric devices
where tx lanes = rx lanes. Only SSIC devices can be asymmetric.

USB 3.2 spec mentions the (Gen 1x1, 1x2, 2x1 and 2x2) alternatives, nothing 
more.
Nothing about different lane counts on rx and tx related to Gen XxY.


Hi,

normally I would say that we should worry about this only when we need
to, but an API in sysfs is an exception to that rule. We can avoid
pain later if we export lane counts for both directions now
in all cases.


Sounds reasonable, I'll add both rx_lanes and tx_lanes



We should also export all raw data we have. User space can be trusted
to get a multiplication right and it is not the kernels job
to interpret such data.


Do I understand correctly that you propose the "speed" sysfs entry
should only show the lane signaling rate, i.e. 5000 or 1 for USB 3.x.

Adding rx_lanes and tx_lanes and keeping "speed" as lane signaling rate
is probably the cleanest and most straight forward approach.

I still would like to add  a "Gen XxY" or "SSIC" to the
"new/reset SuperSpeed USB device number  using " dev_info string.
It's a quick way of checking if the device works at the expected speed when
connecting a device.

An thoughts about that?

-Mathias
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Re: [PATCH 0/2] USB 3.2 initial support

2018-03-14 Thread Oliver Neukum 
Am Dienstag, den 13.03.2018, 19:22 +0200 schrieb Mathias Nyman:

> My understanding is that Gen XxY notion is only used for symmetric devices
> where tx lanes = rx lanes. Only SSIC devices can be asymmetric.
> 
> USB 3.2 spec mentions the (Gen 1x1, 1x2, 2x1 and 2x2) alternatives, nothing 
> more.
> Nothing about different lane counts on rx and tx related to Gen XxY.

Hi,

normally I would say that we should worry about this only when we need
to, but an API in sysfs is an exception to that rule. We can avoid
pain later if we export lane counts for both directions now
in all cases.

We should also export all raw data we have. User space can be trusted
to get a multiplication right and it is not the kernels job
to interpret such data.

Regards
Oliver

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Re: [PATCH 0/2] USB 3.2 initial support

2018-03-14 Thread Mathias Nyman 

On 13.03.2018 21:58, Adrian Bocaniciu wrote:

On Tue, 13 Mar 2018 17:27:21 +0200
Mathias Nyman  wrote:


Example for clarification:
Gen 1x1 = 5Gbps, SuperSpeed, one lane, same as USB3.0, and USB 3.1 Gen1
Gen 2x1 = 10Gbps, SuperSpeedPlus, one lane, same as USB 3.1 Gen2
Gen 1x2 = 10Gbps, SuperSpeed, Dual-lane (2 x 5Gbps)
Gen 2x2 = 20Gbps, SuperSpeedPlus, Dual-lane (2 x 10Gbps)


4. Should the "speed" sysfs entry be more accurate? USB 3.1 and later
can list different supported lane speeds other than the 5Gbps or 10Gbps.
actual port speed would be lane count * current lane speed in use.
Or do we just keep it simple and show the maximum signaling
rate * lane count, i.e. 5000, 1 or 2?
and show "SSIC" instead of "Gen XxY" for asymetric lane SSIC devices,
skipping details on rx and tx lane counts.



Please do not compute "signaling rate * count", because it is very misleading 
and that value cannot be used to verify whether the hardware works at its maximum 
available speed or not.

Gen 1x2 is not 5 * 2 = 10 Gbps, but only 8 Gbps (like Gb Ethernet is 1 Gbps, 
not 1.25 Gbps), while Gen 2x1 is very close to 10 Gbps, i.e. significantly 
faster (due to a different encoding), so it would be wrong to display them as 
equivalent.



Good point, There is a collision where both Gen 1x2 and and Gen 2x1 both would 
show
10Gbps as "speed" as it so far is based on signaling rate.

But I think this boils down to a compromise between usability, complexity and 
amount of people
we are misleading.

The USB "speeds" are commonly known as 1.5Mbps, 12Mbps, 480Mbps, 5Gbps, and 
10Gbps.
That's what people remember and are probably written on boxes and in wikipedia.

If we take the line Encoding into account the speeds will be:

Gen 1x1 = 4Gbps (8b/10b)
Gen 1x2 = 8Gbps
Gen 2x1 = 9.697Gbps (128b/132b)
Gen 2x2 = 19.394Gbps

Or if we take into account flow control, packet framing and protocol
overhead the effective bandwidth is even less.

I think we will get far more people concerned about their USB 3 device working
only at 4Gbps in Linux when it should be 5Gbps, than we get complaints about 
someone
actually comparing throughputs of Gen 2x1 and Gen 1x2 devices, not being aware 
of
different encodings and overhead.

To verify if the hardware works at it maximum available speed It would be 
important
to show either the lane count or Gen XxY version to the user.

One option is to not show 10Gbps (1) as the sysfs "speed" for Gen 1x2, but 
instead
something like "Dual5000" or "5000x2", but that again can hit scrips and 
userspace
programs expecting "speed" to be numerical. And it feels like adding 
unnecessary complexity

-Mathias
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Re: [PATCH 0/2] USB 3.2 initial support

2018-03-13 Thread Adrian Bocaniciu 
On Tue, 13 Mar 2018 17:27:21 +0200
Mathias Nyman  wrote:

> Example for clarification:
> Gen 1x1 = 5Gbps, SuperSpeed, one lane, same as USB3.0, and USB 3.1 Gen1
> Gen 2x1 = 10Gbps, SuperSpeedPlus, one lane, same as USB 3.1 Gen2
> Gen 1x2 = 10Gbps, SuperSpeed, Dual-lane (2 x 5Gbps)
> Gen 2x2 = 20Gbps, SuperSpeedPlus, Dual-lane (2 x 10Gbps)
> 
> 
> 4. Should the "speed" sysfs entry be more accurate? USB 3.1 and later
>can list different supported lane speeds other than the 5Gbps or 10Gbps.
>actual port speed would be lane count * current lane speed in use.
>Or do we just keep it simple and show the maximum signaling
>rate * lane count, i.e. 5000, 1 or 2?
> and show "SSIC" instead of "Gen XxY" for asymetric lane SSIC devices,
> skipping details on rx and tx lane counts.
> 

Please do not compute "signaling rate * count", because it is very misleading 
and that value cannot be used to verify whether the hardware works at its 
maximum available speed or not.

Gen 1x2 is not 5 * 2 = 10 Gbps, but only 8 Gbps (like Gb Ethernet is 1 Gbps, 
not 1.25 Gbps), while Gen 2x1 is very close to 10 Gbps, i.e. significantly 
faster (due to a different encoding), so it would be wrong to display them as 
equivalent.

 Best regards!

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Re: [PATCH 0/2] USB 3.2 initial support

2018-03-13 Thread Mathias Nyman 

On 13.03.2018 17:27, Felipe Balbi wrote:


Hi,

Mathias Nyman  writes:


The USB 3.2 specification adds support for Dual-lane, doubling the
maximum rate to 20Gbps by taking into use another set of rx and tx
wires and pins in the Type-C cable and connector.

The changes to support this in USB core and xhci driver seems to be minor.
USB 3.1 support already added the extended port status request returning
lane count. it just wasn't used before.

I'd like to use these patches to start a discussion about which items
regarding Dual-lane and USB 3.2 should be exposed to userspace and how.

These patches add a variable "lanes" to store the number of lanes
in use, and adds the Gen XxY notion to the string displayed when a new
device is connected. X in Gen XxY stands for signaling rate,
Y for lane count, as described in the USB 3.2 specification.

Example for clarification:
Gen 1x1 = 5Gbps, SuperSpeed, one lane, same as USB3.0, and USB 3.1 Gen1
Gen 2x1 = 10Gbps, SuperSpeedPlus, one lane, same as USB 3.1 Gen2
Gen 1x2 = 10Gbps, SuperSpeed, Dual-lane (2 x 5Gbps)
Gen 2x2 = 20Gbps, SuperSpeedPlus, Dual-lane (2 x 10Gbps)


it's a little more interesting than that, no?

IIRC, we can Gen 2x2 RX and Gen 2x1 TX (and vice-versa).



My understanding is that Gen XxY notion is only used for symmetric devices
where tx lanes = rx lanes. Only SSIC devices can be asymmetric.

USB 3.2 spec mentions the (Gen 1x1, 1x2, 2x1 and 2x2) alternatives, nothing 
more.
Nothing about different lane counts on rx and tx related to Gen XxY.

USB 3.2 section 8.5.6.7:
"Asymmetric Lane Types may only be reported by SuperSpeed Interchip (SSIC) 
devices. A
Symmetric link is one that has the same Lane Speed and number of lanes for both 
the Rx and
Tx Sublinks. Enhanced SuperSpeed devices shall only support Symmetric links

SSIC spec doesn't mention Gen XxY or any "Gen" at all, SSIC can support x1, x2 
or x4 lanes,
but only at SuperSpeed 5Gbps signaling rate per lane.

-Mathias  
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Re: [PATCH 0/2] USB 3.2 initial support

2018-03-13 Thread Felipe Balbi 

Hi,

Mathias Nyman  writes:

> The USB 3.2 specification adds support for Dual-lane, doubling the
> maximum rate to 20Gbps by taking into use another set of rx and tx
> wires and pins in the Type-C cable and connector.
>
> The changes to support this in USB core and xhci driver seems to be minor.
> USB 3.1 support already added the extended port status request returning
> lane count. it just wasn't used before.
>
> I'd like to use these patches to start a discussion about which items
> regarding Dual-lane and USB 3.2 should be exposed to userspace and how.
>
> These patches add a variable "lanes" to store the number of lanes
> in use, and adds the Gen XxY notion to the string displayed when a new
> device is connected. X in Gen XxY stands for signaling rate,
> Y for lane count, as described in the USB 3.2 specification.
>
> Example for clarification:
> Gen 1x1 = 5Gbps, SuperSpeed, one lane, same as USB3.0, and USB 3.1 Gen1
> Gen 2x1 = 10Gbps, SuperSpeedPlus, one lane, same as USB 3.1 Gen2
> Gen 1x2 = 10Gbps, SuperSpeed, Dual-lane (2 x 5Gbps)
> Gen 2x2 = 20Gbps, SuperSpeedPlus, Dual-lane (2 x 10Gbps)

it's a little more interesting than that, no?

IIRC, we can Gen 2x2 RX and Gen 2x1 TX (and vice-versa).

-- 
balbi
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