Re: [Mesa-dev] EGL: Question about deferred context and surface destroy
On 04/28/2017 08:08 AM, Tapani Pälli wrote:
On 04/28/2017 08:05 AM, Tapani Pälli wrote:
On 04/27/2017 06:59 PM, Mike Gorchak wrote:
Hi Tapani,
Could you please do modification like I suggested to eglut library
and check how it is going?
I'm asking because I see following code:
EGLBoolean EGLAPIENTRY
eglDestroySurface(EGLDisplay dpy, EGLSurface surface)
{
_EGLDisplay *disp = _eglLockDisplay(dpy);
_EGLSurface *surf = _eglLookupSurface(surface, disp);
_EGLDriver *drv;
EGLBoolean ret;
_EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE);
_EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv);
_eglUnlinkSurface(surf);
ret = drv->API.DestroySurface(drv, disp, surf);
RETURN_EGL_EVAL(disp, ret);
}
It does explicit call to _eglUnlinkSurface(surf) without any
conditions which unlinks Surface from current Display and then if we
re-use this surface, for example, in eglSwapBuffer() it return
EGL_BAD_SURFACE, because _eglCheckSurface() will return error (NULL).
This surface was unlinked from Display, but not yet destroyed.
ok, so in the driver side we do handle refcount but the API side has
called _eglUnlinkSurface ... yeah, this looks a bit weird, I'll try to
think of an example for this.
I did not quite get your eglut proposal, I believe in that one I will
be destroying surface and context since no other thread has them
current at that point. I should have 2 threads where both have made
surface current and then destroy surface in another and make sure
surface is still usable in another, right?
Sorry nope, now I got it. You mean surface should survive because it is
still current at same thread.
Which IMO is not right, although I agree that EGL spec could state it
more clearly. For surfaces the spec says:
"Following eglDestroySurface, the surface and the handle referring to it
are treated in the same fashion as a surface destroyed by eglTerminate
(see section 3.2)."
which says:
"Termination marks all EGL-specific resources, such as contexts and
surfaces, associated with the specified display for deletion. Handles to
all such resources are invalid as soon as eglTerminate returns, but the
dpy handle itself remains valid. Passing such handles to any other EGL
command will generate EGL_BAD_SURFACE or EGL_BAD_CONTEXT errors."
And as bonus there is also section 'Updates to EGL 1.4" that has this:
"Change object destruction behavior such that object handles become
invalid immediately after an object is deleted, although the underlying
object may remain valid if it’s current to a context. This affects
eglTerminate (section 3.2), eglDestroySurface (section 3.5.5),
eglDestroyContext (section 3.7.2), and eglGetCurrentContext and
eglGetCurrentSurface (section 3.7.4)."
Same applies for Context resource.
Thank you!
On Thu, Apr 27, 2017 at 2:37 AM, Tapani Pälli > wrote:
On 04/26/2017 05:08 PM, Mike Gorchak wrote:
Hi Tapani,
Sure, I can share them, but they are QNX based. And as far as I
remember it was an issue in the past :)
I thought to ask because there are some multithread dEQP EGL tests
around this and they are passing at the moment.
Surface and context reference counts are incremented in
_eglBindContext that gets called during makecurrent. Surface count
decrements via _eglPutSurface and _eglPutContext calls. AFAIK
everything looks OK.
I think the simplest way for you is to add following calls to
function eglutCreateWindow():
https://cgit.freedesktop.org/mesa/demos/tree/src/egl/eglut/eglut.c#n321
|if (!eglMakeCurrent(_eglut->dpy, win->surface, win->surface,
win->context)) _eglutFatal("failed to make window current");|
to
|if (!eglMakeCurrent(_eglut->dpy, win->surface, win->surface,
win->context)) _eglutFatal("failed to make window current");
|
|||eglDestroySurface(|||_eglut->dpy, win->surface|);|
|eglDestroyContext||(_eglut->dpy, win->context||);|
And then run GLES 1.x gears for example. According to EGL
specification, these Destroy calls should be delayed till
surface and context is not current in any thread. Perhaps I
understand specification too literally, that's why I'm asking
rather than reporting it as a bug.
Thank you!
On Wed, Apr 26, 2017 at 2:09 AM, Tapani Pälli
mailto:tapani.pa...@intel.com>
>>
wrote:
On 04/25/2017 10:20 PM, Mike Gorchak wrote:
Hi all,
During a quick tests of latest Mesa3D versions at
different
branches 12.x, 13.x, 17.x we have found that deferred
context and
surface destroy doesn't work properly.
Re: [Mesa-dev] EGL: Question about deferred context and surface destroy
On 04/28/2017 08:05 AM, Tapani Pälli wrote:
On 04/27/2017 06:59 PM, Mike Gorchak wrote:
Hi Tapani,
Could you please do modification like I suggested to eglut library and
check how it is going?
I'm asking because I see following code:
EGLBoolean EGLAPIENTRY
eglDestroySurface(EGLDisplay dpy, EGLSurface surface)
{
_EGLDisplay *disp = _eglLockDisplay(dpy);
_EGLSurface *surf = _eglLookupSurface(surface, disp);
_EGLDriver *drv;
EGLBoolean ret;
_EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE);
_EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv);
_eglUnlinkSurface(surf);
ret = drv->API.DestroySurface(drv, disp, surf);
RETURN_EGL_EVAL(disp, ret);
}
It does explicit call to _eglUnlinkSurface(surf) without any
conditions which unlinks Surface from current Display and then if we
re-use this surface, for example, in eglSwapBuffer() it return
EGL_BAD_SURFACE, because _eglCheckSurface() will return error (NULL).
This surface was unlinked from Display, but not yet destroyed.
ok, so in the driver side we do handle refcount but the API side has
called _eglUnlinkSurface ... yeah, this looks a bit weird, I'll try to
think of an example for this.
I did not quite get your eglut proposal, I believe in that one I will be
destroying surface and context since no other thread has them current at
that point. I should have 2 threads where both have made surface current
and then destroy surface in another and make sure surface is still
usable in another, right?
Sorry nope, now I got it. You mean surface should survive because it is
still current at same thread.
Same applies for Context resource.
Thank you!
On Thu, Apr 27, 2017 at 2:37 AM, Tapani Pälli > wrote:
On 04/26/2017 05:08 PM, Mike Gorchak wrote:
Hi Tapani,
Sure, I can share them, but they are QNX based. And as far as I
remember it was an issue in the past :)
I thought to ask because there are some multithread dEQP EGL tests
around this and they are passing at the moment.
Surface and context reference counts are incremented in
_eglBindContext that gets called during makecurrent. Surface count
decrements via _eglPutSurface and _eglPutContext calls. AFAIK
everything looks OK.
I think the simplest way for you is to add following calls to
function eglutCreateWindow():
https://cgit.freedesktop.org/mesa/demos/tree/src/egl/eglut/eglut.c#n321
|if (!eglMakeCurrent(_eglut->dpy, win->surface, win->surface,
win->context)) _eglutFatal("failed to make window current");|
to
|if (!eglMakeCurrent(_eglut->dpy, win->surface, win->surface,
win->context)) _eglutFatal("failed to make window current");
|
|||eglDestroySurface(|||_eglut->dpy, win->surface|);|
|eglDestroyContext||(_eglut->dpy, win->context||);|
And then run GLES 1.x gears for example. According to EGL
specification, these Destroy calls should be delayed till
surface and context is not current in any thread. Perhaps I
understand specification too literally, that's why I'm asking
rather than reporting it as a bug.
Thank you!
On Wed, Apr 26, 2017 at 2:09 AM, Tapani Pälli
mailto:tapani.pa...@intel.com>
>>
wrote:
On 04/25/2017 10:20 PM, Mike Gorchak wrote:
Hi all,
During a quick tests of latest Mesa3D versions at
different
branches 12.x, 13.x, 17.x we have found that deferred
context and
surface destroy doesn't work properly.
What kind of test case are you using, could you share this?
According to docs:
https://www.khronos.org/registry/EGL/sdk/docs/man/html/eglDestroySurface.xhtml
>
Description
If the EGL surface is not current to any thread,
eglDestroySurface
destroys it immediately. Otherwise, surface is
destroyed when it
becomes not current to any thread. Furthermore,
resources
associated with a pbuffer surface are not released
until all color
buffers of that pbuffer bound to a texture object have
been released.
Same for context destroy:
https://www.khronos.org/registry/EGL/sdk/docs/man/html/eglDestroyContext.xhtml
Re: [Mesa-dev] EGL: Question about deferred context and surface destroy
On 04/27/2017 06:59 PM, Mike Gorchak wrote:
Hi Tapani,
Could you please do modification like I suggested to eglut library and
check how it is going?
I'm asking because I see following code:
EGLBoolean EGLAPIENTRY
eglDestroySurface(EGLDisplay dpy, EGLSurface surface)
{
_EGLDisplay *disp = _eglLockDisplay(dpy);
_EGLSurface *surf = _eglLookupSurface(surface, disp);
_EGLDriver *drv;
EGLBoolean ret;
_EGL_FUNC_START(disp, EGL_OBJECT_SURFACE_KHR, surf, EGL_FALSE);
_EGL_CHECK_SURFACE(disp, surf, EGL_FALSE, drv);
_eglUnlinkSurface(surf);
ret = drv->API.DestroySurface(drv, disp, surf);
RETURN_EGL_EVAL(disp, ret);
}
It does explicit call to _eglUnlinkSurface(surf) without any conditions
which unlinks Surface from current Display and then if we re-use this
surface, for example, in eglSwapBuffer() it return EGL_BAD_SURFACE,
because _eglCheckSurface() will return error (NULL). This surface was
unlinked from Display, but not yet destroyed.
ok, so in the driver side we do handle refcount but the API side has
called _eglUnlinkSurface ... yeah, this looks a bit weird, I'll try to
think of an example for this.
I did not quite get your eglut proposal, I believe in that one I will be
destroying surface and context since no other thread has them current at
that point. I should have 2 threads where both have made surface current
and then destroy surface in another and make sure surface is still
usable in another, right?
Same applies for Context resource.
Thank you!
On Thu, Apr 27, 2017 at 2:37 AM, Tapani Pälli > wrote:
On 04/26/2017 05:08 PM, Mike Gorchak wrote:
Hi Tapani,
Sure, I can share them, but they are QNX based. And as far as I
remember it was an issue in the past :)
I thought to ask because there are some multithread dEQP EGL tests
around this and they are passing at the moment.
Surface and context reference counts are incremented in
_eglBindContext that gets called during makecurrent. Surface count
decrements via _eglPutSurface and _eglPutContext calls. AFAIK
everything looks OK.
I think the simplest way for you is to add following calls to
function eglutCreateWindow():
https://cgit.freedesktop.org/mesa/demos/tree/src/egl/eglut/eglut.c#n321
|if (!eglMakeCurrent(_eglut->dpy, win->surface, win->surface,
win->context)) _eglutFatal("failed to make window current");|
to
|if (!eglMakeCurrent(_eglut->dpy, win->surface, win->surface,
win->context)) _eglutFatal("failed to make window current");
|
|||eglDestroySurface(|||_eglut->dpy, win->surface|);|
|eglDestroyContext||(_eglut->dpy, win->context||);|
And then run GLES 1.x gears for example. According to EGL
specification, these Destroy calls should be delayed till
surface and context is not current in any thread. Perhaps I
understand specification too literally, that's why I'm asking
rather than reporting it as a bug.
Thank you!
On Wed, Apr 26, 2017 at 2:09 AM, Tapani Pälli
mailto:tapani.pa...@intel.com>
>>
wrote:
On 04/25/2017 10:20 PM, Mike Gorchak wrote:
Hi all,
During a quick tests of latest Mesa3D versions at different
branches 12.x, 13.x, 17.x we have found that deferred
context and
surface destroy doesn't work properly.
What kind of test case are you using, could you share this?
According to docs:
https://www.khronos.org/registry/EGL/sdk/docs/man/html/eglDestroySurface.xhtml
>
Description
If the EGL surface is not current to any thread,
eglDestroySurface
destroys it immediately. Otherwise, surface is
destroyed when it
becomes not current to any thread. Furthermore, resources
associated with a pbuffer surface are not released
until all color
buffers of that pbuffer bound to a texture object have
been released.
Same for context destroy:
https://www.khronos.org/registry/EGL/sdk/docs/man/html/eglDestroyContext.xhtml
Re: [Mesa-dev] [PATCH 04/18] anv: Get rid of a bunch of uses of size_t
On Thu, Apr 27, 2017 at 9:23 AM, Juan A. Suarez Romero
wrote:
> On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote:
> > We should only use size_t when referring to sizes of bits of CPU memory.
> > Anything on the GPU or just a regular array length should be a type that
> > has the same size on both 32 and 64-bit architectures. For state
> > objects, we use a uint32_t because we'll never allocate a piece of
> > driver-internal GPU state larger than 2GB (more like 16KB).
> > ---
> > src/intel/vulkan/anv_allocator.c | 12 ++--
> > src/intel/vulkan/anv_gem.c | 2 +-
> > src/intel/vulkan/anv_gem_stubs.c | 2 +-
> > src/intel/vulkan/anv_private.h | 12 ++--
> > 4 files changed, 14 insertions(+), 14 deletions(-)
> >
> > diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_
> allocator.c
> > index 1c94d1b..2dad400 100644
> > --- a/src/intel/vulkan/anv_allocator.c
> > +++ b/src/intel/vulkan/anv_allocator.c
> > @@ -342,7 +342,7 @@ anv_block_pool_finish(struct anv_block_pool *pool)
> > static uint32_t
> > anv_block_pool_grow(struct anv_block_pool *pool, struct anv_block_state
> *state)
> > {
> > - size_t size;
> > + uint32_t size;
> > void *map;
> > uint32_t gem_handle;
> > struct anv_mmap_cleanup *cleanup;
> > @@ -367,7 +367,7 @@ anv_block_pool_grow(struct anv_block_pool *pool,
> struct anv_block_state *state)
> >
> > assert(state == &pool->state || back_used > 0);
> >
> > - size_t old_size = pool->bo.size;
> > + uint32_t old_size = pool->bo.size;
> >
> > if (old_size != 0 &&
> > back_used * 2 <= pool->center_bo_offset &&
>
>
> While checking this patch, I've notice we have the following comment in
> the anv_block_pool_grow()
>
>/* We can't have a block pool bigger than 1GB because we use signed
> * 32-bit offsets in the free list and we don't want overflow. We
> * should never need a block pool bigger than 1GB anyway.
> */
>assert(size <= (1u << 31));
>
> Is the comment correct? Shouldn't say 2Gb?
>
1 or 2; I can't remember at the moment. I thought there was something
weird with Android that required us to drop it to 1.
> Other than that,
>
> Reviewed-by: Juan A. Suarez Romero
>
>
> > @@ -613,7 +613,7 @@ anv_block_pool_free(struct anv_block_pool *pool,
> int32_t offset)
> >
> > static void
> > anv_fixed_size_state_pool_init(struct anv_fixed_size_state_pool *pool,
> > - size_t state_size)
> > + uint32_t state_size)
> > {
> > /* At least a cache line and must divide the block size. */
> > assert(state_size >= 64 && util_is_power_of_two(state_size));
> > @@ -672,7 +672,7 @@ anv_state_pool_init(struct anv_state_pool *pool,
> > {
> > pool->block_pool = block_pool;
> > for (unsigned i = 0; i < ANV_STATE_BUCKETS; i++) {
> > - size_t size = 1 << (ANV_MIN_STATE_SIZE_LOG2 + i);
> > + uint32_t size = 1 << (ANV_MIN_STATE_SIZE_LOG2 + i);
> >anv_fixed_size_state_pool_init(&pool->buckets[i], size);
> > }
> > VG(VALGRIND_CREATE_MEMPOOL(pool, 0, false));
> > @@ -686,7 +686,7 @@ anv_state_pool_finish(struct anv_state_pool *pool)
> >
> > static struct anv_state
> > anv_state_pool_alloc_no_vg(struct anv_state_pool *pool,
> > - size_t size, size_t align)
> > + uint32_t size, uint32_t align)
> > {
> > unsigned size_log2 = ilog2_round_up(size < align ? align : size);
> > assert(size_log2 <= ANV_MAX_STATE_SIZE_LOG2);
> > @@ -703,7 +703,7 @@ anv_state_pool_alloc_no_vg(struct anv_state_pool
> *pool,
> > }
> >
> > struct anv_state
> > -anv_state_pool_alloc(struct anv_state_pool *pool, size_t size, size_t
> align)
> > +anv_state_pool_alloc(struct anv_state_pool *pool, uint32_t size,
> uint32_t align)
> > {
> > if (size == 0)
> >return ANV_STATE_NULL;
> > diff --git a/src/intel/vulkan/anv_gem.c b/src/intel/vulkan/anv_gem.c
> > index 185086f..4b6ee58 100644
> > --- a/src/intel/vulkan/anv_gem.c
> > +++ b/src/intel/vulkan/anv_gem.c
> > @@ -48,7 +48,7 @@ anv_ioctl(int fd, unsigned long request, void *arg)
> > * Return gem handle, or 0 on failure. Gem handles are never 0.
> > */
> > uint32_t
> > -anv_gem_create(struct anv_device *device, size_t size)
> > +anv_gem_create(struct anv_device *device, uint64_t size)
> > {
> > struct drm_i915_gem_create gem_create = {
> >.size = size,
> > diff --git a/src/intel/vulkan/anv_gem_stubs.c
> b/src/intel/vulkan/anv_gem_stubs.c
> > index a63e96d..8d81eb5 100644
> > --- a/src/intel/vulkan/anv_gem_stubs.c
> > +++ b/src/intel/vulkan/anv_gem_stubs.c
> > @@ -34,7 +34,7 @@ memfd_create(const char *name, unsigned int flags)
> > }
> >
> > uint32_t
> > -anv_gem_create(struct anv_device *device, size_t size)
> > +anv_gem_create(struct anv_device *device, uint64_t size)
> > {
> > int fd = memfd_create("fake bo", MFD_CLOEXEC);
> > if (fd == -1)
> > diff --git a/src/intel/vulkan/anv_private.h b/src/int
Re: [Mesa-dev] [PATCH] util/disk_cache: remove percentage based max cache limit
On 28/04/17 12:05 PM, Timothy Arceri wrote: > The more I think about it the more this seems like a bad idea. > When we were deleting old cache dirs this wasn't so bad as it > was unlikely we would ever hit the actual limit before things > were cleaned up. Now that we only start cleaning up old cache > items once the limit is reached the a percentage based max > cache limit is more risky. > > For the inital release of shader cache I think its better to > stick to a more conservative cache limit, at least until we > have some way of cleaning up the cache more aggressively. > > Cc: "17.1" Reviewed-by: Michel Dänzer -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 01/18] anv/allocator: Add no-valgrind versions of state_pool_alloc/free
On Thu, Apr 27, 2017 at 9:20 AM, Juan A. Suarez Romero
wrote:
> On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/vulkan/anv_allocator.c | 24 +++-
> > 1 file changed, 19 insertions(+), 5 deletions(-)
> >
> > diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_
> allocator.c
> > index 784191e..594cf49 100644
> > --- a/src/intel/vulkan/anv_allocator.c
> > +++ b/src/intel/vulkan/anv_allocator.c
> > @@ -684,8 +684,9 @@ anv_state_pool_finish(struct anv_state_pool *pool)
> > VG(VALGRIND_DESTROY_MEMPOOL(pool));
> > }
> >
> > -struct anv_state
> > -anv_state_pool_alloc(struct anv_state_pool *pool, size_t size, size_t
> align)
> > +static struct anv_state
> > +anv_state_pool_alloc_no_vg(struct anv_state_pool *pool,
> > + size_t size, size_t align)
> > {
> > unsigned size_log2 = ilog2_round_up(size < align ? align : size);
> > assert(size_log2 <= ANV_MAX_STATE_SIZE_LOG2);
> > @@ -698,12 +699,19 @@ anv_state_pool_alloc(struct anv_state_pool *pool,
> size_t size, size_t align)
> > state.offset = anv_fixed_size_state_pool_
> alloc(&pool->buckets[bucket],
> >pool->block_pool);
> > state.map = pool->block_pool->map + state.offset;
> > + return state;
> > +}
> > +
> > +struct anv_state
> > +anv_state_pool_alloc(struct anv_state_pool *pool, size_t size, size_t
> align)
> > +{
> > + struct anv_state state = anv_state_pool_alloc_no_vg(pool, size,
> align);
> > VG(VALGRIND_MEMPOOL_ALLOC(pool, state.map, size));
> > return state;
> > }
> >
>
>
> Is it really worth to have a different function? I would understand if
> the valgrind and no-valgrind where totally different.
>
The valgrind step has to be done at the last possible moment before we hand
the pointer back to the "user". With the state stream pulling from the
state pool, this means that, for anything allocated by the stream, it needs
to be done by the stream and not the pool. These helpers let us skip the
valgrind alloc/free markers when we're pulling through the stream until
state_stream_alloc/free.
--Jason
> >
> > -void
> > -anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state)
> > +static void
> > +anv_state_pool_free_no_vg(struct anv_state_pool *pool, struct
> anv_state state)
> > {
> > assert(util_is_power_of_two(state.alloc_size));
> > unsigned size_log2 = ilog2_round_up(state.alloc_size);
> > @@ -711,11 +719,17 @@ anv_state_pool_free(struct anv_state_pool *pool,
> struct anv_state state)
> >size_log2 <= ANV_MAX_STATE_SIZE_LOG2);
> > unsigned bucket = size_log2 - ANV_MIN_STATE_SIZE_LOG2;
> >
> > - VG(VALGRIND_MEMPOOL_FREE(pool, state.map));
> > anv_fixed_size_state_pool_free(&pool->buckets[bucket],
> >pool->block_pool, state.offset);
> > }
> >
> > +void
> > +anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state)
> > +{
> > + VG(VALGRIND_MEMPOOL_FREE(pool, state.map));
> > + anv_state_pool_free_no_vg(pool, state);
> > +}
> > +
> > #define NULL_BLOCK 1
> > struct anv_state_stream_block {
> > /* The next block */
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 03/18] anv/allocator: Convert the state stream to pull from a state pool
On Wed, Apr 26, 2017 at 9:04 AM, Juan A. Suarez Romero
wrote:
> On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/vulkan/anv_allocator.c | 71
> +--
> > src/intel/vulkan/anv_cmd_buffer.c | 8 ++--
> > src/intel/vulkan/anv_descriptor_set.c | 4 +-
> > src/intel/vulkan/anv_private.h| 21 ++-
> > 4 files changed, 52 insertions(+), 52 deletions(-)
> >
> > diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_
> allocator.c
> > index d93d4c9..1c94d1b 100644
> > --- a/src/intel/vulkan/anv_allocator.c
> > +++ b/src/intel/vulkan/anv_allocator.c
> > @@ -736,14 +736,12 @@ anv_state_pool_free(struct anv_state_pool *pool,
> struct anv_state state)
> > anv_state_pool_free_no_vg(pool, state);
> > }
> >
> > -#define NULL_BLOCK 1
> > struct anv_state_stream_block {
> > + struct anv_state block;
> > +
> > /* The next block */
> > struct anv_state_stream_block *next;
> >
> > - /* The offset into the block pool at which this block starts */
> > - uint32_t offset;
> > -
> > #ifdef HAVE_VALGRIND
> > /* A pointer to the first user-allocated thing in this block. This
> is
> > * what valgrind sees as the start of the block.
> > @@ -757,16 +755,18 @@ struct anv_state_stream_block {
> > */
> > void
> > anv_state_stream_init(struct anv_state_stream *stream,
> > - struct anv_block_pool *block_pool)
> > + struct anv_state_pool *state_pool,
> > + uint32_t block_size)
> > {
> > - stream->block_pool = block_pool;
> > - stream->block = NULL;
> > + stream->state_pool = state_pool;
> > + stream->block_size = block_size;
>
There's a bug here where I don't initialize stream->block. It's fixed
locally.
> > - /* Ensure that next + whatever > end. This way the first call to
> > + stream->block_list = NULL;
> > +
> > + /* Ensure that next + whatever > block_size. This way the first
> call to
> > * state_stream_alloc fetches a new block.
> > */
> > - stream->next = 1;
> > - stream->end = 0;
> > + stream->next = block_size;
> >
> > VG(VALGRIND_CREATE_MEMPOOL(stream, 0, false));
> > }
> > @@ -774,14 +774,12 @@ anv_state_stream_init(struct anv_state_stream
> *stream,
> > void
> > anv_state_stream_finish(struct anv_state_stream *stream)
> > {
> > - VG(const uint32_t block_size = stream->block_pool->block_size);
> > -
> > - struct anv_state_stream_block *next = stream->block;
> > + struct anv_state_stream_block *next = stream->block_list;
> > while (next != NULL) {
> >struct anv_state_stream_block sb = VG_NOACCESS_READ(next);
> >VG(VALGRIND_MEMPOOL_FREE(stream, sb._vg_ptr));
> > - VG(VALGRIND_MAKE_MEM_UNDEFINED(next, block_size));
> > - anv_block_pool_free(stream->block_pool, sb.offset);
> > + VG(VALGRIND_MAKE_MEM_UNDEFINED(next, stream->block_size));
> > + anv_state_pool_free_no_vg(stream->state_pool, sb.block);
> >next = sb.next;
> > }
> >
> > @@ -795,35 +793,36 @@ anv_state_stream_alloc(struct anv_state_stream
> *stream,
> > if (size == 0)
> >return ANV_STATE_NULL;
> >
> > - struct anv_state_stream_block *sb = stream->block;
> > + uint32_t offset = align_u32(stream->next, alignment);
> > + if (offset + size > stream->block_size) {
> > + stream->block = anv_state_pool_alloc_no_vg(stream->state_pool,
> > + stream->block_size,
> > + stream->block_size);
>
>
> Why are we calling anv_state_pool_alloc_no_vg() with block_size twice?
> Shouldn't we use alignment as the last parameter?
>
Actually, what we really want here is page alignment. All alignments
passed into the allocator will be no more than the page size and we can't
guarantee an alignment larger than that anyway. I've locally changed this
to pass PAGE_SIZE to state_pool_alloc_no_vg. How's that sound?
--Jason
> >
> > - struct anv_state state;
> > -
> > - state.offset = align_u32(stream->next, alignment);
> > - if (state.offset + size > stream->end) {
> > - uint32_t block = anv_block_pool_alloc(stream->block_pool);
> > - sb = stream->block_pool->map + block;
> > + struct anv_state_stream_block *sb = stream->block.map;
> > + VG_NOACCESS_WRITE(&sb->block, stream->block);
> > + VG_NOACCESS_WRITE(&sb->next, stream->block_list);
> > + stream->block_list = sb;
> > + VG_NOACCESS_WRITE(&sb->_vg_ptr, NULL);
> >
> > - VG(VALGRIND_MAKE_MEM_UNDEFINED(sb, sizeof(*sb)));
> > - sb->next = stream->block;
> > - sb->offset = block;
> > - VG(sb->_vg_ptr = NULL);
> > - VG(VALGRIND_MAKE_MEM_NOACCESS(sb, stream->block_pool->block_
> size));
> > + VG(VALGRIND_MAKE_MEM_NOACCESS(stream->block.map,
> stream->block_size));
> >
> > - stream->block = sb;
> > - stream->start = block;
> > - stream->next = block + sizeof
[Mesa-dev] [PATCH] st/mesa: add more fallback gallium formats for GL integer formats
The VMware driver has a limited set of integer texture formats. We
often have to fall back to 4-component formats when 1- or 2-component
formats are missing.
This fixes about 8 integer texture Piglit tests with the VMware driver
on Linux. We've had this code in-house for a long time but I guess it
was never up-streamed to Mesa master.
This shouldn't regress any other drivers since we're either choosing
an earlier format in the list, or failing anyway.
---
src/mesa/state_tracker/st_format.c | 50 +++---
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/src/mesa/state_tracker/st_format.c
b/src/mesa/state_tracker/st_format.c
index 7901d50..012f1a4 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -1186,7 +1186,7 @@ static const struct format_mapping format_map[] = {
},
{
{ 1, GL_LUMINANCE, GL_LUMINANCE4, GL_LUMINANCE8, 0 },
- { PIPE_FORMAT_L8_UNORM, DEFAULT_RGB_FORMATS }
+ { PIPE_FORMAT_L8_UNORM, PIPE_FORMAT_L8A8_UNORM, DEFAULT_RGB_FORMATS }
},
/* basic Luminance/Alpha formats */
@@ -1682,101 +1682,101 @@ static const struct format_mapping format_map[] = {
{
{ GL_ALPHA_INTEGER_EXT,
GL_ALPHA8I_EXT, 0 },
- { PIPE_FORMAT_A8_SINT, 0 }
+ { PIPE_FORMAT_A8_SINT, PIPE_FORMAT_R8G8B8A8_SINT, 0 }
},
{
{ GL_ALPHA16I_EXT, 0 },
- { PIPE_FORMAT_A16_SINT, 0 }
+ { PIPE_FORMAT_A16_SINT, PIPE_FORMAT_R16G16B16A16_SINT, 0 }
},
{
{ GL_ALPHA32I_EXT, 0 },
- { PIPE_FORMAT_A32_SINT, 0 }
+ { PIPE_FORMAT_A32_SINT, PIPE_FORMAT_R32G32B32A32_SINT, 0 }
},
{
{ GL_ALPHA8UI_EXT, 0 },
- { PIPE_FORMAT_A8_UINT, 0 }
+ { PIPE_FORMAT_A8_UINT, PIPE_FORMAT_R8G8B8A8_UINT, 0 }
},
{
{ GL_ALPHA16UI_EXT, 0 },
- { PIPE_FORMAT_A16_UINT, 0 }
+ { PIPE_FORMAT_A16_UINT, PIPE_FORMAT_R16G16B16A16_UINT, 0 }
},
{
{ GL_ALPHA32UI_EXT, 0 },
- { PIPE_FORMAT_A32_UINT, 0 }
+ { PIPE_FORMAT_A32_UINT, PIPE_FORMAT_R32G32B32A32_UINT, 0 }
},
{
{ GL_INTENSITY8I_EXT, 0 },
- { PIPE_FORMAT_I8_SINT, 0 }
+ { PIPE_FORMAT_I8_SINT, PIPE_FORMAT_R8G8B8A8_SINT, 0 }
},
{
{ GL_INTENSITY16I_EXT, 0 },
- { PIPE_FORMAT_I16_SINT, 0 }
+ { PIPE_FORMAT_I16_SINT, PIPE_FORMAT_R16G16B16A16_SINT, 0 }
},
{
{ GL_INTENSITY32I_EXT, 0 },
- { PIPE_FORMAT_I32_SINT, 0 }
+ { PIPE_FORMAT_I32_SINT, PIPE_FORMAT_R32G32B32A32_SINT, 0 }
},
{
{ GL_INTENSITY8UI_EXT, 0 },
- { PIPE_FORMAT_I8_UINT, 0 }
+ { PIPE_FORMAT_I8_UINT, PIPE_FORMAT_R8G8B8A8_UINT, 0 }
},
{
{ GL_INTENSITY16UI_EXT, 0 },
- { PIPE_FORMAT_I16_UINT, 0 }
+ { PIPE_FORMAT_I16_UINT, PIPE_FORMAT_R16G16B16A16_UINT, 0 }
},
{
{ GL_INTENSITY32UI_EXT, 0 },
- { PIPE_FORMAT_I32_UINT, 0 }
+ { PIPE_FORMAT_I32_UINT, PIPE_FORMAT_R32G32B32A32_UINT, 0 }
},
{
{ GL_LUMINANCE8I_EXT, 0 },
- { PIPE_FORMAT_L8_SINT, 0 }
+ { PIPE_FORMAT_L8_SINT, PIPE_FORMAT_R8G8B8A8_SINT, 0 }
},
{
{ GL_LUMINANCE16I_EXT, 0 },
- { PIPE_FORMAT_L16_SINT, 0 }
+ { PIPE_FORMAT_L16_SINT, PIPE_FORMAT_R16G16B16A16_SINT, 0 }
},
{
{ GL_LUMINANCE32I_EXT, 0 },
- { PIPE_FORMAT_L32_SINT, 0 }
+ { PIPE_FORMAT_L32_SINT, PIPE_FORMAT_R32G32B32A32_SINT, 0 }
},
{
{ GL_LUMINANCE_INTEGER_EXT,
GL_LUMINANCE8UI_EXT, 0 },
- { PIPE_FORMAT_L8_UINT, 0 }
+ { PIPE_FORMAT_L8_UINT, PIPE_FORMAT_R8G8B8A8_UINT, 0 }
},
{
{ GL_LUMINANCE16UI_EXT, 0 },
- { PIPE_FORMAT_L16_UINT, 0 }
+ { PIPE_FORMAT_L16_UINT, PIPE_FORMAT_R16G16B16A16_UINT, 0 }
},
{
{ GL_LUMINANCE32UI_EXT, 0 },
- { PIPE_FORMAT_L32_UINT, 0 }
+ { PIPE_FORMAT_L32_UINT, PIPE_FORMAT_R32G32B32A32_UINT, 0 }
},
{
{ GL_LUMINANCE_ALPHA_INTEGER_EXT,
GL_LUMINANCE_ALPHA8I_EXT, 0 },
- { PIPE_FORMAT_L8A8_SINT, 0 }
+ { PIPE_FORMAT_L8A8_SINT, PIPE_FORMAT_R8G8B8A8_SINT, 0 }
},
{
{ GL_LUMINANCE_ALPHA16I_EXT, 0 },
- { PIPE_FORMAT_L16A16_SINT, 0 }
+ { PIPE_FORMAT_L16A16_SINT, PIPE_FORMAT_R16G16B16A16_SINT, 0 }
},
{
{ GL_LUMINANCE_ALPHA32I_EXT, 0 },
- { PIPE_FORMAT_L32A32_SINT, 0 }
+ { PIPE_FORMAT_L32A32_SINT, PIPE_FORMAT_R32G32B32A32_SINT, 0 }
},
{
{ GL_LUMINANCE_ALPHA8UI_EXT, 0 },
- { PIPE_FORMAT_L8A8_UINT, 0 }
+ { PIPE_FORMAT_L8A8_UINT, PIPE_FORMAT_R8G8B8A8_UINT, 0 }
},
{
{ GL_LUMINANCE_ALPHA16UI_EXT, 0 },
- { PIPE_FORMAT_L16A16_UINT, 0 }
+ { PIPE_FORMAT_L16A16_UINT, PIPE_FORMAT_R16G16B16A16_UINT, 0 }
},
{
{ GL_LUMINANCE_ALPHA32UI_EXT, 0 },
- { PIPE_FORMAT_L32A32_UINT, 0 }
+ { PIPE_FORMAT_L32A32_UINT, PIPE_FORMAT_R32G32B32A32_UINT, 0 }
},
{
{ GL_RGB16I_EXT, 0 },
--
1.9.1
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m
[Mesa-dev] [PATCH] mesa: optimize color_buffer_writes_enabled()
Return as soon as we find an existing color channel that's enabled for
writing. Typically, this allows us to return true on the first loop
iteration intead of doing four iterations.
No piglit regressions.
---
src/mesa/main/clear.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/mesa/main/clear.c b/src/mesa/main/clear.c
index a1bb36e..884cf98 100644
--- a/src/mesa/main/clear.c
+++ b/src/mesa/main/clear.c
@@ -115,16 +115,17 @@ color_buffer_writes_enabled(const struct gl_context *ctx,
unsigned idx)
{
struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[idx];
GLuint c;
- GLubyte colorMask = 0;
if (rb) {
for (c = 0; c < 4; c++) {
- if (_mesa_format_has_color_component(rb->Format, c))
-colorMask |= ctx->Color.ColorMask[idx][c];
+ if (ctx->Color.ColorMask[idx][c] &&
+ _mesa_format_has_color_component(rb->Format, c)) {
+return true;
+ }
}
}
- return colorMask != 0;
+ return false;
}
--
1.9.1
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[Mesa-dev] [PATCH] util/disk_cache: remove percentage based max cache limit
The more I think about it the more this seems like a bad idea.
When we were deleting old cache dirs this wasn't so bad as it
was unlikely we would ever hit the actual limit before things
were cleaned up. Now that we only start cleaning up old cache
items once the limit is reached the a percentage based max
cache limit is more risky.
For the inital release of shader cache I think its better to
stick to a more conservative cache limit, at least until we
have some way of cleaning up the cache more aggressively.
Cc: "17.1"
---
src/util/disk_cache.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/src/util/disk_cache.c b/src/util/disk_cache.c
index 2764017..543f1c3 100644
--- a/src/util/disk_cache.c
+++ b/src/util/disk_cache.c
@@ -24,37 +24,35 @@
#ifdef ENABLE_SHADER_CACHE
#include
#include
#include
#include
#include
#include
#include
#include
-#include
#include
#include
#include
#include
#include
#include
#include "zlib.h"
#include "util/crc32.h"
#include "util/rand_xor.h"
#include "util/u_atomic.h"
#include "util/u_queue.h"
#include "util/mesa-sha1.h"
#include "util/ralloc.h"
#include "main/errors.h"
-#include "util/macros.h"
#include "disk_cache.h"
/* Number of bits to mask off from a cache key to get an index. */
#define CACHE_INDEX_KEY_BITS 16
/* Mask for computing an index from a key. */
#define CACHE_INDEX_KEY_MASK ((1 << CACHE_INDEX_KEY_BITS) - 1)
/* The number of keys that can be stored in the index. */
@@ -164,21 +162,20 @@ concatenate_and_mkdir(void *ctx, const char *path, const
char *name)
struct disk_cache *
disk_cache_create(const char *gpu_name, const char *timestamp)
{
void *local;
struct disk_cache *cache = NULL;
char *path, *max_size_str;
uint64_t max_size;
int fd = -1;
struct stat sb;
- struct statvfs vfs = { 0 };
size_t size;
/* If running as a users other than the real user disable cache */
if (geteuid() != getuid())
return NULL;
/* A ralloc context for transient data during this invocation. */
local = ralloc_context(NULL);
if (local == NULL)
goto fail;
@@ -324,24 +321,23 @@ disk_cache_create(const char *gpu_name, const char
*timestamp)
case '\0':
case 'G':
case 'g':
default:
max_size *= 1024*1024*1024;
break;
}
}
}
- /* Default to 1GB or 5% of filesystem for maximum cache size. */
+ /* Default to 1GB for maximum cache size. */
if (max_size == 0) {
- statvfs(path, &vfs);
- max_size = MAX2(1024*1024*1024, vfs.f_blocks * vfs.f_bsize / 20);
+ max_size = 1024*1024*1024;
}
cache->max_size = max_size;
/* A limit of 32 jobs was choosen as observations of Deus Ex start-up times
* showed that we reached at most 11 jobs on an Intel i5-6400 CPU@2.70GHz
* (a fairly modest desktop CPU). 1 thread was chosen because we don't
* really care about getting things to disk quickly just that it's not
* blocking other tasks.
*/
--
2.9.3
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Re: [Mesa-dev] [PATCH 00/12] Android build cleanup/fixes
2017-04-28 3:43 GMT+08:00 Rob Herring : > This is a series of clean-ups and fixes to the Android build files. > Overall, it removes a lot of the if conditions that aren't necessary for > normal builds and also enables "mmma external/mesa3d" to build > everything for easier build testing. > > This fixes LLVM enabled builds on master though that requires changes > to LLVM as well. In the process, LLVM builds with Lollipop are dropped > as L doesn't have the minimum LLVM version for several drivers. Also, > android-x86 L support is using mesa 11.0. > > I've only tested against AOSP master so far. > > Rob > > Mauro Rossi (2): > android: drop static linking of R600 LLVM libraries > android: define required __STDC* macros as cflags > > Rob Herring (10): > Android: amd: use exported include dirs instead of explicit includes > Android: amd/common: fix dependency on libmesa_nir > Android: drop LLVM support on Lollipop > Android: rework libelf dependencies > Android: remove needless conditional including of child makefiles > Android: Fix swrast only build > Android: push driver build details to driver makefiles > Android: default to building all drivers > Android: Add LLVM support for Android O > Android: Drop linking libgcc > > Android.common.mk| 15 ++ > Android.mk | 57 ++- > src/amd/Android.addrlib.mk | 6 +++ > src/amd/Android.common.mk| 16 +-- > src/compiler/Android.nir.gen.mk | 1 + > src/egl/Android.mk | 14 ++ > src/gallium/Android.common.mk| 3 +- > src/gallium/Android.mk | 58 +++- > src/gallium/auxiliary/Android.mk | 12 +++-- > src/gallium/auxiliary/pipe-loader/Android.mk | 7 ++- > src/gallium/drivers/freedreno/Android.mk | 5 ++ > src/gallium/drivers/i915/Android.mk | 4 ++ > src/gallium/drivers/nouveau/Android.mk | 5 ++ > src/gallium/drivers/r300/Android.mk | 4 ++ > src/gallium/drivers/r600/Android.mk | 10 ++-- > src/gallium/drivers/radeon/Android.mk| 7 ++- > src/gallium/drivers/radeonsi/Android.mk | 12 - > src/gallium/drivers/softpipe/Android.mk | 4 ++ > src/gallium/drivers/svga/Android.mk | 4 ++ > src/gallium/drivers/vc4/Android.mk | 4 ++ > src/gallium/drivers/virgl/Android.mk | 4 ++ > src/gallium/state_trackers/dri/Android.mk| 10 ++-- > src/gallium/targets/dri/Android.mk | 68 > ++-- > src/gallium/winsys/amdgpu/drm/Android.mk | 12 ++--- > src/gallium/winsys/i915/drm/Android.mk | 4 ++ > src/mesa/Android.libmesa_dricore.mk | 4 -- > src/mesa/Android.libmesa_st_mesa.mk | 4 -- > src/mesa/drivers/dri/Android.mk | 11 + > 28 files changed, 149 insertions(+), 216 deletions(-) > > -- First of all, thank you for these patches. Patches 1, 2, 3, 4, 5, 6, 7, 8, and 12 are Reviewed-by: Chih-Wei Huang For others I hope to make a test (at least on N) before commenting. Minor suggestion: unify the uppercase or lowercase in the subject of the series. -- Chih-Wei Android-x86 project http://www.android-x86.org ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 10/12] Android: default to building all drivers
A typo in the subject? (s/building/build/) 2017-04-28 3:43 GMT+08:00 Rob Herring : > If BOARD_GPU_DRIVERS is empty, build all the drivers. This doesn't > enable building mesa as that is controlled by including libGLES_mesa in > the product. > > Signed-off-by: Rob Herring > --- > Android.mk | 8 > 1 file changed, 8 insertions(+) > > diff --git a/Android.mk b/Android.mk > index 9f481ee7e109..76858c1616bc 100644 > --- a/Android.mk > +++ b/Android.mk > @@ -1,3 +1,4 @@ > + > # Mesa 3-D graphics library > # > # Copyright (C) 2010-2011 Chia-I Wu > @@ -53,8 +54,15 @@ gallium_drivers := \ > vc4.HAVE_GALLIUM_VC4 \ > virgl.HAVE_GALLIUM_VIRGL > > +$(warning $(BOARD_GPU_DRIVERS)) > + > +ifeq ($(BOARD_GPU_DRIVERS),all) > +MESA_BUILD_CLASSIC := $(filter HAVE_%, $(subst ., , $(classic_drivers))) > +MESA_BUILD_GALLIUM := $(filter HAVE_%, $(subst ., , $(gallium_drivers))) > +else > MESA_BUILD_CLASSIC := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst > $(d).%,%, $(filter $(d).%, $(classic_drivers) > MESA_BUILD_GALLIUM := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst > $(d).%,%, $(filter $(d).%, $(gallium_drivers) > +endif > $(foreach d, $(MESA_BUILD_CLASSIC) $(MESA_BUILD_GALLIUM), $(eval $(d) := > true)) > > # host and target must be the same arch to generate matypes.h > -- Aren't some drivers for arm or x86 only? Is it really possible to build all drivers? -- Chih-Wei Android-x86 project http://www.android-x86.org ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 07/12] Android: remove needless conditional including of child makefiles
2017-04-28 3:43 GMT+08:00 Rob Herring : > It is not necessary to filter driver and winsys directories based on the > list of enabled drivers. Selecting the included driver libraries or not is > sufficient to control what is built. Hmm.. The benefit is faster parsing time. Though it would be very small. Anyway, to make the rules cleaner, I'm not against it. > Signed-off-by: Rob Herring > --- > Android.mk | 8 -- > src/gallium/Android.mk | 52 > +++-- > src/mesa/Android.libmesa_dricore.mk | 4 --- > src/mesa/Android.libmesa_st_mesa.mk | 4 --- > src/mesa/drivers/dri/Android.mk | 11 +--- > 5 files changed, 4 insertions(+), 75 deletions(-) > > diff --git a/Android.mk b/Android.mk > index fdbf22fe643a..08daf770f26b 100644 > --- a/Android.mk > +++ b/Android.mk > @@ -76,8 +76,6 @@ endif > MESA_ENABLE_LLVM := $(if $(filter radeonsi,$(MESA_GPU_DRIVERS)),true,false) > > # add subdirectories > -ifneq ($(strip $(MESA_GPU_DRIVERS)),) > - > SUBDIRS := \ > src/gbm \ > src/loader \ > @@ -92,11 +90,5 @@ SUBDIRS := \ > src/vulkan > > INC_DIRS := $(call all-named-subdir-makefiles,$(SUBDIRS)) > - > -ifeq ($(strip $(MESA_BUILD_GALLIUM)),true) > INC_DIRS += $(call all-named-subdir-makefiles,src/gallium) > -endif > - > include $(INC_DIRS) > - > -endif > diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk > index e67cfab5b316..7c6bda68d59f 100644 > --- a/src/gallium/Android.mk > +++ b/src/gallium/Android.mk > @@ -33,62 +33,16 @@ SUBDIRS += auxiliary/pipe-loader > # Gallium drivers and their respective winsys > # > > -# swrast > -ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) > SUBDIRS += winsys/sw/dri drivers/softpipe > -endif > - > -# freedreno > -ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),) > SUBDIRS += winsys/freedreno/drm drivers/freedreno > -endif > - > -# i915g > -ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),) > SUBDIRS += winsys/i915/drm drivers/i915 > -endif > - > -# nouveau > -ifneq ($(filter nouveau, $(MESA_GPU_DRIVERS)),) > -SUBDIRS += \ > - winsys/nouveau/drm \ > - drivers/nouveau > -endif > - > -# r300g/r600g/radeonsi > -ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),) > -SUBDIRS += winsys/radeon/drm > -ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),) > -SUBDIRS += drivers/r300 > -endif > -ifneq ($(filter r600g radeonsi, $(MESA_GPU_DRIVERS)),) > -SUBDIRS += drivers/radeon > -ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),) > -SUBDIRS += drivers/r600 > -endif > -ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),) > -SUBDIRS += drivers/radeonsi > -SUBDIRS += winsys/amdgpu/drm > -endif > -endif > -endif > - > -# vc4 > -ifneq ($(filter vc4, $(MESA_GPU_DRIVERS)),) > +SUBDIRS += winsys/nouveau/drm drivers/nouveau > +SUBDIRS += drivers/r300 drivers/r600 drivers/radeon drivers/radeonsi > +SUBDIRS += winsys/amdgpu/drm winsys/radeon/drm > SUBDIRS += winsys/vc4/drm drivers/vc4 > -endif > - > -# virgl > -ifneq ($(filter virgl, $(MESA_GPU_DRIVERS)),) > SUBDIRS += winsys/virgl/drm winsys/virgl/vtest drivers/virgl > -endif > - > -# vmwgfx > -ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),) > SUBDIRS += winsys/svga/drm drivers/svga > -endif > > -# Gallium state trackers and target for dri > SUBDIRS += state_trackers/dri targets/dri > > include $(call all-named-subdir-makefiles,$(SUBDIRS)) > diff --git a/src/mesa/Android.libmesa_dricore.mk > b/src/mesa/Android.libmesa_dricore.mk > index 86196ceb36ab..599b9ccd71ed 100644 > --- a/src/mesa/Android.libmesa_dricore.mk > +++ b/src/mesa/Android.libmesa_dricore.mk > @@ -24,8 +24,6 @@ > # libmesa_dricore.a > # -- > > -ifeq ($(strip $(MESA_BUILD_CLASSIC)),true) > - > LOCAL_PATH := $(call my-dir) > > # Import the following variables: > @@ -72,5 +70,3 @@ LOCAL_WHOLE_STATIC_LIBRARIES += \ > include $(LOCAL_PATH)/Android.gen.mk > include $(MESA_COMMON_MK) > include $(BUILD_STATIC_LIBRARY) > - > -endif # MESA_BUILD_CLASSIC > diff --git a/src/mesa/Android.libmesa_st_mesa.mk > b/src/mesa/Android.libmesa_st_mesa.mk > index 92df4ad2845b..de2a60a70ed9 100644 > --- a/src/mesa/Android.libmesa_st_mesa.mk > +++ b/src/mesa/Android.libmesa_st_mesa.mk > @@ -24,8 +24,6 @@ > # libmesa_st_mesa.a > # -- > > -ifeq ($(strip $(MESA_BUILD_GALLIUM)),true) > - > LOCAL_PATH := $(call my-dir) > > # Import variables: > @@ -72,5 +70,3 @@ LOCAL_STATIC_LIBRARIES += libmesa_nir libmesa_glsl > include $(LOCAL_PATH)/Android.gen.mk > include $(MESA_COMMON_MK) > include $(BUILD_STATIC_LIBRARY) > - > -endif # MESA_BUILD_GALLIUM > diff --git a/src/mesa/drivers/dri/Android.mk b/src/mesa/drivers/dri/Android.mk > index 72a5593fefad..d4fb670f84ce 100644 > --- a/src/mesa/drivers/dri/Android.mk > +++ b/src/mesa/drivers/dri/Android.mk > @@ -56,14 +56,5 @@ MESA_DRI_SHARED_LIBRARIES := \ > #---
Re: [Mesa-dev] [PATCH] anv: Drop 'x11' prefix from non-X11 WSI funcs
Rb
On April 28, 2017 1:54:58 AM Chad Versace wrote:
Drop it from x11_anv_wsi_image_create and x11_anv_wsi_image_free. The
functions are used by Wayland WSI too.
---
src/intel/vulkan/anv_wsi.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index ba66ea6d461..0afedcffb01 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -142,16 +142,16 @@ VkResult anv_GetPhysicalDeviceSurfacePresentModesKHR(
static VkResult
-x11_anv_wsi_image_create(VkDevice device_h,
- const VkSwapchainCreateInfoKHR *pCreateInfo,
- const VkAllocationCallbacks* pAllocator,
- bool different_gpu,
- bool linear,
- VkImage *image_p,
- VkDeviceMemory *memory_p,
- uint32_t *size,
- uint32_t *offset,
- uint32_t *row_pitch, int *fd_p)
+anv_wsi_image_create(VkDevice device_h,
+ const VkSwapchainCreateInfoKHR *pCreateInfo,
+ const VkAllocationCallbacks* pAllocator,
+ bool different_gpu,
+ bool linear,
+ VkImage *image_p,
+ VkDeviceMemory *memory_p,
+ uint32_t *size,
+ uint32_t *offset,
+ uint32_t *row_pitch, int *fd_p)
{
struct anv_device *device = anv_device_from_handle(device_h);
VkImage image_h;
@@ -248,10 +248,10 @@ fail_create_image:
}
static void
-x11_anv_wsi_image_free(VkDevice device,
- const VkAllocationCallbacks* pAllocator,
- VkImage image_h,
- VkDeviceMemory memory_h)
+anv_wsi_image_free(VkDevice device,
+ const VkAllocationCallbacks* pAllocator,
+ VkImage image_h,
+ VkDeviceMemory memory_h)
{
anv_DestroyImage(device, image_h, pAllocator);
@@ -259,8 +259,8 @@ x11_anv_wsi_image_free(VkDevice device,
}
static const struct wsi_image_fns anv_wsi_image_fns = {
- .create_wsi_image = x11_anv_wsi_image_create,
- .free_wsi_image = x11_anv_wsi_image_free,
+ .create_wsi_image = anv_wsi_image_create,
+ .free_wsi_image = anv_wsi_image_free,
};
VkResult anv_CreateSwapchainKHR(
--
2.12.0
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[Mesa-dev] [RFC v2 1/2] drm/i915: Engine discovery uAPI
From: Tvrtko Ursulin
Engine discovery uAPI allows userspace to probe for engine
configuration and features without needing to maintain the
internal PCI id based database.
This enables removal of code duplications across userspace
components.
Probing is done via the new DRM_IOCTL_I915_GEM_ENGINE_INFO ioctl
which returns the number and information on the specified engine
class.
Currently only general engine configuration and HEVC feature of
the VCS engine can be probed but the uAPI is designed to be
generic and extensible.
Code is based almost exactly on the earlier proposal on the
topic by Jon Bloomfield. Engine class and instance refactoring
made recently by Daniele Ceraolo Spurio enabled this to be
implemented in an elegant fashion.
To probe configuration userspace sets the engine class it wants
to query (struct drm_i915_gem_engine_info) and provides an array
of drm_i915_engine_info structs which will be filled in by the
driver. Userspace also has to tell i915 how many elements are in
the array, and the driver will report back the total number of
engine instances in any case.
v2:
* Add a version field and consolidate to one engine count.
(Chris Wilson)
* Rename uAPI flags for VCS engines to DRM_I915_ENGINE_CLASS_VIDEO.
(Gong Zhipeng)
Signed-off-by: Tvrtko Ursulin
Cc: Ben Widawsky
Cc: Chris Wilson
Cc: Daniel Vetter
Cc: Joonas Lahtinen
Cc: Jon Bloomfield
Cc: Daniel Charles
Cc: "Rogozhkin, Dmitry V"
Cc: Oscar Mateo
Cc: "Gong, Zhipeng"
Cc: intel-vaapi-me...@lists.01.org
Cc: mesa-dev@lists.freedesktop.org
---
drivers/gpu/drm/i915/i915_drv.c| 1 +
drivers/gpu/drm/i915/i915_drv.h| 3 ++
drivers/gpu/drm/i915/intel_engine_cs.c | 64 ++
include/uapi/drm/i915_drm.h| 40 +
4 files changed, 108 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c7d68e789642..1a3f0859227b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2609,6 +2609,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM,
i915_gem_context_getparam_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_SETPARAM,
i915_gem_context_setparam_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_PERF_OPEN, i915_perf_open_ioctl,
DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_GEM_ENGINE_INFO, i915_gem_engine_info_ioctl,
DRM_RENDER_ALLOW),
};
static struct drm_driver driver = {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 357b6c6c2f04..6eed0e854561 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3547,6 +3547,9 @@ i915_gem_context_lookup_timeline(struct i915_gem_context
*ctx,
int i915_perf_open_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
+int i915_gem_engine_info_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
+
/* i915_gem_evict.c */
int __must_check i915_gem_evict_something(struct i915_address_space *vm,
u64 min_size, u64 alignment,
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 82a274b336c5..caed32dbd912 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -25,6 +25,7 @@
#include "i915_drv.h"
#include "intel_ringbuffer.h"
#include "intel_lrc.h"
+#include
struct engine_class_info {
const char *name;
@@ -1187,6 +1188,69 @@ void intel_engines_reset_default_submission(struct
drm_i915_private *i915)
engine->set_default_submission(engine);
}
+u8 user_class_map[DRM_I915_ENGINE_CLASS_MAX] = {
+ [DRM_I915_ENGINE_CLASS_OTHER] = OTHER_CLASS,
+ [DRM_I915_ENGINE_CLASS_RENDER] = RENDER_CLASS,
+ [DRM_I915_ENGINE_CLASS_COPY] = COPY_ENGINE_CLASS,
+ [DRM_I915_ENGINE_CLASS_VIDEO] = VIDEO_DECODE_CLASS,
+ [DRM_I915_ENGINE_CLASS_VIDEO_ENHANCE] = VIDEO_ENHANCEMENT_CLASS,
+};
+
+int i915_gem_engine_info_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file)
+{
+ struct drm_i915_private *i915 = to_i915(dev);
+ struct drm_i915_gem_engine_info *args = data;
+ struct drm_i915_engine_info __user *user_info =
+ u64_to_user_ptr(args->info_ptr);
+ unsigned int info_size = args->num_engines;
+ struct drm_i915_engine_info info;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+ u8 class;
+
+ if (args->rsvd)
+ return -EINVAL;
+
+ switch (args->engine_class) {
+ case DRM_I915_ENGINE_CLASS_OTHER:
+ case DRM_I915_ENGINE_CLASS_RENDER:
+ case DRM_I915_ENGINE_CLASS_COPY:
+ case DRM_I915_ENGINE_CLASS_VIDEO:
+ case DRM_I915_ENGINE_CLASS_VIDEO_ENHANCE:
+
[Mesa-dev] [RFC v2 2/2] drm/i915: Select engines via class and instance in execbuffer2
From: Tvrtko Ursulin
Building on top of the previous patch which exported the concept
of engine classes and instances, we can also use this instead of
the current awkward engine selection uAPI.
This is primarily interesting for the VCS engine selection which
is a) currently done via disjoint set of flags, and b) the
current I915_EXEC_BSD flags has different semantics depending on
the underlying hardware which is bad.
Proposed idea here is to reserve 16-bits of flags, to pass in
the engine class and instance (8 bits each), and a new flag
named I915_EXEC_CLASS_INSTACE to tell the kernel this new engine
selection API is in use.
The new uAPI also removes access to the weak VCS engine
balancing as currently existing in the driver.
Example usage to send a command to VCS0:
eb.flags = i915_execbuffer2_engine(DRM_I915_ENGINE_CLASS_VIDEO_DECODE, 0);
Or to send a command to VCS1:
eb.flags = i915_execbuffer2_engine(DRM_I915_ENGINE_CLASS_VIDEO_DECODE, 1);
v2:
* Fix unknown flags mask.
* Use I915_EXEC_RING_MASK for class. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Cc: Ben Widawsky
Cc: Chris Wilson
Cc: Daniel Vetter
Cc: Joonas Lahtinen
Cc: Jon Bloomfield
Cc: Daniel Charles
Cc: "Rogozhkin, Dmitry V"
Cc: Oscar Mateo
Cc: "Gong, Zhipeng"
Cc: intel-vaapi-me...@lists.01.org
Cc: mesa-dev@lists.freedesktop.org
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 29 +
include/uapi/drm/i915_drm.h| 11 ++-
2 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index af1965774e7b..ecd1486642a7 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1492,6 +1492,32 @@ gen8_dispatch_bsd_engine(struct drm_i915_private
*dev_priv,
return file_priv->bsd_engine;
}
+extern u8 user_class_map[DRM_I915_ENGINE_CLASS_MAX];
+
+static struct intel_engine_cs *
+eb_select_engine_class_instance(struct drm_i915_private *i915,
+ struct drm_i915_gem_execbuffer2 *args)
+{
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+ u8 class, instance;
+
+ class = args->flags & I915_EXEC_RING_MASK;
+ if (class >= DRM_I915_ENGINE_CLASS_MAX)
+ return NULL;
+ class = user_class_map[class];
+
+ instance = (args->flags >> I915_EXEC_INSTANCE_SHIFT) &&
+ I915_EXEC_INSTANCE_MASK;
+
+ for_each_engine(engine, i915, id) {
+ if (engine->class == class && engine->instance == instance)
+ return engine;
+ }
+
+ return NULL;
+}
+
#define I915_USER_RINGS (4)
static const enum intel_engine_id user_ring_map[I915_USER_RINGS + 1] = {
@@ -1510,6 +1536,9 @@ eb_select_engine(struct drm_i915_private *dev_priv,
unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
struct intel_engine_cs *engine;
+ if (args->flags & I915_EXEC_CLASS_INSTANCE)
+ return eb_select_engine_class_instance(dev_priv, args);
+
if (user_ring_id > I915_USER_RINGS) {
DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id);
return NULL;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 2ac6667e57ea..6a26bdf5e684 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -906,7 +906,12 @@ struct drm_i915_gem_execbuffer2 {
*/
#define I915_EXEC_FENCE_OUT(1<<17)
-#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_FENCE_OUT<<1))
+#define I915_EXEC_CLASS_INSTANCE (1<<18)
+
+#define I915_EXEC_INSTANCE_SHIFT (19)
+#define I915_EXEC_INSTANCE_MASK(0xff <<
I915_EXEC_INSTANCE_SHIFT)
+
+#define __I915_EXEC_UNKNOWN_FLAGS (-((1 << 27) << 1))
#define I915_EXEC_CONTEXT_ID_MASK (0x)
#define i915_execbuffer2_set_context_id(eb2, context) \
@@ -914,6 +919,10 @@ struct drm_i915_gem_execbuffer2 {
#define i915_execbuffer2_get_context_id(eb2) \
((eb2).rsvd1 & I915_EXEC_CONTEXT_ID_MASK)
+#define i915_execbuffer2_engine(class, instance) \
+ (I915_EXEC_CLASS_INSTANCE | (class) | \
+ ((instance) << I915_EXEC_INSTANCE_SHIFT))
+
struct drm_i915_gem_pin {
/** Handle of the buffer to be pinned. */
__u32 handle;
--
2.9.3
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[Mesa-dev] [PATCH v2] scons: update for LLVM 4.0
LLVMDemangle, LLVMGlobalISel, and LLVMDebugInfoMSF are new.
Also update the comment to add irreader to the list of components.
CC:
Reviewed-by: Chuck Atkins
Signed-off-by: Ben Boeckel
---
scons/llvm.py | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/scons/llvm.py b/scons/llvm.py
index 2d0f05b..713f56c 100644
--- a/scons/llvm.py
+++ b/scons/llvm.py
@@ -105,8 +105,26 @@ def generate(env):
'HAVE_STDINT_H',
])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
-# LIBS should match the output of `llvm-config --libs engine mcjit
bitwriter x86asmprinter`
-if llvm_version >= distutils.version.LooseVersion('3.9'):
+# LIBS should match the output of `llvm-config --libs engine mcjit
bitwriter x86asmprinter irreader`
+if llvm_version >= distutils.version.LooseVersion('4.0'):
+env.Prepend(LIBS = [
+'LLVMX86Disassembler', 'LLVMX86AsmParser',
+'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',
+'LLVMDebugInfoCodeView', 'LLVMCodeGen',
+'LLVMScalarOpts', 'LLVMInstCombine',
+'LLVMTransformUtils',
+'LLVMBitWriter', 'LLVMX86Desc',
+'LLVMMCDisassembler', 'LLVMX86Info',
+'LLVMX86AsmPrinter', 'LLVMX86Utils',
+'LLVMMCJIT', 'LLVMExecutionEngine', 'LLVMTarget',
+'LLVMAnalysis', 'LLVMProfileData',
+'LLVMRuntimeDyld', 'LLVMObject', 'LLVMMCParser',
+'LLVMBitReader', 'LLVMMC', 'LLVMCore',
+'LLVMSupport',
+'LLVMIRReader', 'LLVMAsmParser',
+'LLVMDemangle', 'LLVMGlobalISel', 'LLVMDebugInfoMSF',
+])
+elif llvm_version >= distutils.version.LooseVersion('3.9'):
env.Prepend(LIBS = [
'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',
--
2.9.3
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[Mesa-dev] [PATCH] scons: update for LLVM 4.0
LLVMDemangle, LLVMGlobalISel, and LLVMDebugInfoMSF are new.
Also update the comment to add irreader to the list of components.
CC:
Reviewed-by: Chuck Atkins
Signed-off-by: Ben Boeckel
---
scons/llvm.py | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/scons/llvm.py b/scons/llvm.py
index 2d0f05b..2338f78 100644
--- a/scons/llvm.py
+++ b/scons/llvm.py
@@ -105,8 +105,26 @@ def generate(env):
'HAVE_STDINT_H',
])
env.Prepend(LIBPATH = [os.path.join(llvm_dir, 'lib')])
-# LIBS should match the output of `llvm-config --libs engine mcjit
bitwriter x86asmprinter`
-if llvm_version >= distutils.version.LooseVersion('3.9'):
+# LIBS should match the output of `llvm-config --libs engine mcjit
bitwriter x86asmprinter irreader`
+if llvm_version >= distutils.version.LooseVersion('4.0'):
+env.Prepend(LIBS = [
+'LLVMX86Disassembler', 'LLVMX86AsmParser',
+'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',
+'LLVMDebugInfoCodeView', 'LLVMCodeGen',
+'LLVMScalarOpts', 'LLVMInstCombine',
+'LLVMTransformUtils',
+'LLVMBitWriter', 'LLVMX86Desc',
+'LLVMMCDisassembler', 'LLVMX86Info',
+'LLVMX86AsmPrinter', 'LLVMX86Utils',
+'LLVMMCJIT', 'LLVMExecutionEngine', 'LLVMTarget',
+'LLVMAnalysis', 'LLVMProfileData',
+'LLVMRuntimeDyld', 'LLVMObject', 'LLVMMCParser',
+'LLVMBitReader', 'LLVMMC', 'LLVMCore',
+'LLVMSupport',
+'LLVMIRReader', 'LLVMAsmParser'
+'LLVMDemangle', 'LLVMGlobalISel', 'LLVMDebugInfoMSF',
+])
+elif llvm_version >= distutils.version.LooseVersion('3.9'):
env.Prepend(LIBS = [
'LLVMX86Disassembler', 'LLVMX86AsmParser',
'LLVMX86CodeGen', 'LLVMSelectionDAG', 'LLVMAsmPrinter',
--
2.9.3
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Re: [Mesa-dev] [PATCH v2 30/31] glsl: disable tree grafting optimization for bindless images
On 26/04/17 18:27, Samuel Pitoiset wrote:
On 04/26/2017 10:05 AM, Nicolai Hähnle wrote:
On 24.04.2017 12:36, Samuel Pitoiset wrote:
Because the variable declaration holds more information than
the dereference. Note that an image is considered bindless either
if it has been declared in the default uniform block with the
bindless_sampler layout qualifier, or when its storage is not
uniform because this is not allowed without ARB_bindless_texture.
It seems unfortunate that we have to do this. Can you explain what
goes wrong without this change?
We lost the variable and all information contained in ir_variable for
images.
Can you give an example of a shader where this becomes an issue? And why?
Thanks,
Nicolai
Signed-off-by: Samuel Pitoiset
---
src/compiler/glsl/opt_tree_grafting.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/compiler/glsl/opt_tree_grafting.cpp
b/src/compiler/glsl/opt_tree_grafting.cpp
index 28b6e1856e..d4a1ec5675 100644
--- a/src/compiler/glsl/opt_tree_grafting.cpp
+++ b/src/compiler/glsl/opt_tree_grafting.cpp
@@ -371,6 +371,15 @@ tree_grafting_basic_block(ir_instruction *bb_first,
if (lhs_var->data.precise)
continue;
+ if (lhs_var->type->is_image() &&
+ (lhs_var->data.bindless || lhs_var->data.mode !=
ir_var_uniform)) {
+ /* Disable tree grafting optimization for bindless image
types because
+ * the variable declaration holds more information than the
+ * dereference.
+ */
+ continue;
+ }
+
ir_variable_refcount_entry *entry =
info->refs->get_variable_entry(lhs_var);
if (!entry->declaration ||
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Re: [Mesa-dev] [PATCH] Android: fix r300g only build
2017-04-27 17:36 GMT+02:00 Emil Velikov :
> On 27 April 2017 at 16:11, Rob Herring wrote:
>
>>
>> BTW, mesa lists this as the LLVM version requirements:
>>
>> LLVM_REQUIRED_GALLIUM=3.3.0
> src/gallium/auxiliary/{draw,gallivm}, used by
> - nouveau (nv30), i915, r300, softpipe (yes) and svga - optional
> - llvmpipe, swr, radeonsi - mandatory
>
>> LLVM_REQUIRED_OPENCL=3.6.0
> src/gallium/state_trackers/clover/
>
>> LLVM_REQUIRED_R600=3.8.0
> src/gallium/drivers/{r600,radeon}
>
>> LLVM_REQUIRED_RADEONSI=3.8.0
> src/gallium/drivers/{radeonsi,radeon}
>
>> LLVM_REQUIRED_RADV=3.9.0
> src/amd/vulkan/
>
>> LLVM_REQUIRED_SWR=3.9.0
> src/gallium/drivers/swr
>
>>
>> I'm not exactly sure what in gallium only needs LLVM 3.3, but it looks
>> to me like we need at least 3.8 and that would limit us to Android N
>> and later for enabling LLVM. Is that a correct assumption for
>> android-x86? We are only talking about what current mesa master
>> supports here.
>>
Hi,
>=N constraint was induced by changes in radeonsi/amdgpu
that became effective in mesa 17.1,
17.0 is the last branch supporting M, due to llvm version 3.7 in
AOSP/android-x86 for marshmallow
but this should not be an issue as one day marshmallow-x86 development
will go EoL
> Rob the above list should help you connect the LLVM version dots.
> On the question - as long as you guys are happy, I'm happy :-)
>
> -Emil
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Re: [Mesa-dev] [PATCH v2] swr: move msaa resolve to generalized StoreTile
On Thu, Apr 27, 2017 at 8:45 PM, Cherniak, Bruce wrote: > >> On Apr 27, 2017, at 7:38 PM, Ilia Mirkin wrote: >> >> Erm, so ... what happens if I render to FB1, then render to FB2, then >> render to FB1 again (and I have blending enabled)? Doesn't the resolve >> lose the per-sample information? Or does the resolve merely precompute >> the resolved version on the off chance that it's needed, without >> losing the source data? > > The resolve occurs into a secondary, driver private, surface. All per-sample > information is maintained in the original surfaces. > > Yes, the resolve is currently done "on the off chance that it’s needed”. > There is likely an optimization to be had there, but it should be functionally > correct. Got it. May I ask why this isn't done on-demand instead? Is it a pain to plug into swr's execution engine? I'm just concerned that StoreTile() may get called a lot, more than even there are draws, as tiles are swapped in and out of "hotness", and I wouldn't be surprised if resolves were needed only a fraction of the time. Cheers, -ilia ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v2] swr: move msaa resolve to generalized StoreTile
> On Apr 27, 2017, at 7:38 PM, Ilia Mirkin wrote:
>
> Erm, so ... what happens if I render to FB1, then render to FB2, then
> render to FB1 again (and I have blending enabled)? Doesn't the resolve
> lose the per-sample information? Or does the resolve merely precompute
> the resolved version on the off chance that it's needed, without
> losing the source data?
The resolve occurs into a secondary, driver private, surface. All per-sample
information is maintained in the original surfaces.
Yes, the resolve is currently done "on the off chance that it’s needed”.
There is likely an optimization to be had there, but it should be functionally
correct.
> On Thu, Apr 27, 2017 at 8:22 PM, Bruce Cherniak
> wrote:
>> v2: Reword commit message to more closely adhere to community
>> guidelines.
>>
>> This patch moves msaa resolve down into core/StoreTiles where the
>> surface format conversion routines are available. The previous
>> "experimental" resolve was limited to 8-bit unsigned render targets.
>>
>> This fixes a number of piglit msaa tests by adding resolve support for
>> all the render target formats we support.
>>
>> MSAA is still disabled by default, but can be enabled with
>> "export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options)
>> The default is 0, which is disabled.
>>
>> Because it fixes a number of piglit tests, I kindly request inclusion
>> into 17.1 stable.
>>
>> cc: mesa-sta...@lists.freedesktop.org
>> ---
>> .../drivers/swr/rasterizer/memory/StoreTile.h | 75 +
>> src/gallium/drivers/swr/swr_context.cpp| 77
>> +-
>> src/gallium/drivers/swr/swr_screen.cpp | 10 +--
>> 3 files changed, 82 insertions(+), 80 deletions(-)
>>
>> diff --git a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
>> b/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
>> index ffde574c03..12a5f3d8ce 100644
>> --- a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
>> +++ b/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
>> @@ -1133,6 +1133,64 @@ struct StoreRasterTile
>> }
>> }
>> }
>> +
>> +
>> //
>> +/// @brief Resolves an 8x8 raster tile to the resolve destination
>> surface.
>> +/// @param pSrc - Pointer to raster tile.
>> +/// @param pDstSurface - Destination surface state
>> +/// @param x, y - Coordinates to raster tile.
>> +/// @param sampleOffset - Offset between adjacent multisamples
>> +INLINE static void Resolve(
>> +uint8_t *pSrc,
>> +SWR_SURFACE_STATE* pDstSurface,
>> +uint32_t x, uint32_t y, uint32_t sampleOffset, uint32_t
>> renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile.
>> +{
>> +uint32_t lodWidth = std::max(pDstSurface->width >>
>> pDstSurface->lod, 1U);
>> +uint32_t lodHeight = std::max(pDstSurface->height >>
>> pDstSurface->lod, 1U);
>> +
>> +float oneOverNumSamples = 1.0f / pDstSurface->numSamples;
>> +
>> +// For each raster tile pixel (rx, ry)
>> +for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry)
>> +{
>> +for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx)
>> +{
>> +// Perform bounds checking.
>> +if (((x + rx) < lodWidth) &&
>> +((y + ry) < lodHeight))
>> +{
>> +// Sum across samples
>> +float resolveColor[4] = {0};
>> +for (uint32_t sampleNum = 0; sampleNum <
>> pDstSurface->numSamples; sampleNum++)
>> +{
>> +float sampleColor[4] = {0};
>> +uint8_t *pSampleSrc = pSrc + sampleOffset *
>> sampleNum;
>> +GetSwizzledSrcColor(pSampleSrc, rx, ry,
>> sampleColor);
>> +resolveColor[0] += sampleColor[0];
>> +resolveColor[1] += sampleColor[1];
>> +resolveColor[2] += sampleColor[2];
>> +resolveColor[3] += sampleColor[3];
>> +}
>> +
>> +// Divide by numSamples to average
>> +resolveColor[0] *= oneOverNumSamples;
>> +resolveColor[1] *= oneOverNumSamples;
>> +resolveColor[2] *= oneOverNumSamples;
>> +resolveColor[3] *= oneOverNumSamples;
>> +
>> +// Use the resolve surface state
>> +SWR_SURFACE_STATE* pResolveSurface =
>> (SWR_SURFACE_STATE*)pDstSurface->pAuxBaseAddress;
>> +uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress> false>((x + rx), (y + ry),
>> +pResolveSurface->arrayIndex +
>> renderTargetArrayIndex, pResolveSurface->arrayIndex + renderTargetArrayIndex,
>> +0, pResolveSurface->lod, pResolveSurface);
>> +
Re: [Mesa-dev] [PATCH v2] swr: move msaa resolve to generalized StoreTile
Erm, so ... what happens if I render to FB1, then render to FB2, then
render to FB1 again (and I have blending enabled)? Doesn't the resolve
lose the per-sample information? Or does the resolve merely precompute
the resolved version on the off chance that it's needed, without
losing the source data?
On Thu, Apr 27, 2017 at 8:22 PM, Bruce Cherniak
wrote:
> v2: Reword commit message to more closely adhere to community
> guidelines.
>
> This patch moves msaa resolve down into core/StoreTiles where the
> surface format conversion routines are available. The previous
> "experimental" resolve was limited to 8-bit unsigned render targets.
>
> This fixes a number of piglit msaa tests by adding resolve support for
> all the render target formats we support.
>
> MSAA is still disabled by default, but can be enabled with
> "export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options)
> The default is 0, which is disabled.
>
> Because it fixes a number of piglit tests, I kindly request inclusion
> into 17.1 stable.
>
> cc: mesa-sta...@lists.freedesktop.org
> ---
> .../drivers/swr/rasterizer/memory/StoreTile.h | 75 +
> src/gallium/drivers/swr/swr_context.cpp| 77
> +-
> src/gallium/drivers/swr/swr_screen.cpp | 10 +--
> 3 files changed, 82 insertions(+), 80 deletions(-)
>
> diff --git a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
> b/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
> index ffde574c03..12a5f3d8ce 100644
> --- a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
> +++ b/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
> @@ -1133,6 +1133,64 @@ struct StoreRasterTile
> }
> }
> }
> +
> +
> //
> +/// @brief Resolves an 8x8 raster tile to the resolve destination
> surface.
> +/// @param pSrc - Pointer to raster tile.
> +/// @param pDstSurface - Destination surface state
> +/// @param x, y - Coordinates to raster tile.
> +/// @param sampleOffset - Offset between adjacent multisamples
> +INLINE static void Resolve(
> +uint8_t *pSrc,
> +SWR_SURFACE_STATE* pDstSurface,
> +uint32_t x, uint32_t y, uint32_t sampleOffset, uint32_t
> renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile.
> +{
> +uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod,
> 1U);
> +uint32_t lodHeight = std::max(pDstSurface->height >>
> pDstSurface->lod, 1U);
> +
> +float oneOverNumSamples = 1.0f / pDstSurface->numSamples;
> +
> +// For each raster tile pixel (rx, ry)
> +for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry)
> +{
> +for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx)
> +{
> +// Perform bounds checking.
> +if (((x + rx) < lodWidth) &&
> +((y + ry) < lodHeight))
> +{
> +// Sum across samples
> +float resolveColor[4] = {0};
> +for (uint32_t sampleNum = 0; sampleNum <
> pDstSurface->numSamples; sampleNum++)
> +{
> +float sampleColor[4] = {0};
> +uint8_t *pSampleSrc = pSrc + sampleOffset *
> sampleNum;
> +GetSwizzledSrcColor(pSampleSrc, rx, ry, sampleColor);
> +resolveColor[0] += sampleColor[0];
> +resolveColor[1] += sampleColor[1];
> +resolveColor[2] += sampleColor[2];
> +resolveColor[3] += sampleColor[3];
> +}
> +
> +// Divide by numSamples to average
> +resolveColor[0] *= oneOverNumSamples;
> +resolveColor[1] *= oneOverNumSamples;
> +resolveColor[2] *= oneOverNumSamples;
> +resolveColor[3] *= oneOverNumSamples;
> +
> +// Use the resolve surface state
> +SWR_SURFACE_STATE* pResolveSurface =
> (SWR_SURFACE_STATE*)pDstSurface->pAuxBaseAddress;
> +uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress false>((x + rx), (y + ry),
> +pResolveSurface->arrayIndex +
> renderTargetArrayIndex, pResolveSurface->arrayIndex + renderTargetArrayIndex,
> +0, pResolveSurface->lod, pResolveSurface);
> +{
> +ConvertPixelFromFloat(pDst, resolveColor);
> +}
> +}
> +}
> +}
> +}
> +
> };
>
> template
> @@ -2316,6 +2374,9 @@ struct StoreMacroTile
> pfnStore[sampleNum] = (bForceGeneric ||
> KNOB_USE_GENERIC_STORETILE) ? StoreRasterTile DstFormat>::Store : OptStoreRasterTile::Store;
> }
>
> +// Save original for pSrcHotTile resolve.
> +
[Mesa-dev] [PATCH v2] swr: move msaa resolve to generalized StoreTile
v2: Reword commit message to more closely adhere to community
guidelines.
This patch moves msaa resolve down into core/StoreTiles where the
surface format conversion routines are available. The previous
"experimental" resolve was limited to 8-bit unsigned render targets.
This fixes a number of piglit msaa tests by adding resolve support for
all the render target formats we support.
MSAA is still disabled by default, but can be enabled with
"export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options)
The default is 0, which is disabled.
Because it fixes a number of piglit tests, I kindly request inclusion
into 17.1 stable.
cc: mesa-sta...@lists.freedesktop.org
---
.../drivers/swr/rasterizer/memory/StoreTile.h | 75 +
src/gallium/drivers/swr/swr_context.cpp| 77 +-
src/gallium/drivers/swr/swr_screen.cpp | 10 +--
3 files changed, 82 insertions(+), 80 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
b/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
index ffde574c03..12a5f3d8ce 100644
--- a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
+++ b/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
@@ -1133,6 +1133,64 @@ struct StoreRasterTile
}
}
}
+
+//
+/// @brief Resolves an 8x8 raster tile to the resolve destination surface.
+/// @param pSrc - Pointer to raster tile.
+/// @param pDstSurface - Destination surface state
+/// @param x, y - Coordinates to raster tile.
+/// @param sampleOffset - Offset between adjacent multisamples
+INLINE static void Resolve(
+uint8_t *pSrc,
+SWR_SURFACE_STATE* pDstSurface,
+uint32_t x, uint32_t y, uint32_t sampleOffset, uint32_t
renderTargetArrayIndex) // (x, y) pixel coordinate to start of raster tile.
+{
+uint32_t lodWidth = std::max(pDstSurface->width >> pDstSurface->lod,
1U);
+uint32_t lodHeight = std::max(pDstSurface->height >> pDstSurface->lod,
1U);
+
+float oneOverNumSamples = 1.0f / pDstSurface->numSamples;
+
+// For each raster tile pixel (rx, ry)
+for (uint32_t ry = 0; ry < KNOB_TILE_Y_DIM; ++ry)
+{
+for (uint32_t rx = 0; rx < KNOB_TILE_X_DIM; ++rx)
+{
+// Perform bounds checking.
+if (((x + rx) < lodWidth) &&
+((y + ry) < lodHeight))
+{
+// Sum across samples
+float resolveColor[4] = {0};
+for (uint32_t sampleNum = 0; sampleNum <
pDstSurface->numSamples; sampleNum++)
+{
+float sampleColor[4] = {0};
+uint8_t *pSampleSrc = pSrc + sampleOffset * sampleNum;
+GetSwizzledSrcColor(pSampleSrc, rx, ry, sampleColor);
+resolveColor[0] += sampleColor[0];
+resolveColor[1] += sampleColor[1];
+resolveColor[2] += sampleColor[2];
+resolveColor[3] += sampleColor[3];
+}
+
+// Divide by numSamples to average
+resolveColor[0] *= oneOverNumSamples;
+resolveColor[1] *= oneOverNumSamples;
+resolveColor[2] *= oneOverNumSamples;
+resolveColor[3] *= oneOverNumSamples;
+
+// Use the resolve surface state
+SWR_SURFACE_STATE* pResolveSurface =
(SWR_SURFACE_STATE*)pDstSurface->pAuxBaseAddress;
+uint8_t *pDst = (uint8_t*)ComputeSurfaceAddress((x + rx), (y + ry),
+pResolveSurface->arrayIndex + renderTargetArrayIndex,
pResolveSurface->arrayIndex + renderTargetArrayIndex,
+0, pResolveSurface->lod, pResolveSurface);
+{
+ConvertPixelFromFloat(pDst, resolveColor);
+}
+}
+}
+}
+}
+
};
template
@@ -2316,6 +2374,9 @@ struct StoreMacroTile
pfnStore[sampleNum] = (bForceGeneric ||
KNOB_USE_GENERIC_STORETILE) ? StoreRasterTile::Store : OptStoreRasterTile::Store;
}
+// Save original for pSrcHotTile resolve.
+uint8_t *pResolveSrcHotTile = pSrcHotTile;
+
// Store each raster tile from the hot tile to the destination surface.
for(uint32_t row = 0; row < KNOB_MACROTILE_Y_DIM; row +=
KNOB_TILE_Y_DIM)
{
@@ -2328,6 +2389,20 @@ struct StoreMacroTile
}
}
}
+
+if (pDstSurface->pAuxBaseAddress)
+{
+uint32_t sampleOffset = KNOB_TILE_X_DIM * KNOB_TILE_Y_DIM *
(FormatTraits::bpp / 8);
+// Store each raster tile from the hot tile to the destination
surface.
+for(uint32_t row = 0; ro
Re: [Mesa-dev] [PATCH v02 26/37] i965: Port gen6+ 3DSTATE_WM to genxml.
On Wed, Apr 26, 2017 at 11:15:45PM -0700, Kenneth Graunke wrote:
> On Monday, April 24, 2017 3:19:21 PM PDT Rafael Antognolli wrote:
> [snip]
> > diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
> > b/src/mesa/drivers/dri/i965/genX_state_upload.c
> > index 1b9dedf..0f7a222 100644
> > --- a/src/mesa/drivers/dri/i965/genX_state_upload.c
> > +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
> > @@ -28,6 +28,7 @@
> >
> > #include "brw_context.h"
> > #include "brw_state.h"
> > +#include "brw_wm.h"
> > #include "brw_util.h"
> >
> > #include "intel_batchbuffer.h"
> > @@ -39,6 +40,8 @@
> > #include "main/stencil.h"
> > #include "main/transformfeedback.h"
> >
> > +#include "compiler/brw_defines_common.h"
> > +
> > UNUSED static void *
> > emit_dwords(struct brw_context *brw, unsigned n)
> > {
> > @@ -788,6 +791,189 @@ static const struct brw_tracked_state genX(sf_state)
> > = {
> > .emit = genX(upload_sf),
> > };
> >
> > +/* --
> > */
> > +
> > +static void
> > +genX(upload_wm)(struct brw_context *brw)
> > +{
> > + struct gl_context *ctx = &brw->ctx;
> > +
> > + /* BRW_NEW_FS_PROG_DATA */
> > + const struct brw_wm_prog_data *wm_prog_data =
> > + brw_wm_prog_data(brw->wm.base.prog_data);
> > +#if GEN_GEN < 8
> > + bool writes_depth = wm_prog_data->computed_depth_mode !=
> > BRW_PSCDEPTH_OFF;
> > + /* _NEW_BUFFERS */
> > + const bool multisampled_fbo = _mesa_geometric_samples(ctx->DrawBuffer)
> > > 1;
> > +#endif
>
> I think you can declare these in the GEN_GEN < 8 block below and save
> yourself an #if...#endif block.
Hmmm... it looks like I can't do that with writes_depth, because it is
also used in the GEN_GEN < 7 block. Is it fine if I just leave it at the
top with UNUSED?
> > +
> > +#if GEN_GEN < 7
> > + const struct brw_stage_state *stage_state = &brw->wm.base;
> > + const bool enable_dual_src_blend = wm_prog_data->dual_src_blend &&
> > + (ctx->Color.BlendEnabled & 1) &&
> > + ctx->Color.Blend[0]._UsesDualSrc;
>
> Let's get rid of enable_dual_src_blend and just put the expression in
> the wm.DualSourceBlendEnable assignment below. Then this whole block
> is about constant packets, which reads nicely.
>
> > + const struct gen_device_info *devinfo = &brw->screen->devinfo;
> > +
> > + /* We can't fold this into gen6_upload_wm_push_constants(), because
> > +* according to the SNB PRM, vol 2 part 1 section 7.2.2
> > +* (3DSTATE_CONSTANT_PS [DevSNB]):
> > +*
> > +* "[DevSNB]: This packet must be followed by WM_STATE."
> > +*/
> > + brw_batch_emit(brw, GENX(3DSTATE_CONSTANT_PS), wmcp) {
> > + if (wm_prog_data->base.nr_params != 0) {
> > + wmcp.Buffer0Valid = true;
> > + /* Pointer to the WM constant buffer. Covered by the set of
> > + * state flags from gen6_upload_wm_push_constants.
> > + */
> > + wmcp.PointertoPSConstantBuffer0 = stage_state->push_const_offset;
> > + wmcp.PSConstantBuffer0ReadLength = stage_state->push_const_size -
> > 1;
> > + }
> > + }
> > +#endif
> > +
> > + brw_batch_emit(brw, GENX(3DSTATE_WM), wm) {
> > + wm.StatisticsEnable = true;
> > + wm.LineAntialiasingRegionWidth = _10pixels;
> > + wm.LineEndCapAntialiasingRegionWidth = _05pixels;
> > +
> > +#if GEN_GEN < 7
> > + if (wm_prog_data->base.use_alt_mode)
> > + wm.FloatingPointMode = Alternate;
> > +
> > + wm.SamplerCount |= ALIGN(stage_state->sampler_count, 4) / 4;
>
> You want =, not |=. Also, let's use DIV_ROUND_UP:
>
> wm.SamplerCount = DIV_ROUND_UP(stage_state->sampler_count, 4);
>
> > + wm.BindingTableEntryCount =
> > wm_prog_data->base.binding_table.size_bytes / 4;
> > + wm.MaximumNumberofThreads = devinfo->max_wm_threads - 1;
> > + wm._8PixelDispatchEnable = !!wm_prog_data->dispatch_8;
> > + wm._16PixelDispatchEnable = !!wm_prog_data->dispatch_16;
>
> I don't think you need !! - these are bools, they turn into 0 or 1
> automatically.
>
> > + wm.DispatchGRFStartRegisterForConstantSetupData0 =
> > + wm_prog_data->base.dispatch_grf_start_reg;
> > + wm.DispatchGRFStartRegisterForConstantSetupData2 =
> > + wm_prog_data->dispatch_grf_start_reg_2;
> > + wm.KernelStartPointer0 = stage_state->prog_offset;
> > + wm.KernelStartPointer2 = stage_state->prog_offset +
> > + wm_prog_data->prog_offset_2;
> > + wm.DualSourceBlendEnable = enable_dual_src_blend;
> > + wm.oMaskPresenttoRenderTarget = wm_prog_data->uses_omask;
> > + wm.NumberofSFOutputAttributes = wm_prog_data->num_varying_inputs;
> > +
> > + /* From the SNB PRM, volume 2 part 1, page 281:
> > + * "If the PS kernel does not need the Position XY Offsets
> > + * to compute a Position XY value, then this field should be
> > + * programmed to POSOFFSET
Re: [Mesa-dev] [PATCH 3/3] glsl: reject image qualifiers with non-image types inside uniform blocks
On 28/04/17 10:06, Timothy Arceri wrote: On 27/04/17 02:50, Samuel Pitoiset wrote: Interface blocks don't allow to declare opaque types and atomic counters/images are forbidden inside structures. The above comment seems unrelated to me. With that removed and the below comment changed to something like: Fixes the following ARB_bindless_texture piglit tests: ARB_bindless_texture -> ARB_shader_image_load_store format-layout-with-non-image-type.frag memory-qualifier-with-non-image-type.frag The series is: Reviewed-by: Timothy Arceri Fixes format-layout-with-non-image-type.frag and memory-qualifier-with-non-image-type.frag. Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/ast_to_hir.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp index a1463c38c8..6b6be818b3 100644 --- a/src/compiler/glsl/ast_to_hir.cpp +++ b/src/compiler/glsl/ast_to_hir.cpp @@ -6890,6 +6890,8 @@ ast_process_struct_or_iface_block_members(exec_list *instructions, "to struct or interface block members"); } + validate_image_qualifier_for_type(state, &loc, qual, decl_type); + /* From Section 4.4.2.3 (Geometry Outputs) of the GLSL 4.50 spec: * * "A block member may be declared with a stream identifier, but ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/3] glsl: reject image qualifiers with non-image types inside uniform blocks
On 27/04/17 02:50, Samuel Pitoiset wrote: Interface blocks don't allow to declare opaque types and atomic counters/images are forbidden inside structures. The above comment seems unrelated to me. With that removed and the below comment changed to something like: Fixes the following ARB_bindless_texture piglit tests: format-layout-with-non-image-type.frag memory-qualifier-with-non-image-type.frag The series is: Reviewed-by: Timothy Arceri Fixes format-layout-with-non-image-type.frag and memory-qualifier-with-non-image-type.frag. Signed-off-by: Samuel Pitoiset --- src/compiler/glsl/ast_to_hir.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp index a1463c38c8..6b6be818b3 100644 --- a/src/compiler/glsl/ast_to_hir.cpp +++ b/src/compiler/glsl/ast_to_hir.cpp @@ -6890,6 +6890,8 @@ ast_process_struct_or_iface_block_members(exec_list *instructions, "to struct or interface block members"); } + validate_image_qualifier_for_type(state, &loc, qual, decl_type); + /* From Section 4.4.2.3 (Geometry Outputs) of the GLSL 4.50 spec: * * "A block member may be declared with a stream identifier, but ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] anv: Drop 'x11' prefix from non-X11 WSI funcs
Drop it from x11_anv_wsi_image_create and x11_anv_wsi_image_free. The
functions are used by Wayland WSI too.
---
src/intel/vulkan/anv_wsi.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index ba66ea6d461..0afedcffb01 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -142,16 +142,16 @@ VkResult anv_GetPhysicalDeviceSurfacePresentModesKHR(
static VkResult
-x11_anv_wsi_image_create(VkDevice device_h,
- const VkSwapchainCreateInfoKHR *pCreateInfo,
- const VkAllocationCallbacks* pAllocator,
- bool different_gpu,
- bool linear,
- VkImage *image_p,
- VkDeviceMemory *memory_p,
- uint32_t *size,
- uint32_t *offset,
- uint32_t *row_pitch, int *fd_p)
+anv_wsi_image_create(VkDevice device_h,
+ const VkSwapchainCreateInfoKHR *pCreateInfo,
+ const VkAllocationCallbacks* pAllocator,
+ bool different_gpu,
+ bool linear,
+ VkImage *image_p,
+ VkDeviceMemory *memory_p,
+ uint32_t *size,
+ uint32_t *offset,
+ uint32_t *row_pitch, int *fd_p)
{
struct anv_device *device = anv_device_from_handle(device_h);
VkImage image_h;
@@ -248,10 +248,10 @@ fail_create_image:
}
static void
-x11_anv_wsi_image_free(VkDevice device,
- const VkAllocationCallbacks* pAllocator,
- VkImage image_h,
- VkDeviceMemory memory_h)
+anv_wsi_image_free(VkDevice device,
+ const VkAllocationCallbacks* pAllocator,
+ VkImage image_h,
+ VkDeviceMemory memory_h)
{
anv_DestroyImage(device, image_h, pAllocator);
@@ -259,8 +259,8 @@ x11_anv_wsi_image_free(VkDevice device,
}
static const struct wsi_image_fns anv_wsi_image_fns = {
- .create_wsi_image = x11_anv_wsi_image_create,
- .free_wsi_image = x11_anv_wsi_image_free,
+ .create_wsi_image = anv_wsi_image_create,
+ .free_wsi_image = anv_wsi_image_free,
};
VkResult anv_CreateSwapchainKHR(
--
2.12.0
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Re: [Mesa-dev] [PATCH 08/21] anv/allocator: Add a BO cache
On Fri 14 Apr 2017, Jason Ekstrand wrote:
> This cache allows us to easily ensure that we have a unique anv_bo for
> each gem handle. We'll need this in order to support multiple-import of
> memory objects and semaphores.
>
> v2 (Jason Ekstrand):
> - Reject BO imports if the size doesn't match the prime fd size as
>reported by lseek().
> ---
> src/intel/vulkan/anv_allocator.c | 257
> +
> src/intel/vulkan/anv_private.h | 21 ++
> .../drivers/dri/i965/brw_nir_trig_workarounds.c| 191 +++
Hmm... nir trig workarounds. That's cool :)
> 3 files changed, 469 insertions(+)
> create mode 100644 src/mesa/drivers/dri/i965/brw_nir_trig_workarounds.c
> +VkResult
> +anv_bo_cache_init(struct anv_bo_cache *cache)
> +{
> + cache->bo_map = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
> + _mesa_key_pointer_equal);
> + if (!cache->bo_map)
> + return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
> +
> + if (pthread_mutex_init(&cache->mutex, NULL)) {
> + _mesa_hash_table_destroy(cache->bo_map, NULL);
> + return vk_errorf(VK_ERROR_OUT_OF_HOST_MEMORY,
> + "pthread_mutex_inti failed: %m");
Typo s/inti/init/
> + }
> +static struct anv_bo *
> +anv_bo_cache_lookup(struct anv_bo_cache *cache, uint32_t gem_handle)
> +{
> + pthread_mutex_lock(&cache->mutex);
> +
> + struct anv_cached_bo *bo = anv_bo_cache_lookup_locked(cache, gem_handle);
> +
> + pthread_mutex_unlock(&cache->mutex);
> +
> + return &bo->bo;
This correctly returns NULL when the lookup fails, but only by luck
because offset(struct anv_cache_bo, bo) == 0. It should really be
rewritten to avoid the dereference after lookup failures.
> +}
Fix those three issues, and this patch will be
Reviewed-by: Chad Versace
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Re: [Mesa-dev] [PATCH 03/21] anv: Set EXEC_OBJECT_ASYNC when available
On Fri 14 Apr 2017, Jason Ekstrand wrote: > --- > src/intel/vulkan/anv_allocator.c | 3 +++ > src/intel/vulkan/anv_device.c| 5 + > src/intel/vulkan/anv_private.h | 1 + > src/intel/vulkan/anv_wsi.c | 1 + > 4 files changed, 10 insertions(+) Patch 3 is Reviewed-by: Chad Versace ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 100854] YUV to RGB Color Space Conversion result is not precise
https://bugs.freedesktop.org/show_bug.cgi?id=100854 --- Comment #1 from Matt Turner --- Do you have a test program that shows the issue? -- You are receiving this mail because: You are the assignee for the bug.___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/2] wglgears.c: add -srgb option
Series looks good. One typo below:
>From: Brian Paul
>Sent: Thursday, April 27, 2017 10:19 AM
>To: mesa-dev@lists.freedesktop.org
>Cc: Charmaine Lee; Neha Bhende
>Subject: [PATCH 1/2] wglgears.c: add -srgb option
>To test sRGB pixel format selection and sRGB rendering.
>This involves choosing a new pixel format, creating a new context, etc.
>---
> src/wgl/wglgears.c | 91 --
> 1 file changed, 88 insertions(+), 3 deletions(-)
>diff --git a/src/wgl/wglgears.c b/src/wgl/wglgears.c
>index d90d603..7d43822 100644
>--- a/src/wgl/wglgears.c
>+++ b/src/wgl/wglgears.c
>@@ -30,6 +30,7 @@
> * 25th October 2004
> */
...
>+ if (use_srgb) {
>+ /* For sRGB we need to use the wglChoosePixelFormatARB() function,
>+ * and then create a new context, window, etc.
>+ *
>+ * Note: we can't query/use extension functions until after we've
>+ * creatend and bound a rendering context.
s/creatend/created
BTW, can you also add a comment that we can only set the pixel format of the
window
once, so we need to create a new device context in order to use the pixel
format returned
from wglChoosePixelFormatARB.
Other than that,
Reviewed-by: Charmaine Lee
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Re: [Mesa-dev] [PATCH v3 03/14] spirv: Add support for SPV_KHR_multiview
Patch 1-3 are
Reviewed-by: Bas Nieuwenhuizen
On Thu, Apr 27, 2017 at 6:31 PM, Jason Ekstrand wrote:
> Reviewed-by: Iago Toral Quiroga
> ---
> src/compiler/spirv/nir_spirv.h | 1 +
> src/compiler/spirv/spirv_to_nir.c | 4
> src/compiler/spirv/vtn_variables.c | 4
> 3 files changed, 9 insertions(+)
>
> diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
> index 1779d1c..7f16866 100644
> --- a/src/compiler/spirv/nir_spirv.h
> +++ b/src/compiler/spirv/nir_spirv.h
> @@ -50,6 +50,7 @@ struct nir_spirv_supported_extensions {
> bool image_read_without_format;
> bool image_write_without_format;
> bool int64;
> + bool multiview;
> };
>
> nir_function *spirv_to_nir(const uint32_t *words, size_t word_count,
> diff --git a/src/compiler/spirv/spirv_to_nir.c
> b/src/compiler/spirv/spirv_to_nir.c
> index d3ad2d1..c120ad6 100644
> --- a/src/compiler/spirv/spirv_to_nir.c
> +++ b/src/compiler/spirv/spirv_to_nir.c
> @@ -2730,6 +2730,10 @@ vtn_handle_preamble_instruction(struct vtn_builder *b,
> SpvOp opcode,
> spv_check_supported(image_write_without_format, cap);
> break;
>
> + case SpvCapabilityMultiView:
> + spv_check_supported(multiview, cap);
> + break;
> +
>default:
> unreachable("Unhandled capability");
>}
> diff --git a/src/compiler/spirv/vtn_variables.c
> b/src/compiler/spirv/vtn_variables.c
> index 293d07d..365e562 100644
> --- a/src/compiler/spirv/vtn_variables.c
> +++ b/src/compiler/spirv/vtn_variables.c
> @@ -1036,6 +1036,10 @@ vtn_get_builtin_location(struct vtn_builder *b,
>*location = SYSTEM_VALUE_DRAW_ID;
>set_mode_system_value(mode);
>break;
> + case SpvBuiltInViewIndex:
> + *location = SYSTEM_VALUE_VIEW_INDEX;
> + set_mode_system_value(mode);
> + break;
> case SpvBuiltInHelperInvocation:
> default:
>unreachable("unsupported builtin");
> --
> 2.5.0.400.gff86faf
>
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Re: [Mesa-dev] [PATCH] glsl: set vector_elements to 1 for samplers
On 26.04.2017 13:49, Samuel Pitoiset wrote:
I don't see any reasons why vector_elements is 1 for images and
0 for samplers. This increases consistency and allows to clean
up some code a bit.
This will also help for ARB_bindless_texture.
No piglit regressions with RadeonSI.
Signed-off-by: Samuel Pitoiset
Reviewed-by: Nicolai Hähnle
---
src/compiler/glsl_types.cpp | 7 +--
src/mesa/main/uniform_query.cpp | 15 +--
2 files changed, 6 insertions(+), 16 deletions(-)
diff --git a/src/compiler/glsl_types.cpp b/src/compiler/glsl_types.cpp
index 0480bef80e..bf078ad614 100644
--- a/src/compiler/glsl_types.cpp
+++ b/src/compiler/glsl_types.cpp
@@ -95,12 +95,7 @@ glsl_type::glsl_type(GLenum gl_type, glsl_base_type
base_type,
memset(& fields, 0, sizeof(fields));
- if (is_sampler()) {
- /* Samplers take no storage whatsoever. */
- matrix_columns = vector_elements = 0;
- } else {
- matrix_columns = vector_elements = 1;
- }
+ matrix_columns = vector_elements = 1;
}
glsl_type::glsl_type(const glsl_struct_field *fields, unsigned num_fields,
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index e400d0eb00..114f6fb5be 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/main/uniform_query.cpp
@@ -321,8 +321,7 @@ _mesa_get_uniform(struct gl_context *ctx, GLuint program,
GLint location,
}
{
- unsigned elements = (uni->type->is_sampler())
-? 1 : uni->type->components();
+ unsigned elements = uni->type->components();
const int dmul = uni->type->is_64bit() ? 2 : 1;
const int rmul = glsl_base_type_is_64bit(returnType) ? 2 : 1;
@@ -648,10 +647,8 @@ _mesa_propagate_uniforms_to_driver_storage(struct
gl_uniform_storage *uni,
{
unsigned i;
- /* vector_elements and matrix_columns can be 0 for samplers.
-*/
- const unsigned components = MAX2(1, uni->type->vector_elements);
- const unsigned vectors = MAX2(1, uni->type->matrix_columns);
+ const unsigned components = uni->type->vector_elements;
+ const unsigned vectors = uni->type->matrix_columns;
const int dmul = uni->type->is_64bit() ? 2 : 1;
/* Store the data in the driver's requested type in the driver's storage
@@ -803,8 +800,7 @@ validate_uniform(GLint location, GLsizei count, const
GLvoid *values,
}
/* Verify that the types are compatible. */
- const unsigned components = uni->type->is_sampler()
- ? 1 : uni->type->vector_elements;
+ const unsigned components = uni->type->vector_elements;
if (components != src_components) {
/* glUniformN() must match float/vecN type */
@@ -925,8 +921,7 @@ _mesa_uniform(GLint location, GLsizei count, const GLvoid
*values,
return;
}
- const unsigned components = uni->type->is_sampler()
- ? 1 : uni->type->vector_elements;
+ const unsigned components = uni->type->vector_elements;
/* Page 82 (page 96 of the PDF) of the OpenGL 2.1 spec says:
*
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Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
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[Mesa-dev] [PATCH 07/12] Android: remove needless conditional including of child makefiles
It is not necessary to filter driver and winsys directories based on the list of enabled drivers. Selecting the included driver libraries or not is sufficient to control what is built. Signed-off-by: Rob Herring --- Android.mk | 8 -- src/gallium/Android.mk | 52 +++-- src/mesa/Android.libmesa_dricore.mk | 4 --- src/mesa/Android.libmesa_st_mesa.mk | 4 --- src/mesa/drivers/dri/Android.mk | 11 +--- 5 files changed, 4 insertions(+), 75 deletions(-) diff --git a/Android.mk b/Android.mk index fdbf22fe643a..08daf770f26b 100644 --- a/Android.mk +++ b/Android.mk @@ -76,8 +76,6 @@ endif MESA_ENABLE_LLVM := $(if $(filter radeonsi,$(MESA_GPU_DRIVERS)),true,false) # add subdirectories -ifneq ($(strip $(MESA_GPU_DRIVERS)),) - SUBDIRS := \ src/gbm \ src/loader \ @@ -92,11 +90,5 @@ SUBDIRS := \ src/vulkan INC_DIRS := $(call all-named-subdir-makefiles,$(SUBDIRS)) - -ifeq ($(strip $(MESA_BUILD_GALLIUM)),true) INC_DIRS += $(call all-named-subdir-makefiles,src/gallium) -endif - include $(INC_DIRS) - -endif diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk index e67cfab5b316..7c6bda68d59f 100644 --- a/src/gallium/Android.mk +++ b/src/gallium/Android.mk @@ -33,62 +33,16 @@ SUBDIRS += auxiliary/pipe-loader # Gallium drivers and their respective winsys # -# swrast -ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/sw/dri drivers/softpipe -endif - -# freedreno -ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/freedreno/drm drivers/freedreno -endif - -# i915g -ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/i915/drm drivers/i915 -endif - -# nouveau -ifneq ($(filter nouveau, $(MESA_GPU_DRIVERS)),) -SUBDIRS += \ - winsys/nouveau/drm \ - drivers/nouveau -endif - -# r300g/r600g/radeonsi -ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),) -SUBDIRS += winsys/radeon/drm -ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),) -SUBDIRS += drivers/r300 -endif -ifneq ($(filter r600g radeonsi, $(MESA_GPU_DRIVERS)),) -SUBDIRS += drivers/radeon -ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),) -SUBDIRS += drivers/r600 -endif -ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),) -SUBDIRS += drivers/radeonsi -SUBDIRS += winsys/amdgpu/drm -endif -endif -endif - -# vc4 -ifneq ($(filter vc4, $(MESA_GPU_DRIVERS)),) +SUBDIRS += winsys/nouveau/drm drivers/nouveau +SUBDIRS += drivers/r300 drivers/r600 drivers/radeon drivers/radeonsi +SUBDIRS += winsys/amdgpu/drm winsys/radeon/drm SUBDIRS += winsys/vc4/drm drivers/vc4 -endif - -# virgl -ifneq ($(filter virgl, $(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/virgl/drm winsys/virgl/vtest drivers/virgl -endif - -# vmwgfx -ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),) SUBDIRS += winsys/svga/drm drivers/svga -endif -# Gallium state trackers and target for dri SUBDIRS += state_trackers/dri targets/dri include $(call all-named-subdir-makefiles,$(SUBDIRS)) diff --git a/src/mesa/Android.libmesa_dricore.mk b/src/mesa/Android.libmesa_dricore.mk index 86196ceb36ab..599b9ccd71ed 100644 --- a/src/mesa/Android.libmesa_dricore.mk +++ b/src/mesa/Android.libmesa_dricore.mk @@ -24,8 +24,6 @@ # libmesa_dricore.a # -- -ifeq ($(strip $(MESA_BUILD_CLASSIC)),true) - LOCAL_PATH := $(call my-dir) # Import the following variables: @@ -72,5 +70,3 @@ LOCAL_WHOLE_STATIC_LIBRARIES += \ include $(LOCAL_PATH)/Android.gen.mk include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) - -endif # MESA_BUILD_CLASSIC diff --git a/src/mesa/Android.libmesa_st_mesa.mk b/src/mesa/Android.libmesa_st_mesa.mk index 92df4ad2845b..de2a60a70ed9 100644 --- a/src/mesa/Android.libmesa_st_mesa.mk +++ b/src/mesa/Android.libmesa_st_mesa.mk @@ -24,8 +24,6 @@ # libmesa_st_mesa.a # -- -ifeq ($(strip $(MESA_BUILD_GALLIUM)),true) - LOCAL_PATH := $(call my-dir) # Import variables: @@ -72,5 +70,3 @@ LOCAL_STATIC_LIBRARIES += libmesa_nir libmesa_glsl include $(LOCAL_PATH)/Android.gen.mk include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) - -endif # MESA_BUILD_GALLIUM diff --git a/src/mesa/drivers/dri/Android.mk b/src/mesa/drivers/dri/Android.mk index 72a5593fefad..d4fb670f84ce 100644 --- a/src/mesa/drivers/dri/Android.mk +++ b/src/mesa/drivers/dri/Android.mk @@ -56,14 +56,5 @@ MESA_DRI_SHARED_LIBRARIES := \ #--- # Build drivers and libmesa_dri_common -SUBDIRS := common - -ifneq ($(filter i915, $(MESA_GPU_DRIVERS)),) - SUBDIRS += i915 -endif - -ifneq ($(filter i965, $(MESA_GPU_DRIVERS)),) - SUBDIRS += i965 -endif - +SUBDIRS := common i915 i965 include $(foreach d, $(SUBDIRS), $(LOCAL_PATH)/$(d)/Android.mk) -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/m
[Mesa-dev] [PATCH 12/12] Android: Drop linking libgcc
Including libgcc breaks on Android O (master). Not exactly sure if it is still needed on older versions or not. N is build with clang, so it should be fine at least. Signed-off-by: Rob Herring --- src/gallium/targets/dri/Android.mk | 4 1 file changed, 4 deletions(-) diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/Android.mk index 14d1dd5f5d8b..81ef3939f120 100644 --- a/src/gallium/targets/dri/Android.mk +++ b/src/gallium/targets/dri/Android.mk @@ -57,9 +57,5 @@ LOCAL_SHARED_LIBRARIES += $(sort $(GALLIUM_SHARED_LIBS)) LOCAL_STATIC_LIBRARIES := libelf -ifeq ($(MESA_ENABLE_LLVM),true) -LOCAL_LDLIBS += -lgcc -endif - include $(GALLIUM_COMMON_MK) include $(BUILD_SHARED_LIBRARY) -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 11/12] Android: Add LLVM support for Android O
Android O moves to LLVM 3.9 and also has some differences in header dependencies as LLVM has moved to blueprint files. It seems libLLVMCore was only needed for header dependencies. Signed-off-by: Rob Herring --- Android.common.mk| 5 +++-- src/amd/Android.common.mk| 7 ++- src/gallium/auxiliary/Android.mk | 12 3 files changed, 17 insertions(+), 7 deletions(-) diff --git a/Android.common.mk b/Android.common.mk index a7b78bb910fc..8669492bec11 100644 --- a/Android.common.mk +++ b/Android.common.mk @@ -86,9 +86,10 @@ endif ifeq ($(MESA_ENABLE_LLVM),true) ifeq ($(MESA_ANDROID_MAJOR_VERSION),6) LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0 - endif - ifeq ($(MESA_ANDROID_MAJOR_VERSION),7) + else ifeq ($(MESA_ANDROID_MAJOR_VERSION),7) LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0 + else +LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0 endif endif diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk index 764076e599e1..449e64d543f5 100644 --- a/src/amd/Android.common.mk +++ b/src/amd/Android.common.mk @@ -60,9 +60,14 @@ LOCAL_EXPORT_C_INCLUDE_DIRS := \ $(LOCAL_PATH)/common LOCAL_STATIC_LIBRARIES := \ - libLLVMCore \ libmesa_nir \ libelf +ifneq ($(filter $(MESA_ANDROID_MAJOR_VERSION), 5 6 7),) +LOCAL_STATIC_LIBRARIES += libLLVMCore +else +LOCAL_HEADER_LIBRARIES := llvm-headers +endif + include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) diff --git a/src/gallium/auxiliary/Android.mk b/src/gallium/auxiliary/Android.mk index e8628e43744a..58a8447b9ad6 100644 --- a/src/gallium/auxiliary/Android.mk +++ b/src/gallium/auxiliary/Android.mk @@ -38,12 +38,16 @@ LOCAL_C_INCLUDES := \ ifeq ($(MESA_ENABLE_LLVM),true) LOCAL_SRC_FILES += \ - $(GALLIVM_SOURCES) \ - $(GALLIVM_CPP_SOURCES) -LOCAL_STATIC_LIBRARIES += libLLVMCore -LOCAL_CPPFLAGS := -std=c++11 + $(GALLIVM_SOURCES) +ifneq ($(filter $(MESA_ANDROID_MAJOR_VERSION), 5 6 7),) +LOCAL_STATIC_LIBRARIES := libLLVMCore +else +LOCAL_HEADER_LIBRARIES := llvm-headers +endif endif +LOCAL_CPPFLAGS := -std=c++11 + # We need libmesa_nir to get NIR's generated include directories. LOCAL_MODULE := libmesa_gallium LOCAL_STATIC_LIBRARIES += libmesa_nir -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 05/12] Android: drop LLVM support on Lollipop
Mesa no longer supports LLVM 3.5 for any targets we support. Android-x86 adds support for llvmpipe which could work, but android-x86 for L is using mesa 11.0 anyway. Dropping this support enables clean-up of libelf dependencies. Signed-off-by: Rob Herring --- Android.common.mk | 4 1 file changed, 4 deletions(-) diff --git a/Android.common.mk b/Android.common.mk index ba3d1203ac11..38eb90991ab2 100644 --- a/Android.common.mk +++ b/Android.common.mk @@ -84,10 +84,6 @@ endif endif ifeq ($(MESA_ENABLE_LLVM),true) - ifeq ($(MESA_ANDROID_MAJOR_VERSION),5) -LOCAL_CFLAGS += -DHAVE_LLVM=0x0305 -DMESA_LLVM_VERSION_PATCH=2 -ELF_INCLUDES := external/elfutils/0.153/libelf - endif ifeq ($(MESA_ANDROID_MAJOR_VERSION),6) LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0 ELF_INCLUDES := external/elfutils/src/libelf -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 10/12] Android: default to building all drivers
If BOARD_GPU_DRIVERS is empty, build all the drivers. This doesn't enable building mesa as that is controlled by including libGLES_mesa in the product. Signed-off-by: Rob Herring --- Android.mk | 8 1 file changed, 8 insertions(+) diff --git a/Android.mk b/Android.mk index 9f481ee7e109..76858c1616bc 100644 --- a/Android.mk +++ b/Android.mk @@ -1,3 +1,4 @@ + # Mesa 3-D graphics library # # Copyright (C) 2010-2011 Chia-I Wu @@ -53,8 +54,15 @@ gallium_drivers := \ vc4.HAVE_GALLIUM_VC4 \ virgl.HAVE_GALLIUM_VIRGL +$(warning $(BOARD_GPU_DRIVERS)) + +ifeq ($(BOARD_GPU_DRIVERS),all) +MESA_BUILD_CLASSIC := $(filter HAVE_%, $(subst ., , $(classic_drivers))) +MESA_BUILD_GALLIUM := $(filter HAVE_%, $(subst ., , $(gallium_drivers))) +else MESA_BUILD_CLASSIC := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst $(d).%,%, $(filter $(d).%, $(classic_drivers) MESA_BUILD_GALLIUM := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst $(d).%,%, $(filter $(d).%, $(gallium_drivers) +endif $(foreach d, $(MESA_BUILD_CLASSIC) $(MESA_BUILD_GALLIUM), $(eval $(d) := true)) # host and target must be the same arch to generate matypes.h -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 08/12] Android: Fix swrast only build
A build of only swrast is broken as the Android EGL now depends on libdrm as does GBM. While we could make EGL conditionally depend on libdrm, we probably want to enable kms_dri winsys as well and that will need libdrm enabled. So just always enable libdrm and simplify the Android makefiles a bit. Signed-off-by: Rob Herring --- Android.common.mk| 2 -- src/gallium/auxiliary/pipe-loader/Android.mk | 7 +++ src/gallium/state_trackers/dri/Android.mk| 8 +++- 3 files changed, 6 insertions(+), 11 deletions(-) diff --git a/Android.common.mk b/Android.common.mk index 593f636a31ed..a7b78bb910fc 100644 --- a/Android.common.mk +++ b/Android.common.mk @@ -94,11 +94,9 @@ endif ifneq ($(LOCAL_IS_HOST_MODULE),true) # add libdrm if there are hardware drivers -ifneq ($(filter-out swrast,$(MESA_GPU_DRIVERS)),) LOCAL_CFLAGS += -DHAVE_LIBDRM LOCAL_SHARED_LIBRARIES += libdrm endif -endif LOCAL_CFLAGS_32 += -DDEFAULT_DRIVER_DIR=\"/system/lib/$(MESA_DRI_MODULE_REL_PATH)\" LOCAL_CFLAGS_64 += -DDEFAULT_DRIVER_DIR=\"/system/lib64/$(MESA_DRI_MODULE_REL_PATH)\" diff --git a/src/gallium/auxiliary/pipe-loader/Android.mk b/src/gallium/auxiliary/pipe-loader/Android.mk index 006bb0ebfd9f..1e1bb11153fc 100644 --- a/src/gallium/auxiliary/pipe-loader/Android.mk +++ b/src/gallium/auxiliary/pipe-loader/Android.mk @@ -33,14 +33,13 @@ LOCAL_CFLAGS := \ -DDROP_PIPE_LOADER_MISC \ -DGALLIUM_STATIC_TARGETS -LOCAL_SRC_FILES := $(COMMON_SOURCES) +LOCAL_SRC_FILES := \ + $(COMMON_SOURCES) \ + $(DRM_SOURCES) LOCAL_MODULE := libmesa_pipe_loader -ifneq ($(filter-out swrast,$(MESA_GPU_DRIVERS)),) -LOCAL_SRC_FILES += $(DRM_SOURCES) LOCAL_STATIC_LIBRARIES := libmesa_loader -endif include $(GALLIUM_COMMON_MK) include $(BUILD_STATIC_LIBRARY) diff --git a/src/gallium/state_trackers/dri/Android.mk b/src/gallium/state_trackers/dri/Android.mk index fd322a313832..97cf9376e199 100644 --- a/src/gallium/state_trackers/dri/Android.mk +++ b/src/gallium/state_trackers/dri/Android.mk @@ -27,7 +27,9 @@ include $(LOCAL_PATH)/Makefile.sources include $(CLEAR_VARS) -LOCAL_SRC_FILES := $(common_SOURCES) +LOCAL_SRC_FILES := \ + $(common_SOURCES) \ + $(dri2_SOURCES) LOCAL_C_INCLUDES := \ $(MESA_TOP)/src/mapi \ @@ -44,10 +46,6 @@ ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),) LOCAL_SRC_FILES += $(drisw_SOURCES) endif -ifneq ($(filter-out swrast,$(MESA_GPU_DRIVERS)),) -LOCAL_SRC_FILES += $(dri2_SOURCES) -endif - LOCAL_MODULE := libmesa_st_dri LOCAL_GENERATED_SOURCES := $(MESA_DRI_OPTIONS_H) -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 01/12] android: drop static linking of R600 LLVM libraries
From: Mauro Rossi Inspired by Chih-Wei Huang and Zhen Wu similar patches Linking against llvm with both static and shared may be avoided, provided that libLLVM shared library for device supports whole static R600/AMDGPU libraries, necessary for radeonsi/amdgpu. Complementary changes, limited to android external/llvm project are necessary to correclty build libLLVM Tested with marshmallow-x86 and nougat-x86 builds --- src/gallium/targets/dri/Android.mk | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/Android.mk index 39d2b6a8983a..f5f0124882fd 100644 --- a/src/gallium/targets/dri/Android.mk +++ b/src/gallium/targets/dri/Android.mk @@ -108,12 +108,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \ LOCAL_STATIC_LIBRARIES := ifeq ($(MESA_ENABLE_LLVM),true) -LOCAL_STATIC_LIBRARIES += \ - libLLVMR600CodeGen \ - libLLVMR600Desc \ - libLLVMR600Info \ - libLLVMR600AsmPrinter \ - libelf +LOCAL_STATIC_LIBRARIES += libelf LOCAL_LDLIBS += -lgcc endif -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 00/12] Android build cleanup/fixes
This is a series of clean-ups and fixes to the Android build files. Overall, it removes a lot of the if conditions that aren't necessary for normal builds and also enables "mmma external/mesa3d" to build everything for easier build testing. This fixes LLVM enabled builds on master though that requires changes to LLVM as well. In the process, LLVM builds with Lollipop are dropped as L doesn't have the minimum LLVM version for several drivers. Also, android-x86 L support is using mesa 11.0. I've only tested against AOSP master so far. Rob Mauro Rossi (2): android: drop static linking of R600 LLVM libraries android: define required __STDC* macros as cflags Rob Herring (10): Android: amd: use exported include dirs instead of explicit includes Android: amd/common: fix dependency on libmesa_nir Android: drop LLVM support on Lollipop Android: rework libelf dependencies Android: remove needless conditional including of child makefiles Android: Fix swrast only build Android: push driver build details to driver makefiles Android: default to building all drivers Android: Add LLVM support for Android O Android: Drop linking libgcc Android.common.mk| 15 ++ Android.mk | 57 ++- src/amd/Android.addrlib.mk | 6 +++ src/amd/Android.common.mk| 16 +-- src/compiler/Android.nir.gen.mk | 1 + src/egl/Android.mk | 14 ++ src/gallium/Android.common.mk| 3 +- src/gallium/Android.mk | 58 +++- src/gallium/auxiliary/Android.mk | 12 +++-- src/gallium/auxiliary/pipe-loader/Android.mk | 7 ++- src/gallium/drivers/freedreno/Android.mk | 5 ++ src/gallium/drivers/i915/Android.mk | 4 ++ src/gallium/drivers/nouveau/Android.mk | 5 ++ src/gallium/drivers/r300/Android.mk | 4 ++ src/gallium/drivers/r600/Android.mk | 10 ++-- src/gallium/drivers/radeon/Android.mk| 7 ++- src/gallium/drivers/radeonsi/Android.mk | 12 - src/gallium/drivers/softpipe/Android.mk | 4 ++ src/gallium/drivers/svga/Android.mk | 4 ++ src/gallium/drivers/vc4/Android.mk | 4 ++ src/gallium/drivers/virgl/Android.mk | 4 ++ src/gallium/state_trackers/dri/Android.mk| 10 ++-- src/gallium/targets/dri/Android.mk | 68 ++-- src/gallium/winsys/amdgpu/drm/Android.mk | 12 ++--- src/gallium/winsys/i915/drm/Android.mk | 4 ++ src/mesa/Android.libmesa_dricore.mk | 4 -- src/mesa/Android.libmesa_st_mesa.mk | 4 -- src/mesa/drivers/dri/Android.mk | 11 + 28 files changed, 149 insertions(+), 216 deletions(-) -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 03/12] Android: amd: use exported include dirs instead of explicit includes
Add exported include paths rather than explicitly adding the includes in each user of the common AMD libs. Signed-off-by: Rob Herring --- src/amd/Android.addrlib.mk | 6 ++ src/amd/Android.common.mk| 3 +++ src/gallium/drivers/r600/Android.mk | 3 --- src/gallium/winsys/amdgpu/drm/Android.mk | 7 +-- 4 files changed, 10 insertions(+), 9 deletions(-) diff --git a/src/amd/Android.addrlib.mk b/src/amd/Android.addrlib.mk index 540de5554bdd..a29f7c16d179 100644 --- a/src/amd/Android.addrlib.mk +++ b/src/amd/Android.addrlib.mk @@ -42,5 +42,11 @@ LOCAL_C_INCLUDES := \ $(MESA_TOP)/src/amd/addrlib/gfx9/chip \ $(MESA_TOP)/src/amd/addrlib/r800/chip +LOCAL_EXPORT_C_INCLUDE_DIRS := \ + $(LOCAL_PATH) \ + $(LOCAL_PATH)/addrlib/core \ + $(LOCAL_PATH)/addrlib/inc/chip/r800 \ + $(LOCAL_PATH)/addrlib/r800/chip + include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk index faace71e952f..6d2450374a13 100644 --- a/src/amd/Android.common.mk +++ b/src/amd/Android.common.mk @@ -57,6 +57,9 @@ LOCAL_C_INCLUDES := \ external/libcxx/include \ $(ELF_INCLUDES) +LOCAL_EXPORT_C_INCLUDE_DIRS := \ + $(LOCAL_PATH)/common + LOCAL_STATIC_LIBRARIES := libLLVMCore include $(MESA_COMMON_MK) diff --git a/src/gallium/drivers/r600/Android.mk b/src/gallium/drivers/r600/Android.mk index 7be3614c03eb..cc89d8f6aeda 100644 --- a/src/gallium/drivers/r600/Android.mk +++ b/src/gallium/drivers/r600/Android.mk @@ -30,9 +30,6 @@ include $(CLEAR_VARS) LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES) -LOCAL_C_INCLUDES := $(MESA_TOP)/src/amd/common \ - external/libcxx/include - LOCAL_STATIC_LIBRARIES := libmesa_amd_common LOCAL_SHARED_LIBRARIES := libdrm_radeon LOCAL_MODULE := libmesa_pipe_r600 diff --git a/src/gallium/winsys/amdgpu/drm/Android.mk b/src/gallium/winsys/amdgpu/drm/Android.mk index 9030a83880d3..1b9439c4f886 100644 --- a/src/gallium/winsys/amdgpu/drm/Android.mk +++ b/src/gallium/winsys/amdgpu/drm/Android.mk @@ -34,12 +34,7 @@ LOCAL_CFLAGS := \ $(AMDGPU_CFLAGS) \ -DBRAHMA_BUILD=1 -LOCAL_C_INCLUDES := \ - $(MESA_TOP)/src \ - $(MESA_TOP)/src/amd \ - $(MESA_TOP)/src/amd/addrlib/core \ - $(MESA_TOP)/src/amd/addrlib/inc/chip/r800 \ - $(MESA_TOP)/src/amd/addrlib/r800/chip +LOCAL_STATIC_LIBRARIES := libmesa_amdgpu_addrlib LOCAL_SHARED_LIBRARIES := libdrm_amdgpu LOCAL_MODULE := libmesa_winsys_amdgpu -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 06/12] Android: rework libelf dependencies
Add libelf as a library dependency rather than explicitly listing its include paths. This should work for Android M and later which have the necessary exported directories in libelf. Signed-off-by: Rob Herring --- Android.common.mk | 2 -- src/amd/Android.common.mk | 6 +++--- src/gallium/Android.common.mk | 3 +-- src/gallium/targets/dri/Android.mk | 3 +-- 4 files changed, 5 insertions(+), 9 deletions(-) diff --git a/Android.common.mk b/Android.common.mk index 38eb90991ab2..593f636a31ed 100644 --- a/Android.common.mk +++ b/Android.common.mk @@ -86,11 +86,9 @@ endif ifeq ($(MESA_ENABLE_LLVM),true) ifeq ($(MESA_ANDROID_MAJOR_VERSION),6) LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0 -ELF_INCLUDES := external/elfutils/src/libelf endif ifeq ($(MESA_ANDROID_MAJOR_VERSION),7) LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0 -ELF_INCLUDES := external/elfutils/libelf endif endif diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk index f04d010592e0..764076e599e1 100644 --- a/src/amd/Android.common.mk +++ b/src/amd/Android.common.mk @@ -54,15 +54,15 @@ LOCAL_C_INCLUDES := \ $(intermediates)/common \ external/llvm/include \ external/llvm/device/include \ - external/libcxx/include \ - $(ELF_INCLUDES) + external/libcxx/include LOCAL_EXPORT_C_INCLUDE_DIRS := \ $(LOCAL_PATH)/common LOCAL_STATIC_LIBRARIES := \ libLLVMCore \ - libmesa_nir + libmesa_nir \ + libelf include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) diff --git a/src/gallium/Android.common.mk b/src/gallium/Android.common.mk index 8559b5bce794..0391426b89b4 100644 --- a/src/gallium/Android.common.mk +++ b/src/gallium/Android.common.mk @@ -33,8 +33,7 @@ ifeq ($(MESA_ENABLE_LLVM),true) LOCAL_C_INCLUDES += \ external/llvm/include \ external/llvm/device/include \ - external/libcxx/include \ - $(ELF_INCLUDES) + external/libcxx/include endif include $(MESA_COMMON_MK) diff --git a/src/gallium/targets/dri/Android.mk b/src/gallium/targets/dri/Android.mk index f5f0124882fd..9dbac8f79637 100644 --- a/src/gallium/targets/dri/Android.mk +++ b/src/gallium/targets/dri/Android.mk @@ -105,10 +105,9 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \ libmesa_util \ libmesa_loader -LOCAL_STATIC_LIBRARIES := +LOCAL_STATIC_LIBRARIES := libelf ifeq ($(MESA_ENABLE_LLVM),true) -LOCAL_STATIC_LIBRARIES += libelf LOCAL_LDLIBS += -lgcc endif -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 04/12] Android: amd/common: fix dependency on libmesa_nir
Building libmesa_amd_common fails with: external/mesa/src/amd/common/ac_shader_info.c:23:10: fatal error: 'nir/nir.h' file not found ^ external/mesa/src/compiler/nir/nir.h:48:10: fatal error: 'nir_opcodes.h' file not found ^ libmesa_amd_common now depends on libmesa_nir, so add it as a dependency and export the necessary directories. Fixes: 224cf29 "radv/ac: add initial pre-pass for shader info gathering" Signed-off-by: Rob Herring --- src/amd/Android.common.mk | 4 +++- src/compiler/Android.nir.gen.mk | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk index 6d2450374a13..f04d010592e0 100644 --- a/src/amd/Android.common.mk +++ b/src/amd/Android.common.mk @@ -60,7 +60,9 @@ LOCAL_C_INCLUDES := \ LOCAL_EXPORT_C_INCLUDE_DIRS := \ $(LOCAL_PATH)/common -LOCAL_STATIC_LIBRARIES := libLLVMCore +LOCAL_STATIC_LIBRARIES := \ + libLLVMCore \ + libmesa_nir include $(MESA_COMMON_MK) include $(BUILD_STATIC_LIBRARY) diff --git a/src/compiler/Android.nir.gen.mk b/src/compiler/Android.nir.gen.mk index 96fc750ec646..908875d7eb56 100644 --- a/src/compiler/Android.nir.gen.mk +++ b/src/compiler/Android.nir.gen.mk @@ -37,6 +37,7 @@ LOCAL_C_INCLUDES += \ LOCAL_EXPORT_C_INCLUDE_DIRS += \ $(intermediates)/nir \ + $(MESA_TOP)/src/compiler \ $(MESA_TOP)/src/compiler/nir LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \ -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 09/12] Android: push driver build details to driver makefiles
src/gallium/targets/dri/Android.mk contains lots of conditional for individual drivers. Let's move these details into the individual driver makefiles. In the process, align the make driver conditionals with automake (i.e. HAVE_GALLIUM_*). Signed-off-by: Rob Herring --- Android.mk| 41 +- src/egl/Android.mk| 14 +++- src/gallium/Android.mk| 6 ++-- src/gallium/drivers/freedreno/Android.mk | 5 +++ src/gallium/drivers/i915/Android.mk | 4 +++ src/gallium/drivers/nouveau/Android.mk| 5 +++ src/gallium/drivers/r300/Android.mk | 4 +++ src/gallium/drivers/r600/Android.mk | 7 src/gallium/drivers/radeon/Android.mk | 7 +++- src/gallium/drivers/radeonsi/Android.mk | 12 ++- src/gallium/drivers/softpipe/Android.mk | 4 +++ src/gallium/drivers/svga/Android.mk | 4 +++ src/gallium/drivers/vc4/Android.mk| 4 +++ src/gallium/drivers/virgl/Android.mk | 4 +++ src/gallium/state_trackers/dri/Android.mk | 2 +- src/gallium/targets/dri/Android.mk| 58 +++ src/gallium/winsys/amdgpu/drm/Android.mk | 5 +++ src/gallium/winsys/i915/drm/Android.mk| 4 +++ 18 files changed, 96 insertions(+), 94 deletions(-) diff --git a/Android.mk b/Android.mk index 08daf770f26b..9f481ee7e109 100644 --- a/Android.mk +++ b/Android.mk @@ -40,19 +40,22 @@ MESA_DRI_MODULE_UNSTRIPPED_PATH := $(TARGET_OUT_SHARED_LIBRARIES_UNSTRIPPED)/$(M MESA_COMMON_MK := $(MESA_TOP)/Android.common.mk MESA_PYTHON2 := python -classic_drivers := i915 i965 -gallium_drivers := swrast freedreno i915g nouveau r300g r600g radeonsi vmwgfx vc4 virgl +classic_drivers := i915.HAVE_I915_DRI i965.HAVE_I965_DRI +gallium_drivers := \ + swrast.HAVE_GALLIUM_SOFTPIPE \ + freedreno.HAVE_GALLIUM_FREEDRENO \ + i915g.HAVE_GALLIUM_I915 \ + nouveau.HAVE_GALLIUM_NOUVEAU \ + r300g.HAVE_GALLIUM_R300 \ + r600g.HAVE_GALLIUM_R600 \ + radeonsi.HAVE_GALLIUM_RADEONSI \ + vmwgfx.HAVE_GALLIUM_VMWGFX \ + vc4.HAVE_GALLIUM_VC4 \ + virgl.HAVE_GALLIUM_VIRGL -MESA_GPU_DRIVERS := $(strip $(BOARD_GPU_DRIVERS)) - -# warn about invalid drivers -invalid_drivers := $(filter-out \ - $(classic_drivers) $(gallium_drivers), $(MESA_GPU_DRIVERS)) -ifneq ($(invalid_drivers),) -$(warning invalid GPU drivers: $(invalid_drivers)) -# tidy up -MESA_GPU_DRIVERS := $(filter-out $(invalid_drivers), $(MESA_GPU_DRIVERS)) -endif +MESA_BUILD_CLASSIC := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst $(d).%,%, $(filter $(d).%, $(classic_drivers) +MESA_BUILD_GALLIUM := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst $(d).%,%, $(filter $(d).%, $(gallium_drivers) +$(foreach d, $(MESA_BUILD_CLASSIC) $(MESA_BUILD_GALLIUM), $(eval $(d) := true)) # host and target must be the same arch to generate matypes.h ifeq ($(TARGET_ARCH),$(HOST_ARCH)) @@ -61,19 +64,7 @@ else MESA_ENABLE_ASM := false endif -ifneq ($(filter $(classic_drivers), $(MESA_GPU_DRIVERS)),) -MESA_BUILD_CLASSIC := true -else -MESA_BUILD_CLASSIC := false -endif - -ifneq ($(filter $(gallium_drivers), $(MESA_GPU_DRIVERS)),) -MESA_BUILD_GALLIUM := true -else -MESA_BUILD_GALLIUM := false -endif - -MESA_ENABLE_LLVM := $(if $(filter radeonsi,$(MESA_GPU_DRIVERS)),true,false) +MESA_ENABLE_LLVM := $(if $(HAVE_GALLIUM_RADEONSI),true,false) # add subdirectories SUBDIRS := \ diff --git a/src/egl/Android.mk b/src/egl/Android.mk index 8bbd4605cdca..a0f803a7fc39 100644 --- a/src/egl/Android.mk +++ b/src/egl/Android.mk @@ -57,16 +57,10 @@ LOCAL_SHARED_LIBRARIES := \ libcutils \ libsync -ifeq ($(strip $(MESA_BUILD_CLASSIC)),true) -# require i915_dri and/or i965_dri -LOCAL_REQUIRED_MODULES += \ - $(addsuffix _dri, $(filter i915 i965, $(MESA_GPU_DRIVERS))) -endif # MESA_BUILD_CLASSIC - -ifeq ($(strip $(MESA_BUILD_GALLIUM)),true) -LOCAL_REQUIRED_MODULES += gallium_dri -endif # MESA_BUILD_GALLIUM - +# This controls enabling building of driver libraries +LOCAL_REQUIRED_MODULES += $(if $(HAVE_I915_DRI),i915_dri,) +LOCAL_REQUIRED_MODULES += $(if $(HAVE_I965_DRI),i965_dri,) +LOCAL_REQUIRED_MODULES += $(if $(MESA_BUILD_GALLIUM),gallium_dri,) LOCAL_MODULE := libGLES_mesa LOCAL_MODULE_RELATIVE_PATH := egl diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk index 7c6bda68d59f..d591aaf62e6a 100644 --- a/src/gallium/Android.mk +++ b/src/gallium/Android.mk @@ -42,7 +42,9 @@ SUBDIRS += winsys/amdgpu/drm winsys/radeon/drm SUBDIRS += winsys/vc4/drm drivers/vc4 SUBDIRS += winsys/virgl/drm winsys/virgl/vtest drivers/virgl SUBDIRS += winsys/svga/drm drivers/svga +SUBDIRS += state_trackers/dri -SUBDIRS += state_trackers/dri targets/dri +INC_DIRS := $(call all-named-subdir-makefiles,$(SUBDIRS)) +INC_DIRS += $(call all-named-subdir-makefiles,targets/dri) -include $(call all-named-subdir-makefiles,$(SUBDIRS)) +include $(INC_DIRS) diff --git a/src/gallium/d
[Mesa-dev] [PATCH 02/12] android: define required __STDC* macros as cflags
From: Mauro Rossi Necessary to fix the following radeonsi building errors: In file included from external/mesa/src/gallium/drivers/radeonsi/si_blit.c:24: In file included from external/mesa/src/gallium/drivers/radeonsi/si_pipe.h:29: In file included from external/mesa/src/gallium/drivers/radeonsi/si_shader.h:71: In file included from external/llvm/include/llvm-c/Core.h:18: In file included from external/llvm/include/llvm-c/ErrorHandling.h:17: In file included from external/llvm/include/llvm-c/Types.h:17: external/llvm/include/llvm/Support/DataTypes.h:49:3: error: "Must #define __STDC_LIMIT_MACROS before #including Support/DataTypes.h" ^ external/llvm/include/llvm/Support/DataTypes.h:53:3: error: "Must #define __STDC_CONSTANT_MACROS before " "#including Support/DataTypes.h" ^ 2 errors generated. --- Android.common.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Android.common.mk b/Android.common.mk index 34db6770c5b8..ba3d1203ac11 100644 --- a/Android.common.mk +++ b/Android.common.mk @@ -42,6 +42,8 @@ LOCAL_CFLAGS += \ LOCAL_CFLAGS += \ -DENABLE_SHADER_CACHE \ + -D__STDC_CONSTANT_MACROS \ + -D__STDC_LIMIT_MACROS \ -DHAVE___BUILTIN_EXPECT \ -DHAVE___BUILTIN_FFS \ -DHAVE___BUILTIN_FFSLL \ -- 2.11.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/4] r600g: avoid redundant DB registerupdates
On 27.04.2017 11:32, Marc Dietrich wrote:
> Am Donnerstag, 27. April 2017, 10:05:32 CEST schrieb Marc Dietrich:
>> Am Mittwoch, 26. April 2017, 19:48:46 CEST schrieb Constantine Kharlamov:
>>> On 26.04.2017 17:51, Marc Dietrich wrote:
Am Mittwoch, 26. April 2017, 16:36:39 CEST schrieb Constantine
> Kharlamov:
> HEAD recently have triggered a bug in sb compiler, so, just for the
> safe
> case, can you tell if reverting this commit
>
> git revert --no-commit eb8aa93c03ee89ffd3041d41b6293e4b282b6ce6
>
> but having my patch still applied changes anything or not?
>
> (I have this commit reverted locally)
still same crash.
Marc
>>>
>>> Could you tell what settings you have applied in UH4?
>>>
>>> (I'm just hoping to reproduce it locally, but the default ones didn't
>>> crash
>>> it)
>>
>> Custom Preset: Quality: low, everything disabled, Resolution: 640x360: gives
>> "~ 7 fps".
>>
>> I have to admit that I saw a similar crash two weeks ago, but nothing since
>> that time. If you can't find something wrong with your first patch (is it
>> just some kind of refactoring?), it is possible that your patch just
>> triggers something which was already there before. Your patch just makes it
>> reproducible. Just a wild guess though.
>
> just another test point: I applied your first patch (not sure if this makes
> sense) to mesa 17.1.0-rc2 (disabled shader cache and mesa_glthread) and there
>
> crash still happens.
>
> Marc
>
>
Please, could you try this patch. The change is: I'm setting dirty_zsbuf in
r600_bind_blend_state_internal() as well. It was the difference between
radeonsi and r600 for CB updates, and my guess is, it might be relevant to DB
ones as well.
---
src/gallium/drivers/r600/evergreen_state.c | 76 +++-
src/gallium/drivers/r600/r600_blit.c | 1 +
src/gallium/drivers/r600/r600_hw_context.c | 1 +
src/gallium/drivers/r600/r600_pipe.h | 1 +
src/gallium/drivers/r600/r600_state.c| 52 ++-
src/gallium/drivers/r600/r600_state_common.c | 2 +
6 files changed, 73 insertions(+), 60 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/drivers/r600/evergreen_state.c
index 19ad504097..7d84e92250 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1426,6 +1426,7 @@ static void evergreen_set_framebuffer_state(struct
pipe_context *ctx,
R600_CONTEXT_FLUSH_AND_INV_DB_META |
R600_CONTEXT_INV_TEX_CACHE;
+ rctx->framebuffer.dirty_zsbuf |= rctx->framebuffer.state.zsbuf !=
state->zsbuf;
util_copy_framebuffer_state(&rctx->framebuffer.state, state);
/* Colorbuffers. */
@@ -1746,45 +1747,47 @@ static void evergreen_emit_framebuffer_state(struct
r600_context *rctx, struct r
radeon_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) *
0x1C, 0);
/* ZS buffer. */
- if (state->zsbuf) {
- struct r600_surface *zb = (struct r600_surface*)state->zsbuf;
- unsigned reloc = radeon_add_to_buffer_list(&rctx->b,
- &rctx->b.gfx,
- (struct
r600_resource*)state->zsbuf->texture,
- RADEON_USAGE_READWRITE,
-
zb->base.texture->nr_samples > 1 ?
-
RADEON_PRIO_DEPTH_BUFFER_MSAA :
-
RADEON_PRIO_DEPTH_BUFFER);
-
- radeon_set_context_reg(cs, R_028008_DB_DEPTH_VIEW,
zb->db_depth_view);
-
- radeon_set_context_reg_seq(cs, R_028040_DB_Z_INFO, 8);
- radeon_emit(cs, zb->db_z_info); /* R_028040_DB_Z_INFO */
- radeon_emit(cs, zb->db_stencil_info); /*
R_028044_DB_STENCIL_INFO */
- radeon_emit(cs, zb->db_depth_base); /*
R_028048_DB_Z_READ_BASE */
- radeon_emit(cs, zb->db_stencil_base); /*
R_02804C_DB_STENCIL_READ_BASE */
- radeon_emit(cs, zb->db_depth_base); /*
R_028050_DB_Z_WRITE_BASE */
- radeon_emit(cs, zb->db_stencil_base); /*
R_028054_DB_STENCIL_WRITE_BASE */
- radeon_emit(cs, zb->db_depth_size); /*
R_028058_DB_DEPTH_SIZE */
- radeon_emit(cs, zb->db_depth_slice);/*
R_02805C_DB_DEPTH_SLICE */
-
- radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /*
R_028048_DB_Z_READ_BASE */
- radeon_emit(cs, reloc);
+ if (rctx->framebuffer.dirty_zsbuf) {
+ if (state->zsbuf) {
+ struct r600_surface *zb = (struct
r600_surface*)state->zsbuf;
+ unsigned reloc = radeon_add_to_buffer_list(&rctx->b,
+
[Mesa-dev] [PATCH 13/15] travis: add Gallium state-tracker targets
From: Emil Velikov
Split into OpenCL and others, since the former is quite time consuming.
v2:
- explicitly enable/disable components
- build libvdpau 1.1 requirement
- enable st/vdpau
- build libva 1.6.2 (API 0.38) requirement
Signed-off-by: Emil Velikov
---
.travis.yml | 83 +
1 file changed, 83 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index 57c4a431534..86f88e86b05 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -20,6 +20,8 @@ env:
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
- LIBTXC_DXTN_VERSION=libtxc_dxtn-1.0.1
+- LIBVDPAU_VERSION=libvdpau-1.1
+- LIBVA_VERSION=libva-1.6.2
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
@@ -33,6 +35,7 @@ matrix:
# XXX: Add wayland platform
- DRI_LOADERS="--enable-glx --enable-gbm --enable-egl
--with-platforms=x11,drm,surfaceless --enable-osmesa"
- DRI_DRIVERS="i915,i965,radeon,r200,swrast,nouveau"
+- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa
--disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx
--disable-gallium-osmesa"
- GALLIUM_DRIVERS=""
- VULKAN_DRIVERS=""
addons:
@@ -55,6 +58,7 @@ matrix:
- OVERRIDE_CXX="g++-5"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
+- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa
--disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx
--disable-gallium-osmesa"
- GALLIUM_DRIVERS="swr"
- VULKAN_DRIVERS=""
addons:
@@ -82,6 +86,7 @@ matrix:
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
+- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa
--disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx
--disable-gallium-osmesa"
-
GALLIUM_DRIVERS="i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
- VULKAN_DRIVERS=""
addons:
@@ -89,6 +94,8 @@ matrix:
sources:
- llvm-toolchain-trusty-3.9
packages:
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
# From sources above
- llvm-3.9-dev
# Common
@@ -97,6 +104,71 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- env:
+# NOTE: Analogous to SWR above, building Clover is quite slow.
+- LABEL="make Gallium ST Clover"
+- BUILD=make
+- MAKEFLAGS=-j2
+- MAKE_CHECK_COMMAND="true"
+- LLVM_VERSION=3.6
+- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+- OVERRIDE_CC=gcc-4.7
+- OVERRIDE_CXX=g++-4.7
+- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
+- DRI_DRIVERS=""
+- GALLIUM_ST="--disable-dri --enable-opencl --enable-opencl-icd
--enable-llvm --disable-xa --disable-nine --disable-xvmc --disable-vdpau
--disable-va --disable-omx --disable-gallium-osmesa"
+# i915 most likely doesn't work with OpenCL.
+# Regardless - we're doing a quick build test here.
+- GALLIUM_DRIVERS="i915"
+- VULKAN_DRIVERS=""
+ addons:
+apt:
+ sources:
+- ubuntu-toolchain-r-test
+- llvm-toolchain-trusty-3.6
+ packages:
+- libclc-dev
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
+# From sources above
+- g++-4.7
+- llvm-3.6-dev
+- clang-3.6
+- libclang-3.6-dev
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
+- env:
+- LABEL="make Gallium ST Other"
+- BUILD=make
+- MAKEFLAGS=-j2
+- MAKE_CHECK_COMMAND="true"
+- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
+- DRI_DRIVERS=""
+- GALLIUM_ST="--enable-dri --disable-opencl --enable-xa --enable-nine
--enable-xvmc --enable-vdpau --enable-va --enable-omx --enable-gallium-osmesa"
+# We need swrast for osmesa and nine.
+# i915 most likely doesn't work with most ST.
+# Regardless - we're doing a quick build test here.
+- GALLIUM_DRIVERS="i915,swrast"
+- VULKAN_DRIVERS=""
+ addons:
+apt:
+ packages:
+# Nine requires gcc 4.6... which is the one we have right ?
+- libxvmc-dev
+# Build locally, for now.
+#- libvdpau-dev
+#- libva-dev
+- libomxil-bellagio-dev
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
+# Common
+- x11proto
[Mesa-dev] [PATCH 15/15] travis: bump MAKEFLAGS to -j4
From: Emil Velikov
The instance has 2 cores, yet bumping the jobs to 4 gives a minor speed
improvement.
Signed-off-by: Emil Velikov
---
Yay, new patch.
---
.travis.yml | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 32ef3e27651..3c618a5ad44 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -31,7 +31,7 @@ matrix:
- env:
- LABEL="make loaders/classic DRI"
- BUILD=make
-- MAKEFLAGS=-j2
+- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make check"
- DRI_LOADERS="--enable-glx --enable-gbm --enable-egl
--with-platforms=x11,drm,surfaceless,wayland --enable-osmesa"
- DRI_DRIVERS="i915,i965,radeon,r200,swrast,nouveau"
@@ -51,7 +51,7 @@ matrix:
# Start this early so that it doesn't hunder the run time.
- LABEL="make Gallium Drivers SWR"
- BUILD=make
-- MAKEFLAGS=-j2
+- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
@@ -82,7 +82,7 @@ matrix:
- env:
- LABEL="make Gallium Drivers Other"
- BUILD=make
-- MAKEFLAGS=-j2
+- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
@@ -110,7 +110,7 @@ matrix:
# NOTE: Analogous to SWR above, building Clover is quite slow.
- LABEL="make Gallium ST Clover"
- BUILD=make
-- MAKEFLAGS=-j2
+- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.6
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
@@ -146,7 +146,7 @@ matrix:
- env:
- LABEL="make Gallium ST Other"
- BUILD=make
-- MAKEFLAGS=-j2
+- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="true"
- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
@@ -176,7 +176,7 @@ matrix:
- env:
- LABEL="make Vulkan"
- BUILD=make
-- MAKEFLAGS=-j2
+- MAKEFLAGS="-j4"
- MAKE_CHECK_COMMAND="make -C src/gtest check && make -C src/intel
check"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
--
2.12.2
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[Mesa-dev] [PATCH 09/15] travis: add separate "scons" and "scons llvm" targets
From: Emil Velikov
The former does not require any LLVM, while the latter uses LLVM 3.3.
This way we'll quickly catch any LLVM 3.3+ functionality that gets
introduced where it shouldn't.
Add the full list of addons for each build permutation.
v2: Keep libedit-dev, rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS
Signed-off-by: Emil Velikov
---
.travis.yml | 66 ++---
1 file changed, 50 insertions(+), 16 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 31e1aeb7379..f9a994923a7 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -7,20 +7,6 @@ cache:
apt: true
ccache: true
-addons:
- apt:
-sources:
- - llvm-toolchain-trusty-3.9
-packages:
- - x11proto-xf86vidmode-dev
- - libexpat1-dev
- - libx11-xcb-dev
- # LLVM packaging is broken and misses these dependencies
- - libedit-dev
- - llvm-3.9-dev
- - libelf-dev
- - scons
-
env:
global:
- XORG_RELEASES=http://xorg.freedesktop.org/releases/individual
@@ -34,8 +20,6 @@ env:
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
- LIBTXC_DXTN_VERSION=libtxc_dxtn-1.0.1
-- LLVM_VERSION=3.9
-- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
@@ -45,6 +29,39 @@ matrix:
- LABEL="make"
- BUILD=make
- MAKEFLAGS=-j2
+- LLVM_VERSION=3.9
+- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+ addons:
+apt:
+ sources:
+- llvm-toolchain-trusty-3.9
+ packages:
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
+# From sources above
+- llvm-3.9-dev
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
+- env:
+- LABEL="scons"
+- BUILD=scons
+- SCONSFLAGS="-j4"
+# Explicitly disable.
+- SCONS_TARGET="llvm=0"
+# Keep it symmetrical to the make build.
+- SCONS_CHECK_COMMAND="scons llvm=0 check"
+ addons:
+apt:
+ packages:
+- scons
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
- env:
- LABEL="scons LLVM"
- BUILD=scons
@@ -52,6 +69,23 @@ matrix:
- SCONS_TARGET="llvm=1"
# Keep it symmetrical to the make build.
- SCONS_CHECK_COMMAND="scons llvm=1 check"
+- LLVM_VERSION=3.3
+- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+ addons:
+apt:
+ sources:
+- llvm-toolchain-trusty-3.3
+ packages:
+- scons
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
+# From sources above
+- llvm-3.3-dev
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
install:
- pip install --user mako
--
2.12.2
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[Mesa-dev] [PATCH 10/15] travis: add "scons swr" to the build matrix
From: Emil Velikov
Requires GCC 5.0 (due to the C++14 requirement) and LLVM 3.9.
v2: Enable the target, add libedit-dev, rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS, quote OVERRIDE
variables.
Cc: Tim Rowley
Cc: George Kyriazis
Reviewed-by: George Kyriazis
Signed-off-by: Emil Velikov
---
.travis.yml | 30 ++
1 file changed, 30 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index f9a994923a7..ae1b5b1bc1a 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -86,6 +86,34 @@ matrix:
- libexpat1-dev
- libx11-xcb-dev
- libelf-dev
+- env:
+- LABEL="scons SWR"
+- BUILD=scons
+- SCONSFLAGS="-j4"
+- SCONS_TARGET="swr=1"
+# Keep it symmetrical to the make build. There's no actual SWR, yet.
+- SCONS_CHECK_COMMAND="true"
+- LLVM_VERSION=3.9
+- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+- OVERRIDE_CC="gcc-5"
+- OVERRIDE_CXX="g++-5"
+ addons:
+apt:
+ sources:
+- ubuntu-toolchain-r-test
+- llvm-toolchain-trusty-3.9
+ packages:
+- scons
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
+# From sources above
+- g++-5
+- llvm-3.9-dev
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
install:
- pip install --user mako
@@ -161,5 +189,7 @@ script:
fi
- if test "x$BUILD" = xscons; then
+ test -n "$OVERRIDE_CC" && export CC="$OVERRIDE_CC";
+ test -n "$OVERRIDE_CXX" && export CXX="$OVERRIDE_CXX";
scons $SCONS_TARGET && eval $SCONS_CHECK_COMMAND;
fi
--
2.12.2
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[Mesa-dev] [PATCH 12/15] travis: split the make target to three separate ones
From: Emil Velikov
Split the target to allow faster builds for each run.
The overall build time will be more, yet Travis runs multiple builds in
parallel so we're limited by the slowest one.
Things are split roughly as:
- DRI loaders, classic DRI drivers, classic OSMesa, make check
- All Gallium drivers (minus the SWR) alongside st/dri (mesa)
- The Vulkan drivers - ANV and RADV, make check (anv)
v2:
- rework RUN_CHECK to MAKE_CHECK_COMMAND
- explicitly disable DRI loaders
- generate linux/memfd.h locally and enable ANV
- add libedit-dev
Signed-off-by: Emil Velikov
---
.travis.yml | 95 ++---
1 file changed, 79 insertions(+), 16 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index a4be936656e..57c4a431534 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -26,28 +26,21 @@ env:
matrix:
include:
- env:
-- LABEL="make"
+- LABEL="make loaders/classic DRI"
- BUILD=make
- MAKEFLAGS=-j2
-- LLVM_VERSION=3.9
-- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+- MAKE_CHECK_COMMAND="make check"
+# XXX: Add wayland platform
+- DRI_LOADERS="--enable-glx --enable-gbm --enable-egl
--with-platforms=x11,drm,surfaceless --enable-osmesa"
- DRI_DRIVERS="i915,i965,radeon,r200,swrast,nouveau"
--
GALLIUM_DRIVERS="i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
-- VULKAN_DRIVERS="radeon"
+- GALLIUM_DRIVERS=""
+- VULKAN_DRIVERS=""
addons:
apt:
- sources:
-- llvm-toolchain-trusty-3.9
packages:
-# LLVM packaging is broken and misses these dependencies
-- libedit-dev
-# From sources above
-- llvm-3.9-dev
-# Common
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
-- libelf-dev
- env:
# NOTE: Building SWR is 2x (yes two) times slower than all the other
# gallium drivers combined.
@@ -55,10 +48,12 @@ matrix:
- LABEL="make Gallium Drivers SWR"
- BUILD=make
- MAKEFLAGS=-j2
+- MAKE_CHECK_COMMAND="true"
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- OVERRIDE_CC="gcc-5"
- OVERRIDE_CXX="g++-5"
+- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
- DRI_DRIVERS=""
- GALLIUM_DRIVERS="swr"
- VULKAN_DRIVERS=""
@@ -68,6 +63,8 @@ matrix:
- ubuntu-toolchain-r-test
- llvm-toolchain-trusty-3.9
packages:
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
# From sources above
- g++-5
- llvm-3.9-dev
@@ -77,6 +74,57 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- env:
+- LABEL="make Gallium Drivers Other"
+- BUILD=make
+- MAKEFLAGS=-j2
+- MAKE_CHECK_COMMAND="true"
+- LLVM_VERSION=3.9
+- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+- DRI_LOADERS="--disable-glx --disable-gbm --disable-egl"
+- DRI_DRIVERS=""
+-
GALLIUM_DRIVERS="i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
+- VULKAN_DRIVERS=""
+ addons:
+apt:
+ sources:
+- llvm-toolchain-trusty-3.9
+ packages:
+# From sources above
+- llvm-3.9-dev
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
+- env:
+- LABEL="make Vulkan"
+- BUILD=make
+- MAKEFLAGS=-j2
+- MAKE_CHECK_COMMAND="make -C src/gtest check && make -C src/intel
check"
+- LLVM_VERSION=3.9
+- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+# XXX: we want to test the WSI, but those are enabled via the EGL
toggles
+# XXX: Add wayland platform
+# XXX: Platform X11 dependencies are checked when --enable-glx is set
+- DRI_LOADERS="--enable-glx --disable-gbm --enable-egl
--with-platforms=x11"
+- DRI_DRIVERS=""
+- GALLIUM_DRIVERS=""
+- VULKAN_DRIVERS="intel,radeon"
+ addons:
+apt:
+ sources:
+- llvm-toolchain-trusty-3.9
+ packages:
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
+# From sources above
+- llvm-3.9-dev
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
+- env:
- LABEL="scons"
- BUILD=scons
- SCONSFLAGS="-j4"
@@ -207,18 +255,33 @@ install:
(cd $LIBTXC_DXTN_VERSION && ./configure --prefix=$HOME/prefix && make
install);
fi
+ # Generate the
[Mesa-dev] [PATCH 07/15] travis: rework "if test" blocks in the script section
From: Emil Velikov Split the "if test" blocks so that we get more sensible output in case of a failure. Signed-off-by: Emil Velikov --- .travis.yml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 8921429c7e9..a4fe00d8023 100644 --- a/.travis.yml +++ b/.travis.yml @@ -114,6 +114,8 @@ script: --disable-llvm-shared-libs ; make && make check; -elif test x$BUILD = xscons; then +fi + + - if test "x$BUILD" = xscons; then scons llvm=1 && scons llvm=1 check; fi -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 14/15] travis: enable wayland support
From: Emil Velikov
Signed-off-by: Emil Velikov
---
.travis.yml | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 86f88e86b05..32ef3e27651 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -22,6 +22,7 @@ env:
- LIBTXC_DXTN_VERSION=libtxc_dxtn-1.0.1
- LIBVDPAU_VERSION=libvdpau-1.1
- LIBVA_VERSION=libva-1.6.2
+- LIBWAYLAND_VERSION=wayland-1.11.1
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
@@ -32,8 +33,7 @@ matrix:
- BUILD=make
- MAKEFLAGS=-j2
- MAKE_CHECK_COMMAND="make check"
-# XXX: Add wayland platform
-- DRI_LOADERS="--enable-glx --enable-gbm --enable-egl
--with-platforms=x11,drm,surfaceless --enable-osmesa"
+- DRI_LOADERS="--enable-glx --enable-gbm --enable-egl
--with-platforms=x11,drm,surfaceless,wayland --enable-osmesa"
- DRI_DRIVERS="i915,i965,radeon,r200,swrast,nouveau"
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa
--disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx
--disable-gallium-osmesa"
- GALLIUM_DRIVERS=""
@@ -41,6 +41,7 @@ matrix:
addons:
apt:
packages:
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -73,6 +74,7 @@ matrix:
- g++-5
- llvm-3.9-dev
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -99,6 +101,7 @@ matrix:
# From sources above
- llvm-3.9-dev
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -135,6 +138,7 @@ matrix:
- clang-3.6
- libclang-3.6-dev
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -164,6 +168,7 @@ matrix:
# LLVM packaging is broken and misses these dependencies
- libedit-dev
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -176,9 +181,8 @@ matrix:
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
# XXX: we want to test the WSI, but those are enabled via the EGL
toggles
-# XXX: Add wayland platform
# XXX: Platform X11 dependencies are checked when --enable-glx is set
-- DRI_LOADERS="--enable-glx --disable-gbm --enable-egl
--with-platforms=x11"
+- DRI_LOADERS="--enable-glx --disable-gbm --enable-egl
--with-platforms=x11,wayland"
- DRI_DRIVERS=""
# XXX: enable DRI for EGL above
- GALLIUM_ST="--enable-dri --disable-opencl --disable-xa
--disable-nine --disable-xvmc --disable-vdpau --disable-va --disable-omx
--disable-gallium-osmesa"
@@ -194,6 +198,7 @@ matrix:
# From sources above
- llvm-3.9-dev
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -211,6 +216,7 @@ matrix:
packages:
- scons
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -235,6 +241,7 @@ matrix:
# From sources above
- llvm-3.3-dev
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -263,6 +270,7 @@ matrix:
- g++-5
- llvm-3.9-dev
# Common
+- xz-utils
- x11proto-xf86vidmode-dev
- libexpat1-dev
- libx11-xcb-dev
@@ -337,6 +345,10 @@ install:
- tar -jxvf $LIBVA_VERSION.tar.bz2
- (cd $LIBVA_VERSION && ./configure --prefix=$HOME/prefix --disable-wayland
--disable-dummy-driver && make install)
+ - wget http://wayland.freedesktop.org/releases/$LIBWAYLAND_VERSION.tar.xz
+ - tar -axvf $LIBWAYLAND_VERSION.tar.xz
+ - (cd $LIBWAYLAND_VERSION && ./configure --prefix=$HOME/prefix
--enable-libraries --without-host-scanner --disable-documentation
--disable-dtd-validation && make install)
+
# Generate the header since one is missing on the Travis instance
- mkdir -p linux
- echo "#ifndef _LINUX_MEMFD_H" > linux/memfd.h
--
2.12.2
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[Mesa-dev] [PATCH 05/15] travis: automatically manage ccache caching
From: Emil Velikov According to the manual "If you are using ccache, use: language: c # or other C/C++ variants cache: ccache to cache $HOME/.ccache and automatically add /usr/lib/ccache to your $PATH." Signed-off-by: Emil Velikov --- .travis.yml | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/.travis.yml b/.travis.yml index 061aed1bc7c..f34b762a4e5 100644 --- a/.travis.yml +++ b/.travis.yml @@ -5,8 +5,7 @@ dist: trusty cache: apt: true - directories: -- $HOME/.ccache + ccache: true addons: apt: @@ -47,7 +46,6 @@ env: - BUILD=scons install: - - export PATH="/usr/lib/ccache:$PATH" - pip install --user mako # Since libdrm gets updated in configure.ac regularly, try to pick up the -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 11/15] travis: add "make swr" to the build matrix
From: Emil Velikov
v2: Quote OVERRIDE variables.
Signed-off-by: Emil Velikov
---
.travis.yml | 39 ---
1 file changed, 36 insertions(+), 3 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index ae1b5b1bc1a..a4be936656e 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -31,6 +31,9 @@ matrix:
- MAKEFLAGS=-j2
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+- DRI_DRIVERS="i915,i965,radeon,r200,swrast,nouveau"
+-
GALLIUM_DRIVERS="i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx"
+- VULKAN_DRIVERS="radeon"
addons:
apt:
sources:
@@ -46,6 +49,34 @@ matrix:
- libx11-xcb-dev
- libelf-dev
- env:
+# NOTE: Building SWR is 2x (yes two) times slower than all the other
+# gallium drivers combined.
+# Start this early so that it doesn't hunder the run time.
+- LABEL="make Gallium Drivers SWR"
+- BUILD=make
+- MAKEFLAGS=-j2
+- LLVM_VERSION=3.9
+- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
+- OVERRIDE_CC="gcc-5"
+- OVERRIDE_CXX="g++-5"
+- DRI_DRIVERS=""
+- GALLIUM_DRIVERS="swr"
+- VULKAN_DRIVERS=""
+ addons:
+apt:
+ sources:
+- ubuntu-toolchain-r-test
+- llvm-toolchain-trusty-3.9
+ packages:
+# From sources above
+- g++-5
+- llvm-3.9-dev
+# Common
+- x11proto-xf86vidmode-dev
+- libexpat1-dev
+- libx11-xcb-dev
+- libelf-dev
+- env:
- LABEL="scons"
- BUILD=scons
- SCONSFLAGS="-j4"
@@ -178,11 +209,13 @@ install:
script:
- if test "x$BUILD" = xmake; then
+ test -n "$OVERRIDE_CC" && export CC="$OVERRIDE_CC";
+ test -n "$OVERRIDE_CXX" && export CXX="$OVERRIDE_CXX";
./autogen.sh --enable-debug
--with-platforms=x11,drm
---with-dri-drivers=i915,i965,radeon,r200,swrast,nouveau
-
--with-gallium-drivers=i915,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl,etnaviv,imx
---with-vulkan-drivers=radeon
+--with-dri-drivers=$DRI_DRIVERS
+--with-gallium-drivers=$GALLIUM_DRIVERS
+--with-vulkan-drivers=$VULKAN_DRIVERS
--disable-llvm-shared-libs
;
make && make check;
--
2.12.2
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[Mesa-dev] [PATCH 08/15] travis: split out matrix from env
From: Emil Velikov
With next commits we'll add a couple of more options.
v2: Rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS
Signed-off-by: Emil Velikov
---
.travis.yml | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index a4fe00d8023..31e1aeb7379 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -38,10 +38,20 @@ env:
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
-- MAKEFLAGS=-j2
- matrix:
-- BUILD=make
-- BUILD=scons
+
+matrix:
+ include:
+- env:
+- LABEL="make"
+- BUILD=make
+- MAKEFLAGS=-j2
+- env:
+- LABEL="scons LLVM"
+- BUILD=scons
+- SCONSFLAGS="-j4"
+- SCONS_TARGET="llvm=1"
+# Keep it symmetrical to the make build.
+- SCONS_CHECK_COMMAND="scons llvm=1 check"
install:
- pip install --user mako
@@ -117,5 +127,5 @@ script:
fi
- if test "x$BUILD" = xscons; then
- scons llvm=1 && scons llvm=1 check;
+ scons $SCONS_TARGET && eval $SCONS_CHECK_COMMAND;
fi
--
2.12.2
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[Mesa-dev] [PATCH 06/15] travis: remove unused -dev packages
From: Emil Velikov We effectively override libdrm-dev and libxcb-dri2-0-dev since we build and install the package locally. Signed-off-by: Emil Velikov --- .travis.yml | 2 -- 1 file changed, 2 deletions(-) diff --git a/.travis.yml b/.travis.yml index f34b762a4e5..8921429c7e9 100644 --- a/.travis.yml +++ b/.travis.yml @@ -12,10 +12,8 @@ addons: sources: - llvm-toolchain-trusty-3.9 packages: - - libdrm-dev - x11proto-xf86vidmode-dev - libexpat1-dev - - libxcb-dri2-0-dev - libx11-xcb-dev # LLVM packaging is broken and misses these dependencies - libedit-dev -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 01/15] travis: explicitly LD_LIBRARY_PATH the local libraries
From: Emil Velikov
Some of the libraries may be dlopened, which may not always work due to
the non-standard prefix that we're using.
Signed-off-by: Emil Velikov
---
Adding this is a good idea imho, regardless if we opt for or against
libtxc_dxtn.
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
index 6d6e44cc419..49158a09fce 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -36,6 +36,7 @@ env:
- LLVM_PACKAGE="llvm-${LLVM_VERSION} llvm-${LLVM_VERSION}-dev"
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
+- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
- MAKEFLAGS=-j2
matrix:
- BUILD=make
--
2.12.2
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[Mesa-dev] [PATCH 04/15] travis: enable apt cache
From: Emil Velikov Signed-off-by: Emil Velikov --- .travis.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.travis.yml b/.travis.yml index e317a027233..061aed1bc7c 100644 --- a/.travis.yml +++ b/.travis.yml @@ -4,6 +4,7 @@ sudo: false dist: trusty cache: + apt: true directories: - $HOME/.ccache -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 02/15] travis: replace Trusty-based LLVM toolchain apt-get with apt addon
From: Andres Gomez
Trusty's LLVM toochain repository was whitelisted some time ago. See:
https://github.com/travis-ci/apt-source-whitelist/commit/479067c5e74cb0c1e2419209179b1afe2edce274
Signed-off-by: Andres Gomez
[Emil Velikov]
- set sudo to false
- reference the Trusty change (Rhys)
- keep libedit-dev
Signed-off-by: Emil Velikov
---
.travis.yml | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 49158a09fce..efb8f286c87 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -1,6 +1,6 @@
language: c
-sudo: required
+sudo: false
dist: trusty
cache:
@@ -9,6 +9,8 @@ cache:
addons:
apt:
+sources:
+ - llvm-toolchain-trusty-3.9
packages:
- libdrm-dev
- x11proto-xf86vidmode-dev
@@ -17,6 +19,7 @@ addons:
- libx11-xcb-dev
# LLVM packaging is broken and misses these dependencies
- libedit-dev
+ - llvm-3.9-dev
- libelf-dev
- scons
@@ -33,7 +36,6 @@ env:
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
- LLVM_VERSION=3.9
-- LLVM_PACKAGE="llvm-${LLVM_VERSION} llvm-${LLVM_VERSION}-dev"
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
- LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
@@ -91,15 +93,6 @@ install:
- tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
- (cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make
install)
- # Install LLVM directly via apt-get (not Travis-CI's apt addon)
- # See
https://github.com/travis-ci/apt-source-whitelist/pull/205#issuecomment-216054237
-
- - wget -nv -O - http://llvm.org/apt/llvm-snapshot.gpg.key | sudo apt-key add
-
- - sudo apt-add-repository -y 'deb http://llvm.org/apt/trusty
llvm-toolchain-trusty-3.9 main'
- - sudo apt-add-repository -y 'deb http://llvm.org/apt/trusty
llvm-toolchain-trusty main'
- - sudo apt-get update -qq
- - sudo apt-get install -qq -y $LLVM_PACKAGE
-
script:
- if test "x$BUILD" = xmake; then
./autogen.sh --enable-debug
--
2.12.2
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[Mesa-dev] [PATCH 03/15] travis: add the possibility of using the txc-dxtn library
From: Andres Gomez
The txc-dxtn library implements the patented S3 Texture Compression
algorithm.
By default it won't be used but we add the possibility of setting the
USE_TXC_DXTN variable to yes in the travis web UI so it will be
installed and used for the scons tests.
Cc: Eric Anholt
Cc: Rhys Kidd
Signed-off-by: Andres Gomez
[Emil Velikov: keep the LIB prefix, drop the LD_LIBRARY_PATH, fold URL]
Signed-off-by: Emil Velikov
---
.travis.yml | 14 ++
1 file changed, 14 insertions(+)
diff --git a/.travis.yml b/.travis.yml
index efb8f286c87..e317a027233 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -35,6 +35,7 @@ env:
- XCBPROTO_VERSION=xcb-proto-1.11
- LIBXCB_VERSION=libxcb-1.11
- LIBXSHMFENCE_VERSION=libxshmfence-1.2
+- LIBTXC_DXTN_VERSION=libtxc_dxtn-1.0.1
- LLVM_VERSION=3.9
- LLVM_CONFIG="llvm-config-${LLVM_VERSION}"
- PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig
@@ -93,6 +94,19 @@ install:
- tar -jxvf $LIBXSHMFENCE_VERSION.tar.bz2
- (cd $LIBXSHMFENCE_VERSION && ./configure --prefix=$HOME/prefix && make
install)
+ # libtxc-dxtn uses the patented S3 Texture Compression
+ # algorithm. Therefore, we don't want to use this library but it is
+ # still possible through setting the USE_TXC_DXTN variable to yes in
+ # the travis web UI.
+ #
+ # According to Wikipedia, the patent expires on October 2, 2017:
+ # https://en.wikipedia.org/wiki/S3_Texture_Compression#Patent
+ - if test "x$USE_TXC_DXTN" = xyes; then
+ wget
https://people.freedesktop.org/~cbrill/libtxc_dxtn/$LIBTXC_DXTN_VERSION.tar.bz2;
+ tar -jxvf $LIBTXC_DXTN_VERSION.tar.bz2;
+ (cd $LIBTXC_DXTN_VERSION && ./configure --prefix=$HOME/prefix && make
install);
+fi
+
script:
- if test "x$BUILD" = xmake; then
./autogen.sh --enable-debug
--
2.12.2
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[Mesa-dev] [Bug 90264] [Regression, bisected] Tooltip corruption in Chrome
https://bugs.freedesktop.org/show_bug.cgi?id=90264 --- Comment #74 from Vasily Khoruzhick --- (In reply to Joseph Yasi from comment #73) > I'm still seeing this with Mesa 17.1.0rc2 and xf86-video-intel from git > 2017-04-18c72bb27a3a68ecc616ce2dc8e9a1d20354504562 on Skylake with DRI3 > and xorg-server 1.19.3. > > For a while, I'd been using the 3 patches from this series: > https://patchwork.freedesktop.org/patch/117379/ > > but they never fixed the Chrome tooltip corruption issue with DRI3, and it > looks like that series never got pushed to Mesa. I'm also seeing it on Ivy Bridge and Broadwell graphics with mesa 17.0.4 and xf86-video-intel 2.99.917+772+gc72bb27a -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 07/22] anv/image: Initialize the clear values buffer
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_image.c | 75 +++---
src/intel/vulkan/anv_private.h | 5 +++
2 files changed, 69 insertions(+), 11 deletions(-)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 9f3eb52a37..751f2d6026 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -179,6 +179,37 @@ add_clear_value_buffer(struct anv_image * const image,
image->size += device->isl_dev.ss.size * anv_color_aux_levels(image);
}
+/* Populates a buffer with a surface state object that can be used for
+ * resolving the specified subresource of a CCS buffer.
+ */
+void
+anv_fill_ccs_resolve_ss(const struct anv_device * const device,
+void * const data, const struct anv_image * const
image,
+const uint8_t level, const uint32_t layer)
+{
+ assert(device && image && data);
+
+ /* The image subresource must have a color auxiliary buffer. */
+ assert(level < anv_color_aux_levels(image));
+ assert(layer < anv_color_aux_layers(image, level));
+
+ isl_surf_fill_state(&device->isl_dev, data,
+ .surf = &image->color_surface.isl,
+ .view = &(struct isl_view) {
+ .usage = ISL_SURF_USAGE_RENDER_TARGET_BIT,
+ .format = image->color_surface.isl.format,
+ .swizzle = ISL_SWIZZLE_IDENTITY,
+ .base_level = level,
+ .levels = 1,
+ .base_array_layer = layer,
+ .array_len = 1,
+},
+ .aux_surf = &image->aux_surface.isl,
+ .aux_usage = image->aux_usage == ISL_AUX_USAGE_NONE ?
+ISL_AUX_USAGE_CCS_D : image->aux_usage,
+ .mocs = device->default_mocs);
+}
+
/**
* Initialize the anv_image::*_surface selected by \a aspect. Then update the
* image's memory requirements (that is, the image's size and alignment).
@@ -411,6 +442,9 @@ VkResult anv_BindImageMemory(
image->bo = &mem->bo;
image->offset = memoryOffset;
+ /* The data after the main surface must be initialized for various
+* reasons.
+*/
if (image->aux_surface.isl.size > 0) {
/* The offset must be a multiple of 4K or else the anv_gem_mmap call
@@ -418,16 +452,11 @@ VkResult anv_BindImageMemory(
*/
assert((image->offset + image->aux_surface.offset) % 4096 == 0);
- /* Auxiliary surfaces need to have their memory cleared to 0 before they
- * can be used. For CCS surfaces, this puts them in the "resolved"
- * state so they can be used with CCS enabled before we ever touch it
- * from the GPU. For HiZ, we need something valid or else we may get
- * GPU hangs on some hardware and 0 works fine.
- */
- void *map = anv_gem_mmap(device, image->bo->gem_handle,
- image->offset + image->aux_surface.offset,
- image->aux_surface.isl.size,
- device->info.has_llc ? 0 : I915_MMAP_WC);
+ const uint32_t image_map_size = image->size - image->aux_surface.offset;
+ void * const map = anv_gem_mmap(device, image->bo->gem_handle,
+ image->offset +
image->aux_surface.offset,
+ image_map_size,
+ device->info.has_llc ? 0 : I915_MMAP_WC);
/* If anv_gem_mmap returns NULL, it's likely that the kernel was
* not able to find space on the host to create a proper mapping.
@@ -435,9 +464,33 @@ VkResult anv_BindImageMemory(
if (map == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
+ /* Auxiliary surfaces need to have their memory cleared to 0 before they
+ * can be used. For CCS surfaces, this puts them in the "resolved"
+ * state so they can be used with CCS enabled before we ever touch it
+ * from the GPU. For HiZ, we need something valid or else we may get
+ * GPU hangs on some hardware and 0 works fine.
+ */
memset(map, 0, image->aux_surface.isl.size);
- anv_gem_munmap(map, image->aux_surface.isl.size);
+ /* For color auxiliary surfaces, the clear values buffer must be
+ * initialized. This is because a render pass attachment's loadOp may be
+ * LOAD_OP_LOAD, triggering a GPU memcpy from the clear values buffer
+ * into the surface state object. Pre-SKL, the dword containing the clear
+ * values also contains other fields, so we need to initialize those
+ * fields to match the values for a color attachment. On SKL+, the MCS
+ * surface state only allows 1/0 clear colors. Using the fill function
+ * for a CCS resolve state also gives the desired result for MCS images.
[Mesa-dev] [PATCH 20/22] anv/pass: Get rid of anv_subpass_usage
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c| 14 --
src/intel/vulkan/anv_private.h | 10 --
2 files changed, 24 deletions(-)
diff --git a/src/intel/vulkan/anv_pass.c b/src/intel/vulkan/anv_pass.c
index 02b8f03fa5..de279d9d64 100644
--- a/src/intel/vulkan/anv_pass.c
+++ b/src/intel/vulkan/anv_pass.c
@@ -71,10 +71,6 @@ VkResult anv_CreateRenderPass(
}
anv_multialloc_add(&ma, &subpass_attachments, subpass_attachment_count);
- enum anv_subpass_usage *subpass_usages;
- anv_multialloc_add(&ma, &subpass_usages,
- pCreateInfo->subpassCount *
pCreateInfo->attachmentCount);
-
if (!anv_multialloc_alloc2(&ma, &device->alloc, pAllocator,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT))
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
@@ -99,9 +95,7 @@ VkResult anv_CreateRenderPass(
att->stencil_load_op = pCreateInfo->pAttachments[i].stencilLoadOp;
att->initial_layout = pCreateInfo->pAttachments[i].initialLayout;
att->final_layout = pCreateInfo->pAttachments[i].finalLayout;
- att->subpass_usage = subpass_usages;
assert(att->first_subpass_layout == VK_IMAGE_LAYOUT_UNDEFINED);
- subpass_usages += pass->subpass_count;
}
bool has_color = false, has_depth = false, has_input = false;
@@ -124,7 +118,6 @@ VkResult anv_CreateRenderPass(
if (a != VK_ATTACHMENT_UNUSED) {
has_input = true;
pass->attachments[a].usage |=
VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT;
- pass->attachments[a].subpass_usage[i] |=
ANV_SUBPASS_USAGE_INPUT;
pass->attachments[a].last_subpass_idx = i;
init_first_subpass_layout(&pass->attachments[a],
@@ -146,7 +139,6 @@ VkResult anv_CreateRenderPass(
if (a != VK_ATTACHMENT_UNUSED) {
has_color = true;
pass->attachments[a].usage |=
VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
- pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_DRAW;
pass->attachments[a].last_subpass_idx = i;
init_first_subpass_layout(&pass->attachments[a],
@@ -169,11 +161,6 @@ VkResult anv_CreateRenderPass(
pass->attachments[color_att].usage |=
VK_IMAGE_USAGE_TRANSFER_SRC_BIT;
pass->attachments[a].usage |= VK_IMAGE_USAGE_TRANSFER_DST_BIT;
-
- pass->attachments[color_att].subpass_usage[i] |=
- ANV_SUBPASS_USAGE_RESOLVE_SRC;
- pass->attachments[a].subpass_usage[i] |=
- ANV_SUBPASS_USAGE_RESOLVE_DST;
pass->attachments[a].last_subpass_idx = i;
init_first_subpass_layout(&pass->attachments[a],
@@ -190,7 +177,6 @@ VkResult anv_CreateRenderPass(
has_depth = true;
pass->attachments[a].usage |=
VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT;
-pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_DRAW;
pass->attachments[a].last_subpass_idx = i;
init_first_subpass_layout(&pass->attachments[a],
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 819fbea567..3218a85252 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2207,13 +2207,6 @@ struct anv_subpass {
bool has_resolve;
};
-enum anv_subpass_usage {
- ANV_SUBPASS_USAGE_DRAW = (1 << 0),
- ANV_SUBPASS_USAGE_INPUT =(1 << 1),
- ANV_SUBPASS_USAGE_RESOLVE_SRC = (1 << 2),
- ANV_SUBPASS_USAGE_RESOLVE_DST = (1 << 3),
-};
-
struct anv_render_pass_attachment {
/* TODO: Consider using VkAttachmentDescription instead of storing each of
* its members individually.
@@ -2228,9 +2221,6 @@ struct anv_render_pass_attachment {
VkImageLayoutfinal_layout;
VkImageLayoutfirst_subpass_layout;
- /* An array, indexed by subpass id, of how the attachment will be used. */
- enum anv_subpass_usage * subpass_usage;
-
/* The subpass id in which the attachment will be used last. */
uint32_t last_subpass_idx;
};
--
2.12.2
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[Mesa-dev] [PATCH 09/22] anv/cmd_buffer: Don't partially fast-clear image layers
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 0ea378fde2..a981b00f67 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -216,7 +216,7 @@ color_is_zero_one(VkClearColorValue value, enum isl_format
format)
}
static void
-color_attachment_compute_aux_usage(struct anv_device *device,
+color_attachment_compute_aux_usage(struct anv_cmd_buffer * const cmd_buffer,
struct anv_attachment_state *att_state,
struct anv_image_view *iview,
VkRect2D render_area,
@@ -249,7 +249,8 @@ color_attachment_compute_aux_usage(struct anv_device
*device,
att_state->input_aux_usage = ISL_AUX_USAGE_CCS_E;
} else {
att_state->aux_usage = ISL_AUX_USAGE_CCS_D;
- if (isl_format_supports_ccs_e(&device->info, iview->isl.format)) {
+ if (isl_format_supports_ccs_e(&cmd_buffer->device->info,
+iview->isl.format)) {
/* SKL can sample from CCS with one restriction.
*
* From the Sky Lake PRM, RENDER_SURFACE_STATE::AuxiliarySurfaceMode:
@@ -305,6 +306,17 @@ color_attachment_compute_aux_usage(struct anv_device
*device,
if (GEN_GEN <= 8 && !att_state->clear_color_is_zero_one)
att_state->fast_clear = false;
+ /* We can't fast clear a proper subset of a layered image. See
+ * add_clear_values() for more information.
+ */
+ const uint32_t fb_layers = cmd_buffer->state.framebuffer->layers;
+ const uint32_t aux_layers = anv_color_aux_layers(iview->image,
+ iview->isl.base_level);
+ if (fb_layers != aux_layers) {
+ assert(fb_layers < aux_layers);
+ att_state->fast_clear = false;
+ }
+
if (att_state->fast_clear) {
memcpy(fast_clear_color->u32, att_state->clear_value.color.uint32,
sizeof(fast_clear_color->u32));
@@ -498,7 +510,7 @@ genX(cmd_buffer_setup_attachments)(struct anv_cmd_buffer
*cmd_buffer,
union isl_color_value clear_color = { .u32 = { 0, } };
if (att_aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
-color_attachment_compute_aux_usage(cmd_buffer->device,
+color_attachment_compute_aux_usage(cmd_buffer,
&state->attachments[i],
iview, begin->renderArea,
&clear_color);
--
2.12.2
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[Mesa-dev] [PATCH 22/22] anv: Predicate fast-clear resolves
There's no image layout to represent a full-RT-cleared color attachment.
That's one reason we can end up with redundant resolves. Testing has
shown that such resolves can measurably hurt performance and that
predicating them can avoid the penalty.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 3 +-
src/intel/vulkan/anv_image.c | 6 +++
src/intel/vulkan/genX_cmd_buffer.c | 106 ++---
3 files changed, 108 insertions(+), 7 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 821d01a077..32f0edf316 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1500,7 +1500,8 @@ anv_ccs_resolve(struct anv_cmd_buffer * const cmd_buffer,
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer,
-BLORP_BATCH_NO_EMIT_DEPTH_STENCIL);
+BLORP_BATCH_NO_EMIT_DEPTH_STENCIL |
+BLORP_BATCH_PREDICATE_ENABLE);
struct blorp_surf surf;
get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 751f2d6026..92ee86dab5 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -208,6 +208,12 @@ anv_fill_ccs_resolve_ss(const struct anv_device * const
device,
.aux_usage = image->aux_usage == ISL_AUX_USAGE_NONE ?
ISL_AUX_USAGE_CCS_D : image->aux_usage,
.mocs = device->default_mocs);
+
+ /* The following dword is used as a flag to represent whether or not this
+* CCS subresource needs resolving. We want this to be zero by default,
+* which means that a resolve is not necessary.
+*/
+ assert(*(uint32_t *)(data + device->isl_dev.ss.addr_offset) == 0);
}
/**
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 95729ec8a8..041301290e 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -402,6 +402,82 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
anv_gen8_hiz_op_resolve(cmd_buffer, image, hiz_op);
}
+static uint32_t
+clear_value_buffer_offset(const struct anv_cmd_buffer * const cmd_buffer,
+ const struct anv_image * const image,
+ const uint8_t level)
+{
+ return image->offset +
+ image->aux_surface.offset + image->aux_surface.isl.size +
+ cmd_buffer->device->isl_dev.ss.size * level;
+}
+
+#define MI_PREDICATE_SRC0 0x2400
+#define MI_PREDICATE_SRC1 0x2408
+
+enum ccs_resolve_state {
+ CCS_RESOLVE_NOT_NEEDED,
+ CCS_RESOLVE_NEEDED,
+ CCS_RESOLVE_STARTING,
+};
+
+/* Manages the state of an color image subresource to ensure resolves are
+ * performed properly.
+ */
+static void
+genX(set_resolve_state)(struct anv_cmd_buffer * const cmd_buffer,
+const struct anv_image * const image,
+const uint8_t level,
+const enum ccs_resolve_state state)
+{
+ assert(cmd_buffer && image);
+
+ /* The image subresource range must have a color auxiliary buffer. */
+ assert(anv_image_has_color_aux(image));
+ assert(level < anv_color_aux_levels(image));
+
+ /* We store the resolve flag in the location of the surface base address
+* field for simplicity and because it is initialized to zero when the
+* clear value buffer is initialized.
+*/
+ const uint32_t resolve_flag_offset =
+ clear_value_buffer_offset(cmd_buffer, image, level) +
+ cmd_buffer->device->isl_dev.ss.addr_offset;
+
+ /* An update operation should not overwrite the fast clear value. */
+ if (cmd_buffer->device->isl_dev.ss.addr_offset <
+ cmd_buffer->device->isl_dev.ss.clear_value_offset) {
+ assert(cmd_buffer->device->isl_dev.ss.addr_offset + 4 <=
+ cmd_buffer->device->isl_dev.ss.clear_value_offset);
+ }
+
+ if (state != CCS_RESOLVE_STARTING) {
+ assert(state == CCS_RESOLVE_NEEDED || state == CCS_RESOLVE_NOT_NEEDED);
+ /* The HW docs say that there is no way to guarantee the completion of
+ * the following command. We use it nevertheless because it shows no
+ * issues in testing is currently being used in the GL driver.
+ */
+ anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
+ sdi.Address = (struct anv_address) { image->bo, resolve_flag_offset };
+ sdi.ImmediateData = state == CCS_RESOLVE_NEEDED;
+ }
+ } else {
+ /* Make the pending predicated resolve a no-op if one is not needed.
+ * predicate = do_resolve = resolve_flag != 0;
+ */
+ emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC1, 0);
+ emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC1 + 4, 0);
+ emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC0, 0);
+ emit_lrm(&cmd_buffer->batch, MI_
[Mesa-dev] [PATCH 21/22] intel/blorp: Allow BLORP calls to be predicated
Signed-off-by: Nanley Chery
---
src/intel/blorp/blorp.h | 3 +++
src/intel/blorp/blorp_genX_exec.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 8b8227bb1c..36acbb8222 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -75,6 +75,9 @@ enum blorp_batch_flags {
* hardware.
*/
BLORP_BATCH_NO_EMIT_DEPTH_STENCIL = (1 << 0),
+
+ /* This flag indicates that the blorp call should be predicated. */
+ BLORP_BATCH_PREDICATE_ENABLE = (1 << 1),
};
struct blorp_batch {
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index 0bde2d2e84..2e96aa631a 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1432,6 +1432,9 @@ blorp_exec(struct blorp_batch *batch, const struct
blorp_params *params)
blorp_emit(batch, GENX(3DPRIMITIVE), prim) {
prim.VertexAccessType = SEQUENTIAL;
prim.PrimitiveTopologyType = _3DPRIM_RECTLIST;
+#if GEN_GEN >= 7
+ prim.PredicateEnable = batch->flags & BLORP_BATCH_PREDICATE_ENABLE;
+#endif
prim.VertexCountPerInstance = 3;
prim.InstanceCount = params->num_layers;
}
--
2.12.2
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[Mesa-dev] [PATCH 18/22] anv/cmd_buffer: Perform color buffer layout transitions
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 65 ++
1 file changed, 52 insertions(+), 13 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 1ae0c3256e..95729ec8a8 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1150,12 +1150,24 @@ void genX(CmdPipelineBarrier)(
for (uint32_t i = 0; i < imageMemoryBarrierCount; i++) {
src_flags |= pImageMemoryBarriers[i].srcAccessMask;
dst_flags |= pImageMemoryBarriers[i].dstAccessMask;
+ /* Perform layout transitions. */
ANV_FROM_HANDLE(anv_image, image, pImageMemoryBarriers[i].image);
- if (pImageMemoryBarriers[i].subresourceRange.aspectMask &
- VK_IMAGE_ASPECT_DEPTH_BIT) {
+ const struct VkImageSubresourceRange * const range =
+ &pImageMemoryBarriers[i].subresourceRange;
+ if (range->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT) {
transition_depth_buffer(cmd_buffer, image,
pImageMemoryBarriers[i].oldLayout,
pImageMemoryBarriers[i].newLayout);
+ } else if (range->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT) {
+ const uint32_t layers = image->type == VK_IMAGE_TYPE_3D ?
+ anv_get_sliceCount(image, range) :
+ anv_get_layerCount(image, range);
+ transition_color_buffer(cmd_buffer, image,
+ range->baseMipLevel,
+ anv_get_levelCount(image, range),
+ range->baseArrayLayer, layers,
+ pImageMemoryBarriers[i].oldLayout,
+ pImageMemoryBarriers[i].newLayout);
}
}
@@ -2495,29 +2507,56 @@ cmd_buffer_subpass_transition_layouts(struct
anv_cmd_buffer * const cmd_buffer,
* this is not the last use of the buffer. The layout should not have
* changed from the first call and no transition is necessary.
*/
- assert(att_ref->layout == att_state->current_layout);
+ assert(att_state->current_layout == att_ref->layout ||
+att_state->current_layout ==
+VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL);
continue;
}
- /* Get the appropriate target layout for this attachment. */
- const VkImageLayout target_layout = subpass_end ?
- att_desc->final_layout : att_ref->layout;
-
/* The attachment index must be less than the number of attachments
* within the framebuffer.
*/
assert(att_ref->attachment < cmd_state->framebuffer->attachment_count);
- const struct anv_image * const image =
- cmd_state->framebuffer->attachments[att_ref->attachment]->image;
+ const struct anv_image_view * const iview =
+ cmd_state->framebuffer->attachments[att_ref->attachment];
+
+ /* Get the appropriate target layout for this attachment. */
+ VkImageLayout target_layout;
+
+ /* A resolve is necessary before use as an input attachment if the clear
+ * color or auxiliary buffer usage isn't supported by the sampler.
+ */
+ const bool input_needs_resolve =
+(att_state->fast_clear && !att_state->clear_color_is_zero_one) ||
+att_state->input_aux_usage != att_state->aux_usage;
+ if (subpass_end) {
+ target_layout = att_desc->final_layout;
+ } else if (iview->aspect_mask == VK_IMAGE_ASPECT_COLOR_BIT &&
+ !input_needs_resolve) {
+ /* Layout transitions before the final only help to enable sampling as
+ * an input attachment. If the input attachment supports sampling
+ * using the auxiliary surface, we can skip such transitions by making
+ * the target layout one that is CCS-aware.
+ */
+ target_layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
+ } else {
+ target_layout = att_ref->layout;
+ }
/* Perform the layout transition. */
- if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
- transition_depth_buffer(cmd_buffer, image,
+ if (iview->image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
+ transition_depth_buffer(cmd_buffer, iview->image,
att_state->current_layout, target_layout);
att_state->aux_usage =
-anv_layout_to_aux_usage(&cmd_buffer->device->info, image,
-image->aspects, target_layout);
+anv_layout_to_aux_usage(&cmd_buffer->device->info, iview->image,
+iview->image->aspects, target_layout);
+ } else if (iview->image->aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
+ transition_color_buffer(cmd_buffer, iview->image,
+ iview->isl.base_level, 1,
+
[Mesa-dev] [PATCH 08/22] anv/cmd_buffer: Always enable CCS_D in render passes
The lifespan of the fast-clear data will surpass the render pass scope.
We need CCS_D to be enabled in order to invalidate blocks previously
marked as cleared and to sample cleared data correctly.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 15 ++
src/intel/vulkan/genX_cmd_buffer.c | 94 +++---
2 files changed, 52 insertions(+), 57 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index d17b73dcc7..5e7d4b06b8 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1383,7 +1383,8 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
&cmd_buffer->state.attachments[att];
if (att_state->aux_usage == ISL_AUX_USAGE_NONE ||
- att_state->aux_usage == ISL_AUX_USAGE_MCS)
+ att_state->aux_usage == ISL_AUX_USAGE_MCS ||
+ att_state->fast_clear == false)
return; /* Nothing to resolve */
assert(att_state->aux_usage == ISL_AUX_USAGE_CCS_E ||
@@ -1432,7 +1433,7 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
* the render pass. We need a full resolve.
*/
resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
- } else if (att_state->fast_clear) {
+ } else {
/* We don't know what to do with clear colors outside the render
* pass. We need a partial resolve. Only transparent black is
* built into the surface state object and thus no resolve is
@@ -1443,11 +1444,6 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
att_state->clear_value.color.uint32[2] ||
att_state->clear_value.color.uint32[3])
resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL;
- } else {
- /* The image "natively" supports all the compression we care about
- * and we don't need to resolve at all. If this is the case, we also
- * don't need to resolve for any of the input attachment cases below.
- */
}
} else if (usage & ANV_SUBPASS_USAGE_INPUT) {
/* Input attachments are clear-color aware so, at least on Sky Lake, we
@@ -1474,8 +1470,7 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
struct blorp_surf surf;
get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
att_state->aux_usage, &surf);
- if (att_state->fast_clear)
- surf.clear_color = vk_to_isl_color(att_state->clear_value.color);
+ surf.clear_color = vk_to_isl_color(att_state->clear_value.color);
/* From the Sky Lake PRM Vol. 7, "Render Target Resolve":
*
@@ -1504,8 +1499,6 @@ ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
/* Once we've done any sort of resolve, we're no longer fast-cleared */
att_state->fast_clear = false;
- if (att_state->aux_usage == ISL_AUX_USAGE_CCS_D)
- att_state->aux_usage = ISL_AUX_USAGE_NONE;
}
void
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index ddb22c4539..0ea378fde2 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -232,6 +232,50 @@ color_attachment_compute_aux_usage(struct anv_device
*device,
att_state->input_aux_usage = ISL_AUX_USAGE_MCS;
att_state->fast_clear = false;
return;
+ } else if (GEN_GEN == 7 &&
+ (iview->isl.base_level > 0 ||
+ iview->isl.base_array_layer > 0 ||
+ iview->isl.array_len > 1)) {
+ /* On gen7, we can't do multi-LOD or multi-layer CCS. We technically
+ * can, but it comes with crazy restrictions that we don't want to deal
+ * with now.
+ */
+ att_state->aux_usage = ISL_AUX_USAGE_NONE;
+ att_state->input_aux_usage = ISL_AUX_USAGE_NONE;
+ att_state->fast_clear = false;
+ return;
+ } else if (iview->image->aux_usage == ISL_AUX_USAGE_CCS_E) {
+ att_state->aux_usage = ISL_AUX_USAGE_CCS_E;
+ att_state->input_aux_usage = ISL_AUX_USAGE_CCS_E;
+ } else {
+ att_state->aux_usage = ISL_AUX_USAGE_CCS_D;
+ if (isl_format_supports_ccs_e(&device->info, iview->isl.format)) {
+ /* SKL can sample from CCS with one restriction.
+ *
+ * From the Sky Lake PRM, RENDER_SURFACE_STATE::AuxiliarySurfaceMode:
+ *
+ *"If Number of Multisamples is MULTISAMPLECOUNT_1, AUX_CCS_D
+ *setting is only allowed if Surface Format supported for Fast
+ *Clear. In addition, if the surface is bound to the sampling
+ *engine, Surface Format must be supported for Render Target
+ *Compression for surfaces bound to the sampling engine."
+ *
+ * In other words, we can only sample from a fast-cleared image if it
+ * also supports color compression.
+ *
+ * TODO: Consider using a heuristic to determine if temporarily
enabling
+ * CCS_E for this image view would be b
[Mesa-dev] [PATCH 03/22] intel/isl: Add surface state clear value information
This will be used to load and store clear values from surface state
objects.
Signed-off-by: Nanley Chery
---
src/intel/isl/isl.c | 9 +
src/intel/isl/isl.h | 4
2 files changed, 13 insertions(+)
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index ff3e2fb86d..a3e91b2688 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -73,6 +73,15 @@ isl_device_init(struct isl_device *dev,
dev->ss.size = RENDER_SURFACE_STATE_length(info) * 4;
dev->ss.align = isl_align(dev->ss.size, 32);
+ dev->ss.clear_value_size =
+ isl_align(RENDER_SURFACE_STATE_RedClearColor_bits(info) +
+RENDER_SURFACE_STATE_GreenClearColor_bits(info) +
+RENDER_SURFACE_STATE_BlueClearColor_bits(info) +
+RENDER_SURFACE_STATE_AlphaClearColor_bits(info), 32) / 8;
+
+ dev->ss.clear_value_offset =
+ RENDER_SURFACE_STATE_RedClearColor_start(info) / 32 * 4;
+
assert(RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) % 8 == 0);
dev->ss.addr_offset =
RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) / 8;
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 7778551579..b714562492 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -681,6 +681,10 @@ struct isl_device {
uint8_t align;
uint8_t addr_offset;
uint8_t aux_addr_offset;
+
+ /* Rounded up to the nearest dword to simplify GPU memcpy operations. */
+ uint8_t clear_value_size;
+ uint8_t clear_value_offset;
} ss;
/**
--
2.12.2
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[Mesa-dev] [PATCH 19/22] anv/blorp: Stop resolving CCS implicitly
With the previous patch, resolves are additionally performed on layout
transitions. Remove the now unnecessary implicit resolves within render
passes.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 139 ---
1 file changed, 139 deletions(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 332ad14b37..821d01a077 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1373,134 +1373,6 @@ void anv_CmdResolveImage(
blorp_batch_finish(&batch);
}
-static void
-ccs_resolve_attachment(struct anv_cmd_buffer *cmd_buffer,
- struct blorp_batch *batch,
- uint32_t att)
-{
- struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
- struct anv_attachment_state *att_state =
- &cmd_buffer->state.attachments[att];
-
- if (att_state->aux_usage == ISL_AUX_USAGE_NONE ||
- att_state->aux_usage == ISL_AUX_USAGE_MCS ||
- att_state->fast_clear == false)
- return; /* Nothing to resolve */
-
- assert(att_state->aux_usage == ISL_AUX_USAGE_CCS_E ||
- att_state->aux_usage == ISL_AUX_USAGE_CCS_D);
-
- struct anv_render_pass *pass = cmd_buffer->state.pass;
- const uint32_t subpass_idx = anv_get_subpass_id(&cmd_buffer->state);
-
- /* Scan forward to see what all ways this attachment will be used.
-* Ideally, we would like to resolve in the same subpass as the last write
-* of a particular attachment. That way we only resolve once but it's
-* still hot in the cache.
-*/
- bool found_draw = false;
- enum anv_subpass_usage usage = 0;
- for (uint32_t s = subpass_idx + 1; s < pass->subpass_count; s++) {
- usage |= pass->attachments[att].subpass_usage[s];
-
- if (usage & (ANV_SUBPASS_USAGE_DRAW | ANV_SUBPASS_USAGE_RESOLVE_DST)) {
- /* We found another subpass that draws to this attachment. We'll
- * wait to resolve until then.
- */
- found_draw = true;
- break;
- }
- }
-
- struct anv_image_view *iview = fb->attachments[att];
- const struct anv_image *image = iview->image;
- assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
-
- enum blorp_fast_clear_op resolve_op = BLORP_FAST_CLEAR_OP_NONE;
- if (!found_draw) {
- /* This is the last subpass that writes to this attachment so we need to
- * resolve here. Ideally, we would like to only resolve if the storeOp
- * is set to VK_ATTACHMENT_STORE_OP_STORE. However, we need to ensure
- * that the CCS bits are set to "resolved" because there may be copy or
- * blit operations (which may ignore CCS) between now and the next time
- * we render and we need to ensure that anything they write will be
- * respected in the next render. Unfortunately, the hardware does not
- * provide us with any sort of "invalidate" pass that sets the CCS to
- * "resolved" without writing to the render target.
- */
- if (iview->image->aux_usage != ISL_AUX_USAGE_CCS_E) {
- /* The image destination surface doesn't support compression outside
- * the render pass. We need a full resolve.
- */
- resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
- } else {
- /* We don't know what to do with clear colors outside the render
- * pass. We need a partial resolve. Only transparent black is
- * built into the surface state object and thus no resolve is
- * required for this case.
- */
- if (att_state->clear_value.color.uint32[0] ||
- att_state->clear_value.color.uint32[1] ||
- att_state->clear_value.color.uint32[2] ||
- att_state->clear_value.color.uint32[3])
-resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL;
- }
- } else if (usage & ANV_SUBPASS_USAGE_INPUT) {
- /* Input attachments are clear-color aware so, at least on Sky Lake, we
- * can frequently sample from them with no resolves at all.
- */
- if (att_state->aux_usage != att_state->input_aux_usage) {
- assert(att_state->input_aux_usage == ISL_AUX_USAGE_NONE);
- resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
- } else if (!att_state->clear_color_is_zero_one) {
- /* Sky Lake PRM, Vol. 2d, RENDER_SURFACE_STATE::Red Clear Color:
- *
- *"If Number of Multisamples is MULTISAMPLECOUNT_1 AND if this RT
- *is fast cleared with non-0/1 clear value, this RT must be
- *partially resolved (refer to Partial Resolve operation) before
- *binding this surface to Sampler."
- */
- resolve_op = BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL;
- }
- }
-
- if (resolve_op == BLORP_FAST_CLEAR_OP_NONE)
- return;
-
- struct blorp_surf surf;
- get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
-att_state->aux_usage, &surf);
-
[Mesa-dev] [PATCH 15/22] anv/cmd_buffer: Adjust the image view reloc function
Make the function take in an image instead of an image view. This
enables us to record relocations for surfaces states created outside of
the anv_CreateImageView path.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 45 +-
1 file changed, 25 insertions(+), 20 deletions(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 4698270abb..d5cc358aec 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -167,17 +167,20 @@ add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer,
}
static void
-add_image_view_relocs(struct anv_cmd_buffer *cmd_buffer,
- const struct anv_image_view *iview,
- enum isl_aux_usage aux_usage,
- struct anv_state state)
+add_image_relocs(struct anv_cmd_buffer * const cmd_buffer,
+ const struct anv_image * const image,
+ const VkImageAspectFlags aspect_mask,
+ const enum isl_aux_usage aux_usage,
+ const struct anv_state state)
{
const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev;
+ const uint32_t surf_offset = image->offset +
+ anv_image_get_surface_for_aspect_mask(image, aspect_mask)->offset;
- add_surface_state_reloc(cmd_buffer, state, iview->bo, iview->offset);
+ add_surface_state_reloc(cmd_buffer, state, image->bo, surf_offset);
if (aux_usage != ISL_AUX_USAGE_NONE) {
- uint32_t aux_offset = iview->offset + iview->image->aux_surface.offset;
+ uint32_t aux_offset = surf_offset + image->aux_surface.offset;
/* On gen7 and prior, the bottom 12 bits of the MCS base address are
* used to store other information. This should be ok, however, because
@@ -191,7 +194,7 @@ add_image_view_relocs(struct anv_cmd_buffer *cmd_buffer,
anv_reloc_list_add(&cmd_buffer->surface_relocs,
&cmd_buffer->pool->alloc,
state.offset + isl_dev->ss.aux_addr_offset,
-iview->bo, aux_offset);
+image->bo, aux_offset);
if (result != VK_SUCCESS)
anv_batch_set_error(&cmd_buffer->batch, result);
}
@@ -586,9 +589,9 @@ genX(cmd_buffer_setup_attachments)(struct anv_cmd_buffer
*cmd_buffer,
.clear_color = clear_color,
.mocs = cmd_buffer->device->default_mocs);
-add_image_view_relocs(cmd_buffer, iview,
- state->attachments[i].aux_usage,
- state->attachments[i].color_rt_state);
+add_image_relocs(cmd_buffer, iview->image, iview->aspect_mask,
+ state->attachments[i].aux_usage,
+ state->attachments[i].color_rt_state);
/* Update the image subresource's fast-clear value as necessary. */
if (state->attachments[i].fast_clear) {
@@ -635,9 +638,9 @@ genX(cmd_buffer_setup_attachments)(struct anv_cmd_buffer
*cmd_buffer,
.clear_color = clear_color,
.mocs = cmd_buffer->device->default_mocs);
-add_image_view_relocs(cmd_buffer, iview,
- state->attachments[i].input_aux_usage,
- state->attachments[i].input_att_state);
+add_image_relocs(cmd_buffer, iview->image, iview->aspect_mask,
+ state->attachments[i].input_aux_usage,
+ state->attachments[i].input_att_state);
}
}
@@ -1252,8 +1255,9 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
desc->image_view->no_aux_sampler_surface_state :
desc->image_view->sampler_surface_state;
assert(surface_state.alloc_size);
- add_image_view_relocs(cmd_buffer, desc->image_view,
- desc->aux_usage, surface_state);
+ add_image_relocs(cmd_buffer, desc->image_view->image,
+ desc->image_view->aspect_mask,
+ desc->aux_usage, surface_state);
break;
case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
assert(stage == MESA_SHADER_FRAGMENT);
@@ -1265,8 +1269,9 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
desc->image_view->no_aux_sampler_surface_state :
desc->image_view->sampler_surface_state;
assert(surface_state.alloc_size);
-add_image_view_relocs(cmd_buffer, desc->image_view,
- desc->aux_usage, surface_state);
+add_image_relocs(cmd_buffer, desc->image_view->image,
+ desc->image_view->aspect_mask,
+ desc->aux_usage, surface_state);
} else {
/* For
[Mesa-dev] [PATCH 16/22] anv/cmd_buffer: Add transition_color_buffer()
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 93 ++
1 file changed, 93 insertions(+)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index d5cc358aec..1ae0c3256e 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -454,6 +454,99 @@ genX(transfer_clear_value)(struct anv_cmd_buffer * const
cmd_buffer,
}
}
+/* Transitions a color buffer from one layout to another. */
+static void
+transition_color_buffer(struct anv_cmd_buffer * const cmd_buffer,
+const struct anv_image * const image,
+const uint32_t base_level, uint32_t level_count,
+const uint32_t base_layer, uint32_t layer_count,
+const VkImageLayout initial_layout,
+const VkImageLayout final_layout)
+{
+ assert(cmd_buffer && image);
+
+ /* This must be a color image. */
+ assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
+
+ /* Only color buffers with CCS need resolving. */
+ if (image->aux_surface.isl.size == 0 || image->samples > 1)
+ return;
+
+ /* Don't transition this subresource range if it lacks auxiliary data. */
+ if (base_level >= anv_color_aux_levels(image) ||
+ base_layer >= anv_color_aux_layers(image, base_level))
+ return;
+
+ /* The undefined layout indicates that the user doesn't care about the
+* data that's currently in the buffer. The pre-initialized layout is
+* equivalent to the undefined layout for optimally-tiled images.
+*
+* We can only skip the resolve for CCS_E images in this layout because it
+* is enabled outside of render passes. This allows previously fast-cleared
+* and undefined buffers to be defined with transfer operations.
+*/
+ const bool is_ccs_e = image->aux_usage == ISL_AUX_USAGE_CCS_E;
+ const bool undef_layout = initial_layout == VK_IMAGE_LAYOUT_UNDEFINED ||
+ initial_layout == VK_IMAGE_LAYOUT_PREINITIALIZED;
+ if (is_ccs_e && undef_layout)
+ return;
+
+ /* A resolve isn't necessary when transitioning from a layout that doesn't
+* have fast-clear data or to a layout that will be aware of the fast-clear
+* value.
+*/
+ const bool maybe_fast_cleared = undef_layout || initial_layout ==
+ VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
+ if (!maybe_fast_cleared || final_layout ==
+ VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL)
+ return;
+
+ /* Determine the optimal resolve operation. For now we only need to resolve
+* the clear color.
+*/
+ const enum blorp_fast_clear_op op = is_ccs_e ?
+ BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL :
+ BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
+
+ /* The actual range that will be transitioned is limited by the number of
+* subresources that have auxiliary data.
+*/
+ level_count = MIN2(level_count, anv_color_aux_levels(image));
+
+ /* A write cache flush with an end-of-pipe sync is required between
+* rendering, clearing, and resolving operations. Perform a flush of the
+* write cache before and after the resolve operation to meet this
+* requirement.
+*/
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+
+ for (uint32_t level = base_level; level < base_level + level_count;
level++) {
+
+ layer_count = MIN2(layer_count, anv_color_aux_layers(image, level));
+ for (uint32_t layer = base_layer; layer < base_layer + layer_count;
layer++) {
+
+ /* Create a surface state with the right clear color and perform the
+ * resolve.
+ */
+ struct anv_state surface_state =
+anv_cmd_buffer_alloc_surface_state(cmd_buffer);
+ anv_fill_ccs_resolve_ss(cmd_buffer->device, surface_state.map, image,
+ level, layer);
+ add_image_relocs(cmd_buffer, image, VK_IMAGE_ASPECT_COLOR_BIT,
+ is_ccs_e ? ISL_AUX_USAGE_CCS_E :
ISL_AUX_USAGE_CCS_D,
+ surface_state);
+ anv_state_flush(cmd_buffer->device, surface_state);
+ genX(transfer_clear_value)(cmd_buffer, surface_state, image, level,
+false);
+ anv_ccs_resolve(cmd_buffer, surface_state, image, level, layer, op);
+ }
+ }
+
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
+}
+
/**
* Setup anv_cmd_state::attachments for vkCmdBeginRenderPass.
*/
--
2.12.2
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[Mesa-dev] [PATCH 12/22] anv/gpu_memcpy: Add a lighter-weight memcpy path
We're now performing a GPU memcpy in more places to copy small amounts
of data. Add a path to thrash less state.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_gpu_memcpy.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/src/intel/vulkan/genX_gpu_memcpy.c
b/src/intel/vulkan/genX_gpu_memcpy.c
index 3cbc7235cf..f15c2a5f72 100644
--- a/src/intel/vulkan/genX_gpu_memcpy.c
+++ b/src/intel/vulkan/genX_gpu_memcpy.c
@@ -28,6 +28,8 @@
#include "common/gen_l3_config.h"
+#define MI_PREDICATE_SRC0 0x2400
+
/**
* This file implements some lightweight memcpy/memset operations on the GPU
* using a vertex buffer and streamout.
@@ -63,6 +65,42 @@ genX(cmd_buffer_gpu_memcpy)(struct anv_cmd_buffer
*cmd_buffer,
assert(dst_offset + size <= dst->size);
assert(src_offset + size <= src->size);
+ /* This memcpy expects DWord aligned memory. */
+ assert(size % 4 == 0);
+ assert(dst_offset % 4 == 0);
+ assert(src_offset % 4 == 0);
+
+ /* Use a simpler memcpy operation when copying 16 bytes or less of data.
+* This is the size of a surface state's clear value on SKL+.
+*/
+ if (size <= 16) {
+ for (uint32_t i = 0; i < size; i += 4) {
+ const struct anv_address src_addr =
+(struct anv_address) { src, src_offset + i};
+ const struct anv_address dst_addr =
+(struct anv_address) { dst, dst_offset + i};
+#if GEN_GEN >= 8
+ anv_batch_emit(&cmd_buffer->batch, GENX(MI_COPY_MEM_MEM), cp) {
+cp.DestinationMemoryAddress = dst_addr;
+cp.SourceMemoryAddress = src_addr;
+ }
+#else
+ /* IVB does not have a general purpose register for command streamer
+ * commands. Therefore, we use an alternate temporary register.
+ */
+ anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_MEM), load) {
+load.RegisterAddress = MI_PREDICATE_SRC0;
+load.MemoryAddress = src_addr;
+ }
+ anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM),
store) {
+store.RegisterAddress = MI_PREDICATE_SRC0;
+store.MemoryAddress = dst_addr;
+ }
+#endif
+ }
+ return;
+ }
+
/* The maximum copy block size is 4 32-bit components at a time. */
unsigned bs = 16;
bs = gcd_pow2_u64(bs, src_offset);
--
2.12.2
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[Mesa-dev] [PATCH 11/22] anv/cmd_buffer: Ensure the fast clear values are correct
Signed-off-by: Nanley Chery
---
src/intel/vulkan/genX_cmd_buffer.c | 76 ++
1 file changed, 76 insertions(+)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index e3b1687121..4698270abb 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -400,6 +400,57 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer,
}
+/* Copies clear value dwords between a surface state object and an image's
+ * clear value buffer.
+ */
+static void
+genX(transfer_clear_value)(struct anv_cmd_buffer * const cmd_buffer,
+ const struct anv_state surface_state,
+ const struct anv_image * const image,
+ const uint8_t level,
+ const bool copy_to_buffer)
+{
+ assert(cmd_buffer && image);
+
+ /* The image and its subresource must have a color auxiliary buffer. */
+ assert(anv_image_has_color_aux(image));
+ assert(level < anv_color_aux_levels(image));
+
+ const uint32_t img_clear_offset =
+ image->offset + image->aux_surface.offset +
+ image->aux_surface.isl.size +
+ cmd_buffer->device->isl_dev.ss.size * level +
+ cmd_buffer->device->isl_dev.ss.clear_value_offset;
+
+ struct anv_bo * const ss_bo =
+ &cmd_buffer->device->surface_state_block_pool.bo;
+ const uint32_t ss_clear_offset = surface_state.offset +
+ cmd_buffer->device->isl_dev.ss.clear_value_offset;
+
+ const uint8_t clear_value_size =
+ cmd_buffer->device->isl_dev.ss.clear_value_size;
+
+ if (copy_to_buffer) {
+ genX(cmd_buffer_gpu_memcpy)(cmd_buffer, image->bo, img_clear_offset,
+ ss_bo, ss_clear_offset, clear_value_size);
+ } else {
+ genX(cmd_buffer_gpu_memcpy)(cmd_buffer, ss_bo, ss_clear_offset,
+ image->bo, img_clear_offset,
clear_value_size);
+
+ /* From the SKL PRM, Shared Functions -> State -> State Caching:
+ *
+ *Whenever the RENDER_SURFACE_STATE object in memory pointed to by
+ *the Binding Table Pointer (BTP) and Binding Table Index (BTI) is
+ *modified [...], the L1 state cache must be invalidated to ensure
+ *the new surface or sampler state is fetched from system memory.
+ *
+ * SKL actually doesn't seem to need this, but HSW does.
+ */
+ cmd_buffer->state.pending_pipe_bits |=
+ ANV_PIPE_STATE_CACHE_INVALIDATE_BIT;
+ }
+}
+
/**
* Setup anv_cmd_state::attachments for vkCmdBeginRenderPass.
*/
@@ -538,6 +589,31 @@ genX(cmd_buffer_setup_attachments)(struct anv_cmd_buffer
*cmd_buffer,
add_image_view_relocs(cmd_buffer, iview,
state->attachments[i].aux_usage,
state->attachments[i].color_rt_state);
+
+/* Update the image subresource's fast-clear value as necessary. */
+if (state->attachments[i].fast_clear) {
+ /* Update the clear value buffer. */
+ assert(state->attachments[i].aux_usage != ISL_AUX_USAGE_NONE);
+ genX(transfer_clear_value)(cmd_buffer,
+ state->attachments[i].color_rt_state, iview->image,
+ iview->isl.base_level, true /* copy_to_buffer */);
+} else if (att->load_op == VK_ATTACHMENT_LOAD_OP_LOAD &&
+ state->attachments[i].aux_usage != ISL_AUX_USAGE_NONE) {
+ /* The attachment may have been fast-cleared in a previous
+* render pass. Update the clear color fields.
+*/
+ genX(transfer_clear_value)(cmd_buffer,
+ state->attachments[i].color_rt_state, iview->image,
+ iview->isl.base_level, false /* copy_to_ss */);
+
+ if (need_input_attachment_state(&pass->attachments[i]) &&
+ state->attachments[i].input_aux_usage !=
+ ISL_AUX_USAGE_NONE) {
+ genX(transfer_clear_value)(cmd_buffer,
+ state->attachments[i].input_att_state, iview->image,
+ iview->isl.base_level, false /* copy_to_ss */);
+ }
+}
} else {
/* This field will be initialized after the first subpass
* transition.
--
2.12.2
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[Mesa-dev] [PATCH 17/22] anv: Add anv_get_sliceCount()
Signed-off-by: Nanley Chery --- src/intel/vulkan/anv_private.h | 4 1 file changed, 4 insertions(+) diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 667176270a..819fbea567 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2060,6 +2060,10 @@ anv_layout_to_aux_usage(const struct gen_device_info * const devinfo, ((_range)->layerCount == VK_REMAINING_ARRAY_LAYERS ? \ (_image)->array_size - (_range)->baseArrayLayer : (_range)->layerCount) +#define anv_get_sliceCount(_image, _range) \ + ((_range)->layerCount == VK_REMAINING_ARRAY_LAYERS ? \ +(_image)->extent.depth - (_range)->baseArrayLayer : (_range)->layerCount) + static inline uint32_t anv_get_levelCount(const struct anv_image *image, const VkImageSubresourceRange *range) -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 10/22] anv/cmd_buffer: Disable fast clears in the GENERAL layout
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_pass.c| 22 ++
src/intel/vulkan/anv_private.h | 1 +
src/intel/vulkan/genX_cmd_buffer.c | 20 ++--
3 files changed, 37 insertions(+), 6 deletions(-)
diff --git a/src/intel/vulkan/anv_pass.c b/src/intel/vulkan/anv_pass.c
index dcd9aafc64..02b8f03fa5 100644
--- a/src/intel/vulkan/anv_pass.c
+++ b/src/intel/vulkan/anv_pass.c
@@ -32,6 +32,16 @@ num_subpass_attachments(const VkSubpassDescription *desc)
(desc->pDepthStencilAttachment != NULL);
}
+static void
+init_first_subpass_layout(struct anv_render_pass_attachment * const att,
+ const VkAttachmentReference att_ref)
+{
+ if (att->first_subpass_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
+ att->first_subpass_layout = att_ref.layout;
+ assert(att->first_subpass_layout != VK_IMAGE_LAYOUT_UNDEFINED);
+ }
+}
+
VkResult anv_CreateRenderPass(
VkDevice_device,
const VkRenderPassCreateInfo* pCreateInfo,
@@ -90,6 +100,7 @@ VkResult anv_CreateRenderPass(
att->initial_layout = pCreateInfo->pAttachments[i].initialLayout;
att->final_layout = pCreateInfo->pAttachments[i].finalLayout;
att->subpass_usage = subpass_usages;
+ assert(att->first_subpass_layout == VK_IMAGE_LAYOUT_UNDEFINED);
subpass_usages += pass->subpass_count;
}
@@ -116,6 +127,8 @@ VkResult anv_CreateRenderPass(
pass->attachments[a].subpass_usage[i] |=
ANV_SUBPASS_USAGE_INPUT;
pass->attachments[a].last_subpass_idx = i;
+ init_first_subpass_layout(&pass->attachments[a],
+ desc->pInputAttachments[j]);
if (desc->pDepthStencilAttachment &&
a == desc->pDepthStencilAttachment->attachment)
subpass->has_ds_self_dep = true;
@@ -135,6 +148,9 @@ VkResult anv_CreateRenderPass(
pass->attachments[a].usage |=
VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_DRAW;
pass->attachments[a].last_subpass_idx = i;
+
+ init_first_subpass_layout(&pass->attachments[a],
+ desc->pColorAttachments[j]);
}
}
}
@@ -159,6 +175,9 @@ VkResult anv_CreateRenderPass(
pass->attachments[a].subpass_usage[i] |=
ANV_SUBPASS_USAGE_RESOLVE_DST;
pass->attachments[a].last_subpass_idx = i;
+
+ init_first_subpass_layout(&pass->attachments[a],
+ desc->pResolveAttachments[j]);
}
}
}
@@ -173,6 +192,9 @@ VkResult anv_CreateRenderPass(
VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT;
pass->attachments[a].subpass_usage[i] |= ANV_SUBPASS_USAGE_DRAW;
pass->attachments[a].last_subpass_idx = i;
+
+init_first_subpass_layout(&pass->attachments[a],
+ *desc->pDepthStencilAttachment);
}
} else {
subpass->depth_stencil_attachment.attachment = VK_ATTACHMENT_UNUSED;
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 12531264d5..b49a5a0009 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2216,6 +2216,7 @@ struct anv_render_pass_attachment {
VkAttachmentLoadOp stencil_load_op;
VkImageLayoutinitial_layout;
VkImageLayoutfinal_layout;
+ VkImageLayoutfirst_subpass_layout;
/* An array, indexed by subpass id, of how the attachment will be used. */
enum anv_subpass_usage * subpass_usage;
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index a981b00f67..e3b1687121 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -217,11 +217,13 @@ color_is_zero_one(VkClearColorValue value, enum
isl_format format)
static void
color_attachment_compute_aux_usage(struct anv_cmd_buffer * const cmd_buffer,
- struct anv_attachment_state *att_state,
- struct anv_image_view *iview,
- VkRect2D render_area,
+ const uint32_t att, VkRect2D render_area,
union isl_color_value *fast_clear_color)
{
+ struct anv_attachment_state *att_state = &cmd_buffer->state.attachments[att];
+ struct anv_image_view *iview =
+ cmd_buffer->state.framebuffer->attachments[att];
+
if (iview->image->aux_surface.isl.size == 0) {
att_state->aux_usage = ISL_AUX_USAGE_NONE;
att_state->input_aux_usage = ISL_AUX_USAGE_NONE;
@@ -31
[Mesa-dev] [PATCH 14/22] anv/blorp: Add a surface-state-based CCS resolve function
This will be used in conjunction with the buffer of clear values.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_blorp.c | 41 +
src/intel/vulkan/anv_private.h | 6 ++
2 files changed, 47 insertions(+)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 5e7d4b06b8..332ad14b37 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1611,3 +1611,44 @@ anv_gen8_hiz_op_resolve(struct anv_cmd_buffer
*cmd_buffer,
blorp_gen6_hiz_op(&batch, &surf, 0, 0, op);
blorp_batch_finish(&batch);
}
+
+void
+anv_ccs_resolve(struct anv_cmd_buffer * const cmd_buffer,
+const struct anv_state surface_state,
+const struct anv_image * const image,
+const uint8_t level, const uint32_t layer,
+const enum blorp_fast_clear_op op)
+{
+ assert(cmd_buffer && image);
+
+ /* This image must have a CCS buffer. */
+ assert(anv_image_has_color_aux(image) &&
+ image->samples == 1);
+
+ /* This level and layer must have auxiliary data. */
+ assert(level < anv_color_aux_levels(image));
+ assert(layer < anv_color_aux_layers(image, level));
+
+ /* Create a binding table for this surface state. */
+ uint32_t binding_table;
+ VkResult result =
+ binding_table_for_surface_state(cmd_buffer, surface_state,
+ &binding_table);
+ if (result != VK_SUCCESS)
+ return;
+
+ struct blorp_batch batch;
+ blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer,
+BLORP_BATCH_NO_EMIT_DEPTH_STENCIL);
+
+ struct blorp_surf surf;
+ get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
+image->aux_usage == ISL_AUX_USAGE_CCS_E ?
+ISL_AUX_USAGE_CCS_E : ISL_AUX_USAGE_CCS_D,
+&surf);
+
+ blorp_ccs_resolve_bt(&batch, binding_table, &surf, level, layer,
+image->color_surface.isl.format, op);
+
+ blorp_batch_finish(&batch);
+}
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index b49a5a0009..667176270a 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -2040,6 +2040,12 @@ void
anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer,
const struct anv_image *image,
enum blorp_hiz_op op);
+void
+anv_ccs_resolve(struct anv_cmd_buffer * const cmd_buffer,
+const struct anv_state surface_state,
+const struct anv_image * const image,
+const uint8_t level, const uint32_t layer,
+const enum blorp_fast_clear_op op);
enum isl_aux_usage
anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
--
2.12.2
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[Mesa-dev] [PATCH 04/22] anv: Add color auxiliary buffer helpers
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_private.h | 42 ++
1 file changed, 42 insertions(+)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index dbe1e0475e..ac71537e88 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1977,6 +1977,48 @@ struct anv_image {
struct anv_surface aux_surface;
};
+static inline bool
+anv_image_has_color_aux(const struct anv_image * const image)
+{
+ assert(image);
+
+ return image->aspects == VK_IMAGE_ASPECT_COLOR_BIT &&
+ image->aux_surface.isl.size > 0;
+}
+
+/* Returns the number of levels present in the auxiliary buffer of a color
+ * image.
+ */
+static inline uint8_t
+anv_color_aux_levels(const struct anv_image * const image)
+{
+ assert(image);
+
+ /* We expect the image to have a color aux buffer. */
+ assert(anv_image_has_color_aux(image));
+
+ return image->aux_surface.isl.levels;
+}
+
+/* Returns the number of layers present in the auxiliary buffer of a color
+ * image.
+ */
+static inline uint32_t
+anv_color_aux_layers(const struct anv_image * const image,
+ const uint8_t miplevel)
+{
+ assert(image);
+
+ /* We expect the image to have a color aux buffer. */
+ assert(anv_image_has_color_aux(image));
+
+ /* The miplevel must exist in the main buffer. */
+ assert(miplevel < image->levels);
+
+ return MAX2(image->aux_surface.isl.logical_level0_px.array_len,
+ image->aux_surface.isl.logical_level0_px.depth >> miplevel);
+}
+
/* Returns true if a HiZ-enabled depth buffer can be sampled from. */
static inline bool
anv_can_sample_with_hiz(const struct gen_device_info * const devinfo,
--
2.12.2
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[Mesa-dev] [PATCH 05/22] anv/image: Append CCS/MCS with a clear value buffer
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_image.c | 67
1 file changed, 67 insertions(+)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index cf34dbe3b0..8d946e8e93 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -114,6 +114,71 @@ add_surface(struct anv_image *image, struct anv_surface
*surf)
image->alignment = MAX2(image->alignment, surf->isl.alignment);
}
+
+/**
+ * For color buffers that have an auxiliary buffer enabled, there is an
+ * additional buffer that keeps track of fast clear values. Using this
+ * buffer allows us to access image subresources while being aware of their
+ * fast clear values in non-trivial cases.
+ *
+ * The clear values in this buffer are updated when a fast clear is performed
+ * on a subresource. Two synchronization operations can be performed in order
+ * for the next memory access to use the fast-clear value:
+ * a. Copy the value from the buffer to the surface state object used for
+ * reading (if different).
+ * b. Do (a) onto a surface state object and use it to resolve the
+ * subresource.
+ *
+ * The synchronization approach currently taken is as follows. We place
+ * resolves in the hands of the user via layout transitions. We also sometimes
+ * skip resolves when a clear value predetermined to be the default in other
+ * surface state objects is used in a fast clear.
+ *
+ * We fast-clear (and so cause things to get temporarily unsynchronized)
+ * whenever the hardware allows except for two cases: when in the GENERAL
+ * layout and when clearing a proper subset of a layered image. The exception
+ * is made for the former because a layout transition isn't required before
+ * sampling from an image in that layout. The exception is made for the latter
+ * because a layout transition isn't required between a render pass that
+ * renders to a proper subset of a layered image and another render pass that
+ * renders to every layer in the layered image.
+ */
+static void
+add_clear_value_buffer(struct anv_image * const image,
+ const struct anv_device * const device)
+{
+ assert(image && device);
+
+ /* Only color auxiliary buffers have use for this. */
+ assert(anv_image_has_color_aux(image));
+
+ /* The offset to the buffer of clear values must be dword-aligned for GPU
+* memcpy operations. It is located immediately after the auxiliary surface.
+*/
+
+ /* Tiled images are guaranteed to be 4K aligned, so the image alignment
+* should also be dword-aligned.
+*/
+ assert(image->alignment % 4 == 0);
+
+ /* Auxiliary buffers should be a multiple of 4K, so the start of the clear
+* values buffer should already be dword-aligned.
+*/
+ assert(image->aux_surface.isl.size % 4 == 0);
+
+ /* This surface should be at the very end of the image. */
+ assert(image->size ==
+ image->aux_surface.offset + image->aux_surface.isl.size);
+
+ /* Entire surface state objects are stored instead of just clear colors for
+* two reasons:
+* 1. Pre-SKL, we must compute some state fields that lie in the same
+* dword as the clear value.
+* 2. Storing either set of objects requires less than a page of memory.
+*/
+ image->size += device->isl_dev.ss.size * anv_color_aux_levels(image);
+}
+
/**
* Initialize the anv_image::*_surface selected by \a aspect. Then update the
* image's memory requirements (that is, the image's size and alignment).
@@ -213,6 +278,7 @@ make_surface(const struct anv_device *dev,
&image->aux_surface.isl);
if (ok) {
add_surface(image, &image->aux_surface);
+add_clear_value_buffer(image, dev);
/* For images created without MUTABLE_FORMAT_BIT set, we know that
* they will always be used with the original format. In
@@ -236,6 +302,7 @@ make_surface(const struct anv_device *dev,
&image->aux_surface.isl);
if (ok) {
add_surface(image, &image->aux_surface);
+ add_clear_value_buffer(image, dev);
image->aux_usage = ISL_AUX_USAGE_MCS;
}
}
--
2.12.2
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[Mesa-dev] [PATCH 02/22] intel/isl: Only create a CCS buffer if the image supports rendering
This prevents assertion failures when initializing the clear value buffer on images with the E5B9G9R9 format. Signed-off-by: Nanley Chery --- src/intel/isl/isl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index ce5b35c47c..ff3e2fb86d 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1573,7 +1573,7 @@ isl_surf_get_ccs_surf(const struct isl_device *dev, if (ISL_DEV_GEN(dev) <= 8 && surf->dim != ISL_SURF_DIM_2D) return false; - if (isl_format_is_compressed(surf->format)) + if (!isl_format_supports_rendering(dev->info, surf->format)) return false; /* TODO: More conditions where it can fail. */ -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 06/22] anv/image: Remove incorrect assertion in anv_BindImage
According to the Linux kernel sources, the ioctl in anv_gem_mmap() will
not fail if the size isn't a multiple of 4KB.
Signed-off-by: Nanley Chery
---
src/intel/vulkan/anv_image.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 8d946e8e93..9f3eb52a37 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -413,11 +413,10 @@ VkResult anv_BindImageMemory(
if (image->aux_surface.isl.size > 0) {
- /* The offset and size must be a multiple of 4K or else the
- * anv_gem_mmap call below will return NULL.
+ /* The offset must be a multiple of 4K or else the anv_gem_mmap call
+ * below will return NULL.
*/
assert((image->offset + image->aux_surface.offset) % 4096 == 0);
- assert(image->aux_surface.isl.size % 4096 == 0);
/* Auxiliary surfaces need to have their memory cleared to 0 before they
* can be used. For CCS surfaces, this puts them in the "resolved"
--
2.12.2
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[Mesa-dev] [PATCH 01/22] intel/isl: Limit CCS to one subresource on gen7
Signed-off-by: Nanley Chery --- src/intel/isl/isl.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index f89f351c15..ce5b35c47c 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1610,14 +1610,19 @@ isl_surf_get_ccs_surf(const struct isl_device *dev, return false; } + /* Multi-LOD and multi-layer CCS isn't supported on gen7. */ + const uint8_t levels = ISL_DEV_GEN(dev) == 7 ? 1 : surf->levels; + const uint32_t array_len = ISL_DEV_GEN(dev) == 7 ? + 1 : surf->logical_level0_px.array_len; + return isl_surf_init(dev, ccs_surf, .dim = surf->dim, .format = ccs_format, .width = surf->logical_level0_px.width, .height = surf->logical_level0_px.height, .depth = surf->logical_level0_px.depth, -.levels = surf->levels, -.array_len = surf->logical_level0_px.array_len, +.levels = levels, +.array_len = array_len, .samples = 1, .usage = ISL_SURF_USAGE_CCS_BIT, .tiling_flags = ISL_TILING_CCS_BIT); -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 13/22] blorp/clear: Add a binding-table-based CCS resolve function
Signed-off-by: Nanley Chery
---
src/intel/blorp/blorp.h | 9 ++
src/intel/blorp/blorp_clear.c | 64 ---
2 files changed, 57 insertions(+), 16 deletions(-)
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index eab75d70ab..8b8227bb1c 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -191,6 +191,15 @@ blorp_ccs_resolve(struct blorp_batch *batch,
enum isl_format format,
enum blorp_fast_clear_op resolve_op);
+/* Resolves the image subresource specified in the binding table. */
+void
+blorp_ccs_resolve_bt(struct blorp_batch *batch,
+ const uint32_t binding_table_offset,
+ struct blorp_surf * const surf,
+ const uint32_t level, const uint32_t layer,
+ const enum isl_format format,
+ const enum blorp_fast_clear_op resolve_op);
+
/**
* For an overview of the HiZ operations, see the following sections of the
* Sandy Bridge PRM, Volume 1, Part2:
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 4e834ba123..6204784a7e 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -665,20 +665,20 @@ blorp_clear_attachments(struct blorp_batch *batch,
batch->blorp->exec(batch, ¶ms);
}
-void
-blorp_ccs_resolve(struct blorp_batch *batch,
- struct blorp_surf *surf, uint32_t level, uint32_t layer,
- enum isl_format format,
- enum blorp_fast_clear_op resolve_op)
+static void
+blorp_ccs_resolve_prepare(struct blorp_batch * const batch,
+ struct blorp_params * const params,
+ const struct blorp_surf * const surf,
+ const uint32_t level, const uint32_t layer,
+ const enum isl_format format,
+ const enum blorp_fast_clear_op resolve_op)
{
- struct blorp_params params;
- blorp_params_init(¶ms);
/* Layered and mipmapped fast clear is only available from Gen8 onwards. */
assert(ISL_DEV_GEN(batch->blorp->isl_dev) >= 8 ||
(level == 0 && layer == 0));
- brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf,
+ brw_blorp_surface_info_init(batch->blorp, ¶ms->dst, surf,
level, layer, format, true);
/* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
@@ -691,7 +691,7 @@ blorp_ccs_resolve(struct blorp_batch *batch,
* multiply by 8 and 16. On Sky Lake, we multiply by 8.
*/
const struct isl_format_layout *aux_fmtl =
- isl_format_get_layout(params.dst.aux_surf.format);
+ isl_format_get_layout(params->dst.aux_surf.format);
assert(aux_fmtl->txc == ISL_TXC_CCS);
unsigned x_scaledown, y_scaledown;
@@ -705,11 +705,11 @@ blorp_ccs_resolve(struct blorp_batch *batch,
x_scaledown = aux_fmtl->bw / 2;
y_scaledown = aux_fmtl->bh / 2;
}
- params.x0 = params.y0 = 0;
- params.x1 = minify(params.dst.aux_surf.logical_level0_px.width, level);
- params.y1 = minify(params.dst.aux_surf.logical_level0_px.height, level);
- params.x1 = ALIGN(params.x1, x_scaledown) / x_scaledown;
- params.y1 = ALIGN(params.y1, y_scaledown) / y_scaledown;
+ params->x0 = params->y0 = 0;
+ params->x1 = minify(params->dst.aux_surf.logical_level0_px.width, level);
+ params->y1 = minify(params->dst.aux_surf.logical_level0_px.height, level);
+ params->x1 = ALIGN(params->x1, x_scaledown) / x_scaledown;
+ params->y1 = ALIGN(params->y1, y_scaledown) / y_scaledown;
if (batch->blorp->isl_dev->info->gen >= 9) {
assert(resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_FULL ||
@@ -718,7 +718,7 @@ blorp_ccs_resolve(struct blorp_batch *batch,
/* Broadwell and earlier do not have a partial resolve */
assert(resolve_op == BLORP_FAST_CLEAR_OP_RESOLVE_FULL);
}
- params.fast_clear_op = resolve_op;
+ params->fast_clear_op = resolve_op;
/* Note: there is no need to initialize push constants because it doesn't
* matter what data gets dispatched to the render target. However, we must
@@ -726,8 +726,40 @@ blorp_ccs_resolve(struct blorp_batch *batch,
* color" message.
*/
- if (!blorp_params_get_clear_kernel(batch->blorp, ¶ms, true))
+ if (!blorp_params_get_clear_kernel(batch->blorp, params, true))
return;
+}
+
+void
+blorp_ccs_resolve(struct blorp_batch *batch,
+ struct blorp_surf *surf, uint32_t level, uint32_t layer,
+ enum isl_format format,
+ enum blorp_fast_clear_op resolve_op)
+{
+ struct blorp_params params;
+ blorp_params_init(¶ms);
+
+ blorp_ccs_resolve_prepare(batch, ¶ms, surf, level, layer, format,
+ resolve_op);
+
+ batch->blorp->exec(batch, ¶ms);
+}
+
+void
+blorp_ccs_resolve_bt(struct blorp_batch *batch,
+ const uint
[Mesa-dev] [PATCH 00/22] anv: Move CCS resolves to layout transitions
Resolves of CCS-enabled image subresources are currently tied to the scope of a subpass. This can cause us to lose clear data compression prematurely in some cases. For example, an application can record a render pass that only clears followed by another render pass that only draws. The driver would do a fast-clear then immediately resolve the color buffers before the second render pass. This series instead ties the lifetime of clear data compression to the scope of the image layout. In the above example, the application would presumably keep the image in the VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL layout across both render passes and so the driver would avoid the intermediate resolve. This series improves the average frame rate of a Dota 2 benchmark by 3.04% on my SKL GT4. The frame rates are now similar to those seen when running it with INTEL_DEBUG=norbc. The benchmark was run three times at 1080p in release mode. Six tests in dEQP-VK.geometry.layered.3d.* now fail, but I've attributed the failures to a test bug and filed a bug report. Cc: Jason Ekstrand Nanley Chery (22): intel/isl: Limit CCS to one subresource on gen7 intel/isl: Only create a CCS buffer if the image supports rendering intel/isl: Add surface state clear value information anv: Add color auxiliary buffer helpers anv/image: Append CCS/MCS with a clear value buffer anv/image: Remove incorrect assertion in anv_BindImage anv/image: Initialize the clear values buffer anv/cmd_buffer: Always enable CCS_D in render passes anv/cmd_buffer: Don't partially fast-clear image layers anv/cmd_buffer: Disable fast clears in the GENERAL layout anv/cmd_buffer: Ensure the fast clear values are correct anv/gpu_memcpy: Add a lighter-weight memcpy path blorp/clear: Add a binding-table-based CCS resolve function anv/blorp: Add a surface-state-based CCS resolve function anv/cmd_buffer: Adjust the image view reloc function anv/cmd_buffer: Add transition_color_buffer() anv: Add anv_get_sliceCount() anv/cmd_buffer: Perform color buffer layout transitions anv/blorp: Stop resolving CCS implicitly anv/pass: Get rid of anv_subpass_usage intel/blorp: Allow BLORP calls to be predicated anv: Predicate fast-clear resolves src/intel/blorp/blorp.h| 12 + src/intel/blorp/blorp_clear.c | 64 +++-- src/intel/blorp/blorp_genX_exec.h | 3 + src/intel/isl/isl.c| 20 +- src/intel/isl/isl.h| 4 + src/intel/vulkan/anv_blorp.c | 188 +++--- src/intel/vulkan/anv_image.c | 153 ++- src/intel/vulkan/anv_pass.c| 36 ++- src/intel/vulkan/anv_private.h | 68 - src/intel/vulkan/genX_cmd_buffer.c | 507 ++--- src/intel/vulkan/genX_gpu_memcpy.c | 38 +++ 11 files changed, 801 insertions(+), 292 deletions(-) -- 2.12.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 0/2] anv/i965: drop libdrm dependency completely
On 27/04/17 08:20, Eric Anholt wrote: Emil Velikov writes: On 25 April 2017 at 23:56, Lionel Landwerlin wrote: Hi, While working with changes that span from kernel to user space, I've been wondering whether we need to depend on libdrm at all for the anv & i965 drivers. Indeed with Ken's recent changes, we only depend on libdrm for its kernel header files which we could just embed ourselves. I've only included the minimal set of header files we need from the kernel for anv & i965. Maybe other drivers would be interested and maybe we should put all the kernel drm uapi headers into include? AFAICT the goal behind the libdrm_intel fold was to allow rapid and seamless rework of the interface. With a potential goal to make it a shared one, as it gets stabilised. Currently ANV uses more than just the UAPI headers. But if we ignore that, coping them is a bad idea. What else is anv using from libdrm? (maybe I missed something) Why - adds a, yet another, copy and making synchronisation more annoying. First example - you blindly copied the files rather than using `make headers_install' first ;-) Not to mention that it makes the chicken and egg problem* even more confusing and error prone. It doesn't feel like that to me. Actually instead of modifying 3 different repos, you end up modifying just 2. Sounds less error prone. Emil * Which patches land first - kernel or userspace I don't see how it does that at all. It simplifies the process: Now you send out your proposed new userspace to one repo, instead of two. And, after the first commit, it'll be obvious when you screw up using make headers_install because there will be surprising diff. Right now we have to update libdrm, then update the mesa to depend on the right libdrm to actually get the header files we want. If you depend on libdrm from more than just uapi headers, it might now be too much of a burden. But it seems we're clearly moving away from that in anv/i965. As a developer it feels a lot easier to have just the update mesa with both the new kernel API you depend on & the changes to the user space driver using that API. - Lionel ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] autogen.sh: set default sendemail.to
On Thu, Apr 27, 2017 at 1:32 PM, Kenneth Graunke wrote: > On Monday, April 24, 2017 12:29:32 PM PDT Jason Ekstrand wrote: >> This seems like something that would be more appropriate to put on a >> "getting started" page than autogen.sh. The very last thing I (as a user >> of it) would expect autogen.sh to do is monkey with my git config; local or >> otherwise. > > Yeah, I don't really like this either. > > Emil is right that xserver does this - but actually to set the subject > prefix to "PATCH xserver" rather than send-email's "to" field. > > So I guess there's some precedent. Still seems odd. You almost want > a post-clone hook. But no such thing exists in git today, as far as I > can tell...and generally you don't want it executing arbitrary code you > just cloned from the internet without giving you an opportunity to read > it first...so not sure if they'd add one... > I kinda like it.. maybe it is a bit hacky in autogen.sh, but there isn't really a better place. Perhaps a compromise would be first time autogen.sh is run, iff interactive, then prompt asking if you want to configure sendemail.to (and I guess it could also ask about sendemail.cccmd too?) BR, -R ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] autogen.sh: set default sendemail.to
On Monday, April 24, 2017 12:29:32 PM PDT Jason Ekstrand wrote: > This seems like something that would be more appropriate to put on a > "getting started" page than autogen.sh. The very last thing I (as a user > of it) would expect autogen.sh to do is monkey with my git config; local or > otherwise. Yeah, I don't really like this either. Emil is right that xserver does this - but actually to set the subject prefix to "PATCH xserver" rather than send-email's "to" field. So I guess there's some precedent. Still seems odd. You almost want a post-clone hook. But no such thing exists in git today, as far as I can tell...and generally you don't want it executing arbitrary code you just cloned from the internet without giving you an opportunity to read it first...so not sure if they'd add one... signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/2] wglinfo: query/print sRGB and float pixel format info
series looks good to me.
Reviewed-by : Neha Bhende
Regards,
Neha
From: Brian Paul
Sent: Thursday, April 27, 2017 10:19:07 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 2/2] wglinfo: query/print sRGB and float pixel format info
Print the columns in the same place as glxinfo.
Use 3 digit hexadecimal field for printing pixel format number.
Remove the 'caveat' field which is non-existant in WGL.
This also fixes a minor bug when we query WGL_PIXEL_TYPE_ARB.
We previously stored the result in info->pfd.iPixelType which is a BYTE
type but the WGL_TYPE_* values are all larger than 255. Use a temporary
variable instead.
---
src/wgl/wglinfo.c | 61 +++
1 file changed, 39 insertions(+), 22 deletions(-)
diff --git a/src/wgl/wglinfo.c b/src/wgl/wglinfo.c
index 8693450..f81978b 100644
--- a/src/wgl/wglinfo.c
+++ b/src/wgl/wglinfo.c
@@ -31,8 +31,9 @@
* -l print interesting OpenGL limits (added 5 Sep 2002)
*/
-#include
+#include
+#include
#include
#include
#include
@@ -45,6 +46,7 @@
static GLboolean have_WGL_ARB_create_context;
static GLboolean have_WGL_ARB_pixel_format;
static GLboolean have_WGL_ARB_multisample;
+static GLboolean have_WGL_ARB_framebuffer_sRGB; /* or EXT version */
static PFNWGLGETPIXELFORMATATTRIBIVARBPROC wglGetPixelFormatAttribivARB_func;
static PFNWGLCREATECONTEXTATTRIBSARBPROC wglCreateContextAttribsARB_func;
@@ -57,6 +59,8 @@ struct format_info {
PIXELFORMATDESCRIPTOR pfd;
int sampleBuffers, numSamples;
int transparency;
+ bool floatComponents;
+ bool srgb;
};
@@ -172,6 +176,10 @@ print_screen_info(HDC _hdc, const struct options *opts,
GLboolean coreProfile)
if (extension_supported("WGL_ARB_create_context", wglExtensions)) {
have_WGL_ARB_create_context = GL_TRUE;
}
+ if (extension_supported("WGL_ARB_framebuffer_sRGB", wglExtensions) ||
+ extension_supported("WGL_EXT_framebuffer_sRGB", wglExtensions)) {
+have_WGL_ARB_framebuffer_sRGB = GL_TRUE;
+ }
}
#endif
@@ -327,9 +335,11 @@ print_visual_attribs_verbose(int iPixelFormat, const
struct format_info *info)
visual_render_type_name(info->pfd.iPixelType),
info->pfd.dwFlags & PFD_DOUBLEBUFFER ? 1 : 0,
info->pfd.dwFlags & PFD_STEREO ? 1 : 0);
- printf("rgba: cRedBits=%d cGreenBits=%d cBlueBits=%d cAlphaBits=%d\n",
+ printf("rgba: cRedBits=%d cGreenBits=%d cBlueBits=%d cAlphaBits=%d
float=%c sRGB=%c\n",
info->pfd.cRedBits, info->pfd.cGreenBits,
- info->pfd.cBlueBits, info->pfd.cAlphaBits);
+ info->pfd.cBlueBits, info->pfd.cAlphaBits,
+ info->floatComponents ? 'Y' : 'N',
+ info->srgb ? 'Y' : 'N');
printf("cAuxBuffers=%d cDepthBits=%d cStencilBits=%d\n",
info->pfd.cAuxBuffers, info->pfd.cDepthBits, info->pfd.cStencilBits);
printf("accum: cRedBits=%d cGreenBits=%d cBlueBits=%d cAlphaBits=%d\n",
@@ -343,25 +353,22 @@ print_visual_attribs_verbose(int iPixelFormat, const
struct format_info *info)
printf("swapMethod = Copy\n");
else
printf("swapMethod = Undefined\n");
-
}
static void
print_visual_attribs_short_header(void)
{
- printf(" visual x bf lv rg d st colorbuffer ax dp st accumbuffer ms
cav\n");
- printf(" id gen win sp sz l ci b ro r g b a bf th cl r g b a ns b
eat\n");
-
printf("\n");
+ printf("visual x bf lv rg d st colorbuffer sr ax dp st
accumbuffer ms \n");
+ printf(" id gen win sp sz l ci b ro r g b a F gb bf th cl r g b
a ns b\n");
+
printf("-\n");
}
static void
print_visual_attribs_short(int iPixelFormat, const struct format_info *info)
{
- char *caveat = "None";
-
- printf("0x%02x %2d %2d %2d %3d %2d %c%c %c %c %2d %2d %2d %2d %2d %2d
%2d",
+ printf("0x%03x %2d %2d %2d %3d %2d %c%c %c %c %2d %2d %2d %2d %c %c %2d
%2d %2d",
iPixelFormat,
info->pfd.dwFlags & PFD_GENERIC_FORMAT ? 1 : 0,
info->pfd.dwFlags & PFD_DRAW_TO_WINDOW ? 1 : 0,
@@ -374,33 +381,33 @@ print_visual_attribs_short(int iPixelFormat, const struct
format_info *info)
info->pfd.dwFlags & PFD_STEREO ? 'y' : '.',
info->pfd.cRedBits, info->pfd.cGreenBits,
info->pfd.cBlueBits, info->pfd.cAlphaBits,
+ info->floatComponents ? 'f' : '.',
+ info->srgb ? 's' : '.',
info->pfd.cAuxBuffers,
info->pfd.cDepthBits,
info->pfd.cStencilBits
);
- printf(" %2d %2d %2d %2d %2d %1d %s\n",
+ printf(" %2d %2d %2d %2d %2d %1d\n",
info->pfd.cAccumRedBits, info->pfd.cAccumGreenBits,
info->pfd.cAccumBlueBits, info->pf
Re: [Mesa-dev] [PATCH] i965: Set point rasterization rule to UPPER_RIGHT on Gen6-7.5.
Makes sense to me. Reviewed-by: Rafael Antognolli On Wed, Apr 26, 2017 at 11:14:47PM -0700, Kenneth Graunke wrote: > Gen4-5 and Gen8+ already set this, but Gen6-7.5 did not. We ought to > be consistent - the answer depends on the API, not the hardware generation. > > The Sandybridge PRM says about RASTRULE_UPPER_RIGHT: > >"To match OpenGL point rasterization rules (round to +infinity, where > this is the upper right direction wrt OpenGL screen origin of lower > left). > > So this is likely the one we should use. > --- > src/mesa/drivers/dri/i965/gen6_wm_state.c | 2 ++ > src/mesa/drivers/dri/i965/gen7_wm_state.c | 1 + > 2 files changed, 3 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c > b/src/mesa/drivers/dri/i965/gen6_wm_state.c > index aabae70d10b..2fb2a333853 100644 > --- a/src/mesa/drivers/dri/i965/gen6_wm_state.c > +++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c > @@ -199,6 +199,8 @@ gen6_upload_wm_state(struct brw_context *brw, >dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE; > } > > + dw6 |= GEN6_WM_POINT_RASTRULE_UPPER_RIGHT; > + > /* From the SNB PRM, volume 2 part 1, page 281: > * "If the PS kernel does not need the Position XY Offsets > * to compute a Position XY value, then this field should be > diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c > b/src/mesa/drivers/dri/i965/gen7_wm_state.c > index 1c33db4d3b5..5efe55a0088 100644 > --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c > +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c > @@ -51,6 +51,7 @@ upload_wm_state(struct brw_context *brw) > dw1 |= GEN7_WM_STATISTICS_ENABLE; > dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0; > dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5; > + dw1 |= GEN7_WM_POINT_RASTRULE_UPPER_RIGHT; > > /* _NEW_LINE */ > if (ctx->Line.StippleFlag) > -- > 2.12.2 > > ___ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] Android: fix r300g only build
On Thu, Apr 27, 2017 at 12:31 PM, Rob Herring wrote:
> On Thu, Apr 27, 2017 at 11:18 AM, Ilia Mirkin wrote:
>> On Thu, Apr 27, 2017 at 11:36 AM, Emil Velikov
>> wrote:
>>> On 27 April 2017 at 16:11, Rob Herring wrote:
>>>
BTW, mesa lists this as the LLVM version requirements:
LLVM_REQUIRED_GALLIUM=3.3.0
>>> src/gallium/auxiliary/{draw,gallivm}, used by
>>> - nouveau (nv30), i915, r300, softpipe (yes) and svga - optional
>>> - llvmpipe, swr, radeonsi - mandatory
>>
>> Technically, it's optionally used by everything as it's used for
>> GL_FEEDBACK implementation by st/mesa. But the drivers you point at do
>> use it for more than just that. However for none of the "optional"
>> ones is llvm required (perhaps that's your point) - draw can operate
>> without llvm as well.
>
> Is there an advantage to using LLVM over not? Android-x86 only enables
> LLVM for radeonsi and llvmpipe, though when enabled it is globally
> enabled (which perhaps could have some side effects on other drivers).
If you do a single build [with autoconf], LLVM is either on or off,
for all drivers built in that build. Enabling LLVM has the advantage
that ... LLVM gets used in those situations where the draw module is
invoked, i.e. you get JIT'd vertex processing programs instead of the
much slower interpreted approach.
For nv30, "draw" gets used as a fallback path semi-frequently (i.e. an
appreciable fraction of the time). For nv50/nvc0, it's really just
GL_SELECT/GL_FEEDBACK usage by st/mesa -- this is a long-deprecated GL
feature that is AFAIK not accessible from ES (and AFAIK there's no
desktop GL on Android), so I wouldn't worry about it.
http://docs.gl/gl3/glRenderMode -- poor man's transform feedback.
Cheers,
-ilia
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[Mesa-dev] [PATCH 1/2] wglgears.c: add -srgb option
To test sRGB pixel format selection and sRGB rendering.
This involves choosing a new pixel format, creating a new context, etc.
---
src/wgl/wglgears.c | 91 --
1 file changed, 88 insertions(+), 3 deletions(-)
diff --git a/src/wgl/wglgears.c b/src/wgl/wglgears.c
index d90d603..7d43822 100644
--- a/src/wgl/wglgears.c
+++ b/src/wgl/wglgears.c
@@ -30,6 +30,7 @@
* 25th October 2004
*/
+#include
#include
#include
#include
@@ -48,6 +49,14 @@
#define M_PI 3.14159265
#endif /* !M_PI */
+#ifndef WGL_FRAMEBUFFER_SRGB_CAPABLE_ARB
+#define WGL_FRAMEBUFFER_SRGB_CAPABLE_ARB 0x20A9
+#endif
+
+#ifndef GL_FRAMEBUFFER_SRGB
+#define GL_FRAMEBUFFER_SRGB 0x8db9
+#endif
+
/* Global vars */
static HDC hDC;
@@ -61,6 +70,7 @@ static const char *ProgramName; /* program name (from
argv[0]) */
static GLfloat view_rotx = 20.0, view_roty = 30.0, view_rotz = 0.0;
static GLint gear1, gear2, gear3;
static GLfloat angle = 0.0;
+static GLboolean use_srgb = GL_FALSE;
static
@@ -282,6 +292,9 @@ init(void)
glEnable(GL_LIGHTING);
glEnable(GL_LIGHT0);
glEnable(GL_DEPTH_TEST);
+ if (use_srgb) {
+ glEnable(GL_FRAMEBUFFER_SRGB);
+ }
/* make the gears */
gear1 = glGenLists(1);
@@ -341,7 +354,7 @@ WndProc(HWND hWnd, UINT uMsg, WPARAM wParam, LPARAM lParam)
static void
make_window(const char *name, int x, int y, int width, int height)
{
- GLuint PixelFormat;
+ int pixelFormat;
WNDCLASS wc;
DWORD dwExStyle, dwStyle;
static const PIXELFORMATDESCRIPTOR pfd = {
@@ -399,14 +412,83 @@ make_window(const char *name, int x, int y, int width,
int height)
}
if (!(hDC = GetDC(hWnd)) ||
- !(PixelFormat = ChoosePixelFormat(hDC, &pfd)) ||
- !(SetPixelFormat(hDC, PixelFormat, &pfd)) ||
+ !(pixelFormat = ChoosePixelFormat(hDC, &pfd)) ||
+ !(SetPixelFormat(hDC, pixelFormat, &pfd)) ||
!(hRC = wglCreateContext(hDC)) ||
!(wglMakeCurrent(hDC, hRC))) {
printf("failed to initialise opengl\n");
exit(0);
}
+ if (use_srgb) {
+ /* For sRGB we need to use the wglChoosePixelFormatARB() function,
+ * and then create a new context, window, etc.
+ *
+ * Note: we can't query/use extension functions until after we've
+ * creatend and bound a rendering context.
+ */
+ PFNWGLCHOOSEPIXELFORMATARBPROC wglChoosePixelFormatARB_func =
+ (PFNWGLCHOOSEPIXELFORMATARBPROC)
+ wglGetProcAddress("wglChoosePixelFormatARB");
+ assert(wglChoosePixelFormatARB_func);
+
+ static const int int_attribs[] = {
+ WGL_SUPPORT_OPENGL_ARB, TRUE,
+ //WGL_COLOR_BITS_ARB, 24,
+ //WGL_ALPHA_BITS_ARB, 8,
+ WGL_DEPTH_BITS_ARB, 24,
+ WGL_DOUBLE_BUFFER_ARB, TRUE,
+ WGL_FRAMEBUFFER_SRGB_CAPABLE_ARB, TRUE,
+ 0
+ };
+ static const float float_attribs[] = { 0 };
+ UINT numFormats;
+
+ pixelFormat = 0;
+ if (!wglChoosePixelFormatARB_func(hDC, int_attribs, float_attribs, 1,
+&pixelFormat, &numFormats)) {
+ printf("wglChoosePixelFormatARB failed\n");
+ exit(0);
+ }
+ assert(numFormats > 0);
+ printf("Chose sRGB pixel format %d (0x%x)\n", pixelFormat, pixelFormat);
+
+ PIXELFORMATDESCRIPTOR newPfd;
+ DescribePixelFormat(hDC, pixelFormat, sizeof(pfd), &newPfd);
+
+ /* now, create new context with new pixel format */
+ wglMakeCurrent(hDC, NULL);
+ wglDeleteContext(hRC);
+ DeleteDC(hDC);
+
+ if (!(hWnd = CreateWindowEx(dwExStyle, name, name,
+ WS_CLIPSIBLINGS | WS_CLIPCHILDREN | dwStyle,
+ 0, 0,
+ winrect.right - winrect.left,
+ winrect.bottom - winrect.top,
+ NULL, NULL, hInst, NULL))) {
+ printf("failed to create window\n");
+ exit(0);
+ }
+
+ if (!(hDC = GetDC(hWnd))) {
+ printf("GetDC() failed.\n");
+ exit(0);
+ }
+ if (!SetPixelFormat(hDC, pixelFormat, &pfd)) {
+ printf("SetPixelFormat failed %d\n", (int) GetLastError());
+ exit(0);
+ }
+ if (!(hRC = wglCreateContext(hDC))) {
+ printf("wglCreateContext() failed\n");
+ exit(0);
+ }
+ if (!wglMakeCurrent(hDC, hRC)) {
+ printf("wglMakeCurrent() failed\n");
+ exit(0);
+ }
+ }
+
ShowWindow(hWnd, SW_SHOW);
SetForegroundWindow(hWnd);
SetFocus(hWnd);
@@ -460,6 +542,9 @@ main(int argc, char *argv[])
else if (strcmp(argv[i], "-h") == 0) {
usage();
}
+ else if (strcmp(argv[i], "-srgb") == 0) {
+ use_srgb = GL_TRUE;
+ }
else {
fprintf(stderr, "%s: Unsupported option '%s'.\n", ProgramName,
argv[i]);
usage();
--
1.9.1
___
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[Mesa-dev] [PATCH 2/2] wglinfo: query/print sRGB and float pixel format info
Print the columns in the same place as glxinfo.
Use 3 digit hexadecimal field for printing pixel format number.
Remove the 'caveat' field which is non-existant in WGL.
This also fixes a minor bug when we query WGL_PIXEL_TYPE_ARB.
We previously stored the result in info->pfd.iPixelType which is a BYTE
type but the WGL_TYPE_* values are all larger than 255. Use a temporary
variable instead.
---
src/wgl/wglinfo.c | 61 +++
1 file changed, 39 insertions(+), 22 deletions(-)
diff --git a/src/wgl/wglinfo.c b/src/wgl/wglinfo.c
index 8693450..f81978b 100644
--- a/src/wgl/wglinfo.c
+++ b/src/wgl/wglinfo.c
@@ -31,8 +31,9 @@
* -l print interesting OpenGL limits (added 5 Sep 2002)
*/
-#include
+#include
+#include
#include
#include
#include
@@ -45,6 +46,7 @@
static GLboolean have_WGL_ARB_create_context;
static GLboolean have_WGL_ARB_pixel_format;
static GLboolean have_WGL_ARB_multisample;
+static GLboolean have_WGL_ARB_framebuffer_sRGB; /* or EXT version */
static PFNWGLGETPIXELFORMATATTRIBIVARBPROC wglGetPixelFormatAttribivARB_func;
static PFNWGLCREATECONTEXTATTRIBSARBPROC wglCreateContextAttribsARB_func;
@@ -57,6 +59,8 @@ struct format_info {
PIXELFORMATDESCRIPTOR pfd;
int sampleBuffers, numSamples;
int transparency;
+ bool floatComponents;
+ bool srgb;
};
@@ -172,6 +176,10 @@ print_screen_info(HDC _hdc, const struct options *opts,
GLboolean coreProfile)
if (extension_supported("WGL_ARB_create_context", wglExtensions)) {
have_WGL_ARB_create_context = GL_TRUE;
}
+ if (extension_supported("WGL_ARB_framebuffer_sRGB", wglExtensions) ||
+ extension_supported("WGL_EXT_framebuffer_sRGB", wglExtensions)) {
+have_WGL_ARB_framebuffer_sRGB = GL_TRUE;
+ }
}
#endif
@@ -327,9 +335,11 @@ print_visual_attribs_verbose(int iPixelFormat, const
struct format_info *info)
visual_render_type_name(info->pfd.iPixelType),
info->pfd.dwFlags & PFD_DOUBLEBUFFER ? 1 : 0,
info->pfd.dwFlags & PFD_STEREO ? 1 : 0);
- printf("rgba: cRedBits=%d cGreenBits=%d cBlueBits=%d cAlphaBits=%d\n",
+ printf("rgba: cRedBits=%d cGreenBits=%d cBlueBits=%d cAlphaBits=%d
float=%c sRGB=%c\n",
info->pfd.cRedBits, info->pfd.cGreenBits,
- info->pfd.cBlueBits, info->pfd.cAlphaBits);
+ info->pfd.cBlueBits, info->pfd.cAlphaBits,
+ info->floatComponents ? 'Y' : 'N',
+ info->srgb ? 'Y' : 'N');
printf("cAuxBuffers=%d cDepthBits=%d cStencilBits=%d\n",
info->pfd.cAuxBuffers, info->pfd.cDepthBits, info->pfd.cStencilBits);
printf("accum: cRedBits=%d cGreenBits=%d cBlueBits=%d cAlphaBits=%d\n",
@@ -343,25 +353,22 @@ print_visual_attribs_verbose(int iPixelFormat, const
struct format_info *info)
printf("swapMethod = Copy\n");
else
printf("swapMethod = Undefined\n");
-
}
static void
print_visual_attribs_short_header(void)
{
- printf(" visual x bf lv rg d st colorbuffer ax dp st accumbuffer ms
cav\n");
- printf(" id gen win sp sz l ci b ro r g b a bf th cl r g b a ns b
eat\n");
-
printf("\n");
+ printf("visual x bf lv rg d st colorbuffer sr ax dp st
accumbuffer ms \n");
+ printf(" id gen win sp sz l ci b ro r g b a F gb bf th cl r g b
a ns b\n");
+
printf("-\n");
}
static void
print_visual_attribs_short(int iPixelFormat, const struct format_info *info)
{
- char *caveat = "None";
-
- printf("0x%02x %2d %2d %2d %3d %2d %c%c %c %c %2d %2d %2d %2d %2d %2d
%2d",
+ printf("0x%03x %2d %2d %2d %3d %2d %c%c %c %c %2d %2d %2d %2d %c %c %2d
%2d %2d",
iPixelFormat,
info->pfd.dwFlags & PFD_GENERIC_FORMAT ? 1 : 0,
info->pfd.dwFlags & PFD_DRAW_TO_WINDOW ? 1 : 0,
@@ -374,33 +381,33 @@ print_visual_attribs_short(int iPixelFormat, const struct
format_info *info)
info->pfd.dwFlags & PFD_STEREO ? 'y' : '.',
info->pfd.cRedBits, info->pfd.cGreenBits,
info->pfd.cBlueBits, info->pfd.cAlphaBits,
+ info->floatComponents ? 'f' : '.',
+ info->srgb ? 's' : '.',
info->pfd.cAuxBuffers,
info->pfd.cDepthBits,
info->pfd.cStencilBits
);
- printf(" %2d %2d %2d %2d %2d %1d %s\n",
+ printf(" %2d %2d %2d %2d %2d %1d\n",
info->pfd.cAccumRedBits, info->pfd.cAccumGreenBits,
info->pfd.cAccumBlueBits, info->pfd.cAccumAlphaBits,
- info->numSamples, info->sampleBuffers,
- caveat
- );
+ info->numSamples, info->sampleBuffers);
}
static void
print_visual_attribs_long_header(void)
{
- printf("Vis Vis Visual Trans buff lev render DB ste r g b a aux
dep
Re: [Mesa-dev] [PATCH 1/1] clover: Fix build since clang r301442
On Thu, 2017-04-27 at 09:37 -0700, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > Signed-off-by: Jan Vesely
> > ---
> > src/gallium/state_trackers/clover/llvm/compat.hpp | 2 ++
> > src/gallium/state_trackers/clover/llvm/invocation.cpp | 2 +-
> > 2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/gallium/state_trackers/clover/llvm/compat.hpp
> > b/src/gallium/state_trackers/clover/llvm/compat.hpp
> > index cee51b9..54ac579 100644
> > --- a/src/gallium/state_trackers/clover/llvm/compat.hpp
> > +++ b/src/gallium/state_trackers/clover/llvm/compat.hpp
> > @@ -70,8 +70,10 @@ namespace clover {
> >
> > #if HAVE_LLVM >= 0x0500
> > const auto lang_as_offset = 0;
> > + const clang::InputKind default_ik = clang::InputKind::OpenCL;
> > #else
> > const auto lang_as_offset = clang::LangAS::Offset;
> > + const clang::InputKind default_ik = clang::IK_OpenCL;
>
> "ik_opencl" seems like a better name for this, with that fixed:
>
> Reviewed-by: Francisco Jerez
thanks, fixed locally and pushed.
Jan
>
> > #endif
> >
> > inline void
> > diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp
> > b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> > index deebef5..c33580e 100644
> > --- a/src/gallium/state_trackers/clover/llvm/invocation.cpp
> > +++ b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> > @@ -126,7 +126,7 @@ namespace {
> >c->getDiagnosticOpts().ShowCarets = false;
> >
> >compat::set_lang_defaults(c->getInvocation(), c->getLangOpts(),
> > -clang::IK_OpenCL,
> > ::llvm::Triple(target.triple),
> > +compat::default_ik,
> > ::llvm::Triple(target.triple),
> > c->getPreprocessorOpts(),
> > clang::LangStandard::lang_opencl11);
> >
> > --
> > 2.9.3
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Re: [Mesa-dev] [PATCH 1/1] clover: Fix build since clang r301442
Jan Vesely writes:
> Signed-off-by: Jan Vesely
> ---
> src/gallium/state_trackers/clover/llvm/compat.hpp | 2 ++
> src/gallium/state_trackers/clover/llvm/invocation.cpp | 2 +-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/state_trackers/clover/llvm/compat.hpp
> b/src/gallium/state_trackers/clover/llvm/compat.hpp
> index cee51b9..54ac579 100644
> --- a/src/gallium/state_trackers/clover/llvm/compat.hpp
> +++ b/src/gallium/state_trackers/clover/llvm/compat.hpp
> @@ -70,8 +70,10 @@ namespace clover {
>
> #if HAVE_LLVM >= 0x0500
> const auto lang_as_offset = 0;
> + const clang::InputKind default_ik = clang::InputKind::OpenCL;
> #else
> const auto lang_as_offset = clang::LangAS::Offset;
> + const clang::InputKind default_ik = clang::IK_OpenCL;
"ik_opencl" seems like a better name for this, with that fixed:
Reviewed-by: Francisco Jerez
> #endif
>
> inline void
> diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp
> b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> index deebef5..c33580e 100644
> --- a/src/gallium/state_trackers/clover/llvm/invocation.cpp
> +++ b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> @@ -126,7 +126,7 @@ namespace {
>c->getDiagnosticOpts().ShowCarets = false;
>
>compat::set_lang_defaults(c->getInvocation(), c->getLangOpts(),
> -clang::IK_OpenCL,
> ::llvm::Triple(target.triple),
> +compat::default_ik,
> ::llvm::Triple(target.triple),
> c->getPreprocessorOpts(),
> clang::LangStandard::lang_opencl11);
>
> --
> 2.9.3
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[Mesa-dev] [PATCH 1/2] renderonly: close transfer prime_fd
prime_fd is only used to transfer the scanout buffer to the GPU inside
renderonly_create_kms_dumb_buffer_for_resource. It should be closed
immediately to avoid leaking the DMA-BUF file handle.
Signed-off-by: Philipp Zabel
---
src/gallium/auxiliary/renderonly/renderonly.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/auxiliary/renderonly/renderonly.c
b/src/gallium/auxiliary/renderonly/renderonly.c
index 7e23769159..e17c32886d 100644
--- a/src/gallium/auxiliary/renderonly/renderonly.c
+++ b/src/gallium/auxiliary/renderonly/renderonly.c
@@ -116,6 +116,8 @@ renderonly_create_kms_dumb_buffer_for_resource(struct
pipe_resource *rsc,
scanout->prime = screen->resource_from_handle(screen, rsc,
&handle, PIPE_HANDLE_USAGE_READ_WRITE);
+ close(prime_fd);
+
if (!scanout->prime) {
fprintf(stderr, "failed to create resource_from_handle: %s\n",
strerror(errno));
goto free_dumb;
--
2.11.0
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[Mesa-dev] [PATCH 2/2] renderonly: drop resources on destroy
The renderonly_scanout holds a reference on its prime pipe resource,
which should be released when it is destroyed. If it was created by
renderonly_create_kms_dumb_buffer_for_resource, the dumb BO also has
to be destroyed.
Signed-off-by: Philipp Zabel
---
src/gallium/auxiliary/renderonly/renderonly.c | 11 ++-
src/gallium/auxiliary/renderonly/renderonly.h | 3 ++-
src/gallium/drivers/etnaviv/etnaviv_resource.c | 2 +-
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/renderonly/renderonly.c
b/src/gallium/auxiliary/renderonly/renderonly.c
index e17c32886d..f377c368e5 100644
--- a/src/gallium/auxiliary/renderonly/renderonly.c
+++ b/src/gallium/auxiliary/renderonly/renderonly.c
@@ -34,6 +34,7 @@
#include "state_tracker/drm_driver.h"
#include "pipe/p_screen.h"
+#include "util/u_inlines.h"
#include "util/u_memory.h"
struct renderonly *
@@ -65,8 +66,16 @@ renderonly_scanout_for_prime(struct pipe_resource *rsc,
struct renderonly *ro)
}
void
-renderonly_scanout_destroy(struct renderonly_scanout *scanout)
+renderonly_scanout_destroy(struct renderonly_scanout *scanout,
+ struct renderonly *ro)
{
+ struct drm_mode_destroy_dumb destroy_dumb = { };
+
+ pipe_resource_reference(&scanout->prime, NULL);
+ if (ro->kms_fd != -1) {
+ destroy_dumb.handle = scanout->handle;
+ ioctl(ro->kms_fd, DRM_IOCTL_MODE_DESTROY_DUMB, &destroy_dumb);
+ }
FREE(scanout);
}
diff --git a/src/gallium/auxiliary/renderonly/renderonly.h
b/src/gallium/auxiliary/renderonly/renderonly.h
index 28989f202d..d543073298 100644
--- a/src/gallium/auxiliary/renderonly/renderonly.h
+++ b/src/gallium/auxiliary/renderonly/renderonly.h
@@ -77,7 +77,8 @@ struct renderonly_scanout *
renderonly_scanout_for_prime(struct pipe_resource *rsc, struct renderonly *ro);
void
-renderonly_scanout_destroy(struct renderonly_scanout *scanout);
+renderonly_scanout_destroy(struct renderonly_scanout *scanout,
+ struct renderonly *ro);
static inline boolean
renderonly_get_handle(struct renderonly_scanout *scanout,
diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.c
b/src/gallium/drivers/etnaviv/etnaviv_resource.c
index 2c5e9298e5..0e37345c0c 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.c
@@ -305,7 +305,7 @@ etna_resource_destroy(struct pipe_screen *pscreen, struct
pipe_resource *prsc)
etna_bo_del(rsc->ts_bo);
if (rsc->scanout)
- renderonly_scanout_destroy(rsc->scanout);
+ renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
list_delinit(&rsc->list);
--
2.11.0
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Re: [Mesa-dev] [PATCH 18/18] anv: Drop the instruction pool block size
Reviewed-by: Juan A. Suarez Romero On Wed, 2017-04-26 at 07:35 -0700, Jason Ekstrand wrote: > Now that we can allocate states larger than the block size, we no longer > need a block size of 1MB which can be rather wasteful. > --- > src/intel/vulkan/anv_device.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c > index a31c758..9e924c8 100644 > --- a/src/intel/vulkan/anv_device.c > +++ b/src/intel/vulkan/anv_device.c > @@ -1077,8 +1077,7 @@ VkResult anv_CreateDevice( > if (result != VK_SUCCESS) >goto fail_batch_bo_pool; > > - result = anv_state_pool_init(&device->instruction_state_pool, device, > -1024 * 1024); > + result = anv_state_pool_init(&device->instruction_state_pool, device, > 16384); > if (result != VK_SUCCESS) >goto fail_dynamic_state_pool; > ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
