[Mesa-dev] [PATCH] glapi: Fix DispatchSanity_test

[Kristian H. Kristensen]

---
 src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml | 2 +-
 src/mapi/glapi/gen/es_EXT.xml | 2 ++
 src/mapi/glapi/gen/gl_API.xml | 2 --
 src/mesa/main/tests/dispatch_sanity.cpp   | 3 +++
 4 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml 
b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
index 555b008bd33..d76ecd47d0e 100644
--- a/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
+++ b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
@@ -20,7 +20,7 @@
 
 -->
 
-
+
 
 
 
diff --git a/src/mapi/glapi/gen/es_EXT.xml b/src/mapi/glapi/gen/es_EXT.xml
index bbc4a1a1118..917fed62f98 100644
--- a/src/mapi/glapi/gen/es_EXT.xml
+++ b/src/mapi/glapi/gen/es_EXT.xml
@@ -810,6 +810,8 @@
 
 
 
+http://www.w3.org/2001/XInclude"/>
+
 
 
 
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index f1def8090de..f4d0808f13b 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8175,8 +8175,6 @@
 
 http://www.w3.org/2001/XInclude"/>
 
-http://www.w3.org/2001/XInclude"/>
-
 http://www.w3.org/2001/XInclude"/>
 
 
diff --git a/src/mesa/main/tests/dispatch_sanity.cpp 
b/src/mesa/main/tests/dispatch_sanity.cpp
index fb2acfbdeea..04dd89328f4 100644
--- a/src/mesa/main/tests/dispatch_sanity.cpp
+++ b/src/mesa/main/tests/dispatch_sanity.cpp
@@ -2236,6 +2236,9 @@ const struct function gles2_functions_possible[] = {
/* GL_NV_conservative_raster_pre_snap_triangles */
{ "glConservativeRasterParameteriNV", 20, -1 },
 
+   /* GL_EXT_multisampled_render_to_texture */
+   { "glFramebufferTexture2DMultisampleEXT", 20, -1 },
+
{ NULL, 0, -1 }
 };
 
-- 
2.20.0.rc2.403.gdbc3b29805-goog

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[Mesa-dev] [PATCH] gallium: Android build fixes

[Kristian H. Kristensen]

A couple of simple fixes for building on Android with autotools.
---
 src/gallium/auxiliary/util/u_debug_stack_android.cpp | 2 +-
 src/gallium/drivers/freedreno/Makefile.am| 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/util/u_debug_stack_android.cpp 
b/src/gallium/auxiliary/util/u_debug_stack_android.cpp
index 395a1fe911..879b0fb2e9 100644
--- a/src/gallium/auxiliary/util/u_debug_stack_android.cpp
+++ b/src/gallium/auxiliary/util/u_debug_stack_android.cpp
@@ -23,7 +23,7 @@
 
 #include 
 
-#include "u_debug.h"
+#include "util/u_debug.h"
 #include "u_debug_stack.h"
 #include "util/hash_table.h"
 #include "os/os_thread.h"
diff --git a/src/gallium/drivers/freedreno/Makefile.am 
b/src/gallium/drivers/freedreno/Makefile.am
index 32130ab94c..504ad290de 100644
--- a/src/gallium/drivers/freedreno/Makefile.am
+++ b/src/gallium/drivers/freedreno/Makefile.am
@@ -7,6 +7,7 @@ AM_CFLAGS = \
-I$(top_srcdir)/src/freedreno \
-I$(top_builddir)/src/compiler/nir \
-I$(top_srcdir)/src/compiler/nir \
+   $(LIBDRM_CFLAGS) \
$(GALLIUM_DRIVER_CFLAGS)
 
 noinst_LTLIBRARIES = libfreedreno.la
-- 
2.19.2

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[Mesa-dev] [PATCH v3 0/5] EXT_multisampled_render_to_texture and MSAA for a6xx

[Kristian H. Kristensen]

Here's v3 of the series. I've updated to account for most of the comments, 
except
I went back and forth and then ultimately back again on Roladnd suggestion.
It may be more intuitive to always have surf->nr_samples be the number of 
samples
but that means we'll have to go update all state trackers to set it in the 
template
and modify all drivers to copy it in the constructor.  At the same time, having
surf->nr_samples be 0 if it wasn't attached with 
FramebufferTexture2DMultisampleEXT
also seems like perfectly fine semantics, and doesn't require updating state 
trackers
or drivers that don't care or support this feature.

Kristian



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[Mesa-dev] [PATCH v3 1/5] mesa: Add core support for EXT_multisampled_render_to_texture{, 2}

[Kristian H. Kristensen]

This also turns on EXT_multisampled_render_to_texture which is a
subset of EXT_multisampled_render_to_texture2, allowing only
COLOR_ATTACHMENT0.

Signed-off-by: Kristian H. Kristensen 
---
 .../EXT_multisampled_render_to_texture.xml| 34 +++
 src/mapi/glapi/gen/Makefile.am|  1 +
 src/mapi/glapi/gen/gl_API.xml |  2 +
 src/mapi/glapi/gen/meson.build|  1 +
 src/mesa/drivers/common/meta.c|  2 +-
 src/mesa/main/extensions_table.h  |  2 +
 src/mesa/main/fbobject.c  | 57 ++-
 src/mesa/main/fbobject.h  |  8 ++-
 src/mesa/main/glheader.h  |  3 +
 src/mesa/main/mtypes.h|  2 +
 10 files changed, 96 insertions(+), 16 deletions(-)
 create mode 100644 src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml

diff --git a/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml 
b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
new file mode 100644
index 000..555b008bd33
--- /dev/null
+++ b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
@@ -0,0 +1,34 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/mapi/glapi/gen/Makefile.am b/src/mapi/glapi/gen/Makefile.am
index 6e0ee1e1687..40538b0ff2e 100644
--- a/src/mapi/glapi/gen/Makefile.am
+++ b/src/mapi/glapi/gen/Makefile.am
@@ -200,6 +200,7 @@ API_XML = \
EXT_external_objects_fd.xml \
EXT_framebuffer_object.xml \
EXT_gpu_shader4.xml \
+   EXT_multisampled_render_to_texture.xml \
EXT_packed_depth_stencil.xml \
EXT_provoking_vertex.xml \
EXT_separate_shader_objects.xml \
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index f4d0808f13b..f1def8090de 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8175,6 +8175,8 @@
 
 http://www.w3.org/2001/XInclude"/>
 
+http://www.w3.org/2001/XInclude"/>
+
 http://www.w3.org/2001/XInclude"/>
 
 
diff --git a/src/mapi/glapi/gen/meson.build b/src/mapi/glapi/gen/meson.build
index f494e9707b6..8cc163b2989 100644
--- a/src/mapi/glapi/gen/meson.build
+++ b/src/mapi/glapi/gen/meson.build
@@ -107,6 +107,7 @@ api_xml_files = files(
   'EXT_external_objects_fd.xml',
   'EXT_framebuffer_object.xml',
   'EXT_gpu_shader4.xml',
+  'EXT_multisampled_render_to_texture.xml',
   'EXT_packed_depth_stencil.xml',
   'EXT_provoking_vertex.xml',
   'EXT_separate_shader_objects.xml',
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 4392c4bbd88..3515e312023 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -127,7 +127,7 @@ _mesa_meta_framebuffer_texture_image(struct gl_context *ctx,
assert(att);
 
_mesa_framebuffer_texture(ctx, fb, attachment, att, texObj, texTarget,
- level, layer, false);
+ level, att->NumSamples, layer, false);
 }
 
 static struct gl_shader *
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index dd846d7bc5c..306f6a78c17 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -241,6 +241,8 @@ EXT(EXT_map_buffer_range, 
ARB_map_buffer_range
 EXT(EXT_memory_object   , EXT_memory_object
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_memory_object_fd, EXT_memory_object_fd 
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_multi_draw_arrays   , dummy_true   
  , GLL,  x , ES1, ES2, 1999)
+EXT(EXT_multisampled_render_to_texture  , 
EXT_multisampled_render_to_texture ,  x ,  x ,  x , ES2, 2016)
+EXT(EXT_multisampled_render_to_texture2 , 
EXT_multisampled_render_to_texture ,  x ,  x ,  x , ES2, 2016)
 EXT(EXT_occlusion_query_boolean , ARB_occlusion_query2 
  ,  x ,  x ,  x , ES2, 2011)
 EXT(EXT_packed_depth_stencil, dummy_true   
  , GLL, GLC,  x ,  x , 2005)
 EXT(EXT_packed_float, EXT_packed_float 
  , GLL, GLC,  x ,  x , 2004)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 68e0daf3423..23e49396199 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -497,8 +497,8 @@ set_texture_attachment(struct gl_context *ctx,
struct gl_framebuffer *fb,
struct gl_renderbuffer_attachment *att,
struct gl_texture_object *texObj,
-   GLenum texTarget, GLuint level, GLuint layer,
-   GLboolean layered)
+   GLenum texTarget, GLuint level, GLsizei samples,
+   GLuint layer, GLboolean layered)
 {
struc

[Mesa-dev] [PATCH v3 3/5] st/mesa: Add support for EXT_multisampled_render_to_texture

[Kristian H. Kristensen]

In gallium, we model the attachment sample count as a new nr_samples
field in pipe_surface. A driver can indicate support for the extension
using the new pipe cap, PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE.

Signed-off-by: Kristian H. Kristensen 
---
 src/mesa/state_tracker/st_cb_fbo.c | 3 +++
 src/mesa/state_tracker/st_cb_fbo.h | 1 +
 src/mesa/state_tracker/st_extensions.c | 1 +
 3 files changed, 5 insertions(+)

diff --git a/src/mesa/state_tracker/st_cb_fbo.c 
b/src/mesa/state_tracker/st_cb_fbo.c
index 0e535257cb4..8901a8680ef 100644
--- a/src/mesa/state_tracker/st_cb_fbo.c
+++ b/src/mesa/state_tracker/st_cb_fbo.c
@@ -516,6 +516,7 @@ st_update_renderbuffer_surface(struct st_context *st,
surf->texture != resource ||
surf->width != rtt_width ||
surf->height != rtt_height ||
+   surf->nr_samples != strb->rtt_nr_samples ||
surf->u.tex.level != level ||
surf->u.tex.first_layer != first_layer ||
surf->u.tex.last_layer != last_layer) {
@@ -523,6 +524,7 @@ st_update_renderbuffer_surface(struct st_context *st,
   struct pipe_surface surf_tmpl;
   memset(_tmpl, 0, sizeof(surf_tmpl));
   surf_tmpl.format = format;
+  surf_tmpl.nr_samples = strb->rtt_nr_samples;
   surf_tmpl.u.tex.level = level;
   surf_tmpl.u.tex.first_layer = first_layer;
   surf_tmpl.u.tex.last_layer = last_layer;
@@ -572,6 +574,7 @@ st_render_texture(struct gl_context *ctx,
strb->rtt_face = att->CubeMapFace;
strb->rtt_slice = att->Zoffset;
strb->rtt_layered = att->Layered;
+   strb->rtt_nr_samples = att->NumSamples;
pipe_resource_reference(>texture, pt);
 
st_update_renderbuffer_surface(st, strb);
diff --git a/src/mesa/state_tracker/st_cb_fbo.h 
b/src/mesa/state_tracker/st_cb_fbo.h
index 345c11442c6..046f01713ce 100644
--- a/src/mesa/state_tracker/st_cb_fbo.h
+++ b/src/mesa/state_tracker/st_cb_fbo.h
@@ -69,6 +69,7 @@ struct st_renderbuffer
boolean is_rtt; /**< whether Driver.RenderTexture was called */
unsigned rtt_face, rtt_slice;
boolean rtt_layered; /**< whether glFramebufferTexture was called */
+   unsigned rtt_nr_samples; /**< from FramebufferTexture2DMultisampleEXT */
 };
 
 
diff --git a/src/mesa/state_tracker/st_extensions.c 
b/src/mesa/state_tracker/st_extensions.c
index 16889074f66..3cb1a646f38 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -740,6 +740,7 @@ void st_init_extensions(struct pipe_screen *screen,
   { o(EXT_draw_buffers2),PIPE_CAP_INDEP_BLEND_ENABLE   
},
   { o(EXT_memory_object),PIPE_CAP_MEMOBJ   
},
   { o(EXT_memory_object_fd), PIPE_CAP_MEMOBJ   
},
+  { o(EXT_multisampled_render_to_texture), PIPE_CAP_SURFACE_SAMPLE_COUNT   
},
   { o(EXT_semaphore),PIPE_CAP_FENCE_SIGNAL 
},
   { o(EXT_semaphore_fd), PIPE_CAP_FENCE_SIGNAL 
},
   { o(EXT_texture_array),PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS 
},
-- 
2.18.1

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[Mesa-dev] [PATCH v3 4/5] freedreno/a6xx: MSAA

[Kristian H. Kristensen]

From: Rob Clark 

Signed-off-by: Rob Clark 
---
 .../drivers/freedreno/a6xx/fd6_blend.c|  2 +
 .../drivers/freedreno/a6xx/fd6_context.c  |  2 +
 src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 12 --
 src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 41 +++
 .../drivers/freedreno/a6xx/fd6_rasterizer.c   |  4 +-
 .../drivers/freedreno/a6xx/fd6_screen.c   | 24 +--
 .../drivers/freedreno/a6xx/fd6_texture.c  |  1 +
 .../drivers/freedreno/adreno_common.xml.h |  1 +
 .../drivers/freedreno/freedreno_resource.c|  9 
 .../drivers/freedreno/freedreno_util.h|  2 +
 10 files changed, 74 insertions(+), 24 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
index 185b061cd1e..f888e162cf9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
@@ -138,8 +138,10 @@ fd6_blend_state_create(struct pipe_context *pctx,
}
 
so->rb_blend_cntl = A6XX_RB_BLEND_CNTL_ENABLE_BLEND(mrt_blend) |
+   COND(cso->alpha_to_coverage, 
A6XX_RB_BLEND_CNTL_ALPHA_TO_COVERAGE) |
COND(cso->independent_blend_enable, 
A6XX_RB_BLEND_CNTL_INDEPENDENT_BLEND);
so->sp_blend_cntl = A6XX_SP_BLEND_CNTL_UNK8 |
+   COND(cso->alpha_to_coverage, 
A6XX_SP_BLEND_CNTL_ALPHA_TO_COVERAGE) |
COND(mrt_blend, A6XX_SP_BLEND_CNTL_ENABLED);
 
return so;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
index 3282b7d86cf..35fd03c3d99 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
@@ -104,6 +104,8 @@ fd6_context_create(struct pipe_screen *pscreen, void *priv, 
unsigned flags)
if (!pctx)
return NULL;
 
+   util_blitter_set_texture_multisample(fd6_ctx->base.blitter, true);
+
/* fd_context_init overwrites delete_rasterizer_state, so set this
 * here. */
pctx->delete_rasterizer_state = fd6_rasterizer_state_delete;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 70b93340e77..c4d43c22f99 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -879,14 +879,18 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct 
fd6_emit *emit)
OUT_RING(ring, blend_control);
}
 
-   OUT_PKT4(ring, REG_A6XX_RB_BLEND_CNTL, 1);
-   OUT_RING(ring, blend->rb_blend_cntl |
-   A6XX_RB_BLEND_CNTL_SAMPLE_MASK(0x));
-
OUT_PKT4(ring, REG_A6XX_SP_BLEND_CNTL, 1);
OUT_RING(ring, blend->sp_blend_cntl);
}
 
+   if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_SAMPLE_MASK)) {
+   struct fd6_blend_stateobj *blend = 
fd6_blend_stateobj(ctx->blend);
+
+   OUT_PKT4(ring, REG_A6XX_RB_BLEND_CNTL, 1);
+   OUT_RING(ring, blend->rb_blend_cntl |
+   
A6XX_RB_BLEND_CNTL_SAMPLE_MASK(ctx->sample_mask));
+   }
+
if (dirty & FD_DIRTY_BLEND_COLOR) {
struct pipe_blend_color *bcolor = >blend_color;
 
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 94ad6641718..8cda7d6ddae 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -89,7 +89,7 @@ emit_mrt(struct fd_ringbuffer *ring, struct 
pipe_framebuffer_state *pfb,
offset = fd_resource_offset(rsc, psurf->u.tex.level,

psurf->u.tex.first_layer);
 
-   stride = slice->pitch * rsc->cpp;
+   stride = slice->pitch * rsc->cpp * pfb->samples;
 
debug_assert(psurf->u.tex.first_layer == 
psurf->u.tex.last_layer);
debug_assert((offset + slice->size0) <= fd_bo_size(rsc->bo));
@@ -414,23 +414,27 @@ emit_binning_pass(struct fd_batch *batch)
 }
 
 static void
-disable_msaa(struct fd_ringbuffer *ring)
+emit_msaa(struct fd_ringbuffer *ring, unsigned nr)
 {
-   // TODO MSAA
+   enum a3xx_msaa_samples samples = fd_msaa_samples(nr);
+
OUT_PKT4(ring, REG_A6XX_SP_TP_RAS_MSAA_CNTL, 2);
-   OUT_RING(ring, A6XX_SP_TP_RAS_MSAA_CNTL_SAMPLES(MSAA_ONE));
-   OUT_RING(ring, A6XX_SP_TP_DEST_MSAA_CNTL_SAMPLES(MSAA_ONE) |
-A6XX_SP_TP_DEST_MSAA_CNTL_MSAA_DISABLE);
+   OUT_RING(ring, A6XX_SP_TP_RAS_MSAA_CNTL_SAMPLES(samples));
+   OUT_RING(ring, A6XX_SP_TP_DEST_MSAA_CNTL_SAMPLES(samples) |
+COND(samples == MSAA_ONE, 
A6XX_SP_TP_DEST_MSAA_CNTL_MSAA_DISABLE));
 
OUT_PKT4(ring, REG_A6XX_GRAS_RAS_MSAA_CNTL, 2);
-   OUT_RING(ring, 

[Mesa-dev] [PATCH v3 5/5] freedreno: Add support for EXT_multisampled_render_to_texture

[Kristian H. Kristensen]

There is not much to do in freedreno - tile layout and multisample
state for gmem renderings is programmed based on the pfb sample count,
while resolve blits take the destination sample count from the resource.

Signed-off-by: Kristian H. Kristensen 
---
 src/gallium/drivers/freedreno/freedreno_batch_cache.c | 4 +++-
 src/gallium/drivers/freedreno/freedreno_screen.c  | 3 +++
 src/gallium/drivers/freedreno/freedreno_surface.c | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/freedreno_batch_cache.c 
b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
index 408d48ccdb6..45cd9c172d3 100644
--- a/src/gallium/drivers/freedreno/freedreno_batch_cache.c
+++ b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
@@ -81,7 +81,8 @@ struct key {
struct {
struct pipe_resource *texture;
union pipe_surface_desc u;
-   uint16_t pos, format;
+   uint8_t pos, samples;
+   uint16_t format;
} surf[0];
 };
 
@@ -401,6 +402,7 @@ key_surf(struct key *key, unsigned idx, unsigned pos, 
struct pipe_surface *psurf
key->surf[idx].texture = psurf->texture;
key->surf[idx].u = psurf->u;
key->surf[idx].pos = pos;
+   key->surf[idx].samples = psurf->nr_samples;
key->surf[idx].format = psurf->format;
 }
 
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
b/src/gallium/drivers/freedreno/freedreno_screen.c
index ab83487aef8..03b358782c1 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -225,6 +225,9 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_TEXTURE_MULTISAMPLE:
return is_a5xx(screen) || is_a6xx(screen);
 
+   case PIPE_CAP_SURFACE_SAMPLE_COUNT:
+   return is_a6xx(screen);
+
case PIPE_CAP_DEPTH_CLIP_DISABLE:
return is_a3xx(screen) || is_a4xx(screen);
 
diff --git a/src/gallium/drivers/freedreno/freedreno_surface.c 
b/src/gallium/drivers/freedreno/freedreno_surface.c
index 6f415f69993..24da54798b6 100644
--- a/src/gallium/drivers/freedreno/freedreno_surface.c
+++ b/src/gallium/drivers/freedreno/freedreno_surface.c
@@ -53,6 +53,7 @@ fd_create_surface(struct pipe_context *pctx,
psurf->format = surf_tmpl->format;
psurf->width = u_minify(ptex->width0, level);
psurf->height = u_minify(ptex->height0, level);
+   psurf->nr_samples = surf_tmpl->nr_samples;
 
if (ptex->target == PIPE_BUFFER) {
psurf->u.buf.first_element = surf_tmpl->u.buf.first_element;
-- 
2.18.1

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[Mesa-dev] [PATCH v3 2/5] gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNT

[Kristian H. Kristensen]

This new pipe cap and the new nr_samples field in pipe_surface lets a
state tracker bind a render target with a different sample count than
the resource. This allows for implementing
EXT_multisampled_render_to_texture and
EXT_multisampled_render_to_texture2.

Signed-off-by: Kristian H. Kristensen 
---
 src/gallium/auxiliary/util/u_framebuffer.c | 10 --
 src/gallium/docs/source/screen.rst |  3 +++
 src/gallium/include/pipe/p_defines.h   |  1 +
 src/gallium/include/pipe/p_state.h |  6 ++
 4 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_framebuffer.c 
b/src/gallium/auxiliary/util/u_framebuffer.c
index 5bafddc726f..f569511393b 100644
--- a/src/gallium/auxiliary/util/u_framebuffer.c
+++ b/src/gallium/auxiliary/util/u_framebuffer.c
@@ -229,13 +229,19 @@ util_framebuffer_get_num_samples(const struct 
pipe_framebuffer_state *fb)
if (!(fb->nr_cbufs || fb->zsbuf))
   return MAX2(fb->samples, 1);
 
+   /**
+* If a driver doesn't advertise PIPE_CAP_SURFACE_SAMPLE_COUNT,
+* pipe_surface::nr_samples will always be 0.
+*/
for (i = 0; i < fb->nr_cbufs; i++) {
   if (fb->cbufs[i]) {
- return MAX2(1, fb->cbufs[i]->texture->nr_samples);
+ return MAX3(1, fb->cbufs[i]->texture->nr_samples,
+ fb->cbufs[i]->nr_samples);
   }
}
if (fb->zsbuf) {
-  return MAX2(1, fb->zsbuf->texture->nr_samples);
+  return MAX3(1, fb->zsbuf->texture->nr_samples,
+  fb->zsbuf->nr_samples);
}
 
return 1;
diff --git a/src/gallium/docs/source/screen.rst 
b/src/gallium/docs/source/screen.rst
index 0abd164494c..cf2ce33b87f 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -477,6 +477,9 @@ subpixel precision bias in bits during conservative 
rasterization.
   0 means no limit.
 * ``PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET``: The maximum supported value for
   of pipe_vertex_element::src_offset.
+* ``PIPE_CAP_SURFACEA_SAMPLE_COUNT_TEXTURE``: Whether the driver
+  supports pipe_surface overrides of resource nr_samples. If set, will
+  enable EXT_multisampled_render_to_texture.
 
 .. _pipe_capf:
 
diff --git a/src/gallium/include/pipe/p_defines.h 
b/src/gallium/include/pipe/p_defines.h
index e99895d30d8..6d96f1ccb5b 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -832,6 +832,7 @@ enum pipe_cap
PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET,
PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET,
+   PIPE_CAP_SURFACE_SAMPLE_COUNT,
 };
 
 /**
diff --git a/src/gallium/include/pipe/p_state.h 
b/src/gallium/include/pipe/p_state.h
index fd670345aad..89cffb15bd8 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -443,6 +443,12 @@ struct pipe_surface
uint16_t width;   /**< logical width in pixels */
uint16_t height;  /**< logical height in pixels */
 
+   /** Number of samples for the surface.  This can be different from the
+* resource nr_samples when the resource is bound using
+* FramebufferTexture2DMultisampleEXT.
+*/
+   unsigned nr_samples:8;
+
union pipe_surface_desc u;
 };
 
-- 
2.18.1

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[Mesa-dev] [PATCH v2 3/5] st/mesa: Add support for EXT_multisampled_render_to_texture

[Kristian H. Kristensen]

In gallium, we model the attachment sample count as a new nr_samples
field in pipe_surface. A driver can indicate support for the extension
using the new pipe cap, PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE.

Signed-off-by: Kristian H. Kristensen 
---
 src/mesa/state_tracker/st_cb_fbo.c | 3 +++
 src/mesa/state_tracker/st_cb_fbo.h | 1 +
 src/mesa/state_tracker/st_extensions.c | 1 +
 3 files changed, 5 insertions(+)

diff --git a/src/mesa/state_tracker/st_cb_fbo.c 
b/src/mesa/state_tracker/st_cb_fbo.c
index 0e535257cb4..8901a8680ef 100644
--- a/src/mesa/state_tracker/st_cb_fbo.c
+++ b/src/mesa/state_tracker/st_cb_fbo.c
@@ -516,6 +516,7 @@ st_update_renderbuffer_surface(struct st_context *st,
surf->texture != resource ||
surf->width != rtt_width ||
surf->height != rtt_height ||
+   surf->nr_samples != strb->rtt_nr_samples ||
surf->u.tex.level != level ||
surf->u.tex.first_layer != first_layer ||
surf->u.tex.last_layer != last_layer) {
@@ -523,6 +524,7 @@ st_update_renderbuffer_surface(struct st_context *st,
   struct pipe_surface surf_tmpl;
   memset(_tmpl, 0, sizeof(surf_tmpl));
   surf_tmpl.format = format;
+  surf_tmpl.nr_samples = strb->rtt_nr_samples;
   surf_tmpl.u.tex.level = level;
   surf_tmpl.u.tex.first_layer = first_layer;
   surf_tmpl.u.tex.last_layer = last_layer;
@@ -572,6 +574,7 @@ st_render_texture(struct gl_context *ctx,
strb->rtt_face = att->CubeMapFace;
strb->rtt_slice = att->Zoffset;
strb->rtt_layered = att->Layered;
+   strb->rtt_nr_samples = att->NumSamples;
pipe_resource_reference(>texture, pt);
 
st_update_renderbuffer_surface(st, strb);
diff --git a/src/mesa/state_tracker/st_cb_fbo.h 
b/src/mesa/state_tracker/st_cb_fbo.h
index 345c11442c6..046f01713ce 100644
--- a/src/mesa/state_tracker/st_cb_fbo.h
+++ b/src/mesa/state_tracker/st_cb_fbo.h
@@ -69,6 +69,7 @@ struct st_renderbuffer
boolean is_rtt; /**< whether Driver.RenderTexture was called */
unsigned rtt_face, rtt_slice;
boolean rtt_layered; /**< whether glFramebufferTexture was called */
+   unsigned rtt_nr_samples; /**< from FramebufferTexture2DMultisampleEXT */
 };
 
 
diff --git a/src/mesa/state_tracker/st_extensions.c 
b/src/mesa/state_tracker/st_extensions.c
index 16889074f66..9a1594212dd 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -740,6 +740,7 @@ void st_init_extensions(struct pipe_screen *screen,
   { o(EXT_draw_buffers2),PIPE_CAP_INDEP_BLEND_ENABLE   
},
   { o(EXT_memory_object),PIPE_CAP_MEMOBJ   
},
   { o(EXT_memory_object_fd), PIPE_CAP_MEMOBJ   
},
+  { o(EXT_multisampled_render_to_texture), 
PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE },
   { o(EXT_semaphore),PIPE_CAP_FENCE_SIGNAL 
},
   { o(EXT_semaphore_fd), PIPE_CAP_FENCE_SIGNAL 
},
   { o(EXT_texture_array),PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS 
},
-- 
2.19.1.930.g4563a0d9d0-goog

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[Mesa-dev] [PATCH 0/4] EXT_multisampled_render_to_texture and MSAA for a6xx

[Kristian H. Kristensen]

Here's a small patch series that adds support for
EXT_multisampled_render_to_texture to core mesa and gallium, turns on
MSAA for freedreno/a6xx and then enables the new extension for
a6xx.

v2:

 - Split gallium and st commit
 - Document PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE
 - Move sample count calculation to util_framebuffer_get_num_samples
 - Add EXT_multisampled_render_to_texture2


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[Mesa-dev] [PATCH v2 2/5] gallium: Add new PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE

[Kristian H. Kristensen]

This new pipe cap and the new nr_samples field in pipe_surface lets a
state tracker bind a render target with a different sample count than
the resource. This allows for implementing
EXT_multisampled_render_to_texture and
EXT_multisampled_render_to_texture2.

Signed-off-by: Kristian H. Kristensen 
---
 src/gallium/auxiliary/util/u_framebuffer.c | 10 --
 src/gallium/docs/source/screen.rst |  3 +++
 src/gallium/include/pipe/p_defines.h   |  1 +
 src/gallium/include/pipe/p_state.h |  6 ++
 4 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_framebuffer.c 
b/src/gallium/auxiliary/util/u_framebuffer.c
index 5bafddc726f..127623a7677 100644
--- a/src/gallium/auxiliary/util/u_framebuffer.c
+++ b/src/gallium/auxiliary/util/u_framebuffer.c
@@ -229,13 +229,19 @@ util_framebuffer_get_num_samples(const struct 
pipe_framebuffer_state *fb)
if (!(fb->nr_cbufs || fb->zsbuf))
   return MAX2(fb->samples, 1);
 
+   /**
+* If a driver doesn't advertise PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE,
+* pipe_surface::nr_samples will always be 0.
+*/
for (i = 0; i < fb->nr_cbufs; i++) {
   if (fb->cbufs[i]) {
- return MAX2(1, fb->cbufs[i]->texture->nr_samples);
+ return MAX3(1, fb->cbufs[i]->texture->nr_samples,
+ fb->cbufs[i]->nr_samples);
   }
}
if (fb->zsbuf) {
-  return MAX2(1, fb->zsbuf->texture->nr_samples);
+  return MAX3(1, fb->zsbuf->texture->nr_samples,
+  fb->zsbuf->nr_samples);
}
 
return 1;
diff --git a/src/gallium/docs/source/screen.rst 
b/src/gallium/docs/source/screen.rst
index 0abd164494c..2a062a7027c 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -477,6 +477,9 @@ subpixel precision bias in bits during conservative 
rasterization.
   0 means no limit.
 * ``PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET``: The maximum supported value for
   of pipe_vertex_element::src_offset.
+* ``PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE``: Whether the driver
+  supports pipe_surface overrides of resource nr_samples. If set, will
+  enable EXT_multisampled_render_to_texture.
 
 .. _pipe_capf:
 
diff --git a/src/gallium/include/pipe/p_defines.h 
b/src/gallium/include/pipe/p_defines.h
index dacedf5b936..0ecfaf3ba5e 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -823,6 +823,7 @@ enum pipe_cap
PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET,
PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET,
+   PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE,
 };
 
 /**
diff --git a/src/gallium/include/pipe/p_state.h 
b/src/gallium/include/pipe/p_state.h
index fd670345aad..89cffb15bd8 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -443,6 +443,12 @@ struct pipe_surface
uint16_t width;   /**< logical width in pixels */
uint16_t height;  /**< logical height in pixels */
 
+   /** Number of samples for the surface.  This can be different from the
+* resource nr_samples when the resource is bound using
+* FramebufferTexture2DMultisampleEXT.
+*/
+   unsigned nr_samples:8;
+
union pipe_surface_desc u;
 };
 
-- 
2.19.1.930.g4563a0d9d0-goog

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[Mesa-dev] [PATCH v2 5/5] freedreno: Add support for EXT_multisampled_render_to_texture

[Kristian H. Kristensen]

There is not much to do in freedreno - tile layout and multisample
state for gmem renderings is programmed based on the pfb sample count,
while resolve blits take the destination sample count from the resource.

Signed-off-by: Kristian H. Kristensen 
---
 src/gallium/drivers/freedreno/freedreno_batch_cache.c | 4 +++-
 src/gallium/drivers/freedreno/freedreno_screen.c  | 3 +++
 src/gallium/drivers/freedreno/freedreno_surface.c | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/freedreno_batch_cache.c 
b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
index 408d48ccdb6..45cd9c172d3 100644
--- a/src/gallium/drivers/freedreno/freedreno_batch_cache.c
+++ b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
@@ -81,7 +81,8 @@ struct key {
struct {
struct pipe_resource *texture;
union pipe_surface_desc u;
-   uint16_t pos, format;
+   uint8_t pos, samples;
+   uint16_t format;
} surf[0];
 };
 
@@ -401,6 +402,7 @@ key_surf(struct key *key, unsigned idx, unsigned pos, 
struct pipe_surface *psurf
key->surf[idx].texture = psurf->texture;
key->surf[idx].u = psurf->u;
key->surf[idx].pos = pos;
+   key->surf[idx].samples = psurf->nr_samples;
key->surf[idx].format = psurf->format;
 }
 
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
b/src/gallium/drivers/freedreno/freedreno_screen.c
index 88d91a91234..3fe59992a26 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -237,6 +237,9 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_TEXTURE_MULTISAMPLE:
return is_a5xx(screen) || is_a6xx(screen);
 
+   case PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE:
+   return is_a6xx(screen);
+
case PIPE_CAP_DEPTH_CLIP_DISABLE:
return is_a3xx(screen) || is_a4xx(screen);
 
diff --git a/src/gallium/drivers/freedreno/freedreno_surface.c 
b/src/gallium/drivers/freedreno/freedreno_surface.c
index 6f415f69993..24da54798b6 100644
--- a/src/gallium/drivers/freedreno/freedreno_surface.c
+++ b/src/gallium/drivers/freedreno/freedreno_surface.c
@@ -53,6 +53,7 @@ fd_create_surface(struct pipe_context *pctx,
psurf->format = surf_tmpl->format;
psurf->width = u_minify(ptex->width0, level);
psurf->height = u_minify(ptex->height0, level);
+   psurf->nr_samples = surf_tmpl->nr_samples;
 
if (ptex->target == PIPE_BUFFER) {
psurf->u.buf.first_element = surf_tmpl->u.buf.first_element;
-- 
2.19.1.930.g4563a0d9d0-goog

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[Mesa-dev] [PATCH v2 1/5] mesa: Add core support for EXT_multisampled_render_to_texture2

[Kristian H. Kristensen]

This also turns on EXT_multisampled_render_to_texture which is a
subset of EXT_multisampled_render_to_texture2, allowing only
COLOR_ATTACHMENT0.

Signed-off-by: Kristian H. Kristensen 
---
 .../EXT_multisampled_render_to_texture.xml| 34 ++
 src/mapi/glapi/gen/Makefile.am|  1 +
 src/mapi/glapi/gen/gl_API.xml |  2 +
 src/mapi/glapi/gen/meson.build|  1 +
 src/mesa/drivers/common/meta.c|  2 +-
 src/mesa/main/extensions_table.h  |  2 +
 src/mesa/main/fbobject.c  | 45 +--
 src/mesa/main/fbobject.h  |  8 +++-
 src/mesa/main/mtypes.h|  2 +
 9 files changed, 81 insertions(+), 16 deletions(-)
 create mode 100644 src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml

diff --git a/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml 
b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
new file mode 100644
index 000..cf44e6976f0
--- /dev/null
+++ b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
@@ -0,0 +1,34 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/mapi/glapi/gen/Makefile.am b/src/mapi/glapi/gen/Makefile.am
index 6e0ee1e1687..40538b0ff2e 100644
--- a/src/mapi/glapi/gen/Makefile.am
+++ b/src/mapi/glapi/gen/Makefile.am
@@ -200,6 +200,7 @@ API_XML = \
EXT_external_objects_fd.xml \
EXT_framebuffer_object.xml \
EXT_gpu_shader4.xml \
+   EXT_multisampled_render_to_texture.xml \
EXT_packed_depth_stencil.xml \
EXT_provoking_vertex.xml \
EXT_separate_shader_objects.xml \
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index aae9a5835db..ee4d13f1f06 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8166,6 +8166,8 @@
 
 http://www.w3.org/2001/XInclude"/>
 
+http://www.w3.org/2001/XInclude"/>
+
 http://www.w3.org/2001/XInclude"/>
 
 
diff --git a/src/mapi/glapi/gen/meson.build b/src/mapi/glapi/gen/meson.build
index f494e9707b6..8cc163b2989 100644
--- a/src/mapi/glapi/gen/meson.build
+++ b/src/mapi/glapi/gen/meson.build
@@ -107,6 +107,7 @@ api_xml_files = files(
   'EXT_external_objects_fd.xml',
   'EXT_framebuffer_object.xml',
   'EXT_gpu_shader4.xml',
+  'EXT_multisampled_render_to_texture.xml',
   'EXT_packed_depth_stencil.xml',
   'EXT_provoking_vertex.xml',
   'EXT_separate_shader_objects.xml',
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 4392c4bbd88..3515e312023 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -127,7 +127,7 @@ _mesa_meta_framebuffer_texture_image(struct gl_context *ctx,
assert(att);
 
_mesa_framebuffer_texture(ctx, fb, attachment, att, texObj, texTarget,
- level, layer, false);
+ level, att->NumSamples, layer, false);
 }
 
 static struct gl_shader *
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index a516a1b17f8..f13b8b6a21a 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -241,6 +241,8 @@ EXT(EXT_map_buffer_range, 
ARB_map_buffer_range
 EXT(EXT_memory_object   , EXT_memory_object
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_memory_object_fd, EXT_memory_object_fd 
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_multi_draw_arrays   , dummy_true   
  , GLL,  x , ES1, ES2, 1999)
+EXT(EXT_multisampled_render_to_texture  , 
EXT_multisampled_render_to_texture ,  x ,  x ,  x , ES2, 2016)
+EXT(EXT_multisampled_render_to_texture2 , 
EXT_multisampled_render_to_texture ,  x ,  x ,  x , ES2, 2016)
 EXT(EXT_occlusion_query_boolean , ARB_occlusion_query  
  ,  x ,  x ,  x , ES2, 2001)
 EXT(EXT_packed_depth_stencil, dummy_true   
  , GLL, GLC,  x ,  x , 2005)
 EXT(EXT_packed_float, EXT_packed_float 
  , GLL, GLC,  x ,  x , 2004)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index c3dded6b928..d270dbb1648 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -497,8 +497,8 @@ set_texture_attachment(struct gl_context *ctx,
struct gl_framebuffer *fb,
struct gl_renderbuffer_attachment *att,
struct gl_texture_object *texObj,
-   GLenum texTarget, GLuint level, GLuint layer,
-   GLboolean layered)
+   GLenum texTarget, GLuint level, GLsizei samples,
+   GLuint layer, GLboolean layered)
 {
struct gl_renderbuffer *rb = att->Re

[Mesa-dev] [PATCH v2 4/5] freedreno/a6xx: MSAA

[Kristian H. Kristensen]

From: Rob Clark 

Signed-off-by: Rob Clark 
---
 .../drivers/freedreno/a6xx/fd6_blend.c|  2 +
 .../drivers/freedreno/a6xx/fd6_context.c  |  2 +
 src/gallium/drivers/freedreno/a6xx/fd6_draw.c |  3 ++
 src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 12 --
 src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 37 +++
 .../drivers/freedreno/a6xx/fd6_rasterizer.c   |  4 +-
 .../drivers/freedreno/a6xx/fd6_screen.c   | 21 +--
 .../drivers/freedreno/a6xx/fd6_texture.c  |  1 +
 .../drivers/freedreno/adreno_common.xml.h |  1 +
 .../drivers/freedreno/freedreno_resource.c|  9 +
 .../drivers/freedreno/freedreno_util.h|  2 +
 11 files changed, 70 insertions(+), 24 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
index 185b061cd1e..f888e162cf9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
@@ -138,8 +138,10 @@ fd6_blend_state_create(struct pipe_context *pctx,
}
 
so->rb_blend_cntl = A6XX_RB_BLEND_CNTL_ENABLE_BLEND(mrt_blend) |
+   COND(cso->alpha_to_coverage, 
A6XX_RB_BLEND_CNTL_ALPHA_TO_COVERAGE) |
COND(cso->independent_blend_enable, 
A6XX_RB_BLEND_CNTL_INDEPENDENT_BLEND);
so->sp_blend_cntl = A6XX_SP_BLEND_CNTL_UNK8 |
+   COND(cso->alpha_to_coverage, 
A6XX_SP_BLEND_CNTL_ALPHA_TO_COVERAGE) |
COND(mrt_blend, A6XX_SP_BLEND_CNTL_ENABLED);
 
return so;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
index 3282b7d86cf..35fd03c3d99 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
@@ -104,6 +104,8 @@ fd6_context_create(struct pipe_screen *pscreen, void *priv, 
unsigned flags)
if (!pctx)
return NULL;
 
+   util_blitter_set_texture_multisample(fd6_ctx->base.blitter, true);
+
/* fd_context_init overwrites delete_rasterizer_state, so set this
 * here. */
pctx->delete_rasterizer_state = fd6_rasterizer_state_delete;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index d921a33f5f4..2ac916f03b9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -378,6 +378,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
struct pipe_framebuffer_state *pfb = >batch->framebuffer;
struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
struct fd_ringbuffer *ring = ctx->batch->draw;
+   enum a3xx_msaa_samples samples = fd_msaa_samples(pfb->samples);
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_SCISSOR_TL, 2);
OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_TL_X(scissor->minx) |
@@ -436,6 +437,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 1);
OUT_RING(ring, 
A6XX_RB_BLIT_DST_INFO_TILE_MODE(TILE6_LINEAR) |
+   A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |

A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(fd6_pipe2color(pfmt)));
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
@@ -485,6 +487,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 1);
OUT_RING(ring, A6XX_RB_BLIT_DST_INFO_TILE_MODE(TILE6_LINEAR) |
+   A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |

A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(fd6_pipe2color(pfmt)));
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 16b0def6a40..deb31b7d360 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -871,14 +871,18 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct 
fd6_emit *emit)
OUT_RING(ring, blend_control);
}
 
-   OUT_PKT4(ring, REG_A6XX_RB_BLEND_CNTL, 1);
-   OUT_RING(ring, blend->rb_blend_cntl |
-   A6XX_RB_BLEND_CNTL_SAMPLE_MASK(0x));
-
OUT_PKT4(ring, REG_A6XX_SP_BLEND_CNTL, 1);
OUT_RING(ring, blend->sp_blend_cntl);
}
 
+   if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_SAMPLE_MASK)) {
+   struct fd6_blend_stateobj *blend = 
fd6_blend_stateobj(ctx->blend);
+
+   OUT_PKT4(ring, REG_A6XX_RB_BLEND_CNTL, 1);
+   OUT_RING(ring, blend->rb_blend_cntl |
+   
A6XX_RB_BLEND_CNTL_SAMPLE_MASK(ctx->sample_mask));
+   }
+
if (dirty & FD_DIRTY_BLEND_COLOR) {
struct pipe_blend_color *bcolor = >blend_color;
 
diff 

[Mesa-dev] [PATCH 1/4] mesa: Add core support for EXT_multisampled_render_to_texture

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen 
---
 .../EXT_multisampled_render_to_texture.xml| 34 ++
 src/mapi/glapi/gen/Makefile.am|  1 +
 src/mapi/glapi/gen/gl_API.xml |  2 +
 src/mapi/glapi/gen/meson.build|  1 +
 src/mesa/drivers/common/meta.c|  2 +-
 src/mesa/main/extensions_table.h  |  1 +
 src/mesa/main/fbobject.c  | 45 +--
 src/mesa/main/fbobject.h  |  8 +++-
 src/mesa/main/mtypes.h|  2 +
 9 files changed, 80 insertions(+), 16 deletions(-)
 create mode 100644 src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml

diff --git a/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml 
b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
new file mode 100644
index 000..cf44e6976f0
--- /dev/null
+++ b/src/mapi/glapi/gen/EXT_multisampled_render_to_texture.xml
@@ -0,0 +1,34 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/mapi/glapi/gen/Makefile.am b/src/mapi/glapi/gen/Makefile.am
index 6e0ee1e1687..40538b0ff2e 100644
--- a/src/mapi/glapi/gen/Makefile.am
+++ b/src/mapi/glapi/gen/Makefile.am
@@ -200,6 +200,7 @@ API_XML = \
EXT_external_objects_fd.xml \
EXT_framebuffer_object.xml \
EXT_gpu_shader4.xml \
+   EXT_multisampled_render_to_texture.xml \
EXT_packed_depth_stencil.xml \
EXT_provoking_vertex.xml \
EXT_separate_shader_objects.xml \
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index aae9a5835db..ee4d13f1f06 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8166,6 +8166,8 @@
 
 http://www.w3.org/2001/XInclude"/>
 
+http://www.w3.org/2001/XInclude"/>
+
 http://www.w3.org/2001/XInclude"/>
 
 
diff --git a/src/mapi/glapi/gen/meson.build b/src/mapi/glapi/gen/meson.build
index f494e9707b6..8cc163b2989 100644
--- a/src/mapi/glapi/gen/meson.build
+++ b/src/mapi/glapi/gen/meson.build
@@ -107,6 +107,7 @@ api_xml_files = files(
   'EXT_external_objects_fd.xml',
   'EXT_framebuffer_object.xml',
   'EXT_gpu_shader4.xml',
+  'EXT_multisampled_render_to_texture.xml',
   'EXT_packed_depth_stencil.xml',
   'EXT_provoking_vertex.xml',
   'EXT_separate_shader_objects.xml',
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 4392c4bbd88..3515e312023 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -127,7 +127,7 @@ _mesa_meta_framebuffer_texture_image(struct gl_context *ctx,
assert(att);
 
_mesa_framebuffer_texture(ctx, fb, attachment, att, texObj, texTarget,
- level, layer, false);
+ level, att->NumSamples, layer, false);
 }
 
 static struct gl_shader *
diff --git a/src/mesa/main/extensions_table.h b/src/mesa/main/extensions_table.h
index a516a1b17f8..e6e3de3d1ed 100644
--- a/src/mesa/main/extensions_table.h
+++ b/src/mesa/main/extensions_table.h
@@ -241,6 +241,7 @@ EXT(EXT_map_buffer_range, 
ARB_map_buffer_range
 EXT(EXT_memory_object   , EXT_memory_object
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_memory_object_fd, EXT_memory_object_fd 
  , GLL, GLC,  x , ES2, 2017)
 EXT(EXT_multi_draw_arrays   , dummy_true   
  , GLL,  x , ES1, ES2, 1999)
+EXT(EXT_multisampled_render_to_texture  , 
EXT_multisampled_render_to_texture ,  x ,  x ,  x , ES2, 2016)
 EXT(EXT_occlusion_query_boolean , ARB_occlusion_query  
  ,  x ,  x ,  x , ES2, 2001)
 EXT(EXT_packed_depth_stencil, dummy_true   
  , GLL, GLC,  x ,  x , 2005)
 EXT(EXT_packed_float, EXT_packed_float 
  , GLL, GLC,  x ,  x , 2004)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index c3dded6b928..d270dbb1648 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -497,8 +497,8 @@ set_texture_attachment(struct gl_context *ctx,
struct gl_framebuffer *fb,
struct gl_renderbuffer_attachment *att,
struct gl_texture_object *texObj,
-   GLenum texTarget, GLuint level, GLuint layer,
-   GLboolean layered)
+   GLenum texTarget, GLuint level, GLsizei samples,
+   GLuint layer, GLboolean layered)
 {
struct gl_renderbuffer *rb = att->Renderbuffer;
 
@@ -520,6 +520,7 @@ set_texture_attachment(struct gl_context *ctx,
 
/* always update these fields */
att->TextureLevel = level;
+   att->NumSamples = samples;
att->CubeMapFace = _mesa_tex_target_to_face(texTarget);
att->Zoffset = lay

[Mesa-dev] [PATCH 3/4] freedreno/a6xx: MSAA

[Kristian H. Kristensen]

From: Rob Clark 

Signed-off-by: Rob Clark 
---
 .../drivers/freedreno/a6xx/fd6_blend.c|  2 +
 .../drivers/freedreno/a6xx/fd6_context.c  |  2 +
 src/gallium/drivers/freedreno/a6xx/fd6_draw.c |  3 ++
 src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 12 --
 src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 37 +++
 .../drivers/freedreno/a6xx/fd6_rasterizer.c   |  4 +-
 .../drivers/freedreno/a6xx/fd6_screen.c   | 21 +--
 .../drivers/freedreno/a6xx/fd6_texture.c  |  1 +
 .../drivers/freedreno/adreno_common.xml.h |  1 +
 .../drivers/freedreno/freedreno_resource.c|  9 +
 .../drivers/freedreno/freedreno_util.h|  2 +
 11 files changed, 70 insertions(+), 24 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
index 185b061cd1e..f888e162cf9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blend.c
@@ -138,8 +138,10 @@ fd6_blend_state_create(struct pipe_context *pctx,
}
 
so->rb_blend_cntl = A6XX_RB_BLEND_CNTL_ENABLE_BLEND(mrt_blend) |
+   COND(cso->alpha_to_coverage, 
A6XX_RB_BLEND_CNTL_ALPHA_TO_COVERAGE) |
COND(cso->independent_blend_enable, 
A6XX_RB_BLEND_CNTL_INDEPENDENT_BLEND);
so->sp_blend_cntl = A6XX_SP_BLEND_CNTL_UNK8 |
+   COND(cso->alpha_to_coverage, 
A6XX_SP_BLEND_CNTL_ALPHA_TO_COVERAGE) |
COND(mrt_blend, A6XX_SP_BLEND_CNTL_ENABLED);
 
return so;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
index 3282b7d86cf..35fd03c3d99 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
@@ -104,6 +104,8 @@ fd6_context_create(struct pipe_screen *pscreen, void *priv, 
unsigned flags)
if (!pctx)
return NULL;
 
+   util_blitter_set_texture_multisample(fd6_ctx->base.blitter, true);
+
/* fd_context_init overwrites delete_rasterizer_state, so set this
 * here. */
pctx->delete_rasterizer_state = fd6_rasterizer_state_delete;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index d921a33f5f4..2ac916f03b9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -378,6 +378,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
struct pipe_framebuffer_state *pfb = >batch->framebuffer;
struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx);
struct fd_ringbuffer *ring = ctx->batch->draw;
+   enum a3xx_msaa_samples samples = fd_msaa_samples(pfb->samples);
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_SCISSOR_TL, 2);
OUT_RING(ring, A6XX_RB_BLIT_SCISSOR_TL_X(scissor->minx) |
@@ -436,6 +437,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 1);
OUT_RING(ring, 
A6XX_RB_BLIT_DST_INFO_TILE_MODE(TILE6_LINEAR) |
+   A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |

A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(fd6_pipe2color(pfmt)));
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
@@ -485,6 +487,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 1);
OUT_RING(ring, A6XX_RB_BLIT_DST_INFO_TILE_MODE(TILE6_LINEAR) |
+   A6XX_RB_BLIT_DST_INFO_SAMPLES(samples) |

A6XX_RB_BLIT_DST_INFO_COLOR_FORMAT(fd6_pipe2color(pfmt)));
 
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 16b0def6a40..deb31b7d360 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -871,14 +871,18 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct 
fd6_emit *emit)
OUT_RING(ring, blend_control);
}
 
-   OUT_PKT4(ring, REG_A6XX_RB_BLEND_CNTL, 1);
-   OUT_RING(ring, blend->rb_blend_cntl |
-   A6XX_RB_BLEND_CNTL_SAMPLE_MASK(0x));
-
OUT_PKT4(ring, REG_A6XX_SP_BLEND_CNTL, 1);
OUT_RING(ring, blend->sp_blend_cntl);
}
 
+   if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_SAMPLE_MASK)) {
+   struct fd6_blend_stateobj *blend = 
fd6_blend_stateobj(ctx->blend);
+
+   OUT_PKT4(ring, REG_A6XX_RB_BLEND_CNTL, 1);
+   OUT_RING(ring, blend->rb_blend_cntl |
+   
A6XX_RB_BLEND_CNTL_SAMPLE_MASK(ctx->sample_mask));
+   }
+
if (dirty & FD_DIRTY_BLEND_COLOR) {
struct pipe_blend_color *bcolor = >blend_color;
 
diff 

[Mesa-dev] [PATCH 4/4] freedreno: Add support for EXT_multisampled_render_to_texture

[Kristian H. Kristensen]

There is not much to do in freedreno - tile layout and multisample
state for gmem renderings is programmed based on the pfb sample count,
while resolve blits take the destination sample count from the resource.

Signed-off-by: Kristian H. Kristensen 
---
 src/gallium/drivers/freedreno/freedreno_batch_cache.c | 4 +++-
 src/gallium/drivers/freedreno/freedreno_screen.c  | 3 +++
 src/gallium/drivers/freedreno/freedreno_state.c   | 5 +
 src/gallium/drivers/freedreno/freedreno_surface.c | 1 +
 4 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/freedreno_batch_cache.c 
b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
index 408d48ccdb6..45cd9c172d3 100644
--- a/src/gallium/drivers/freedreno/freedreno_batch_cache.c
+++ b/src/gallium/drivers/freedreno/freedreno_batch_cache.c
@@ -81,7 +81,8 @@ struct key {
struct {
struct pipe_resource *texture;
union pipe_surface_desc u;
-   uint16_t pos, format;
+   uint8_t pos, samples;
+   uint16_t format;
} surf[0];
 };
 
@@ -401,6 +402,7 @@ key_surf(struct key *key, unsigned idx, unsigned pos, 
struct pipe_surface *psurf
key->surf[idx].texture = psurf->texture;
key->surf[idx].u = psurf->u;
key->surf[idx].pos = pos;
+   key->surf[idx].samples = psurf->nr_samples;
key->surf[idx].format = psurf->format;
 }
 
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
b/src/gallium/drivers/freedreno/freedreno_screen.c
index 88d91a91234..3fe59992a26 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -237,6 +237,9 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_TEXTURE_MULTISAMPLE:
return is_a5xx(screen) || is_a6xx(screen);
 
+   case PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE:
+   return is_a6xx(screen);
+
case PIPE_CAP_DEPTH_CLIP_DISABLE:
return is_a3xx(screen) || is_a4xx(screen);
 
diff --git a/src/gallium/drivers/freedreno/freedreno_state.c 
b/src/gallium/drivers/freedreno/freedreno_state.c
index 76b54a56044..0da634ea519 100644
--- a/src/gallium/drivers/freedreno/freedreno_state.c
+++ b/src/gallium/drivers/freedreno/freedreno_state.c
@@ -221,6 +221,11 @@ fd_set_framebuffer_state(struct pipe_context *pctx,
util_copy_framebuffer_state(cso, framebuffer);
 
cso->samples = util_framebuffer_get_num_samples(cso);
+   for (unsigned i = 0; i < cso->nr_cbufs; i++) {
+   if (cso->cbufs[i]->nr_samples > 0)
+   cso->samples = cso->cbufs[i]->nr_samples;
+   }
+
 
if (ctx->screen->reorder) {
struct fd_batch *old_batch = NULL;
diff --git a/src/gallium/drivers/freedreno/freedreno_surface.c 
b/src/gallium/drivers/freedreno/freedreno_surface.c
index 6f415f69993..24da54798b6 100644
--- a/src/gallium/drivers/freedreno/freedreno_surface.c
+++ b/src/gallium/drivers/freedreno/freedreno_surface.c
@@ -53,6 +53,7 @@ fd_create_surface(struct pipe_context *pctx,
psurf->format = surf_tmpl->format;
psurf->width = u_minify(ptex->width0, level);
psurf->height = u_minify(ptex->height0, level);
+   psurf->nr_samples = surf_tmpl->nr_samples;
 
if (ptex->target == PIPE_BUFFER) {
psurf->u.buf.first_element = surf_tmpl->u.buf.first_element;
-- 
2.19.1.930.g4563a0d9d0-goog

___
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mesa-dev@lists.freedesktop.org
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[Mesa-dev] [PATCH 2/4] st/mesa: Add support for EXT_multisampled_render_to_texture

[Kristian H. Kristensen]

In gallium, we model the attachment sample count as a new nr_samples
field in pipe_surface. A driver can indicate support for the extension
using the new pipe cap, PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE.

Signed-off-by: Kristian H. Kristensen 
---
 src/gallium/include/pipe/p_defines.h   | 1 +
 src/gallium/include/pipe/p_state.h | 6 ++
 src/mesa/state_tracker/st_cb_fbo.c | 3 +++
 src/mesa/state_tracker/st_cb_fbo.h | 1 +
 src/mesa/state_tracker/st_extensions.c | 1 +
 5 files changed, 12 insertions(+)

diff --git a/src/gallium/include/pipe/p_defines.h 
b/src/gallium/include/pipe/p_defines.h
index dacedf5b936..0ecfaf3ba5e 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -823,6 +823,7 @@ enum pipe_cap
PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS,
PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET,
PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET,
+   PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE,
 };
 
 /**
diff --git a/src/gallium/include/pipe/p_state.h 
b/src/gallium/include/pipe/p_state.h
index fd670345aad..89cffb15bd8 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -443,6 +443,12 @@ struct pipe_surface
uint16_t width;   /**< logical width in pixels */
uint16_t height;  /**< logical height in pixels */
 
+   /** Number of samples for the surface.  This can be different from the
+* resource nr_samples when the resource is bound using
+* FramebufferTexture2DMultisampleEXT.
+*/
+   unsigned nr_samples:8;
+
union pipe_surface_desc u;
 };
 
diff --git a/src/mesa/state_tracker/st_cb_fbo.c 
b/src/mesa/state_tracker/st_cb_fbo.c
index 0e535257cb4..8901a8680ef 100644
--- a/src/mesa/state_tracker/st_cb_fbo.c
+++ b/src/mesa/state_tracker/st_cb_fbo.c
@@ -516,6 +516,7 @@ st_update_renderbuffer_surface(struct st_context *st,
surf->texture != resource ||
surf->width != rtt_width ||
surf->height != rtt_height ||
+   surf->nr_samples != strb->rtt_nr_samples ||
surf->u.tex.level != level ||
surf->u.tex.first_layer != first_layer ||
surf->u.tex.last_layer != last_layer) {
@@ -523,6 +524,7 @@ st_update_renderbuffer_surface(struct st_context *st,
   struct pipe_surface surf_tmpl;
   memset(_tmpl, 0, sizeof(surf_tmpl));
   surf_tmpl.format = format;
+  surf_tmpl.nr_samples = strb->rtt_nr_samples;
   surf_tmpl.u.tex.level = level;
   surf_tmpl.u.tex.first_layer = first_layer;
   surf_tmpl.u.tex.last_layer = last_layer;
@@ -572,6 +574,7 @@ st_render_texture(struct gl_context *ctx,
strb->rtt_face = att->CubeMapFace;
strb->rtt_slice = att->Zoffset;
strb->rtt_layered = att->Layered;
+   strb->rtt_nr_samples = att->NumSamples;
pipe_resource_reference(>texture, pt);
 
st_update_renderbuffer_surface(st, strb);
diff --git a/src/mesa/state_tracker/st_cb_fbo.h 
b/src/mesa/state_tracker/st_cb_fbo.h
index 345c11442c6..046f01713ce 100644
--- a/src/mesa/state_tracker/st_cb_fbo.h
+++ b/src/mesa/state_tracker/st_cb_fbo.h
@@ -69,6 +69,7 @@ struct st_renderbuffer
boolean is_rtt; /**< whether Driver.RenderTexture was called */
unsigned rtt_face, rtt_slice;
boolean rtt_layered; /**< whether glFramebufferTexture was called */
+   unsigned rtt_nr_samples; /**< from FramebufferTexture2DMultisampleEXT */
 };
 
 
diff --git a/src/mesa/state_tracker/st_extensions.c 
b/src/mesa/state_tracker/st_extensions.c
index 16889074f66..9a1594212dd 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -740,6 +740,7 @@ void st_init_extensions(struct pipe_screen *screen,
   { o(EXT_draw_buffers2),PIPE_CAP_INDEP_BLEND_ENABLE   
},
   { o(EXT_memory_object),PIPE_CAP_MEMOBJ   
},
   { o(EXT_memory_object_fd), PIPE_CAP_MEMOBJ   
},
+  { o(EXT_multisampled_render_to_texture), 
PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE },
   { o(EXT_semaphore),PIPE_CAP_FENCE_SIGNAL 
},
   { o(EXT_semaphore_fd), PIPE_CAP_FENCE_SIGNAL 
},
   { o(EXT_texture_array),PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS 
},
-- 
2.19.1.930.g4563a0d9d0-goog

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[Mesa-dev] [PATCH 0/4] EXT_multisampled_render_to_texture and MSAA for a6xx

[Kristian H. Kristensen]

Here's a small patch series that adds support for
EXT_multisampled_render_to_texture to core mesa and gallium, turns on
MSAA for freedreno/a6xx and then enables the new extension for
a6xx.

Kristian

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[Mesa-dev] [PATCH] egl/android: Declare droid_load_driver() static

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen 
---
 src/egl/drivers/dri2/platform_android.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index ecc0245c9a..00e62b067f 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1362,7 +1362,7 @@ static const __DRIextension 
*droid_image_loader_extensions[] = {
NULL,
 };
 
-EGLBoolean
+static EGLBoolean
 droid_load_driver(_EGLDisplay *disp)
 {
struct dri2_egl_display *dri2_dpy = disp->DriverData;
-- 
2.19.0.rc2.392.g5ba43deb5a-goog

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[Mesa-dev] [PATCH 1/3] freedreno: Fix warnings

[Kristian H. Kristensen]

From: "Kristian H. Kristensen" 

Signed-off-by: Kristian H. Kristensen 
---
 src/gallium/drivers/freedreno/a5xx/fd5_compute.c   | 2 +-
 src/gallium/drivers/freedreno/freedreno_resource.c | 8 
 src/gallium/drivers/freedreno/ir3/ir3.h| 8 ++--
 src/gallium/drivers/freedreno/ir3/ir3_cmdline.c| 2 +-
 src/gallium/drivers/freedreno/ir3/ir3_shader.h | 4 +---
 5 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_compute.c 
b/src/gallium/drivers/freedreno/a5xx/fd5_compute.c
index 8e2c228e90..66ed7a4af5 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_compute.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_compute.c
@@ -181,7 +181,7 @@ static void
 fd5_launch_grid(struct fd_context *ctx, const struct pipe_grid_info *info)
 {
struct fd5_compute_stateobj *so = ctx->compute;
-   struct ir3_shader_key key = {0};
+   struct ir3_shader_key key = {};
struct ir3_shader_variant *v;
struct fd_ringbuffer *ring = ctx->batch->draw;
unsigned i, nglobal = 0;
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c 
b/src/gallium/drivers/freedreno/freedreno_resource.c
index 3fbf50003e..f882cf5a8b 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -211,7 +211,7 @@ fd_try_shadow_resource(struct fd_context *ctx, struct 
fd_resource *rsc,
 
mtx_unlock(>screen->lock);
 
-   struct pipe_blit_info blit = {0};
+   struct pipe_blit_info blit = {};
blit.dst.resource = prsc;
blit.dst.format   = prsc->format;
blit.src.resource = pshadow;
@@ -305,7 +305,7 @@ static void
 fd_blit_from_staging(struct fd_context *ctx, struct fd_transfer *trans)
 {
struct pipe_resource *dst = trans->base.resource;
-   struct pipe_blit_info blit = {0};
+   struct pipe_blit_info blit = {};
 
blit.dst.resource = dst;
blit.dst.format   = dst->format;
@@ -325,7 +325,7 @@ static void
 fd_blit_to_staging(struct fd_context *ctx, struct fd_transfer *trans)
 {
struct pipe_resource *src = trans->base.resource;
-   struct pipe_blit_info blit = {0};
+   struct pipe_blit_info blit = {};
 
blit.src.resource = src;
blit.src.format   = src->format;
@@ -372,7 +372,7 @@ flush_resource(struct fd_context *ctx, struct fd_resource 
*rsc, unsigned usage)
fd_batch_reference(_batch, rsc->write_batch);
 
if (usage & PIPE_TRANSFER_WRITE) {
-   struct fd_batch *batch, *batches[32] = {0};
+   struct fd_batch *batch, *batches[32] = {};
uint32_t batch_mask;
 
/* This is a bit awkward, probably a fd_batch_flush_locked()
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h 
b/src/gallium/drivers/freedreno/ir3/ir3.h
index 8bac91660b..63215cefc9 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3.h
@@ -445,14 +445,12 @@ struct ir3 {
 #endif
 };
 
-typedef struct nir_register nir_register;
-
 struct ir3_array {
struct list_head node;
unsigned length;
unsigned id;
 
-   nir_register *r;
+   struct nir_register *r;
 
/* To avoid array write's from getting DCE'd, keep track of the
 * most recent write.  Any array access depends on the most
@@ -470,13 +468,11 @@ struct ir3_array {
 
 struct ir3_array * ir3_lookup_array(struct ir3 *ir, unsigned id);
 
-typedef struct nir_block nir_block;
-
 struct ir3_block {
struct list_head node;
struct ir3 *shader;
 
-   const nir_block *nblock;
+   const struct nir_block *nblock;
 
struct list_head instr_list;  /* list of ir3_instruction */
 
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c 
b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
index 23d5006352..b41c32d375 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c
@@ -379,7 +379,7 @@ int main(int argc, char **argv)
 
while (n < argc) {
char *filename = argv[n];
-   char *ext = rindex(filename, '.');
+   char *ext = strrchr(filename, '.');
 
if (strcmp(ext, ".tgsi") == 0) {
if (num_files != 0)
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h 
b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
index 507e89c473..288e9fa4e7 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h
@@ -345,8 +345,6 @@ struct ir3_shader_variant {
struct ir3_shader *shader;
 };
 
-typedef struct nir_shader nir_shader;
-
 struct ir3_shader {
enum shader_t type;
 
@@ -359,7 +357,7 @@ struct ir3_shader {
 
struct ir3_compiler *compiler;
 
-   nir_shader *nir;
+   struct nir_shader *nir;
struct pipe_stream_output_info 

[Mesa-dev] [PATCH kmscube] Init and clean up VT settings

[Kristian H. Kristensen]

This puts VT input into raw (unbuffered) mode so that we can detect
single key strokes. Also uses KD_GRAPHICS mode so that fbcon gets
restored properly on exit and inhibits VT switching since we don't
properly get/set drm master. Finally, handle signals and clean up if
we catch one.
---
 common.c | 88 +++-
 common.h |  6 +
 configure.ac |  3 +++
 drm-atomic.c |  2 +-
 drm-legacy.c |  2 +-
 kmscube.c|  3 +++
 6 files changed, 101 insertions(+), 3 deletions(-)

diff --git a/common.c b/common.c
index b76c994..c495187 100644
--- a/common.c
+++ b/common.c
@@ -24,10 +24,20 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
+#include 
 #include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
 
 #include "common.h"
 
@@ -288,3 +298,79 @@ int link_program(unsigned program)
 
return 0;
 }
+
+static struct termios save_tio;
+
+static void restore_vt(void)
+{
+   struct vt_mode mode = { .mode = VT_AUTO };
+   ioctl(STDIN_FILENO, VT_SETMODE, );
+
+   tcsetattr(STDIN_FILENO, TCSANOW, _tio);
+   ioctl(STDIN_FILENO, KDSETMODE, KD_TEXT);
+}
+
+static void handle_signal(int sig)
+{
+   restore_vt();
+
+   raise(sig);
+}
+
+int init_vt(void)
+{
+   struct termios tio;
+   struct stat buf;
+   int ret;
+
+   /* If we're not on a VT, we're probably logged in as root over
+* ssh. Skip all this then. */
+   ret = fstat(STDIN_FILENO, );
+   if (ret == -1 || major(buf.st_rdev) != TTY_MAJOR)
+   return 0;
+
+   /* First, save term io setting so we can restore properly. */
+   tcgetattr(STDIN_FILENO, _tio);
+
+   /* We don't drop drm master, so block VT switching while we're
+* running. Otherwise, switching to X on another VT will crash X when it
+* fails to get drm master. */
+   struct vt_mode mode = { .mode = VT_PROCESS, .relsig = 0, .acqsig = 0 };
+   ret = ioctl(STDIN_FILENO, VT_SETMODE, );
+   if (ret == -1) {
+   printf("failed to take control of vt handling\n");
+   return -1;
+   }
+
+   /* Set KD_GRAPHICS to disable fbcon while we render. */
+   ret = ioctl(STDIN_FILENO, KDSETMODE, KD_GRAPHICS);
+   if (ret == -1) {
+   printf("failed to switch console to graphics mode\n");
+   return -1;
+   }
+
+   atexit(restore_vt);
+
+   /* Set console input to raw mode. */
+   tio = save_tio;
+   tio.c_lflag &= ~(ICANON | ECHO);
+   tcsetattr(STDIN_FILENO, TCSANOW, );
+
+   /* Restore console on SIGINT and friends. */
+   struct sigaction act = {
+   .sa_handler = handle_signal,
+   .sa_flags = SA_RESETHAND
+   };
+   sigaction(SIGINT, , NULL);
+   sigaction(SIGSEGV, , NULL);
+   sigaction(SIGABRT, , NULL);
+
+   return 0;
+}
+
+bool key_pressed(void)
+{
+   struct pollfd pfd[1] = { { .fd = 0, .events = POLLIN } };
+
+   return poll(pfd, 1, 0) == 1;
+}
diff --git a/common.h b/common.h
index 11ec26e..e6a3c93 100644
--- a/common.h
+++ b/common.h
@@ -24,6 +24,8 @@
 #ifndef _COMMON_H
 #define _COMMON_H
 
+#include 
+
 #include 
 #include 
 #include 
@@ -130,4 +132,8 @@ init_cube_video(const struct gbm *gbm, const char *video)
 }
 #endif
 
+int init_vt(void);
+bool key_pressed(void);
+
+
 #endif /* _COMMON_H */
diff --git a/configure.ac b/configure.ac
index 8397f7b..3ee11ed 100644
--- a/configure.ac
+++ b/configure.ac
@@ -31,6 +31,9 @@ AM_INIT_AUTOMAKE([foreign dist-bzip2])
 
 AC_PROG_CC
 
+# For sigaction
+AC_USE_SYSTEM_EXTENSIONS
+
 # Enable quiet compiles on automake 1.11.
 m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])])
 
diff --git a/drm-atomic.c b/drm-atomic.c
index 82531d3..4c0b16e 100644
--- a/drm-atomic.c
+++ b/drm-atomic.c
@@ -191,7 +191,7 @@ static int atomic_run(const struct gbm *gbm, const struct 
egl *egl)
/* Allow a modeset change for the first commit only. */
flags |= DRM_MODE_ATOMIC_ALLOW_MODESET;
 
-   while (1) {
+   while (!key_pressed()) {
struct gbm_bo *next_bo;
EGLSyncKHR gpu_fence = NULL;   /* out-fence from gpu, in-fence 
to kms */
EGLSyncKHR kms_fence = NULL;   /* in-fence to gpu, out-fence 
from kms */
diff --git a/drm-legacy.c b/drm-legacy.c
index a0b419a..d3a9391 100644
--- a/drm-legacy.c
+++ b/drm-legacy.c
@@ -73,7 +73,7 @@ static int legacy_run(const struct gbm *gbm, const struct egl 
*egl)
return ret;
}
 
-   while (1) {
+   while (!key_pressed()) {
struct gbm_bo *next_bo;
int waiting_for_flip = 1;
 
diff --git a/kmscube.c b/kmscube.c
index 3a2c4dd..4615430 100644
--- a/kmscube.c
+++ b/kmscube.c
@@ -153,5 +153,8 @@ int main(int argc, char *argv[])
glClearColor(0.5, 0.5, 0.5, 1.0);
glClear(GL_COLOR_BUFFER_BIT);
 
+   if (init_vt())
+   

[Mesa-dev] [PATCH] intel/genxml: Add helpers for determining field type

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen_pack_header.py | 23 +--
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/src/intel/genxml/gen_pack_header.py 
b/src/intel/genxml/gen_pack_header.py
index 405f600174..1a5d193d22 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -247,6 +247,17 @@ class Field(object):
 self.type = 'sfixed'
 self.fractional_size = int(sfixed_match.group(2))
 
+def is_builtin_type(self):
+builtins =  [ 'address', 'bool', 'float', 'ufixed',
+  'offset', 'sfixed', 'offset', 'int', 'uint', 'mbo' ]
+return self.type in builtins
+
+def is_struct_type(self):
+return self.type in self.parser.structs
+
+def is_enum_type(self):
+return self.type in self.parser.enums
+
 def emit_template_struct(self, dim):
 if self.type == 'address':
 type = '__gen_address_type'
@@ -266,9 +277,9 @@ class Field(object):
 type = 'int32_t'
 elif self.type == 'uint':
 type = 'uint32_t'
-elif self.type in self.parser.structs:
+elif self.is_struct_type():
 type = 'struct ' + self.parser.gen_prefix(safe_name(self.type))
-elif self.type in self.parser.enums:
+elif self.is_enum_type():
 type = 'enum ' + self.parser.gen_prefix(safe_name(self.type))
 elif self.type == 'mbo':
 return
@@ -387,7 +398,7 @@ class Group(object):
 if len(dw.fields) == 1:
 field = dw.fields[0]
 name = field.name + field.dim
-if field.type in self.parser.structs and field.start % 32 == 0:
+if field.is_struct_type() and field.start % 32 == 0:
 print("")
 print("   %s_pack(data, [%d], >%s);" %
   (self.parser.gen_prefix(safe_name(field.type)), 
index, name))
@@ -397,7 +408,7 @@ class Group(object):
 # to the dword for those fields.
 field_index = 0
 for field in dw.fields:
-if type(field) is Field and field.type in self.parser.structs:
+if type(field) is Field and field.is_struct_type():
 name = field.name + field.dim
 print("")
 print("   uint32_t v%d_%d;" % (index, field_index))
@@ -435,7 +446,7 @@ class Group(object):
 elif field.type == "uint":
 non_address_fields.append("__gen_uint(values->%s, %d, %d)" 
% \
 (name, field.start - dword_start, field.end - 
dword_start))
-elif field.type in self.parser.enums:
+elif field.is_enum_type():
 non_address_fields.append("__gen_uint(values->%s, %d, %d)" 
% \
 (name, field.start - dword_start, field.end - 
dword_start))
 elif field.type == "int":
@@ -455,7 +466,7 @@ class Group(object):
 elif field.type == 'sfixed':
 non_address_fields.append("__gen_sfixed(values->%s, %d, 
%d, %d)" % \
 (name, field.start - dword_start, field.end - 
dword_start, field.fractional_size))
-elif field.type in self.parser.structs:
+elif field.is_struct_type():
 non_address_fields.append("__gen_uint(v%d_%d, %d, %d)" % \
 (index, field_index, field.start - dword_start, 
field.end - dword_start))
 field_index = field_index + 1
-- 
2.14.3

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Re: [Mesa-dev] [PATCH v3 3/3] i965/i915: Add UYVY as the supported format

[Kristian H. Kristensen]

Johnson Lin  writes:

> Trigger the correct sampler options for it. Similar with YUYV
> ---
>  src/intel/compiler/brw_compiler.h| 1 +
>  src/intel/compiler/brw_nir.c | 1 +
>  src/mesa/drivers/dri/i915/intel_screen.c | 9 ++---
>  src/mesa/drivers/dri/i965/brw_wm.c   | 7 +++
>  src/mesa/drivers/dri/i965/intel_screen.c | 9 ++---
>  5 files changed, 21 insertions(+), 6 deletions(-)
>
> diff --git a/src/intel/compiler/brw_compiler.h 
> b/src/intel/compiler/brw_compiler.h
> index 78873744ce5f..3f383403883c 100644
> --- a/src/intel/compiler/brw_compiler.h
> +++ b/src/intel/compiler/brw_compiler.h
> @@ -168,6 +168,7 @@ struct brw_sampler_prog_key_data {
> uint32_t y_u_v_image_mask;
> uint32_t y_uv_image_mask;
> uint32_t yx_xuxv_image_mask;
> +   uint32_t xy_uxvx_image_mask;
>  };
>  
>  /**
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index de8f519b4e10..49d3cf365647 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -770,6 +770,7 @@ brw_nir_apply_sampler_key(nir_shader *nir,
> tex_options.lower_y_uv_external = key_tex->y_uv_image_mask;
> tex_options.lower_y_u_v_external = key_tex->y_u_v_image_mask;
> tex_options.lower_yx_xuxv_external = key_tex->yx_xuxv_image_mask;
> +   tex_options.lower_xy_uxvx_external = key_tex->xy_uxvx_image_mask;
>  
> if (nir_lower_tex(nir, _options)) {
>nir_validate_shader(nir);
> diff --git a/src/mesa/drivers/dri/i915/intel_screen.c 
> b/src/mesa/drivers/dri/i915/intel_screen.c
> index cba5434b5e1b..a81c7eb07d6a 100644
> --- a/src/mesa/drivers/dri/i915/intel_screen.c
> +++ b/src/mesa/drivers/dri/i915/intel_screen.c
> @@ -227,17 +227,20 @@ static struct intel_image_format intel_image_formats[] 
> = {
>   { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
> { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
>  
> -   /* For YUYV buffers, we set up two overlapping DRI images and treat
> +   /* For YUYV buffers, we set up two overlapping DRI images and treat

Spaces around the '&', but just write out 'and' instead.

>  * them as planar buffers in the compositors.  Plane 0 is GR88 and
>  * samples YU or YV pairs and places Y into the R component, while
> -* plane 1 is ARGB and samples YUYV clusters and places pairs and
> +* plane 1 is ARGB and samples YUYV/UYVY clusters and places pairs and
>  * places U into the G component and V into A.  This lets the
>  * texture sampler interpolate the Y components correctly when
>  * sampling from plane 0, and interpolate U and V correctly when
>  * sampling from plane 1. */
> { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
>   { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> -   { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB, 4 } } }
> +   { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB, 4 } } },
> +   { __DRI_IMAGE_FOURCC_UYVY, __DRI_IMAGE_COMPONENTS_Y_UXVX, 2,
> + { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> +   { 0, 1, 0, __DRI_IMAGE_FORMAT_ABGR, 4 } } }
>  };
>  
>  static __DRIimage *
> diff --git a/src/mesa/drivers/dri/i965/brw_wm.c 
> b/src/mesa/drivers/dri/i965/brw_wm.c
> index 0f075a11f756..a8ec1f5c2368 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm.c
> @@ -270,6 +270,10 @@ brw_debug_recompile_sampler_key(struct brw_context *brw,
> found |= key_debug(brw, "yx_xuxv image bound",
>old_key->yx_xuxv_image_mask,
>key->yx_xuxv_image_mask);
> +   found |= key_debug(brw, "xy_uxvx image bound",
> +  old_key->xy_uxvx_image_mask,
> +  key->xy_uxvx_image_mask);
> +
>  
> for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
>found |= key_debug(brw, "textureGather workarounds",
> @@ -412,6 +416,9 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
>  case __DRI_IMAGE_COMPONENTS_Y_XUXV:
> key->yx_xuxv_image_mask |= 1 << s;
> break;
> +case __DRI_IMAGE_COMPONENTS_Y_UXVX:
> +   key->xy_uxvx_image_mask |= 1 << s;
> +   break;
>  default:
> break;
>  }
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
> b/src/mesa/drivers/dri/i965/intel_screen.c
> index 83b8a24509a4..4ffedf1cc07f 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -278,17 +278,20 @@ static struct intel_image_format intel_image_formats[] 
> = {
>   { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
> { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
>  
> -   /* For YUYV buffers, we set up two overlapping DRI images and treat
> +   /* For YUYV buffers, we set up two overlapping DRI images and treat

Same here.

>  * them as planar buffers in the compositors.  Plane 0 is GR88 and
>  * samples YU or YV pairs and places Y into the R component, while
> -   

Re: [Mesa-dev] [PATCH v3 1/3] dri: Add UYVY as available format

[Kristian H. Kristensen]

Johnson Lin <johnson@intel.com> writes:

> UYVY is diffrent with YUYV in byte order.
> YUYV is already declared in dri_interface.h,
> this CL add the difinitions for UYVY.
> Drivers can add UYVY as supported format

This series looks good now. There are a few stylistic nits in the
comment formatting below, but with that fixed, this is

Reviewed-by: Kristian H. Kristensen <hoegsb...@google.com>

> ---
>  include/GL/internal/dri_interface.h | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/include/GL/internal/dri_interface.h 
> b/include/GL/internal/dri_interface.h
> index fc2d4bbe22ef..6992da16d5f8 100644
> --- a/include/GL/internal/dri_interface.h
> +++ b/include/GL/internal/dri_interface.h
> @@ -1211,6 +1211,7 @@ struct __DRIdri2ExtensionRec {
>  #define __DRI_IMAGE_FOURCC_NV12  0x3231564e
>  #define __DRI_IMAGE_FOURCC_NV16  0x3631564e
>  #define __DRI_IMAGE_FOURCC_YUYV  0x56595559
> +#define __DRI_IMAGE_FOURCC_UYVY  0x59565955
>  
>  #define __DRI_IMAGE_FOURCC_YVU4100x39555659
>  #define __DRI_IMAGE_FOURCC_YVU4110x31315659
> @@ -1224,7 +1225,7 @@ struct __DRIdri2ExtensionRec {
>   * RGB and RGBA are may be usable directly as images but its still
>   * recommended to call fromPlanar with plane == 0.
>   *
> - * Y_U_V, Y_UV and Y_XUXV all requires call to fromPlanar to create
> + * Y_U_V, Y_UV,Y_XUXV and Y_UXVX all requires call to fromPlanar to create
  ^
Space after the comma here.

>   * usable sub-images, sampling from images return raw YUV data and
>   * color conversion needs to be done in the shader.
>   *
> @@ -1236,6 +1237,7 @@ struct __DRIdri2ExtensionRec {
>  #define __DRI_IMAGE_COMPONENTS_Y_U_V 0x3003
>  #define __DRI_IMAGE_COMPONENTS_Y_UV  0x3004
>  #define __DRI_IMAGE_COMPONENTS_Y_XUXV0x3005
> +#define __DRI_IMAGE_COMPONENTS_Y_UXVX0x3008
>  #define __DRI_IMAGE_COMPONENTS_R 0x3006
>  #define __DRI_IMAGE_COMPONENTS_RG0x3007
>  
> -- 
> 1.9.1
>
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Re: [Mesa-dev] [PATCH] i965: Remove spurious mutex frobbing around call to intel_miptree_blit

[Kristian H. Kristensen]

Ian Romanick  writes:

> On 06/20/2017 01:33 PM, Kristian Høgsberg wrote:
>> On Mon, Jun 19, 2017 at 2:33 PM, Ian Romanick  wrote:
>>> From: Ian Romanick 
>>>
>>> These locks were added in 2f28a0dc, but I don't see anything in the
>>> intel_miptree_blit path that should make this necessary.
>> 
>> I doubt it's needed now with the new blorp. If I remember correctly, I
>> had to drop the lock there since intel_miptree_blit() could hit the XY
>> blit path that requires a fast clear resolve. The fast resolve being
>> meta, would then try to lock the texture again.
>
> I figured it was something like that.  If I add that commentary to the
> commit message, can I call that a Reviewed-by?

Certainly.

Kristian

>> Kristian
>> 
>>> Signed-off-by: Ian Romanick 
>>> Cc: Kristian Høgsberg 
>>> ---
>>>  src/mesa/drivers/dri/i965/intel_tex_copy.c | 19 ++-
>>>  1 file changed, 6 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/src/mesa/drivers/dri/i965/intel_tex_copy.c 
>>> b/src/mesa/drivers/dri/i965/intel_tex_copy.c
>>> index 9c255ae..e0d5cad 100644
>>> --- a/src/mesa/drivers/dri/i965/intel_tex_copy.c
>>> +++ b/src/mesa/drivers/dri/i965/intel_tex_copy.c
>>> @@ -51,7 +51,6 @@ intel_copy_texsubimage(struct brw_context *brw,
>>> GLint x, GLint y, GLsizei width, GLsizei height)
>>>  {
>>> const GLenum internalFormat = intelImage->base.Base.InternalFormat;
>>> -   bool ret;
>>>
>>> /* No pixel transfer operations (zoom, bias, mapping), just a blit */
>>> if (brw->ctx._ImageTransferState)
>>> @@ -83,19 +82,13 @@ intel_copy_texsubimage(struct brw_context *brw,
>>> int dst_slice = slice + intelImage->base.Base.Face +
>>> intelImage->base.Base.TexObject->MinLayer;
>>>
>>> -   _mesa_unlock_texture(>ctx, intelImage->base.Base.TexObject);
>>> -
>>> /* blit from src buffer to texture */
>>> -   ret = intel_miptree_blit(brw,
>>> -irb->mt, irb->mt_level, irb->mt_layer,
>>> -x, y, irb->Base.Base.Name == 0,
>>> -intelImage->mt, dst_level, dst_slice,
>>> -dstx, dsty, false,
>>> -width, height, GL_COPY);
>>> -
>>> -   _mesa_lock_texture(>ctx, intelImage->base.Base.TexObject);
>>> -
>>> -   return ret;
>>> +   return intel_miptree_blit(brw,
>>> + irb->mt, irb->mt_level, irb->mt_layer,
>>> + x, y, irb->Base.Base.Name == 0,
>>> + intelImage->mt, dst_level, dst_slice,
>>> + dstx, dsty, false,
>>> + width, height, GL_COPY);
>>>  }
>>>
>>>
>>> --
>>> 2.9.4
>>>
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Re: [Mesa-dev] [PATCH v1 3/3] i965/i915: Add UYVY as the supported format Trigger the correct sampler options for it. Similar with YUYV

[Kristian H. Kristensen]

Johnson Lin  writes:

Commit subject is too long. Make it a brief summary under 72 characters
wide. Explain further, if necessary in commit body.

See https://chris.beams.io/posts/git-commit/ for a good guide and
rationale.

> ---
>  src/intel/compiler/brw_compiler.h| 1 +
>  src/intel/compiler/brw_nir.c | 1 +
>  src/mesa/drivers/dri/i915/intel_screen.c | 7 +--
>  src/mesa/drivers/dri/i965/brw_wm.c   | 7 +++
>  src/mesa/drivers/dri/i965/intel_screen.c | 7 +--
>  5 files changed, 19 insertions(+), 4 deletions(-)
>
> diff --git a/src/intel/compiler/brw_compiler.h 
> b/src/intel/compiler/brw_compiler.h
> index 78873744ce5f..3f383403883c 100644
> --- a/src/intel/compiler/brw_compiler.h
> +++ b/src/intel/compiler/brw_compiler.h
> @@ -168,6 +168,7 @@ struct brw_sampler_prog_key_data {
> uint32_t y_u_v_image_mask;
> uint32_t y_uv_image_mask;
> uint32_t yx_xuxv_image_mask;
> +   uint32_t xy_uxvx_image_mask;
>  };
>  
>  /**
> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
> index de8f519b4e10..49d3cf365647 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -770,6 +770,7 @@ brw_nir_apply_sampler_key(nir_shader *nir,
> tex_options.lower_y_uv_external = key_tex->y_uv_image_mask;
> tex_options.lower_y_u_v_external = key_tex->y_u_v_image_mask;
> tex_options.lower_yx_xuxv_external = key_tex->yx_xuxv_image_mask;
> +   tex_options.lower_xy_uxvx_external = key_tex->xy_uxvx_image_mask;
>  
> if (nir_lower_tex(nir, _options)) {
>nir_validate_shader(nir);
> diff --git a/src/mesa/drivers/dri/i915/intel_screen.c 
> b/src/mesa/drivers/dri/i915/intel_screen.c
> index cba5434b5e1b..03f79e242c67 100644
> --- a/src/mesa/drivers/dri/i915/intel_screen.c
> +++ b/src/mesa/drivers/dri/i915/intel_screen.c
> @@ -227,16 +227,19 @@ static struct intel_image_format intel_image_formats[] 
> = {
>   { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
> { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
>  
> -   /* For YUYV buffers, we set up two overlapping DRI images and treat
> +   /* For YUYV buffers, we set up two overlapping DRI images and treat

I would just say "For YUYV-style buffers...", implying the various
swizzled versions.

>  * them as planar buffers in the compositors.  Plane 0 is GR88 and
>  * samples YU or YV pairs and places Y into the R component, while
> -* plane 1 is ARGB and samples YUYV clusters and places pairs and
> +* plane 1 is ARGB and samples YUYV/UYVY clusters and places pairs and
>  * places U into the G component and V into A.  This lets the
>  * texture sampler interpolate the Y components correctly when
>  * sampling from plane 0, and interpolate U and V correctly when
>  * sampling from plane 1. */
> { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
>   { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> +   { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB, 4 } } },
> +   { __DRI_IMAGE_FOURCC_UYVY, __DRI_IMAGE_COMPONENTS_Y_UXVX, 2,
> + { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
> { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB, 4 } } }
>  };
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_wm.c 
> b/src/mesa/drivers/dri/i965/brw_wm.c
> index 0f075a11f756..a8ec1f5c2368 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm.c
> @@ -270,6 +270,10 @@ brw_debug_recompile_sampler_key(struct brw_context *brw,
> found |= key_debug(brw, "yx_xuxv image bound",
>old_key->yx_xuxv_image_mask,
>key->yx_xuxv_image_mask);
> +   found |= key_debug(brw, "xy_uxvx image bound",
> +  old_key->xy_uxvx_image_mask,
> +  key->xy_uxvx_image_mask);
> +
>  
> for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
>found |= key_debug(brw, "textureGather workarounds",
> @@ -412,6 +416,9 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
>  case __DRI_IMAGE_COMPONENTS_Y_XUXV:
> key->yx_xuxv_image_mask |= 1 << s;
> break;
> +case __DRI_IMAGE_COMPONENTS_Y_UXVX:
> +   key->xy_uxvx_image_mask |= 1 << s;
> +   break;
>  default:
> break;
>  }
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
> b/src/mesa/drivers/dri/i965/intel_screen.c
> index 83b8a24509a4..4258e54e78ca 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -278,16 +278,19 @@ static struct intel_image_format intel_image_formats[] 
> = {
>   { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
> { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
>  
> -   /* For YUYV buffers, we set up two overlapping DRI images and treat
> +   /* For YUYV buffers, we set up two overlapping DRI images and treat
>  * them as planar buffers in the compositors.  Plane 0 is GR88 and
>  * 

Re: [Mesa-dev] [PATCH v1 2/3] nir: Add a lowering pass for UYVY textures Similar with support for YUYV but with byte order difference in sampler

[Kristian H. Kristensen]

Johnson Lin  writes:

> ---
>  src/compiler/nir/nir.h   |  1 +
>  src/compiler/nir/nir_lower_tex.c | 16 
>  2 files changed, 17 insertions(+)
>
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> index ab7ba14303b7..1b4e47058d4d 100644
> --- a/src/compiler/nir/nir.h
> +++ b/src/compiler/nir/nir.h
> @@ -2449,6 +2449,7 @@ typedef struct nir_lower_tex_options {
> unsigned lower_y_uv_external;
> unsigned lower_y_u_v_external;
> unsigned lower_yx_xuxv_external;
> +   unsigned lower_xy_uxvx_external;
>  
> /**
>  * To emulate certain texture wrap modes, this can be used
> diff --git a/src/compiler/nir/nir_lower_tex.c 
> b/src/compiler/nir/nir_lower_tex.c
> index 4ef81955513e..5593f9890b28 100644
> --- a/src/compiler/nir/nir_lower_tex.c
> +++ b/src/compiler/nir/nir_lower_tex.c
> @@ -301,6 +301,18 @@ lower_yx_xuxv_external(nir_builder *b, nir_tex_instr 
> *tex)
>nir_channel(b, xuxv, 3));
>  }
>  
> +static void lower_xy_uxvx_external(nir_builder *b, nir_tex_instr *tex) {
> +  b->cursor = nir_after_instr(>instr);
> +
> +  nir_ssa_def *y = sample_plane(b, tex, 0);
> +  nir_ssa_def *uxvx = sample_plane(b, tex, 1);
> +
> +  convert_yuv_to_rgb(b, tex,
> + nir_channel(b, y, 1),
> + nir_channel(b, uxvx, 2),
> + nir_channel(b, uxvx, 0));

This looks like it's swapping U and V channels.

> +}
> +
>  /*
>   * Emits a textureLod operation used to replace an existing
>   * textureGrad instruction.
> @@ -760,6 +772,10 @@ nir_lower_tex_block(nir_block *block, nir_builder *b,
>   progress = true;
>}
>  
> +  if ((1 << tex->texture_index) & options->lower_xy_uxvx_external) {
> + lower_xy_uxvx_external(b, tex);
> + progress = true;
> +  }
>  
>if (sat_mask) {
>   saturate_src(b, tex, sat_mask);
> -- 
> 1.9.1
>
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Re: [Mesa-dev] [PATCH] fix minor error in YUV2RGB matrix used in shader

[Kristian H. Kristensen]

Johnson Lin <johnson@intel.com> writes:

> The matrix used for YCbCr to RGB is listed in Wiki 
> https://en.wikipedia.org/wiki/YCbCr;
> There is minor error in the matrix constant: 0.0625=16/256 should be 16.0/255,
>  and 0.5=128.0/256 should be 128.0/255.
> Note that conversion from a 0-255 byte number to 0-1.0 float is to divide by 
> 255
>  instead of 256. That's we get 255=1.0f.
> By the constant change we can see the CSC result is bit aligned with
> Wiki conversion result and FFMPeg result.
> Otherwise in some situation, there will be one bit difference

Thanks for fixing this.  Try to wrap the the commit message so it fits
in 80 columns, eg:

The matrix used for YCbCr to RGB is listed in:

  https://en.wikipedia.org/wiki/YCbCr;

There is minor error in the matrix constant: 0.0625=16/256 should be
16.0/255, and 0.5=128.0/256 should be 128.0/255.  Note that conversion
from a 0-255 byte number to 0-1.0 float is to divide by 255 instead of
256. That's we get 255=1.0f.

By the constant change we can see the CSC result is bit aligned with
Wiki conversion result and FFMPeg result.  Otherwise in some situation,
there will be one bit difference

> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100854
> ---
>  src/compiler/nir/nir_lower_tex.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/compiler/nir/nir_lower_tex.c 
> b/src/compiler/nir/nir_lower_tex.c
> index 352d1499bc8d..f20425e84aab 100644
> --- a/src/compiler/nir/nir_lower_tex.c
> +++ b/src/compiler/nir/nir_lower_tex.c
> @@ -244,9 +244,9 @@ convert_yuv_to_rgb(nir_builder *b, nir_tex_instr *tex,
> nir_ssa_def *yuv =
>nir_vec4(b,
> nir_fmul(b, nir_imm_float(b, 1.16438356f),
> -nir_fadd(b, y, nir_imm_float(b, -0.0625f))),
> -   nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -0.5f)), 0),
> -   nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -0.5f)), 0),
> +nir_fadd(b, y, nir_imm_float(b, -16.0f/255))),
> +   nir_channel(b, nir_fadd(b, u, nir_imm_float(b, -128.0f/255)), 
> 0),
> +   nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -128.0f/255)), 
> 0),

I'd like to make two changes here: use a float constant (255.0f instead
of 255) and add spaces around the '/'. That is:

nir_channel(b, nir_fadd(b, v, nir_imm_float(b, -128.0f / 255.0f)), 0),

with that and the 'nir:' prefix in the commit subject:

Reviewed-by: Kristian H. Kristensen <hoegsb...@google.com>

> nir_imm_float(b, 0.0));
>  
> nir_ssa_def *red = nir_fdot4(b, yuv, nir_build_imm(b, 4, 32, m[0]));
> -- 
> 1.9.1
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Re: [Mesa-dev] question about container_of

[Kristian H. Kristensen]

Emil Velikov  writes:

> On 18 April 2017 at 13:55, Pekka Paalanen  wrote:
>> On Mon, 27 Feb 2017 13:26:11 +
>> Emil Velikov  wrote:
>>
>>> Hi Julien,
>>>
>>> On 27 February 2017 at 12:08, Julien Isorce  wrote:
>>> > Hi,
>>> >
>>> > Since 2012 commit ccff74971203b533bf16b46b49a9e61753f75e6c it is said:
>>> > "sample must be initialized, or else the result is undefined" in the
>>> > description of mesa/src/util/list.h::container_of .
>>> >
>>> > But I can find a few places where it is used without initializing that
>>> > second parameter, i.e. like:
>>> >
>>> > struct A a;
>>> > container_of(ptr, a, member);
>>> >
>>> > Then I can add the "= NULL" but should it be just
>>> > container_of(ptr, struct A, member);
>>> > like in the kernel and some other places in mesa ?
>>> >
>>> Strictly peaking these are toolchain (ASAN iirc) bugs, since there is
>>> no pointer deref, as we're doing pointer arithmetic.
>>
>> Hi Emil,
>>
>> that's what people would usually think. It used to work with GCC. Then
>> came Clang.
>>
>>> Afaict the general decision was to to merge the patch(es) since they
>>> will make actual bugs stand out amongst the noise. In the long run,
>>> it's better to fix the tool (ASAN/other) than trying to "fix" all the
>>> cases in mesa and dozens of other projects. But until then patches are
>>> safe enough ;-)
>>>
>>> That's my take on it, at least.
>>
>> It depends on how container_of() has been defined. For more details,
>> see e.g.:
>> https://cgit.freedesktop.org/wayland/wayland/commit/?id=a18e34417ba3fefeb81d891235e8ebf394a20a74
>>
>> The comment in the code in Mesa is correct for the fallback
>> implementation it has. Maybe things rely on the fallback implementation
>> never being used when compiling with Clang.
>>
>> Julien, some alternatives for container_of use a pointer, others expect
>> a type instead. I believe one must use the correct form.
>>
> Thanks for the correction Pekka - yes, the issue (to deref or not) is
> implementation specific.
> A 'minor' detail that I've missed.

The issue isn't whether it derefs the pointer or not. The undefined
version looks like this:

 #define wl_container_of(ptr, sample, member)
(__typeof__(sample))((char *)(ptr)  -
 ((char *)&(sample)->member - (char *)(sample)))

and the problem is that it expects an uninitialized variable (sample) to
have consistent values across two references ( (char *)&(sample)->member and
(char *)sample ), but referencing an uninitialized variable even once is
undefined behavior.

Kristian

> Seems like we use the more prone one - having the second argument
> being a pointer as, opposed to a type.
> Perhaps we should reconsider and update mesa, sooner rather than later.
>
> Thanks again!
> Emil
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Re: [Mesa-dev] [PATCH 22/35] i965: Port gen6+ 3DSTATE_VS to genxml.

[Kristian H. Kristensen]

Rafael Antognolli  writes:

> Emit 3DSTATE_VS on Gen6+ using brw_batch_emit helper, that uses pack
> structs from genxml.
>
> Signed-off-by: Rafael Antognolli 
> ---
>  src/mesa/drivers/dri/i965/Makefile.sources|   2 +-
>  src/mesa/drivers/dri/i965/brw_state.h |   3 +-
>  src/mesa/drivers/dri/i965/gen6_vs_state.c | 113 +---
>  src/mesa/drivers/dri/i965/gen7_vs_state.c |  87 +---
>  src/mesa/drivers/dri/i965/gen8_vs_state.c |  96 +
>  src/mesa/drivers/dri/i965/genX_state_upload.c | 110 +-
>  6 files changed, 107 insertions(+), 304 deletions(-)
>  delete mode 100644 src/mesa/drivers/dri/i965/gen7_vs_state.c
>  delete mode 100644 src/mesa/drivers/dri/i965/gen8_vs_state.c
>
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index 0f893d6..eec63f8 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -102,7 +102,6 @@ i965_FILES = \
>   gen7_te_state.c \
>   gen7_urb.c \
>   gen7_viewport_state.c \
> - gen7_vs_state.c \
>   gen7_wm_surface_state.c \
>   gen8_blend_state.c \
>   gen8_depth_state.c \
> @@ -113,7 +112,6 @@ i965_FILES = \
>   gen8_multisample_state.c \
>   gen8_surface_state.c \
>   gen8_viewport_state.c \
> - gen8_vs_state.c \
>   hsw_queryobj.c \
>   hsw_sol.c \
>   intel_batchbuffer.c \
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
> b/src/mesa/drivers/dri/i965/brw_state.h
> index 71ec9fb..306bfc5 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -123,7 +123,6 @@ extern const struct brw_tracked_state gen6_sf_vp;
>  extern const struct brw_tracked_state gen6_urb;
>  extern const struct brw_tracked_state gen6_viewport_state;
>  extern const struct brw_tracked_state gen6_vs_push_constants;
> -extern const struct brw_tracked_state gen6_vs_state;
>  extern const struct brw_tracked_state gen6_wm_push_constants;
>  extern const struct brw_tracked_state gen7_depthbuffer;
>  extern const struct brw_tracked_state gen7_ds_state;
> @@ -136,7 +135,6 @@ extern const struct brw_tracked_state 
> gen7_sf_clip_viewport;
>  extern const struct brw_tracked_state gen7_te_state;
>  extern const struct brw_tracked_state gen7_tes_push_constants;
>  extern const struct brw_tracked_state gen7_urb;
> -extern const struct brw_tracked_state gen7_vs_state;
>  extern const struct brw_tracked_state haswell_cut_index;
>  extern const struct brw_tracked_state gen8_blend_state;
>  extern const struct brw_tracked_state gen8_ds_state;
> @@ -149,7 +147,6 @@ extern const struct brw_tracked_state gen8_ps_blend;
>  extern const struct brw_tracked_state gen8_sf_clip_viewport;
>  extern const struct brw_tracked_state gen8_vertices;
>  extern const struct brw_tracked_state gen8_vf_topology;
> -extern const struct brw_tracked_state gen8_vs_state;
>  extern const struct brw_tracked_state brw_cs_work_groups_surface;
>  
>  static inline bool
> diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c 
> b/src/mesa/drivers/dri/i965/gen6_vs_state.c
> index 17b8118..b2d2306 100644
> --- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
> +++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
> @@ -68,116 +68,3 @@ const struct brw_tracked_state gen6_vs_push_constants = {
> },
> .emit = gen6_upload_vs_push_constants,
>  };
> -
> -static void
> -upload_vs_state(struct brw_context *brw)
> -{
> -   const struct gen_device_info *devinfo = >screen->devinfo;
> -   const struct brw_stage_state *stage_state = >vs.base;
> -   const struct brw_stage_prog_data *prog_data = stage_state->prog_data;
> -   const struct brw_vue_prog_data *vue_prog_data =
> -  brw_vue_prog_data(stage_state->prog_data);
> -   uint32_t floating_point_mode = 0;
> -
> -   /* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State,
> -* 3DSTATE_VS, Dword 5.0 "VS Function Enable":
> -*
> -*   [DevSNB] A pipeline flush must be programmed prior to a 3DSTATE_VS
> -*   command that causes the VS Function Enable to toggle. Pipeline
> -*   flush can be executed by sending a PIPE_CONTROL command with CS
> -*   stall bit set and a post sync operation.
> -*
> -* We've already done such a flush at the start of state upload, so we
> -* don't need to do another one here.
> -*/
> -
> -   if (stage_state->push_const_size == 0) {
> -  /* Disable the push constant buffers. */
> -  BEGIN_BATCH(5);
> -  OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (5 - 2));
> -  OUT_BATCH(0);
> -  OUT_BATCH(0);
> -  OUT_BATCH(0);
> -  OUT_BATCH(0);
> -  ADVANCE_BATCH();
> -   } else {
> -  BEGIN_BATCH(5);
> -  OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 |
> - GEN6_CONSTANT_BUFFER_0_ENABLE |
> - (5 - 2));
> -  /* Pointer to the VS constant buffer.  

Re: [Mesa-dev] [PATCH v2 2/2] anv: Advertise larger heap sizes

[Kristian H. Kristensen]

Jason Ekstrand <ja...@jlekstrand.net> writes:

> Instead of just advertising the aperture size, we do something more
> intelligent.  On systems with a full 48-bit PPGTT, we can address 100%
> of the available system RAM from the GPU.  In order to keep clients from
> burning 100% of your available RAM for graphics resources, we have a
> nice little heuristic (which has received exactly zero tuning) to keep
> things under a reasonable level of control.
>
> Cc: Alex Smith <asm...@feralinteractive.com>

Looks entirely reasonable, and yes, you'll probably have to tune it as
you go :)

Reviewed-by: Kristian H. Kristensen <k...@bitplanet.net>

> ---
>  src/intel/vulkan/anv_device.c  | 61 
> +-
>  src/intel/vulkan/anv_gem.c | 16 +++
>  src/intel/vulkan/anv_private.h | 13 -
>  3 files changed, 76 insertions(+), 14 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index f9d04ee..0e5e4b9 100644
> --- a/src/intel/vulkan/anv_device.c
> +++ b/src/intel/vulkan/anv_device.c
> @@ -25,6 +25,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -53,6 +54,48 @@ compiler_perf_log(void *data, const char *fmt, ...)
> va_end(args);
>  }
>  
> +static VkResult
> +anv_compute_heap_size(int fd, uint64_t *heap_size)
> +{
> +   uint64_t gtt_size;
> +   if (anv_gem_get_context_param(fd, 0, I915_CONTEXT_PARAM_GTT_SIZE,
> + _size) == -1) {
> +  /* If, for whatever reason, we can't actually get the GTT size from the
> +   * kernel (too old?) fall back to the aperture size.
> +   */
> +  anv_perf_warn("Failed to get I915_CONTEXT_PARAM_GTT_SIZE: %m");
> +
> +  if (anv_gem_get_aperture(fd, _size) == -1) {
> + return vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
> +  "failed to get aperture size: %m");
> +  }
> +   }
> +
> +   /* Query the total ram from the system */
> +   struct sysinfo info;
> +   sysinfo();
> +
> +   uint64_t total_ram = (uint64_t)info.totalram * (uint64_t)info.mem_unit;
> +
> +   /* We don't want to burn too much ram with the GPU.  If the user has 4GiB
> +* or less, we use at most half.  If they have more than 4GiB, we use 3/4.
> +*/
> +   uint64_t available_ram;
> +   if (total_ram <= 4ull * 1024ull * 1024ull * 1024ull)
> +  available_ram = total_ram / 2;
> +   else
> +  available_ram = total_ram * 3 / 4;
> +
> +   /* We also want to leave some padding for things we allocate in the 
> driver,
> +* so don't go over 3/4 of the GTT either.
> +*/
> +   uint64_t available_gtt = gtt_size * 3 / 4;
> +
> +   *heap_size = MIN2(available_ram, available_gtt);
> +
> +   return VK_SUCCESS;
> +}
> +
>  static bool
>  anv_device_get_cache_uuid(void *uuid)
>  {
> @@ -124,12 +167,6 @@ anv_physical_device_init(struct anv_physical_device 
> *device,
>}
> }
>  
> -   if (anv_gem_get_aperture(fd, >aperture_size) == -1) {
> -  result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
> - "failed to get aperture size: %m");
> -  goto fail;
> -   }
> -
> if (!anv_gem_get_param(fd, I915_PARAM_HAS_WAIT_TIMEOUT)) {
>result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
>   "kernel missing gem wait");
> @@ -151,6 +188,10 @@ anv_physical_device_init(struct anv_physical_device 
> *device,
>  
> device->supports_48bit_addresses = anv_gem_supports_48b_addresses(fd);
>  
> +   result = anv_compute_heap_size(fd, >heap_size);
> +   if (result != VK_SUCCESS)
> +  goto fail;
> +
> if (!anv_device_get_cache_uuid(device->uuid)) {
>result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
>   "cannot generate UUID");
> @@ -731,12 +772,6 @@ void anv_GetPhysicalDeviceMemoryProperties(
>  VkPhysicalDeviceMemoryProperties*   pMemoryProperties)
>  {
> ANV_FROM_HANDLE(anv_physical_device, physical_device, physicalDevice);
> -   VkDeviceSize heap_size;
> -
> -   /* Reserve some wiggle room for the driver by exposing only 75% of the
> -* aperture to the heap.
> -*/
> -   heap_size = 3 * physical_device->aperture_size / 4;
>  
> if (physical_device->info.has_llc) {
>/* Big core GPUs share LLC with the CPU and thus one memory type can be
> @@ -773,7 +808,7 @@ void anv_GetPhysicalDeviceMemoryProperties(
>  
> pMemoryProperties->memoryHeapCount = 1;
> pMemoryProperties->memoryHeaps[0] = (VkMemoryHeap) {
> -

Re: [Mesa-dev] [PATCH v2 1/2] anv: Add support for 48-bit addresses

[Kristian H. Kristensen]

tion is probably overkill, it is effective.
> +*
> +* There are two documented workarounds for this: 
> Wa32bitGeneralStateOffset
> +* and Wa32bitInstructionBaseOffset which state that those two base
> +* addresses do not support 48-bit addresses.  Empirical evidence, 
> however,
> +* contradicts this and supports the explanation above.
> +*
> +* If the kernel or hardware does not support 48-bit addresses, this field
> +* is ignored.
> +*/
> +   bool supports_48bit_address:1;
>  };
>  
>  static inline void
> -anv_bo_init(struct anv_bo *bo, uint32_t gem_handle, uint64_t size)
> +anv_bo_init(struct anv_bo *bo, uint32_t gem_handle, uint64_t size,
> +bool supports_48bit_address)

I'd be inclined to not take supports_48bit_address as an argument here
and just default it to off. Then in the two places where you need to set
it, like we do for is_winsys_bo.

At your discretion,

Reviewed-by: Kristian H. Kristensen <k...@bitplanet.net>

>  {
> bo->gem_handle = gem_handle;
> bo->index = 0;
> @@ -311,6 +334,7 @@ anv_bo_init(struct anv_bo *bo, uint32_t gem_handle, 
> uint64_t size)
> bo->size = size;
> bo->map = NULL;
> bo->is_winsys_bo = false;
> +   bo->supports_48bit_address = supports_48bit_address;
>  }
>  
>  /* Represents a lock-free linked list of "free" things.  This is used by
> @@ -654,6 +678,7 @@ int anv_gem_destroy_context(struct anv_device *device, 
> int context);
>  int anv_gem_get_param(int fd, uint32_t param);
>  bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
>  int anv_gem_get_aperture(int fd, uint64_t *size);
> +bool anv_gem_supports_48b_addresses(int fd);
>  int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
>  uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
>  int anv_gem_set_caching(struct anv_device *device, uint32_t gem_handle, 
> uint32_t caching);
> -- 
> 2.5.0.400.gff86faf
>
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Re: [Mesa-dev] [PATCH v2 1/2] anv: Add support for 48-bit addresses

[Kristian H. Kristensen]

Jason Ekstrand  writes:

> This commit adds support for using the full 48-bit address space on
> Broadwell and newer hardware.  Thanks to certain limitations, not all
> objects can be placed above the 32-bit boundary.  In particular, general
> and state base address need to live within 32 bits.  (See also
> Wa32bitGeneralStateOffset and Wa32bitInstructionBaseOffset.)  In order
> to handle this, we add a supports_48bit_address field to anv_bo and only
> set EXEC_OBJECT_SUPPORTS_48B_ADDRESS if that bit is set.  We set the bit
> for all client-allocated memory objects but leave it false for
> driver-allocated objects.  While this is more conservative than needed,
> all driver allocations should easily fit in the first 32 bits of address
> space and keeps things simple because we don't have to think about
> whether or not any given one of our allocation data structures will be
> used in a 48-bit-unsafe way.
> ---
>  src/intel/vulkan/anv_allocator.c   | 10 --
>  src/intel/vulkan/anv_batch_chain.c | 14 ++
>  src/intel/vulkan/anv_device.c  |  4 +++-
>  src/intel/vulkan/anv_gem.c | 18 ++
>  src/intel/vulkan/anv_intel.c   |  2 +-
>  src/intel/vulkan/anv_private.h | 29 +++--
>  6 files changed, 67 insertions(+), 10 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_allocator.c 
> b/src/intel/vulkan/anv_allocator.c
> index 45c663b..88c9c13 100644
> --- a/src/intel/vulkan/anv_allocator.c
> +++ b/src/intel/vulkan/anv_allocator.c
> @@ -255,7 +255,7 @@ anv_block_pool_init(struct anv_block_pool *pool,
> assert(util_is_power_of_two(block_size));
>  
> pool->device = device;
> -   anv_bo_init(>bo, 0, 0);
> +   anv_bo_init(>bo, 0, 0, false);
> pool->block_size = block_size;
> pool->free_list = ANV_FREE_LIST_EMPTY;
> pool->back_free_list = ANV_FREE_LIST_EMPTY;
> @@ -475,7 +475,13 @@ anv_block_pool_grow(struct anv_block_pool *pool, struct 
> anv_block_state *state)
>  * values back into pool. */
> pool->map = map + center_bo_offset;
> pool->center_bo_offset = center_bo_offset;
> -   anv_bo_init(>bo, gem_handle, size);
> +
> +   /* Block pool BOs are marked as not supporting 48-bit addresses because
> +* they are used to back STATE_BASE_ADDRESS.
> +*
> +* See also anv_bo::supports_48bit_address.
> +*/
> +   anv_bo_init(>bo, gem_handle, size, false);
> pool->bo.map = map;
>  
>  done:
> diff --git a/src/intel/vulkan/anv_batch_chain.c 
> b/src/intel/vulkan/anv_batch_chain.c
> index 5d7abc6..b098e4b 100644
> --- a/src/intel/vulkan/anv_batch_chain.c
> +++ b/src/intel/vulkan/anv_batch_chain.c
> @@ -979,7 +979,8 @@ anv_execbuf_finish(struct anv_execbuf *exec,
>  }
>  
>  static VkResult
> -anv_execbuf_add_bo(struct anv_execbuf *exec,
> +anv_execbuf_add_bo(struct anv_device *device,
> +   struct anv_execbuf *exec,
> struct anv_bo *bo,
> struct anv_reloc_list *relocs,
> const VkAllocationCallbacks *alloc)
> @@ -1039,6 +1040,10 @@ anv_execbuf_add_bo(struct anv_execbuf *exec,
>obj->flags = bo->is_winsys_bo ? EXEC_OBJECT_WRITE : 0;
>obj->rsvd1 = 0;
>obj->rsvd2 = 0;
> +
> +  if (device->instance->physicalDevice.supports_48bit_addresses &&
> +  bo->supports_48bit_address)
> + obj->flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> }
>  
> if (relocs != NULL && obj->relocation_count == 0) {
> @@ -1052,7 +1057,7 @@ anv_execbuf_add_bo(struct anv_execbuf *exec,
>for (size_t i = 0; i < relocs->num_relocs; i++) {
>   /* A quick sanity check on relocations */
>   assert(relocs->relocs[i].offset < bo->size);
> - anv_execbuf_add_bo(exec, relocs->reloc_bos[i], NULL, alloc);
> + anv_execbuf_add_bo(device, exec, relocs->reloc_bos[i], NULL, alloc);
>}
> }
>  
> @@ -1264,7 +1269,8 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
> adjust_relocations_from_state_pool(ss_pool, _buffer->surface_relocs,
>cmd_buffer->last_ss_pool_center);
> VkResult result =
> -  anv_execbuf_add_bo(, _pool->bo, _buffer->surface_relocs,
> +  anv_execbuf_add_bo(device, , _pool->bo,
> + _buffer->surface_relocs,
>   _buffer->pool->alloc);
> if (result != VK_SUCCESS)
>return result;
> @@ -1277,7 +1283,7 @@ anv_cmd_buffer_execbuf(struct anv_device *device,
>adjust_relocations_to_state_pool(ss_pool, &(*bbo)->bo, &(*bbo)->relocs,
> cmd_buffer->last_ss_pool_center);
>  
> -  anv_execbuf_add_bo(, &(*bbo)->bo, &(*bbo)->relocs,
> +  anv_execbuf_add_bo(device, , &(*bbo)->bo, &(*bbo)->relocs,
>   _buffer->pool->alloc);
> }
>  
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index 4e4fa19..f9d04ee 100644
> --- 

Re: [Mesa-dev] [PATCH 0/3] GBM modifier plumbing

[Kristian H. Kristensen]

Daniel Stone <dan...@fooishbar.org> writes:

> Hey Kristian,
>
> On 13 March 2017 at 17:31, Kristian H. Kristensen <k...@bitplanet.net> wrote:
>> Jason Ekstrand <ja...@jlekstrand.net> writes:
>>> I was talking to Daniel today and I think we also need another some sort of
>>> GL or GBM api that gives you the modifiers supported for
>>> rendering/texturing.  One option would be a gbm_get_modifiers_for_use()
>>> entrypoint that takes a usage and gives you a set of modifiers that's
>>> guaranteed to work for that usage.  For scanout, it would return LINEAR, X,
>>> and Y on SKL+ and LINEAR and X on BDW-; it wouldn't return CCS because that
>>> only works on a limited number of planes.  I say this now because we may
>>> want to do that with the same DRI version bump as the rest of it.
>>
>> Are you aware of
>>
>> https://www.khronos.org/registry/EGL/extensions/EXT/EGL_EXT_image_dma_buf_import_modifiers.txt
>>
>> If you talked to Daniel, he probably brought it up - what's missing?
>
> I guess it depends on how much asymmetry there is between texture and
> render formats ... if there isn't much, then we could focus on landing
> Varad's work and use that as a jumping-off point. I was under the
> impression that there was a pretty big difference for some hardware,
> though I guess the GBM implementation would still rank by optimality
> when allocating ...

Right, but if it's more complicated than what
EGL_EXT_image_dma_buf_import_modifiers exposes, do really we want to
that logic into gbm?

Kristian
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Re: [Mesa-dev] [PATCH 0/3] GBM modifier plumbing

[Kristian H. Kristensen]

Jason Ekstrand  writes:

> I was talking to Daniel today and I think we also need another some sort of
> GL or GBM api that gives you the modifiers supported for
> rendering/texturing.  One option would be a gbm_get_modifiers_for_use()
> entrypoint that takes a usage and gives you a set of modifiers that's
> guaranteed to work for that usage.  For scanout, it would return LINEAR, X,
> and Y on SKL+ and LINEAR and X on BDW-; it wouldn't return CCS because that
> only works on a limited number of planes.  I say this now because we may
> want to do that with the same DRI version bump as the rest of it.

Are you aware of

https://www.khronos.org/registry/EGL/extensions/EXT/EGL_EXT_image_dma_buf_import_modifiers.txt

If you talked to Daniel, he probably brought it up - what's missing?

Kristian

> On Thu, Mar 9, 2017 at 5:48 PM, Ben Widawsky  wrote:
>
>> This is essential the creation and getter for GBM modifiers (via DRI
>> images).
>>
>> This was the second chunk of the Renderbuffer Decompression series (aka GBM
>> modifiers). Splitting this up to make merging easier. These patches are
>> simple
>> plumbing for getting modifiers through the various GBM functions as well as
>> exposing the new entry points.
>>
>> Ben Widawsky (3):
>>   dri: Add an image creation with modifiers
>>   gbm: Introduce modifiers into surface/bo creation
>>   gbm: Export a get modifiers
>>
>>  include/GL/internal/dri_interface.h  | 27 ++-
>>  src/egl/drivers/dri2/platform_drm.c  | 19 ++--
>>  src/gallium/state_trackers/dri/dri2.c|  1 +
>>  src/gbm/backends/dri/gbm_dri.c   | 78
>> +---
>>  src/gbm/gbm-symbols-check|  3 ++
>>  src/gbm/main/gbm.c   | 48 +++-
>>  src/gbm/main/gbm.h   | 15 ++
>>  src/gbm/main/gbmint.h| 13 +-
>>  src/mesa/drivers/dri/i965/intel_screen.c | 50 +++-
>>  9 files changed, 237 insertions(+), 17 deletions(-)
>>
>> --
>> 2.12.0
>>
>>
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Re: [Mesa-dev] [RFC] anv: Use on-the-fly surface states for dynamic buffer descriptors

[Kristian H. Kristensen]

Jason Ekstrand  writes:

> We have a performance problem with dynamic buffer descriptors.  Because
> we are currently implementing them by pushing an offset into the shader
> and adding that offset onto the already existing offset for the UBO/SSBO
> operation, all UBO/SSBO operations on dynamic descriptors are indirect.
> The back-end compiler implements indirect pull constant loads using what
> basically amounts to a texelFetch instruction.  For pull constant loads
> with constant offsets, however, we use an oword block read message which
> goes through the constant cache and reads a whole cache line at a time.
> Because of these two things, direct pull constant loads are much faster
> than indirect pull constant loads.  Because all loads from dynamically
> bound buffers are indirect, the user takes a substantial performance
> penalty when using this "performance" feature.
>
> There are two potential solutions I have seen for this problem.  The
> alternate solution is to continue pushing offsets into the shader but
> wire things up in the back-end compiler so that we use the oword block
> read messages anyway.  The only reason we can do this because we know a
> priori that the dynamic offsets are uniform and 16-byte aligned.
> Unfortunately, thanks to the 16-byte alignment requirement of the oword
> messages, we can't do some general "if the indirect offset is uniform,
> use an oword message" sort of thing.
>
> This solution, however, is recommended for a few of reasons:
>
>  1. Surface states are relatively cheap.  We've been using on-the-fly
> surface state setup for some time in GL and it works well.  Also,
> dynamic offsets with on-the-fly surface state should still be
> cheaper than allocating new descriptor sets every time you want to
> change a buffer offset which is really the only requirement of the
> dynamic offsets feature.
>
>  2. This requires substantially less compiler plumbing.  Not only can we
> delete the entire apply_dynamic_offsets pass but we can also avoid
> having to add architecture for passing dynamic offsets to the back-
> end compiler in such a way that it can continue using oword messages.
>
>  3. We get robust buffer access range-checking for free.  Because the
> offset and range are baked into the surface state, we no longer need
> to pass ranges around and do bounds-checking in the shader.
>
>  4. Once we finally get UBO pushing implemented, it will be much easier
> to handle pushing chunks of dynamic descriptors if the compiler
> remains blissfully unaware of dynamic descriptors.
>
> This commit improves performance of The Talos Principle on ULTRA
> settings by around 50% and brings it nicely into line with OpenGL
> performance.

Does the uniform analysis pass and the oword read result in a similar
improvement? I think both approaches are fine, but you might want to
keep the uniform pass around - there's a lot of URB reads and writes in
GS/HS/DS that are dynamically uniform but end up using per-slot offsets
unconditionally.

Kristian

> Cc: Kristian Høgsberg 
> ---
>  src/intel/vulkan/Makefile.sources|   1 -
>  src/intel/vulkan/anv_cmd_buffer.c|  47 +++
>  src/intel/vulkan/anv_descriptor_set.c|  62 
>  src/intel/vulkan/anv_nir_apply_dynamic_offsets.c | 172 
> ---
>  src/intel/vulkan/anv_pipeline.c  |   6 -
>  src/intel/vulkan/anv_private.h   |  13 +-
>  src/intel/vulkan/genX_cmd_buffer.c   |  30 +++-
>  7 files changed, 86 insertions(+), 245 deletions(-)
>  delete mode 100644 src/intel/vulkan/anv_nir_apply_dynamic_offsets.c
>
> diff --git a/src/intel/vulkan/Makefile.sources 
> b/src/intel/vulkan/Makefile.sources
> index fd149b2..24e2225 100644
> --- a/src/intel/vulkan/Makefile.sources
> +++ b/src/intel/vulkan/Makefile.sources
> @@ -32,7 +32,6 @@ VULKAN_FILES := \
>   anv_image.c \
>   anv_intel.c \
>   anv_nir.h \
> - anv_nir_apply_dynamic_offsets.c \
>   anv_nir_apply_pipeline_layout.c \
>   anv_nir_lower_input_attachments.c \
>   anv_nir_lower_push_constants.c \
> diff --git a/src/intel/vulkan/anv_cmd_buffer.c 
> b/src/intel/vulkan/anv_cmd_buffer.c
> index cab1dd7..a6ad48a 100644
> --- a/src/intel/vulkan/anv_cmd_buffer.c
> +++ b/src/intel/vulkan/anv_cmd_buffer.c
> @@ -507,42 +507,31 @@ void anv_CmdBindDescriptorSets(
>  
> assert(firstSet + descriptorSetCount < MAX_SETS);
>  
> +   uint32_t dynamic_slot = 0;
> for (uint32_t i = 0; i < descriptorSetCount; i++) {
>ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
>set_layout = layout->set[firstSet + i].layout;
>  
> -  if (cmd_buffer->state.descriptors[firstSet + i] != set) {
> - cmd_buffer->state.descriptors[firstSet + i] = set;
> - cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
> -  }
> +  

Re: [Mesa-dev] [PATCH 1/2] util: Add utility build-id code.

[Kristian H. Kristensen]

Matt Turner  writes:

> Provides the ability to read the .note.gnu.build-id section of ELF
> binaries, which is inserted by the --build-id=... flag to ld.
> ---
>  configure.ac  |   2 +
>  src/util/Makefile.sources |   2 +
>  src/util/build_id.c   | 109 
> ++
>  src/util/build_id.h   |  56 
>  4 files changed, 169 insertions(+)
>  create mode 100644 src/util/build_id.c
>  create mode 100644 src/util/build_id.h
>
> diff --git a/configure.ac b/configure.ac
> index f001743..99c74f0 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -768,6 +768,8 @@ LIBS="$LIBS $DLOPEN_LIBS"
>  AC_CHECK_FUNCS([dladdr])
>  LIBS="$save_LIBS"
>  
> +AC_CHECK_FUNC([dl_iterate_phdr], [DEFINES="$DEFINES -DHAVE_DL_ITERATE_PHDR"])
> +
>  case "$host_os" in
>  darwin*)
>  ;;
> diff --git a/src/util/Makefile.sources b/src/util/Makefile.sources
> index a68a5fe..4c12e5f 100644
> --- a/src/util/Makefile.sources
> +++ b/src/util/Makefile.sources
> @@ -2,6 +2,8 @@ MESA_UTIL_FILES :=\
>   bitscan.c \
>   bitscan.h \
>   bitset.h \
> + build_id.c \
> + build_id.h \
>   crc32.c \
>   crc32.h \
>   debug.c \
> diff --git a/src/util/build_id.c b/src/util/build_id.c
> new file mode 100644
> index 000..a2e21b7
> --- /dev/null
> +++ b/src/util/build_id.c
> @@ -0,0 +1,109 @@
> +/*
> + * Copyright © 2016 Intel Corporation

I don't like it either, but we're in 2017 now.

Kristian

> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#ifdef HAVE_DL_ITERATE_PHDR
> +#include 
> +#include 
> +#include 
> +
> +#include "build_id.h"
> +
> +#define ALIGN(val, align)  (((val) + (align) - 1) & ~((align) - 1))
> +
> +struct note {
> +   ElfW(Nhdr) nhdr;
> +
> +   char name[4];
> +   uint8_t build_id[0];
> +};
> +
> +struct callback_data {
> +   const char *name;
> +   struct note *note;
> +};
> +
> +static int
> +build_id_find_nhdr_callback(struct dl_phdr_info *info, size_t size, void 
> *data_)
> +{
> +   struct callback_data *data = data_;
> +
> +   char *ptr = strstr(info->dlpi_name, data->name);
> +   if (ptr == NULL || ptr[strlen(data->name)] != '\0')
> +  return 0;
> +
> +   for (unsigned i = 0; i < info->dlpi_phnum; i++) {
> +  if (info->dlpi_phdr[i].p_type != PT_NOTE)
> + continue;
> +
> +  struct note *note = (void *)(info->dlpi_addr +
> +   info->dlpi_phdr[i].p_vaddr);
> +  ptrdiff_t len = info->dlpi_phdr[i].p_filesz;
> +
> +  while (len >= sizeof(struct note)) {
> + if (note->nhdr.n_type == NT_GNU_BUILD_ID &&
> +note->nhdr.n_descsz != 0 &&
> +note->nhdr.n_namesz == 4 &&
> +memcmp(note->name, "GNU", 4) == 0) {
> +data->note = note;
> +return 1;
> + }
> +
> + size_t offset = sizeof(ElfW(Nhdr)) +
> + ALIGN(note->nhdr.n_namesz, 4) +
> + ALIGN(note->nhdr.n_descsz, 4);
> + note = (struct note *)((char *)note + offset);
> + len -= offset;
> +  }
> +   }
> +
> +   return 0;
> +}
> +
> +const struct note *
> +build_id_find_nhdr(const char *name)
> +{
> +   struct callback_data data = {
> +  .name = name,
> +  .note = NULL,
> +   };
> +
> +   if (dl_iterate_phdr(build_id_find_nhdr_callback, )) {
> +  return data.note;
> +   } else {
> +  return NULL;
> +   }
> +}
> +
> +unsigned
> +build_id_length(const struct note *note)
> +{
> +   return note->nhdr.n_descsz;
> +}
> +
> +void
> +build_id_read(const struct note *note, unsigned char *build_id)
> +{
> +   memcpy(build_id, note->build_id, note->nhdr.n_descsz);
> +}
> +
> +#endif
> diff --git a/src/util/build_id.h b/src/util/build_id.h
> new file mode 100644
> index 000..0eaecf9
> --- /dev/null
> +++ b/src/util/build_id.h

[Mesa-dev] [PATCH 2/4] intel/gen_pack_header: Emit C enums for inline values

[Kristian H. Kristensen]

This new feature lets us generate C enums for inline values of a
field. If the type attribute on a field is an otherwise undefined type,
the generator will create an enum with that type name and the inline
values.  The enum can be referenced further down in the XML as if it had
be declared independently and will generate a C enum.

For example:


  
  
  
  


will generate the TILE_MODE enum and in the C header we'll get

enum GEN9_TILE_MODE {
   LINEAR   =  0,
   WMAJOR   =  1,
   XMAJOR   =  2,
   YMAJOR   =  3,
};

and in struct GEN9_RENDER_SURFACE_STATE:

struct GEN9_RENDER_SURFACE_STATE {
   ...
   enum GEN9_SURFACE_FORMAT SurfaceFormat;
   ...
};

This can be combined with the prefix attribute:


  
  
  


generates

enum GEN9_Color Clamp {
   COLORCLAMP_UNORM =  0,
   COLORCLAMP_SNORM =  1,
   COLORCLAMP_RTFORMAT  =  2,
};

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen_pack_header.py | 41 -
 1 file changed, 31 insertions(+), 10 deletions(-)

diff --git a/src/intel/genxml/gen_pack_header.py 
b/src/intel/genxml/gen_pack_header.py
index 001ad17..fb70951 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -293,8 +293,9 @@ class Field(object):
 else:
 prefix = ""
 
-for value in self.values:
-print("#define %-40s %d" % (prefix + value.name, value.value))
+if self.is_builtin_type():
+for value in self.values:
+print("#define %-40s %d" % (prefix + value.name, value.value))
 
 class Group(object):
 def __init__(self, parser, parent, start, count, size):
@@ -305,6 +306,18 @@ class Group(object):
 self.size = size
 self.fields = []
 
+
+def emit_inline_enums(self):
+for field in self.fields:
+if type(field) is Group:
+field.emit_inline_enums()
+elif not (field.is_builtin_type() or
+  field.is_struct_type() or
+  field.is_enum_type()):
+self.parser.enums[field.type] = 1
+self.parser.emit_enum(safe_name(field.type),
+  field.prefix, field.values)
+
 def emit_template_struct(self, dim):
 if self.count == 0:
 print("   /* variable length fields follow */")
@@ -574,7 +587,7 @@ class Parser(object):
 elif name  == "field":
 self.group.fields[-1].values = self.values
 elif name  == "enum":
-self.emit_enum()
+self.emit_enum(self.enum, self.prefix, self.values)
 self.enum = None
 elif name == "genxml":
 print('#endif /* %s */' % self.gen_guard())
@@ -585,6 +598,8 @@ class Parser(object):
 print("};\n")
 
 def emit_pack_function(self, name, group):
+group.emit_inline_enums()
+
 name = self.gen_prefix(name)
 print("static inline void\n%s_pack(__gen_user_data *data, void * 
restrict dst,\n%sconst struct %s * restrict values)\n{" %
   (name, ' ' * (len(name) + 6), name))
@@ -597,6 +612,8 @@ class Parser(object):
 print("}\n")
 
 def emit_instruction(self):
+self.group.emit_inline_enums()
+
 name = self.instruction
 if not self.length == None:
 print('#define %-33s %6d' %
@@ -622,6 +639,8 @@ class Parser(object):
 self.emit_pack_function(self.instruction, self.group)
 
 def emit_register(self):
+self.group.emit_inline_enums()
+
 name = self.register
 if not self.reg_num == None:
 print('#define %-33s 0x%04x' %
@@ -635,6 +654,8 @@ class Parser(object):
 self.emit_pack_function(self.register, self.group)
 
 def emit_struct(self):
+self.group.emit_inline_enums()
+
 name = self.struct
 if not self.length == None:
 print('#define %-33s %6d' %
@@ -643,14 +664,14 @@ class Parser(object):
 self.emit_template_struct(self.struct, self.group)
 self.emit_pack_function(self.struct, self.group)
 
-def emit_enum(self):
-print('enum %s {' % self.gen_prefix(self.enum))
-for value in self.values:
-if self.prefix:
-name = self.prefix + "_" + value.name
+def emit_enum(self, name, prefix, values):
+print('enum %s {' % self.gen_prefix(name))
+for value in values:
+if prefix:
+value_name = prefix + "_" + value.name
 else:
-name = value.name
-prin

[Mesa-dev] [PATCH 4/4] intel/genxml: Make tile mode an inline enum

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen8.xml | 2 +-
 src/intel/genxml/gen9.xml | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 04d3590..85f1c73 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -669,7 +669,7 @@
   
   
 
-
+
   
   
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 958f6df..3548891 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -695,7 +695,7 @@
   
   
 
-
+
   
   
   
-- 
2.9.3

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[Mesa-dev] [PATCH 3/4] intel/genxml: Make color clamp range an inline enum

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 8 
 src/intel/genxml/gen7.xml  | 8 
 src/intel/genxml/gen75.xml | 8 
 src/intel/genxml/gen8.xml  | 8 
 src/intel/genxml/gen9.xml  | 8 
 5 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 575ba86..83a164b 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -442,10 +442,10 @@
 
 
 
-
-  
-  
-  
+
+  
+  
+  
 
 
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 6bde403..ce713ac 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -497,10 +497,10 @@
 
 
 
-
-  
-  
-  
+
+  
+  
+  
 
 
 
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 2ff75bd..3b4650a 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -507,10 +507,10 @@
 
 
 
-
-  
-  
-  
+
+  
+  
+  
 
 
 
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index ebaf73a..04d3590 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -525,10 +525,10 @@
 
 
 
-
-  
-  
-  
+
+  
+  
+  
 
 
 
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 211dd53..958f6df 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -534,10 +534,10 @@
 
 
 
-
-  
-  
-  
+
+  
+  
+  
 
 
 
-- 
2.9.3

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[Mesa-dev] [PATCH 1/4] gen_pack_header: Add helpers for determining field type

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen_pack_header.py | 23 +--
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/src/intel/genxml/gen_pack_header.py 
b/src/intel/genxml/gen_pack_header.py
index 1024745..001ad17 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -246,6 +246,17 @@ class Field(object):
 self.type = 'sfixed'
 self.fractional_size = int(sfixed_match.group(2))
 
+def is_builtin_type(self):
+builtins =  [ 'address', 'bool', 'float', 'ufixed',
+  'offset', 'sfixed', 'offset', 'int', 'uint', 'mbo' ]
+return self.type in builtins
+
+def is_struct_type(self):
+return self.type in self.parser.structs
+
+def is_enum_type(self):
+return self.type in self.parser.enums
+
 def emit_template_struct(self, dim):
 if self.type == 'address':
 type = '__gen_address_type'
@@ -265,9 +276,9 @@ class Field(object):
 type = 'int32_t'
 elif self.type == 'uint':
 type = 'uint32_t'
-elif self.type in self.parser.structs:
+elif self.is_struct_type():
 type = 'struct ' + self.parser.gen_prefix(safe_name(self.type))
-elif self.type in self.parser.enums:
+elif self.is_enum_type():
 type = 'enum ' + self.parser.gen_prefix(safe_name(self.type))
 elif self.type == 'mbo':
 return
@@ -381,7 +392,7 @@ class Group(object):
 if len(dw.fields) == 1:
 field = dw.fields[0]
 name = field.name + field.dim
-if field.type in self.parser.structs and field.start % 32 == 0:
+if field.is_struct_type() and field.start % 32 == 0:
 print("")
 print("   %s_pack(data, [%d], >%s);" %
   (self.parser.gen_prefix(safe_name(field.type)), 
index, name))
@@ -391,7 +402,7 @@ class Group(object):
 # to the dword for those fields.
 field_index = 0
 for field in dw.fields:
-if type(field) is Field and field.type in self.parser.structs:
+if type(field) is Field and field.is_struct_type():
 name = field.name + field.dim
 print("")
 print("   uint32_t v%d_%d;" % (index, field_index))
@@ -428,7 +439,7 @@ class Group(object):
 elif field.type == "uint":
 s = "__gen_uint(values->%s, %d, %d)" % \
 (name, field.start - dword_start, field.end - 
dword_start)
-elif field.type in self.parser.enums:
+elif field.is_enum_type():
 s = "__gen_uint(values->%s, %d, %d)" % \
 (name, field.start - dword_start, field.end - 
dword_start)
 elif field.type == "int":
@@ -448,7 +459,7 @@ class Group(object):
 elif field.type == 'sfixed':
 s = "__gen_sfixed(values->%s, %d, %d, %d)" % \
 (name, field.start - dword_start, field.end - 
dword_start, field.fractional_size)
-elif field.type in self.parser.structs:
+elif field.is_struct_type():
 s = "__gen_uint(v%d_%d, %d, %d)" % \
 (index, field_index, field.start - dword_start, 
field.end - dword_start)
 field_index = field_index + 1
-- 
2.9.3

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[Mesa-dev] [PATCH 09/18 v2] intel/genxml: Use enum 3D_Prim_Topo_Type where applicable

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---

> Missing gen75?

Yes, added here. I also found that I'd replaced

  

with

  

in a couple of places (3DSTATE_GS) - fixed as well.

 src/intel/genxml/gen6.xml  | 2 +-
 src/intel/genxml/gen7.xml  | 6 +++---
 src/intel/genxml/gen75.xml | 6 +++---
 src/intel/genxml/gen8.xml  | 8 
 src/intel/genxml/gen9.xml  | 8 
 5 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 7734ef6..a6a2737 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -730,7 +730,7 @@
   
   
 
-
+
 
 
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 78c5ede..3b41de9 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -810,7 +810,7 @@
   
   
 
-
+
 
 
 
@@ -1141,7 +1141,7 @@
 
 
 
-
+
 
 
 
@@ -2354,7 +2354,7 @@
   
 
 
-
+
   
 
   
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 2be1cfd..ec1621b 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -832,7 +832,7 @@
   
   
 
-
+
 
 
 
@@ -1360,7 +1360,7 @@
 
 
 
-
+
 
 
 
@@ -2756,7 +2756,7 @@
   
 
 
-
+
   
 
   
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index e822044..d90de08 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -901,7 +901,7 @@
   
   
 
-
+
 
 
 
@@ -1423,7 +1423,7 @@
 
 
 
-
+
 
 
 
@@ -2234,7 +2234,7 @@
 
 
 
-
+
   
 
   
@@ -3019,7 +3019,7 @@
   
 
 
-
+
   
 
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 3232cf9..ec16d73 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -953,7 +953,7 @@
   
   
 
-
+
 
 
 
@@ -1526,7 +1526,7 @@
 
 
 
-
+
 
 
 
@@ -2459,7 +2459,7 @@
 
 
 
-
+
   
 
   
@@ -3297,7 +3297,7 @@
   
 
 
-
+
   
 
   
-- 
2.9.3

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[Mesa-dev] [PATCH 04/18 v2] anv: Emit cherryview SF state without including gen9_pack.h

[Kristian H. Kristensen]

Cleaner this way and we avoid including gen9_pack.h when we compile with
gen8_pack.h. We also avoid the if (cherryview) condition for non-gen8
gens that don't need it.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---

v2: Add prototype and call gen9 emit function from gen8 when we're on 
cherryview.

 src/intel/vulkan/gen8_cmd_buffer.c | 36 +++-
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/src/intel/vulkan/gen8_cmd_buffer.c 
b/src/intel/vulkan/gen8_cmd_buffer.c
index 6578c22..3e4aa9b 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -120,30 +120,40 @@ __emit_genx_sf_state(struct anv_cmd_buffer *cmd_buffer)
cmd_buffer->state.pipeline->gen8.sf);
 }
 
-#include "genxml/gen9_pack.h"
-static void
-__emit_gen9_sf_state(struct anv_cmd_buffer *cmd_buffer)
+void
+gen9_emit_sf_state(struct anv_cmd_buffer *cmd_buffer);
+
+#if GEN_GEN == 9
+
+void
+gen9_emit_sf_state(struct anv_cmd_buffer *cmd_buffer)
 {
-  uint32_t sf_dw[GENX(3DSTATE_SF_length)];
-  struct GEN9_3DSTATE_SF sf = {
- GEN9_3DSTATE_SF_header,
- .LineWidth = cmd_buffer->state.dynamic.line_width,
-  };
-  GEN9_3DSTATE_SF_pack(NULL, sf_dw, );
-  /* FIXME: gen9.fs */
-  anv_batch_emit_merge(_buffer->batch, sf_dw,
-   cmd_buffer->state.pipeline->gen8.sf);
+   __emit_genx_sf_state(cmd_buffer);
 }
 
+#endif
+
+#if GEN_GEN == 8
+
 static void
 __emit_sf_state(struct anv_cmd_buffer *cmd_buffer)
 {
if (cmd_buffer->device->info.is_cherryview)
-  __emit_gen9_sf_state(cmd_buffer);
+  gen9_emit_sf_state(cmd_buffer);
else
   __emit_genx_sf_state(cmd_buffer);
 }
 
+#else
+
+static void
+__emit_sf_state(struct anv_cmd_buffer *cmd_buffer)
+{
+   __emit_genx_sf_state(cmd_buffer);
+}
+
+#endif
+
 void
 genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
 {
-- 
2.9.3

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[Mesa-dev] [PATCH 11/18] intel/genxml: Use enum 3D_Stencil_Operation where applicable

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 39 ---
 src/intel/genxml/gen7.xml  | 41 +
 src/intel/genxml/gen75.xml | 41 +
 src/intel/genxml/gen8.xml  | 12 ++--
 src/intel/genxml/gen9.xml  | 12 ++--
 5 files changed, 62 insertions(+), 83 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 732a76c..ae8978b 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -45,6 +45,17 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+  
+
   
 
 
@@ -470,32 +481,14 @@
   
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
+
+
+
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
-
+
+
 
 
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index d18b02a..f650e76 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -66,6 +66,17 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+  
+
   
 
 
@@ -525,33 +536,15 @@
   
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
+
+
+
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
+
+
+
 
 
 
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 123c9e3..4123fc5 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -66,6 +66,17 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+  
+
   
 
 
@@ -535,33 +546,15 @@
   
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
+
+
+
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
+
+
+
 
 
 
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 58feef3..94a415b 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -2370,13 +2370,13 @@
 
 
 
-
-
-
+
+
+
 
-
-
-
+
+
+
 
 
 
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index b9dcc54..bda1c73 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -2595,13 +2595,13 @@
 
 
 
-
-
-
+
+
+
 
-
-
-
+
+
+
 
 
 
-- 
2.9.3

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[Mesa-dev] [PATCH 12/18] intel/genxml: Use enum 3D_Vertex_Component_Control where applicable

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 8 
 src/intel/genxml/gen7.xml  | 8 
 src/intel/genxml/gen75.xml | 8 
 src/intel/genxml/gen8.xml  | 8 
 src/intel/genxml/gen9.xml  | 8 
 5 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index ae8978b..569e9a2 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -316,10 +316,10 @@
 
 
 
-
-
-
-
+
+
+
+
   
 
   
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index f650e76..24dfe99 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -362,10 +362,10 @@
 
 
 
-
-
-
-
+
+
+
+
   
 
   
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 4123fc5..29241b4 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -372,10 +372,10 @@
 
 
 
-
-
-
-
+
+
+
+
   
 
   
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 94a415b..df843f1 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -456,10 +456,10 @@
 
 
 
-
-
-
-
+
+
+
+
   
 
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index bda1c73..5c91074 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -465,10 +465,10 @@
 
 
 
-
-
-
-
+
+
+
+
   
 
   
-- 
2.9.3

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[Mesa-dev] [PATCH 05/18] intel/genxml: Allow referencing enums in type attributes

[Kristian H. Kristensen]

This lets us reference enums in the type attribute of a field.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen_pack_header.py | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/intel/genxml/gen_pack_header.py 
b/src/intel/genxml/gen_pack_header.py
index 83e3fde..f09667d 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -267,6 +267,8 @@ class Field(object):
 type = 'uint32_t'
 elif self.type in self.parser.structs:
 type = 'struct ' + self.parser.gen_prefix(safe_name(self.type))
+elif self.type in self.parser.enums:
+type = 'uint32_t'
 elif self.type == 'mbo':
 return
 else:
@@ -426,6 +428,9 @@ class Group(object):
 elif field.type == "uint":
 s = "__gen_uint(values->%s, %d, %d)" % \
 (name, field.start - dword_start, field.end - 
dword_start)
+elif field.type in self.parser.enums:
+s = "__gen_uint(values->%s, %d, %d)" % \
+(name, field.start - dword_start, field.end - 
dword_start)
 elif field.type == "int":
 s = "__gen_sint(values->%s, %d, %d)" % \
 (name, field.start - dword_start, field.end - 
dword_start)
@@ -484,6 +489,7 @@ class Parser(object):
 
 self.instruction = None
 self.structs = {}
+self.enums = {}
 self.registers = {}
 
 def gen_prefix(self, name):
@@ -530,6 +536,7 @@ class Parser(object):
 elif name == "enum":
 self.values = []
 self.enum = safe_name(attrs["name"])
+self.enums[attrs["name"]] = 1
 if "prefix" in attrs:
 self.prefix = safe_name(attrs["prefix"])
 else:
-- 
2.9.3

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[Mesa-dev] [PATCH 15/18] intel/genxml: Add and use enum for tile mode

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen8.xml |  9 -
 src/intel/genxml/gen9.xml | 14 --
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 165ff25..17234f6 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -401,6 +401,13 @@
 
   
 
+  
+
+
+
+
+  
+
   
 
 
@@ -670,7 +677,7 @@
   
   
 
-
+
   
   
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index ec85494..c9fb770 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -422,6 +422,13 @@
 
   
 
+  
+
+
+
+
+  
+
   
 
 
@@ -696,12 +703,7 @@
   
   
 
-
-  
-  
-  
-  
-
+
 
 
 
-- 
2.9.3

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[Mesa-dev] [PATCH 04/18] anv: Emit cherryview SF state without including gen9_pack.h

[Kristian H. Kristensen]

Cleaner this way and we avoid including gen9_pack.h when we compile with
gen8_pack.h. We also avoid the if (cherryview) condition for non-gen8
gens that don't need it.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/vulkan/gen8_cmd_buffer.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/gen8_cmd_buffer.c 
b/src/intel/vulkan/gen8_cmd_buffer.c
index 6578c22..20cde9f 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -120,7 +120,8 @@ __emit_genx_sf_state(struct anv_cmd_buffer *cmd_buffer)
cmd_buffer->state.pipeline->gen8.sf);
 }
 
-#include "genxml/gen9_pack.h"
+#if GEN_GEN == 9
+
 static void
 __emit_gen9_sf_state(struct anv_cmd_buffer *cmd_buffer)
 {
@@ -144,6 +145,16 @@ __emit_sf_state(struct anv_cmd_buffer *cmd_buffer)
   __emit_genx_sf_state(cmd_buffer);
 }
 
+#else
+
+static void
+__emit_sf_state(struct anv_cmd_buffer *cmd_buffer)
+{
+   __emit_genx_sf_state(cmd_buffer);
+}
+
+#endif
+
 void
 genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
 {
-- 
2.9.3

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[Mesa-dev] [PATCH 09/18] intel/genxml: Use enum 3D_Prim_Topo_Type where applicable

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml | 2 +-
 src/intel/genxml/gen7.xml | 6 +++---
 src/intel/genxml/gen8.xml | 8 
 src/intel/genxml/gen9.xml | 8 
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 7734ef6..a6a2737 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -730,7 +730,7 @@
   
   
 
-
+
 
 
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 78c5ede..2a06af8 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -810,7 +810,7 @@
   
   
 
-
+
 
 
 
@@ -1141,7 +1141,7 @@
 
 
 
-
+
 
 
 
@@ -2354,7 +2354,7 @@
   
 
 
-
+
   
 
   
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index e822044..3fe1851 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -901,7 +901,7 @@
   
   
 
-
+
 
 
 
@@ -1423,7 +1423,7 @@
 
 
 
-
+
 
 
 
@@ -2234,7 +2234,7 @@
 
 
 
-
+
   
 
   
@@ -3019,7 +3019,7 @@
   
 
 
-
+
   
 
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 3232cf9..ec16d73 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -953,7 +953,7 @@
   
   
 
-
+
 
 
 
@@ -1526,7 +1526,7 @@
 
 
 
-
+
 
 
 
@@ -2459,7 +2459,7 @@
 
 
 
-
+
   
 
   
@@ -3297,7 +3297,7 @@
   
 
 
-
+
   
 
   
-- 
2.9.3

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[Mesa-dev] [PATCH 14/18] intel/genxml: Use enum 3D_Logic_Op_Function where applicable

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 38 --
 src/intel/genxml/gen7.xml  | 38 --
 src/intel/genxml/gen75.xml | 38 --
 src/intel/genxml/gen8.xml  |  2 +-
 src/intel/genxml/gen9.xml  |  2 +-
 5 files changed, 62 insertions(+), 56 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 78446e4..be6c0ac 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -86,6 +86,25 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
   
 
 
@@ -417,24 +436,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
 
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 0e33ba2..66cf64a 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -118,6 +118,25 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
   
 
 
@@ -472,24 +491,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
 
 
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index fbe782b..2d9a437 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -118,6 +118,25 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
   
 
 
@@ -482,24 +501,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
 
 
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index dca22fa..165ff25 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -523,7 +523,7 @@
 
   
 
-
+
 
 
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 5ba6ba1..ec85494 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -532,7 +532,7 @@
 
   
 
-
+
 
 
   
-- 
2.9.3

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[Mesa-dev] [PATCH 06/18] intel/genxml: Remove duplicate COMPAREFUNCTION values

[Kristian H. Kristensen]

These values were defined both as an enum and as inline values. Remove
the inline values and reference the 3D_Compare_Function enum instead.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 44 
 src/intel/genxml/gen7.xml  | 44 
 src/intel/genxml/gen75.xml | 44 
 3 files changed, 12 insertions(+), 120 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 2e737cf..7734ef6 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -427,16 +427,7 @@
   
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
 
 
@@ -478,16 +469,7 @@
 
   
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
   
@@ -502,16 +484,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
   
@@ -529,16 +502,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index ebec118..78c5ede 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -482,16 +482,7 @@
   
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
 
 
@@ -533,16 +524,7 @@
 
   
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
   
@@ -557,16 +539,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
   
@@ -584,16 +557,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
 
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 3d5d333..2be1cfd 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -492,16 +492,7 @@
   
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
 
 
@@ -543,16 +534,7 @@
 
   
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
   
@@ -567,16 +549,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
   
@@ -594,16 +567,7 @@
 
 
 
-
-  
-  
-  
-  
-  
-  
-  
-  
-
+
 
   
 
-- 
2.9.3

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[Mesa-dev] [PATCH 03/18] anv: Don't include two different pack headers

[Kristian H. Kristensen]

The batch chain logic only needs the pre-gen8 size of
MI_BATCH_BUFFER_START, which seems like something we can make a special
case for. The other two gen7 references, MI_BATCH_BUFFER_END and
MI_NOOP, are the same on all gens.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/vulkan/anv_batch_chain.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/anv_batch_chain.c 
b/src/intel/vulkan/anv_batch_chain.c
index cca8867..f585946 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -29,7 +29,6 @@
 
 #include "anv_private.h"
 
-#include "genxml/gen7_pack.h"
 #include "genxml/gen8_pack.h"
 
 #include "util/debug.h"
@@ -449,6 +448,9 @@ emit_batch_buffer_start(struct anv_cmd_buffer *cmd_buffer,
 * gens.
 */
 
+#define GEN7_MI_BATCH_BUFFER_START_length  2
+#define GEN7_MI_BATCH_BUFFER_START_length_bias  2
+
const uint32_t gen7_length =
   GEN7_MI_BATCH_BUFFER_START_length - 
GEN7_MI_BATCH_BUFFER_START_length_bias;
const uint32_t gen8_length =
@@ -779,11 +781,11 @@ anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer 
*cmd_buffer)
   cmd_buffer->batch.end += GEN8_MI_BATCH_BUFFER_START_length * 4;
   assert(cmd_buffer->batch.end == batch_bo->bo.map + batch_bo->bo.size);
 
-  anv_batch_emit(_buffer->batch, GEN7_MI_BATCH_BUFFER_END, bbe);
+  anv_batch_emit(_buffer->batch, GEN8_MI_BATCH_BUFFER_END, bbe);
 
   /* Round batch up to an even number of dwords. */
   if ((cmd_buffer->batch.next - cmd_buffer->batch.start) & 4)
- anv_batch_emit(_buffer->batch, GEN7_MI_NOOP, noop);
+ anv_batch_emit(_buffer->batch, GEN8_MI_NOOP, noop);
 
   cmd_buffer->exec_mode = ANV_CMD_BUFFER_EXEC_MODE_PRIMARY;
}
-- 
2.9.3

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[Mesa-dev] [PATCH 17/18] intel/gen_pack_header: Add unpack functions

[Kristian H. Kristensen]

Useful for people writing Intel GPU simulators...

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen_pack_header.py | 108 
 1 file changed, 108 insertions(+)

diff --git a/src/intel/genxml/gen_pack_header.py 
b/src/intel/genxml/gen_pack_header.py
index 1024745..529f572 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -160,6 +160,46 @@ __gen_ufixed(float v, uint32_t start, uint32_t end, 
uint32_t fract_bits)
return uint_val << start;
 }
 
+static inline uint64_t
+__gen_unpack_uint(uint64_t dw, uint32_t start, uint32_t end)
+{
+   uint64_t mask = (~0ul >> (64 - (end - start + 1)));
+
+   return (dw >> start) & mask;
+}
+
+static inline int64_t
+__gen_unpack_sint(uint64_t dw, uint32_t start, uint32_t end)
+{
+   return ((int64_t) dw << (63 - end)) >> (64 - (end - start + 1));
+}
+
+static inline uint64_t
+__gen_unpack_float(uint64_t dw)
+{
+   return ((union __gen_value) { .dw = (dw) }).f;
+}
+
+static inline uint64_t
+__gen_unpack_offset(uint64_t dw, uint32_t start, uint32_t end)
+{
+   uint64_t mask = (~0ul >> (64 - (end - start + 1))) << start;
+
+   return dw & mask;
+}
+
+static inline float
+__gen_unpack_ufixed(uint64_t dw, uint32_t start, uint32_t end, uint32_t 
fract_bits)
+{
+   return (float) __gen_unpack_uint(dw, start, end) / (1 << fract_bits);
+}
+
+static inline float
+__gen_unpack_sfixed(uint64_t dw, uint32_t start, uint32_t end, uint32_t 
fract_bits)
+{
+   return (float) __gen_unpack_sint(dw, start, end) / (1 << fract_bits);
+}
+
 #ifndef __gen_address_type
 #error #define __gen_address_type before including this file
 #endif
@@ -476,6 +516,60 @@ class Group(object):
 print("   dw[%d] = %s;" % (index, v))
 print("   dw[%d] = %s >> 32;" % (index + 1, v))
 
+def emit_unpack_function(self, start):
+dwords = {}
+self.collect_dwords(dwords, 0, "")
+
+for index in dwords.keys():
+dw = dwords[index]
+if index > 0 and index - 1 in dwords and dw == dwords[index - 1]:
+continue
+
+print("")
+print("   const uint32_t dw%d __attribute__((unused)) = dw[%d];" % 
(index, index))
+
+dword_start = index * 32
+
+field_index = 0
+for field in dw.fields:
+if field.type != "mbo":
+name = field.name + field.dim
+
+if field.type == "address":
+print("   const uint64_t qw%d __attribute__((unused)) = 
*(uint64_t *) [%d];" % (index, index))
+print("   values->%s = __gen_unpack_address(qw%d, 0, 63);" 
% \
+  (name, index))
+elif field.type == "uint":
+print("   values->%s = __gen_unpack_uint(dw%d, %d, %d);" % 
\
+  (name, index, field.start - dword_start, field.end - 
dword_start))
+elif field.type in self.parser.enums:
+print("   values->%s = __gen_unpack_uint(dw%d, %d, %d);" % 
\
+  (name, index, field.start - dword_start, field.end - 
dword_start))
+elif field.type == "int":
+print("   values->%s = __gen_unpack_sint(dw%d, %d, %d);" % 
\
+  (name, index, field.start - dword_start, field.end - 
dword_start))
+elif field.type == "bool":
+print("   values->%s = __gen_unpack_uint(dw%d, %d, %d);" % 
\
+  (name, index, field.start - dword_start, field.end - 
dword_start))
+elif field.type == "float":
+print("   values->%s = __gen_unpack_float(dw%d);" % (name, 
index))
+elif field.type == "offset":
+print("   values->%s = __gen_unpack_offset(dw%d, %d, %d);" 
% \
+  (name, index, field.start - dword_start, field.end - 
dword_start))
+elif field.type == 'ufixed':
+print("   values->%s = __gen_unpack_ufixed(dw%d, %d, %d, 
%d);" % \
+  (name, index, field.start - dword_start, field.end - 
dword_start, field.fractional_size))
+elif field.type == 'sfixed':
+print("   values->%s = __gen_unpack_sfixed(dw%d, %d, %d, 
%d);" % \
+  (name, index, field.start - dword_start, field.end - 
dword_start, field.fractional_size))
+elif field.type in self.parser.structs:
+print("/* struct %s */" % \
+  (field.type))

[Mesa-dev] [PATCH 16/18] intel/genxml: Fix ksp for INTERFACE_DESCRIPTOR_DATA

[Kristian H. Kristensen]

This one was split across two dwords as "Kernel Start Pointer" and
"Kernel Start Pointer High", which looks like it works when the driver
only accesses "Kernel Start Pointer". This breaks, of course, with BO
offsets > 4G.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen8.xml | 3 +--
 src/intel/genxml/gen9.xml | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 17234f6..6769077 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -595,8 +595,7 @@
   
 
   
-
-
+
 
   
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index c9fb770..3b8ffeb 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -605,8 +605,7 @@
   
 
   
-
-
+
 
   
   
-- 
2.9.3

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[Mesa-dev] [PATCH 18/18] aubinator: Add support for enum types

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/tools/decoder.c | 97 ++-
 src/intel/tools/decoder.h | 36 +++---
 2 files changed, 93 insertions(+), 40 deletions(-)

diff --git a/src/intel/tools/decoder.c b/src/intel/tools/decoder.c
index 633251a..defb087 100644
--- a/src/intel/tools/decoder.c
+++ b/src/intel/tools/decoder.c
@@ -52,6 +52,8 @@ struct gen_spec {
struct gen_group *structs[256];
int nregisters;
struct gen_group *registers[256];
+   int nenums;
+   struct gen_enum *enums[256];
 };
 
 struct location {
@@ -66,10 +68,14 @@ struct parser_context {
const char *platform;
 
struct gen_group *group;
+   struct gen_enum *enoom;
 
int nfields;
struct gen_field *fields[128];
 
+   int nvalues;
+   struct gen_value *values[256];
+
struct gen_spec *spec;
 };
 
@@ -105,6 +111,16 @@ gen_spec_find_register(struct gen_spec *spec, uint32_t 
offset)
return NULL;
 }
 
+struct gen_enum *
+gen_spec_find_enum(struct gen_spec *spec, const char *name)
+{
+   for (int i = 0; i < spec->nenums; i++)
+  if (strcmp(spec->enums[i]->name, name) == 0)
+ return spec->enums[i];
+
+   return NULL;
+}
+
 uint32_t
 gen_spec_get_gen(struct gen_spec *spec)
 {
@@ -169,6 +185,20 @@ create_group(struct parser_context *ctx, const char *name, 
const char **atts)
return group;
 }
 
+static struct gen_enum *
+create_enum(struct parser_context *ctx, const char *name, const char **atts)
+{
+   struct gen_enum *e;
+
+   e = xzalloc(sizeof(*e));
+   if (name)
+  e->name = xstrdup(name);
+
+   e->nvalues = 0;
+
+   return e;
+}
+
 static void
 get_group_offset_count(struct parser_context *ctx, const char *name,
const char **atts, uint32_t *offset, uint32_t *count)
@@ -248,6 +278,7 @@ string_to_type(struct parser_context *ctx, const char *s)
 {
int i, f;
struct gen_group *g;
+   struct gen_enum *e;
 
if (strcmp(s, "int") == 0)
   return (struct gen_type) { .kind = GEN_TYPE_INT };
@@ -267,6 +298,8 @@ string_to_type(struct parser_context *ctx, const char *s)
   return (struct gen_type) { .kind = GEN_TYPE_SFIXED, .i = i, .f = f };
else if (g = gen_spec_find_struct(ctx->spec, s), g != NULL)
   return (struct gen_type) { .kind = GEN_TYPE_STRUCT, .gen_struct = g };
+   else if (e = gen_spec_find_enum(ctx->spec, s), e != NULL)
+  return (struct gen_type) { .kind = GEN_TYPE_ENUM, .gen_enum = e };
else if (strcmp(s, "mbo") == 0)
   return (struct gen_type) { .kind = GEN_TYPE_MBO };
else
@@ -366,23 +399,9 @@ start_element(void *data, const char *element_name, const 
char **atts)
 ctx->group->group_count--;
   } while (ctx->group->group_count > 0);
} else if (strcmp(element_name, "enum") == 0) {
+  ctx->enoom = create_enum(ctx, name, atts);
} else if (strcmp(element_name, "value") == 0) {
-  if (ctx->nfields > 0) {
- struct gen_field *field = ctx->fields[ctx->nfields - 1];
- if (field->n_allocated_values <= field->n_values) {
-if (field->n_allocated_values == 0) {
-   field->n_allocated_values = 2;
-   field->values =
-  xzalloc(sizeof(field->values[0]) * 
field->n_allocated_values);
-} else {
-   field->n_allocated_values *= 2;
-   field->values =
-  realloc(field->values,
-  sizeof(field->values[0]) * 
field->n_allocated_values);
-}
- }
- field->values[field->n_values++] = create_value(ctx, atts);
-  }
+  ctx->values[ctx->nvalues++] = create_value(ctx, atts);
}
 }
 
@@ -390,6 +409,7 @@ static void
 end_element(void *data, const char *name)
 {
struct parser_context *ctx = data;
+   struct gen_spec *spec = ctx->spec;
 
if (strcmp(name, "instruction") == 0 ||
   strcmp(name, "struct") == 0 ||
@@ -414,7 +434,6 @@ end_element(void *data, const char *name)
  }
   }
 
-  struct gen_spec *spec = ctx->spec;
   if (strcmp(name, "instruction") == 0)
  spec->commands[spec->ncommands++] = group;
   else if (strcmp(name, "struct") == 0)
@@ -424,6 +443,23 @@ end_element(void *data, const char *name)
} else if (strcmp(name, "group") == 0) {
   ctx->group->group_offset = 0;
   ctx->group->group_count = 0;
+   } else if (strcmp(name, "field") == 0) {
+  assert(ctx->nfields > 0);
+  struct gen_field *field = ctx->fields[ctx->nfields - 1];
+  size_t size = ctx->nvalues * sizeof(ctx->values[0]);
+  field->inline_enum.values = xzalloc(size);
+  field->inline_enum.nvalues = ctx->nvalues;
+  memcpy(field->inline_

[Mesa-dev] [PATCH 07/18] intel/genxml: Emit genxml enums as C enums

[Kristian H. Kristensen]

The previous commits got rid of any clashes between #defines and enum
values and we can now emit the genxml enums as debugger friendly C
enums.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen_pack_header.py | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/intel/genxml/gen_pack_header.py 
b/src/intel/genxml/gen_pack_header.py
index f09667d..1024745 100644
--- a/src/intel/genxml/gen_pack_header.py
+++ b/src/intel/genxml/gen_pack_header.py
@@ -268,7 +268,7 @@ class Field(object):
 elif self.type in self.parser.structs:
 type = 'struct ' + self.parser.gen_prefix(safe_name(self.type))
 elif self.type in self.parser.enums:
-type = 'uint32_t'
+type = 'enum ' + self.parser.gen_prefix(safe_name(self.type))
 elif self.type == 'mbo':
 return
 else:
@@ -633,14 +633,14 @@ class Parser(object):
 self.emit_pack_function(self.struct, self.group)
 
 def emit_enum(self):
-print('/* enum %s */' % self.gen_prefix(self.enum))
+print('enum %s {' % self.gen_prefix(self.enum))
 for value in self.values:
 if self.prefix:
 name = self.prefix + "_" + value.name
 else:
 name = value.name
-print('#define %-36s %6d' % (name.upper(), value.value))
-print('')
+print('   %-36s = %6d,' % (name.upper(), value.value))
+print('};\n')
 
 def parse(self, filename):
 file = open(filename, "rb")
-- 
2.9.3

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[Mesa-dev] [PATCH 01/18] genxml: Add values for Barycentric Interpolation Mode

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 9 -
 src/intel/genxml/gen7.xml  | 9 -
 src/intel/genxml/gen75.xml | 9 -
 src/intel/genxml/gen8.xml  | 9 -
 src/intel/genxml/gen9.xml  | 9 -
 5 files changed, 40 insertions(+), 5 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 2d19305..2ad6172 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1499,7 +1499,14 @@
   
   
 
-
+
+  
+  
+  
+  
+  
+  
+
 
   
   
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 9d52aac..5e75c4c 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1931,7 +1931,14 @@
   
   
 
-
+
+  
+  
+  
+  
+  
+  
+
 
 
 
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index ab8bec6..b3d7e16 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -2204,7 +2204,14 @@
   
   
 
-
+
+  
+  
+  
+  
+  
+  
+
 
 
 
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 1fbf6d8..bad69a7 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -2323,7 +2323,14 @@
   
   
 
-
+
+  
+  
+  
+  
+  
+  
+
 
   
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 46b1ced..fb0a111 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -2548,7 +2548,14 @@
   
   
 
-
+
+  
+  
+  
+  
+  
+  
+
 
   
   
-- 
2.9.3

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[Mesa-dev] [PATCH 13/18] intel/genxml: Use blend function and factor enums where applicable

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 74 ++
 src/intel/genxml/gen7.xml  | 74 ++
 src/intel/genxml/gen75.xml | 74 ++
 src/intel/genxml/gen8.xml  | 12 
 src/intel/genxml/gen9.xml  | 20 ++---
 5 files changed, 124 insertions(+), 130 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 569e9a2..78446e4 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -34,6 +34,36 @@
 
   
 
+  
+
+
+
+
+
+  
+
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
   
 
 
@@ -373,44 +403,12 @@
   
 
 
-
-  
-  
-  
-  
-  
-
-
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
-  
-  
-  
-  
-  
-
-
-
+
+
+
+
+
+
 
 
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 24dfe99..0e33ba2 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -77,6 +77,36 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
+  
+
+
+
+
+
+  
+
   
 
 
@@ -428,44 +458,12 @@
   
 
 
-
-  
-  
-  
-  
-  
-
-
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
-  
-  
-  
-  
-  
-
-
-
+
+
+
+
+
+
 
 
 
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 29241b4..fbe782b 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -77,6 +77,36 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
+  
+
+
+
+
+
+  
+
   
 
 
@@ -438,44 +468,12 @@
   
 
 
-
-  
-  
-  
-  
-  
-
-
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-  
-
-
-
-  
-  
-  
-  
-  
-
-
-
+
+
+
+
+
+
 
 
 
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index df843f1..dca22fa 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -533,12 +533,12 @@
 
 
 
-
-
-
-
-
-
+
+
+
+
+
+
 
 
 
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 5c91074..5ba6ba1 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -542,12 +542,12 @@
 
 
 
-
-
-
-
-
-
+
+
+
+
+
+
 
 
 
@@ -1767,10 +1767,10 @@
 
 
 
-
-
-
-
+
+
+
+
 
 
   
-- 
2.9.3

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[Mesa-dev] [PATCH 10/18] intel/genxml: Use enum SURFACE_FORMAT where applicable

[Kristian H. Kristensen]

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen6.xml  | 4 ++--
 src/intel/genxml/gen7.xml  | 4 ++--
 src/intel/genxml/gen75.xml | 4 ++--
 src/intel/genxml/gen8.xml  | 4 ++--
 src/intel/genxml/gen9.xml  | 4 ++--
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index a6a2737..732a76c 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -302,7 +302,7 @@
   
 
 
-
+
 
 
 
@@ -560,7 +560,7 @@
 
   
 
-
+
 
 
 
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 2a06af8..d18b02a 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -348,7 +348,7 @@
   
 
 
-
+
 
 
 
@@ -620,7 +620,7 @@
   
 
 
-
+
 
   
   
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 2be1cfd..123c9e3 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -358,7 +358,7 @@
   
 
 
-
+
 
 
 
@@ -630,7 +630,7 @@
   
 
 
-
+
 
   
   
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 3fe1851..58feef3 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -453,7 +453,7 @@
   
 
 
-
+
 
 
 
@@ -659,7 +659,7 @@
   
 
 
-
+
 
   
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index ec16d73..b9dcc54 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -462,7 +462,7 @@
   
 
 
-
+
 
 
 
@@ -685,7 +685,7 @@
   
 
 
-
+
 
   
   
-- 
2.9.3

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[Mesa-dev] [PATCH 08/18] intel/genxml: Use 3D_Compare_Function for gen8+ test functions

[Kristian H. Kristensen]

When the state fields where shuffled around for gen8, the compare
function enums were downgraded to just uints. Change them to enum
3D_Compare_Function.

Signed-off-by: Kristian H. Kristensen <hoegsb...@gmail.com>
---
 src/intel/genxml/gen8.xml | 8 
 src/intel/genxml/gen9.xml | 8 
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 66d1639..e822044 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -551,7 +551,7 @@
 
 
 
-
+
 
 
 
@@ -2373,12 +2373,12 @@
 
 
 
-
+
 
 
 
-
-
+
+
 
 
 
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 3ba1104..3232cf9 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -560,7 +560,7 @@
 
 
 
-
+
 
 
 
@@ -2598,12 +2598,12 @@
 
 
 
-
+
 
 
 
-
-
+
+
 
 
 
-- 
2.9.3

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[Mesa-dev] [PATCH 0/18] Misc genxml patches

[Kristian H. Kristensen]

Hi,

Here's a few patches to the genxml files that I've been sitting on. The
main part of the series is about emitting C enums for genxml enums, so
it looks nice and pretty in gdb. It also adds support to aubinator so
it knows how to decode enums as well as the inline values Lionel added
support for:

Surface Array: true
Surface Format: 2 (R32G32B32A32_UINT)
Surface Vertical Alignment: 1 (VALIGN 4)

Look at that surface format being decoded! Patch 17 is "take it or
leave it". I know nothing in mesa needs unpack functions, but I wouldn't
mind having it upstream so I don't lose it (again).

Kristian

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