Re: [Mesa-dev] Etnaviv on mesa master vs. Array._DrawVAO
> I'm looking into forward porting laanwj's patches for GC7000 support to > current mesa master. Luckily most of it already got merged last November > with mostly only the texture descriptor support missing( > https://github.com/laanwj/mesa/commit/b71802207432543745dff471c68fbc40495b4858) > > Putting this on current master leads to this assertion in mesa when running > kmscube like: > > kmscube: ../src/gallium/drivers/etnaviv/etnaviv_state.c:536: > etna_vertex_elements_state_create: Assertion `element_size != 0 && end_offset > <= 256' failed. > > Printing the value there gives: > > etna_vertex_elements_state_create:535: size: 12, offset: 0, end_offset: 12 > etna_vertex_elements_state_create:535: size: 12, offset: 576, end_offset: > 588 > > I've traced this back to this commit: > > 19a91841c347107d877bc750371c5fa4e9b4de19 is the first bad commit > commit 19a91841c347107d877bc750371c5fa4e9b4de19 > Author: Mathias Fröhlich > Date: Sun Apr 1 20:18:36 2018 +0200 > > st/mesa: Use Array._DrawVAO in st_atom_array.c. > > Finally make use of the binding information in the VAO when > setting up arrays for draw. > > v2: Emit less relocations also for interleaved userspace arrays. > > Reviewed-by: Brian Paul > Signed-off-by: Mathias Fröhlich > > And indeed commits prior to that one work as expected. Any hints what > would be the right fix to not trigger the assert? Hmm strange, So on etnaviv devices, as far as I know, the maximum 'stride' between vertices is 256. This means that a starting offset of 576 is not possible. (even more, it says size=12, so I'm really confused why it is requesting an index of 576 into that, it looks invalid) Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 5/7] gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S, _BUFFERS}
On Thu, Aug 30, 2018 at 03:40:16PM +0200, Erik Faye-Lund wrote:
> This moves the evergreen-specific max-sizes out as a driver-cap, so
> other drivers with less strict requirements also can use hw-atomics.
>
> Remove ssbo_atomic as it's no longer needed.
>
> We should now be able to use hw-atomics for some stages and not for
> other, if needed.
>
> Signed-off-by: Erik Faye-Lund
Etnaviv part
Reviewed-by: Wladimir J. van der Laan
> diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c
> b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> index 108b97d35c..95166a2db1 100644
> --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
> +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> @@ -372,6 +372,11 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
>return 0;
> case PIPE_CAP_UMA:
>return 1;
> +
> + /* hw atomic counters */
> + case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
> + case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
> + return 0;
> }
>
> debug_printf("unknown param %d", param);
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Re: [Mesa-dev] [PATCH 4/7] gallium: add PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS
On Thu, Aug 30, 2018 at 03:40:15PM +0200, Erik Faye-Lund wrote: > This gets rid of a r600 specific hack in the state-tracker, and prepares > for other drivers to be able to use hw-atomics. > > While we're at it, clean up some indentation in the various drivers. > > Signed-off-by: Erik Faye-Lund Etnaviv part Reviewed-by: Wladimir J. van der Laan > diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c > b/src/gallium/drivers/etnaviv/etnaviv_screen.c > index 9669bd2f60..108b97d35c 100644 > --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c > +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c > @@ -289,8 +289,11 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum > pipe_cap param) > case PIPE_CAP_MAX_GS_INVOCATIONS: >return 32; > > + /* shader buffer objects */ > case PIPE_CAP_MAX_SHADER_BUFFER_SIZE: >return 1 << 27; > + case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS: > + return 0; > > /* Stream output. */ > case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v3 0/8] freedreno: a2xx improvements
> Patchset looks reasonable to me, from a quick look. Testing a22x > isn't so easy without resurrecting an ancient downstream kernel for > old snadragon devices, so I think it is ok to ignore that. If the Do you mean: - try to keep supporting a22x on best-effort basis by providing fallback behavior where uncertain, or - ignore a22x completely and evolve the driver to a20x? > rnndb bits are merged already, then: I'd swear those bits were merged in rnndb, but they aren't! So the commit id in 1/8 was wrong all the time. Pushed as: b8fb7978e7ae106d0d11d0b238ab2ba2d4dd9d43. > Reviewed-by: Rob Clark <robdcl...@gmail.com> Thanks! Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v3 6/8] freedreno: a2xx: Compressed textures support
Add support for: - PIPE_FORMAT_ETC1_RGB8 - PIPE_FORMAT_DXT1_RGB - PIPE_FORMAT_DXT1_RGBA - PIPE_FORMAT_DXT3_RGBA - PIPE_FORMAT_DXT5_RGBA Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> --- src/gallium/drivers/freedreno/a2xx/fd2_util.c | 11 +++ 1 file changed, 11 insertions(+) Change since v2: spaces->tabs diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_util.c b/src/gallium/drivers/freedreno/a2xx/fd2_util.c index 25f2bf4..ee4a4d6 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_util.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_util.c @@ -183,6 +183,17 @@ fd2_pipe2surface(enum pipe_format format) case PIPE_FORMAT_R32G32B32A32_FLOAT: return FMT_32_32_32_32_FLOAT; + /* Compressed textures. */ + case PIPE_FORMAT_ETC1_RGB8: + return FMT_ETC1_RGB; + case PIPE_FORMAT_DXT1_RGB: + case PIPE_FORMAT_DXT1_RGBA: + return FMT_DXT1; + case PIPE_FORMAT_DXT3_RGBA: + return FMT_DXT2_3; + case PIPE_FORMAT_DXT5_RGBA: + return FMT_DXT4_5; + /* YUV buffers. */ case PIPE_FORMAT_UYVY: return FMT_Cr_Y1_Cb_Y0; -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v3 5/8] freedreno: a2xx: Support TEXTURE_RECT
Denormalized texture coordinates are required for text rendering in
GALLIUM_HUD.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 3 ++-
src/gallium/drivers/freedreno/a2xx/ir-a2xx.c | 1 +
src/gallium/drivers/freedreno/a2xx/ir-a2xx.h | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 2ffd8cd..9f2fc61 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -791,6 +791,7 @@ translate_tex(struct fd2_compile_context *ctx,
instr = ir2_instr_create(next_exec_cf(ctx), IR2_FETCH);
instr->fetch.opc = TEX_FETCH;
instr->fetch.is_cube = (inst->Texture.Texture == TGSI_TEXTURE_3D);
+ instr->fetch.is_rect = (inst->Texture.Texture == TGSI_TEXTURE_RECT);
assert(inst->Texture.NumOffsets <= 1); // TODO what to do in other
cases?
/* save off the tex fetch to be patched later with correct const_idx: */
@@ -802,7 +803,7 @@ translate_tex(struct fd2_compile_context *ctx,
reg = add_src_reg(ctx, instr, coord);
/* blob compiler always sets 3rd component to same as 1st for 2d: */
- if (inst->Texture.Texture == TGSI_TEXTURE_2D)
+ if (inst->Texture.Texture == TGSI_TEXTURE_2D || inst->Texture.Texture
== TGSI_TEXTURE_RECT)
reg->swizzle[2] = reg->swizzle[0];
/* dst register needs to be marked for sync: */
diff --git a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
index 163c282..42a9ab4 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
+++ b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
@@ -341,6 +341,7 @@ static int instr_emit_fetch(struct ir2_instruction *instr,
tex->use_comp_lod = 1;
tex->use_reg_lod = !instr->fetch.is_cube;
tex->sample_location = SAMPLE_CENTER;
+ tex->tx_coord_denorm = instr->fetch.is_rect;
if (instr->pred != IR2_PRED_NONE) {
tex->pred_select = 1;
diff --git a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
index 36ed204..c4b6c18 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
+++ b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
@@ -74,6 +74,7 @@ struct ir2_instruction {
unsigned const_idx;
/* texture fetch specific: */
bool is_cube : 1;
+ bool is_rect : 1;
/* vertex fetch specific: */
unsigned const_idx_sel;
enum a2xx_sq_surfaceformat fmt;
--
2.7.4
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[Mesa-dev] [PATCH v3 8/8] freedreno: a2xx: Implement DP2 instruction
Use DOT2ADDv instruction with 0.0f constant add.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 21 +
1 file changed, 21 insertions(+)
Change since v2: spaces->tabs
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 84855a4..3ad47f9 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -987,6 +987,24 @@ translate_trig(struct fd2_compile_context *ctx,
add_src_reg(ctx, instr, _src);
}
+static void
+translate_dp2(struct fd2_compile_context *ctx,
+ struct tgsi_full_instruction *inst,
+ unsigned opc)
+{
+ struct tgsi_src_register tmp_const;
+ struct ir2_instruction *instr;
+ /* DP2ADD c,a,b -> dot2(a,b) + c */
+ /* for c we use the constant 0.0 */
+ instr = ir2_instr_create_alu(next_exec_cf(ctx), DOT2ADDv, ~0);
+ get_immediate(ctx, _const, fui(0.0f));
+ add_dst_reg(ctx, instr, >Dst[0].Register);
+ add_src_reg(ctx, instr, _const);
+ add_src_reg(ctx, instr, >Src[0].Register);
+ add_src_reg(ctx, instr, >Src[1].Register);
+ add_vector_clamp(inst, instr);
+}
+
/*
* Main part of compiler/translator:
*/
@@ -1054,6 +1072,9 @@ translate_instruction(struct fd2_compile_context *ctx,
instr = ir2_instr_create_alu(cf, ADDv, ~0);
add_regs_vector_2(ctx, inst, instr);
break;
+ case TGSI_OPCODE_DP2:
+ translate_dp2(ctx, inst, opc);
+ break;
case TGSI_OPCODE_DP3:
instr = ir2_instr_create_alu(cf, DOT3v, ~0);
add_regs_vector_2(ctx, inst, instr);
--
2.7.4
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[Mesa-dev] [PATCH v3 3/8] freedreno: a2xx: Fix fd2_tex_swiz
Compose swizzles using util_format_compose_swizzles instead
of the custom code (which somehow had a bug).
This makes the GL_ALPHA internal format work.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/freedreno/a2xx/fd2_util.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_util.c
b/src/gallium/drivers/freedreno/a2xx/fd2_util.c
index 0bdcfcd..25f2bf4 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_util.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_util.c
@@ -309,14 +309,14 @@ fd2_tex_swiz(enum pipe_format format, unsigned swizzle_r,
unsigned swizzle_g,
{
const struct util_format_description *desc =
util_format_description(format);
- uint8_t swiz[] = {
- swizzle_r, swizzle_g, swizzle_b, swizzle_a,
- PIPE_SWIZZLE_0, PIPE_SWIZZLE_1,
- PIPE_SWIZZLE_1, PIPE_SWIZZLE_1,
- };
+ unsigned char swiz[4] = {
+ swizzle_r, swizzle_g, swizzle_b, swizzle_a,
+ }, rswiz[4];
- return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(swiz[desc->swizzle[0]])) |
- A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(swiz[desc->swizzle[1]])) |
- A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(swiz[desc->swizzle[2]])) |
- A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(swiz[desc->swizzle[3]]));
+ util_format_compose_swizzles(desc->swizzle, swiz, rswiz);
+
+ return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(rswiz[0])) |
+ A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(rswiz[1])) |
+ A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(rswiz[2])) |
+ A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(rswiz[3]));
}
--
2.7.4
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[Mesa-dev] [PATCH v3 7/8] freedreno: a2xx: implement SEQ/SNE instructions
Extend translate_sge_slt to emit these, in analogous fashion
but using CNDEv.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
Change since v2: spaces->tabs
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 9f2fc61..84855a4 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -829,8 +829,10 @@ translate_tex(struct fd2_compile_context *ctx,
/* SGE(a,b) = GTE((b - a), 1.0, 0.0) */
/* SLT(a,b) = GTE((b - a), 0.0, 1.0) */
+/* SEQ(a,b) = EQU((b - a), 1.0, 0.0) */
+/* SNE(a,b) = EQU((b - a), 0.0, 1.0) */
static void
-translate_sge_slt(struct fd2_compile_context *ctx,
+translate_sge_slt_seq_sne(struct fd2_compile_context *ctx,
struct tgsi_full_instruction *inst, unsigned opc)
{
struct ir2_instruction *instr;
@@ -838,6 +840,7 @@ translate_sge_slt(struct fd2_compile_context *ctx,
struct tgsi_src_register tmp_src;
struct tgsi_src_register tmp_const;
float c0, c1;
+ instr_vector_opc_t vopc;
switch (opc) {
default:
@@ -845,10 +848,22 @@ translate_sge_slt(struct fd2_compile_context *ctx,
case TGSI_OPCODE_SGE:
c0 = 1.0;
c1 = 0.0;
+ vopc = CNDGTEv;
break;
case TGSI_OPCODE_SLT:
c0 = 0.0;
c1 = 1.0;
+ vopc = CNDGTEv;
+ break;
+ case TGSI_OPCODE_SEQ:
+ c0 = 0.0;
+ c1 = 1.0;
+ vopc = CNDEv;
+ break;
+ case TGSI_OPCODE_SNE:
+ c0 = 1.0;
+ c1 = 0.0;
+ vopc = CNDEv;
break;
}
@@ -859,7 +874,7 @@ translate_sge_slt(struct fd2_compile_context *ctx,
add_src_reg(ctx, instr, >Src[0].Register)->flags |=
IR2_REG_NEGATE;
add_src_reg(ctx, instr, >Src[1].Register);
- instr = ir2_instr_create_alu(next_exec_cf(ctx), CNDGTEv, ~0);
+ instr = ir2_instr_create_alu(next_exec_cf(ctx), vopc, ~0);
add_dst_reg(ctx, instr, >Dst[0].Register);
/* maybe should re-arrange the syntax some day, but
* in assembler/disassembler and what ir.c expects
@@ -1057,7 +1072,9 @@ translate_instruction(struct fd2_compile_context *ctx,
break;
case TGSI_OPCODE_SLT:
case TGSI_OPCODE_SGE:
- translate_sge_slt(ctx, inst, opc);
+ case TGSI_OPCODE_SEQ:
+ case TGSI_OPCODE_SNE:
+ translate_sge_slt_seq_sne(ctx, inst, opc);
break;
case TGSI_OPCODE_MAD:
instr = ir2_instr_create_alu(cf, MULADDv, ~0);
--
2.7.4
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[Mesa-dev] [PATCH v3 2/8] freedreno: a2xx: Change use of BLEND_ to BLEND2_
Change use of BLEND_ to BLEND2_, BLEND_* a3xx_rb_blend_opcode BLEND2_* is a2xx_rb_blend_opcode This makes no effective difference as the used enumerant has the same value (0), but the other enumerants do not match 1-to-1 so this will avoid future problems. Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> --- src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c index 0905ab6..46a7d18 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c @@ -293,10 +293,10 @@ fd2_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile) OUT_PKT3(ring, CP_SET_CONSTANT, 2); OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL)); OUT_RING(ring, A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(FACTOR_ONE) | - A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND_DST_PLUS_SRC) | + A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND2_DST_PLUS_SRC) | A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(FACTOR_ZERO) | A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(FACTOR_ONE) | - A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND_DST_PLUS_SRC) | + A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND2_DST_PLUS_SRC) | A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(FACTOR_ZERO)); OUT_PKT3(ring, CP_SET_CONSTANT, 3); -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v3 0/8] freedreno: a2xx improvements
While working on a205 support for i.MX51/53, I've also written some patches that are not specific to a20x but should apply to the whole a2xx range. As I'm figuring out how to handle backward compatibility to other a2xx, I think it makes sense to send these upstream already to reduce the patch stack. Changes since v1: - Split up rnndb patch into a patch that changes formate numeration and one that changes BLEND->BLEND2. - fd2_emit emit_texture const correctness. I checked that there is no Gallium capability to be set for TEXTURE_RECT. Changes since v2: - Tabs/spaces cleanup patch 6,7,8 Wladimir J. van der Laan (8): freedreno: a2xx: Update rnndb header for formats enumeration freedreno: a2xx: Change use of BLEND_ to BLEND2_ freedreno: a2xx: Fix fd2_tex_swiz freedreno: a2xx: Prevent crash in emit_texture if view is not set freedreno: a2xx: Support TEXTURE_RECT freedreno: a2xx: Compressed textures support freedreno: a2xx: implement SEQ/SNE instructions freedreno: a2xx: Implement DP2 instruction src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33 +++- src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 47 +-- src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 13 +-- src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 +- src/gallium/drivers/freedreno/a2xx/fd2_util.c | 29 +- src/gallium/drivers/freedreno/a2xx/ir-a2xx.c | 1 + src/gallium/drivers/freedreno/a2xx/ir-a2xx.h | 1 + 7 files changed, 90 insertions(+), 38 deletions(-) -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v3 4/8] freedreno: a2xx: Prevent crash in emit_texture if view is not set
Textures will sometimes be updated if texture view state was
un-set, without this change that causes an assertion crash or
segfault.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index 5a1db13..a787b71 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
@@ -125,8 +125,9 @@ emit_texture(struct fd_ringbuffer *ring, struct fd_context
*ctx,
{
unsigned const_idx = fd2_get_const_idx(ctx, tex, samp_id);
static const struct fd2_sampler_stateobj dummy_sampler = {};
+ static const struct fd2_pipe_sampler_view dummy_view = {};
const struct fd2_sampler_stateobj *sampler;
- struct fd2_pipe_sampler_view *view;
+ const struct fd2_pipe_sampler_view *view;
if (emitted & (1 << const_idx))
return 0;
@@ -134,13 +135,19 @@ emit_texture(struct fd_ringbuffer *ring, struct
fd_context *ctx,
sampler = tex->samplers[samp_id] ?
fd2_sampler_stateobj(tex->samplers[samp_id]) :
_sampler;
- view = fd2_pipe_sampler_view(tex->textures[samp_id]);
+ view = tex->textures[samp_id] ?
+ fd2_pipe_sampler_view(tex->textures[samp_id]) :
+ _view;
OUT_PKT3(ring, CP_SET_CONSTANT, 7);
OUT_RING(ring, 0x0001 + (0x6 * const_idx));
OUT_RING(ring, sampler->tex0 | view->tex0);
- OUT_RELOC(ring, fd_resource(view->base.texture)->bo, 0, view->fmt, 0);
+ if (view->base.texture)
+ OUT_RELOC(ring, fd_resource(view->base.texture)->bo, 0,
view->fmt, 0);
+ else
+ OUT_RING(ring, 0);
+
OUT_RING(ring, view->tex2);
OUT_RING(ring, sampler->tex3 | view->tex3);
OUT_RING(ring, sampler->tex4);
--
2.7.4
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[Mesa-dev] [PATCH v3 1/8] freedreno: a2xx: Update rnndb header for formats enumeration
The format enumeration comes comes from the yamoto
register headers that are part of the amd-gpu kernel driver.
(see freedreno envytools commit 1b32c444f82cd7144d71602106462f59f146c1d0)
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
---
src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33 +++
1 file changed, 13 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
index 55a4355..279a652 100644
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -84,13 +84,12 @@ enum a2xx_sq_surfaceformat {
FMT_5_5_5_1 = 13,
FMT_8_8_8_8_A = 14,
FMT_4_4_4_4 = 15,
- FMT_10_11_11 = 16,
- FMT_11_11_10 = 17,
+ FMT_8_8_8 = 16,
FMT_DXT1 = 18,
FMT_DXT2_3 = 19,
FMT_DXT4_5 = 20,
+ FMT_10_10_10_2 = 21,
FMT_24_8 = 22,
- FMT_24_8_FLOAT = 23,
FMT_16 = 24,
FMT_16_16 = 25,
FMT_16_16_16_16 = 26,
@@ -106,29 +105,23 @@ enum a2xx_sq_surfaceformat {
FMT_32_FLOAT = 36,
FMT_32_32_FLOAT = 37,
FMT_32_32_32_32_FLOAT = 38,
- FMT_32_AS_8 = 39,
- FMT_32_AS_8_8 = 40,
- FMT_16_MPEG = 41,
- FMT_16_16_MPEG = 42,
- FMT_8_INTERLACED = 43,
- FMT_32_AS_8_INTERLACED = 44,
- FMT_32_AS_8_8_INTERLACED = 45,
- FMT_16_INTERLACED = 46,
- FMT_16_MPEG_INTERLACED = 47,
- FMT_16_16_MPEG_INTERLACED = 48,
+ FMT_ATI_TC_RGB = 39,
+ FMT_ATI_TC_RGBA = 40,
+ FMT_ATI_TC_555_565_RGB = 41,
+ FMT_ATI_TC_555_565_RGBA = 42,
+ FMT_ATI_TC_RGBA_INTERP = 43,
+ FMT_ATI_TC_555_565_RGBA_INTERP = 44,
+ FMT_ETC1_RGBA_INTERP = 46,
+ FMT_ETC1_RGB = 47,
+ FMT_ETC1_RGBA = 48,
FMT_DXN = 49,
- FMT_8_8_8_8_AS_16_16_16_16 = 50,
- FMT_DXT1_AS_16_16_16_16 = 51,
- FMT_DXT2_3_AS_16_16_16_16 = 52,
- FMT_DXT4_5_AS_16_16_16_16 = 53,
+ FMT_2_3_3 = 51,
FMT_2_10_10_10_AS_16_16_16_16 = 54,
- FMT_10_11_11_AS_16_16_16_16 = 55,
- FMT_11_11_10_AS_16_16_16_16 = 56,
+ FMT_10_10_10_2_AS_16_16_16_16 = 55,
FMT_32_32_32_FLOAT = 57,
FMT_DXT3A = 58,
FMT_DXT5A = 59,
FMT_CTX1 = 60,
- FMT_DXT3A_AS_1_1_1_1 = 61,
};
enum a2xx_sq_ps_vtx_mode {
--
2.7.4
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Re: [Mesa-dev] [PATCH v2 0/8] freedreno: a2xx improvements
On Thu, Mar 22, 2018 at 11:46:57AM -0400, Ilia Mirkin wrote: > With the minor whitespace issue I pointed out (which might also apply > to 8/8, couldn't tell), this is Looks like there is also a case in 5/8, will go over them and resubmit the ones with wacky spacing. (I think the issue here is that I had set my editor for spaces due to the other parts of mesa) > Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu> Thanks. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 8/8] freedreno: a2xx: Implement DP2 instruction
Use DOT2ADDv instruction with 0.0f constant add.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 52f0aba..ce0b33a 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -987,6 +987,24 @@ translate_trig(struct fd2_compile_context *ctx,
add_src_reg(ctx, instr, _src);
}
+static void
+translate_dp2(struct fd2_compile_context *ctx,
+ struct tgsi_full_instruction *inst,
+ unsigned opc)
+{
+struct tgsi_src_register tmp_const;
+struct ir2_instruction *instr;
+/* DP2ADD c,a,b -> dot2(a,b) + c */
+/* for c we use the constant 0.0 */
+instr = ir2_instr_create_alu(next_exec_cf(ctx), DOT2ADDv, ~0);
+get_immediate(ctx, _const, fui(0.0f));
+add_dst_reg(ctx, instr, >Dst[0].Register);
+add_src_reg(ctx, instr, _const);
+add_src_reg(ctx, instr, >Src[0].Register);
+add_src_reg(ctx, instr, >Src[1].Register);
+add_vector_clamp(inst, instr);
+}
+
/*
* Main part of compiler/translator:
*/
@@ -1054,6 +1072,9 @@ translate_instruction(struct fd2_compile_context *ctx,
instr = ir2_instr_create_alu(cf, ADDv, ~0);
add_regs_vector_2(ctx, inst, instr);
break;
+ case TGSI_OPCODE_DP2:
+ translate_dp2(ctx, inst, opc);
+ break;
case TGSI_OPCODE_DP3:
instr = ir2_instr_create_alu(cf, DOT3v, ~0);
add_regs_vector_2(ctx, inst, instr);
--
2.7.4
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[Mesa-dev] [PATCH v2 6/8] freedreno: a2xx: Compressed textures support
Add support for: - PIPE_FORMAT_ETC1_RGB8 - PIPE_FORMAT_DXT1_RGB - PIPE_FORMAT_DXT1_RGBA - PIPE_FORMAT_DXT3_RGBA - PIPE_FORMAT_DXT5_RGBA Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> --- src/gallium/drivers/freedreno/a2xx/fd2_util.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_util.c b/src/gallium/drivers/freedreno/a2xx/fd2_util.c index 25f2bf4..60e5c39 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_util.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_util.c @@ -183,6 +183,17 @@ fd2_pipe2surface(enum pipe_format format) case PIPE_FORMAT_R32G32B32A32_FLOAT: return FMT_32_32_32_32_FLOAT; +/* Compressed textures. */ +case PIPE_FORMAT_ETC1_RGB8: +return FMT_ETC1_RGB; +case PIPE_FORMAT_DXT1_RGB: +case PIPE_FORMAT_DXT1_RGBA: +return FMT_DXT1; +case PIPE_FORMAT_DXT3_RGBA: +return FMT_DXT2_3; +case PIPE_FORMAT_DXT5_RGBA: +return FMT_DXT4_5; + /* YUV buffers. */ case PIPE_FORMAT_UYVY: return FMT_Cr_Y1_Cb_Y0; -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 2/8] freedreno: a2xx: Change use of BLEND_ to BLEND2_
Change use of BLEND_ to BLEND2_, BLEND_* a3xx_rb_blend_opcode BLEND2_* is a2xx_rb_blend_opcode This makes no effective difference as the used enumerant has the same value (0), but the other enumerants do not match 1-to-1 so this will avoid future problems. Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> --- src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c index 0905ab6..46a7d18 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c @@ -293,10 +293,10 @@ fd2_emit_tile_mem2gmem(struct fd_batch *batch, struct fd_tile *tile) OUT_PKT3(ring, CP_SET_CONSTANT, 2); OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL)); OUT_RING(ring, A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(FACTOR_ONE) | - A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND_DST_PLUS_SRC) | + A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND2_DST_PLUS_SRC) | A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(FACTOR_ZERO) | A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(FACTOR_ONE) | - A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND_DST_PLUS_SRC) | + A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND2_DST_PLUS_SRC) | A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(FACTOR_ZERO)); OUT_PKT3(ring, CP_SET_CONSTANT, 3); -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 5/8] freedreno: a2xx: Support TEXTURE_RECT
Denormalized texture coordinates are required for text rendering in
GALLIUM_HUD.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 3 ++-
src/gallium/drivers/freedreno/a2xx/ir-a2xx.c | 1 +
src/gallium/drivers/freedreno/a2xx/ir-a2xx.h | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 2ffd8cd..9f2fc61 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -791,6 +791,7 @@ translate_tex(struct fd2_compile_context *ctx,
instr = ir2_instr_create(next_exec_cf(ctx), IR2_FETCH);
instr->fetch.opc = TEX_FETCH;
instr->fetch.is_cube = (inst->Texture.Texture == TGSI_TEXTURE_3D);
+ instr->fetch.is_rect = (inst->Texture.Texture == TGSI_TEXTURE_RECT);
assert(inst->Texture.NumOffsets <= 1); // TODO what to do in other
cases?
/* save off the tex fetch to be patched later with correct const_idx: */
@@ -802,7 +803,7 @@ translate_tex(struct fd2_compile_context *ctx,
reg = add_src_reg(ctx, instr, coord);
/* blob compiler always sets 3rd component to same as 1st for 2d: */
- if (inst->Texture.Texture == TGSI_TEXTURE_2D)
+ if (inst->Texture.Texture == TGSI_TEXTURE_2D || inst->Texture.Texture
== TGSI_TEXTURE_RECT)
reg->swizzle[2] = reg->swizzle[0];
/* dst register needs to be marked for sync: */
diff --git a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
index 163c282..42a9ab4 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
+++ b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
@@ -341,6 +341,7 @@ static int instr_emit_fetch(struct ir2_instruction *instr,
tex->use_comp_lod = 1;
tex->use_reg_lod = !instr->fetch.is_cube;
tex->sample_location = SAMPLE_CENTER;
+ tex->tx_coord_denorm = instr->fetch.is_rect;
if (instr->pred != IR2_PRED_NONE) {
tex->pred_select = 1;
diff --git a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
index 36ed204..c4b6c18 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
+++ b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
@@ -74,6 +74,7 @@ struct ir2_instruction {
unsigned const_idx;
/* texture fetch specific: */
bool is_cube : 1;
+ bool is_rect : 1;
/* vertex fetch specific: */
unsigned const_idx_sel;
enum a2xx_sq_surfaceformat fmt;
--
2.7.4
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[Mesa-dev] [PATCH v2 7/8] freedreno: a2xx: implement SEQ/SNE instructions
Extend translate_sge_slt to emit these, in analogous fashion
but using CNDEv.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 9f2fc61..52f0aba 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -829,8 +829,10 @@ translate_tex(struct fd2_compile_context *ctx,
/* SGE(a,b) = GTE((b - a), 1.0, 0.0) */
/* SLT(a,b) = GTE((b - a), 0.0, 1.0) */
+/* SEQ(a,b) = EQU((b - a), 1.0, 0.0) */
+/* SNE(a,b) = EQU((b - a), 0.0, 1.0) */
static void
-translate_sge_slt(struct fd2_compile_context *ctx,
+translate_sge_slt_seq_sne(struct fd2_compile_context *ctx,
struct tgsi_full_instruction *inst, unsigned opc)
{
struct ir2_instruction *instr;
@@ -838,6 +840,7 @@ translate_sge_slt(struct fd2_compile_context *ctx,
struct tgsi_src_register tmp_src;
struct tgsi_src_register tmp_const;
float c0, c1;
+instr_vector_opc_t vopc;
switch (opc) {
default:
@@ -845,10 +848,22 @@ translate_sge_slt(struct fd2_compile_context *ctx,
case TGSI_OPCODE_SGE:
c0 = 1.0;
c1 = 0.0;
+vopc = CNDGTEv;
break;
case TGSI_OPCODE_SLT:
c0 = 0.0;
c1 = 1.0;
+vopc = CNDGTEv;
+ break;
+ case TGSI_OPCODE_SEQ:
+ c0 = 0.0;
+ c1 = 1.0;
+vopc = CNDEv;
+ break;
+ case TGSI_OPCODE_SNE:
+ c0 = 1.0;
+ c1 = 0.0;
+vopc = CNDEv;
break;
}
@@ -859,7 +874,7 @@ translate_sge_slt(struct fd2_compile_context *ctx,
add_src_reg(ctx, instr, >Src[0].Register)->flags |=
IR2_REG_NEGATE;
add_src_reg(ctx, instr, >Src[1].Register);
- instr = ir2_instr_create_alu(next_exec_cf(ctx), CNDGTEv, ~0);
+ instr = ir2_instr_create_alu(next_exec_cf(ctx), vopc, ~0);
add_dst_reg(ctx, instr, >Dst[0].Register);
/* maybe should re-arrange the syntax some day, but
* in assembler/disassembler and what ir.c expects
@@ -1057,7 +1072,9 @@ translate_instruction(struct fd2_compile_context *ctx,
break;
case TGSI_OPCODE_SLT:
case TGSI_OPCODE_SGE:
- translate_sge_slt(ctx, inst, opc);
+case TGSI_OPCODE_SEQ:
+case TGSI_OPCODE_SNE:
+ translate_sge_slt_seq_sne(ctx, inst, opc);
break;
case TGSI_OPCODE_MAD:
instr = ir2_instr_create_alu(cf, MULADDv, ~0);
--
2.7.4
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[Mesa-dev] [PATCH v2 1/8] freedreno: a2xx: Update rnndb header for formats enumeration
The format enumeration comes comes from the yamoto
register headers that are part of the amd-gpu kernel driver.
(see freedreno envytools commit 1b32c444f82cd7144d71602106462f59f146c1d0)
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33 +++
1 file changed, 13 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
index 55a4355..279a652 100644
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -84,13 +84,12 @@ enum a2xx_sq_surfaceformat {
FMT_5_5_5_1 = 13,
FMT_8_8_8_8_A = 14,
FMT_4_4_4_4 = 15,
- FMT_10_11_11 = 16,
- FMT_11_11_10 = 17,
+ FMT_8_8_8 = 16,
FMT_DXT1 = 18,
FMT_DXT2_3 = 19,
FMT_DXT4_5 = 20,
+ FMT_10_10_10_2 = 21,
FMT_24_8 = 22,
- FMT_24_8_FLOAT = 23,
FMT_16 = 24,
FMT_16_16 = 25,
FMT_16_16_16_16 = 26,
@@ -106,29 +105,23 @@ enum a2xx_sq_surfaceformat {
FMT_32_FLOAT = 36,
FMT_32_32_FLOAT = 37,
FMT_32_32_32_32_FLOAT = 38,
- FMT_32_AS_8 = 39,
- FMT_32_AS_8_8 = 40,
- FMT_16_MPEG = 41,
- FMT_16_16_MPEG = 42,
- FMT_8_INTERLACED = 43,
- FMT_32_AS_8_INTERLACED = 44,
- FMT_32_AS_8_8_INTERLACED = 45,
- FMT_16_INTERLACED = 46,
- FMT_16_MPEG_INTERLACED = 47,
- FMT_16_16_MPEG_INTERLACED = 48,
+ FMT_ATI_TC_RGB = 39,
+ FMT_ATI_TC_RGBA = 40,
+ FMT_ATI_TC_555_565_RGB = 41,
+ FMT_ATI_TC_555_565_RGBA = 42,
+ FMT_ATI_TC_RGBA_INTERP = 43,
+ FMT_ATI_TC_555_565_RGBA_INTERP = 44,
+ FMT_ETC1_RGBA_INTERP = 46,
+ FMT_ETC1_RGB = 47,
+ FMT_ETC1_RGBA = 48,
FMT_DXN = 49,
- FMT_8_8_8_8_AS_16_16_16_16 = 50,
- FMT_DXT1_AS_16_16_16_16 = 51,
- FMT_DXT2_3_AS_16_16_16_16 = 52,
- FMT_DXT4_5_AS_16_16_16_16 = 53,
+ FMT_2_3_3 = 51,
FMT_2_10_10_10_AS_16_16_16_16 = 54,
- FMT_10_11_11_AS_16_16_16_16 = 55,
- FMT_11_11_10_AS_16_16_16_16 = 56,
+ FMT_10_10_10_2_AS_16_16_16_16 = 55,
FMT_32_32_32_FLOAT = 57,
FMT_DXT3A = 58,
FMT_DXT5A = 59,
FMT_CTX1 = 60,
- FMT_DXT3A_AS_1_1_1_1 = 61,
};
enum a2xx_sq_ps_vtx_mode {
--
2.7.4
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[Mesa-dev] [PATCH v2 4/8] freedreno: a2xx: Prevent crash in emit_texture if view is not set
Textures will sometimes be updated if texture view state was
un-set, without this change that causes an assertion crash or
segfault.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index 5a1db13..a787b71 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
@@ -125,8 +125,9 @@ emit_texture(struct fd_ringbuffer *ring, struct fd_context
*ctx,
{
unsigned const_idx = fd2_get_const_idx(ctx, tex, samp_id);
static const struct fd2_sampler_stateobj dummy_sampler = {};
+ static const struct fd2_pipe_sampler_view dummy_view = {};
const struct fd2_sampler_stateobj *sampler;
- struct fd2_pipe_sampler_view *view;
+ const struct fd2_pipe_sampler_view *view;
if (emitted & (1 << const_idx))
return 0;
@@ -134,13 +135,19 @@ emit_texture(struct fd_ringbuffer *ring, struct
fd_context *ctx,
sampler = tex->samplers[samp_id] ?
fd2_sampler_stateobj(tex->samplers[samp_id]) :
_sampler;
- view = fd2_pipe_sampler_view(tex->textures[samp_id]);
+ view = tex->textures[samp_id] ?
+ fd2_pipe_sampler_view(tex->textures[samp_id]) :
+ _view;
OUT_PKT3(ring, CP_SET_CONSTANT, 7);
OUT_RING(ring, 0x0001 + (0x6 * const_idx));
OUT_RING(ring, sampler->tex0 | view->tex0);
- OUT_RELOC(ring, fd_resource(view->base.texture)->bo, 0, view->fmt, 0);
+ if (view->base.texture)
+ OUT_RELOC(ring, fd_resource(view->base.texture)->bo, 0,
view->fmt, 0);
+ else
+ OUT_RING(ring, 0);
+
OUT_RING(ring, view->tex2);
OUT_RING(ring, sampler->tex3 | view->tex3);
OUT_RING(ring, sampler->tex4);
--
2.7.4
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[Mesa-dev] [PATCH v2 0/8] freedreno: a2xx improvements
While working on a205 support for i.MX51/53, I've also written some patches that are not specific to a20x but should apply to the whole a2xx range. As I'm figuring out how to handle backward compatibility to other a2xx, I think it makes sense to send these upstream already to reduce the patch stack. Changes since first post: - Split up rnndb patch into a patch that changes formate numeration and one that changed BLEND->BLEND2. - fd2_emit emit_texture const correctness. I checked that there is no Gallium capability to be set for TEXTURE_RECT. Wladimir J. van der Laan (8): freedreno: a2xx: Update rnndb header for formats enumeration freedreno: a2xx: Change use of BLEND_ to BLEND2_ freedreno: a2xx: Fix fd2_tex_swiz freedreno: a2xx: Prevent crash in emit_texture if view is not set freedreno: a2xx: Support TEXTURE_RECT freedreno: a2xx: Compressed textures support freedreno: a2xx: implement SEQ/SNE instructions freedreno: a2xx: Implement DP2 instruction src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33 +++- src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 47 +-- src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 13 +-- src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 +- src/gallium/drivers/freedreno/a2xx/fd2_util.c | 29 +- src/gallium/drivers/freedreno/a2xx/ir-a2xx.c | 1 + src/gallium/drivers/freedreno/a2xx/ir-a2xx.h | 1 + 7 files changed, 90 insertions(+), 38 deletions(-) -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 3/8] freedreno: a2xx: Fix fd2_tex_swiz
Compose swizzles using util_format_compose_swizzles instead
of the custom code (which somehow had a bug).
This makes the GL_ALPHA internal format work.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_util.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_util.c
b/src/gallium/drivers/freedreno/a2xx/fd2_util.c
index 0bdcfcd..25f2bf4 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_util.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_util.c
@@ -309,14 +309,14 @@ fd2_tex_swiz(enum pipe_format format, unsigned swizzle_r,
unsigned swizzle_g,
{
const struct util_format_description *desc =
util_format_description(format);
- uint8_t swiz[] = {
- swizzle_r, swizzle_g, swizzle_b, swizzle_a,
- PIPE_SWIZZLE_0, PIPE_SWIZZLE_1,
- PIPE_SWIZZLE_1, PIPE_SWIZZLE_1,
- };
+ unsigned char swiz[4] = {
+ swizzle_r, swizzle_g, swizzle_b, swizzle_a,
+ }, rswiz[4];
- return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(swiz[desc->swizzle[0]])) |
- A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(swiz[desc->swizzle[1]])) |
- A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(swiz[desc->swizzle[2]])) |
- A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(swiz[desc->swizzle[3]]));
+ util_format_compose_swizzles(desc->swizzle, swiz, rswiz);
+
+ return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(rswiz[0])) |
+ A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(rswiz[1])) |
+ A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(rswiz[2])) |
+ A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(rswiz[3]));
}
--
2.7.4
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Re: [Mesa-dev] [PATCH 4/7] freedreno: a2xx: Support TEXTURE_RECT
Hello Ilia, On Thu, Jan 25, 2018 at 08:41:11AM -0500, Ilia Mirkin wrote: > Should you also expose PIPE_CAP_TEXTURE_RECTANGLE? (Or whatever it's > called... I forget.) I checked and I don't think a capability exists for this (anymore?). Everywhere, the assumption is meant that all Gallium drivers support, or at least emulate this. For example in src/mesa/state_tracker/st_extensions.c: extensions->NV_texture_rectangle = GL_TRUE; Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/7] freedreno: a2xx: Support TEXTURE_RECT
On Thu, Jan 25, 2018 at 08:41:11AM -0500, Ilia Mirkin wrote: > Should you also expose PIPE_CAP_TEXTURE_RECTANGLE? (Or whatever it's > called... I forget.) Yes, good point, will add that. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [Freedreno] [PATCH 1/7] freedreno: a2xx: Update rnndb header
On Thu, Jan 25, 2018 at 08:40:00AM -0500, Ilia Mirkin wrote:
> On Thu, Jan 25, 2018 at 8:29 AM, Wladimir J. van der Laan
> <laa...@gmail.com> wrote:
> > Also update BLEND_ to BLEND2_ opcodes to accomodate.
>
> Are you saying this doesn't compile right now? I would have expected
> the accompanying change to a2xx.xml.h for that. Perhaps this landed
> into the wrong commit?
There used to be a rename from BLEND_ to BLEND2_ here, it probably made it in
in an earlier patch? It does compile like now but I think the change is correct:
BLEND_* a3xx_rb_blend_opcode
BLEND2_* is a2xx_rb_blend_opcode
Howver, it happens that BLEND2_DST_PLUS_SRC and BLEND_DST_PLUS_SRC have the
same value so it's a nop either way.
> Also it's odd that the formats are so different than originally
> entered. Any opinion on how that happened?
I do not know where the original values come from - mine come from the yamoto
register headers that are part of the amd-gpu kernel driver.
(see freedreno envytools commit 1b32c444f82cd7144d71602106462f59f146c1d0,
and also:
https://github.com/jaketesler/UDOO_Kernel/blob/master/drivers/mxc/amd-gpu/include/reg/yamato/22/yamato_enum.h#L1799
)
I've checked on a20x that for example ETC1 ones check out, but obviously not
every single one of them.
Regards,
Wladimir
>
> >
> > Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
> > ---
> > src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33
> > +++
> > src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 ++--
> > 2 files changed, 15 insertions(+), 22 deletions(-)
> >
> > diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
> > b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
> > index 55a4355..279a652 100644
> > --- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
> > +++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
> > @@ -84,13 +84,12 @@ enum a2xx_sq_surfaceformat {
> > FMT_5_5_5_1 = 13,
> > FMT_8_8_8_8_A = 14,
> > FMT_4_4_4_4 = 15,
> > - FMT_10_11_11 = 16,
> > - FMT_11_11_10 = 17,
> > + FMT_8_8_8 = 16,
> > FMT_DXT1 = 18,
> > FMT_DXT2_3 = 19,
> > FMT_DXT4_5 = 20,
> > + FMT_10_10_10_2 = 21,
> > FMT_24_8 = 22,
> > - FMT_24_8_FLOAT = 23,
> > FMT_16 = 24,
> > FMT_16_16 = 25,
> > FMT_16_16_16_16 = 26,
> > @@ -106,29 +105,23 @@ enum a2xx_sq_surfaceformat {
> > FMT_32_FLOAT = 36,
> > FMT_32_32_FLOAT = 37,
> > FMT_32_32_32_32_FLOAT = 38,
> > - FMT_32_AS_8 = 39,
> > - FMT_32_AS_8_8 = 40,
> > - FMT_16_MPEG = 41,
> > - FMT_16_16_MPEG = 42,
> > - FMT_8_INTERLACED = 43,
> > - FMT_32_AS_8_INTERLACED = 44,
> > - FMT_32_AS_8_8_INTERLACED = 45,
> > - FMT_16_INTERLACED = 46,
> > - FMT_16_MPEG_INTERLACED = 47,
> > - FMT_16_16_MPEG_INTERLACED = 48,
> > + FMT_ATI_TC_RGB = 39,
> > + FMT_ATI_TC_RGBA = 40,
> > + FMT_ATI_TC_555_565_RGB = 41,
> > + FMT_ATI_TC_555_565_RGBA = 42,
> > + FMT_ATI_TC_RGBA_INTERP = 43,
> > + FMT_ATI_TC_555_565_RGBA_INTERP = 44,
> > + FMT_ETC1_RGBA_INTERP = 46,
> > + FMT_ETC1_RGB = 47,
> > + FMT_ETC1_RGBA = 48,
> > FMT_DXN = 49,
> > - FMT_8_8_8_8_AS_16_16_16_16 = 50,
> > - FMT_DXT1_AS_16_16_16_16 = 51,
> > - FMT_DXT2_3_AS_16_16_16_16 = 52,
> > - FMT_DXT4_5_AS_16_16_16_16 = 53,
> > + FMT_2_3_3 = 51,
> > FMT_2_10_10_10_AS_16_16_16_16 = 54,
> > - FMT_10_11_11_AS_16_16_16_16 = 55,
> > - FMT_11_11_10_AS_16_16_16_16 = 56,
> > + FMT_10_10_10_2_AS_16_16_16_16 = 55,
> > FMT_32_32_32_FLOAT = 57,
> > FMT_DXT3A = 58,
> > FMT_DXT5A = 59,
> > FMT_CTX1 = 60,
> > - FMT_DXT3A_AS_1_1_1_1 = 61,
> > };
> >
> > enum a2xx_sq_ps_vtx_mode {
> > diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
> > b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
> > index 0905ab6..46a7d18 100644
> > --- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
> > +++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
> > @@ -293,10 +293,10 @@ fd2_emit_tile_mem2gmem(struct fd_batch *batch, struct
> > fd_tile *tile)
> > OUT_PKT3(ring, CP_SET_CONSTANT, 2);
> > OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL));
> > OUT_RING(ring, A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(FACTOR_ONE) |
> > -
> > A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(
[Mesa-dev] [PATCH 6/7] freedreno: a2xx: implement SEQ/SNE instructions
Extend translate_sge_slt to emit these, in analogous fashion
but using CNDEv.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 9f2fc61..52f0aba 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -829,8 +829,10 @@ translate_tex(struct fd2_compile_context *ctx,
/* SGE(a,b) = GTE((b - a), 1.0, 0.0) */
/* SLT(a,b) = GTE((b - a), 0.0, 1.0) */
+/* SEQ(a,b) = EQU((b - a), 1.0, 0.0) */
+/* SNE(a,b) = EQU((b - a), 0.0, 1.0) */
static void
-translate_sge_slt(struct fd2_compile_context *ctx,
+translate_sge_slt_seq_sne(struct fd2_compile_context *ctx,
struct tgsi_full_instruction *inst, unsigned opc)
{
struct ir2_instruction *instr;
@@ -838,6 +840,7 @@ translate_sge_slt(struct fd2_compile_context *ctx,
struct tgsi_src_register tmp_src;
struct tgsi_src_register tmp_const;
float c0, c1;
+instr_vector_opc_t vopc;
switch (opc) {
default:
@@ -845,10 +848,22 @@ translate_sge_slt(struct fd2_compile_context *ctx,
case TGSI_OPCODE_SGE:
c0 = 1.0;
c1 = 0.0;
+vopc = CNDGTEv;
break;
case TGSI_OPCODE_SLT:
c0 = 0.0;
c1 = 1.0;
+vopc = CNDGTEv;
+ break;
+ case TGSI_OPCODE_SEQ:
+ c0 = 0.0;
+ c1 = 1.0;
+vopc = CNDEv;
+ break;
+ case TGSI_OPCODE_SNE:
+ c0 = 1.0;
+ c1 = 0.0;
+vopc = CNDEv;
break;
}
@@ -859,7 +874,7 @@ translate_sge_slt(struct fd2_compile_context *ctx,
add_src_reg(ctx, instr, >Src[0].Register)->flags |=
IR2_REG_NEGATE;
add_src_reg(ctx, instr, >Src[1].Register);
- instr = ir2_instr_create_alu(next_exec_cf(ctx), CNDGTEv, ~0);
+ instr = ir2_instr_create_alu(next_exec_cf(ctx), vopc, ~0);
add_dst_reg(ctx, instr, >Dst[0].Register);
/* maybe should re-arrange the syntax some day, but
* in assembler/disassembler and what ir.c expects
@@ -1057,7 +1072,9 @@ translate_instruction(struct fd2_compile_context *ctx,
break;
case TGSI_OPCODE_SLT:
case TGSI_OPCODE_SGE:
- translate_sge_slt(ctx, inst, opc);
+case TGSI_OPCODE_SEQ:
+case TGSI_OPCODE_SNE:
+ translate_sge_slt_seq_sne(ctx, inst, opc);
break;
case TGSI_OPCODE_MAD:
instr = ir2_instr_create_alu(cf, MULADDv, ~0);
--
2.7.4
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[Mesa-dev] [PATCH 7/7] freedreno: a2xx: Implement DP2 instruction
Use DOT2ADDv instruction with 0.0f constant add.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 52f0aba..ce0b33a 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -987,6 +987,24 @@ translate_trig(struct fd2_compile_context *ctx,
add_src_reg(ctx, instr, _src);
}
+static void
+translate_dp2(struct fd2_compile_context *ctx,
+ struct tgsi_full_instruction *inst,
+ unsigned opc)
+{
+struct tgsi_src_register tmp_const;
+struct ir2_instruction *instr;
+/* DP2ADD c,a,b -> dot2(a,b) + c */
+/* for c we use the constant 0.0 */
+instr = ir2_instr_create_alu(next_exec_cf(ctx), DOT2ADDv, ~0);
+get_immediate(ctx, _const, fui(0.0f));
+add_dst_reg(ctx, instr, >Dst[0].Register);
+add_src_reg(ctx, instr, _const);
+add_src_reg(ctx, instr, >Src[0].Register);
+add_src_reg(ctx, instr, >Src[1].Register);
+add_vector_clamp(inst, instr);
+}
+
/*
* Main part of compiler/translator:
*/
@@ -1054,6 +1072,9 @@ translate_instruction(struct fd2_compile_context *ctx,
instr = ir2_instr_create_alu(cf, ADDv, ~0);
add_regs_vector_2(ctx, inst, instr);
break;
+ case TGSI_OPCODE_DP2:
+ translate_dp2(ctx, inst, opc);
+ break;
case TGSI_OPCODE_DP3:
instr = ir2_instr_create_alu(cf, DOT3v, ~0);
add_regs_vector_2(ctx, inst, instr);
--
2.7.4
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[Mesa-dev] [PATCH 2/7] freedreno: a2xx: Fix fd2_tex_swiz
Compose swizzles using util_format_compose_swizzles instead
of the custom code (which somehow had a bug).
This makes the GL_ALPHA internal format work.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_util.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_util.c
b/src/gallium/drivers/freedreno/a2xx/fd2_util.c
index 0bdcfcd..25f2bf4 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_util.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_util.c
@@ -309,14 +309,14 @@ fd2_tex_swiz(enum pipe_format format, unsigned swizzle_r,
unsigned swizzle_g,
{
const struct util_format_description *desc =
util_format_description(format);
- uint8_t swiz[] = {
- swizzle_r, swizzle_g, swizzle_b, swizzle_a,
- PIPE_SWIZZLE_0, PIPE_SWIZZLE_1,
- PIPE_SWIZZLE_1, PIPE_SWIZZLE_1,
- };
+ unsigned char swiz[4] = {
+ swizzle_r, swizzle_g, swizzle_b, swizzle_a,
+ }, rswiz[4];
- return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(swiz[desc->swizzle[0]])) |
- A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(swiz[desc->swizzle[1]])) |
- A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(swiz[desc->swizzle[2]])) |
- A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(swiz[desc->swizzle[3]]));
+ util_format_compose_swizzles(desc->swizzle, swiz, rswiz);
+
+ return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(rswiz[0])) |
+ A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(rswiz[1])) |
+ A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(rswiz[2])) |
+ A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(rswiz[3]));
}
--
2.7.4
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[Mesa-dev] [PATCH 3/7] freedreno: a2xx: Prevent crash in emit_texture if view is not set
Textures will sometimes be updated if texture view state was
un-set, without this change that causes an assertion crash or
segfault.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index 5a1db13..ebe698f 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
@@ -125,6 +125,7 @@ emit_texture(struct fd_ringbuffer *ring, struct fd_context
*ctx,
{
unsigned const_idx = fd2_get_const_idx(ctx, tex, samp_id);
static const struct fd2_sampler_stateobj dummy_sampler = {};
+ static const struct fd2_pipe_sampler_view dummy_view = {};
const struct fd2_sampler_stateobj *sampler;
struct fd2_pipe_sampler_view *view;
@@ -134,13 +135,19 @@ emit_texture(struct fd_ringbuffer *ring, struct
fd_context *ctx,
sampler = tex->samplers[samp_id] ?
fd2_sampler_stateobj(tex->samplers[samp_id]) :
_sampler;
- view = fd2_pipe_sampler_view(tex->textures[samp_id]);
+ view = tex->textures[samp_id] ?
+ fd2_pipe_sampler_view(tex->textures[samp_id]) :
+ _view;
OUT_PKT3(ring, CP_SET_CONSTANT, 7);
OUT_RING(ring, 0x0001 + (0x6 * const_idx));
OUT_RING(ring, sampler->tex0 | view->tex0);
- OUT_RELOC(ring, fd_resource(view->base.texture)->bo, 0, view->fmt, 0);
+ if (view->base.texture)
+ OUT_RELOC(ring, fd_resource(view->base.texture)->bo, 0,
view->fmt, 0);
+ else
+ OUT_RING(ring, 0);
+
OUT_RING(ring, view->tex2);
OUT_RING(ring, sampler->tex3 | view->tex3);
OUT_RING(ring, sampler->tex4);
--
2.7.4
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[Mesa-dev] [PATCH 4/7] freedreno: a2xx: Support TEXTURE_RECT
Denormalized texture coordinates are required for text rendering in
GALLIUM_HUD.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 3 ++-
src/gallium/drivers/freedreno/a2xx/ir-a2xx.c | 1 +
src/gallium/drivers/freedreno/a2xx/ir-a2xx.h | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
index 2ffd8cd..9f2fc61 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_compiler.c
@@ -791,6 +791,7 @@ translate_tex(struct fd2_compile_context *ctx,
instr = ir2_instr_create(next_exec_cf(ctx), IR2_FETCH);
instr->fetch.opc = TEX_FETCH;
instr->fetch.is_cube = (inst->Texture.Texture == TGSI_TEXTURE_3D);
+ instr->fetch.is_rect = (inst->Texture.Texture == TGSI_TEXTURE_RECT);
assert(inst->Texture.NumOffsets <= 1); // TODO what to do in other
cases?
/* save off the tex fetch to be patched later with correct const_idx: */
@@ -802,7 +803,7 @@ translate_tex(struct fd2_compile_context *ctx,
reg = add_src_reg(ctx, instr, coord);
/* blob compiler always sets 3rd component to same as 1st for 2d: */
- if (inst->Texture.Texture == TGSI_TEXTURE_2D)
+ if (inst->Texture.Texture == TGSI_TEXTURE_2D || inst->Texture.Texture
== TGSI_TEXTURE_RECT)
reg->swizzle[2] = reg->swizzle[0];
/* dst register needs to be marked for sync: */
diff --git a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
index 163c282..3666a7e 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
+++ b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.c
@@ -341,6 +341,7 @@ static int instr_emit_fetch(struct ir2_instruction *instr,
tex->use_comp_lod = 1;
tex->use_reg_lod = !instr->fetch.is_cube;
tex->sample_location = SAMPLE_CENTER;
+tex->tx_coord_denorm = instr->fetch.is_rect;
if (instr->pred != IR2_PRED_NONE) {
tex->pred_select = 1;
diff --git a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
index 36ed204..c4b6c18 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
+++ b/src/gallium/drivers/freedreno/a2xx/ir-a2xx.h
@@ -74,6 +74,7 @@ struct ir2_instruction {
unsigned const_idx;
/* texture fetch specific: */
bool is_cube : 1;
+ bool is_rect : 1;
/* vertex fetch specific: */
unsigned const_idx_sel;
enum a2xx_sq_surfaceformat fmt;
--
2.7.4
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[Mesa-dev] [PATCH 5/7] freedreno: a2xx: Compressed textures support
Add support for: - PIPE_FORMAT_ETC1_RGB8 - PIPE_FORMAT_DXT1_RGB - PIPE_FORMAT_DXT1_RGBA - PIPE_FORMAT_DXT3_RGBA - PIPE_FORMAT_DXT5_RGBA Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> --- src/gallium/drivers/freedreno/a2xx/fd2_util.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_util.c b/src/gallium/drivers/freedreno/a2xx/fd2_util.c index 25f2bf4..60e5c39 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_util.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_util.c @@ -183,6 +183,17 @@ fd2_pipe2surface(enum pipe_format format) case PIPE_FORMAT_R32G32B32A32_FLOAT: return FMT_32_32_32_32_FLOAT; +/* Compressed textures. */ +case PIPE_FORMAT_ETC1_RGB8: +return FMT_ETC1_RGB; +case PIPE_FORMAT_DXT1_RGB: +case PIPE_FORMAT_DXT1_RGBA: +return FMT_DXT1; +case PIPE_FORMAT_DXT3_RGBA: +return FMT_DXT2_3; +case PIPE_FORMAT_DXT5_RGBA: +return FMT_DXT4_5; + /* YUV buffers. */ case PIPE_FORMAT_UYVY: return FMT_Cr_Y1_Cb_Y0; -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/7] freedreno: a2xx: Update rnndb header
Also update BLEND_ to BLEND2_ opcodes to accomodate.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33 +++
src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 ++--
2 files changed, 15 insertions(+), 22 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
index 55a4355..279a652 100644
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -84,13 +84,12 @@ enum a2xx_sq_surfaceformat {
FMT_5_5_5_1 = 13,
FMT_8_8_8_8_A = 14,
FMT_4_4_4_4 = 15,
- FMT_10_11_11 = 16,
- FMT_11_11_10 = 17,
+ FMT_8_8_8 = 16,
FMT_DXT1 = 18,
FMT_DXT2_3 = 19,
FMT_DXT4_5 = 20,
+ FMT_10_10_10_2 = 21,
FMT_24_8 = 22,
- FMT_24_8_FLOAT = 23,
FMT_16 = 24,
FMT_16_16 = 25,
FMT_16_16_16_16 = 26,
@@ -106,29 +105,23 @@ enum a2xx_sq_surfaceformat {
FMT_32_FLOAT = 36,
FMT_32_32_FLOAT = 37,
FMT_32_32_32_32_FLOAT = 38,
- FMT_32_AS_8 = 39,
- FMT_32_AS_8_8 = 40,
- FMT_16_MPEG = 41,
- FMT_16_16_MPEG = 42,
- FMT_8_INTERLACED = 43,
- FMT_32_AS_8_INTERLACED = 44,
- FMT_32_AS_8_8_INTERLACED = 45,
- FMT_16_INTERLACED = 46,
- FMT_16_MPEG_INTERLACED = 47,
- FMT_16_16_MPEG_INTERLACED = 48,
+ FMT_ATI_TC_RGB = 39,
+ FMT_ATI_TC_RGBA = 40,
+ FMT_ATI_TC_555_565_RGB = 41,
+ FMT_ATI_TC_555_565_RGBA = 42,
+ FMT_ATI_TC_RGBA_INTERP = 43,
+ FMT_ATI_TC_555_565_RGBA_INTERP = 44,
+ FMT_ETC1_RGBA_INTERP = 46,
+ FMT_ETC1_RGB = 47,
+ FMT_ETC1_RGBA = 48,
FMT_DXN = 49,
- FMT_8_8_8_8_AS_16_16_16_16 = 50,
- FMT_DXT1_AS_16_16_16_16 = 51,
- FMT_DXT2_3_AS_16_16_16_16 = 52,
- FMT_DXT4_5_AS_16_16_16_16 = 53,
+ FMT_2_3_3 = 51,
FMT_2_10_10_10_AS_16_16_16_16 = 54,
- FMT_10_11_11_AS_16_16_16_16 = 55,
- FMT_11_11_10_AS_16_16_16_16 = 56,
+ FMT_10_10_10_2_AS_16_16_16_16 = 55,
FMT_32_32_32_FLOAT = 57,
FMT_DXT3A = 58,
FMT_DXT5A = 59,
FMT_CTX1 = 60,
- FMT_DXT3A_AS_1_1_1_1 = 61,
};
enum a2xx_sq_ps_vtx_mode {
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
index 0905ab6..46a7d18 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
@@ -293,10 +293,10 @@ fd2_emit_tile_mem2gmem(struct fd_batch *batch, struct
fd_tile *tile)
OUT_PKT3(ring, CP_SET_CONSTANT, 2);
OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL));
OUT_RING(ring, A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(FACTOR_ONE) |
-
A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND_DST_PLUS_SRC) |
+
A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(BLEND2_DST_PLUS_SRC) |
A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(FACTOR_ZERO) |
A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(FACTOR_ONE) |
-
A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND_DST_PLUS_SRC) |
+
A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(BLEND2_DST_PLUS_SRC) |
A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(FACTOR_ZERO));
OUT_PKT3(ring, CP_SET_CONSTANT, 3);
--
2.7.4
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[Mesa-dev] [PATCH 0/7] freedreno: a2xx improvements
While working on a205 support for i.MX51/53, I've also written some patches that are not specific to a20x but should apply to the whole a2xx range. As I'm figuring out how to handle backward compatibility to other a2xx, I think it makes sense to send these upstream already to reduce the patch stack. Wladimir J. van der Laan (7): freedreno: a2xx: Update rnndb header freedreno: a2xx: Fix fd2_tex_swiz freedreno: a2xx: Prevent crash in emit_texture if view is not set freedreno: a2xx: Support TEXTURE_RECT freedreno: a2xx: Compressed textures support freedreno: a2xx: implement SEQ/SNE instructions freedreno: a2xx: Implement DP2 instruction src/gallium/drivers/freedreno/a2xx/a2xx.xml.h | 33 +++- src/gallium/drivers/freedreno/a2xx/fd2_compiler.c | 47 +-- src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 11 +- src/gallium/drivers/freedreno/a2xx/fd2_gmem.c | 4 +- src/gallium/drivers/freedreno/a2xx/fd2_util.c | 29 +- src/gallium/drivers/freedreno/a2xx/ir-a2xx.c | 1 + src/gallium/drivers/freedreno/a2xx/ir-a2xx.h | 1 + 7 files changed, 89 insertions(+), 37 deletions(-) -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v3 10/15] etnaviv: GC7000: State changes for HALTI3..5
Update state objects to add new state, and emit function to emit new
state.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 249 +++--
src/gallium/drivers/etnaviv/etnaviv_internal.h | 4 +
src/gallium/drivers/etnaviv/etnaviv_state.c| 35 +++-
src/gallium/drivers/etnaviv/etnaviv_zsa.c | 3 +-
4 files changed, 218 insertions(+), 73 deletions(-)
Rebased version on top of 35548cae93513875dcad9cc88589add5fac7d836 "etnaviv:
Emit vertex buffers consecutively".
Only re-sending this patch of the series because the rest still applies cleanly.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 508c7b1..f63ec77 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -133,6 +133,91 @@ required_stream_size(struct etna_context *ctx)
return size;
}
+/* Emit state that only exists on HALTI5+ */
+static void
+emit_halti5_only_state(struct etna_context *ctx, int vs_output_count)
+{
+ struct etna_cmd_stream *stream = ctx->stream;
+ uint32_t dirty = ctx->dirty;
+ struct etna_coalesce coalesce;
+
+ etna_coalesce_start(stream, );
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /* Magic states (load balancing, inter-unit sync, buffers) */
+ /*00870*/ EMIT_STATE(VS_HALTI5_OUTPUT_COUNT, vs_output_count |
((vs_output_count * 0x10) << 8));
+ /*008A0*/ EMIT_STATE(VS_HALTI5_UNK008A0, 0x0001000e |
((0x110/vs_output_count) << 20));
+ for (int x = 0; x < 4; ++x) {
+ /*008E0*/ EMIT_STATE(VS_HALTI5_OUTPUT(x),
ctx->shader_state.VS_OUTPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_VERTEX_ELEMENTS | ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 4; ++x) {
+ /*008C0*/ EMIT_STATE(VS_HALTI5_INPUT(x),
ctx->shader_state.VS_INPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*00A90*/ EMIT_STATE(PA_VARYING_NUM_COMPONENTS(0),
ctx->shader_state.GL_VARYING_NUM_COMPONENTS);
+ /*00AA8*/ EMIT_STATE(PA_VS_OUTPUT_COUNT, vs_output_count);
+ /*01080*/ EMIT_STATE(PS_VARYING_NUM_COMPONENTS(0),
ctx->shader_state.GL_VARYING_NUM_COMPONENTS);
+ /*03888*/ EMIT_STATE(GL_HALTI5_SH_SPECIALS,
ctx->shader_state.GL_HALTI5_SH_SPECIALS);
+ }
+ etna_coalesce_end(stream, );
+}
+
+/* Emit state that no longer exists on HALTI5 */
+static void
+emit_pre_halti5_state(struct etna_context *ctx)
+{
+ struct etna_cmd_stream *stream = ctx->stream;
+ uint32_t dirty = ctx->dirty;
+ struct etna_coalesce coalesce;
+
+ etna_coalesce_start(stream, );
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*00800*/ EMIT_STATE(VS_END_PC, ctx->shader_state.VS_END_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 4; ++x) {
+/*00810*/ EMIT_STATE(VS_OUTPUT(x), ctx->shader_state.VS_OUTPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_VERTEX_ELEMENTS | ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 4; ++x) {
+/*00820*/ EMIT_STATE(VS_INPUT(x), ctx->shader_state.VS_INPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*00838*/ EMIT_STATE(VS_START_PC, ctx->shader_state.VS_START_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 10; ++x) {
+ /*00A40*/ EMIT_STATE(PA_SHADER_ATTRIBUTES(x),
ctx->shader_state.PA_SHADER_ATTRIBUTES[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) {
+ /*00E04*/ EMIT_STATE(RA_MULTISAMPLE_UNK00E04,
ctx->framebuffer.RA_MULTISAMPLE_UNK00E04);
+ for (int x = 0; x < 4; ++x) {
+ /*00E10*/ EMIT_STATE(RA_MULTISAMPLE_UNK00E10(x),
ctx->framebuffer.RA_MULTISAMPLE_UNK00E10[x]);
+ }
+ for (int x = 0; x < 16; ++x) {
+ /*00E40*/ EMIT_STATE(RA_CENTROID_TABLE(x),
ctx->framebuffer.RA_CENTROID_TABLE[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_FRAMEBUFFER))) {
+ /*01000*/ EMIT_STATE(PS_END_PC, ctx->shader_state.PS_END_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_FRAMEBUFFER))) {
+ /*01018*/ EMIT_STATE(PS_START_PC, ctx->shader_state.PS_START_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*03820*/ EMIT_STATE(GL_VARYING_NUM_COMPONENTS,
ctx->shader_state.GL_VARYING_NUM_COMPONENTS);
+ for (int x = 0; x < 2; ++x) {
+ /*03828*/ EMIT_STATE(GL_VARYING_COMPONENT_USE(x),
ctx->shader_state.GL_VARYING_COMPONENT_USE[x]);
+ }
+ }
+ etna_coalesce_end(stream, );
+}
+
/* Weave state before draw operation. This function merges all the compiled
* state blocks under the context into one device register state. Parts of
* this state tha
Re: [Mesa-dev] [PATCH v2 12/17] etnaviv: GC7000: State changes for HALTI3..5
Hello Christian,
On Sat, Nov 25, 2017 at 05:10:36PM +0100, Christian Gmeiner wrote:
> 2017-11-18 10:44 GMT+01:00 Wladimir J. van der Laan <laa...@gmail.com>:
> > Update state objects to add new state, and emit function to emit new
> > state.
> >
> > Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
> > Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
> > ---
> > src/gallium/drivers/etnaviv/etnaviv_emit.c | 246
> > +++--
> > src/gallium/drivers/etnaviv/etnaviv_internal.h | 4 +
> > src/gallium/drivers/etnaviv/etnaviv_state.c| 35 +++-
> > src/gallium/drivers/etnaviv/etnaviv_zsa.c | 3 +-
> > 4 files changed, 216 insertions(+), 72 deletions(-)
> >
> > Conceptually unchanged since v1, but needed serious rebase.
> >
>
> I had to fix a conflict during git am in etnaviv_emit.c reagrding
> ETNA_DIRTY_VERTEX_BUFFERS.
I assume the conflict is with "etnaviv: Emit vertex buffers consecutively" -
which makes a change to vertex buffer emission, while this moves the
surrounding code around.
Need to preserve changes to 0064C/00650 and 00680/006A0:
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -391,18 +391,18 @@ etna_emit_state(struct etna_context *ctx)
/*00644*/ EMIT_STATE_RELOC(FE_INDEX_STREAM_BASE_ADDR,
>index_buffer.FE_INDEX_STREAM_BASE_ADDR);
/*00648*/ EMIT_STATE(FE_INDEX_STREAM_CONTROL,
ctx->index_buffer.FE_INDEX_STREAM_CONTROL);
}
- if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
+ if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS) && ctx->specs.stream_count
== 1))) {
/*0064C*/ EMIT_STATE_RELOC(FE_VERTEX_STREAM_BASE_ADDR,
>vertex_buffer.cvb[0].FE_VERTEX_STREAM_BASE_ADDR);
/*00650*/ EMIT_STATE(FE_VERTEX_STREAM_CONTROL,
ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_CONTROL);
}
if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER))) {
/*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX,
ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX);
}
- if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
- for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+ if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count
> 1)) {
+ for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
/*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x),
>vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR);
}
- for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+ for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
if (ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR.bo) {
/*006A0*/ EMIT_STATE(FE_VERTEX_STREAMS_CONTROL(x),
ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL);
}
If it helps I can send a rebased patch.
Regards,
Wladimir
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Re: [Mesa-dev] [PATCH] etnaviv: Emit vertex buffers consecutively
On Thu, Nov 23, 2017 at 10:37:15AM +0100, Lucas Stach wrote:
> Am Donnerstag, den 23.11.2017, 10:08 +0100 schrieb Wladimir J. van der Laan:
> > Vertex buffer legacy state is no longer picked up with new drawing
> > commands. Change to use different cases depending on the number of
> > vertex streams in the GPU specs.
> >
> > This results in slightly more compact state emission as well, on all
> > vivantes.
> >
> > This needs to go in before "etnaviv: Use only DRAW_INSTANCED on
> > GC3000+"
> > (and thus before the GC7000 patch series).
>
> Missing Sign-off, otherwise looks good to me:
>
> Reviewed-by: Lucas Stach <l.st...@pengutronix.de>
Gah, new version below, also w/ a syntax consistency improvement re: likely()
nesting.
Wladimir
From 1718a7b5911b868d93472cf7fdc9cfe0c8d75067 Mon Sep 17 00:00:00 2001
From: "Wladimir J. van der Laan" <laa...@gmail.com>
Date: Thu, 23 Nov 2017 08:59:32 +
Subject: [PATCH v2] etnaviv: Emit vertex buffers consecutively
Vertex buffer legacy state is no longer picked up with new drawing
commands. Change to use different cases depending on the number of
vertex streams in the GPU specs.
This results in slightly more compact state emission as well, on all
vivantes.
This needs to go in before "etnaviv: Use only DRAW_INSTANCED on GC3000+"
(and thus before the GC7000 patch series).
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 999d2ca..2cd2389 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -391,18 +391,18 @@ etna_emit_state(struct etna_context *ctx)
/*00644*/ EMIT_STATE_RELOC(FE_INDEX_STREAM_BASE_ADDR,
>index_buffer.FE_INDEX_STREAM_BASE_ADDR);
/*00648*/ EMIT_STATE(FE_INDEX_STREAM_CONTROL,
ctx->index_buffer.FE_INDEX_STREAM_CONTROL);
}
- if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
+ if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count
== 1)) {
/*0064C*/ EMIT_STATE_RELOC(FE_VERTEX_STREAM_BASE_ADDR,
>vertex_buffer.cvb[0].FE_VERTEX_STREAM_BASE_ADDR);
/*00650*/ EMIT_STATE(FE_VERTEX_STREAM_CONTROL,
ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_CONTROL);
}
if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER))) {
/*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX,
ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX);
}
- if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
- for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+ if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count
> 1)) {
+ for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
/*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x),
>vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR);
}
- for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+ for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
if (ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR.bo) {
/*006A0*/ EMIT_STATE(FE_VERTEX_STREAMS_CONTROL(x),
ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL);
}
--
2.7.4
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[Mesa-dev] [PATCH] etnaviv: Emit vertex buffers consecutively
Vertex buffer legacy state is no longer picked up with new drawing
commands. Change to use different cases depending on the number of
vertex streams in the GPU specs.
This results in slightly more compact state emission as well, on all
vivantes.
This needs to go in before "etnaviv: Use only DRAW_INSTANCED on GC3000+"
(and thus before the GC7000 patch series).
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 999d2ca..41504ac 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -391,18 +391,18 @@ etna_emit_state(struct etna_context *ctx)
/*00644*/ EMIT_STATE_RELOC(FE_INDEX_STREAM_BASE_ADDR,
>index_buffer.FE_INDEX_STREAM_BASE_ADDR);
/*00648*/ EMIT_STATE(FE_INDEX_STREAM_CONTROL,
ctx->index_buffer.FE_INDEX_STREAM_CONTROL);
}
- if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
+ if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS) && ctx->specs.stream_count
== 1))) {
/*0064C*/ EMIT_STATE_RELOC(FE_VERTEX_STREAM_BASE_ADDR,
>vertex_buffer.cvb[0].FE_VERTEX_STREAM_BASE_ADDR);
/*00650*/ EMIT_STATE(FE_VERTEX_STREAM_CONTROL,
ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_CONTROL);
}
if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER))) {
/*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX,
ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX);
}
- if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) {
- for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+ if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count
> 1)) {
+ for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
/*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x),
>vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR);
}
- for (int x = 1; x < ctx->vertex_buffer.count; ++x) {
+ for (int x = 0; x < ctx->vertex_buffer.count; ++x) {
if (ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR.bo) {
/*006A0*/ EMIT_STATE(FE_VERTEX_STREAMS_CONTROL(x),
ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL);
}
--
2.7.4
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Re: [Mesa-dev] [PATCH v2 04/17] etnaviv: Use only DRAW_INSTANCED on GC3000+
> Can confirm that this completely breaks rendering on GC3000. > > I don't know how this happened, I'm sure I tested this before :( maybe > with a slightly different version of the patch stack. Solved! Etnaviv is emitting vertex stream attributes in an unconvential way: - Write vertex stream address 0 to 0064C - Then writing vertex stream address 1..n to 00684+n*4 - Write vertex stream control 0 to 00650 - Writing vertex stream control 1..n to 006A4+n*4 Apparently this no longer works with DRAW_INSTANCED. Will send a patch to fix this; a better way would be to use 00684/006A8 only on single-vertex-stream GPUs, otherwise write consecutively. (I must already had this patched locally when I tested this, but regarded as unnecessary later...) Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v2 04/17] etnaviv: Use only DRAW_INSTANCED on GC3000+
On Wed, Nov 22, 2017 at 07:29:18PM +0100, Wladimir J. van der Laan wrote: > > > I would really like to know what's wrong with this patch, as using the > > new draw command should be fine on GC3000 and we certainly want to > > support instanced drawing at some point. > > Did you also apply the "etnaviv: Emit SCALE for vertex attributes" patch? > > If so maybe there's something wrong with that one - DRAW_INSTANCED seems to be > ignored if state 00780+attr stays at 0. Can confirm that this completely breaks rendering on GC3000. I don't know how this happened, I'm sure I tested this before :( maybe with a slightly different version of the patch stack. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v2 04/17] etnaviv: Use only DRAW_INSTANCED on GC3000+
> I would really like to know what's wrong with this patch, as using the > new draw command should be fine on GC3000 and we certainly want to > support instanced drawing at some point. Did you also apply the "etnaviv: Emit SCALE for vertex attributes" patch? If so maybe there's something wrong with that one - DRAW_INSTANCED seems to be ignored if state 00780+attr stays at 0. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v2 04/17] etnaviv: Use only DRAW_INSTANCED on GC3000+
Hello Lucas, On Wed, Nov 22, 2017 at 02:29:33PM +0100, Lucas Stach wrote: > Hi Wladimir, > > Am Samstag, den 18.11.2017, 10:44 +0100 schrieb Wladimir J. van der Laan: > > The blob does this, as DRAW_INSTANCED can replace fully all the other > > draw commands. It is also required to handle integer vertex formats. > > The other path is only there for compatibility and might go away (or at > > least rot to become buggy due to dis-use) in newer hardware. > > > > As a by-effect this changes the behavior for GC3000-, by no longer using > > the index offset for DRAW_INDEXED but instead adding it to INDEX_ADDR. > > This should make no difference. > > > > Preparation for GC7000 support. > > I haven't looked into it much yet, but this commit breaks QT5 GUI > rendering on GC3000 for me. It seems like the DRAWs get dropped on the > floor with nothing being rendered. I didn't spot anything obviously > wrong in this patch from a quick look, so would be glad if you could > look into this. Are you possibly running an older kernel that doesn't allow DRAW_INSTANCED in the command stream filter? I did test this patch series on GC3000, fairly sure that included qt5. But yes let's leave out this patch for now, or have the change in behavior only for GC7000. Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0
On Thu, Nov 16, 2017 at 01:38:32PM -0500, Ilia Mirkin wrote: > > Which is annoying as it means that shader state now depends on either the > > kind > > of primitive (which is per-draw), or the shading model (which is part of > > rasterizer state). > > I take it your hardware doesn't support setting a different polygon > mode for front and back-facing triangles? I don't know. Might have been added at some point, though I wouldn't be suprised if it's emulated. The current driver certainly doesn't handle it. In general Vivante's focus seems to have been to make hw for OpenGL ES 2.0, then 3.x, recently Vulkan. Anything else is usually emulated. I don't currently have any means to figure out, cannot test OpenGL desktop with the blob. > > Thinking of it, the latter is also an option, at least we don't have to > > "smuggle" per-draw info into the state emit call. But it's still > > quite more involved to fix than I expected :( > > When you say flat shading ... are you talking about like "flat in vec4 > bla", or like glShadeModel(GL_FLAT)? If the latter, note that this > only applies to gl_Color / gl_SecondaryColor. Not regular varyings. > The "flat" keyword can apply to any varying, of course. Talking about support for ancient glShaderModel(...). You're right about it only applying to color semantics, that's why my patch is not correct. We're fighting with the hardware there which seemingly uses different semantics. flat as a GLSL attribute was introduced in GLSL ES 300, not sure how this is handled by the blob, but we're not quite there yet. > These are totally separate concepts, I'd really recommend poring over > your traces again to see if you might have missed something. Here's > how it works on Adreno: > > a3xx is easy: > https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/freedreno/a3xx/fd3_program.c#n386 > > a4xx+ is a little weird: > https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/freedreno/a4xx/fd4_program.c#n473 > + > https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c#n2945 > > (i.e. you have to load flat inputs specially on a4xx+) Interesting, both quite different approaches from Vivante. Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 17/17] etnaviv: GC7000: Factor out state based texture functionality
Prepare for two texture handling paths, the descriptor-based
path will be added in a future commit. These are structured
so that the texture implementation handles its own state
emission.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/Makefile.sources | 2 +
src/gallium/drivers/etnaviv/etnaviv_context.h | 6 +
src/gallium/drivers/etnaviv/etnaviv_emit.c | 107 +--
src/gallium/drivers/etnaviv/etnaviv_texture.c | 194 ++--
src/gallium/drivers/etnaviv/etnaviv_texture.h | 40 +--
.../drivers/etnaviv/etnaviv_texture_state.c| 329 +
.../drivers/etnaviv/etnaviv_texture_state.h| 82 +
src/gallium/drivers/etnaviv/meson.build| 2 +
8 files changed, 454 insertions(+), 308 deletions(-)
create mode 100644 src/gallium/drivers/etnaviv/etnaviv_texture_state.c
create mode 100644 src/gallium/drivers/etnaviv/etnaviv_texture_state.h
- Renamed from _plain to _state.
- Remove unnecessary #include in header.
- Needed update for ASTC.
- Needed update for sampler TS: add context method ts_for_sampler_view to get
the associated sampler TS configuration for a sampler view. This factors out
the sampler TS unit configuration which is more or less the same,
and also first step in handling sampler TS to sampler mapping dynamically
which is possible on HALTI5.
- Update both meson and makefile.
diff --git a/src/gallium/drivers/etnaviv/Makefile.sources
b/src/gallium/drivers/etnaviv/Makefile.sources
index 78029ad..587d369 100644
--- a/src/gallium/drivers/etnaviv/Makefile.sources
+++ b/src/gallium/drivers/etnaviv/Makefile.sources
@@ -51,6 +51,8 @@ C_SOURCES := \
etnaviv_surface.h \
etnaviv_texture.c \
etnaviv_texture.h \
+ etnaviv_texture_state.c \
+ etnaviv_texture_state.h \
etnaviv_tiling.c \
etnaviv_tiling.h \
etnaviv_transfer.c \
diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.h
b/src/gallium/drivers/etnaviv/etnaviv_context.h
index 1ed38ce..584caa7 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_context.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.h
@@ -42,6 +42,7 @@
struct pipe_screen;
struct etna_shader_variant;
+struct etna_sampler_ts;
struct etna_index_buffer {
struct etna_reloc FE_INDEX_STREAM_BASE_ADDR;
@@ -100,6 +101,11 @@ struct etna_shader_uniform_info {
struct etna_context {
struct pipe_context base;
+ /* GPU-specific implementation to emit texture state */
+ void (*emit_texture_state)(struct etna_context *pctx);
+ /* Get sampler TS pointer for sampler view */
+ struct etna_sampler_ts *(*ts_for_sampler_view)(struct pipe_sampler_view
*pview);
+
struct etna_specs specs;
struct etna_screen *screen;
struct etna_cmd_stream *stream;
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 339ecd2..85a4819 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -214,7 +214,6 @@ void
etna_emit_state(struct etna_context *ctx)
{
struct etna_cmd_stream *stream = ctx->stream;
- uint32_t active_samplers = active_samplers_bits(ctx);
/* Pre-reserve the command buffer space which we are likely to need.
* This must cover all the state emitted below, and the following
@@ -555,113 +554,9 @@ etna_emit_state(struct etna_context *ctx)
/*01668*/ EMIT_STATE_RELOC(TS_DEPTH_SURFACE_BASE,
>framebuffer.TS_DEPTH_SURFACE_BASE);
/*0166C*/ EMIT_STATE(TS_DEPTH_CLEAR_VALUE,
ctx->framebuffer.TS_DEPTH_CLEAR_VALUE);
}
- if (unlikely(dirty & ETNA_DIRTY_SAMPLER_VIEWS)) {
- for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
- if ((1 << x) & active_samplers) {
-struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
-/*01720*/ EMIT_STATE(TS_SAMPLER_CONFIG(x), sv->TS_SAMPLER_CONFIG);
- }
- }
- for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
- if ((1 << x) & active_samplers) {
-struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
-/*01740*/ EMIT_STATE_RELOC(TS_SAMPLER_STATUS_BASE(x),
>TS_SAMPLER_STATUS_BASE);
- }
- }
- for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
- if ((1 << x) & active_samplers) {
-struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
-/*01760*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE(x),
sv->TS_SAMPLER_CLEAR_VALUE);
- }
- }
- for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
- if ((1 << x) & active_samplers) {
-struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
-/*01780*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE2(x),
sv->TS
[Mesa-dev] [PATCH v2 16/17] etnaviv: GC7000: Move active_samplers_bits to texture
This needs to be shared between texture_plain and texture_desc.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c| 12
src/gallium/drivers/etnaviv/etnaviv_texture.c | 6 ++
src/gallium/drivers/etnaviv/etnaviv_texture.h | 11 +++
3 files changed, 17 insertions(+), 12 deletions(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 3ae0bb2..339ecd2 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -91,18 +91,6 @@ etna_stall(struct etna_cmd_stream *stream, uint32_t from,
uint32_t to)
#define EMIT_STATE_RELOC(state_name, src_value) \
etna_coalsence_emit_reloc(stream, , VIVS_##state_name, src_value)
-/* Create bit field that specifies which samplers are active and thus need to
be
- * programmed
- * 32 bits is enough for 32 samplers. As far as I know this is the upper bound
- * supported on any Vivante hw
- * up to GC4000.
- */
-static uint32_t
-active_samplers_bits(struct etna_context *ctx)
-{
- return ctx->active_sampler_views & ctx->active_samplers;
-}
-
#define ETNA_3D_CONTEXT_SIZE (400) /* keep this number above "Total state
updates (fixed)" from gen_weave_state tool */
static unsigned
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.c
b/src/gallium/drivers/etnaviv/etnaviv_texture.c
index ad0ea16..55b92f6 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.c
@@ -432,6 +432,12 @@ etna_texture_barrier(struct pipe_context *pctx, unsigned
flags)
etna_set_state(ctx->stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_COLOR
| VIVS_GL_FLUSH_CACHE_TEXTURE);
}
+uint32_t
+active_samplers_bits(struct etna_context *ctx)
+{
+ return ctx->active_sampler_views & ctx->active_samplers;
+}
+
void
etna_texture_init(struct pipe_context *pctx)
{
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.h
b/src/gallium/drivers/etnaviv/etnaviv_texture.h
index ec50bca..373e10c 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.h
@@ -34,6 +34,8 @@
#include "hw/state_3d.xml.h"
+struct etna_context;
+
struct etna_sampler_state {
struct pipe_sampler_state base;
@@ -83,4 +85,13 @@ etna_texture_init(struct pipe_context *pctx);
struct etna_resource *
etna_texture_handle_incompatible(struct pipe_context *pctx, struct
pipe_resource *prsc);
+/* Create bit field that specifies which samplers are active and thus need to
be
+ * programmed
+ * 32 bits is enough for 32 samplers. As far as I know this is the upper bound
+ * supported on any Vivante hw
+ * up to GC4000.
+ */
+uint32_t
+active_samplers_bits(struct etna_context *ctx);
+
#endif
--
2.7.4
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[Mesa-dev] [PATCH v2 12/17] etnaviv: GC7000: State changes for HALTI3..5
Update state objects to add new state, and emit function to emit new
state.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 246 +++--
src/gallium/drivers/etnaviv/etnaviv_internal.h | 4 +
src/gallium/drivers/etnaviv/etnaviv_state.c| 35 +++-
src/gallium/drivers/etnaviv/etnaviv_zsa.c | 3 +-
4 files changed, 216 insertions(+), 72 deletions(-)
Conceptually unchanged since v1, but needed serious rebase.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 5cb1415..79ba83c 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -133,6 +133,91 @@ required_stream_size(struct etna_context *ctx)
return size;
}
+/* Emit state that only exists on HALTI5+ */
+static void
+emit_halti5_only_state(struct etna_context *ctx, int vs_output_count)
+{
+ struct etna_cmd_stream *stream = ctx->stream;
+ uint32_t dirty = ctx->dirty;
+ struct etna_coalesce coalesce;
+
+ etna_coalesce_start(stream, );
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /* Magic states (load balancing, inter-unit sync, buffers) */
+ /*00870*/ EMIT_STATE(VS_HALTI5_OUTPUT_COUNT, vs_output_count |
((vs_output_count * 0x10) << 8));
+ /*008A0*/ EMIT_STATE(VS_HALTI5_UNK008A0, 0x0001000e |
((0x110/vs_output_count) << 20));
+ for (int x = 0; x < 4; ++x) {
+ /*008E0*/ EMIT_STATE(VS_HALTI5_OUTPUT(x),
ctx->shader_state.VS_OUTPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_VERTEX_ELEMENTS | ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 4; ++x) {
+ /*008C0*/ EMIT_STATE(VS_HALTI5_INPUT(x),
ctx->shader_state.VS_INPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*00A90*/ EMIT_STATE(PA_VARYING_NUM_COMPONENTS(0),
ctx->shader_state.GL_VARYING_NUM_COMPONENTS);
+ /*00AA8*/ EMIT_STATE(PA_VS_OUTPUT_COUNT, vs_output_count);
+ /*01080*/ EMIT_STATE(PS_VARYING_NUM_COMPONENTS(0),
ctx->shader_state.GL_VARYING_NUM_COMPONENTS);
+ /*03888*/ EMIT_STATE(GL_HALTI5_SH_SPECIALS,
ctx->shader_state.GL_HALTI5_SH_SPECIALS);
+ }
+ etna_coalesce_end(stream, );
+}
+
+/* Emit state that no longer exists on HALTI5 */
+static void
+emit_pre_halti5_state(struct etna_context *ctx)
+{
+ struct etna_cmd_stream *stream = ctx->stream;
+ uint32_t dirty = ctx->dirty;
+ struct etna_coalesce coalesce;
+
+ etna_coalesce_start(stream, );
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*00800*/ EMIT_STATE(VS_END_PC, ctx->shader_state.VS_END_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 4; ++x) {
+/*00810*/ EMIT_STATE(VS_OUTPUT(x), ctx->shader_state.VS_OUTPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_VERTEX_ELEMENTS | ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 4; ++x) {
+/*00820*/ EMIT_STATE(VS_INPUT(x), ctx->shader_state.VS_INPUT[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*00838*/ EMIT_STATE(VS_START_PC, ctx->shader_state.VS_START_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ for (int x = 0; x < 10; ++x) {
+ /*00A40*/ EMIT_STATE(PA_SHADER_ATTRIBUTES(x),
ctx->shader_state.PA_SHADER_ATTRIBUTES[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) {
+ /*00E04*/ EMIT_STATE(RA_MULTISAMPLE_UNK00E04,
ctx->framebuffer.RA_MULTISAMPLE_UNK00E04);
+ for (int x = 0; x < 4; ++x) {
+ /*00E10*/ EMIT_STATE(RA_MULTISAMPLE_UNK00E10(x),
ctx->framebuffer.RA_MULTISAMPLE_UNK00E10[x]);
+ }
+ for (int x = 0; x < 16; ++x) {
+ /*00E40*/ EMIT_STATE(RA_CENTROID_TABLE(x),
ctx->framebuffer.RA_CENTROID_TABLE[x]);
+ }
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_FRAMEBUFFER))) {
+ /*01000*/ EMIT_STATE(PS_END_PC, ctx->shader_state.PS_END_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER | ETNA_DIRTY_FRAMEBUFFER))) {
+ /*01018*/ EMIT_STATE(PS_START_PC, ctx->shader_state.PS_START_PC);
+ }
+ if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
+ /*03820*/ EMIT_STATE(GL_VARYING_NUM_COMPONENTS,
ctx->shader_state.GL_VARYING_NUM_COMPONENTS);
+ for (int x = 0; x < 2; ++x) {
+ /*03828*/ EMIT_STATE(GL_VARYING_COMPONENT_USE(x),
ctx->shader_state.GL_VARYING_COMPONENT_USE[x]);
+ }
+ }
+ etna_coalesce_end(stream, );
+}
+
/* Weave state before draw operation. This function merges all the compiled
* state blocks under the context into one device register state. Parts of
* this state that are changed since last call (dirty) will be uploaded as
@@ -197,16 +282,31 @@ etna_emit_state(struct etna_context *ctx)
* a) the number
[Mesa-dev] [PATCH v2 05/17] etnaviv: GC7000: Support BLT as recipient for etna_stall
When the BLT is involved as source or target, add an extra BLT
enable/disable sequence around the sync sequence.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 3b460a0..98f7baa 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -41,6 +41,7 @@
#include "etnaviv_zsa.h"
#include "hw/common.xml.h"
#include "hw/state.xml.h"
+#include "hw/state_blt.xml.h"
#include "util/u_math.h"
struct etna_coalesce {
@@ -60,8 +61,15 @@ CMD_STALL(struct etna_cmd_stream *stream, uint32_t from,
uint32_t to)
void
etna_stall(struct etna_cmd_stream *stream, uint32_t from, uint32_t to)
{
- etna_cmd_stream_reserve(stream, 4);
+ bool blt = (from == SYNC_RECIPIENT_BLT) || (to == SYNC_RECIPIENT_BLT);
+ etna_cmd_stream_reserve(stream, blt ? 8 : 4);
+ if (blt) {
+ etna_emit_load_state(stream, VIVS_BLT_ENABLE >> 2, 1, 0);
+ etna_cmd_stream_emit(stream, 1);
+ }
+
+ /* TODO: set bit 28/29 of token after BLT COPY_BUFFER */
etna_emit_load_state(stream, VIVS_GL_SEMAPHORE_TOKEN >> 2, 1, 0);
etna_cmd_stream_emit(stream, VIVS_GL_SEMAPHORE_TOKEN_FROM(from) |
VIVS_GL_SEMAPHORE_TOKEN_TO(to));
@@ -73,6 +81,11 @@ etna_stall(struct etna_cmd_stream *stream, uint32_t from,
uint32_t to)
etna_emit_load_state(stream, VIVS_GL_STALL_TOKEN >> 2, 1, 0);
etna_cmd_stream_emit(stream, VIVS_GL_STALL_TOKEN_FROM(from) |
VIVS_GL_STALL_TOKEN_TO(to));
}
+
+ if (blt) {
+ etna_emit_load_state(stream, VIVS_BLT_ENABLE >> 2, 1, 0);
+ etna_cmd_stream_emit(stream, 0);
+ }
}
static void
--
2.7.4
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[Mesa-dev] [PATCH v2 15/17] etnaviv: GC7000: Factor out incompatible texture handling logic
This will be shared with the texture descriptor path.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_texture.c | 42 +--
src/gallium/drivers/etnaviv/etnaviv_texture.h | 5
2 files changed, 31 insertions(+), 16 deletions(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.c
b/src/gallium/drivers/etnaviv/etnaviv_texture.c
index 295f7eb..ad0ea16 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.c
@@ -226,23 +226,10 @@ etna_resource_sampler_compatible(struct etna_resource
*res)
return true;
}
-static struct pipe_sampler_view *
-etna_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
- const struct pipe_sampler_view *so)
+struct etna_resource *
+etna_texture_handle_incompatible(struct pipe_context *pctx, struct
pipe_resource *prsc)
{
- struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
struct etna_resource *res = etna_resource(prsc);
- struct etna_context *ctx = etna_context(pctx);
- const uint32_t format = translate_texture_format(so->format);
- const bool ext = !!(format & EXT_FORMAT);
- const bool astc = !!(format & ASTC_FORMAT);
- const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
- so->swizzle_g, so->swizzle_b,
- so->swizzle_a);
-
- if (!sv)
- return NULL;
-
if (!etna_resource_sampler_compatible(res)) {
/* The original resource is not compatible with the sampler.
* Allocate an appropriately tiled texture. */
@@ -257,11 +244,34 @@ etna_create_sampler_view(struct pipe_context *pctx,
struct pipe_resource *prsc,
}
if (!res->texture) {
- free(sv);
return NULL;
}
res = etna_resource(res->texture);
}
+ return res;
+}
+
+static struct pipe_sampler_view *
+etna_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
+ const struct pipe_sampler_view *so)
+{
+ struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
+ struct etna_context *ctx = etna_context(pctx);
+ const uint32_t format = translate_texture_format(so->format);
+ const bool ext = !!(format & EXT_FORMAT);
+ const bool astc = !!(format & ASTC_FORMAT);
+ const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
+ so->swizzle_g, so->swizzle_b,
+ so->swizzle_a);
+
+ if (!sv)
+ return NULL;
+
+ struct etna_resource *res = etna_texture_handle_incompatible(pctx, prsc);
+ if (!res) {
+ free(sv);
+ return NULL;
+ }
sv->base = *so;
pipe_reference_init(>base.reference, 1);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.h
b/src/gallium/drivers/etnaviv/etnaviv_texture.h
index 3043733..ec50bca 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.h
@@ -78,4 +78,9 @@ etna_sampler_view(struct pipe_sampler_view *view)
void
etna_texture_init(struct pipe_context *pctx);
+/* If the original resource is not compatible with the sampler. Allocate
+ * an appropriately tiled texture. */
+struct etna_resource *
+etna_texture_handle_incompatible(struct pipe_context *pctx, struct
pipe_resource *prsc);
+
#endif
--
2.7.4
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[Mesa-dev] [PATCH v2 10/17] etnaviv: GC7000: Update context reset for ..HALTI5
Update context reset for HALTI3..HALTI5, sorting states for the HALTI
version that has them.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_context.c | 37 +++
1 file changed, 32 insertions(+), 5 deletions(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.c
b/src/gallium/drivers/etnaviv/etnaviv_context.c
index 56ab395..7d54192 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_context.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.c
@@ -333,10 +333,11 @@ etna_cmd_stream_reset_notify(struct etna_cmd_stream
*stream, void *priv)
etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL);
etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x0001);
+ /* blob sets this to 0x4031 on GC7000, seems to make no difference,
+* but keep it in mind if depth behaves strangely. */
etna_set_state(stream, VIVS_RA_EARLY_DEPTH, 0x0031);
etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x3401);
- etna_set_state(stream, VIVS_PA_FLAGS, 0x); /* blob sets
ZCONVERT_BYPASS on GC3000, this messes up z for us */
- etna_set_state(stream, VIVS_RA_UNK00E0C, 0x);
+ etna_set_state(stream, VIVS_PA_FLAGS, 0x); /* blob sets
ZCONVERT_BYPASS on GC3000+, this messes up z for us */
etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A80, 0x38a01404);
etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x);
@@ -344,11 +345,37 @@ etna_cmd_stream_reset_notify(struct etna_cmd_stream
*stream, void *priv)
etna_set_state(stream, VIVS_PE_ALPHA_COLOR_EXT1, 0x);
etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x7000);
etna_set_state(stream, VIVS_PE_STENCIL_CONFIG_EXT2, 0x);
- etna_set_state(stream, VIVS_GL_UNK03834, 0x);
- etna_set_state(stream, VIVS_GL_UNK03838, 0x);
- etna_set_state(stream, VIVS_GL_UNK03854, 0x);
etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x);
+ /* There is no HALTI0 specific state */
+ if (ctx->specs.halti >= 1) { /* Only on HALTI1+ */
+ etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x0808);
+ }
+ if (ctx->specs.halti >= 2) { /* Only on HALTI2+ */
+ etna_set_state(stream, VIVS_RA_UNK00E0C, 0x);
+ }
+ if (ctx->specs.halti >= 3) { /* Only on HALTI3+ */
+ etna_set_state(stream, VIVS_PE_MEM_CONFIG, 0x); /* TODO: cache
modes */
+ etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210);
+ }
+ if (ctx->specs.halti >= 4) { /* Only on HALTI4+ */
+ etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fff & 0xf70f &
0xfff6 &
+ 0x6fff & 0xf6ff &
0xff7f);
+ etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x);
+ }
+ if (ctx->specs.halti >= 5) { /* Only on HALTI5+ */
+ etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x0001);
+ etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x0002);
+ etna_set_state(stream, VIVS_FE_HALTI5_UNK007C4, 0x);
+ etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x);
+ etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x0020);
+ etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING);
+ } else { /* Only on pre-HALTI5 */
+ etna_set_state(stream, VIVS_GL_UNK03834, 0x);
+ etna_set_state(stream, VIVS_GL_UNK03838, 0x);
+ etna_set_state(stream, VIVS_GL_UNK03854, 0x);
+ }
+
if (!ctx->specs.use_blt) {
/* Enable SINGLE_BUFFER for resolve, if supported */
etna_set_state(stream, VIVS_RS_SINGLE_BUFFER,
COND(ctx->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
--
2.7.4
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[Mesa-dev] [PATCH v2 13/17] etnaviv: GC7000: Make point sprites work on HALTI5
Track varying component offset of the point size output, as well as
provide the offset of the point coord input.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_compiler.c | 21 +++--
src/gallium/drivers/etnaviv/etnaviv_compiler.h | 1 +
src/gallium/drivers/etnaviv/etnaviv_shader.c | 8
3 files changed, 24 insertions(+), 6 deletions(-)
Fixed bug since v1: compofs was not increased correctly in all cases.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler.c
b/src/gallium/drivers/etnaviv/etnaviv_compiler.c
index 41ab403..bbc61a5 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_compiler.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_compiler.c
@@ -2550,12 +2550,14 @@ bool
etna_link_shader(struct etna_shader_link_info *info,
const struct etna_shader_variant *vs, const struct
etna_shader_variant *fs)
{
+ int comp_ofs = 0;
/* For each fragment input we need to find the associated vertex shader
* output, which can be found by matching on semantic name and index. A
* binary search could be used because the vs outputs are sorted by their
* semantic index and grouped by semantic type by fill_in_vs_outputs.
*/
assert(fs->infile.num_reg < ETNA_NUM_INPUTS);
+ info->pcoord_varying_comp_ofs = -1;
for (int idx = 0; idx < fs->infile.num_reg; ++idx) {
const struct etna_shader_inout *fsio = >infile.reg[idx];
@@ -2582,14 +2584,21 @@ etna_link_shader(struct etna_shader_link_info *info,
varying->use[3] = VARYING_COMPONENT_USE_USED;
- /* point coord is position output from VS, so has no dedicated reg */
- if (fsio->semantic.Name == TGSI_SEMANTIC_PCOORD)
- continue;
+ /* point coord is an input to the PS without matching VS output,
+ * so it gets a varying slot without being assigned a VS register.
+ */
+ if (fsio->semantic.Name == TGSI_SEMANTIC_PCOORD) {
+ info->pcoord_varying_comp_ofs = comp_ofs;
+ } else {
+ if (vsio == NULL) { /* not found -- link error */
+BUG("Semantic %d value %d not found in vertex shader outputs\n",
fsio->semantic.Name, fsio->semantic.Index);
+return true;
+ }
- if (vsio == NULL)
- return true; /* not found -- link error */
+ varying->reg = vsio->reg;
+ }
- varying->reg = vsio->reg;
+ comp_ofs += varying->num_components;
}
assert(info->num_varyings == fs->infile.num_reg);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler.h
b/src/gallium/drivers/etnaviv/etnaviv_compiler.h
index f5c1689..48b1b21 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_compiler.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_compiler.h
@@ -118,6 +118,7 @@ struct etna_shader_link_info {
/* each PS input is annotated with the VS output reg */
unsigned num_varyings;
struct etna_varying varyings[ETNA_NUM_INPUTS];
+ int pcoord_varying_comp_ofs;
};
bool
diff --git a/src/gallium/drivers/etnaviv/etnaviv_shader.c
b/src/gallium/drivers/etnaviv/etnaviv_shader.c
index 6012680..04ababc 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_shader.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_shader.c
@@ -179,6 +179,14 @@ etna_link_shaders(struct etna_context *ctx, struct
compiled_shader_state *cs,
cs->GL_VARYING_COMPONENT_USE[0] = component_use[0];
cs->GL_VARYING_COMPONENT_USE[1] = component_use[1];
+ cs->GL_HALTI5_SH_SPECIALS =
+ 0x7f7f | /* unknown bits, probably other PS inputs */
+ /* pointsize is last (see above) */
+ VIVS_GL_HALTI5_SH_SPECIALS_VS_PSIZE_OUT((vs->vs_pointsize_out_reg != -1)
?
+ cs->VS_OUTPUT_COUNT * 4 : 0x00) |
+ VIVS_GL_HALTI5_SH_SPECIALS_PS_PCOORD_IN((link.pcoord_varying_comp_ofs !=
-1) ?
+ link.pcoord_varying_comp_ofs :
0x7f);
+
/* reference instruction memory */
cs->vs_inst_mem_size = vs->code_size;
cs->VS_INST_MEM = vs->code;
--
2.7.4
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[Mesa-dev] [PATCH v2 09/17] etnaviv: GC7000: No RS align when using BLT
RS align is not necessary and might even be harmful when using the BLT
engine for blitting.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_resource.c | 15 +
src/gallium/drivers/etnaviv/etnaviv_surface.c | 41 +
src/gallium/drivers/etnaviv/etnaviv_transfer.c | 42 ++
3 files changed, 53 insertions(+), 45 deletions(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.c
b/src/gallium/drivers/etnaviv/etnaviv_resource.c
index ffdade9..d70152e 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.c
@@ -215,9 +215,11 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned
layout,
if (!util_format_is_compressed(templat->format)) {
/* If we have the TEXTURE_HALIGN feature, we can always align to the
* resolve engine's width. If not, we must not align resources used
- * only for textures. */
- bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN)
||
- !etna_resource_sampler_only(templat);
+ * only for textures. If this GPU uses the BLT engine, never do RS align.
+ */
+ bool rs_align = screen->specs.use_blt ? false : (
+ VIV_FEATURE(screen, chipMinorFeatures1,
TEXTURE_HALIGN) ||
+ !etna_resource_sampler_only(templat));
etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align,
,
, );
assert(paddingX && paddingY);
@@ -228,7 +230,7 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned
layout,
paddingY = 1;
}
- if (templat->target != PIPE_BUFFER)
+ if (!screen->specs.use_blt && templat->target != PIPE_BUFFER)
etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, );
if (templat->bind & PIPE_BIND_SCANOUT) {
@@ -237,7 +239,7 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned
layout,
struct winsys_handle handle;
/* pad scanout buffer size to be compatible with the RS */
- if (modifier == DRM_FORMAT_MOD_LINEAR)
+ if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR)
etna_adjust_rs_align(screen->specs.pixel_pipes, , );
scanout_templat.width0 = align(scanout_templat.width0, paddingX);
@@ -520,7 +522,8 @@ etna_resource_from_handle(struct pipe_screen *pscreen,
VIV_FEATURE(screen, chipMinorFeatures1,
TEXTURE_HALIGN),
, , >halign);
- etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, );
+ if (!screen->specs.use_blt)
+ etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, );
level->padded_width = align(level->width, paddingX);
level->padded_height = align(level->height, paddingY);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_surface.c
b/src/gallium/drivers/etnaviv/etnaviv_surface.c
index 4b95f65..4429573 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_surface.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_surface.c
@@ -116,26 +116,29 @@ etna_create_surface(struct pipe_context *pctx, struct
pipe_resource *prsc,
surf->ts_reloc.offset = surf->surf.ts_offset;
surf->ts_reloc.flags = 0;
- /* This (ab)uses the RS as a plain buffer memset().
- * Currently uses a fixed row size of 64 bytes. Some benchmarking with
- * different sizes may be in order. */
- struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo;
- etna_compile_rs_state(ctx, >clear_command, &(struct rs_state) {
- .source_format = RS_FORMAT_A8R8G8B8,
- .dest_format = RS_FORMAT_A8R8G8B8,
- .dest = ts_bo,
- .dest_offset = surf->surf.ts_offset,
- .dest_stride = 0x40,
- .dest_tiling = ETNA_LAYOUT_TILED,
- .dither = {0x, 0x},
- .width = 16,
- .height = etna_align_up(surf->surf.ts_size / 0x40, 4),
- .clear_value = {ctx->specs.ts_clear_value},
- .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1,
- .clear_bits = 0x
- });
+ if (!ctx->specs.use_blt) {
+ /* This (ab)uses the RS as a plain buffer memset().
+ * Currently uses a fixed row size of 64 bytes. Some benchmarking with
+ * different sizes may be in order. */
+ struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo;
+ etna_compile_rs_state(ctx, >clear_command, &(struct rs_state) {
+.source_format = RS_FORMAT_A8R8G8B8,
+.dest_format = RS_FORMAT_A8R8G8B8,
+.dest = ts_bo,
+.dest_offset = surf->surf.ts_offset,
+.dest_stride = 0x40,
+.dest_tiling = ETNA_LAYOUT_TIL
[Mesa-dev] [PATCH v2 14/17] etnaviv: GC7000: Track dirty sampler views
Need this to efficiently emit texture descriptor invalidations.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_context.c | 1 +
src/gallium/drivers/etnaviv/etnaviv_context.h | 1 +
src/gallium/drivers/etnaviv/etnaviv_emit.c| 1 +
src/gallium/drivers/etnaviv/etnaviv_texture.c | 9 +++--
4 files changed, 10 insertions(+), 2 deletions(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.c
b/src/gallium/drivers/etnaviv/etnaviv_context.c
index 7d54192..3038d21 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_context.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.c
@@ -382,6 +382,7 @@ etna_cmd_stream_reset_notify(struct etna_cmd_stream
*stream, void *priv)
}
ctx->dirty = ~0L;
+ ctx->dirty_sampler_views = ~0L;
/* go through all the used resources and clear their status flag */
LIST_FOR_EACH_ENTRY_SAFE(rsc, rsc_tmp, >used_resources, list)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.h
b/src/gallium/drivers/etnaviv/etnaviv_context.h
index 2903e09..1ed38ce 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_context.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.h
@@ -156,6 +156,7 @@ struct etna_context {
struct compiled_viewport_state viewport;
unsigned num_fragment_sampler_views;
uint32_t active_sampler_views;
+ uint32_t dirty_sampler_views;
struct pipe_sampler_view *sampler_view[PIPE_MAX_SAMPLERS];
struct pipe_constant_buffer constant_buffer[PIPE_SHADER_TYPES];
struct etna_vertexbuf_state vertex_buffer;
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 79ba83c..3ae0bb2 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -850,4 +850,5 @@ etna_emit_state(struct etna_context *ctx)
#undef EMIT_STATE_FIXP
#undef EMIT_STATE_RELOC
ctx->dirty = 0;
+ ctx->dirty_sampler_views = 0;
}
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.c
b/src/gallium/drivers/etnaviv/etnaviv_texture.c
index 6a33f78..295f7eb 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.c
@@ -345,12 +345,14 @@ set_sampler_views(struct etna_context *ctx, unsigned
start, unsigned end,
{
unsigned i, j;
uint32_t mask = 1 << start;
+ uint32_t prev_active_sampler_views = ctx->active_sampler_views;
for (i = start, j = 0; j < nr; i++, j++, mask <<= 1) {
pipe_sampler_view_reference(>sampler_view[i], views[j]);
- if (views[j])
+ if (views[j]) {
ctx->active_sampler_views |= mask;
- else
+ ctx->dirty_sampler_views |= mask;
+ } else
ctx->active_sampler_views &= ~mask;
}
@@ -358,6 +360,9 @@ set_sampler_views(struct etna_context *ctx, unsigned start,
unsigned end,
pipe_sampler_view_reference(>sampler_view[i], NULL);
ctx->active_sampler_views &= ~mask;
}
+
+ /* sampler views that changed state (even to inactive) are also dirty */
+ ctx->dirty_sampler_views |= ctx->active_sampler_views ^
prev_active_sampler_views;
}
static inline void
--
2.7.4
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[Mesa-dev] [PATCH v2 08/17] etnaviv: GC7000: BLT engine blitting support
Add an implemenation of key clear_blit functions using the BLT engine
that replaced the RS on GC7000.
Also set level->size correctly for imported resources. This is important
for the BLT resolve-in-place path to work for them.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/Makefile.sources | 3 +
src/gallium/drivers/etnaviv/etnaviv_blt.c| 562 +++
src/gallium/drivers/etnaviv/etnaviv_blt.h| 100
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 8 +-
src/gallium/drivers/etnaviv/etnaviv_context.c| 6 +-
src/gallium/drivers/etnaviv/etnaviv_internal.h | 2 +
src/gallium/drivers/etnaviv/etnaviv_resource.c | 1 +
src/gallium/drivers/etnaviv/etnaviv_screen.c | 2 +
src/gallium/drivers/etnaviv/meson.build | 3 +
9 files changed, 684 insertions(+), 3 deletions(-)
create mode 100644 src/gallium/drivers/etnaviv/etnaviv_blt.c
create mode 100644 src/gallium/drivers/etnaviv/etnaviv_blt.h
- Code style issues resolved
- Update both meson and makefile
- Remove copy_buffer, compute_mipmaps for now
- Make etnaviv_blt self-contained like etnaviv_rs, make functions that could be
static static
- No more etnaviv_clear_blit_blt.c
- Set level->size correctly for imported resources. This is important for the
BLT resolve-in-place path to work for them
diff --git a/src/gallium/drivers/etnaviv/Makefile.sources
b/src/gallium/drivers/etnaviv/Makefile.sources
index aafcc38..78029ad 100644
--- a/src/gallium/drivers/etnaviv/Makefile.sources
+++ b/src/gallium/drivers/etnaviv/Makefile.sources
@@ -4,12 +4,15 @@ C_SOURCES := \
hw/common_3d.xml.h \
hw/isa.xml.h \
hw/state_3d.xml.h \
+ hw/state_blt.xml.h \
hw/state.xml.h \
\
etnaviv_asm.c \
etnaviv_asm.h \
etnaviv_blend.c \
etnaviv_blend.h \
+ etnaviv_blt.c \
+ etnaviv_blt.h \
etnaviv_clear_blit.c \
etnaviv_clear_blit.h \
etnaviv_compiler.c \
diff --git a/src/gallium/drivers/etnaviv/etnaviv_blt.c
b/src/gallium/drivers/etnaviv/etnaviv_blt.c
new file mode 100644
index 000..ec3eac9
--- /dev/null
+++ b/src/gallium/drivers/etnaviv/etnaviv_blt.c
@@ -0,0 +1,562 @@
+/*
+ * Copyright (c) 2017 Etnaviv Project
+ * Copyright (C) 2017 Zodiac Inflight Innovations
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *Wladimir J. van der Laan <laa...@gmail.com>
+ */
+#include "etnaviv_blt.h"
+
+#include "etnaviv_emit.h"
+#include "etnaviv_clear_blit.h"
+#include "etnaviv_context.h"
+#include "etnaviv_emit.h"
+#include "etnaviv_format.h"
+#include "etnaviv_resource.h"
+#include "etnaviv_surface.h"
+#include "etnaviv_translate.h"
+
+#include "util/u_math.h"
+#include "pipe/p_defines.h"
+#include "pipe/p_state.h"
+#include "util/u_blitter.h"
+#include "util/u_inlines.h"
+#include "util/u_memory.h"
+#include "util/u_surface.h"
+
+#include "hw/common_3d.xml.h"
+#include "hw/state_blt.xml.h"
+#include "hw/common.xml.h"
+
+#include
+
+/* Currently, used BLT formats overlap 100% with RS formats */
+#define translate_blt_format translate_rs_format
+
+static inline uint32_t
+blt_compute_stride_bits(const struct blt_imginfo *img)
+{
+ return VIVS_BLT_DEST_STRIDE_TILING(img->tiling == ETNA_LAYOUT_LINEAR ? 0 :
3) | /* 1/3? */
+ VIVS_BLT_DEST_STRIDE_FORMAT(img->format) |
+ VIVS_BLT_DEST_STRIDE_STRIDE(img->stride);
+}
+
+static inline uint32_t
+blt_compute_img_config_bits(const struct blt_imginfo *img, bool for_dest)
+{
+ uint32_t tiling_bits = 0;
+ if (img->tiling == ETNA_LAYOUT_SUPER_TILED) {
+ tilin
[Mesa-dev] [PATCH v2 11/17] etnaviv: GC7000: Update screen specs for HALTI5
- This core must load shaders from memory (AFAIK)
- Yet another new location for UNIFORMS
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_screen.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c
b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index eda0cd1..24d2f40 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -738,7 +738,13 @@ etna_get_specs(struct etna_screen *screen)
screen->specs.has_halti2_instructions =
VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
- if (VIV_FEATURE(screen, chipMinorFeatures3, INSTRUCTION_CACHE)) {
+ if (screen->specs.halti >= 5) {
+ /* GC7000 - this core must load shaders from memory. */
+ screen->specs.vs_offset = 0;
+ screen->specs.ps_offset = 0;
+ screen->specs.max_instructions = 0; /* Do not program shaders manually */
+ screen->specs.has_icache = true;
+ } else if (VIV_FEATURE(screen, chipMinorFeatures3, INSTRUCTION_CACHE)) {
/* GC3000 - this core is capable of loading shaders from
* memory. It can also run shaders from registers, as a fallback, but
* "max_instructions" does not have the correct value. It has place for
@@ -791,9 +797,14 @@ etna_get_specs(struct etna_screen *screen)
screen->specs.max_vs_uniforms = 256;
screen->specs.max_ps_uniforms = 256;
}
- /* unified uniform memory on GC3000 - HALTI1 feature bit is just a guess
- */
- if (VIV_FEATURE(screen, chipMinorFeatures2, HALTI1)) {
+
+ if (screen->specs.halti >= 5) {
+ screen->specs.has_unified_uniforms = true;
+ screen->specs.vs_uniforms_offset = VIVS_SH_HALTI5_UNIFORMS_MIRROR(0);
+ screen->specs.ps_uniforms_offset =
VIVS_SH_HALTI5_UNIFORMS(screen->specs.max_vs_uniforms*4);
+ } else if (screen->specs.halti >= 1) {
+ /* unified uniform memory on GC3000 - HALTI1 feature bit is just a guess
+ */
screen->specs.has_unified_uniforms = true;
screen->specs.vs_uniforms_offset = VIVS_SH_UNIFORMS(0);
/* hardcode PS uniforms to start after end of VS uniforms -
--
2.7.4
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[Mesa-dev] [PATCH v2 02/17] etnaviv: Put HALTI level in specs
The HALTI level is an indication of the gross architecture of the GPU.
It determines for significant part what feature level the GPU has, what
state (especially frontend state) is there, and where it is located.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_internal.h | 2 ++
src/gallium/drivers/etnaviv/etnaviv_screen.c | 21 +
2 files changed, 23 insertions(+)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_internal.h
b/src/gallium/drivers/etnaviv/etnaviv_internal.h
index 707a1e0..48dd5bf 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_internal.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_internal.h
@@ -60,6 +60,8 @@
/* GPU chip 3D specs */
struct etna_specs {
+ /* HALTI (gross architecture) level. -1 for pre-HALTI. */
+ int halti : 8;
/* supports SUPERTILE (64x64) tiling? */
unsigned can_supertile : 1;
/* needs z=(z+w)/2, for older GCxxx */
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c
b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index eaf3ca2..9a957ab 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -690,6 +690,27 @@ etna_get_specs(struct etna_screen *screen)
}
screen->specs.num_constants = val;
+ /* Figure out gross GPU architecture. See rnndb/common.xml for a specific
+* description of the differences. */
+ if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI5))
+ screen->specs.halti = 5; /* New GC7000/GC8x00 */
+ else if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI4))
+ screen->specs.halti = 4; /* Old GC7000/GC7400 */
+ else if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI3))
+ screen->specs.halti = 3; /* None? */
+ else if (VIV_FEATURE(screen, chipMinorFeatures4, HALTI2))
+ screen->specs.halti = 2; /* GC2500/GC3000/GC5000/GC6400 */
+ else if (VIV_FEATURE(screen, chipMinorFeatures2, HALTI1))
+ screen->specs.halti = 1; /* GC900/GC4000/GC7000UL */
+ else if (VIV_FEATURE(screen, chipMinorFeatures1, HALTI0))
+ screen->specs.halti = 0; /* GC880/GC2000/GC7000TM */
+ else
+ screen->specs.halti = -1; /* GC7000nanolite / pre-GC2000 except GC880 */
+ if (screen->specs.halti >= 0)
+ DBG("etnaviv: GPU arch: HALTI%d\n", screen->specs.halti);
+ else
+ DBG("etnaviv: GPU arch: pre-HALTI\n");
+
screen->specs.can_supertile =
VIV_FEATURE(screen, chipMinorFeatures0, SUPER_TILED);
screen->specs.bits_per_tile =
--
2.7.4
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[Mesa-dev] [PATCH v2 03/17] etnaviv: Emit SCALE for vertex attributes
This is used by HALTI2+ (GC3000+) when drawing with DRAW_INSTANCED.
It is also necessary when switching between integer and floating point
vertex element formats.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 5 +
src/gallium/drivers/etnaviv/etnaviv_internal.h | 1 +
src/gallium/drivers/etnaviv/etnaviv_state.c| 1 +
3 files changed, 7 insertions(+)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 999d2ca..3b460a0 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -350,6 +350,11 @@ etna_emit_state(struct etna_context *ctx)
/*00600*/ etna_set_state_multi(stream, VIVS_FE_VERTEX_ELEMENT_CONFIG(0),
ctx->vertex_elements->num_elements,
ctx->vertex_elements->FE_VERTEX_ELEMENT_CONFIG);
+ if (ctx->specs.halti >= 2) {
+ /*00780*/ etna_set_state_multi(stream,
VIVS_FE_GENERIC_ATTRIB_SCALE(0),
+ctx->vertex_elements->num_elements,
+ctx->vertex_elements->NFE_GENERIC_ATTRIB_SCALE);
+ }
}
/* The following code is originally generated by gen_merge_state.py, to
diff --git a/src/gallium/drivers/etnaviv/etnaviv_internal.h
b/src/gallium/drivers/etnaviv/etnaviv_internal.h
index 48dd5bf..6375ae0 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_internal.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_internal.h
@@ -216,6 +216,7 @@ struct compiled_framebuffer_state {
struct compiled_vertex_elements_state {
unsigned num_elements;
uint32_t FE_VERTEX_ELEMENT_CONFIG[VIVS_FE_VERTEX_ELEMENT_CONFIG__LEN];
+ uint32_t NFE_GENERIC_ATTRIB_SCALE[VIVS_NFE_GENERIC_ATTRIB__LEN];
};
/* Compiled context->set_vertex_buffer result */
diff --git a/src/gallium/drivers/etnaviv/etnaviv_state.c
b/src/gallium/drivers/etnaviv/etnaviv_state.c
index 59a7281..7f44073 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_state.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_state.c
@@ -550,6 +550,7 @@ etna_vertex_elements_state_create(struct pipe_context *pctx,
VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM(elements[idx].vertex_buffer_index) |
VIVS_FE_VERTEX_ELEMENT_CONFIG_START(elements[idx].src_offset) |
VIVS_FE_VERTEX_ELEMENT_CONFIG_END(end_offset - start_offset);
+ cs->NFE_GENERIC_ATTRIB_SCALE[idx] = 0x3f80; /* 1 for integer, 1.0
for float */
}
return cs;
--
2.7.4
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[Mesa-dev] [PATCH v2 07/17] etnaviv: GC7000: Factor out RS blit functionality
Prepare for BLT-based blitting path by moving RS-based
blitting to the RS implementation file, making this
self-contained.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 558 +--
src/gallium/drivers/etnaviv/etnaviv_clear_blit.h | 6 +
src/gallium/drivers/etnaviv/etnaviv_emit.c | 79 ---
src/gallium/drivers/etnaviv/etnaviv_emit.h | 3 -
src/gallium/drivers/etnaviv/etnaviv_rs.c | 665 ++-
src/gallium/drivers/etnaviv/etnaviv_rs.h | 4 +-
6 files changed, 677 insertions(+), 638 deletions(-)
- Made etnaviv_rs.c self-contained, make functions that could be static static
and local (idea by Christian Gmeiner)
- No more etnaviv_clear_blit_rs.c, so no build system changes needed here.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
index ff37a6b..ae5300a 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
@@ -30,9 +30,9 @@
#include "etnaviv_context.h"
#include "etnaviv_emit.h"
-#include "etnaviv_emit.h"
#include "etnaviv_format.h"
#include "etnaviv_resource.h"
+#include "etnaviv_rs.h"
#include "etnaviv_surface.h"
#include "etnaviv_translate.h"
@@ -44,7 +44,7 @@
#include "util/u_surface.h"
/* Save current state for blitter operation */
-static void
+void
etna_blit_save_state(struct etna_context *ctx)
{
util_blitter_save_vertex_buffer_slot(ctx->blitter, ctx->vertex_buffer.vb);
@@ -65,43 +65,8 @@ etna_blit_save_state(struct etna_context *ctx)
ctx->num_fragment_sampler_views, ctx->sampler_view);
}
-/* Generate clear command for a surface (non-fast clear case) */
-void
-etna_rs_gen_clear_surface(struct etna_context *ctx, struct etna_surface *surf,
- uint32_t clear_value)
-{
- struct etna_resource *dst = etna_resource(surf->base.texture);
- uint32_t format = translate_rs_format(surf->base.format);
-
- if (format == ETNA_NO_MATCH) {
- BUG("etna_rs_gen_clear_surface: Unhandled clear fmt %s",
util_format_name(surf->base.format));
- format = RS_FORMAT_A8R8G8B8;
- assert(0);
- }
-
- /* use tiled clear if width is multiple of 16 */
- bool tiled_clear = (surf->surf.padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
- (surf->surf.padded_height & ETNA_RS_HEIGHT_MASK) == 0;
-
- etna_compile_rs_state( ctx, >clear_command, &(struct rs_state) {
- .source_format = format,
- .dest_format = format,
- .dest = dst->bo,
- .dest_offset = surf->surf.offset,
- .dest_stride = surf->surf.stride,
- .dest_padded_height = surf->surf.padded_height,
- .dest_tiling = tiled_clear ? dst->layout : ETNA_LAYOUT_LINEAR,
- .dither = {0x, 0x},
- .width = surf->surf.padded_width, /* These must be padded to 16x4 if
!LINEAR, otherwise RS will hang */
- .height = surf->surf.padded_height,
- .clear_value = {clear_value},
- .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1,
- .clear_bits = 0x
- });
-}
-
-static inline uint32_t
-pack_rgba(enum pipe_format format, const float *rgba)
+uint32_t
+etna_clear_blit_pack_rgba(enum pipe_format format, const float *rgba)
{
union util_color uc;
util_pack_color(rgba, format, );
@@ -112,152 +77,6 @@ pack_rgba(enum pipe_format format, const float *rgba)
}
static void
-etna_blit_clear_color(struct pipe_context *pctx, struct pipe_surface *dst,
- const union pipe_color_union *color)
-{
- struct etna_context *ctx = etna_context(pctx);
- struct etna_surface *surf = etna_surface(dst);
- uint32_t new_clear_value = pack_rgba(surf->base.format, color->f);
-
- if (surf->surf.ts_size) { /* TS: use precompiled clear command */
- ctx->framebuffer.TS_COLOR_CLEAR_VALUE = new_clear_value;
-
- if (VIV_FEATURE(ctx->screen, chipMinorFeatures1, AUTO_DISABLE)) {
- /* Set number of color tiles to be filled */
- etna_set_state(ctx->stream, VIVS_TS_COLOR_AUTO_DISABLE_COUNT,
-surf->surf.padded_width * surf->surf.padded_height /
16);
- ctx->framebuffer.TS_MEM_CONFIG |=
VIVS_TS_MEM_CONFIG_COLOR_AUTO_DISABLE;
- }
-
- surf->level->ts_valid = true;
- ctx->dirty |= ETNA_DIRTY_TS | ETNA_DIRTY_DERIVE_TS;
- } else if (unlikely(new_clear_value != surf->level->clear_value)) { /*
Queue normal RS clear for non-TS surfaces */
- /* If clear color changed, re-generate stored command */
- etna_rs_gen_clear_surface(ctx, surf, new_clear_value);
- }
-
- etna_submit_rs_state(ctx, >clear_command);
- surf->level->clear_value = new_clear_value;
- resource_writt
[Mesa-dev] [PATCH v2 00/17] etnaviv: GC7000 preparation
This is the entire patch set needed for GC7000 support in Mesa, except for implementation of texture descriptors. There is a DRM kernel interface issue to resolve there [1]. I'm sending this early to get some eyes on it, and because it is quite a large patch-set and will be challenging to keep this rebased on top of master for a long time - and it doesn't hurt to have this in already because it does some preparation and modularization. I've carefully tried to preserve compatibility with all earlier hardware, and tested on GC2000 and GC3000, other testing is very welcome. The entire branch on top of current master can be found here: https://github.com/laanwj/mesa/tree/gc7000_preparation [1] To be specific, a texture descriptor contains pointers to GPU addresses of texture LOD level image data, which need to be managed by the kernel driver. I've currently avoided this issue as I'm using the Vivante kernel driver. If you want to see etnaviv_texture_desc.c in its current state, it's here: https://github.com/laanwj/mesa/blob/gc7000/src/gallium/drivers/etnaviv/etnaviv_texture_desc.c Wladimir J. van der Laan (17): etnaviv: Const-correctness etnaviv_emit.h etnaviv: Put HALTI level in specs etnaviv: Emit SCALE for vertex attributes etnaviv: Use only DRAW_INSTANCED on GC3000+ etnaviv: GC7000: Support BLT as recipient for etna_stall etnaviv: GC7000: Move etna_coalesce to emit header file etnaviv: GC7000: Factor out RS blit functionality etnaviv: GC7000: BLT engine blitting support etnaviv: GC7000: No RS align when using BLT etnaviv: GC7000: Update context reset for ..HALTI5 etnaviv: GC7000: Update screen specs for HALTI5 etnaviv: GC7000: State changes for HALTI3..5 etnaviv: GC7000: Make point sprites work on HALTI5 etnaviv: GC7000: Track dirty sampler views etnaviv: GC7000: Factor out incompatible texture handling logic etnaviv: GC7000: Move active_samplers_bits to texture etnaviv: GC7000: Factor out state based texture functionality src/gallium/drivers/etnaviv/Makefile.sources | 5 + src/gallium/drivers/etnaviv/etnaviv_blt.c | 562 + src/gallium/drivers/etnaviv/etnaviv_blt.h | 100 src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 564 + src/gallium/drivers/etnaviv/etnaviv_clear_blit.h | 6 + src/gallium/drivers/etnaviv/etnaviv_compiler.c | 21 +- src/gallium/drivers/etnaviv/etnaviv_compiler.h | 1 + src/gallium/drivers/etnaviv/etnaviv_context.c | 60 +- src/gallium/drivers/etnaviv/etnaviv_context.h | 7 + src/gallium/drivers/etnaviv/etnaviv_emit.c | 538 +++-- src/gallium/drivers/etnaviv/etnaviv_emit.h | 109 +++- src/gallium/drivers/etnaviv/etnaviv_internal.h | 9 + src/gallium/drivers/etnaviv/etnaviv_resource.c | 16 +- src/gallium/drivers/etnaviv/etnaviv_rs.c | 665 - src/gallium/drivers/etnaviv/etnaviv_rs.h | 4 +- src/gallium/drivers/etnaviv/etnaviv_screen.c | 42 +- src/gallium/drivers/etnaviv/etnaviv_shader.c | 8 + src/gallium/drivers/etnaviv/etnaviv_state.c| 36 +- src/gallium/drivers/etnaviv/etnaviv_surface.c | 41 +- src/gallium/drivers/etnaviv/etnaviv_texture.c | 205 ++- src/gallium/drivers/etnaviv/etnaviv_texture.h | 54 +- .../drivers/etnaviv/etnaviv_texture_state.c| 329 ++ .../drivers/etnaviv/etnaviv_texture_state.h| 82 +++ src/gallium/drivers/etnaviv/etnaviv_transfer.c | 42 +- src/gallium/drivers/etnaviv/etnaviv_zsa.c | 3 +- src/gallium/drivers/etnaviv/meson.build| 5 + 26 files changed, 2344 insertions(+), 1170 deletions(-) create mode 100644 src/gallium/drivers/etnaviv/etnaviv_blt.c create mode 100644 src/gallium/drivers/etnaviv/etnaviv_blt.h create mode 100644 src/gallium/drivers/etnaviv/etnaviv_texture_state.c create mode 100644 src/gallium/drivers/etnaviv/etnaviv_texture_state.h -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 06/17] etnaviv: GC7000: Move etna_coalesce to emit header file
Want to be able to emit state from the texture implementation,
and the blitter implementation.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 83 --
src/gallium/drivers/etnaviv/etnaviv_emit.h | 83 ++
2 files changed, 83 insertions(+), 83 deletions(-)
Moved earlier in the patch series because it's now needed for both RS and
texture
factorings. Otherwise unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 98f7baa..9509b9d 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -44,12 +44,6 @@
#include "hw/state_blt.xml.h"
#include "util/u_math.h"
-struct etna_coalesce {
- uint32_t start;
- uint32_t last_reg;
- uint32_t last_fixp;
-};
-
/* Queue a STALL command (queues 2 words) */
static inline void
CMD_STALL(struct etna_cmd_stream *stream, uint32_t from, uint32_t to)
@@ -88,83 +82,6 @@ etna_stall(struct etna_cmd_stream *stream, uint32_t from,
uint32_t to)
}
}
-static void
-etna_coalesce_start(struct etna_cmd_stream *stream,
-struct etna_coalesce *coalesce)
-{
- coalesce->start = etna_cmd_stream_offset(stream);
- coalesce->last_reg = 0;
- coalesce->last_fixp = 0;
-}
-
-static void
-etna_coalesce_end(struct etna_cmd_stream *stream,
- struct etna_coalesce *coalesce)
-{
- uint32_t end = etna_cmd_stream_offset(stream);
- uint32_t size = end - coalesce->start;
-
- if (size) {
- uint32_t offset = coalesce->start - 1;
- uint32_t value = etna_cmd_stream_get(stream, offset);
-
- value |= VIV_FE_LOAD_STATE_HEADER_COUNT(size);
- etna_cmd_stream_set(stream, offset, value);
- }
-
- /* append needed padding */
- if (end % 2 == 1)
- etna_cmd_stream_emit(stream, 0xdeadbeef);
-}
-
-static void
-check_coalsence(struct etna_cmd_stream *stream, struct etna_coalesce *coalesce,
-uint32_t reg, uint32_t fixp)
-{
- if (coalesce->last_reg != 0) {
- if (((coalesce->last_reg + 4) != reg) || (coalesce->last_fixp != fixp)) {
- etna_coalesce_end(stream, coalesce);
- etna_emit_load_state(stream, reg >> 2, 0, fixp);
- coalesce->start = etna_cmd_stream_offset(stream);
- }
- } else {
- etna_emit_load_state(stream, reg >> 2, 0, fixp);
- coalesce->start = etna_cmd_stream_offset(stream);
- }
-
- coalesce->last_reg = reg;
- coalesce->last_fixp = fixp;
-}
-
-static inline void
-etna_coalsence_emit(struct etna_cmd_stream *stream,
-struct etna_coalesce *coalesce, uint32_t reg,
-uint32_t value)
-{
- check_coalsence(stream, coalesce, reg, 0);
- etna_cmd_stream_emit(stream, value);
-}
-
-static inline void
-etna_coalsence_emit_fixp(struct etna_cmd_stream *stream,
- struct etna_coalesce *coalesce, uint32_t reg,
- uint32_t value)
-{
- check_coalsence(stream, coalesce, reg, 1);
- etna_cmd_stream_emit(stream, value);
-}
-
-static inline void
-etna_coalsence_emit_reloc(struct etna_cmd_stream *stream,
- struct etna_coalesce *coalesce, uint32_t reg,
- const struct etna_reloc *r)
-{
- if (r->bo) {
- check_coalsence(stream, coalesce, reg, 0);
- etna_cmd_stream_reloc(stream, r);
- }
-}
-
#define EMIT_STATE(state_name, src_value) \
etna_coalsence_emit(stream, , VIVS_##state_name, src_value)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.h
b/src/gallium/drivers/etnaviv/etnaviv_emit.h
index 3c3d129..dd90127 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.h
@@ -34,6 +34,12 @@
struct etna_context;
struct compiled_rs_state;
+struct etna_coalesce {
+ uint32_t start;
+ uint32_t last_reg;
+ uint32_t last_fixp;
+};
+
static inline void
etna_emit_load_state(struct etna_cmd_stream *stream, const uint16_t offset,
const uint16_t count, const int fixp)
@@ -138,6 +144,83 @@ etna_draw_instanced(struct etna_cmd_stream *stream,
etna_cmd_stream_emit(stream, 0);
}
+static inline void
+etna_coalesce_start(struct etna_cmd_stream *stream,
+struct etna_coalesce *coalesce)
+{
+ coalesce->start = etna_cmd_stream_offset(stream);
+ coalesce->last_reg = 0;
+ coalesce->last_fixp = 0;
+}
+
+static inline void
+etna_coalesce_end(struct etna_cmd_stream *stream,
+ struct etna_coalesce *coalesce)
+{
+ uint32_t end = etna_cmd_stream_offset(stream);
+ uint32_t size = end - coalesce->start;
+
+ if (size) {
+ uint32_t offset = coalesce->start - 1;
+ uint32_t value = etna_cmd_stream_get(stream, offset);
[Mesa-dev] [PATCH v2 01/17] etnaviv: Const-correctness etnaviv_emit.h
The relocation structure is never changed by submitting it.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Philipp Zabel <p.za...@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Unchanged since v1.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.h
b/src/gallium/drivers/etnaviv/etnaviv_emit.h
index 6a3c772..e0c0eda 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.h
@@ -59,7 +59,7 @@ etna_set_state(struct etna_cmd_stream *stream, uint32_t
address, uint32_t value)
static inline void
etna_set_state_reloc(struct etna_cmd_stream *stream, uint32_t address,
- struct etna_reloc *reloc)
+ const struct etna_reloc *reloc)
{
etna_cmd_stream_reserve(stream, 2);
etna_emit_load_state(stream, address >> 2, 1, 0);
--
2.7.4
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[Mesa-dev] [PATCH v2 04/17] etnaviv: Use only DRAW_INSTANCED on GC3000+
The blob does this, as DRAW_INSTANCED can replace fully all the other
draw commands. It is also required to handle integer vertex formats.
The other path is only there for compatibility and might go away (or at
least rot to become buggy due to dis-use) in newer hardware.
As a by-effect this changes the behavior for GC3000-, by no longer using
the index offset for DRAW_INDEXED but instead adding it to INDEX_ADDR.
This should make no difference.
Preparation for GC7000 support.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Philipp Zabel <p.za...@pengutronix.de>
---
src/gallium/drivers/etnaviv/etnaviv_context.c | 16
src/gallium/drivers/etnaviv/etnaviv_emit.h| 21 +
2 files changed, 33 insertions(+), 4 deletions(-)
Unchanged since v1, only commit message updated as noted by Philipp Zabel.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.c
b/src/gallium/drivers/etnaviv/etnaviv_context.c
index 65c20d2..5aa9c66 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_context.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.c
@@ -188,6 +188,8 @@ etna_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
BUG("Index buffer upload failed.");
return;
}
+ /* Add start to index offset, when rendering indexed */
+ index_offset += info->start * info->index_size;
ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo =
etna_resource(indexbuf)->bo;
ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
@@ -273,10 +275,16 @@ etna_draw_vbo(struct pipe_context *pctx, const struct
pipe_draw_info *info)
/* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES
*/
etna_emit_state(ctx);
- if (info->index_size)
- etna_draw_indexed_primitives(ctx->stream, draw_mode, info->start, prims,
info->index_bias);
- else
- etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
+ if (ctx->specs.halti >= 2) {
+ /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands,
as the blob does */
+ etna_draw_instanced(ctx->stream, info->index_size, draw_mode, 1,
+ info->count, info->index_size ? info->index_bias : info->start);
+ } else {
+ if (info->index_size)
+ etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims,
info->index_bias);
+ else
+ etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
+ }
if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) {
/* Stall the FE after every draw operation. This allows better
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.h
b/src/gallium/drivers/etnaviv/etnaviv_emit.h
index e0c0eda..3c3d129 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.h
@@ -117,6 +117,27 @@ etna_draw_indexed_primitives(struct etna_cmd_stream
*stream,
etna_cmd_stream_emit(stream, 0);
}
+/* important: this takes a vertex count, not a primitive count */
+static inline void
+etna_draw_instanced(struct etna_cmd_stream *stream,
+uint32_t indexed, uint32_t primitive_type,
+uint32_t instance_count,
+uint32_t vertex_count, uint32_t offset)
+{
+ etna_cmd_stream_reserve(stream, 3 + 1);
+ etna_cmd_stream_emit(stream,
+ VIV_FE_DRAW_INSTANCED_HEADER_OP_DRAW_INSTANCED |
+ COND(indexed, VIV_FE_DRAW_INSTANCED_HEADER_INDEXED) |
+ VIV_FE_DRAW_INSTANCED_HEADER_TYPE(primitive_type) |
+ VIV_FE_DRAW_INSTANCED_HEADER_INSTANCE_COUNT_LO(instance_count & 0x));
+ etna_cmd_stream_emit(stream,
+ VIV_FE_DRAW_INSTANCED_COUNT_INSTANCE_COUNT_HI(instance_count >> 16) |
+ VIV_FE_DRAW_INSTANCED_COUNT_VERTEX_COUNT(vertex_count));
+ etna_cmd_stream_emit(stream,
+ VIV_FE_DRAW_INSTANCED_START_INDEX(offset));
+ etna_cmd_stream_emit(stream, 0);
+}
+
void
etna_emit_state(struct etna_context *ctx);
--
2.7.4
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Re: [Mesa-dev] [PATCH] etnaviv: enable full overwrite when no color buffer is present
On Wed, Nov 15, 2017 at 05:33:17PM +0100, Lucas Stach wrote: > The OVERWRITE bit disables destination fetches, which is exactly what > we want when there is no valid color buffer bound. > > Signed-off-by: Lucas Stach <l.st...@pengutronix.de> Reviewed-by: Wladimir J. van der Laan <laa...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0
On Thu, Nov 16, 2017 at 12:26:05PM -0500, Ilia Mirkin wrote: > On Thu, Nov 16, 2017 at 7:15 AM, Wladimir <laa...@gmail.com> wrote: > The point of the texcoord semantics is precisely point sprite > replacement. NVIDIA hardware (Fermi+) can only do point sprite > replacement on certain specially-located varyings, hence the texcoord > semantic was created. (And nv30 also has similar restrictions. nv50 is > unconstrained, go figure.) > > In legacy GL, only gl_TexCoord varyings may be replaced by point > sprites, and the gl_PointCoord is handled separately. I don't think ES > has an equivalent of point sprite coord replacements. > > Hardware without that restriction should probably not use the texcoord > semantic and just use GENERIC for everything. Thanks for the info - I know about nothing about legacy GL, too long ago for me. For Vivantes (HALTI4-) it is the case that any varying can be replaced by the point coordinate. This is used for the gl_PointCoord as well. So far so good. However the trouble is in how this interacts with flat shading. The same flag is used to mark varyings that should be interpolated when using flat shading (apparently everything except COLOR?). Currently the criterion for setting the flag is !=SEMANTIC_COLOR. This works for polygons, by allowing non-color varyings override flat shading, but breaks when rendering points, because we want GENERIC varyings to be simply passed through in that case - not replaced with the point coordinate! Which gives us the following varying state, for flat shaded and smooth polygons and for points (where shading model is irrelevant) respectively: GENERIC T/PCOORD COLOR Flat11 0 Smooth xx x Points 01 0 (0=VARYING_USE_USED, 1=VARYING_USE_POINTCOORD, x=dont_care) Which is annoying as it means that shader state now depends on either the kind of primitive (which is per-draw), or the shading model (which is part of rasterizer state). Thinking of it, the latter is also an option, at least we don't have to "smuggle" per-draw info into the state emit call. But it's still quite more involved to fix than I expected :( Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0
> I think it would be reasonable to re-emit the shader state (or maybe > just the varyings) when the primitive type changes from points to > non-points. It virtually never happens that the same shader combo is > used for points and non-points. Thinking about it, this might even simplify some contorted code we currently have in the emit sequence with regard to pointsize VS outputs. Which becomes even worse in GC7000 where there's more (USC / buffering related) state depending on the exact number of VS outputs. Hmm that state depends on point_size_per_vertex, not whether we're rendering points. So I guess we'd want to re-link the shader if: - switching from point to non-point rendering, or vice versa - if rendering points AND point_size_per_vertex changes Though as for the latter I have no clue where vivantes get the point size from if !point_size_per_vertex, currently we don't handle pipe_rasterizer_state->point_size at all, we pretty much just assume point_size_per_vertex. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0
>> What if the PS doesn't use the point coordinate, e.g. to render solid >> points? >> >> I thought about that, but I don't think it's general enough. >> >> Could we make the blitter label texture coordinates properly? > > We could do that, but still most texcoord varyings from actual GLSL > shaders will end up with SEMANTIC_GENERIC, which will break if the > application is really using flatshading. At least OpenGL ES would be covered in that case, as flat shading only exists in OpenGL ES 1 which has no shaders. I think it would be reasonable to re-emit the shader state (or maybe just the varyings) when the primitive type changes from points to non-points. It virtually never happens that the same shader combo is used for points and non-points. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0
On Thu, Nov 16, 2017 at 11:29 AM, Lucas Stach <l.st...@pengutronix.de> wrote: > Or maybe we can just scan the input > varyings and if we find a PCOORD varying assume that we are going to > render points, but I don't know if this assumption holds for all cases. What if the PS doesn't use the point coordinate, e.g. to render solid points? I thought about that, but I don't think it's general enough. Could we make the blitter label texture coordinates properly? Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0
> Sorry for noticing before, but this breaks glmark2 texture. I didn't > yet dig into the issue but it's definitely caused by this commit. > > To reproduce, simply run > glmark2-es2-drm -b texture:texture-filter=mipmap That's weird, as that neither uses point sprites nor flat shading. I'll have a look... Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] etnaviv: Fix point sprite issue on HALTI0
A recent commit (see below) fixed flat shading but at the same time broke the use of point sprites with multiple varyings. This resulted in particle systems rendering wrongly. The reason for this is that it set VARYING_COMPONENT_USE_POINTCOORD_[XY] for all non-color varyings, causing them to be replaced with the point coordinate when rendering points. VARYING_COMPONENT_USE_POINTCOORD_[XY] is a misnomer, it should be TEXCOORD. Its semantics are: texture coordinates will get replaced with the point coordinate when rendering GL_POINTS, for other primitives their interpolation is independent of the shading model. So use VARYING_COMPONENT_USE_POINTCOORD_[XY] only for texture coordinates. This causes them to be interpolated correctly while flat shading, while generic varyings are left as-is when rendering point sprites. Fixes: cedab87e762aa38997a07bc8a2eb624aed584afd "etnaviv: fix varying interpolation" Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> --- src/gallium/drivers/etnaviv/etnaviv_compiler.c | 13 + 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/etnaviv/etnaviv_compiler.c b/src/gallium/drivers/etnaviv/etnaviv_compiler.c index 3180646..6569979 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_compiler.c +++ b/src/gallium/drivers/etnaviv/etnaviv_compiler.c @@ -2561,7 +2561,11 @@ etna_link_shader(struct etna_shader_link_info *info, const struct etna_shader_inout *fsio = >infile.reg[idx]; const struct etna_shader_inout *vsio = etna_shader_vs_lookup(vs, fsio); struct etna_varying *varying; - bool interpolate_always = fsio->semantic.Name != TGSI_SEMANTIC_COLOR; + /* Texture coordinates will get replaced with the point coordinate when + * rendering GL_POINTS, for other primitives their interpolation is + * independent of the shading model. */ + bool is_texcoord = fsio->semantic.Name == TGSI_SEMANTIC_TEXCOORD || + fsio->semantic.Name == TGSI_SEMANTIC_PCOORD; assert(fsio->reg > 0 && fsio->reg <= ARRAY_SIZE(info->varyings)); @@ -2571,13 +2575,14 @@ etna_link_shader(struct etna_shader_link_info *info, varying = >varyings[fsio->reg - 1]; varying->num_components = fsio->num_components; - if (!interpolate_always) /* colors affected by flat shading */ + /* PA_ATTRIBUTES appears to be unused on HALTI0 and up */ + if (!is_texcoord) /* colors affected by flat shading */ varying->pa_attributes = 0x200; else /* texture coord or other bypasses flat shading */ varying->pa_attributes = 0x2f1; - varying->use[0] = interpolate_always ? VARYING_COMPONENT_USE_POINTCOORD_X : VARYING_COMPONENT_USE_USED; - varying->use[1] = interpolate_always ? VARYING_COMPONENT_USE_POINTCOORD_Y : VARYING_COMPONENT_USE_USED; + varying->use[0] = is_texcoord ? VARYING_COMPONENT_USE_POINTCOORD_X : VARYING_COMPONENT_USE_USED; + varying->use[1] = is_texcoord ? VARYING_COMPONENT_USE_POINTCOORD_Y : VARYING_COMPONENT_USE_USED; varying->use[2] = VARYING_COMPONENT_USE_USED; varying->use[3] = VARYING_COMPONENT_USE_USED; -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 1/5] etnaviv: rnndb update
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com> --- src/gallium/drivers/etnaviv/hw/common.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/common_3d.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/state.xml.h | 4 ++-- src/gallium/drivers/etnaviv/hw/state_3d.xml.h | 14 -- src/gallium/drivers/etnaviv/hw/state_blt.xml.h | 4 ++-- src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h | 3 ++- 6 files changed, 20 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/etnaviv/hw/common.xml.h b/src/gallium/drivers/etnaviv/hw/common.xml.h index b98fa84..60bde8b 100644 --- a/src/gallium/drivers/etnaviv/hw/common.xml.h +++ b/src/gallium/drivers/etnaviv/hw/common.xml.h @@ -11,7 +11,7 @@ The rules-ng-ng source files this header was generated from are: - texdesc_3d.xml ( 3183 bytes, from 2017-10-31 19:05:01) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - common.xml ( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) Copyright (C) 2012-2017 by the following authors: - Wladimir J. van der Laan <laa...@gmail.com> diff --git a/src/gallium/drivers/etnaviv/hw/common_3d.xml.h b/src/gallium/drivers/etnaviv/hw/common_3d.xml.h index 8f19d5b..d110a36 100644 --- a/src/gallium/drivers/etnaviv/hw/common_3d.xml.h +++ b/src/gallium/drivers/etnaviv/hw/common_3d.xml.h @@ -11,7 +11,7 @@ The rules-ng-ng source files this header was generated from are: - texdesc_3d.xml ( 3183 bytes, from 2017-10-31 19:05:01) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - common.xml ( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) Copyright (C) 2012-2017 by the following authors: - Wladimir J. van der Laan <laa...@gmail.com> diff --git a/src/gallium/drivers/etnaviv/hw/state.xml.h b/src/gallium/drivers/etnaviv/hw/state.xml.h index 0a93a4f..485c0eb 100644 --- a/src/gallium/drivers/etnaviv/hw/state.xml.h +++ b/src/gallium/drivers/etnaviv/hw/state.xml.h @@ -10,11 +10,11 @@ git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: - state.xml ( 26087 bytes, from 2017-10-30 13:44:54) - common.xml( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) - state_hi.xml ( 27733 bytes, from 2017-10-02 19:00:30) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - state_2d.xml ( 51552 bytes, from 2016-10-29 07:29:22) -- state_3d.xml ( 79520 bytes, from 2017-10-31 19:05:01) +- state_3d.xml ( 79992 bytes, from 2017-11-07 10:44:35) - state_blt.xml ( 13405 bytes, from 2017-10-16 17:42:46) - state_vg.xml ( 5975 bytes, from 2016-10-29 07:29:22) diff --git a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h index c5722aa..13122789 100644 --- a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h +++ b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h @@ -10,11 +10,11 @@ git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: - state.xml ( 26087 bytes, from 2017-10-30 13:44:54) - common.xml( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) - state_hi.xml ( 27733 bytes, from 2017-10-02 19:00:30) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - state_2d.xml ( 51552 bytes, from 2016-10-29 07:29:22) -- state_3d.xml ( 79520 bytes, from 2017-10-31 19:05:01) +- state_3d.xml ( 79992 bytes, from 2017-11-07 10:44:35) - state_blt.xml ( 13405 bytes, from 2017-10-16 17:42:46) - state_vg.xml ( 5975 bytes, from 2016-10-29 07:29:22) @@ -122,6 +122,14 @@ DEALINGS IN THE SOFTWARE. #define LOGIC_OP_OR_REVERSE0x000d #define LOGIC_OP_OR0x000e #define LOGIC_OP_SET 0x000f +#define TS_SAMPLER_FORMAT_A4R4G4B4 0x +#define TS_SAMPLER_FORMAT_A1R5G5B5 0x0001 +#define TS_SAMPLER_FORMAT_R5G6B5 0x0002 +#define TS_SAMPLER_FORMAT_A8R8G8B8 0x0003 +#define TS_SAMPLER_FORMAT_X8R8G8B8 0x0004 +#define TS_SAMPLER_FORMAT_D24X8 0x0005 +#define TS_SAMPLER_FORMAT_D16 0x0008 +#define TS_SAMPLER_FORMAT_RAW 0x000f #define VARYING_NUM_COMPONENTS_VAR0__MASK
[Mesa-dev] [PATCH v2 5/5] etnaviv: Add sampler TS support
Sampler TS is an hardware optimization that can be used when rendering
to textures. After rendering to a resource with TS enabled, the
texture unit can use this to bypass lookups to empty tiles. This also
means a resolve-in-place can be avoided to flush the TS.
This commit is also an optimization when not using sampler TS, as
resolve-in-place will now be skipped if a resource has no (valid) TS.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmei...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c| 26 ++
src/gallium/drivers/etnaviv/etnaviv_texture.c | 74 ---
src/gallium/drivers/etnaviv/etnaviv_texture.h | 5 ++
3 files changed, 99 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index b6b06e3..999d2ca 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -632,6 +632,32 @@ etna_emit_state(struct etna_context *ctx)
/*01668*/ EMIT_STATE_RELOC(TS_DEPTH_SURFACE_BASE,
>framebuffer.TS_DEPTH_SURFACE_BASE);
/*0166C*/ EMIT_STATE(TS_DEPTH_CLEAR_VALUE,
ctx->framebuffer.TS_DEPTH_CLEAR_VALUE);
}
+ if (unlikely(dirty & ETNA_DIRTY_SAMPLER_VIEWS)) {
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01720*/ EMIT_STATE(TS_SAMPLER_CONFIG(x), sv->TS_SAMPLER_CONFIG);
+ }
+ }
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01740*/ EMIT_STATE_RELOC(TS_SAMPLER_STATUS_BASE(x),
>TS_SAMPLER_STATUS_BASE);
+ }
+ }
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01760*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE(x),
sv->TS_SAMPLER_CLEAR_VALUE);
+ }
+ }
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01780*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE2(x),
sv->TS_SAMPLER_CLEAR_VALUE2);
+ }
+ }
+ }
if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
uint32_t val = 0; /* 0 == sampler inactive */
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.c
b/src/gallium/drivers/etnaviv/etnaviv_texture.c
index 34529c6..6a33f78 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.c
@@ -112,11 +112,67 @@ etna_delete_sampler_state(struct pipe_context *pctx, void
*ss)
FREE(ss);
}
+/* Return true if the GPU can use sampler TS with this sampler view.
+ * Sampler TS is an optimization used when rendering to textures, where
+ * a resolve-in-place can be avoided when rendering has left a (valid) TS.
+ */
+static bool
+etna_can_use_sampler_ts(struct pipe_sampler_view *view, int num)
+{
+/* Can use sampler TS when:
+ * - the hardware supports sampler TS.
+ * - the sampler view will be bound to sampler texture);
+ struct etna_screen *screen = etna_screen(rsc->base.screen);
+ return VIV_FEATURE(screen, chipMinorFeatures2, TEXTURE_TILED_READ) &&
+ num < VIVS_TS_SAMPLER__LEN &&
+ rsc->base.target != PIPE_BUFFER &&
+ translate_ts_sampler_format(rsc->base.format) != ETNA_NO_MATCH &&
+ view->u.tex.first_level == 0 && MIN2(view->u.tex.last_level,
rsc->base.last_level) == 0 &&
+ rsc->levels[0].ts_valid;
+}
+
+static void
+etna_configure_sampler_ts(struct pipe_sampler_view *pview, bool enable)
+{
+ struct etna_sampler_view *view = etna_sampler_view(pview);
+ if (enable) {
+ struct etna_resource *rsc = etna_resource(view->base.texture);
+ struct etna_resource_level *lev = >levels[0];
+ assert(rsc->ts_bo && lev->ts_valid);
+
+ view->TE_SAMPLER_CONFIG1 |= VIVS_TE_SAMPLER_CONFIG1_USE_TS;
+ view->TS_SAMPLER_CONFIG =
+ VIVS_TS_SAMPLER_CONFIG_ENABLE(1) |
+
VIVS_TS_SAMPLER_CONFIG_FORMAT(translate_ts_sampler_format(rsc->base.format));
+ view->TS_SAMPLER_CLEAR_VALUE = lev->clear_value;
+ view->TS_SAMPLER_CLEAR_VALUE2 = lev->clear_value; /* To handle 64-bit
formats this needs a different value */
+ view->TS_SAMPLER_STATUS_BASE.bo = rsc->ts_bo;
+ view->TS_SAMPLER_STATUS_BASE.offset = lev->ts_o
[Mesa-dev] [PATCH v2 2/5] etnaviv: Check that resource has a valid TS in etna_resource_needs_flush
Resources only need a resolve-to-itself if their TS is valid for any
level, not just if it happens to be allocated.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_resource.c | 13 +
src/gallium/drivers/etnaviv/etnaviv_resource.h | 6 +-
2 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.c
b/src/gallium/drivers/etnaviv/etnaviv_resource.c
index 0a82807..1fb73c4 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.c
@@ -629,6 +629,19 @@ etna_resource_used(struct etna_context *ctx, struct
pipe_resource *prsc,
rsc->pending_ctx = ctx;
}
+bool
+etna_resource_has_valid_ts(struct etna_resource *rsc)
+{
+ if (!rsc->ts_bo)
+ return false;
+
+ for (int level = 0; level <= rsc->base.last_level; level++)
+ if (rsc->levels[level].ts_valid)
+ return true;
+
+ return false;
+}
+
void
etna_resource_screen_init(struct pipe_screen *pscreen)
{
diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.h
b/src/gallium/drivers/etnaviv/etnaviv_resource.h
index 0b135e2..11ccf8f 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.h
@@ -103,11 +103,15 @@ etna_resource_older(struct etna_resource *a, struct
etna_resource *b)
return (int)(a->seqno - b->seqno) < 0;
}
+/* returns TRUE if a resource has a TS, and it is valid for at least one level
*/
+bool
+etna_resource_has_valid_ts(struct etna_resource *res);
+
/* returns TRUE if the resource needs a resolve to itself */
static inline bool
etna_resource_needs_flush(struct etna_resource *res)
{
- return res->ts_bo && ((int)(res->seqno - res->flush_seqno) > 0);
+ return etna_resource_has_valid_ts(res) && ((int)(res->seqno -
res->flush_seqno) > 0);
}
/* is the resource only used on the sampler? */
--
2.7.4
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[Mesa-dev] [PATCH v2 4/5] etnaviv: Flush TS cache before changing TS configuration
This is to make sure that the TS is properly flushed to memory before
rendering to a new surface starts.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index d313af6..b6b06e3 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -322,6 +322,11 @@ etna_emit_state(struct etna_context *ctx)
etna_stall(stream, SYNC_RECIPIENT_RA, SYNC_RECIPIENT_PE);
}
+ /* Flush TS cache before changing TS configuration. */
+ if (unlikely(dirty & ETNA_DIRTY_TS)) {
+ etna_set_state(stream, VIVS_TS_FLUSH_CACHE, VIVS_TS_FLUSH_CACHE_FLUSH);
+ }
+
/* If MULTI_SAMPLE_CONFIG.MSAA_SAMPLES changed, clobber affected shader
* state to make sure it is always rewritten. */
if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) {
--
2.7.4
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[Mesa-dev] [PATCH v2 0/5] etnaviv: Add sampler TS support
Sampler TS is an hardware optimization that can be used when rendering to textures. After rendering to a resource with TS enabled, the texture unit can use this to bypass lookups to empty tiles. This also means a resolve-in-place can be avoided to flush the TS. This patch series adds support for sampler TS on hardware that supports this. It also contains an optimization when not using sampler TS, as resolve-in-place will now be skipped if a resource has no (valid) TS. For example the 'shadow' test in on i.mx8qp glmark2 increases in performance with: before: [shadow] : FPS: 130 FrameTime: 7.692 ms after: [shadow] : FPS: 244 FrameTime: 4.098 ms Changes since previous version: - Add a new column to the formats table for the TS format (for all texturable formats) instead of a trick based on RS format and name, as that didn't cover depth formats correctly. - Roll the call to etna_resource_has_valid_ts into etna_resource_needs_flush, so that resolve-to-self and sampler TS is only used when the resource has a valid TS in the first place. - Add a patch that makes sure that the TS cache is flushed to memory before programming the TS with new state (so before rendering to a new surface starts). This should prevent missing tile artifacts. - Remove unused added arguments from etna_update_sampler_source / etna_configure_sampler_ts / etna_can_use_sampler_ts Wladimir J. van der Laan (5): etnaviv: rnndb update etnaviv: Check that resource has a valid TS in etna_resource_needs_flush etnaviv: Add TS_SAMPLER formats to etnaviv_format etnaviv: Flush TS cache before changing TS configuration etnaviv: Add sampler TS support src/gallium/drivers/etnaviv/etnaviv_emit.c | 31 + src/gallium/drivers/etnaviv/etnaviv_format.c| 162 +--- src/gallium/drivers/etnaviv/etnaviv_format.h| 3 + src/gallium/drivers/etnaviv/etnaviv_resource.c | 13 ++ src/gallium/drivers/etnaviv/etnaviv_resource.h | 6 +- src/gallium/drivers/etnaviv/etnaviv_texture.c | 74 ++- src/gallium/drivers/etnaviv/etnaviv_texture.h | 5 + src/gallium/drivers/etnaviv/hw/common.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/common_3d.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/state.xml.h | 4 +- src/gallium/drivers/etnaviv/hw/state_3d.xml.h | 14 +- src/gallium/drivers/etnaviv/hw/state_blt.xml.h | 4 +- src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h | 3 +- 13 files changed, 233 insertions(+), 90 deletions(-) -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH v2 3/5] etnaviv: Add TS_SAMPLER formats to etnaviv_format
Sampler TS introduces yet another format enumeration for
renderable+textureable formats. Introduce it into the etnaviv_format
table as another column.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_format.c | 162 +++
src/gallium/drivers/etnaviv/etnaviv_format.h | 3 +
2 files changed, 91 insertions(+), 74 deletions(-)
I changed this to add a new column to the table for the TS format (for all
texturable formats) instead of a trick based on RS format and name as used
before, as that didn't cover depth formats correctly.
(did not add Christian Gmeiner's reviewed-by as the patch changed 100%)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_format.c
b/src/gallium/drivers/etnaviv/etnaviv_format.c
index 3dd212f..7943c81 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_format.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_format.c
@@ -40,6 +40,7 @@ struct etna_format {
unsigned vtx;
unsigned tex;
unsigned rs;
+ unsigned ts;
boolean present;
const unsigned char tex_swiz[4];
};
@@ -53,6 +54,8 @@ struct etna_format {
#define RS_FORMAT_X8B8G8R8(RS_FORMAT_X8R8G8B8 | RS_FORMAT_RB_SWAP)
#define RS_FORMAT_A8B8G8R8(RS_FORMAT_A8R8G8B8 | RS_FORMAT_RB_SWAP)
+#define TS_SAMPLER_FORMAT_NONE ETNA_NO_MATCH
+
#define SWIZ(x,y,z,w) {\
PIPE_SWIZZLE_##x, \
PIPE_SWIZZLE_##y, \
@@ -61,21 +64,23 @@ struct etna_format {
}
/* vertex + texture */
-#define VT(pipe, vtxfmt, texfmt, texswiz, rsfmt) \
+#define VT(pipe, vtxfmt, texfmt, texswiz, rsfmt, tsfmt) \
[PIPE_FORMAT_##pipe] = { \
.vtx = FE_DATA_TYPE_##vtxfmt, \
.tex = TEXTURE_FORMAT_##texfmt, \
.rs = RS_FORMAT_##rsfmt,\
+ .ts = TS_SAMPLER_FORMAT_##tsfmt,\
.present = 1, \
.tex_swiz = texswiz,\
}
/* texture-only */
-#define _T(pipe, fmt, swiz, rsfmt) \
+#define _T(pipe, fmt, swiz, rsfmt, tsfmt) \
[PIPE_FORMAT_##pipe] = {\
.vtx = ETNA_NO_MATCH,\
.tex = TEXTURE_FORMAT_##fmt, \
.rs = RS_FORMAT_##rsfmt, \
+ .ts = TS_SAMPLER_FORMAT_##tsfmt, \
.present = 1,\
.tex_swiz = swiz,\
}
@@ -91,16 +96,16 @@ struct etna_format {
static struct etna_format formats[PIPE_FORMAT_COUNT] = {
/* 8-bit */
- VT(R8_UNORM, UNSIGNED_BYTE, L8, SWIZ(X, 0, 0, 1), NONE),
+ VT(R8_UNORM, UNSIGNED_BYTE, L8, SWIZ(X, 0, 0, 1), NONE, NONE),
V_(R8_SNORM, BYTE, NONE),
V_(R8_UINT,UNSIGNED_BYTE, NONE),
V_(R8_SINT,BYTE, NONE),
V_(R8_USCALED, UNSIGNED_BYTE, NONE),
V_(R8_SSCALED, BYTE, NONE),
- _T(A8_UNORM, A8, SWIZ(X, Y, Z, W), NONE),
- _T(L8_UNORM, L8, SWIZ(X, Y, Z, W), NONE),
- _T(I8_UNORM, I8, SWIZ(X, Y, Z, W), NONE),
+ _T(A8_UNORM, A8, SWIZ(X, Y, Z, W), NONE, NONE),
+ _T(L8_UNORM, L8, SWIZ(X, Y, Z, W), NONE, NONE),
+ _T(I8_UNORM, I8, SWIZ(X, Y, Z, W), NONE, NONE),
/* 16-bit */
V_(R16_UNORM, UNSIGNED_SHORT, NONE),
@@ -111,17 +116,17 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
V_(R16_SSCALED, SHORT, NONE),
V_(R16_FLOAT, HALF_FLOAT, NONE),
- _T(B4G4R4A4_UNORM, A4R4G4B4, SWIZ(X, Y, Z, W), A4R4G4B4),
- _T(B4G4R4X4_UNORM, X4R4G4B4, SWIZ(X, Y, Z, W), X4R4G4B4),
+ _T(B4G4R4A4_UNORM, A4R4G4B4, SWIZ(X, Y, Z, W), A4R4G4B4, A4R4G4B4),
+ _T(B4G4R4X4_UNORM, X4R4G4B4, SWIZ(X, Y, Z, W), X4R4G4B4, A4R4G4B4),
- _T(L8A8_UNORM, A8L8, SWIZ(X, Y, Z, W), NONE),
+ _T(L8A8_UNORM, A8L8, SWIZ(X, Y, Z, W), NONE, NONE),
- _T(Z16_UNORM, D16, SWIZ(X, Y, Z, W), A4R4G4B4),
- _T(B5G6R5_UNORM, R5G6B5, SWIZ(X, Y, Z, W), R5G6B5),
- _T(B5G5R5A1_UNORM, A1R5G5B5, SWIZ(X, Y, Z, W), A1R5G5B5),
- _T(B5G5R5X1_UNORM, X1R5G5B5, SWIZ(X, Y, Z, W), X1R5G5B5),
+ _T(Z16_UNORM, D16, SWIZ(X, Y, Z, W), A4R4G4B4, D16),
+ _T(B5G6R5_UNORM, R5G6B5, SWIZ(X, Y, Z, W), R5G6B5, R5G6B5),
+ _T(B5G5R5A1_UNORM, A1R5G5B5, SWIZ(X, Y, Z, W), A1R5G5B5, A1R5G5B5),
+ _T(B5G5R5X1_UNORM, X1R5G5B5, SWIZ(X, Y, Z, W), X1R5G5B5, A1R5G5B5),
- VT(R8G8_UNORM, UNSIGNED_BYTE, EXT_G8R8 | EXT_FORMAT, SWIZ(X, Y, 0, 1),
NONE),
+ VT(R8G8_UNORM, UNSIGNED_BYTE, EXT_G8R8 | EXT_FORMAT, SWIZ(X, Y, 0, 1),
NONE, NONE),
V_(R8G8_SNORM, BYTE, NONE),
V_(R8G8_UINT,UNSIGNED_BYTE, NONE),
V_(R8G8_SINT,BYTE, NONE),
@@ -156,26 +161,26 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
V_(A8B8G8R8_UNORM, UNSIGNED_BYTE, NONE),
- VT(R8G8B8A8_UNORM, UNSIGNED_BYTE, A8B8G8R8, SWIZ(X, Y, Z, W), A8B8G8R8),
+ VT(R8G8B8A8_UNORM, UNSIGNED_BYTE, A8B8G8R8, SWIZ(X, Y, Z, W), A8B8G8R8,
A8R8G8B8),
V_(R8G8B8A8_SNORM, BYTE, A8B8G8R8),
- _T(R8G8B8X8_UNORM, X8B8G8R8, SWIZ(X
Re: [Mesa-dev] [PATCH v2] etnaviv: automake, meson: include common_3d.xml.h in the sources lists
On Mon, Nov 13, 2017 at 10:57:53AM +, Eric Engestrom wrote: > On Monday, 2017-11-13 10:20:24 +0100, Juan A. Suarez Romero wrote: > > Eric, could you grant R-b if you think this is fine? > > Sure, sorry I forgot: > Reviewed-by: Eric Engestrom <eric.engest...@imgtec.com> Thanks for updating the build systems. Reviewed-by: Wladimir J. van der Laan <laa...@gmail.com> > Wladimir, Christian: while looking at f1e1c60ff6, I noticed > state_blt.xml.h and texdesc_3d.xml.h were also added, but don't seem to > be used anywhere; were those files added by mistake? I guess so. They're used in upcoming patches, both are only relevant for GC7000 support, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/3] etnaviv: Add TS_SAMPLER formats to etnaviv_format
On Tue, Nov 7, 2017 at 5:43 PM, Wladimir J. van der Laan <laa...@gmail.com> wrote: > Sampler TS introduces yet another format enumeration for renderable > formats. Introduce it into etnaviv_format as unobtrusively as possible. > > Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> > --- > src/gallium/drivers/etnaviv/etnaviv_format.c | 19 +++ > src/gallium/drivers/etnaviv/etnaviv_format.h | 3 +++ > 2 files changed, 22 insertions(+) I think I found a potential problem with this approach of mapping name-to-name. Though most of the RS formats map immediately to TS formats, there are some exceptions, like the depth formats: _T(Z16_UNORM, D16, SWIZ(X, Y, Z, W), A4R4G4B4), _T(X8Z24_UNORM, D24X8, SWIZ(X, Y, Z, W), A8R8G8B8), _T(S8_UINT_Z24_UNORM, D24X8, SWIZ(X, Y, Z, W), A8R8G8B8), For practical reasons these have been assigned RS formats that happen to have the same size, which is enough for RS blit. Sampler TS on the other hand has dedicated formats for depth: TS_SAMPLER_FORMAT_D24X8 TS_SAMPLER_FORMAT_D16 Not sure how much difference this makes, though... Depth texturing (as in glmark shadow benchmark) seems to just work. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/3] etnaviv: Add sampler TS support
On Fri, Nov 10, 2017 at 07:42:12AM +0100, Wladimir J. van der Laan wrote:
> Hello Lucas,
>
> On Thu, Nov 09, 2017 at 06:15:51PM +0100, Lucas Stach wrote:
> > Hi Wladimir!
>
> > > etna_resource_needs_flush is only called from two places - here, and
> > > in resource_flush, where it also determines whether to do a
> > > resolve-to-self, but before presenting the image. There it also only
> > > makes sense to do if the resource has at least a valid TS.
> >
> > Yes, this makes sense.
> >
> > Also I've just tested this and I've seen some intermittent missing
> > shadow tiles in the glmark2 shadow demo. Probably you are now missing
> > the TS cache flush we would normally do before blitting the shadow
> > image with the RS.
>
> Thanks for testing!
>
> I'll see if I can reproduce it.
I was unable to reproduce it locally.
Can you please test if the below patch solves it?
Regards,
Wladimir
commit c26944fc3441e2516d4e4d17540b0f504cdcaf97
Author: Wladimir J. van der Laan <laa...@gmail.com>
Date: Fri Nov 10 09:48:19 2017 +
etnaviv: Flush TS cache before changing TS configuration
This is to make sure that the TS is properly flushed to memory before
rendering to a new surface starts.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index d313af6..b6b06e3 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -322,6 +322,11 @@ etna_emit_state(struct etna_context *ctx)
etna_stall(stream, SYNC_RECIPIENT_RA, SYNC_RECIPIENT_PE);
}
+ /* Flush TS cache before changing TS configuration. */
+ if (unlikely(dirty & ETNA_DIRTY_TS)) {
+ etna_set_state(stream, VIVS_TS_FLUSH_CACHE, VIVS_TS_FLUSH_CACHE_FLUSH);
+ }
+
/* If MULTI_SAMPLE_CONFIG.MSAA_SAMPLES changed, clobber affected shader
* state to make sure it is always rewritten. */
if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) {
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Re: [Mesa-dev] [PATCH 3/3] etnaviv: Add sampler TS support
Hello Lucas, On Thu, Nov 09, 2017 at 06:15:51PM +0100, Lucas Stach wrote: > Hi Wladimir! > > etna_resource_needs_flush is only called from two places - here, and > > in resource_flush, where it also determines whether to do a > > resolve-to-self, but before presenting the image. There it also only > > makes sense to do if the resource has at least a valid TS. > > Yes, this makes sense. > > Also I've just tested this and I've seen some intermittent missing > shadow tiles in the glmark2 shadow demo. Probably you are now missing > the TS cache flush we would normally do before blitting the shadow > image with the RS. Thanks for testing! I'll see if I can reproduce it. Good point about the TS, I expect that needs to be flushed before the texture can be rendered from, so that sampler TS sees a consistent TS. Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/3] etnaviv: Add sampler TS support
> +/* Return true if a resource has a TS, and it is valid for at least one
> level */
> +static bool
> +etna_resource_has_valid_ts(struct pipe_resource *prsc)
> +{
> + struct etna_resource *rsc = etna_resource(prsc);
> +
> + if (!rsc->ts_bo)
> + return false;
> +
> + for (int level = 0; level <= rsc->base.last_level; level++)
> + if (rsc->levels[level].ts_valid)
> + return true;
> + return false;
> +}
> static void
> -etna_update_sampler_source(struct pipe_sampler_view *view)
> +etna_update_sampler_source(struct etna_context *ctx, struct
> pipe_sampler_view *view, int num)
> {
> struct etna_resource *base = etna_resource(view->texture);
> struct etna_resource *to = base, *from = base;
> + bool enable_sampler_ts = false;
>
> if (base->external && etna_resource_newer(etna_resource(base->external),
> base))
>from = etna_resource(base->external);
> @@ -128,12 +199,19 @@ etna_update_sampler_source(struct pipe_sampler_view
> *view)
>etna_copy_resource(view->context, >base, >base, 0,
> view->texture->last_level);
>to->seqno = from->seqno;
> - } else if ((to == from) && etna_resource_needs_flush(to)) {
> - /* Resolve TS if needed, remove when adding sampler TS */
> - etna_copy_resource(view->context, >base, >base, 0,
> - view->texture->last_level);
> - to->flush_seqno = from->seqno;
> + } else if ((to == from) &&
> + etna_resource_needs_flush(to) &&
> + etna_resource_has_valid_ts(>base)) {
I just realized - would it maybe make sense to roll the call to
etna_resource_has_valid_ts into etna_resource_needs_flush?
etna_resource_needs_flush is only called from two places - here, and
in resource_flush, where it also determines whether to do a
resolve-to-self, but before presenting the image. There it also only
makes sense to do if the resource has at least a valid TS.
Wladimir
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[Mesa-dev] [PATCH 1/3] etnaviv: rnndb update
Update rnndb to etna_viv 07c756a. Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> --- src/gallium/drivers/etnaviv/hw/common.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/common_3d.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/state.xml.h | 4 ++-- src/gallium/drivers/etnaviv/hw/state_3d.xml.h | 14 -- src/gallium/drivers/etnaviv/hw/state_blt.xml.h | 4 ++-- src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h | 3 ++- 6 files changed, 20 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/etnaviv/hw/common.xml.h b/src/gallium/drivers/etnaviv/hw/common.xml.h index b98fa84..60bde8b 100644 --- a/src/gallium/drivers/etnaviv/hw/common.xml.h +++ b/src/gallium/drivers/etnaviv/hw/common.xml.h @@ -11,7 +11,7 @@ The rules-ng-ng source files this header was generated from are: - texdesc_3d.xml ( 3183 bytes, from 2017-10-31 19:05:01) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - common.xml ( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) Copyright (C) 2012-2017 by the following authors: - Wladimir J. van der Laan <laa...@gmail.com> diff --git a/src/gallium/drivers/etnaviv/hw/common_3d.xml.h b/src/gallium/drivers/etnaviv/hw/common_3d.xml.h index 8f19d5b..d110a36 100644 --- a/src/gallium/drivers/etnaviv/hw/common_3d.xml.h +++ b/src/gallium/drivers/etnaviv/hw/common_3d.xml.h @@ -11,7 +11,7 @@ The rules-ng-ng source files this header was generated from are: - texdesc_3d.xml ( 3183 bytes, from 2017-10-31 19:05:01) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - common.xml ( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) Copyright (C) 2012-2017 by the following authors: - Wladimir J. van der Laan <laa...@gmail.com> diff --git a/src/gallium/drivers/etnaviv/hw/state.xml.h b/src/gallium/drivers/etnaviv/hw/state.xml.h index 0a93a4f..485c0eb 100644 --- a/src/gallium/drivers/etnaviv/hw/state.xml.h +++ b/src/gallium/drivers/etnaviv/hw/state.xml.h @@ -10,11 +10,11 @@ git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: - state.xml ( 26087 bytes, from 2017-10-30 13:44:54) - common.xml( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) - state_hi.xml ( 27733 bytes, from 2017-10-02 19:00:30) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - state_2d.xml ( 51552 bytes, from 2016-10-29 07:29:22) -- state_3d.xml ( 79520 bytes, from 2017-10-31 19:05:01) +- state_3d.xml ( 79992 bytes, from 2017-11-07 10:44:35) - state_blt.xml ( 13405 bytes, from 2017-10-16 17:42:46) - state_vg.xml ( 5975 bytes, from 2016-10-29 07:29:22) diff --git a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h index c5722aa..13122789 100644 --- a/src/gallium/drivers/etnaviv/hw/state_3d.xml.h +++ b/src/gallium/drivers/etnaviv/hw/state_3d.xml.h @@ -10,11 +10,11 @@ git clone git://0x04.net/rules-ng-ng The rules-ng-ng source files this header was generated from are: - state.xml ( 26087 bytes, from 2017-10-30 13:44:54) - common.xml( 26187 bytes, from 2017-10-31 19:05:01) -- common_3d.xml ( 14547 bytes, from 2017-11-01 16:08:07) +- common_3d.xml ( 14615 bytes, from 2017-11-04 14:03:35) - state_hi.xml ( 27733 bytes, from 2017-10-02 19:00:30) - copyright.xml ( 1597 bytes, from 2016-10-29 07:29:22) - state_2d.xml ( 51552 bytes, from 2016-10-29 07:29:22) -- state_3d.xml ( 79520 bytes, from 2017-10-31 19:05:01) +- state_3d.xml ( 79992 bytes, from 2017-11-07 10:44:35) - state_blt.xml ( 13405 bytes, from 2017-10-16 17:42:46) - state_vg.xml ( 5975 bytes, from 2016-10-29 07:29:22) @@ -122,6 +122,14 @@ DEALINGS IN THE SOFTWARE. #define LOGIC_OP_OR_REVERSE0x000d #define LOGIC_OP_OR0x000e #define LOGIC_OP_SET 0x000f +#define TS_SAMPLER_FORMAT_A4R4G4B4 0x +#define TS_SAMPLER_FORMAT_A1R5G5B5 0x0001 +#define TS_SAMPLER_FORMAT_R5G6B5 0x0002 +#define TS_SAMPLER_FORMAT_A8R8G8B8 0x0003 +#define TS_SAMPLER_FORMAT_X8R8G8B8 0x0004 +#define TS_SAMPLER_FORMAT_D24X8 0x0005 +#define TS_SAMPLER_FORMAT_D16 0x0008 +#define TS_SAMPLER_FORMAT_RAW 0x000f #define VARYING_NUM_COMPONENTS_VAR0__MASK 0x0007 #define VARYING_NUM_COMP
[Mesa-dev] [PATCH 2/3] etnaviv: Add TS_SAMPLER formats to etnaviv_format
Sampler TS introduces yet another format enumeration for renderable
formats. Introduce it into etnaviv_format as unobtrusively as possible.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_format.c | 19 +++
src/gallium/drivers/etnaviv/etnaviv_format.h | 3 +++
2 files changed, 22 insertions(+)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_format.c
b/src/gallium/drivers/etnaviv/etnaviv_format.c
index 3dd212f..f3cba46 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_format.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_format.c
@@ -40,6 +40,7 @@ struct etna_format {
unsigned vtx;
unsigned tex;
unsigned rs;
+ unsigned ts;
boolean present;
const unsigned char tex_swiz[4];
};
@@ -53,6 +54,13 @@ struct etna_format {
#define RS_FORMAT_X8B8G8R8(RS_FORMAT_X8R8G8B8 | RS_FORMAT_RB_SWAP)
#define RS_FORMAT_A8B8G8R8(RS_FORMAT_A8R8G8B8 | RS_FORMAT_RB_SWAP)
+#define TS_SAMPLER_FORMAT_NONE ETNA_NO_MATCH
+#define TS_SAMPLER_FORMAT_X4R4G4B4 TS_SAMPLER_FORMAT_A4R4G4B4
+#define TS_SAMPLER_FORMAT_X1R5G5B5 TS_SAMPLER_FORMAT_A1R5G5B5
+#define TS_SAMPLER_FORMAT_YUY2 TS_SAMPLER_FORMAT_NONE /* Not supported
AFAIK */
+#define TS_SAMPLER_FORMAT_X8B8G8R8 TS_SAMPLER_FORMAT_X8R8G8B8
+#define TS_SAMPLER_FORMAT_A8B8G8R8 TS_SAMPLER_FORMAT_A8R8G8B8
+
#define SWIZ(x,y,z,w) {\
PIPE_SWIZZLE_##x, \
PIPE_SWIZZLE_##y, \
@@ -66,6 +74,7 @@ struct etna_format {
.vtx = FE_DATA_TYPE_##vtxfmt, \
.tex = TEXTURE_FORMAT_##texfmt, \
.rs = RS_FORMAT_##rsfmt,\
+ .ts = TS_SAMPLER_FORMAT_##rsfmt,\
.present = 1, \
.tex_swiz = texswiz,\
}
@@ -76,6 +85,7 @@ struct etna_format {
.vtx = ETNA_NO_MATCH,\
.tex = TEXTURE_FORMAT_##fmt, \
.rs = RS_FORMAT_##rsfmt, \
+ .ts = TS_SAMPLER_FORMAT_##rsfmt, \
.present = 1,\
.tex_swiz = swiz,\
}
@@ -356,3 +366,12 @@ translate_vertex_format_type(enum pipe_format fmt)
return formats[fmt].vtx;
}
+
+uint32_t
+translate_ts_sampler_format(enum pipe_format fmt)
+{
+ if (!formats[fmt].present)
+ return ETNA_NO_MATCH;
+
+ return formats[fmt].ts;
+}
diff --git a/src/gallium/drivers/etnaviv/etnaviv_format.h
b/src/gallium/drivers/etnaviv/etnaviv_format.h
index 1672d67..20c8e1b 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_format.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_format.h
@@ -53,4 +53,7 @@ translate_rs_format_rb_swap(enum pipe_format fmt);
uint32_t
translate_vertex_format_type(enum pipe_format fmt);
+uint32_t
+translate_ts_sampler_format(enum pipe_format fmt);
+
#endif /* ETNAVIV_FORMAT_H_ */
--
2.7.4
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[Mesa-dev] [PATCH 0/3] etnaviv: Add sampler TS support
Sampler TS is an hardware optimization that can be used when rendering to textures. After rendering to a resource with TS enabled, the texture unit can use this to bypass lookups to empty tiles. This also means a resolve-in-place can be avoided to flush the TS. This patch series adds support for sampler TS on hardware that supports this. It also contains an optimization when not using sampler TS, as resolve-in-place will now be skipped if a resource has no (valid) TS. For example the 'shadow' test in glmark2 increases in performance with: before: [shadow] : FPS: 130 FrameTime: 7.692 ms after: [shadow] : FPS: 244 FrameTime: 4.098 ms Wladimir J. van der Laan (3): etnaviv: rnndb update etnaviv: Add TS_SAMPLER formats to etnaviv_format etnaviv: Add sampler TS support src/gallium/drivers/etnaviv/etnaviv_emit.c | 26 +++ src/gallium/drivers/etnaviv/etnaviv_format.c| 19 + src/gallium/drivers/etnaviv/etnaviv_format.h| 3 + src/gallium/drivers/etnaviv/etnaviv_texture.c | 92 +++-- src/gallium/drivers/etnaviv/etnaviv_texture.h | 5 ++ src/gallium/drivers/etnaviv/hw/common.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/common_3d.xml.h | 2 +- src/gallium/drivers/etnaviv/hw/state.xml.h | 4 +- src/gallium/drivers/etnaviv/hw/state_3d.xml.h | 14 +++- src/gallium/drivers/etnaviv/hw/state_blt.xml.h | 4 +- src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h | 3 +- 11 files changed, 158 insertions(+), 16 deletions(-) -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/3] etnaviv: Add sampler TS support
Sampler TS is an hardware optimization that can be used when rendering
to textures. After rendering to a resource with TS enabled, the
texture unit can use this to bypass lookups to empty tiles. This also
means a resolve-in-place can be avoided to flush the TS.
This commit is also an optimization when not using sampler TS, as
resolve-in-place will now be skipped if a resource has no (valid) TS.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c| 26
src/gallium/drivers/etnaviv/etnaviv_texture.c | 92 +--
src/gallium/drivers/etnaviv/etnaviv_texture.h | 5 ++
3 files changed, 116 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index d313af6..bd2a570 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -627,6 +627,32 @@ etna_emit_state(struct etna_context *ctx)
/*01668*/ EMIT_STATE_RELOC(TS_DEPTH_SURFACE_BASE,
>framebuffer.TS_DEPTH_SURFACE_BASE);
/*0166C*/ EMIT_STATE(TS_DEPTH_CLEAR_VALUE,
ctx->framebuffer.TS_DEPTH_CLEAR_VALUE);
}
+ if (unlikely(dirty & ETNA_DIRTY_SAMPLER_VIEWS)) {
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01720*/ EMIT_STATE(TS_SAMPLER_CONFIG(x), sv->TS_SAMPLER_CONFIG);
+ }
+ }
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01740*/ EMIT_STATE_RELOC(TS_SAMPLER_STATUS_BASE(x),
>TS_SAMPLER_STATUS_BASE);
+ }
+ }
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01760*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE(x),
sv->TS_SAMPLER_CLEAR_VALUE);
+ }
+ }
+ for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*01780*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE2(x),
sv->TS_SAMPLER_CLEAR_VALUE2);
+ }
+ }
+ }
if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
uint32_t val = 0; /* 0 == sampler inactive */
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.c
b/src/gallium/drivers/etnaviv/etnaviv_texture.c
index 34529c6..3d5e88b 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.c
@@ -112,11 +112,82 @@ etna_delete_sampler_state(struct pipe_context *pctx, void
*ss)
FREE(ss);
}
+/* Return true if a resource has a TS, and it is valid for at least one level
*/
+static bool
+etna_resource_has_valid_ts(struct pipe_resource *prsc)
+{
+ struct etna_resource *rsc = etna_resource(prsc);
+
+ if (!rsc->ts_bo)
+ return false;
+
+ for (int level = 0; level <= rsc->base.last_level; level++)
+ if (rsc->levels[level].ts_valid)
+ return true;
+ return false;
+}
+
+/* Return true if the GPU can use sampler TS with this sampler view.
+ * Sampler TS is an optimization used when rendering to textures, where
+ * a resolve-in-place can be avoided when rendering has left a (valid) TS.
+ */
+static bool
+etna_can_use_sampler_ts(struct etna_context *ctx, struct pipe_sampler_view
*view, int num)
+{
+/* Can use sampler TS when:
+ * - the hardware supports sampler TS.
+ * - the sampler view will be bound to sampler texture);
+ struct etna_screen *screen = etna_screen(rsc->base.screen);
+ return VIV_FEATURE(screen, chipMinorFeatures2, TEXTURE_TILED_READ) &&
+ num < VIVS_TS_SAMPLER__LEN &&
+ rsc->base.target != PIPE_BUFFER &&
+ translate_ts_sampler_format(rsc->base.format) != ETNA_NO_MATCH &&
+ view->u.tex.first_level == 0 && MIN2(view->u.tex.last_level,
rsc->base.last_level) == 0 &&
+ rsc->levels[0].ts_valid;
+}
+
+static void
+etna_configure_sampler_ts(struct etna_context *ctx, struct pipe_sampler_view
*pview, bool enable)
+{
+ struct etna_sampler_view *view = etna_sampler_view(pview);
+ if (enable) {
+ struct etna_resource *rsc = etna_resource(view->base.texture);
+ struct etna_resource_level *lev = >levels[0];
+ assert(rsc->ts_bo && lev->ts_valid);
+
+ view->TE_SAMPLER_CONFIG1 |= VIVS_TE_SAMPLER_CONFIG1_USE_TS;
+ view->TS_SAMPLER_CONFIG =
+ VIVS_TS_SAMPLER_CONFIG_ENA
Re: [Mesa-dev] [PATCH 19/19] etnaviv: GC7000: Split off current texture code
On Sun, Nov 05, 2017 at 04:31:40PM +0100, Christian Gmeiner wrote: > > +#ifndef H_ETNAVIV_TEXTURE_PLAIN > > +#define H_ETNAVIV_TEXTURE_PLAIN > > + > > +#include > > + > > +#include "pipe/p_context.h" > > +#include "pipe/p_state.h" > > + > > +#include "hw/state_3d.xml.h" > > Is this include needed? Huh, no, I don't see why the states would need to be included in the header, probably a leftover, I'll remove it. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 10/19] etnaviv: GC7000: No RS align when using BLT
>> + if (!ctx->specs.use_blt) {
>> + /* This (ab)uses the RS as a plain buffer memset().
>> + * Currently uses a fixed row size of 64 bytes. Some benchmarking
>> with
>> + * different sizes may be in order. */
>> + struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo;
>> + etna_compile_rs_state(ctx, >clear_command, &(struct
>> rs_state) {
>> +.source_format = RS_FORMAT_A8R8G8B8,
>> +.dest_format = RS_FORMAT_A8R8G8B8,
>> +.dest = ts_bo,
>> +.dest_offset = surf->surf.ts_offset,
>> +.dest_stride = 0x40,
>> +.dest_tiling = ETNA_LAYOUT_TILED,
>> +.dither = {0x, 0x},
>> +.width = 16,
>> +.height = etna_align_up(surf->surf.ts_size / 0x40, 4),
>> +.clear_value = {ctx->specs.ts_clear_value},
>> +.clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1,
>> +.clear_bits = 0x
>> + });
>> + }
>> } else {
>> - etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value);
>> + if (!ctx->specs.use_blt)
>> + etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value);
>> }
>>
>
> if (!ctx->specs.use_blt) {
> } else {
>if (!ctx->specs.use_blt)
> ..
> }
>
> Looks funny... btw. do you have a git branch somewhere to look at this sereis?
It looks somewhat funny but I don't think it's wrong.
There's an extra } there. Context is:
if (surf->surf.ts_size) {
if (!ctx->specs.use_blt) {
...
}
} else {
if (!ctx->specs.use_blt)
..
}
My current working tree can be found at
https://github.com/laanwj/mesa/tree/gc7000. It contains these patches
(but also some temporary local scaffolding, so be warned).
Wladimir
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Re: [Mesa-dev] [PATCH 08/19] etnaviv: GC7000: Split off RS blit functions
On Sun, Nov 5, 2017 at 1:09 PM, Christian Gmeiner <christian.gmei...@gmail.com> wrote: > 2017-10-30 17:16 GMT+01:00 Wladimir J. van der Laan <laa...@gmail.com>: >> Prepare for BLT-based blitting path by moving RS-based >> blitting to its own implementation file. >> >> Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> >> --- >> src/gallium/drivers/etnaviv/Makefile.sources | 1 + > > src/gallium/drivers/etnaviv/meson.build needs changed too. > >> src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 553 +-- >> src/gallium/drivers/etnaviv/etnaviv_clear_blit.h | 9 + >> .../drivers/etnaviv/etnaviv_clear_blit_rs.c| 595 >> + > > Maybe we could move the rs specific stuff directly into > etnaviv_rs.[ch]? So we end with > etnaviv_blt.[ch] and etnaviv_rs.[ch]. (Just an idea I had during review). I also thought about that, but kept the low/high level separation as it was already there, as I didn't want to make it inconsistent between RS and BLT. But I think it's a good idea in itself. When that's done I also think we should move the RS emit code back into etna_rs.c, that would make it self-contained. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 06/19] etnaviv: GC7000: Support BLT as recipient for etna_stall
On Sun, Nov 5, 2017 at 12:47 PM, Christian Gmeiner <christian.gmei...@gmail.com> wrote: > 2017-10-30 17:16 GMT+01:00 Wladimir J. van der Laan <laa...@gmail.com>: >> When the BLT is involved as source or target, add an extra BLT >> enable/disable sequence around the sync sequence. >> > > Does this mean we are doing lazy blit operations? Or why is this needed at > all? How do you mean with "lazy blit"? This is required. Any syncing with the BLT will otherwise crash. The Vivante blob does it, also. Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/2] etnaviv: Don't over-pad compressed textures
HALIGN_FOUR/SIXTEEN has no meaning for compressed textures, and we can't
render to them anyway. So use the tightest possible packing. This
avoids bugs with non-power-of-two block sizes.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_resource.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
This is important in the case of ASTC. Padding ASTC to width 4 or 16
produces intermittent magenta blocks when using texture widths
not a multiple of those.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.c
b/src/gallium/drivers/etnaviv/etnaviv_resource.c
index d6cccd2..0a82807 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.c
@@ -209,18 +209,24 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned
layout,
return NULL;
}
- /* If we have the TEXTURE_HALIGN feature, we can always align to the
-* resolve engine's width. If not, we must not align resources used
-* only for textures. */
- bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
- !etna_resource_sampler_only(templat);
-
/* Determine needed padding (alignment of height/width) */
unsigned paddingX = 0, paddingY = 0;
unsigned halign = TEXTURE_HALIGN_FOUR;
- etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align, ,
-, );
- assert(paddingX && paddingY);
+ if (!util_format_is_compressed(templat->format)) {
+ /* If we have the TEXTURE_HALIGN feature, we can always align to the
+ * resolve engine's width. If not, we must not align resources used
+ * only for textures. */
+ bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN)
||
+ !etna_resource_sampler_only(templat);
+ etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align,
,
+ , );
+ assert(paddingX && paddingY);
+ } else {
+ /* Compressed textures are padded to their block size, but we don't have
+ * to do anything special for that. */
+ paddingX = 1;
+ paddingY = 1;
+ }
if (templat->target != PIPE_BUFFER)
etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, );
--
2.7.4
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Re: [Mesa-dev] [PATCH 0/2] etnaviv: ASTC texture support
On Wed, Nov 01, 2017 at 01:27:30PM -0400, Ilia Mirkin wrote:
> On Wed, Nov 1, 2017 at 1:19 PM, Wladimir J. van der Laan
> <laa...@gmail.com> wrote:
> > Add ASTC texture support for hardware that supports this
> > (currently only GC3000 on i.MX6qp is known to have this).
> >
> > Piglit output:
> >
> > $ bin/khr_compressed_astc-miptree_gles2
> > PIGLIT: {"subtest": {"LDR Profile" : "pass"}}
> > PIGLIT: {"subtest": {"HDR Profile" : "pass"}}
> > PIGLIT: {"subtest": {"sRGB decode" : "pass"}}
> > Probe at (144,44)
> > Expected: 0.972549 0.972549 0.972549 1.00
> > Observed: 0.984314 0.984314 0.984314 1.00
> > piglit: error: Miplevel 0
> > piglit: error: Mode ldrs Block 4x4.
> > PIGLIT: {"subtest": {"sRGB decode full precision" : "fail"}}
> > PIGLIT: {"subtest": {"sRGB skip decode" : "pass"}}
> >
> > This means all block sizes are working, and basic RGB/sRGB.
> >
> > Not sure why "sRGB decode full precision" is not passing,
> > probably the hw just doesn't do that.
>
> On the off chance that you're not intimately familiar with ASTC,
I'm not - my reason for doing this was to become more familiar with it.
> there's the concept of decoding into UNORM8 and FP16's. I don't mean
> the external view of it, but internal as part of the decompression.
Thanks for the explanation, that explains why the combinatorial explosion is
limited to block sizes and SRGB, not other pixel formats.
> The end result is what it is, but with FP16 you get more precision esp
> when doing sRGB correction (perhaps only when you do sRGB correction).
>
> """
> If sRGB conversion is enabled, the top 8 bits of the interpolation
> result for the R, G and B channels are passed to the external sRGB
> conversion block. Otherwise, if C = 65535, then the final result is
> 1.0 (0x3C00) otherwise C is divided by 65536 and the infinite-precision
> result of the division is converted to FP16 with round-to-zero
> semantics.
> """
>
> And HDR is supposed to be all-FP16. Anyways, I wouldn't be surprised
> if some of those UNK's enable FP16 decoding.
It's possible (the state has to do something), though the blob driver only
reports "GL_KHR_texture_compression_astc_ldr", no HDR support.
(so the piglit "HDR profile" test compares against error-magenta)
Is high-precision sRGB decoding support expected in that case?
Regards,
Wladimir
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Re: [Mesa-dev] [PATCH 2/2] etnaviv: ASTC texture support
> These formats are in a completely different space from the others, in the > hardware (programmed through a different register), so IMO it makes sense to > add a new format bit for it, just like for EXT_FORMAT. > > Relying on mesa's judgement on whether something is astc seems brittle. > > > Sorry I do not share this option. Did you had a look at > https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/auxiliary/util/u_ > format.csv ? > > All astc formats are marked as those and why should we not trust mesa here? Well vivante's opinion of what an ASTC format might differ from mesa's some day. I think we should keep specific implementation details such as what register switches formats contained to our driver. This keeps etnaviv_format.c self-contained. It's not like we're running out of bits or something. I really disagree with calling into mesa for this, at least in the sampler view code. > Such helper could look like: https://hastebin.com/jelisigife.m > > Do we need ctx->specs.tex_astc at all? We could simply do it like this in > etnaviv_screen.c: > > if (util_format_is_astc(format)) > supported = VIV_FEATURE(screen, chipMinorFeatures4, TEXTURE_ASTC); It's also using this in the state emit code, where directly calling into VIV_FEATURE is ugly. Also, some GPUs seem to have TEXTURE_ASTC but broken ASTC (such as the GC7000lite) so this logic must be extended some day. Having a specs bit is easier for that. (also, vivante is doing away with feature bits on newer GPUs; we're going to have our own model->specs mapping database like them at some point) Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v2] etnaviv: Allow clearing constant buffer using buffer==NULL user_buffer==NULL
On Wed, Nov 01, 2017 at 02:27:40PM +0100, Lucas Stach wrote: > Am Montag, den 30.10.2017, 17:14 +0100 schrieb Wladimir J. van der Laan: > > On Mon, Oct 30, 2017 at 02:21:07PM +0100, Lucas Stach wrote: > > > I would prefer the shorter expression (!cb->buffer && !cb->user_buffer) > > > here, which seems more consistent with the rest of the codebase. > > > > Well, I mimiced the style from other assertion in the function which > > compares > > explicitly with NULL. But ok, I'll update it some time. > > If you agree with my suggestion I can also just fix it up while > applying, but I'll leave the decision how you want to handle this up to > you. Feel free to do so while applying - I don't mind how it's solved really, it's just useful to not have this crash :) Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/2] etnaviv: ASTC texture support
On Wed, Nov 01, 2017 at 06:38:21PM +0100, Christian Gmeiner wrote: > I would love to see a new format helper (util_format_is_astc(..) and not > even start thinking about adding a new format bit (ASTC_FORMAT). These formats are in a completely different space from the others, in the hardware (programmed through a different register), so IMO it makes sense to add a new format bit for it, just like for EXT_FORMAT. Relying on mesa's judgement on whether something is astc seems brittle. Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/2] etnaviv: Update from rnndb
Updated as of etnav_viv commit 3b4a8ec.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 2 +-
src/gallium/drivers/etnaviv/etnaviv_format.c | 9 +-
src/gallium/drivers/etnaviv/etnaviv_state.c | 2 +-
src/gallium/drivers/etnaviv/etnaviv_transfer.c | 2 +
src/gallium/drivers/etnaviv/etnaviv_translate.h | 15 +-
src/gallium/drivers/etnaviv/hw/cmdstream.xml.h | 20 +-
src/gallium/drivers/etnaviv/hw/common.xml.h | 11 +-
src/gallium/drivers/etnaviv/hw/common_3d.xml.h | 171 ++
src/gallium/drivers/etnaviv/hw/isa.xml.h | 15 +-
src/gallium/drivers/etnaviv/hw/state.xml.h | 210 +---
src/gallium/drivers/etnaviv/hw/state_3d.xml.h| 402 ++-
src/gallium/drivers/etnaviv/hw/state_blt.xml.h | 282
src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h | 194 +++
13 files changed, 1015 insertions(+), 320 deletions(-)
create mode 100644 src/gallium/drivers/etnaviv/hw/common_3d.xml.h
create mode 100644 src/gallium/drivers/etnaviv/hw/state_blt.xml.h
create mode 100644 src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h
diff --git a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
index 21f50b7..ff37a6b 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
@@ -531,7 +531,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
if (src->base.nr_samples > 1) {
uint32_t msaa_format = translate_msaa_format(src_format);
assert(msaa_format != ETNA_NO_MATCH);
- ts_mem_config |= VIVS_TS_MEM_CONFIG_MSAA | msaa_format;
+ ts_mem_config |= VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION | msaa_format;
}
/* Always flush color and depth cache together before resolving. This works
diff --git a/src/gallium/drivers/etnaviv/etnaviv_format.c
b/src/gallium/drivers/etnaviv/etnaviv_format.c
index ac9b2d1..987f6a8 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_format.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_format.c
@@ -26,6 +26,7 @@
#include "etnaviv_format.h"
+#include "hw/common_3d.xml.h"
#include "hw/state.xml.h"
#include "hw/state_3d.xml.h"
@@ -62,7 +63,7 @@ struct etna_format {
/* vertex + texture */
#define VT(pipe, vtxfmt, texfmt, texswiz, rsfmt) \
[PIPE_FORMAT_##pipe] = { \
- .vtx = VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_##vtxfmt, \
+ .vtx = FE_DATA_TYPE_##vtxfmt, \
.tex = TEXTURE_FORMAT_##texfmt, \
.rs = RS_FORMAT_##rsfmt,\
.present = 1, \
@@ -82,7 +83,7 @@ struct etna_format {
/* vertex-only */
#define V_(pipe, fmt, rsfmt) \
[PIPE_FORMAT_##pipe] = {\
- .vtx = VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_##fmt, \
+ .vtx = FE_DATA_TYPE_##fmt, \
.tex = ETNA_NO_MATCH,\
.rs = RS_FORMAT_##rsfmt, \
.present = 1,\
@@ -173,8 +174,8 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
V_(R10G10B10A2_USCALED, UNSIGNED_INT_10_10_10_2, NONE),
V_(R10G10B10A2_SSCALED, INT_10_10_10_2, NONE),
- _T(X8Z24_UNORM, D24S8, SWIZ(X, Y, Z, W), A8R8G8B8),
- _T(S8_UINT_Z24_UNORM, D24S8, SWIZ(X, Y, Z, W), A8R8G8B8),
+ _T(X8Z24_UNORM, D24X8, SWIZ(X, Y, Z, W), A8R8G8B8),
+ _T(S8_UINT_Z24_UNORM, D24X8, SWIZ(X, Y, Z, W), A8R8G8B8),
/* 48-bit */
V_(R16G16B16_UNORM, UNSIGNED_SHORT, NONE),
diff --git a/src/gallium/drivers/etnaviv/etnaviv_state.c
b/src/gallium/drivers/etnaviv/etnaviv_state.c
index 34bcb19..6e82216 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_state.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_state.c
@@ -177,7 +177,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx,
/* MSAA */
if (cbuf->base.texture->nr_samples > 1)
ts_mem_config |=
-VIVS_TS_MEM_CONFIG_MSAA | translate_msaa_format(cbuf->base.format);
+VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION |
translate_msaa_format(cbuf->base.format);
nr_samples_color = cbuf->base.texture->nr_samples;
} else {
diff --git a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
index 08ec198..e402e19 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
@@ -40,6 +40,8 @@
#include "util/u_surface.h"
#include "util/u_transfer.h"
+#include "hw/common_3d.xml.h"
+
#include
/* Compute offset into a 1D/2D/3D buffer of a certain box.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_translate.h
b/src/gallium/drivers/etnaviv/etnaviv_translate.h
index 0761251.
[Mesa-dev] [PATCH 0/2] etnaviv: ASTC texture support
Add ASTC texture support for hardware that supports this
(currently only GC3000 on i.MX6qp is known to have this).
Piglit output:
$ bin/khr_compressed_astc-miptree_gles2
PIGLIT: {"subtest": {"LDR Profile" : "pass"}}
PIGLIT: {"subtest": {"HDR Profile" : "pass"}}
PIGLIT: {"subtest": {"sRGB decode" : "pass"}}
Probe at (144,44)
Expected: 0.972549 0.972549 0.972549 1.00
Observed: 0.984314 0.984314 0.984314 1.00
piglit: error: Miplevel 0
piglit: error: Mode ldrs Block 4x4.
PIGLIT: {"subtest": {"sRGB decode full precision" : "fail"}}
PIGLIT: {"subtest": {"sRGB skip decode" : "pass"}}
This means all block sizes are working, and basic RGB/sRGB.
Not sure why "sRGB decode full precision" is not passing,
probably the hw just doesn't do that.
Wladimir J. van der Laan (2):
etnaviv: Update from rnndb
etnaviv: ASTC texture support
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 2 +-
src/gallium/drivers/etnaviv/etnaviv_emit.c | 8 +
src/gallium/drivers/etnaviv/etnaviv_format.c | 39 ++-
src/gallium/drivers/etnaviv/etnaviv_format.h | 1 +
src/gallium/drivers/etnaviv/etnaviv_internal.h | 2 +
src/gallium/drivers/etnaviv/etnaviv_screen.c | 6 +
src/gallium/drivers/etnaviv/etnaviv_state.c | 2 +-
src/gallium/drivers/etnaviv/etnaviv_texture.c| 11 +-
src/gallium/drivers/etnaviv/etnaviv_texture.h| 1 +
src/gallium/drivers/etnaviv/etnaviv_transfer.c | 2 +
src/gallium/drivers/etnaviv/etnaviv_translate.h | 15 +-
src/gallium/drivers/etnaviv/hw/cmdstream.xml.h | 20 +-
src/gallium/drivers/etnaviv/hw/common.xml.h | 11 +-
src/gallium/drivers/etnaviv/hw/common_3d.xml.h | 171 ++
src/gallium/drivers/etnaviv/hw/isa.xml.h | 15 +-
src/gallium/drivers/etnaviv/hw/state.xml.h | 210 +---
src/gallium/drivers/etnaviv/hw/state_3d.xml.h| 402 ++-
src/gallium/drivers/etnaviv/hw/state_blt.xml.h | 282
src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h | 194 +++
19 files changed, 1072 insertions(+), 322 deletions(-)
create mode 100644 src/gallium/drivers/etnaviv/hw/common_3d.xml.h
create mode 100644 src/gallium/drivers/etnaviv/hw/state_blt.xml.h
create mode 100644 src/gallium/drivers/etnaviv/hw/texdesc_3d.xml.h
--
2.7.4
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[Mesa-dev] [PATCH 2/2] etnaviv: ASTC texture support
Add ASTC texture support for hardware that supports this
(currently only GC3000 on i.MX6qp is known to have this).
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_emit.c | 8 +++
src/gallium/drivers/etnaviv/etnaviv_format.c | 30 ++
src/gallium/drivers/etnaviv/etnaviv_format.h | 1 +
src/gallium/drivers/etnaviv/etnaviv_internal.h | 2 ++
src/gallium/drivers/etnaviv/etnaviv_screen.c | 6 ++
src/gallium/drivers/etnaviv/etnaviv_texture.c | 11 --
src/gallium/drivers/etnaviv/etnaviv_texture.h | 1 +
7 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 5397aa3..d313af6 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -703,6 +703,14 @@ etna_emit_state(struct etna_context *ctx)
/*03828*/ EMIT_STATE(GL_VARYING_COMPONENT_USE(x),
ctx->shader_state.GL_VARYING_COMPONENT_USE[x]);
}
}
+ if (unlikely(ctx->specs.tex_astc && (dirty & (ETNA_DIRTY_SAMPLER_VIEWS {
+ for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
+ if ((1 << x) & active_samplers) {
+struct etna_sampler_view *sv =
etna_sampler_view(ctx->sampler_view[x]);
+/*10500*/ EMIT_STATE(NTE_SAMPLER_ASTC0(x), sv->TE_SAMPLER_ASTC0);
+ }
+ }
+ }
etna_coalesce_end(stream, );
/* end only EMIT_STATE */
diff --git a/src/gallium/drivers/etnaviv/etnaviv_format.c
b/src/gallium/drivers/etnaviv/etnaviv_format.c
index 987f6a8..3dd212f 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_format.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_format.c
@@ -246,6 +246,36 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
_T(ETC2_RG11_UNORM, EXT_RG11_EAC | EXT_FORMAT, SWIZ(X,
Y, Z, W), NONE),
_T(ETC2_RG11_SNORM, EXT_SIGNED_RG11_EAC | EXT_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_4x4,ASTC_RGBA_4x4 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_5x4,ASTC_RGBA_5x4 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_5x5,ASTC_RGBA_5x5 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_6x5,ASTC_RGBA_6x5 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_6x6,ASTC_RGBA_6x6 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_8x5,ASTC_RGBA_8x5 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_8x6,ASTC_RGBA_8x6 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_8x8,ASTC_RGBA_8x8 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x5, ASTC_RGBA_10x5 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x6, ASTC_RGBA_10x6 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x8, ASTC_RGBA_10x8 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x10, ASTC_RGBA_10x10 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_12x10, ASTC_RGBA_12x10 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_12x12, ASTC_RGBA_12x12 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+
+ _T(ASTC_4x4_SRGB, ASTC_SRGB8_ALPHA8_4x4 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_5x4_SRGB, ASTC_SRGB8_ALPHA8_5x4 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_5x5_SRGB, ASTC_SRGB8_ALPHA8_5x5 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_6x5_SRGB, ASTC_SRGB8_ALPHA8_6x5 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_6x6_SRGB, ASTC_SRGB8_ALPHA8_6x6 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_8x5_SRGB, ASTC_SRGB8_ALPHA8_8x5 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_8x6_SRGB, ASTC_SRGB8_ALPHA8_8x6 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_8x8_SRGB, ASTC_SRGB8_ALPHA8_8x8 | ASTC_FORMAT,SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x5_SRGB, ASTC_SRGB8_ALPHA8_10x5 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x6_SRGB, ASTC_SRGB8_ALPHA8_10x6 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x8_SRGB, ASTC_SRGB8_ALPHA8_10x8 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_10x10_SRGB, ASTC_SRGB8_ALPHA8_10x10 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_12x10_SRGB, ASTC_SRGB8_ALPHA8_12x10 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+ _T(ASTC_12x12_SRGB, ASTC_SRGB8_ALPHA8_12x12 | ASTC_FORMAT, SWIZ(X,
Y, Z, W), NONE),
+
/* YUV */
_T(YUYV, YUY2, SWIZ(X, Y, Z, W), YUY2),
_T(UYVY, UYVY, SWIZ(X, Y, Z, W), NONE),
diff --git a/src/gallium/drivers/etnaviv/etnaviv_format.h
b/src/gal
Re: [Mesa-dev] [PATCH] etnaviv: bugfix: Don't do resolve-in-place without valid TS
On Wed, Nov 1, 2017 at 11:35 AM, Eric Engestrom <eric.engest...@imgtec.com> wrote: > On Wednesday, 2017-11-01 11:17:53 +0100, Wladimir J. van der Laan wrote: >> GC3000 resolve-in-place assumes that the TS state is configured. >> If it is not, this will result in MMU errors. This is especially >> apparent when using glGenMipmaps(). >> >> Fixes a problem introduced in 78ade659569ee6fe9bd244170956139f19dd8c6c. > > I can't review your patch because I don't know anything about that code, > but a quick drive-by comment: the format for this information is Thanks for the heads-up, I didn't know there was a standard format, will do that next time. Regards, Wladimir ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 05/19] etnaviv: Use only DRAW_INSTANCED on GC3000+
On Wed, Nov 01, 2017 at 11:57:39AM +0100, Philipp Zabel wrote:
> On Mon, 2017-10-30 at 17:16 +0100, Wladimir J. van der Laan wrote:
> > The blob does this, as DRAW_INSTANCED can replace fully all the other
> > draw commands - the other path is only there for compatibility and
> > will go away (or at least rot to become buggy due to dis-use) in newer
> > hardware.
> >
> > Preparation for GC7000 support.
>
> This also changes behaviour for <= GC2000 in the indexed case, should
> this be mentioned in the commit message?
Yes, it does. I'll add it to the commit message.
I could also keep exactly the same behavior for old hw, but it didn't feel worth
the extra complexity because offsetting INDEX_ADDR does the same thing and we
update
that state every time before an indexed draw, so as I see it this should not
result
in more state per draw - correct me if wrong!
> > Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
> > ---
> > src/gallium/drivers/etnaviv/etnaviv_context.c | 16
> > src/gallium/drivers/etnaviv/etnaviv_emit.h| 21 +
> > 2 files changed, 33 insertions(+), 4 deletions(-)
> >
> > diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.c
> > b/src/gallium/drivers/etnaviv/etnaviv_context.c
> > index 65c20d2..5aa9c66 100644
> > --- a/src/gallium/drivers/etnaviv/etnaviv_context.c
> > +++ b/src/gallium/drivers/etnaviv/etnaviv_context.c
> > @@ -188,6 +188,8 @@ etna_draw_vbo(struct pipe_context *pctx, const struct
> > pipe_draw_info *info)
> > BUG("Index buffer upload failed.");
> > return;
> >}
> > + /* Add start to index offset, when rendering indexed */
> > + index_offset += info->start * info->index_size;
> >
> >ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo =
> > etna_resource(indexbuf)->bo;
> >ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
>
> So adding the start offset here makes up for always emitting a zero
> start offset with DRAW_INDEXED_PRIMITIVES below.
Yes.
> > @@ -273,10 +275,16 @@ etna_draw_vbo(struct pipe_context *pctx, const struct
> > pipe_draw_info *info)
> > /* First, sync state, then emit DRAW_PRIMITIVES or
> > DRAW_INDEXED_PRIMITIVES */
> > etna_emit_state(ctx);
> >
> > - if (info->index_size)
> > - etna_draw_indexed_primitives(ctx->stream, draw_mode, info->start,
> > prims, info->index_bias);
> > - else
> > - etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
> > + if (ctx->specs.halti >= 2) {
> > + /* On HALTI2+ (GC3000 and higher) only use instanced drawing
> > commands, as the blob does */
> > + etna_draw_instanced(ctx->stream, info->index_size, draw_mode, 1,
> > + info->count, info->index_size ? info->index_bias : info->start);
> > + } else {
> > + if (info->index_size)
> > + etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims,
> > info->index_bias);
>
> Since this is the only place where etna_draw_indexed_primitives is
> called, should the unused start parameter be removed from this
> function?
Sounds good to me.
Regards,
Wladimir
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Re: [Mesa-dev] [PATCH] etnaviv: bugfix: Don't do resolve-in-place without valid TS
On Wed, Nov 01, 2017 at 11:52:55AM +0100, Lucas Stach wrote: > Am Mittwoch, den 01.11.2017, 11:17 +0100 schrieb Wladimir J. van der Laan: > > GC3000 resolve-in-place assumes that the TS state is configured. > > If it is not, this will result in MMU errors. This is especially > > apparent when using glGenMipmaps(). > > > > Fixes a problem introduced in 78ade659569ee6fe9bd244170956139f19dd8c6c. > > > > > Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com> > > --- > > src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 4 > > src/gallium/drivers/etnaviv/etnaviv_emit.c | 4 > > src/gallium/drivers/etnaviv/etnaviv_rs.c | 1 + > > src/gallium/drivers/etnaviv/etnaviv_rs.h | 2 ++ > > 4 files changed, 11 insertions(+) > > > > Ooops. This seems like an obvious oversight but I hadn't thought we would > > get > > into this path at all when there is no TS to "flush". > > And that's probably what we should fix. The self-resolve cases on > resource flush and sampler update don't check the TS status, but they > are only useful if there is a valid TS. > > With the change you did here we are still wasting bandwidth for a no-op > blit on older cores like GC880 when generating mipmaps. Yes, just a bugfix (my original commit did not introduce the higher-level behavior). This particular case should not result in a MMU error. If we fix the higher level, then this could be replaced with an assertion instead. On the longer run I'd personally prefer to make "Flush resource level TS" a separate, explicit operation, for example a method on the context, and not make it go through the blit path with source==destination. It's a hardware operation implemented differently on GC3000 and GC7000, that just happens to use the RS blit on https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] etnaviv: bugfix: Don't do resolve-in-place without valid TS
GC3000 resolve-in-place assumes that the TS state is configured.
If it is not, this will result in MMU errors. This is especially
apparent when using glGenMipmaps().
Fixes a problem introduced in 78ade659569ee6fe9bd244170956139f19dd8c6c.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 4
src/gallium/drivers/etnaviv/etnaviv_emit.c | 4
src/gallium/drivers/etnaviv/etnaviv_rs.c | 1 +
src/gallium/drivers/etnaviv/etnaviv_rs.h | 2 ++
4 files changed, 11 insertions(+)
Ooops. This seems like an obvious oversight but I hadn't thought we would get
into this path at all when there is no TS to "flush".
diff --git a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
index c62287b..8fc7cfc 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
@@ -555,6 +555,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
}
/* Set up color TS to source surface before blit, if needed */
+ bool source_ts_valid = false;
if (src->levels[blit_info->src.level].ts_size &&
src->levels[blit_info->src.level].ts_valid) {
struct etna_reloc reloc;
@@ -579,6 +580,8 @@ etna_try_rs_blit(struct pipe_context *pctx,
etna_set_state(ctx->stream, VIVS_TS_COLOR_CLEAR_VALUE,
src->levels[blit_info->src.level].clear_value);
+
+ source_ts_valid = true;
} else {
etna_set_state(ctx->stream, VIVS_TS_MEM_CONFIG, ts_mem_config);
}
@@ -593,6 +596,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
.source_stride = src_lev->stride,
.source_padded_width = src_lev->padded_width,
.source_padded_height = src_lev->padded_height,
+ .source_ts_valid = source_ts_valid,
.dest_format = translate_rs_format(dst_format),
.dest_tiling = dst->layout,
.dest = dst->bo,
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 707b1e7..5397aa3 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -171,6 +171,10 @@ etna_submit_rs_state(struct etna_context *ctx,
struct etna_cmd_stream *stream = ctx->stream;
struct etna_coalesce coalesce;
+ if (cs->RS_KICKER_INPLACE && !cs->source_ts_valid)
+ /* Inplace resolve is no-op if TS is not configured */
+ return;
+
ctx->stats.rs_operations++;
if (cs->RS_KICKER_INPLACE) {
diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.c
b/src/gallium/drivers/etnaviv/etnaviv_rs.c
index c9072c2..60c2c39 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.c
@@ -133,6 +133,7 @@ etna_compile_rs_state(struct etna_context *ctx, struct
compiled_rs_state *cs,
/* Total number of tiles (same as for autodisable) */
cs->RS_KICKER_INPLACE = rs->source_padded_width *
rs->source_padded_height / 16;
}
+ cs->source_ts_valid = rs->source_ts_valid;
}
void
diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.h
b/src/gallium/drivers/etnaviv/etnaviv_rs.h
index 171d3fa..41a5960 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.h
@@ -33,6 +33,7 @@
struct rs_state {
uint8_t downsample_x : 1; /* Downsample in x direction */
uint8_t downsample_y : 1; /* Downsample in y direction */
+ uint8_t source_ts_valid : 1;
uint8_t source_format; /* RS_FORMAT_XXX */
uint8_t source_tiling; /* ETNA_LAYOUT_XXX */
@@ -61,6 +62,7 @@ struct rs_state {
/* treat this as opaque structure */
struct compiled_rs_state {
+ uint8_t source_ts_valid : 1;
uint32_t RS_CONFIG;
uint32_t RS_SOURCE_STRIDE;
uint32_t RS_DEST_STRIDE;
--
2.7.4
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[Mesa-dev] [PATCH 16/19] etnaviv: GC7000: Factor out incompatible texture handling logic
This will be shared with the texture descriptor path.
Signed-off-by: Wladimir J. van der Laan <laa...@gmail.com>
---
src/gallium/drivers/etnaviv/etnaviv_texture.c | 40 +--
src/gallium/drivers/etnaviv/etnaviv_texture.h | 5
2 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.c
b/src/gallium/drivers/etnaviv/etnaviv_texture.c
index 335a2df..55942a9 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.c
@@ -164,22 +164,10 @@ etna_resource_sampler_compatible(struct etna_resource
*res)
return true;
}
-static struct pipe_sampler_view *
-etna_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
- const struct pipe_sampler_view *so)
+struct etna_resource *
+etna_texture_handle_incompatible(struct pipe_context *pctx, struct
pipe_resource *prsc)
{
- struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
struct etna_resource *res = etna_resource(prsc);
- struct etna_context *ctx = etna_context(pctx);
- const uint32_t format = translate_texture_format(so->format);
- const bool ext = !!(format & EXT_FORMAT);
- const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
- so->swizzle_g, so->swizzle_b,
- so->swizzle_a);
-
- if (!sv)
- return NULL;
-
if (!etna_resource_sampler_compatible(res)) {
/* The original resource is not compatible with the sampler.
* Allocate an appropriately tiled texture. */
@@ -194,11 +182,33 @@ etna_create_sampler_view(struct pipe_context *pctx,
struct pipe_resource *prsc,
}
if (!res->texture) {
- free(sv);
return NULL;
}
res = etna_resource(res->texture);
}
+ return res;
+}
+
+static struct pipe_sampler_view *
+etna_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
+ const struct pipe_sampler_view *so)
+{
+ struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
+ struct etna_context *ctx = etna_context(pctx);
+ const uint32_t format = translate_texture_format(so->format);
+ const bool ext = !!(format & EXT_FORMAT);
+ const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
+ so->swizzle_g, so->swizzle_b,
+ so->swizzle_a);
+
+ if (!sv)
+ return NULL;
+
+ struct etna_resource *res = etna_texture_handle_incompatible(pctx, prsc);
+ if (!res) {
+ free(sv);
+ return NULL;
+ }
sv->base = *so;
pipe_reference_init(>base.reference, 1);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.h
b/src/gallium/drivers/etnaviv/etnaviv_texture.h
index a7a67fc..9d1789e 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.h
@@ -72,4 +72,9 @@ etna_sampler_view(struct pipe_sampler_view *view)
void
etna_texture_init(struct pipe_context *pctx);
+/* If the original resource is not compatible with the sampler. Allocate
+ * an appropriately tiled texture. */
+struct etna_resource *
+etna_texture_handle_incompatible(struct pipe_context *pctx, struct
pipe_resource *prsc);
+
#endif
--
2.7.4
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