Re: Coding question
Hi,
I shall put some comments in the assembly, if you don't agree with what I
say, there's an error in the implementation (or a mistake on my side ;)
I have the following subroutine:
ld hl,(table) ; load table into hl
dynamic start of table: the start address is kept at address table
inc hl ; increase table
inc hl ; increase table
2 bytes per entry
ld a,(hl) ; put value in a
sla a ; *2
sla a ; *2
sla a ; *2
might as well use add a,a. makes it better readable
dec hl ; decrease table
now you only have 1 byte per entry. either you cut out the second dec hl,
or this is a serious error which will cause data corruption.
The question is how do I put the value in a back in the table. I
can't do ld (hl),a. That doesn't work
As others said, it does. but hl must be pointing right.
I hope you can find the problem. Good luck.
Bye,
shevek
main(){int c[4] ,x=4 ,l=getpid() ,i;; for( srand(l);c[ x]=- rand
()%6 ,x-- ;);; for( ;44 x;){ char a[9] ,*p=
"%.1f\n", b[9];x=i=0; gets(a);for (l=4 ;l-- ;)x+=-(a[l] -=48)==
(b[l ]=c[ l]); ;for (l=0;16i;l =++i %4)x
+=(b[i/4]+ a[l] ?0:( a[l]=b[i/4] =10)) ;printf(p,x *.1) ;};}
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Re: ACE002, Z180, (LPE) Z380, ADVRAM... New MSX...
And as I stated above, most new instructions could also have been added to the Z180... They have nothing to do with the extended address range etc. Yes, you are right. Some. But they are absolutely NOT 200% more than Z80 instruction set! I haven't done the exact math, but when you look at the Z380 opcode tables, it seems the instruction set has nearly doubled. And if you take into account the enhanced Z80-instructions (16 bit indexing 'n stuff) it's easy to get to that number. Saying "200% more" means tot total amount tripled, not doubled... ~Grauw -- email me: [EMAIL PROTECTED] or ICQ: 10196372 visit my homepage at http://grauw.blehq.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: 8x8 sprites in BrMSX screen 5
Yeah? Well, I still haven't seen 8x8 sprite support in screen 5. And we really need it, for GEM development... Hey, big fudeba! I told you once, Daniel told you and also Ricardo told you! Send e-mails to Ricardo asking for 8x8 sprites in BrMSX SCREEN 5 until he implements it. Or you'll continue without your 8x8 sprites until one day he decides to implement it. That's the true. Got it? Well that's what I'm doing now, right? I am sending emails nagging about 8x8 sprites all the time!!! Anyways, I spoke to him (since recently, he's got ICQ) (I have to add him to my MSX ICQ list, by the way), and he thought he would probably have 8x8 sprite support within a week. ~Grauw -- email me: [EMAIL PROTECTED] or ICQ: 10196372 visit my homepage at http://grauw.blehq.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: two liners art gallery
Why didn't you never showed us "Nemesis Dawn" demo? Don't say that you made it yestarday! It was shown in MSX Rio'99! (-; The version in the page in not the same version shown in rio'99 As you may remember , that version had only half of the animation. The version in the art gallery has the complete animation. Now you may ask me why I delayed for so long the release of the new version... The answer is that the current version didn't work in BrMSX until the new release 2.5 ;-) I tries it out (hell what a long waiting!!!), and I think it's really cool. However, you should also add the comment that when using screen 8 instead of 12 and switching your monitor to monochrome (if possible) the result will also be 'acceptable'. By the way, I don't think more than 8 colors are being used... couldn't this be made for screen 5 (or screen 7)??? I guess it then won't fit in 2 lines anymore though... And the sprite definition in RBRACE.BAS is quite tricky... I had to do three pokes _inside_ the Basic program to get the stuff right. VERY addicting game though... However, you don't want to play it at 7MHz... :) ~Grauw -- email me: [EMAIL PROTECTED] or ICQ: 10196372 visit my homepage at http://grauw.blehq.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: MSX Talk
25/04/00 Hi Folks! I just wanna tell you about a MSX forum, called MSX Talk, anyone iw welcome to post any messages there! Sorry. The MSX Mailinglist is a full-fledged job. I even haven't got time to read the comp.sys.msx newsgroup!!! Let go the MSX Talk forum. ~Grauw -- email me: [EMAIL PROTECTED] or ICQ: 10196372 visit my homepage at http://grauw.blehq.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
?? Z80 has 256 I/O addresses, not 64k! It only uses the lower byte of the address lines to address I/O ports. I don't know about Z180, but my guess is that that processor uses 16-bits I/O adressing space (equals 64k) I heard that Z80 actually publishes BC on the bus when doing "OUT (C),r", but that the MSX only uses the lower 8 bits. I'm not sure though. You are right. And it publishes the contents of A on the upper 8 bits of the address bus when doing an IN A,(n) or OUT (n),A. Hence, you can IN a value from I/O port 1099 by doing LD A,#10 IN A,(#99) ADVRAM makes use of this. RicBit wrote something about that... (I don't know about any other devices). ~Grauw MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
..one medium cost migration path of MSX platform (part 2).
Laurens, I want exted more and explain right over the concept involving in me Design Achitecture as one FAQ questionarie (part 2): OVER LPE-Z380-V2. Q: What type is the control HW ? A: Have 2 Flash CPLD (2500 PLD Gates equivalent), for reprograming. Q: What HW Architecture have ? A: Equivalent to one L1 (level 1) computer. Q: Is possible replace the Z80 of the internal MSX with th Z380? A: Yes. But no is interesting for use the I/O directly for the Z380. Let to Z80 maneging the I/Os. Is easy make power games/aplications whit Z80 working as server (boosting 600%). This is the cartridge mode. OVER EVOLUTION4. Q: What signals is contened in the Bus ? A: they are 50 contacts as MSX standard in the central part. Pin 5 used as /BREQ, 46 /BACKI, 44 /BACKO thees for DMA and pin 16 for Adress Mux for 48 total address lines. The DMA is ZBUS type. They are 8 contacts at the right for use as Slots Rail. And they are too 16 for 8 added addres lines plus 8 data lines at the left. Please see the Spanish Hnostar Magazine number 39 from 1.997 page 29. Q: Is possible put all memory system of MSX in one single card with the same slots disposition (RAM, ROMS) ? A: Yes, Use the Slots Rail for this. Q: Is ready for suport IOSLOTS ? A: Yes Q: What type is the control HW ? A: Flash CPLD (5000 PLD Gates equivalent), with JTAG port included on board for reprogramig. OVER LPE-Z380-V2 + EVOLUTION4 + MSX. Q: Is posible use here the Z380 in cartridge mode ? A: Yes Q: Is MSX 100 % compatible ? A: Of course. Because your MSX HW/SW system is included. Q: Is the cars passed to the expansor MSX 100 % compatible ? A: Of course. Because you traslate only of position the MSX HW/SW. When you had traslated all including the ROMs you run with Z380 all with the same ROMs. Q: How is implemented the mapper ? A: The slots leng from 1G to 16K is chaged in the Z380 card togle one bit in the F3h card internal register. The mapper mush be included in memory car for plug in the expansor. This memory togle mapped/linear togling one bit too. Q: The Z380 can drive alternaty with MSX Z80 the cards pluged in the expansor boosting the games/aplications ? A: Of course. But before you mush enable Halted the internal microprocesor, for it put one pull up resistor 4K7 in the Z80 (pin 25) BREQ and solder one cable betwin it and pin 5 of edge conector of your MSX, and other connection form BACK (pin 23) to pin 46 for be acknoled in the expansor. OVER ME COLABORATION WITH OTHER CARDS MAKERS. Q: Is possible now the colaboration for make one new mainboard MSX3 Style ? A: No. I think we mush evolutionig at minimum cost the actual system first, using old cards, and see the results. And the other hand the cost of development for one complete main board is very high, long time for finish with great risk to appear in 2005 as soon, and only affordable for multinational enterprises as Philips or Sony now non interested. And when finished it, will be acepted by the MSX community ?. Will be the VDP then at your taste ?.We mush be modest. Q: Is possible the colaboration for traslate SW/HW to card for EVOLUTION4 adding DMA, IOSLOTS, INT..prove ? A: Yes Q: Is possible the colaboration for redesingner old card for EVOLUTION4 adding DMA, IOSLOTS, INT..? A: Yes MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Extra FDD on a Turbo R
I have send this message before, but nobody replied on it and because I have a little email trouble every now and then, maybe this message didn't get trough. So here it is again: A little while ago I have mailed about an external floppydrive connector that was on my second hand Turbo-R. Somebody would like to help me if I profided the pin assignments where the external 15pin female D connector was connected to. Now I have opened the Turbo-R I wrote down the pin numbers. The wires are connected to the second floppy drive connector CN14 in following manner: CN14wirecolor 15p D female 1 red 1 6 green/white 3 7 black 2 9 red/white 4 11 yel/white 5 12 ora/white 6 13 green/white 7 14 purple/white8 16 yellow 9 18 brown/white 10 19 green/black 11 20 grey12 22 orange 13 23 bleu14 24 brown 15 If I know what the pin assignments are, I will try to connect an external 720Kb drive I have and sometimes use on a NMS8245 with external connector. (It is an old external floppydrive for an Atari 1024) So, does anybody know what these pin assignmenst are? Is this a standard build in from maybe Sunrise? (because memory upgrade, SCSI controller and maybe the entire Turbo R are from Sunrise) Greetings, Hans-Peter (P.S. happy Easter!) MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
RE: multiple disk drives
Hé, good guess! I haven't tried it, but it might just do the trick! It is normal that the ROMS of a 8235 are socketed. I have modified a few 8235 to 720Kb in the past and used the diskroms from a 8250. Hans-Peter -Oorspronkelijk bericht- Van: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]Namens Philip Verzonden: dinsdag 25 april 2000 13:42 Aan: [EMAIL PROTECTED] Onderwerp: RE: multiple disk drives The diskrom of my 8235 is in a socket. I don't know if this is standard, it could be the socket was placed when building in a 720 kb diskdrive. But if it is, you can simply remove the diskrom and the internal drive won't be recognised anymore. Regards, Philip At 10:43 AM 4/25/00 +0200, you wrote: I guess that the canon is connected to a floppydrive controller as a cartridge. Each controller (the buid in and the cartridge) are able to to run 2 diskdrives. unfortunatly the internal controller is the first controller. So, if you are able to, hardware, disable the internal controller, the external cartridge will controll the external drives as A: and B: Hans-Peter -Oorspronkelijk bericht- Van: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]Namens Floris 'Tamama' van Gog Verzonden: maandag 24 april 2000 18:22 Aan: MSX mailing lst Onderwerp: multiple disk drives Holas, I have a nms 8235 which has a *whine* 360kb internal diskdrive. This is no biggy though as i also have an external cannon VF-100 which is 720kb. The reason of this post? The cannon is both A and B, and the internal floppy is C. The external drive has a connector for another external drive, but it's currently not used. So I guess it 'emulates' it somehow. Is there any way to kill this behaviour? Also.. Is there a way to access drive 1/2/3 under basic? greetz, Floris MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: multiple disk drives
Holas, I have a nms 8235 which has a *whine* 360kb internal diskdrive. This is NMS 8235?? I have VG8235 (/00) .. no biggy though as i also have an external cannon VF-100 which is 720kb. The reason of this post? The cannon is both A and B, and the internal Does A: give acces to 360 KB and B: to the other 360KB ?? Then the problem is quite clear to me: The disk controler of a standard VG8235 is not able to acces 720KB diskdrives. (why else should there be a 360KB diskdrive internally .. ) It can be updated. Grtz, Siebe. MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: multiple disk drives
This will only work if you have a 8235/00 if you have a 8235/20 there will be only 1 rom, if you remove it you also remove the bios / basic etc. if if you want this it will be easyer to connect a normal 720Kb diskdrive to the rear connector . 8235 can use 720Kb , it can only not be formatted. if you change the diskrom 8235/00 -- 8250 or 8235/20 -- 8245 you can also format 720Kb disks erik de boer -- Hans-Peter Zeedijk schreef: Hé, good guess! I haven't tried it, but it might just do the trick! It is normal that the ROMS of a 8235 are socketed. I have modified a few 8235 to 720Kb in the past and used the diskroms from a 8250. Hans-Peter -Oorspronkelijk bericht- Van: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]Namens Philip Verzonden: dinsdag 25 april 2000 13:42 Aan: [EMAIL PROTECTED] Onderwerp: RE: multiple disk drives The diskrom of my 8235 is in a socket. I don't know if this is standard, it could be the socket was placed when building in a 720 kb diskdrive. But if it is, you can simply remove the diskrom and the internal drive won't be recognised anymore. Regards, Philip At 10:43 AM 4/25/00 +0200, you wrote: I guess that the canon is connected to a floppydrive controller as a cartridge. Each controller (the buid in and the cartridge) are able to to run 2 diskdrives. unfortunatly the internal controller is the first controller. So, if you are able to, hardware, disable the internal controller, the external cartridge will controll the external drives as A: and B: Hans-Peter -Oorspronkelijk bericht- Van: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]]Namens Floris 'Tamama' van Gog Verzonden: maandag 24 april 2000 18:22 Aan: MSX mailing lst Onderwerp: multiple disk drives Holas, I have a nms 8235 which has a *whine* 360kb internal diskdrive. This is no biggy though as i also have an external cannon VF-100 which is 720kb. The reason of this post? The cannon is both A and B, and the internal floppy is C. The external drive has a connector for another external drive, but it's currently not used. So I guess it 'emulates' it somehow. Is there any way to kill this behaviour? Also.. Is there a way to access drive 1/2/3 under basic? greetz, Floris MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: Z180 vs Z380 (was Re: ACE 002 and ADVRAM...? New MSX?)
]] be rewarding to him. Maybe I'll never know ] if there's more people like me, who dream ] of a music composing tool with support to ] PSG, SCC, MSX-Music, MSX-Audio, Moonsound ] and some other hypothetical music hardware... ] ] And don't say that's not feasible. RicBit ] told me it's feasible, and if he say so... :) It is feasible indeed. SME 3 currently supports: PSG, 4 SCCs, MSX-Music and 2 MSX-Audio's. If the program had become the succes I had hoped for, I would also have added Moonsound support. The program is entirely modular so supporting yet another music device would pose no problem... Kind regards, Alex Wulms -- Visit The MSX Plaza (http://www.inter.nl.net/users/A.P.Wulms) for info on XelaSoft, Merlasoft, Quadrivium, XSA Disk images, the MSX Hardware list, SD-Snatcher on fMSX, documentation and lots more. MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
] In addition to the recent "CPU discussion", I want to point at the AB180-20 ] microprocessor made by AB-Semicon. ] ] Features: ] * Z80, Z180 compatible ] * 20MHz, 20 MIPS ] * 1MB memory, 64k I/O ] * two 16-bit timers ] * MMU ] * add. instructions: TST TSTIO MLT ] ] The AB181E-20 microprocessor has an additional fixed math accelerator. ] Anyone familiar with this CPU? Could this be a third alternative? ] ] For info (PDF): www.ab-semicon.com This sounds like a very interesting alternative for the Z180 project: 20 MIPS at 20 MHZ: this implies only one clock cycle per instruction. Thus at least 30 times as fast as the Z80 on MSX (which needs at least 5 clock cycles per instruction, including the wait state in M1) MMU: a memory management unit implies powerfull features like virtual memory, protection of programs against each other and easy relocation of programs. Usefull for Uzix, an enhanced version of memman and lot of other stuff. Kind regards, Alex Wulms -- Visit The MSX Plaza (http://www.inter.nl.net/users/A.P.Wulms) for info on XelaSoft, Merlasoft, Quadrivium, XSA Disk images, the MSX Hardware list, SD-Snatcher on fMSX, documentation and lots more. MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Tue, 25 Apr 2000 03:59:01 PDT, amnon loeza wrote: Features: * Z80, Z180 compatible * 20MHz, 20 MIPS * 1MB memory, 64k I/O * two 16-bit timers * MMU * add. instructions: TST TSTIO MLT The AB181E-20 microprocessor has an additional fixed math accelerator. Anyone familiar with this CPU? Could this be a third alternative? This is very good. I had sent an e-mail to Ademir. 20MIPS is almost twice as Z180 at 33Mhz! (-; And on low clock will make some things easier for Ademir (such as RAM access). AbraçOS/2, Daniel Caetano ([EMAIL PROTECTED]) ...!m.tag OS/2 Sites: http://www.quasarbbs.com/daniel/ http://www.geocities.com/SiliconValley/8752/os2hp/os2index.html MSX Sites: http://www.fudeba.cjb.net/ Drawings: http://www.djgallery.tsx.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Tue, 25 Apr 2000 15:38:46 +0200, Laurens Holst wrote: * two 16-bit timers Z180 has even got an entire RS232 interface built into it!!! This is a good difference. I like the internal RS232 on Z180. Mainly if it works on the speed Ademir told me... (-: * MMU Don't know about that... Memory Management Unit. Is what makes possible 1Mb on Z180. The processor relocates the program automatically (calling the proper segment). No. Then you could as well use the Z180, which is almost the same, and runs at a higher (clock) speed. On this case, the difference on speed is HIGH, because, if the data sent by him are not wrong, it's a RISC processor. It will be 20MIPS against the aproximately 10.5MIPS of Z380 and 12MIPS of Z180. A good speed improvement on internal processing that may result in a substancial speed gain, even using standard DIMM rams (when using Z180 at 33Mhz Ademir was working with a 128Kb main Memory Mapper composed by SRAMs - used on PC cache, 15ns of access time) and a regular 4Mb Mapper at 60ns (which give us something as 14Mhz as fastest access). So, faster speed only on the SRAMs... (ADVRAM uses SRAMs also...). AbraçOS/2, Daniel Caetano ([EMAIL PROTECTED]) ...!m.tag OS/2 Sites: http://www.quasarbbs.com/daniel/ http://www.geocities.com/SiliconValley/8752/os2hp/os2index.html MSX Sites: http://www.fudeba.cjb.net/ Drawings: http://www.djgallery.tsx.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Tue, 25 Apr 2000 16:10:05 +0200, [EMAIL PROTECTED] wrote: Same on Z180. The Z80 already had 64k I/O, when using OUT (C),r or IN A,(n). ?? Z80 has 256 I/O addresses, not 64k! It only uses the lower byte of the address lines to address I/O ports. I don't know about Z180, but my guess is that that processor uses 16-bits I/O adressing space (equals 64k) Z80 has 64K address I/O ports. It's not "usual" to usem them, thought. AbraçOS/2, Daniel Caetano ([EMAIL PROTECTED]) ...!m.tag OS/2 Sites: http://www.quasarbbs.com/daniel/ http://www.geocities.com/SiliconValley/8752/os2hp/os2index.html MSX Sites: http://www.fudeba.cjb.net/ Drawings: http://www.djgallery.tsx.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: Z380, go read the manual (was Re: ACE002, Z180, (LPE) Z380, ADVRAM... New MSX...)
If you take away all new registers and the new address space of the Z380, you would still benefit greatly from the enhanced instructions. They are NOT depending on those features! I think you are a lazy programmer. (-; I take that as an insult, even with the smiley! :/ I hate lazy programmers, and I hate how x86 architecture makes you one. And I know Z380 is not like that. You talk about Z380 and its new instructions as if they are there for EASY programming. No, they are there for FAST program execution! I do not want LD HL,DE because it's easier than LD L,E | LD H,D! I want LD HL,DE because its FASTER. That's what the previous message was about. You were saying Z380 offers no big improvements in the instruction set beside the enhanced memory and register space (Oh, and MULT/DIV). I was saying it DOES, because it provides a lot of instructions (RLC HL) that need several instructions on Z80/180 cpu's. Why is it OK to have MULT and DIV because they are faster than a large routine, and why is it not OK to have LD HL,DE or any other 16 bit instruction? AS I said before, if you don't like ADD HL,BC or something, go program 6502. Nice and compact, only 3 registers, no 16 bit crap... Patriek 'grmbl, calling ME a lazy programmer, hah!' MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: ACE002, Z180, (LPE) Z380, ADVRAM... New MSX...
I haven't done the exact math, but when you look at the Z380 opcode tables, it seems the instruction set has nearly doubled. And if you take into account the enhanced Z80-instructions (16 bit indexing 'n stuff) it's easy to get to that number. Saying "200% more" means tot total amount tripled, not doubled... hey, *I* didn't say "200% more". I said "Zilog expanded the Z80 instructions set 200%". I forgot the word 'to'. Patriek MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Tue, 25 Apr 2000, Daniel Jorge Caetano wrote: On Tue, 25 Apr 2000 03:59:01 PDT, amnon loeza wrote: Features: * Z80, Z180 compatible * 20MHz, 20 MIPS * 1MB memory, 64k I/O * two 16-bit timers * MMU * add. instructions: TST TSTIO MLT The AB181E-20 microprocessor has an additional fixed math accelerator. Anyone familiar with this CPU? Could this be a third alternative? A quote from the manufacturer's web page: "This device does not support Z80 peripherals or interrupt mode 2, but is otherwise code compatible to the Hitachi HD64180 and the Zilog Z180 device." But the introduction in the data sheet (ab180-20.pdf) suggests exactly the opposite: "Not all Z80 interrupt modes are supported. The AB180-20 uses interrupt mode 2 only. The interrupt mode instructions are treated as NOPs. Z80 interrupt acknowledge cycles are not generated." In the chapter out interrupts things become a bit clearer. If I interpreted it correctly, it's like this: - INT0 always causes a jump to #0038 (IM1 behaviour) - INT1 and INT2 use a vector mechanism, but not like IM2: they use a 32-byte there the mapping from interrupt source to table index is fixed and not specified on the bus like IM2 For MSX this means that IM2 is not available. Neither is IM0, but that was unused anyway. Another incompatiblity with Z80: "The Z80 has some undocumented instructions, such as being able to load the upper or lower 8 bits of the index register (IY and IX) independently. This was used by a handful of programs, especially some "copy protected" code. The AB180-20 does not support all of the undocumented Z80 instructions." But Z180 doesn't have IXH/IXL instructions either, right? This may be a serious one: "The on-chip register addresses are located in the I/O address space from H to 00FFH (16-bit I/O addresses). In order to access the on-chip I/O registers (using I/O instruction), the high-order 8 bits of the 16-bit I/O address must be 0." This means the MSX I/O ports will be inaccessable if the high-order 8 bits happen to be zero. Those high-order bits come from one of the registers, right? I thought it was B, but Laurens said A. Anyway, the value of that register is unknown in MSX programs. By the way, the DMA on this processor looks real cool. It can also perform DMA from memory to I/O and vice versa. It could be used for example to upload samples to the MoonSound or Music Module. Bye, Maarten MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Follow-up: Re: AB180-20 Z80,Z180 compatible microprocessor
On Wed, 26 Apr 2000, Maarten ter Huurne wrote: This may be a serious one: "The on-chip register addresses are located in the I/O address space from H to 00FFH (16-bit I/O addresses). In order to access the on-chip I/O registers (using I/O instruction), the high-order 8 bits of the 16-bit I/O address must be 0." This means the MSX I/O ports will be inaccessable if the high-order 8 bits happen to be zero. Those high-order bits come from one of the registers, right? I thought it was B, but Laurens said A. Anyway, the value of that register is unknown in MSX programs. I read some more: "The internal I/O registers of the AB180-20 occupy the 64 addresses between 00h and 3Fh on reset. To avoid conflicts with external devices these registers can be relocated within the bottom 256 bytes of the I/O address space." Are there any important MSX devices with I/O addresses in that range? I know the music module has some to access its sample interface. But that's not such a big deal for me. Bye, Maarten MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
16bit I/O on Z80 explanation (plus a bit about Z380 32 bit I/O)
For the people who haven't noticed: Yes, Z80 has 64kB I/O space (16 bit). For "IN A,(n)" and "OUT (n),A" A is used as the upper 8 bit. For "IN r,(C)", "OUT (C),r" and OTI/OTD/OTIR/OTDR, actually BC is used as the I/O address! The reason it's not used much (although I think I remember something about Spectrum using it), is because of obvious reasons. IN A,(n)/OUT (n),A are close to useless to access 16 bit I/O devices, but can ofcourse be used on 8 bit devices. The same counts for OTI/OTD/OTIR/OTDR, since is constantly being decremented, so is the upper 8 bit of the I/O address! IN r,(C)/OUT (C),r are the only I/O instructions to reliably work with 16 bit I/O devices. Z380 supports 32 bit I/O addresses in the same manner. For IN A,(n)/OUT (n),A the upper 16 bit are always zero (handy), and for all others the entire 32 bit BC is used. To enable a sane use of the 'extra' I/O space, I/O devices should just ignore the the 2nd 8 bit (high byte of the low word) of the I/O address. Patriek MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
interesting C-compiler?
Hey all, I'm not sure about the capabilities and shortcomings of any of the currently available C-compilers for MSX, but I stumbled across this: http://sdcc.sourceforge.net/ taken from the page: SDCC is a Freeware , retargettable, optimizing ANSI - C compiler. The current version targets the Intel 8051 and recently the Zilog Z80 based MCUs. SDCC can be retargeted for other 8 bit MCUs or PICs and some day soon will be. The entire source code for the compiler is distributed under GPL. SDCC uses AS and ASLINK a Freeware, retargettable assembler and linker. SDCC has extensive MCU specific language extensions, which lets it utilize the underlying hardware effectively. The front end (parser) will be enhanced to handle language extensions for other MCUs as and when they are targeted. In addition to the MCU Specific optimizations SDCC also does a host of standard optimizations like global sub expression elimination, loop optimizations (loop invariant , strength reduction of induction variables and loop reversing ), constant folding and propagation, copy propagation, dead code elimination and jump tables for 'switch' statements. For the Back end SDCC uses a global register allocation scheme which should be well suited for other 8 bit MCUs , the peep hole optimizer uses a rule based substitution mechanism which is MCU independent. Supported data types are short (8 bits, 1 byte), char (8 bits, 1 byte) , int (16 bits, 2 bytes ), long (32 bit, 4 bytes) and float (4 byte IEEE). SDCC also comes with the source level debugger SDCDB, the current version of the debugger uses Daniel's s51 simulator. The compiler also allows inline assembler code to be embedded anywhere in a function. In addition routines developed in assembly can also be called. SDCC also provides an option to report the relative complexity of a function, these functions can then be further optimized , or hand coded in assembly if need be. Hope it's useful :) Patriek MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Wed, 26 Apr 2000 01:06:05 +, Maarten ter Huurne wrote: "Not all Z80 interrupt modes are supported. The AB180-20 uses interrupt mode 2 only. The interrupt mode instructions are treated as NOPs. Z80 interrupt acknowledge cycles are not generated." In the chapter out interrupts things become a bit clearer. If I interpreted it correctly, it's like this: - INT0 always causes a jump to #0038 (IM1 behaviour) - INT1 and INT2 use a vector mechanism, but not like IM2: they use a 32-byte there the mapping from interrupt source to table index is fixed and not specified on the bus like IM2 For MSX this means that IM2 is not available. Neither is IM0, but that was unused anyway. There is no problem, I think. MSX standard is about IM1, right? Another incompatiblity with Z80: "The Z80 has some undocumented instructions, such as being able to load the upper or lower 8 bits of the index register (IY and IX) independently. This was used by a handful of programs, especially some "copy protected" code. The AB180-20 does not support all of the undocumented Z80 instructions." But Z180 doesn't have IXH/IXL instructions either, right? Yes, but Z180 has trap... the AB180 has trap feature? This may be a serious one: "The on-chip register addresses are located in the I/O address space from H to 00FFH (16-bit I/O addresses). In order to access the on-chip I/O registers (using I/O instruction), the high-order 8 bits of the 16-bit I/O address must be 0." This means the MSX I/O ports will be inaccessable if the high-order 8 bits happen to be zero. Those high-order bits come from one of the registers, right? I thought it was B, but Laurens said A. Anyway, the value of that register is unknown in MSX programs. I think this can be solved by hardware (add something to "trash" the upper 8 bits always they are 0x00... (-; By the way, the DMA on this processor looks real cool. It can also perform DMA from memory to I/O and vice versa. It could be used for example to upload samples to the MoonSound or Music Module. I'm waiting Ademir's answer. I talk to him by phone and he liked a lot of the 20MIPS at 20Mhz idea... (-; Also, the chip supporst a 40Mhz bus, also, if needed, as he said. AbraçOS/2, Daniel Caetano ([EMAIL PROTECTED]) ...!m.tag OS/2 Sites: http://www.quasarbbs.com/daniel/ http://www.geocities.com/SiliconValley/8752/os2hp/os2index.html MSX Sites: http://www.fudeba.cjb.net/ Drawings: http://www.djgallery.tsx.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Wed, 26 Apr 2000, Daniel Jorge Caetano wrote: For MSX this means that IM2 is not available. Neither is IM0, but that was unused anyway. There is no problem, I think. MSX standard is about IM1, right? I'm not sure what the standard says. But there are IM2 program on MSX. The question is how many and whether they can be modified to use IM1 instead. Another incompatiblity with Z80: "The Z80 has some undocumented instructions, such as being able to load the upper or lower 8 bits of the index register (IY and IX) independently. This was used by a handful of programs, especially some "copy protected" code. The AB180-20 does not support all of the undocumented Z80 instructions." But Z180 doesn't have IXH/IXL instructions either, right? Yes, but Z180 has trap... the AB180 has trap feature? It has. But a trap only works if the opcode is unused. So if they made a new instruction with that same opcode, trap won't work. There is a complete instruction map in the PDF file on their site, so someone could check whether the opcodes are free or not. This may be a serious one: "The on-chip register addresses are located in the I/O address space from H to 00FFH (16-bit I/O addresses). In order to access the on-chip I/O registers (using I/O instruction), the high-order 8 bits of the 16-bit I/O address must be 0." This means the MSX I/O ports will be inaccessable if the high-order 8 bits happen to be zero. Those high-order bits come from one of the registers, right? I thought it was B, but Laurens said A. Anyway, the value of that register is unknown in MSX programs. I think this can be solved by hardware (add something to "trash" the upper 8 bits always they are 0x00... (-; That's not what I'm worried about. The problem is, if you do an "OUT (#20),A" and the upper bits are zero, the hardware outside of the processor will never see the OUT, because it is sent to the internal I/O ports. Also, writing the wrong values to the internal I/O ports may crash your system. By the way, the DMA on this processor looks real cool. It can also perform DMA from memory to I/O and vice versa. It could be used for example to upload samples to the MoonSound or Music Module. I'm waiting Ademir's answer. I talk to him by phone and he liked a lot of the 20MIPS at 20Mhz idea... (-; Note that 20MIPS is the best case: it will only be reached if you use only 1-byte instructions. But even with longer instructions this processor is likely to be quite fast. Bye, Maarten MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: two liners art gallery
On Tue, 25 Apr 2000, Siebe Berveling wrote: Now you may ask me why I delayed for so long the release of the new version... The answer is that the current version didn't work in BrMSX until the new release 2.5 ;-) Maybe you should have tried a REAL MSX some time earlier ... Hint, hint, hint. They do also exist . I've got a VG8235 for sale, interested?? ;-) No, thanks, I already have a Turbo-R GT and a MSX2+ 7MHz (and plus 3 msx1, a commodore 64, an appleII and a spectrum :) I actually developed this new version in the turbo-r ! I just delayed the release so people couldn't say my emulator is bad because it doesn't run my own programs ;-) Ricardo Bittencourt http://www.lsi.usp.br/~ricardo [EMAIL PROTECTED] "Ricardo is subtle, but malicious he is not" -- Uniao contra o forward - crie suas proprias piadas -- MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Wed, 26 Apr 2000 02:30:13 +, Maarten ter Huurne wrote: There is no problem, I think. MSX standard is about IM1, right? I'm not sure what the standard says. But there are IM2 program on MSX. The question is how many and whether they can be modified to use IM1 instead. Hummm... What is the way IM2 works? IM1 I know perfectly well, but I don't know a lot about IM2. The information I have here is: When Z80 is interrupted on mode 2, the external device must provide a one byte data, which is placed with the value on register I, composing a 16 bit number (the I register will be placed as the most significant byte) which must points to a position in the address table (h, 0008h, 0010h, 0018h, 0020h, 0028h, 0030h, 0038h). The byte pointed and the following are placed on PC. The Z80 will execute them the routine pointed by PC. There is any external device to provide such "initial" byte? Yes, but Z180 has trap... the AB180 has trap feature? It has. But a trap only works if the opcode is unused. So if they made a new instruction with that same opcode, trap won't work. There is a complete instruction map in the PDF file on their site, so someone could check whether the opcodes are free or not. I think Ademir will do this... (-: I'll check with him later, or even check the PDF if I have some time (which will be a little difficult... :-) That's not what I'm worried about. The problem is, if you do an "OUT (#20),A" and the upper bits are zero, the hardware outside of the processor will never see the OUT, because it is sent to the internal I/O ports. Also, writing the wrong values to the internal I/O ports may crash your system. Well, one solution is: map all ports on something like: FFxxh... all hardware will be seen as there. And a hardware always sets the upper byte as FFh. I'm waiting Ademir's answer. I talk to him by phone and he liked a lot of the 20MIPS at 20Mhz idea... (-; Note that 20MIPS is the best case: it will only be reached if you use only 1-byte instructions. But even with longer instructions this processor is likely to be quite fast. It's almost RISC... /-: I thought it was RISC... But it's an impressive mark, since on Z180 12MIPS is the best case... and for Z380, 10.5MIPS is also on the best case. AbraçOS/2, Daniel Caetano ([EMAIL PROTECTED]) ...!m.tag OS/2 Sites: http://www.quasarbbs.com/daniel/ http://www.geocities.com/SiliconValley/8752/os2hp/os2index.html MSX Sites: http://www.fudeba.cjb.net/ Drawings: http://www.djgallery.tsx.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Wed, 26 Apr 2000, Daniel Jorge Caetano wrote: I'm not sure what the standard says. But there are IM2 program on MSX. The question is how many and whether they can be modified to use IM1 instead. Hummm... What is the way IM2 works? IM1 I know perfectly well, but I don't know a lot about IM2. The information I have here is: When Z80 is interrupted on mode 2, the external device must provide a one byte data, which is placed with the value on register I, composing a 16 bit number (the I register will be placed as the most significant byte) which must points to a position in the address table (h, 0008h, 0010h, 0018h, 0020h, 0028h, 0030h, 0038h). The byte pointed and the following are placed on PC. The Z80 will execute them the routine pointed by PC. There is any external device to provide such "initial" byte? No, not on MSX. On most MSX machines the value "from the device" is #FF. But there have been cases reported of other values. The only safe way is to make code that works with any value (this is possible and has been discussed here before). Anyway, this new processor will always call #0038, even if the program requested IM2. It is very unlikely that that will work, since a programmer wouldn't go through the trouble of setting up IM2 if he want #0038 to be called. The problem is, if you do an "OUT (#20),A" and the upper bits are zero, the hardware outside of the processor will never see the OUT, because it is sent to the internal I/O ports. Also, writing the wrong values to the internal I/O ports may crash your system. Well, one solution is: map all ports on something like: FFxxh... all hardware will be seen as there. And a hardware always sets the upper byte as FFh. That still doesn't solve it. Example: LD BC,#2310 OUT (C),A This will send A to I/O port #10 (high byte #23 ignored) LD BC,#0010 OUT (C),A This will send A to internal I/O port #10 (high byte is zero). So the processor internal I/O port is written, not the MSX I/O port. I'm waiting Ademir's answer. I talk to him by phone and he liked a lot of the 20MIPS at 20Mhz idea... (-; Note that 20MIPS is the best case: it will only be reached if you use only 1-byte instructions. But even with longer instructions this processor is likely to be quite fast. It's almost RISC... /-: I thought it was RISC... But it's an impressive mark, since on Z180 12MIPS is the best case... and for Z380, 10.5MIPS is also on the best case. RISC is a kind of instruction set. Anything Z80 compatible can never be RISC. Bye, Maarten MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: two liners art gallery
On Tue, 25 Apr 2000, Laurens Holst wrote: about nemesis dawn By the way, I don't think more than 8 colors are being used... couldn't this be made for screen 5 (or screen 7)??? I guess it then won't fit in 2 lines anymore though... Nope. All 32 shades of gray are used, plus dithering. Anyway, MSX2 you want, MSX2 you have. Go to: http://www.lsi.usp.br/~ricardo/msx/twoliner And the sprite definition in RBRACE.BAS is quite tricky... I had to do three pokes _inside_ the Basic program to get the stuff right. VERY addicting game though... Do not make copy+paste from the page. By downloading from the links, you get the programs already tokenized, and there's no need to poke anything. Ricardo Bittencourt http://www.lsi.usp.br/~ricardo [EMAIL PROTECTED] "Ricardo is subtle, but malicious he is not" -- Uniao contra o forward - crie suas proprias piadas -- MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Wed, 26 Apr 2000 03:55:22 +, Maarten ter Huurne wrote: There is any external device to provide such "initial" byte? No, not on MSX. On most MSX machines the value "from the device" is #FF. But there have been cases reported of other values. The only safe way is to make code that works with any value (this is possible and has been discussed here before). Anyway, this new processor will always call #0038, even if the program requested IM2. It is very unlikely that that will work, since a programmer wouldn't go through the trouble of setting up IM2 if he want #0038 to be called. I think there is a workaround. It has both interruptions like IM1 and IM2, but are not modes. Once MSX has only one IRQ pin, you have to switch modes. On AB180 you have 3 IRQ pins (note, I'm not talking about NMI). The workaround is place a circuit before the processor to intercept IM1,IM2 instructions and change where the IRQ goes, to pin IRQ0 (IM1) or IRQ1/2 (IM2). That still doesn't solve it. Example: LD BC,#2310 OUT (C),A This will send A to I/O port #10 (high byte #23 ignored) LD BC,#0010 OUT (C),A This will send A to internal I/O port #10 (high byte is zero). So the processor internal I/O port is written, not the MSX I/O port. I see. Well, anyway, I'd talked to Ademir and he said this works on the same way as Z180, and is possible to avoid it, because the internal registers ports can be shifted... RISC is a kind of instruction set. Anything Z80 compatible can never be RISC. R800 is. (-; Or, at least, It's written on MSX Turbo R box! AbraçOS/2, Daniel Caetano ([EMAIL PROTECTED]) ...!m.tag OS/2 Sites: http://www.quasarbbs.com/daniel/ http://www.geocities.com/SiliconValley/8752/os2hp/os2index.html MSX Sites: http://www.fudeba.cjb.net/ Drawings: http://www.djgallery.tsx.org/ MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
Grauw wrote: * 1MB memory, 64k I/O Same on Z180. The Z80 already had 64k I/O, when using OUT (C),r or IN A,(n). ?? Z80 has 256 I/O addresses, not 64k! It only uses the lower byte of the address lines to address I/O ports. I don't know about Z180, but my guess is that that processor uses 16-bits I/O adressing space (equals 64k) So that's nothing new either. And it's certainly not useful, because to remain compatible with the architecture of the MSX, we can only use 265 of the existing 64k I/O ports. YM: 256, not 265, i guess ;-) Eric MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
Re: AB180-20 Z80,Z180 compatible microprocessor
On Tue, 25 Apr 2000, [EMAIL PROTECTED] wrote: Grauw wrote: * 1MB memory, 64k I/O Same on Z180. The Z80 already had 64k I/O, when using OUT (C),r or IN A,(n). ?? Z80 has 256 I/O addresses, not 64k! It only uses the lower byte of the address lines to address I/O ports. I don't know about Z180, but my guess is that that processor uses 16-bits I/O adressing space (equals 64k) I heard that Z80 actually publishes BC on the bus when doing "OUT (C),r", but that the MSX only uses the lower 8 bits. I'm not sure though. Bye, Maarten MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED] and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in the body (not the subject) of the message. Problems? contact [EMAIL PROTECTED] More information on MSX can be found in the following places: The MSX faq: http://www.faq.msxnet.org/ The MSX newsgroup: comp.sys.msx The MSX IRC channel: #MSX on Undernet
