Re: [OpenWrt-Devel] [PATCH] b53: fix overriding port 8 state (if it is connected to CPU)
On 18 March 2015 at 11:28, Jonas Gorski j...@openwrt.org wrote:
On Wed, Mar 18, 2015 at 10:02 AM, Rafał Miłecki zaj...@gmail.com wrote:
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
.../generic/files/drivers/net/phy/b53/b53_common.c | 23
+-
.../generic/files/drivers/net/phy/b53/b53_regs.h | 1 +
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
index e44d194..4597742 100644
--- a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
+++ b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
@@ -525,7 +525,7 @@ static int b53_switch_reset(struct b53_device *dev)
return -EINVAL;
}
}
- } else if ((is531x5(dev) || is5301x(dev)) dev-sw_dev.cpu_port ==
B53_CPU_PORT) {
+ } else if (is531x5(dev) dev-sw_dev.cpu_port == B53_CPU_PORT) {
u8 mii_port_override;
b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
@@ -533,6 +533,27 @@ static int b53_switch_reset(struct b53_device *dev)
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
mii_port_override | PORT_OVERRIDE_EN |
PORT_OVERRIDE_LINK);
+ } else if (is5301x(dev)) {
+ /*
+* CPU interface attached to port 8 requires specific
handling.
+* It uses different overriding register and extra ports 5
and 7
+* need to be configured as well.
+*/
+ if (dev-sw_dev.cpu_port == 8) {
+ u8 mii_port_override;
+
+ b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
+ mii_port_override);
+ mii_port_override |= PORT_OVERRIDE_LINK |
+PORT_OVERRIDE_RX_FLOW |
+PORT_OVERRIDE_TX_FLOW |
+PORT_OVERRIDE_SPEED_2000M |
+PORT_OVERRIDE_EN;
+ b53_write8(dev, B53_CTRL_PAGE,
B53_PORT_OVERRIDE_CTRL,
+ mii_port_override);
+ } else {
+ pr_warn(overriding CPU port other than 8 is not
supported yet\n);
+ }
}
b53_enable_mib(dev);
How about
@@ -530,9 +530,16 @@ static int b53_switch_reset(struct b53_device *dev)
b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
mii_port_override);
+
+ mii_port_override |= PORT_OVERRIDE_LINK | PORT_OVERRIDE_EN;
+
+ if (is5301x(dev))
+ mii_port_override |= PORT_OVERRIDE_RX_FLOW |
+PORT_OVERRIDE_TX_FLOW |
+PORT_OVERRIDE_SPEED_2000M;
+
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
- mii_port_override | PORT_OVERRIDE_EN |
- PORT_OVERRIDE_LINK);
+ mii_port_override);
}
b53_enable_mib(dev);
instead of creating a full new branch?
As the comment says, this code for BCM5301X will be extended. This is
because of this 2000M speed, which requires configuring 3 ports. It
seems communication between switch and CPU interface with such speed
couldn't be handled with only a single port. Broadcom decided to use 3
ports in total for that.
I don't have that code ready and I also don't like patch bombs, so I
started with this simple change. However because of further
development plans I vote for a separated branch.
--
Rafał
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Re: [OpenWrt-Devel] [PATCH] b53: reverse duplex bit meaning for IMP state override register
On Wed, Mar 18, 2015 at 8:52 AM, Alexandru Ardelean ardeleana...@gmail.com wrote: On Wed, Mar 18, 2015 at 9:18 AM, Rafał Miłecki zaj...@gmail.com wrote: Signed-off-by: Rafał Miłecki zaj...@gmail.com --- When reading bcmrobo.c code for BCM5301X I've noticed that it uses REG_CTRL_MIIPO (0x0e) with a following comment: /* default(1 1) DUPLX_MODE: * Full Duplex */ So I guess our bit definition may be reversed. Can someone verify this? --- target/linux/generic/files/drivers/net/phy/b53/b53_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index ba50915..4899cc4 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -75,7 +75,7 @@ /* IMP Port state override register (8 bit) */ #define B53_PORT_OVERRIDE_CTRL 0x0e #define PORT_OVERRIDE_LINK BIT(0) -#define PORT_OVERRIDE_HALF_DUPLEXBIT(1) /* 0 = Full Duplex */ +#define PORT_OVERRIDE_FULL_DUPLEXBIT(1) /* 0 = Half Duplex */ #define PORT_OVERRIDE_SPEED_S2 #define PORT_OVERRIDE_SPEED_10M (0 PORT_OVERRIDE_SPEED_S) #define PORT_OVERRIDE_SPEED_100M (1 PORT_OVERRIDE_SPEED_S) -- I can validate that this fix is correct on my BCM53128. Yeah, I can too, whatever I was drinking at this time %) Jonas. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] b53: fix overriding port 8 state (if it is connected to CPU)
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
.../generic/files/drivers/net/phy/b53/b53_common.c | 23 +-
.../generic/files/drivers/net/phy/b53/b53_regs.h | 1 +
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
index e44d194..4597742 100644
--- a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
+++ b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
@@ -525,7 +525,7 @@ static int b53_switch_reset(struct b53_device *dev)
return -EINVAL;
}
}
- } else if ((is531x5(dev) || is5301x(dev)) dev-sw_dev.cpu_port ==
B53_CPU_PORT) {
+ } else if (is531x5(dev) dev-sw_dev.cpu_port == B53_CPU_PORT) {
u8 mii_port_override;
b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
@@ -533,6 +533,27 @@ static int b53_switch_reset(struct b53_device *dev)
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
mii_port_override | PORT_OVERRIDE_EN |
PORT_OVERRIDE_LINK);
+ } else if (is5301x(dev)) {
+ /*
+* CPU interface attached to port 8 requires specific handling.
+* It uses different overriding register and extra ports 5 and 7
+* need to be configured as well.
+*/
+ if (dev-sw_dev.cpu_port == 8) {
+ u8 mii_port_override;
+
+ b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
+ mii_port_override);
+ mii_port_override |= PORT_OVERRIDE_LINK |
+PORT_OVERRIDE_RX_FLOW |
+PORT_OVERRIDE_TX_FLOW |
+PORT_OVERRIDE_SPEED_2000M |
+PORT_OVERRIDE_EN;
+ b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
+ mii_port_override);
+ } else {
+ pr_warn(overriding CPU port other than 8 is not
supported yet\n);
+ }
}
b53_enable_mib(dev);
diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h
b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h
index 6d71493..129946d 100644
--- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h
+++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h
@@ -86,6 +86,7 @@
#define PORT_OVERRIDE_RV_MII_25 BIT(4) /* BCM5325 only */
#define PORT_OVERRIDE_RX_FLOWBIT(4)
#define PORT_OVERRIDE_TX_FLOWBIT(5)
+#define PORT_OVERRIDE_SPEED_2000MBIT(6) /* BCM5301X only, requires
setting 1000M */
#define PORT_OVERRIDE_EN BIT(7) /* Use the register contents */
/* Power-down mode control */
--
1.8.4.5
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Re: [OpenWrt-Devel] [PATCH] b53: fix overriding port 8 state (if it is connected to CPU)
On Wed, Mar 18, 2015 at 10:02 AM, Rafał Miłecki zaj...@gmail.com wrote:
Signed-off-by: Rafał Miłecki zaj...@gmail.com
---
.../generic/files/drivers/net/phy/b53/b53_common.c | 23
+-
.../generic/files/drivers/net/phy/b53/b53_regs.h | 1 +
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
index e44d194..4597742 100644
--- a/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
+++ b/target/linux/generic/files/drivers/net/phy/b53/b53_common.c
@@ -525,7 +525,7 @@ static int b53_switch_reset(struct b53_device *dev)
return -EINVAL;
}
}
- } else if ((is531x5(dev) || is5301x(dev)) dev-sw_dev.cpu_port ==
B53_CPU_PORT) {
+ } else if (is531x5(dev) dev-sw_dev.cpu_port == B53_CPU_PORT) {
u8 mii_port_override;
b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
@@ -533,6 +533,27 @@ static int b53_switch_reset(struct b53_device *dev)
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
mii_port_override | PORT_OVERRIDE_EN |
PORT_OVERRIDE_LINK);
+ } else if (is5301x(dev)) {
+ /*
+* CPU interface attached to port 8 requires specific
handling.
+* It uses different overriding register and extra ports 5
and 7
+* need to be configured as well.
+*/
+ if (dev-sw_dev.cpu_port == 8) {
+ u8 mii_port_override;
+
+ b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
+ mii_port_override);
+ mii_port_override |= PORT_OVERRIDE_LINK |
+PORT_OVERRIDE_RX_FLOW |
+PORT_OVERRIDE_TX_FLOW |
+PORT_OVERRIDE_SPEED_2000M |
+PORT_OVERRIDE_EN;
+ b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
+ mii_port_override);
+ } else {
+ pr_warn(overriding CPU port other than 8 is not
supported yet\n);
+ }
}
b53_enable_mib(dev);
How about
@@ -530,9 +530,16 @@ static int b53_switch_reset(struct b53_device *dev)
b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
mii_port_override);
+
+ mii_port_override |= PORT_OVERRIDE_LINK | PORT_OVERRIDE_EN;
+
+ if (is5301x(dev))
+ mii_port_override |= PORT_OVERRIDE_RX_FLOW |
+PORT_OVERRIDE_TX_FLOW |
+PORT_OVERRIDE_SPEED_2000M;
+
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
- mii_port_override | PORT_OVERRIDE_EN |
- PORT_OVERRIDE_LINK);
+ mii_port_override);
}
b53_enable_mib(dev);
instead of creating a full new branch?
Jonas
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Re: [OpenWrt-Devel] [PATCH] b53: define registers available and needed on BCM5301X
On Wed, Mar 18, 2015 at 8:50 AM, Rafał Miłecki zaj...@gmail.com wrote: Signed-off-by: Rafał Miłecki zaj...@gmail.com --- .../generic/files/drivers/net/phy/b53/b53_regs.h | 26 ++ 1 file changed, 26 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index 4899cc4..6d71493 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -50,6 +50,9 @@ /* Jumbo Frame Registers */ #define B53_JUMBO_PAGE 0x40 +/* CFP Configuration Registers Page */ +#define B53_CFP_PAGE 0xa1 + /* * Control Page registers */ @@ -99,6 +102,20 @@ #define B53_MC_FLOOD_MASK 0x34 #define B53_IPMC_FLOOD_MASK0x36 +/* On BCM5301X we can override ports 0-5 and 7 as well */ +/* For port 8 still use B53_PORT_OVERRIDE_CTRL */ +#define B53_GMII_PORT_OVERRIDE_CTRL(i) (0x58 + i) These are also present on BCM63XX integrated switch chips as well as 531XX switch chips, so probably common to all devices with xMII interfaces on ports 0~7. Please always include the register width in the comment. There's also a second set of registers at 0x60~0x67 for setting up RGMII timing, but might be not needed for 5301X. +#define GMII_PORT_OVERRIDE_LINK BIT(0) +#define GMII_PORT_OVERRIDE_FULL_DUPLEX BIT(1) /* 0 = Half Duplex */ +#define GMII_PORT_OVERRIDE_SPEED_S 2 +#define GMII_PORT_OVERRIDE_SPEED_10M (0 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_100M(1 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_1000M (2 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_RX_FLOW BIT(4) +#define GMII_PORT_OVERRIDE_TX_FLOW BIT(5) +#define GMII_PORT_OVERRIDE_ENBIT(6) /* Use the register contents */ +#define GMII_PORT_OVERRIDE_SPEED_2000M BIT(7) /* Requires setting 1000M */ If space allows, maybe add BCM5301X only or so. + /* Software reset register (8 bit) */ #define B53_SOFTRESET 0x79 @@ -156,6 +173,9 @@ #define GC_FRM_MGMT_PORT_04 0x00 #define GC_FRM_MGMT_PORT_MII 0x80 +#define B53_BRCM_HDR 0x03 +#define BRCM_HDR_EN BIT(0) + /* Device ID register (8 or 32 bit) */ #define B53_DEVICE_ID 0x30 @@ -310,4 +330,10 @@ #define JMS_MIN_SIZE 1518 #define JMS_MAX_SIZE 9724 +/* + * CFP Configuration Page Registers + */ + +#define B53_CFP_CTRL 0x00 Please add info about the register width, so it's easier to verify accesses use the correct read/write function. + #endif /* !__B53_REGS_H */ -- 1.8.4.5 Jonas ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] octeon: Add MMC support for EdgeRouter ER8
This adds in-kernel support for the octeon mmc controller so that Ubiquiti ER8 are now bootable from their internal storage. Aimed at the BB branch but should work on trunk as well. Pay attention to the change in default value for bb_size in octeon_mmc.c, default was too large (256KB) and caused devm_kzalloc() to fail. Otherwise, those are all patches released by Cavium themselves and adapted to BB. diff --git a/target/linux/octeon/config-default b/target/linux/octeon/config-default index f83daac..f6c0e27 100644 --- a/target/linux/octeon/config-default +++ b/target/linux/octeon/config-default @@ -139,6 +139,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT=7 # CONFIG_MIPS_MACHINE is not set CONFIG_MIPS_MT_DISABLED=y CONFIG_MIPS_PGD_C0_CONTEXT=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_OCTEON=y +# CONFIG_MMC_TIFM_SD is not set CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULES_USE_ELF_RELA=y # CONFIG_MTD_CFI_INTELEXT is not set diff --git a/target/linux/octeon/patches-3.10/0012-MIPS-octeon-add-semaphore-to-serialize-bootbus-access.patch b/target/linux/octeon/patches-3.10/0012-MIPS-octeon-add-semaphore-to-serialize-bootbus-access.patch new file mode 100644 index 000..6650c5b --- /dev/null +++ b/target/linux/octeon/patches-3.10/0012-MIPS-octeon-add-semaphore-to-serialize-bootbus-access.patch @@ -0,0 +1,25 @@ +diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c +index a42110e..01130e9 100644 +--- a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c +@@ -51,6 +51,9 @@ extern void pci_console_init(const char *arg); + + static unsigned long long MAX_MEMORY = 512ull 20; + ++DEFINE_SEMAPHORE(octeon_bootbus_sem); ++EXPORT_SYMBOL(octeon_bootbus_sem); ++ + struct octeon_boot_descriptor *octeon_boot_desc_ptr; + + struct cvmx_bootinfo *octeon_bootinfo; +diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h +index 0415965..de9f74e 100644 +--- a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h +@@ -335,4 +335,6 @@ void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t); + + extern void octeon_fixup_irqs(void); + ++extern struct semaphore octeon_bootbus_sem; ++ + #endif /* __ASM_OCTEON_OCTEON_H */ diff --git a/target/linux/octeon/patches-3.10/0013-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch b/target/linux/octeon/patches-3.10/0013-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch new file mode 100644 index 000..c4d7347 --- /dev/null +++ b/target/linux/octeon/patches-3.10/0013-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch @@ -0,0 +1,105 @@ +diff --git a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h +index e2c122c..35d7cbd 100644 +--- a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h +@@ -45,6 +45,7 @@ + */ + + #define OCTEON_FAMILY_MASK 0x0000 ++#define OCTEON_PRID_MASK 0x00ff + + /* Flag bits in top byte */ + /* Ignores revision in model checks */ +@@ -63,6 +64,46 @@ + #define OM_MATCH_6XXX_FAMILY_MODELS 0x4000 + /* Match all cnf7XXX Octeon models. */ + #define OM_MATCH_F7XXX_FAMILY_MODELS 0x8000 ++/* Match all cn7XXX Octeon models. */ ++#define OM_MATCH_7XXX_FAMILY_MODELS 0x1000 ++#define OM_MATCH_FAMILY_MODELS (OM_MATCH_5XXX_FAMILY_MODELS | \ ++ OM_MATCH_6XXX_FAMILY_MODELS | \ ++ OM_MATCH_F7XXX_FAMILY_MODELS | \ ++ OM_MATCH_7XXX_FAMILY_MODELS) ++/* ++ * CN7XXX models with new revision encoding ++ */ ++ ++#define OCTEON_CN73XX_PASS1_0 0x000d9700 ++#define OCTEON_CN73XX (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION) ++#define OCTEON_CN73XX_PASS1_X (OCTEON_CN73XX_PASS1_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++ ++#define OCTEON_CN70XX_PASS1_0 0x000d9600 ++#define OCTEON_CN70XX_PASS1_1 0x000d9601 ++#define OCTEON_CN70XX_PASS1_2 0x000d9602 ++ ++#define OCTEON_CN70XX_PASS2_0 0x000d9608 ++ ++#define OCTEON_CN70XX (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION) ++#define OCTEON_CN70XX_PASS1_X (OCTEON_CN70XX_PASS1_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++#define OCTEON_CN70XX_PASS2_X (OCTEON_CN70XX_PASS2_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++ ++#define OCTEON_CN71XX OCTEON_CN70XX ++ ++#define OCTEON_CN78XX_PASS1_0 0x000d9500 ++#define OCTEON_CN78XX_PASS1_1 0x000d9501 ++#define OCTEON_CN78XX_PASS2_0 0x000d9508 ++ ++#define OCTEON_CN78XX (OCTEON_CN78XX_PASS1_0 | OM_IGNORE_REVISION) ++#define OCTEON_CN78XX_PASS1_X (OCTEON_CN78XX_PASS1_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++#define OCTEON_CN78XX_PASS2_X (OCTEON_CN78XX_PASS2_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++ ++#define OCTEON_CN76XX (0x000d9540 | OM_CHECK_SUBMODEL) + + /* + * CNF7XXX models with new revision encoding +@@ -217,6 +258,10 @@ + #define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION) + #define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS) + #define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
Re: [OpenWrt-Devel] [PATCH] octeon: Add MMC support for EdgeRouter ER8
On 18/03/2015 14:50, Jonathan Thibault wrote: This adds in-kernel support for the octeon mmc controller so that Ubiquiti ER8 are now bootable from their internal storage. Aimed at the BB branch but should work on trunk as well. Pay attention to the change in default value for bb_size in octeon_mmc.c, default was too large (256KB) and caused devm_kzalloc() to fail. Otherwise, those are all patches released by Cavium themselves and adapted to BB. Hi Jonathan, nice one, i saw the patch on the lmo mailing list and had this on my todo list for the next days, will give it a shot later on my ER8. do you fancy also sending a version that we can apply to trunk ? John ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Question regarding UCI with IPv4 and IPv6 on lan-bridge
Thanks Steven! It's working. Do you or should I add some text in the wiki? I think this @ notation is not present on http://wiki.openwrt.org/doc/uci/network. Best Christian Am 18.03.2015 um 16:11 schrieb Steven Barth: Try config interface 'lan' option type 'bridge' option ifname 'eth0.1 bat0' option proto 'dhcp' config interface lan6 option ifname @lan option proto dhcpv6 #option reqprefix no (uncomment if you don't need an IPv6 delegated prefix) Cheers, Steven ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] Question regarding UCI with IPv4 and IPv6 on lan-bridge
Hi, I want to use a router as a client in my dual stack lan. I'm using ICMP router announcements. Additionally I want to use mesh at the same time, so I'm using a bridge on the lan interface. Is there any way to express that I want dynamic IPv4 and IPv6 on a bridge? ## config interface 'lan' option type 'bridge' option ifname 'eth0.1 bat0' option proto 'dhcp' IPv4 assigned no IPv6 assigned ## config interface 'lan' option type 'bridge' option ifname 'eth0.1 bat0' option proto 'dhcpv6' no IPv4 assigned IPv6 assigned. ## config interface 'lan' option type 'bridge' option ifname 'eth0.1 bat0' option proto 'dhcp' config interface 'wan6' option ifname 'eth0.1' option proto 'dhcpv6' the bridge has IPv4 assigned but no IPv6 eth0.1 has no IP at all ## Best Christian ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Question regarding UCI with IPv4 and IPv6 on lan-bridge
Try config interface 'lan' option type 'bridge' option ifname 'eth0.1 bat0' option proto 'dhcp' config interface lan6 option ifname @lan option proto dhcpv6 # option reqprefix no (uncomment if you don't need an IPv6 delegated prefix) Cheers, Steven ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] procd: check for empty parameters in askfirst
Signed-off-by: Zefir Kurtisi zefir.kurt...@neratec.com
---
utils/askfirst.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/utils/askfirst.c b/utils/askfirst.c
index e78823c..2aadd1a 100644
--- a/utils/askfirst.c
+++ b/utils/askfirst.c
@@ -31,6 +31,11 @@ int main(int argc, char **argv)
}
while (c != 0xA);
+ if (argc 2) {
+ printf(Failure: %s without parameters\n, argv[0]);
+ return -1;
+ }
+
execvp(argv[1], argv[1]);
printf(Failed to execute %s\n, argv[0]);
--
1.9.1
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[OpenWrt-Devel] [PATCH] netifd:Make sure interface device config is also cached
Fixes issue interface device config is not applied in some cases.
As the interface device config was applied but not always cached;
an interface device config diff was not always detected.
Simplify device config setting by exposing as api only device_apply_config
Signed-off-by: Hans Dedecker dedec...@gmail.com
---
config.c| 2 +-
device.c| 2 +-
device.h| 3 ---
interface.c | 6 +++---
tunnel.c| 2 +-
5 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/config.c b/config.c
index b0607dd..132ec43 100644
--- a/config.c
+++ b/config.c
@@ -137,7 +137,7 @@ config_parse_interface(struct uci_section *s, bool alias)
return;
if (iface-device_config || dev-settings.flags)
- device_set_config(dev, dev-type, b.head);
+ device_apply_config(dev, dev-type, b.head);
return;
error_free_config:
free(config);
diff --git a/device.c b/device.c
index 556d9fc..2706473 100644
--- a/device.c
+++ b/device.c
@@ -596,7 +596,7 @@ device_init_pending(void)
}
}
-enum dev_change_type
+static enum dev_change_type
device_set_config(struct device *dev, const struct device_type *type,
struct blob_attr *attr)
{
diff --git a/device.h b/device.h
index 6418f16..cddb340 100644
--- a/device.h
+++ b/device.h
@@ -194,9 +194,6 @@ void device_init_settings(struct device *dev, struct
blob_attr **tb);
void device_init_pending(void);
enum dev_change_type
-device_set_config(struct device *dev, const struct device_type *type,
- struct blob_attr *attr);
-enum dev_change_type
device_apply_config(struct device *dev, const struct device_type *type,
struct blob_attr *config);
diff --git a/interface.c b/interface.c
index 72599e6..444f3ac 100644
--- a/interface.c
+++ b/interface.c
@@ -918,11 +918,11 @@ interface_handle_link(struct interface *iface, const char
*name, bool add, bool
}
if (add) {
- device_set_present(dev, true);
if (iface-device_config dev-default_config)
- device_set_config(dev, dev-type, iface-config);
+ device_apply_config(dev, dev-type, iface-config);
+
+ device_set_present(dev, true);
- system_if_apply_settings(dev, dev-settings,
dev-settings.flags);
ret = interface_add_link(iface, dev, link_ext);
} else {
ret = interface_remove_link(iface, dev);
diff --git a/tunnel.c b/tunnel.c
index cdb83f0..aa670a3 100644
--- a/tunnel.c
+++ b/tunnel.c
@@ -72,7 +72,7 @@ tunnel_create(const char *name, struct blob_attr *attr)
device_init(dev, tunnel_device_type, name);
tun-set_state = dev-set_state;
dev-set_state = tunnel_set_state;
- device_set_config(dev, tunnel_device_type, attr);
+ device_apply_config(dev, tunnel_device_type, attr);
device_set_present(dev, true);
return dev;
--
1.9.1
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Re: [OpenWrt-Devel] [PATCH] ar71xx: add support for the UniFi AP Outdoor Plus
On Dienstag, 17. März 2015 23:24:26 Sergey Ryazanov wrote: Interesting enough: When stopping all wifi related software on the device and creating a monitor interface, the RF filter seems to follow iwconfig channel commands (yes it is the madwifi driver). How do you realized that RF filter follows iwconfig channel command? When I create a monitor interface and change from channel 1 to 13; tcpdump really sees channel 13 traffic. When I change back, tcpdump sees traffic from channel 1 again. If the filter had not followed, I would have expected the device to be as deaf as with current OpenWRT. Another interesting effect is that the access point is totally non responsable for 0.2 seconds after a channel change. This effect multiplies if you create a STA interface and do an iwlist scan. Ping replies get delayed for seconds while the wifi is scanning and massively changing channels during the process. I cannot remember this effect when I used madwifi the last time ages ago. May be this is the RF filter code busy waiting somewhere in ath_set_channel() or below. Let's see if it can be found. Stefan ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH V2] b53: define registers available and needed on BCM5301X
They are also present on some BCM63xx switches. Signed-off-by: Rafał Miłecki zaj...@gmail.com --- .../generic/files/drivers/net/phy/b53/b53_regs.h | 27 ++ 1 file changed, 27 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index 4899cc4..a393cfa 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -50,6 +50,9 @@ /* Jumbo Frame Registers */ #define B53_JUMBO_PAGE 0x40 +/* CFP Configuration Registers Page */ +#define B53_CFP_PAGE 0xa1 + /* * Control Page registers */ @@ -99,6 +102,20 @@ #define B53_MC_FLOOD_MASK 0x34 #define B53_IPMC_FLOOD_MASK0x36 +/* Overriding ports 0-5 and 7 on devices with xMII interfaces (8 bit) */ +/* For port 8 still use B53_PORT_OVERRIDE_CTRL */ +#define B53_GMII_PORT_OVERRIDE_CTRL(i) (0x58 + i) +#define GMII_PORT_OVERRIDE_LINK BIT(0) +#define GMII_PORT_OVERRIDE_FULL_DUPLEX BIT(1) /* 0 = Half Duplex */ +#define GMII_PORT_OVERRIDE_SPEED_S 2 +#define GMII_PORT_OVERRIDE_SPEED_10M (0 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_100M(1 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_1000M (2 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_RX_FLOW BIT(4) +#define GMII_PORT_OVERRIDE_TX_FLOW BIT(5) +#define GMII_PORT_OVERRIDE_ENBIT(6) /* Use the register contents */ +#define GMII_PORT_OVERRIDE_SPEED_2000M BIT(7) /* BCM5301X only, requires setting 1000M */ + /* Software reset register (8 bit) */ #define B53_SOFTRESET 0x79 @@ -156,6 +173,9 @@ #define GC_FRM_MGMT_PORT_04 0x00 #define GC_FRM_MGMT_PORT_MII 0x80 +#define B53_BRCM_HDR 0x03 +#define BRCM_HDR_EN BIT(0) + /* Device ID register (8 or 32 bit) */ #define B53_DEVICE_ID 0x30 @@ -310,4 +330,11 @@ #define JMS_MIN_SIZE 1518 #define JMS_MAX_SIZE 9724 +/* + * CFP Configuration Page Registers + */ + +/* CFP Control Register with ports map (8 bit) */ +#define B53_CFP_CTRL 0x00 + #endif /* !__B53_REGS_H */ -- 1.8.4.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] b53: reverse duplex bit meaning for IMP state override register
Signed-off-by: Rafał Miłecki zaj...@gmail.com --- When reading bcmrobo.c code for BCM5301X I've noticed that it uses REG_CTRL_MIIPO (0x0e) with a following comment: /* default(1 1) DUPLX_MODE: * Full Duplex */ So I guess our bit definition may be reversed. Can someone verify this? --- target/linux/generic/files/drivers/net/phy/b53/b53_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index ba50915..4899cc4 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -75,7 +75,7 @@ /* IMP Port state override register (8 bit) */ #define B53_PORT_OVERRIDE_CTRL 0x0e #define PORT_OVERRIDE_LINK BIT(0) -#define PORT_OVERRIDE_HALF_DUPLEXBIT(1) /* 0 = Full Duplex */ +#define PORT_OVERRIDE_FULL_DUPLEXBIT(1) /* 0 = Half Duplex */ #define PORT_OVERRIDE_SPEED_S2 #define PORT_OVERRIDE_SPEED_10M (0 PORT_OVERRIDE_SPEED_S) #define PORT_OVERRIDE_SPEED_100M (1 PORT_OVERRIDE_SPEED_S) -- 1.8.4.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] b53: define registers available and needed on BCM5301X
Signed-off-by: Rafał Miłecki zaj...@gmail.com --- .../generic/files/drivers/net/phy/b53/b53_regs.h | 26 ++ 1 file changed, 26 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index 4899cc4..6d71493 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -50,6 +50,9 @@ /* Jumbo Frame Registers */ #define B53_JUMBO_PAGE 0x40 +/* CFP Configuration Registers Page */ +#define B53_CFP_PAGE 0xa1 + /* * Control Page registers */ @@ -99,6 +102,20 @@ #define B53_MC_FLOOD_MASK 0x34 #define B53_IPMC_FLOOD_MASK0x36 +/* On BCM5301X we can override ports 0-5 and 7 as well */ +/* For port 8 still use B53_PORT_OVERRIDE_CTRL */ +#define B53_GMII_PORT_OVERRIDE_CTRL(i) (0x58 + i) +#define GMII_PORT_OVERRIDE_LINK BIT(0) +#define GMII_PORT_OVERRIDE_FULL_DUPLEX BIT(1) /* 0 = Half Duplex */ +#define GMII_PORT_OVERRIDE_SPEED_S 2 +#define GMII_PORT_OVERRIDE_SPEED_10M (0 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_100M(1 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_1000M (2 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_RX_FLOW BIT(4) +#define GMII_PORT_OVERRIDE_TX_FLOW BIT(5) +#define GMII_PORT_OVERRIDE_ENBIT(6) /* Use the register contents */ +#define GMII_PORT_OVERRIDE_SPEED_2000M BIT(7) /* Requires setting 1000M */ + /* Software reset register (8 bit) */ #define B53_SOFTRESET 0x79 @@ -156,6 +173,9 @@ #define GC_FRM_MGMT_PORT_04 0x00 #define GC_FRM_MGMT_PORT_MII 0x80 +#define B53_BRCM_HDR 0x03 +#define BRCM_HDR_EN BIT(0) + /* Device ID register (8 or 32 bit) */ #define B53_DEVICE_ID 0x30 @@ -310,4 +330,10 @@ #define JMS_MIN_SIZE 1518 #define JMS_MAX_SIZE 9724 +/* + * CFP Configuration Page Registers + */ + +#define B53_CFP_CTRL 0x00 + #endif /* !__B53_REGS_H */ -- 1.8.4.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] b53: reverse duplex bit meaning for IMP state override register
On Wed, Mar 18, 2015 at 9:18 AM, Rafał Miłecki zaj...@gmail.com wrote: Signed-off-by: Rafał Miłecki zaj...@gmail.com --- When reading bcmrobo.c code for BCM5301X I've noticed that it uses REG_CTRL_MIIPO (0x0e) with a following comment: /* default(1 1) DUPLX_MODE: * Full Duplex */ So I guess our bit definition may be reversed. Can someone verify this? --- target/linux/generic/files/drivers/net/phy/b53/b53_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index ba50915..4899cc4 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -75,7 +75,7 @@ /* IMP Port state override register (8 bit) */ #define B53_PORT_OVERRIDE_CTRL 0x0e #define PORT_OVERRIDE_LINK BIT(0) -#define PORT_OVERRIDE_HALF_DUPLEXBIT(1) /* 0 = Full Duplex */ +#define PORT_OVERRIDE_FULL_DUPLEXBIT(1) /* 0 = Half Duplex */ #define PORT_OVERRIDE_SPEED_S2 #define PORT_OVERRIDE_SPEED_10M (0 PORT_OVERRIDE_SPEED_S) #define PORT_OVERRIDE_SPEED_100M (1 PORT_OVERRIDE_SPEED_S) -- 1.8.4.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel I can validate that this fix is correct on my BCM53128. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] curl: fix PKG_CONFIG_DEPENDS
Signed-off-by: Matthias Schiffer mschif...@universe-factory.net --- package/network/utils/curl/Makefile | 66 ++--- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/package/network/utils/curl/Makefile b/package/network/utils/curl/Makefile index 6da3a66..7f6d355 100644 --- a/package/network/utils/curl/Makefile +++ b/package/network/utils/curl/Makefile @@ -29,42 +29,42 @@ PKG_BUILD_PARALLEL:=1 PKG_CONFIG_DEPENDS:= \ CONFIG_IPV6 \ \ - LIBCURL_AXTLS \ - LIBCURL_CYASSL \ - LIBCURL_GNUTLS \ - LIBCURL_OPENSSL \ - LIBCURL_POLARSSL \ - LIBCURL_NOSSL \ + CONFIG_LIBCURL_AXTLS \ + CONFIG_LIBCURL_CYASSL \ + CONFIG_LIBCURL_GNUTLS \ + CONFIG_LIBCURL_OPENSSL \ + CONFIG_LIBCURL_POLARSSL \ + CONFIG_LIBCURL_NOSSL \ \ - LIBCURL_LIBIDN \ - LIBCURL_SSH2 \ - LIBCURL_ZLIB \ + CONFIG_LIBCURL_LIBIDN \ + CONFIG_LIBCURL_SSH2 \ + CONFIG_LIBCURL_ZLIB \ \ - LIBCURL_DICT \ - LIBCURL_FILE \ - LIBCURL_FTP \ - LIBCURL_GOPHER \ - LIBCURL_HTTP \ - LIBCURL_IMAP \ - LIBCURL_LDAP \ - LIBCURL_LDAPS \ - LIBCURL_POP3 \ - LIBCURL_RTSP \ - LIBCURL_NO_RTSP \ - LIBCURL_SMB \ - LIBCURL_NO_SMB \ - LIBCURL_SMTP \ - LIBCURL_TELNET \ - LIBCURL_TFTP \ + CONFIG_LIBCURL_DICT \ + CONFIG_LIBCURL_FILE \ + CONFIG_LIBCURL_FTP \ + CONFIG_LIBCURL_GOPHER \ + CONFIG_LIBCURL_HTTP \ + CONFIG_LIBCURL_IMAP \ + CONFIG_LIBCURL_LDAP \ + CONFIG_LIBCURL_LDAPS \ + CONFIG_LIBCURL_POP3 \ + CONFIG_LIBCURL_RTSP \ + CONFIG_LIBCURL_NO_RTSP \ + CONFIG_LIBCURL_SMB \ + CONFIG_LIBCURL_NO_SMB \ + CONFIG_LIBCURL_SMTP \ + CONFIG_LIBCURL_TELNET \ + CONFIG_LIBCURL_TFTP \ \ - LIBCURL_COOKIES \ - LIBCURL_CRYPTO_AUTH \ - LIBCURL_LIBCURL_OPTION \ - LIBCURL_PROXY \ - LIBCURL_THREADED_RESOLVER \ - LIBCURL_TLS_SRP \ - LIBCURL_UNIX_SOCKETS \ - LIBCURL_VERBOSE \ + CONFIG_LIBCURL_COOKIES \ + CONFIG_LIBCURL_CRYPTO_AUTH \ + CONFIG_LIBCURL_LIBCURL_OPTION \ + CONFIG_LIBCURL_PROXY \ + CONFIG_LIBCURL_THREADED_RESOLVER \ + CONFIG_LIBCURL_TLS_SRP \ + CONFIG_LIBCURL_UNIX_SOCKETS \ + CONFIG_LIBCURL_VERBOSE include $(INCLUDE_DIR)/package.mk -- 2.3.3 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] [package] mwlwifi: generate TX_STATUS event on transmitting auth, associate, and reallocate responses
On Thu, 2015-03-19 at 12:05 +0800, Ian Kent wrote:
On Wed, 2015-03-18 at 21:40 -0600, Pat Fruth wrote:
This patch addresses an issue specific to Apple devices experiencing a
wireless disconnect when trying to associate with either 2.4Ghz or 5Ghz
wifi of a Linksys WRT1900AC router.
Apple devices (MacBooks running Mac OS X 10.10.x Yosemite in particular,
but there may be others), appear to re-auth/re-associate within
approximately 25 seconds of initially associating.
Evidence of this can be seen by the presence of an entry similar to the
following in the Apple system logs;
MM/DD/YY HH:MM:SS.sss AM kernel[0]: wl0: Roamed or switched channel,
reason #8, bssid xx:xx:xx:xx:xx:xx
The Marvell wifi driver doesn’t generate a NL80211_CMD_FRAME_TX_STATUS
event on transmitting a response to auth and/or reassociate requests.
Thus, the respective callback handler functions (in hostapd’s ieee802_11.c)
never get driven, ultimately leading to the problem.
The patch causes a TX_STATUS event to be generated for auth and reassociate
request’s responses, in addition to associate request’s responses.
Signed-off-by: Pat Fruth p...@patfruth.comt
---
.../mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch | 14
++
1 file changed, 14 insertions(+)
create mode 100644
package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
diff --git
a/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
b/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
new file mode 100644
index 000..5f0d7fb
--- /dev/null
+++ b/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
@@ -0,0 +1,14 @@
+--- a/mwl_tx.c
b/mwl_tx.c
+@@ -395,7 +395,10 @@ void mwl_tx_done(unsigned long data)
+
+ tr = (struct mwl_dma_data *)done_skb-data;
+
+- if
(ieee80211_is_assoc_resp(tr-wh.frame_control)) {
++ // if
(ieee80211_is_assoc_resp(tr-wh.frame_control)) {
++ if
(ieee80211_is_assoc_resp(tr-wh.frame_control) ||
++
ieee80211_is_reassoc_resp(tr-wh.frame_control) ||
++ ieee80211_is_auth(tr-wh.frame_control)) {
+
+ /* Remove H/W dma header
+ */
I don't think there's anything to be gained by commenting out the
original line. It only adds extra noise and the change that's been made
is evident from the log.
On a different note this might resolve a problem I have that makes the
WRT1900AC unusable in my situation.
I use a number of different routers as media bridges and some of them
will work for a while and then I find they aren't connected. That could
be an example of the re-associate problem here.
Not sure when I'll be able to test this as it involves time I don't have
and putting the WRT1900AC in as my main router which has proven to be
disruptive, but I will get to it.
Ian
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Re: [OpenWrt-Devel] [PATCH] [package] mwlwifi: generate TX_STATUS event on transmitting auth, associate, and reallocate responses
On Wed, 2015-03-18 at 21:40 -0600, Pat Fruth wrote:
This patch addresses an issue specific to Apple devices experiencing a
wireless disconnect when trying to associate with either 2.4Ghz or 5Ghz wifi
of a Linksys WRT1900AC router.
Apple devices (MacBooks running Mac OS X 10.10.x Yosemite in particular, but
there may be others), appear to re-auth/re-associate within approximately 25
seconds of initially associating.
Evidence of this can be seen by the presence of an entry similar to the
following in the Apple system logs;
MM/DD/YY HH:MM:SS.sss AM kernel[0]: wl0: Roamed or switched channel,
reason #8, bssid xx:xx:xx:xx:xx:xx
The Marvell wifi driver doesn’t generate a NL80211_CMD_FRAME_TX_STATUS event
on transmitting a response to auth and/or reassociate requests. Thus, the
respective callback handler functions (in hostapd’s ieee802_11.c) never get
driven, ultimately leading to the problem.
The patch causes a TX_STATUS event to be generated for auth and reassociate
request’s responses, in addition to associate request’s responses.
Signed-off-by: Pat Fruth p...@patfruth.comt
---
.../mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch | 14
++
1 file changed, 14 insertions(+)
create mode 100644
package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
diff --git
a/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
b/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
new file mode 100644
index 000..5f0d7fb
--- /dev/null
+++ b/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
@@ -0,0 +1,14 @@
+--- a/mwl_tx.c
b/mwl_tx.c
+@@ -395,7 +395,10 @@ void mwl_tx_done(unsigned long data)
+
+ tr = (struct mwl_dma_data *)done_skb-data;
+
+-if
(ieee80211_is_assoc_resp(tr-wh.frame_control)) {
++// if
(ieee80211_is_assoc_resp(tr-wh.frame_control)) {
++if
(ieee80211_is_assoc_resp(tr-wh.frame_control) ||
++
ieee80211_is_reassoc_resp(tr-wh.frame_control) ||
++ieee80211_is_auth(tr-wh.frame_control)) {
+
+ /* Remove H/W dma header
+ */
I don't think there's anything to be gained by commenting out the
original line. It only adds extra noise and the change that's been made
is evident from the log.
Ian
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[OpenWrt-Devel] [PATCH] [package] mwlwifi: generate TX_STATUS event on transmitting auth, associate, and reallocate responses
This patch addresses an issue specific to Apple devices experiencing a wireless
disconnect when trying to associate with either 2.4Ghz or 5Ghz wifi of a
Linksys WRT1900AC router.
Apple devices (MacBooks running Mac OS X 10.10.x Yosemite in particular, but
there may be others), appear to re-auth/re-associate within approximately 25
seconds of initially associating.
Evidence of this can be seen by the presence of an entry similar to the
following in the Apple system logs;
MM/DD/YY HH:MM:SS.sss AM kernel[0]: wl0: Roamed or switched channel,
reason #8, bssid xx:xx:xx:xx:xx:xx
The Marvell wifi driver doesn’t generate a NL80211_CMD_FRAME_TX_STATUS event on
transmitting a response to auth and/or reassociate requests. Thus, the
respective callback handler functions (in hostapd’s ieee802_11.c) never get
driven, ultimately leading to the problem.
The patch causes a TX_STATUS event to be generated for auth and reassociate
request’s responses, in addition to associate request’s responses.
Signed-off-by: Pat Fruth p...@patfruth.comt
---
.../mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
diff --git
a/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
b/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
new file mode 100644
index 000..5f0d7fb
--- /dev/null
+++ b/package/kernel/mwlwifi/patches/002_TX-STATUS-for-reassoc-auth.patch
@@ -0,0 +1,14 @@
+--- a/mwl_tx.c
b/mwl_tx.c
+@@ -395,7 +395,10 @@ void mwl_tx_done(unsigned long data)
+
+ tr = (struct mwl_dma_data *)done_skb-data;
+
+- if
(ieee80211_is_assoc_resp(tr-wh.frame_control)) {
++ // if
(ieee80211_is_assoc_resp(tr-wh.frame_control)) {
++ if
(ieee80211_is_assoc_resp(tr-wh.frame_control) ||
++
ieee80211_is_reassoc_resp(tr-wh.frame_control) ||
++ ieee80211_is_auth(tr-wh.frame_control)) {
+
+ /* Remove H/W dma header
+ */
--
1.9.1
___
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[OpenWrt-Devel] [PATCH] build: define STAMP_CONFIGURED recursively
Defining STAMP_CONFIGURED statically caused it not to reflect changes to
PKG_CONFIG_DEPENDS made after including package.mk, like the additional options
added by feeds.mk for all packages.
Furthermore, as STAMP_CONFIGURED_WILDCARD was already defined recursively, the
patsubst in its definition would never match, and in consequence, the stamps
were never removed. This caused packages not to be rebuilt when they should have
been.
Signed-off-by: Matthias Schiffer mschif...@universe-factory.net
---
This issue also affects Barrier Breaker.
include/package.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/package.mk b/include/package.mk
index 8208e36..b364c3b 100644
--- a/include/package.mk
+++ b/include/package.mk
@@ -98,7 +98,7 @@ ifneq ($(PREV_STAMP_PREPARED),)
else
STAMP_PREPARED=$(PKG_BUILD_DIR)/.prepared$(if $(QUILT)$(DUMP),,_$(shell
$(call find_md5,${CURDIR} $(PKG_FILE_DEPENDS),))$(call
confvar,$(PKG_PREPARED_DEPENDS)))
endif
-STAMP_CONFIGURED:=$(PKG_BUILD_DIR)/.configured$(if $(DUMP),,_$(call
confvar,$(PKG_CONFIG_DEPENDS)))
+STAMP_CONFIGURED=$(PKG_BUILD_DIR)/.configured$(if $(DUMP),,_$(call
confvar,$(PKG_CONFIG_DEPENDS)))
STAMP_CONFIGURED_WILDCARD=$(patsubst %_$(call
confvar,$(PKG_CONFIG_DEPENDS)),%_*,$(STAMP_CONFIGURED))
STAMP_BUILT:=$(PKG_BUILD_DIR)/.built
STAMP_INSTALLED:=$(STAGING_DIR)/stamp/.$(PKG_NAME)_installed
--
2.3.3
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[OpenWrt-Devel] [PATCH V3] b53: define registers available and needed on BCM5301X
They are also present on some BCM63xx switches. Signed-off-by: Rafał Miłecki zaj...@gmail.com --- .../generic/files/drivers/net/phy/b53/b53_regs.h | 32 ++ 1 file changed, 32 insertions(+) diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h index 4899cc4..a4db1f1 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_regs.h @@ -50,6 +50,9 @@ /* Jumbo Frame Registers */ #define B53_JUMBO_PAGE 0x40 +/* CFP Configuration Registers Page */ +#define B53_CFP_PAGE 0xa1 + /* * Control Page registers */ @@ -99,6 +102,24 @@ #define B53_MC_FLOOD_MASK 0x34 #define B53_IPMC_FLOOD_MASK0x36 +/* + * Overriding ports 0-7 on devices with xMII interfaces (8 bit) + * For port 8 still use B53_PORT_OVERRIDE_CTRL + * Please note that not all ports are available on every hardware, e.g. BCM5301X + * don't include overriding port 6, BCM63xx also have some limitations. + */ +#define B53_GMII_PORT_OVERRIDE_CTRL(i) (0x58 + i) +#define GMII_PORT_OVERRIDE_LINK BIT(0) +#define GMII_PORT_OVERRIDE_FULL_DUPLEX BIT(1) /* 0 = Half Duplex */ +#define GMII_PORT_OVERRIDE_SPEED_S 2 +#define GMII_PORT_OVERRIDE_SPEED_10M (0 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_100M(1 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_SPEED_1000M (2 PORT_OVERRIDE_SPEED_S) +#define GMII_PORT_OVERRIDE_RX_FLOW BIT(4) +#define GMII_PORT_OVERRIDE_TX_FLOW BIT(5) +#define GMII_PORT_OVERRIDE_ENBIT(6) /* Use the register contents */ +#define GMII_PORT_OVERRIDE_SPEED_2000M BIT(7) /* BCM5301X only, requires setting 1000M */ + /* Software reset register (8 bit) */ #define B53_SOFTRESET 0x79 @@ -156,6 +177,10 @@ #define GC_FRM_MGMT_PORT_04 0x00 #define GC_FRM_MGMT_PORT_MII 0x80 +/* Enable BCM_HDR Tag on IMP port (8 bit) */ +#define B53_BRCM_HDR 0x03 +#define BRCM_HDR_EN BIT(0) + /* Device ID register (8 or 32 bit) */ #define B53_DEVICE_ID 0x30 @@ -310,4 +335,11 @@ #define JMS_MIN_SIZE 1518 #define JMS_MAX_SIZE 9724 +/* + * CFP Configuration Page Registers + */ + +/* CFP Control Register with ports map (8 bit) */ +#define B53_CFP_CTRL 0x00 + #endif /* !__B53_REGS_H */ -- 1.8.4.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] octeon: Add MMC support for EdgeRouter ER8
On 18/03/15 09:53 AM, John Crispin wrote: Hi Jonathan, nice one, i saw the patch on the lmo mailing list and had this on my todo list for the next days, will give it a shot later on my ER8. do you fancy also sending a version that we can apply to trunk ? John Here you go. diff --git a/target/linux/octeon/config-3.18 b/target/linux/octeon/config-3.18 index e68292f..032146e 100644 --- a/target/linux/octeon/config-3.18 +++ b/target/linux/octeon/config-3.18 @@ -148,6 +148,10 @@ CONFIG_MIPS_L1_CACHE_SHIFT_7=y # CONFIG_MIPS_MACHINE is not set # CONFIG_MIPS_PARAVIRT is not set CONFIG_MIPS_PGD_C0_CONTEXT=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_OCTEON=y +# CONFIG_MMC_TIFM_SD is not set CONFIG_MODULES_USE_ELF_REL=y CONFIG_MODULES_USE_ELF_RELA=y # CONFIG_MTD_CFI_INTELEXT is not set diff --git a/target/linux/octeon/patches-3.18/130-MIPS-octeon-add-semaphore-to-serialize-bootbus-access.patch b/target/linux/octeon/patches-3.18/130-MIPS-octeon-add-semaphore-to-serialize-bootbus-access.patch new file mode 100644 index 000..6650c5b --- /dev/null +++ b/target/linux/octeon/patches-3.18/130-MIPS-octeon-add-semaphore-to-serialize-bootbus-access.patch @@ -0,0 +1,25 @@ +diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c +index a42110e..01130e9 100644 +--- a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c +@@ -51,6 +51,9 @@ extern void pci_console_init(const char *arg); + + static unsigned long long MAX_MEMORY = 512ull 20; + ++DEFINE_SEMAPHORE(octeon_bootbus_sem); ++EXPORT_SYMBOL(octeon_bootbus_sem); ++ + struct octeon_boot_descriptor *octeon_boot_desc_ptr; + + struct cvmx_bootinfo *octeon_bootinfo; +diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h +index 0415965..de9f74e 100644 +--- a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h +@@ -335,4 +335,6 @@ void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t); + + extern void octeon_fixup_irqs(void); + ++extern struct semaphore octeon_bootbus_sem; ++ + #endif /* __ASM_OCTEON_OCTEON_H */ diff --git a/target/linux/octeon/patches-3.18/140-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch b/target/linux/octeon/patches-3.18/140-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch new file mode 100644 index 000..c4d7347 --- /dev/null +++ b/target/linux/octeon/patches-3.18/140-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch @@ -0,0 +1,105 @@ +diff --git a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h +index e2c122c..35d7cbd 100644 +--- a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h +@@ -45,6 +45,7 @@ + */ + + #define OCTEON_FAMILY_MASK0x0000 ++#define OCTEON_PRID_MASK 0x00ff + + /* Flag bits in top byte */ + /* Ignores revision in model checks */ +@@ -63,6 +64,46 @@ + #define OM_MATCH_6XXX_FAMILY_MODELS 0x4000 + /* Match all cnf7XXX Octeon models. */ + #define OM_MATCH_F7XXX_FAMILY_MODELS 0x8000 ++/* Match all cn7XXX Octeon models. */ ++#define OM_MATCH_7XXX_FAMILY_MODELS 0x1000 ++#define OM_MATCH_FAMILY_MODELS(OM_MATCH_5XXX_FAMILY_MODELS | \ ++ OM_MATCH_6XXX_FAMILY_MODELS | \ ++ OM_MATCH_F7XXX_FAMILY_MODELS | \ ++ OM_MATCH_7XXX_FAMILY_MODELS) ++/* ++ * CN7XXX models with new revision encoding ++ */ ++ ++#define OCTEON_CN73XX_PASS1_0 0x000d9700 ++#define OCTEON_CN73XX (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION) ++#define OCTEON_CN73XX_PASS1_X (OCTEON_CN73XX_PASS1_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++ ++#define OCTEON_CN70XX_PASS1_0 0x000d9600 ++#define OCTEON_CN70XX_PASS1_1 0x000d9601 ++#define OCTEON_CN70XX_PASS1_2 0x000d9602 ++ ++#define OCTEON_CN70XX_PASS2_0 0x000d9608 ++ ++#define OCTEON_CN70XX (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION) ++#define OCTEON_CN70XX_PASS1_X (OCTEON_CN70XX_PASS1_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++#define OCTEON_CN70XX_PASS2_X (OCTEON_CN70XX_PASS2_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++ ++#define OCTEON_CN71XX OCTEON_CN70XX ++ ++#define OCTEON_CN78XX_PASS1_0 0x000d9500 ++#define OCTEON_CN78XX_PASS1_1 0x000d9501 ++#define OCTEON_CN78XX_PASS2_0 0x000d9508 ++ ++#define OCTEON_CN78XX (OCTEON_CN78XX_PASS1_0 | OM_IGNORE_REVISION) ++#define OCTEON_CN78XX_PASS1_X (OCTEON_CN78XX_PASS1_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++#define OCTEON_CN78XX_PASS2_X (OCTEON_CN78XX_PASS2_0 | \ ++ OM_IGNORE_MINOR_REVISION) ++ ++#define OCTEON_CN76XX (0x000d9540 | OM_CHECK_SUBMODEL) + + /* + * CNF7XXX models with new revision encoding +@@ -217,6 +258,10 @@ + #define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS |
