CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: rin Date: Sun May 30 07:20:00 UTC 2021 Modified Files: src/sys/arch/arm/include/arm32: param.h Log Message: Include opt_param.h for MSGBUFSIZE ifdef _KERNEL_OPT. To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/include/arm32/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/param.h diff -u src/sys/arch/arm/include/arm32/param.h:1.33 src/sys/arch/arm/include/arm32/param.h:1.34 --- src/sys/arch/arm/include/arm32/param.h:1.33 Fri Jul 10 12:25:09 2020 +++ src/sys/arch/arm/include/arm32/param.h Sun May 30 07:20:00 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.33 2020/07/10 12:25:09 skrll Exp $ */ +/* $NetBSD: param.h,v 1.34 2021/05/30 07:20:00 rin Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -38,6 +38,7 @@ #ifdef _KERNEL_OPT #include "opt_arm32_pmap.h" #include "opt_kasan.h" +#include "opt_param.h" #endif /*
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: joerg
Date: Sun May 30 02:28:59 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Don't use V8 atomic instruction for AA32 mode.
To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.38 src/sys/arch/arm/include/lock.h:1.39
--- src/sys/arch/arm/include/lock.h:1.38 Tue Apr 27 06:03:09 2021
+++ src/sys/arch/arm/include/lock.h Sun May 30 02:28:59 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.38 2021/04/27 06:03:09 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.39 2021/05/30 02:28:59 joerg Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -204,7 +204,7 @@ static __inline void __unused
__cpu_simple_unlock(__cpu_simple_lock_t *__alp)
{
-#if defined(_ARM_ARCH_8)
+#if defined(_ARM_ARCH_8) && defined(__LP64__)
if (sizeof(*__alp) == 1) {
__asm __volatile("stlrb\t%w0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Tue May 4 09:02:21 UTC 2021
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
Provide pte_{value,valid_p}
To generate a diff of this commit:
cvs rdiff -u -r1.169 -r1.170 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.169 src/sys/arch/arm/include/arm32/pmap.h:1.170
--- src/sys/arch/arm/include/arm32/pmap.h:1.169 Fri Oct 30 18:54:36 2020
+++ src/sys/arch/arm/include/arm32/pmap.h Tue May 4 09:02:21 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.169 2020/10/30 18:54:36 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.170 2021/05/04 09:02:21 skrll Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -627,6 +627,20 @@ l2pte_reset(pt_entry_t *ptep)
#define pmap_pte_v(pte) l2pte_valid_p(*(pte))
#define pmap_pte_pa(pte) l2pte_pa(*(pte))
+static inline uint32_t
+pte_value(pt_entry_t pte)
+{
+ return pte;
+}
+
+static inline bool
+pte_valid_p(pt_entry_t pte)
+{
+
+ return l2pte_valid_p(pte);
+}
+
+
/* Size of the kernel part of the L1 page table */
#define KERNEL_PD_SIZE \
(L1_TABLE_SIZE - (KERNEL_BASE >> L1_S_SHIFT) * sizeof(pd_entry_t))
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Tue Apr 27 06:03:09 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Fix the barrier confusion. From Riastradh - thanks!.
To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.37 src/sys/arch/arm/include/lock.h:1.38
--- src/sys/arch/arm/include/lock.h:1.37 Mon Apr 26 16:35:54 2021
+++ src/sys/arch/arm/include/lock.h Tue Apr 27 06:03:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.37 2021/04/26 16:35:54 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.38 2021/04/27 06:03:09 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -131,32 +131,34 @@ __swp(int __val, __cpu_simple_lock_t *__
}
#endif /* !_ARM_ARCH_6 */
+/* load/dmb implies load-acquire */
static __inline void
-__arm_membar_producer(void)
+__arm_load_dmb(void)
{
#if defined(_ARM_ARCH_7)
- __asm __volatile("dsb" ::: "memory");
+ __asm __volatile("dmb ish" ::: "memory");
#elif defined(_ARM_ARCH_6)
- __asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
+ __asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
#endif
}
+/* dmb/store implies store-release */
static __inline void
-__arm_membar_consumer(void)
+__arm_dmb_store(void)
{
#if defined(_ARM_ARCH_7)
- __asm __volatile("dmb" ::: "memory");
+ __asm __volatile("dmb ish" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
#endif
}
+
static __inline void __unused
__cpu_simple_lock_init(__cpu_simple_lock_t *__alp)
{
*__alp = __SIMPLELOCK_UNLOCKED;
- __arm_membar_producer();
}
#if !defined(__thumb__) || defined(_ARM_ARCH_T2)
@@ -164,12 +166,11 @@ static __inline void __unused
__cpu_simple_lock(__cpu_simple_lock_t *__alp)
{
#if defined(_ARM_ARCH_6)
- __arm_membar_consumer();
do {
/* spin */
} while (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED
|| __arm_store_exclusive(__alp, __SIMPLELOCK_LOCKED));
- __arm_membar_producer();
+ __arm_load_dmb();
#else
while (__swp(__SIMPLELOCK_LOCKED, __alp) != __SIMPLELOCK_UNLOCKED)
continue;
@@ -184,13 +185,12 @@ static __inline int __unused
__cpu_simple_lock_try(__cpu_simple_lock_t *__alp)
{
#if defined(_ARM_ARCH_6)
- __arm_membar_consumer();
do {
if (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED) {
return 0;
}
} while (__arm_store_exclusive(__alp, __SIMPLELOCK_LOCKED));
- __arm_membar_producer();
+ __arm_load_dmb();
return 1;
#else
return (__swp(__SIMPLELOCK_LOCKED, __alp) == __SIMPLELOCK_UNLOCKED);
@@ -213,9 +213,8 @@ __cpu_simple_unlock(__cpu_simple_lock_t
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
}
#else
- __arm_membar_consumer();
+ __arm_dmb_store();
*__alp = __SIMPLELOCK_UNLOCKED;
- __arm_membar_producer();
#endif
}
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Mon Apr 26 16:35:54 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Change #ifdef FOO to #if defined(FOO). NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.36 src/sys/arch/arm/include/lock.h:1.37
--- src/sys/arch/arm/include/lock.h:1.36 Sat Apr 24 07:58:12 2021
+++ src/sys/arch/arm/include/lock.h Mon Apr 26 16:35:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.36 2021/04/24 07:58:12 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.37 2021/04/26 16:35:54 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@ __cpu_simple_lock_set(__cpu_simple_lock_
*__ptr = __SIMPLELOCK_LOCKED;
}
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
static __inline unsigned int
__arm_load_exclusive(__cpu_simple_lock_t *__alp)
{
@@ -134,7 +134,7 @@ __swp(int __val, __cpu_simple_lock_t *__
static __inline void
__arm_membar_producer(void)
{
-#ifdef _ARM_ARCH_7
+#if defined(_ARM_ARCH_7)
__asm __volatile("dsb" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
@@ -144,7 +144,7 @@ __arm_membar_producer(void)
static __inline void
__arm_membar_consumer(void)
{
-#ifdef _ARM_ARCH_7
+#if defined(_ARM_ARCH_7)
__asm __volatile("dmb" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
@@ -163,7 +163,7 @@ __cpu_simple_lock_init(__cpu_simple_lock
static __inline void __unused
__cpu_simple_lock(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
__arm_membar_consumer();
do {
/* spin */
@@ -183,7 +183,7 @@ void __cpu_simple_lock(__cpu_simple_lock
static __inline int __unused
__cpu_simple_lock_try(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
__arm_membar_consumer();
do {
if (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED) {
@@ -204,7 +204,7 @@ static __inline void __unused
__cpu_simple_unlock(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_8
+#if defined(_ARM_ARCH_8)
if (sizeof(*__alp) == 1) {
__asm __volatile("stlrb\t%w0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Sat Apr 24 07:58:12 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Fix ARMv8 instructions
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.35 src/sys/arch/arm/include/lock.h:1.36
--- src/sys/arch/arm/include/lock.h:1.35 Sat Apr 24 06:38:39 2021
+++ src/sys/arch/arm/include/lock.h Sat Apr 24 07:58:12 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.35 2021/04/24 06:38:39 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.36 2021/04/24 07:58:12 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -206,10 +206,10 @@ __cpu_simple_unlock(__cpu_simple_lock_t
#ifdef _ARM_ARCH_8
if (sizeof(*__alp) == 1) {
- __asm __volatile("stlb\t%0, [%1]"
+ __asm __volatile("stlrb\t%w0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
} else {
- __asm __volatile("stl\t%0, [%1]"
+ __asm __volatile("stlr\t%0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
}
#else
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Sat Apr 24 06:38:39 UTC 2021 Modified Files: src/sys/arch/arm/include: lock.h Log Message: G/C To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/include/lock.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/lock.h diff -u src/sys/arch/arm/include/lock.h:1.34 src/sys/arch/arm/include/lock.h:1.35 --- src/sys/arch/arm/include/lock.h:1.34 Fri Nov 29 20:05:19 2019 +++ src/sys/arch/arm/include/lock.h Sat Apr 24 06:38:39 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: lock.h,v 1.34 2019/11/29 20:05:19 riastradh Exp $ */ +/* $NetBSD: lock.h,v 1.35 2021/04/24 06:38:39 skrll Exp $ */ /*- * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. @@ -65,11 +65,6 @@ __cpu_simple_lock_set(__cpu_simple_lock_ *__ptr = __SIMPLELOCK_LOCKED; } -#ifdef _KERNEL -/* XXX Formerly included for obsolete mb_* API, maybe no longer needed. */ -#include -#endif - #ifdef _ARM_ARCH_6 static __inline unsigned int __arm_load_exclusive(__cpu_simple_lock_t *__alp)
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Fri Apr 23 06:02:48 UTC 2021
Modified Files:
src/sys/arch/arm/include: bus_defs.h
Log Message:
Trialing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/include/bus_defs.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/bus_defs.h
diff -u src/sys/arch/arm/include/bus_defs.h:1.15 src/sys/arch/arm/include/bus_defs.h:1.16
--- src/sys/arch/arm/include/bus_defs.h:1.15 Mon Apr 13 07:09:51 2020
+++ src/sys/arch/arm/include/bus_defs.h Fri Apr 23 06:02:48 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_defs.h,v 1.15 2020/04/13 07:09:51 maxv Exp $ */
+/* $NetBSD: bus_defs.h,v 1.16 2021/04/23 06:02:48 skrll Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -157,7 +157,7 @@ struct bus_space {
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rm_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
-
+
/* read region */
void (*bs_rr_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: jmcneill Date: Sun Feb 7 21:15:41 UTC 2021 Modified Files: src/sys/arch/arm/include: cpufunc.h Log Message: Add ENABLE_INTERRUPT() / DISABLE_INTERRUPT() macros for compatibility with aarch64. To generate a diff of this commit: cvs rdiff -u -r1.86 -r1.87 src/sys/arch/arm/include/cpufunc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpufunc.h diff -u src/sys/arch/arm/include/cpufunc.h:1.86 src/sys/arch/arm/include/cpufunc.h:1.87 --- src/sys/arch/arm/include/cpufunc.h:1.86 Thu Dec 3 07:45:52 2020 +++ src/sys/arch/arm/include/cpufunc.h Sun Feb 7 21:15:40 2021 @@ -353,6 +353,9 @@ enable_interrupts(uint32_t mask) #define restore_interrupts(old_cpsr) \ (__set_cpsr_c((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit))) +#define ENABLE_INTERRUPT() cpsie(I32_bit) +#define DISABLE_INTERRUPT() cpsid(I32_bit) + static inline void cpsie(register_t psw) __attribute__((__unused__)); static inline register_t cpsid(register_t psw) __attribute__((__unused__));
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Sun Jan 31 06:18:50 UTC 2021 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: Fix (unused) PRRR_NOSn #define To generate a diff of this commit: cvs rdiff -u -r1.129 -r1.130 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.129 src/sys/arch/arm/include/armreg.h:1.130 --- src/sys/arch/arm/include/armreg.h:1.129 Tue Oct 29 16:18:23 2019 +++ src/sys/arch/arm/include/armreg.h Sun Jan 31 06:18:50 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.129 2019/10/29 16:18:23 joerg Exp $ */ +/* $NetBSD: armreg.h,v 1.130 2021/01/31 06:18:50 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -529,7 +529,7 @@ #define NMRR_WBWA 1 // write-back write-allocate #define NMRR_WT 2 // write-through #define NMRR_WB 3 // write-back -#define PRRR_NOSn(n) __BITS(24+2*(n))// Memory region is Inner Shareable +#define PRRR_NOSn(n) __BITS(24+(n)) // Memory region is Inner Shareable only #define PRRR_NS1 __BIT(19) // Normal Shareable S=1 is Shareable #define PRRR_NS0 __BIT(18) // Normal Shareable S=0 is Shareable #define PRRR_DS1 __BIT(17) // Device Shareable S=1 is Shareable
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Wed Jan 27 08:40:32 UTC 2021 Modified Files: src/sys/arch/arm/include: asan.h Log Message: Style. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/include/asan.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/asan.h diff -u src/sys/arch/arm/include/asan.h:1.6 src/sys/arch/arm/include/asan.h:1.7 --- src/sys/arch/arm/include/asan.h:1.6 Thu Sep 10 14:10:47 2020 +++ src/sys/arch/arm/include/asan.h Wed Jan 27 08:40:32 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: asan.h,v 1.6 2020/09/10 14:10:47 maxv Exp $ */ +/* $NetBSD: asan.h,v 1.7 2021/01/27 08:40:32 skrll Exp $ */ /* * Copyright (c) 2020 The NetBSD Foundation, Inc. @@ -222,9 +222,7 @@ kasan_md_init(void) kasan_shadow_map((void *)kasan_kernelstart, kasan_kernelsize); /* The VAs we've created until now. */ - vaddr_t eva; - - eva = pmap_growkernel(VM_KERNEL_VM_BASE); + vaddr_t eva = pmap_growkernel(VM_KERNEL_VM_BASE); kasan_shadow_map((void *)VM_KERNEL_VM_BASE, eva - VM_KERNEL_VM_BASE); }
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: rin Date: Mon Dec 14 01:58:48 UTC 2020 Modified Files: src/sys/arch/arm/include: ptrace.h Log Message: Obsolete PT_STEP and friends, that have never been implemented. PT_STEP was exposed to userland for NetBSD 1.6 to 9, and PT_SETSTEP and PT_CLEARSTEP was for 8 to 9. Therefore, they cannot be reused for other purposes. PT_STEP was introduced to arm/ptrace.h rev 1.2: http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/arm/include/ptrace.h#rev1.2 This was for workaround against GDB, which assumes PT_STEP is 9 (even today!!), if it is undefined. But, this should have been dealt with differently... To generate a diff of this commit: cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/include/ptrace.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/ptrace.h diff -u src/sys/arch/arm/include/ptrace.h:1.16 src/sys/arch/arm/include/ptrace.h:1.17 --- src/sys/arch/arm/include/ptrace.h:1.16 Tue Dec 1 02:48:29 2020 +++ src/sys/arch/arm/include/ptrace.h Mon Dec 14 01:58:48 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: ptrace.h,v 1.16 2020/12/01 02:48:29 rin Exp $ */ +/* $NetBSD: ptrace.h,v 1.17 2020/12/14 01:58:48 rin Exp $ */ /* * Copyright (c) 1995 Frank Lancaster @@ -36,7 +36,8 @@ /* * arm-dependent ptrace definitions */ -#ifndef _KERNEL +#if 0 +/* Exposed to userland for NetBSD 1.6 to 9. Do not reuse for other purpose. */ #define PT_STEP (PT_FIRSTMACH + 0) /* Not implemented */ #endif #define PT_GETREGS (PT_FIRSTMACH + 1) @@ -44,21 +45,22 @@ /* 3 and 4 are for FPE registers */ #define PT_GETFPREGS (PT_FIRSTMACH + 5) #define PT_SETFPREGS (PT_FIRSTMACH + 6) -#ifndef _KERNEL +#if 0 +/* Exposed to userland for NetBSD 8 to 9. Do not reuse for other purpose. */ #define PT_SETSTEP (PT_FIRSTMACH + 7) /* Not implemented */ #define PT_CLEARSTEP (PT_FIRSTMACH + 8) /* Not implemented */ #endif #define PT_MACHDEP_STRINGS \ - "PT_STEP", \ + "n/a PT_STEP", \ "PT_GETREGS", \ "PT_SETREGS", \ "old PT_GETFPREGS", \ "old PT_SETFPREGS", \ "PT_GETFPREGS", \ "PT_SETFPREGS", \ - "PT_SETSTEP", \ - "PT_CLEARSTEP", + "n/a PT_SETSTEP", \ + "n/a PT_CLEARSTEP", #include #define PTRACE_REG_PC(_r) (_r)->r_pc
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Tue Dec 1 14:53:48 UTC 2020
Modified Files:
src/sys/arch/arm/include: mutex.h
Log Message:
G/C MUTEX_PAUSE_{PAUSE,WAKE}
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/include/mutex.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/mutex.h
diff -u src/sys/arch/arm/include/mutex.h:1.24 src/sys/arch/arm/include/mutex.h:1.25
--- src/sys/arch/arm/include/mutex.h:1.24 Tue Dec 1 14:52:36 2020
+++ src/sys/arch/arm/include/mutex.h Tue Dec 1 14:53:47 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: mutex.h,v 1.24 2020/12/01 14:52:36 skrll Exp $ */
+/* $NetBSD: mutex.h,v 1.25 2020/12/01 14:53:47 skrll Exp $ */
/*-
* Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
@@ -82,10 +82,6 @@ struct kmutex {
#define MUTEX_CAS(p, o, n) \
(atomic_cas_ulong((volatile unsigned long *)(p), (o), (n)) == (o))
-#ifdef MULTIPROCESSOR
-#define MUTEX_SMT_PAUSE() __asm __volatile("wfe")
-#define MUTEX_SMT_WAKE() __asm __volatile("sev")
-#endif
#endif /* __MUTEX_PRIVATE */
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Tue Dec 1 14:52:36 UTC 2020
Modified Files:
src/sys/arch/arm/include: mutex.h
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/include/mutex.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/mutex.h
diff -u src/sys/arch/arm/include/mutex.h:1.23 src/sys/arch/arm/include/mutex.h:1.24
--- src/sys/arch/arm/include/mutex.h:1.23 Thu Mar 5 17:58:08 2020
+++ src/sys/arch/arm/include/mutex.h Tue Dec 1 14:52:36 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: mutex.h,v 1.23 2020/03/05 17:58:08 riastradh Exp $ */
+/* $NetBSD: mutex.h,v 1.24 2020/12/01 14:52:36 skrll Exp $ */
/*-
* Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
@@ -43,7 +43,7 @@
* So, what we have done is implement simple mutexes using a compare-and-swap.
* We support pre-ARMv6 by implementing CAS as a restartable atomic sequence
* that is checked by the IRQ vector.
- *
+ *
*/
struct kmutex {
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Tue Nov 3 08:34:17 UTC 2020 Modified Files: src/sys/arch/arm/include: cdefs.h Log Message: The ARM C Language Extenstion document defines __ARCH_ARM as the integer macro indicating the current ARM instruction set. Let's use it. PR/55778: evbarm64 GENERIC64 kernel fails to build with clang XXX Handle the fact that for an ARM architecture ARMvX.Y then, XXX __ARM_ARCH= X * 100 + Y. E.g. for ARMv8.1 __ARM_ARCH = 801. To generate a diff of this commit: cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/include/cdefs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cdefs.h diff -u src/sys/arch/arm/include/cdefs.h:1.17 src/sys/arch/arm/include/cdefs.h:1.18 --- src/sys/arch/arm/include/cdefs.h:1.17 Sun Oct 11 16:22:02 2020 +++ src/sys/arch/arm/include/cdefs.h Tue Nov 3 08:34:17 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: cdefs.h,v 1.17 2020/10/11 16:22:02 skrll Exp $ */ +/* $NetBSD: cdefs.h,v 1.18 2020/11/03 08:34:17 skrll Exp $ */ #ifndef _ARM_CDEFS_H_ #define _ARM_CDEFS_H_ @@ -10,7 +10,8 @@ #endif -#if defined (__ARM_ARCH_8A__) || defined (__ARM_ARCH_8A) +#if defined (__ARM_ARCH_8A__) || defined (__ARM_ARCH_8A) || \ +__ARM_ARCH == 8 /* __ARM_ARCH_8A__ is a typo */ #define _ARM_ARCH_8 #endif
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Sat Oct 31 13:58:22 UTC 2020
Modified Files:
src/sys/arch/arm/include: cpufunc.h
Log Message:
Fix armv6 builds by providing an armv6 is macro
To generate a diff of this commit:
cvs rdiff -u -r1.84 -r1.85 src/sys/arch/arm/include/cpufunc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/cpufunc.h
diff -u src/sys/arch/arm/include/cpufunc.h:1.84 src/sys/arch/arm/include/cpufunc.h:1.85
--- src/sys/arch/arm/include/cpufunc.h:1.84 Tue Sep 29 18:13:29 2020
+++ src/sys/arch/arm/include/cpufunc.h Sat Oct 31 13:58:22 2020
@@ -42,8 +42,6 @@
#ifndef _ARM_CPUFUNC_H_
#define _ARM_CPUFUNC_H_
-#define isb() __asm __volatile("isb" : : : "memory")
-
#ifdef _ARM_ARCH_7
/*
* Options for DMB and DSB:
@@ -62,12 +60,16 @@
*/
#define dsb(opt) __asm __volatile("dsb " __STRING(opt) : : : "memory")
#define dmb(opt) __asm __volatile("dmb " __STRING(opt) : : : "memory")
+#define isb() __asm __volatile("isb" : : : "memory")
+
#else
#define dsb(opt) \
__asm __volatile("mcr p15, 0, %0, c7, c10, 4" :: "r" (0) : "memory")
#define dmb(opt) \
__asm __volatile("mcr p15, 0, %0, c7, c10, 5" :: "r" (0) : "memory")
+#define isb() \
+ __asm __volatile("mcr p15, 0, %0, c7, c5, 4" :: "r" (0) : "memory")
#endif
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: he Date: Thu Oct 8 12:49:06 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Bump MAXDSIZ from 1536 to 1836. 1836 is 2048-128(MAXTSIZ)-64(MAXSSIZ). Gives us a fighting chance to build rust natively. OK'ed by skrll@ To generate a diff of this commit: cvs rdiff -u -r1.55 -r1.56 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.55 src/sys/arch/arm/include/arm32/vmparam.h:1.56 --- src/sys/arch/arm/include/arm32/vmparam.h:1.55 Sat Aug 29 06:49:53 2020 +++ src/sys/arch/arm/include/arm32/vmparam.h Thu Oct 8 12:49:06 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.55 2020/08/29 06:49:53 skrll Exp $ */ +/* $NetBSD: vmparam.h,v 1.56 2020/10/08 12:49:06 he Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -70,7 +70,7 @@ #define DFLDSIZ (384*1024*1024) /* initial data size limit */ #endif #ifndef MAXDSIZ -#define MAXDSIZ (1536*1024*1024) /* max data size */ +#define MAXDSIZ (1856*1024*1024) /* max data size */ #endif #ifndef DFLSSIZ #define DFLSSIZ (4*1024*1024) /* initial stack size limit */
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Tue Sep 29 18:13:29 UTC 2020
Modified Files:
src/sys/arch/arm/include: cpufunc.h
Log Message:
Fix RPI (armv6) build
To generate a diff of this commit:
cvs rdiff -u -r1.83 -r1.84 src/sys/arch/arm/include/cpufunc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/cpufunc.h
diff -u src/sys/arch/arm/include/cpufunc.h:1.83 src/sys/arch/arm/include/cpufunc.h:1.84
--- src/sys/arch/arm/include/cpufunc.h:1.83 Sat Sep 26 12:58:22 2020
+++ src/sys/arch/arm/include/cpufunc.h Tue Sep 29 18:13:29 2020
@@ -44,6 +44,7 @@
#define isb() __asm __volatile("isb" : : : "memory")
+#ifdef _ARM_ARCH_7
/*
* Options for DMB and DSB:
* oshld Outer Shareable, load
@@ -61,6 +62,14 @@
*/
#define dsb(opt) __asm __volatile("dsb " __STRING(opt) : : : "memory")
#define dmb(opt) __asm __volatile("dmb " __STRING(opt) : : : "memory")
+#else
+
+#define dsb(opt) \
+ __asm __volatile("mcr p15, 0, %0, c7, c10, 4" :: "r" (0) : "memory")
+#define dmb(opt) \
+ __asm __volatile("mcr p15, 0, %0, c7, c10, 5" :: "r" (0) : "memory")
+
+#endif
#ifdef __arm__
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: jakllsch Date: Sat Sep 5 16:04:31 UTC 2020 Modified Files: src/sys/arch/arm/include: bus_funcs.h Log Message: Add missing prototypes for __bs_c(f,_bs_sm_?_swap) (implementations of these already exist for aarch64) To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/include/bus_funcs.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/bus_funcs.h diff -u src/sys/arch/arm/include/bus_funcs.h:1.9 src/sys/arch/arm/include/bus_funcs.h:1.10 --- src/sys/arch/arm/include/bus_funcs.h:1.9 Mon Apr 13 07:09:51 2020 +++ src/sys/arch/arm/include/bus_funcs.h Sat Sep 5 16:04:31 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_funcs.h,v 1.9 2020/04/13 07:09:51 maxv Exp $ */ +/* $NetBSD: bus_funcs.h,v 1.10 2020/09/05 16:04:31 jakllsch Exp $ */ /*- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. @@ -493,14 +493,20 @@ void __bs_c(f,_bs_sm_1)(void *t, bus_spa #define bs_sm_2_proto(f) \ void __bs_c(f,_bs_sm_2)(void *t, bus_space_handle_t bsh, \ + bus_size_t offset, uint16_t value, bus_size_t count); \ +void __bs_c(f,_bs_sm_2_swap)(void *t, bus_space_handle_t bsh, \ bus_size_t offset, uint16_t value, bus_size_t count); #define bs_sm_4_proto(f) \ void __bs_c(f,_bs_sm_4)(void *t, bus_space_handle_t bsh, \ + bus_size_t offset, uint32_t value, bus_size_t count); \ +void __bs_c(f,_bs_sm_4_swap)(void *t, bus_space_handle_t bsh, \ bus_size_t offset, uint32_t value, bus_size_t count); #define bs_sm_8_proto(f) \ void __bs_c(f,_bs_sm_8)(void *t, bus_space_handle_t bsh, \ + bus_size_t offset, uint64_t value, bus_size_t count); \ +void __bs_c(f,_bs_sm_8_swap)(void *t, bus_space_handle_t bsh, \ bus_size_t offset, uint64_t value, bus_size_t count); #define bs_sr_1_proto(f) \
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Sat Aug 29 06:49:53 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Cover the full kernel address range in KASAN To generate a diff of this commit: cvs rdiff -u -r1.54 -r1.55 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.54 src/sys/arch/arm/include/arm32/vmparam.h:1.55 --- src/sys/arch/arm/include/arm32/vmparam.h:1.54 Sat Jul 11 06:46:19 2020 +++ src/sys/arch/arm/include/arm32/vmparam.h Sat Aug 29 06:49:53 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.54 2020/07/11 06:46:19 skrll Exp $ */ +/* $NetBSD: vmparam.h,v 1.55 2020/08/29 06:49:53 skrll Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -127,7 +127,7 @@ #ifdef KASAN #define VM_KERNEL_KASAN_BASE 0xc000 -#define VM_KERNEL_KASAN_SIZE (VM_KERNEL_VM_SIZE >> KASAN_SHADOW_SCALE_SHIFT) +#define VM_KERNEL_KASAN_SIZE (VM_KERNEL_ADDR_SIZE >> KASAN_SHADOW_SCALE_SHIFT) #define VM_KERNEL_KASAN_END (VM_KERNEL_KASAN_BASE + VM_KERNEL_KASAN_SIZE) #define VM_KERNEL_VM_END VM_KERNEL_KASAN_BASE #else @@ -143,6 +143,7 @@ #define VM_KERNEL_VM_BASE 0x9000 #endif +#define VM_KERNEL_ADDR_SIZE (VM_KERNEL_VM_END - KERNEL_BASE) #define VM_KERNEL_VM_SIZE (VM_KERNEL_VM_END - VM_KERNEL_VM_BASE) #define VM_KERNEL_IO_ADDRESS 0xf000
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: mrg
Date: Mon Aug 17 01:52:59 UTC 2020
Modified Files:
src/sys/arch/arm/include: cpu.h
Log Message:
swap sys/param.h for machine/param.h. this still obtains the
wanted COHERENCY_UNIT, while avoiding have a cascade of
failures where sys/mutex.h ends up including arm/cpu.h which
ends up including sys/resourcevar.h and then sys/mutex.h,
but as the first includer of sys/mutex.h has defined the
idempotent header define, the second one is empty, and as
kmutex_t isn't defined by the first attempt yet the kmutex_t
used in resourcevar.h generates an error.
should fix evbarm v5/v5eb, hpcarm, iyonix and zaurus builds.
tested building iyonix, zaurus and evbarmv7hf.
To generate a diff of this commit:
cvs rdiff -u -r1.113 -r1.114 src/sys/arch/arm/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/cpu.h
diff -u src/sys/arch/arm/include/cpu.h:1.113 src/sys/arch/arm/include/cpu.h:1.114
--- src/sys/arch/arm/include/cpu.h:1.113 Sun Aug 16 16:01:35 2020
+++ src/sys/arch/arm/include/cpu.h Mon Aug 17 01:52:59 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.113 2020/08/16 16:01:35 skrll Exp $ */
+/* $NetBSD: cpu.h,v 1.114 2020/08/17 01:52:59 mrg Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -154,7 +154,7 @@ static inline void cpu_dosoftints(void);
#include
#include
#include
-#include
+#include
struct cpu_info {
struct cpu_data ci_data; /* MI per-cpu data */
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Sun Aug 16 16:01:35 UTC 2020
Modified Files:
src/sys/arch/arm/include: cpu.h
Log Message:
G/C MP_CPU_INFO_MEMBERS
To generate a diff of this commit:
cvs rdiff -u -r1.112 -r1.113 src/sys/arch/arm/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/cpu.h
diff -u src/sys/arch/arm/include/cpu.h:1.112 src/sys/arch/arm/include/cpu.h:1.113
--- src/sys/arch/arm/include/cpu.h:1.112 Fri Aug 14 16:18:36 2020
+++ src/sys/arch/arm/include/cpu.h Sun Aug 16 16:01:35 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.112 2020/08/14 16:18:36 skrll Exp $ */
+/* $NetBSD: cpu.h,v 1.113 2020/08/16 16:01:35 skrll Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -219,10 +219,6 @@ struct cpu_info {
struct arm_cache_info *
ci_cacheinfo;
-
-#if defined(MP_CPU_INFO_MEMBERS)
- MP_CPU_INFO_MEMBERS
-#endif
};
extern struct cpu_info cpu_info_store[];
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Sun Aug 16 09:37:30 UTC 2020
Modified Files:
src/sys/arch/arm/include: param.h
Log Message:
Define COHERENCY_UNIT and CACHE_LINE_SIZE to fix arm builds.
The recent change to cpu.h and struct cpu_info needs an early definition
for the ARM_INTR_IMPLs that want to inline the spl functions and get
{,set_}curcpl() from cpu.h
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/include/param.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/param.h
diff -u src/sys/arch/arm/include/param.h:1.22 src/sys/arch/arm/include/param.h:1.23
--- src/sys/arch/arm/include/param.h:1.22 Mon Jan 7 22:00:30 2019
+++ src/sys/arch/arm/include/param.h Sun Aug 16 09:37:30 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: param.h,v 1.22 2019/01/07 22:00:30 jdolecek Exp $ */
+/* $NetBSD: param.h,v 1.23 2020/08/16 09:37:30 skrll Exp $ */
/*
* Copyright (c) 1994,1995 Mark Brinicombe.
@@ -186,4 +186,7 @@
#endif
#endif /* _KERNEL */
+#define COHERENCY_UNIT 64
+#define CACHE_LINE_SIZE 64
+
#endif /* _ARM_PARAM_H_ */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Sat Jul 11 06:46:19 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Fix ARM builds To generate a diff of this commit: cvs rdiff -u -r1.53 -r1.54 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.53 src/sys/arch/arm/include/arm32/vmparam.h:1.54 --- src/sys/arch/arm/include/arm32/vmparam.h:1.53 Fri Jul 10 15:12:33 2020 +++ src/sys/arch/arm/include/arm32/vmparam.h Sat Jul 11 06:46:19 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.53 2020/07/10 15:12:33 skrll Exp $ */ +/* $NetBSD: vmparam.h,v 1.54 2020/07/11 06:46:19 skrll Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -38,7 +38,9 @@ #ifndef _ARM_ARM32_VMPARAM_H_ #define _ARM_ARM32_VMPARAM_H_ +#if defined(_KERNEL_OPT) #include "opt_kasan.h" +#endif /* * Virtual Memory parameters common to all arm32 platforms. @@ -96,6 +98,7 @@ #define VM_MIN_KERNEL_ADDRESS ((vaddr_t) KERNEL_BASE) #define VM_MAX_KERNEL_ADDRESS ((vaddr_t) -(PAGE_SIZE+1)) +#if defined(_KERNEL) // AddressSanitizer dedicates 1/8 of kernel memory to its shadow memory (e.g. // 128MB to cover 1GB for ARM) and uses a special KVA range for the shadow // address corresponding to a kernel memory address. @@ -144,5 +147,6 @@ #define VM_KERNEL_IO_ADDRESS 0xf000 #define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_ADDRESS) +#endif #endif /* _ARM_ARM32_VMPARAM_H_ */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Fri Jul 10 15:12:33 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Remove stray #else / #endif block in KASAN support commit To generate a diff of this commit: cvs rdiff -u -r1.52 -r1.53 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.52 src/sys/arch/arm/include/arm32/vmparam.h:1.53 --- src/sys/arch/arm/include/arm32/vmparam.h:1.52 Fri Jul 10 12:45:15 2020 +++ src/sys/arch/arm/include/arm32/vmparam.h Fri Jul 10 15:12:33 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.52 2020/07/10 12:45:15 skrll Exp $ */ +/* $NetBSD: vmparam.h,v 1.53 2020/07/10 15:12:33 skrll Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -139,10 +139,6 @@ #else #define VM_KERNEL_VM_BASE 0x9000 #endif -#else -#ifdef KASAN -#error KASAN is unsupported on pre-ARMv6 -#endif #define VM_KERNEL_VM_SIZE (VM_KERNEL_VM_END - VM_KERNEL_VM_BASE)
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Fri Jul 10 12:45:16 UTC 2020 Modified Files: src/sys/arch/arm/include: asan.h src/sys/arch/arm/include/arm32: vmparam.h Log Message: Oops... deal with a last minute #define name change. KASAN support now builds. To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/include/asan.h cvs rdiff -u -r1.51 -r1.52 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/asan.h diff -u src/sys/arch/arm/include/asan.h:1.1 src/sys/arch/arm/include/asan.h:1.2 --- src/sys/arch/arm/include/asan.h:1.1 Fri Jul 10 12:25:09 2020 +++ src/sys/arch/arm/include/asan.h Fri Jul 10 12:45:15 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: asan.h,v 1.1 2020/07/10 12:25:09 skrll Exp $ */ +/* $NetBSD: asan.h,v 1.2 2020/07/10 12:45:15 skrll Exp $ */ /* * Copyright (c) 2020 The NetBSD Foundation, Inc. @@ -189,8 +189,8 @@ kasan_md_init(void) /* The VAs we've created until now. */ vaddr_t eva; - eva = pmap_growkernel(KERNEL_VM_BASE); - kasan_shadow_map((void *)KERNEL_VM_BASE, eva - KERNEL_VM_BASE); + eva = pmap_growkernel(VM_KERNEL_VM_BASE); + kasan_shadow_map((void *)VM_KERNEL_VM_BASE, eva - VM_KERNEL_VM_BASE); } Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.51 src/sys/arch/arm/include/arm32/vmparam.h:1.52 --- src/sys/arch/arm/include/arm32/vmparam.h:1.51 Fri Jul 10 12:25:09 2020 +++ src/sys/arch/arm/include/arm32/vmparam.h Fri Jul 10 12:45:15 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.51 2020/07/10 12:25:09 skrll Exp $ */ +/* $NetBSD: vmparam.h,v 1.52 2020/07/10 12:45:15 skrll Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -124,7 +124,7 @@ #ifdef KASAN #define VM_KERNEL_KASAN_BASE 0xc000 -#define VM_KERNEL_KASAN_SIZE (KERNEL_VM_SIZE >> KASAN_SHADOW_SCALE_SHIFT) +#define VM_KERNEL_KASAN_SIZE (VM_KERNEL_VM_SIZE >> KASAN_SHADOW_SCALE_SHIFT) #define VM_KERNEL_KASAN_END (VM_KERNEL_KASAN_BASE + VM_KERNEL_KASAN_SIZE) #define VM_KERNEL_VM_END VM_KERNEL_KASAN_BASE #else
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Wed Jul 8 07:59:49 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Remove an unnecessary #ifdef To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.47 src/sys/arch/arm/include/arm32/vmparam.h:1.48 --- src/sys/arch/arm/include/arm32/vmparam.h:1.47 Mon Jan 13 20:36:44 2020 +++ src/sys/arch/arm/include/arm32/vmparam.h Wed Jul 8 07:59:49 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.47 2020/01/13 20:36:44 christos Exp $ */ +/* $NetBSD: vmparam.h,v 1.48 2020/07/08 07:59:49 skrll Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -88,11 +88,7 @@ * Mach derived constants */ #define VM_MIN_ADDRESS ((vaddr_t) PAGE_SIZE) -#ifdef ARM_MMU_EXTENDED -#define VM_MAXUSER_ADDRESS ((vaddr_t) 0x8000 - PAGE_SIZE) -#else #define VM_MAXUSER_ADDRESS ((vaddr_t) KERNEL_BASE - PAGE_SIZE) -#endif #define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS #define VM_MIN_KERNEL_ADDRESS ((vaddr_t) KERNEL_BASE)
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Wed Jul 8 06:58:33 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: param.h Log Message: Define USPACE in terms of UPAGES (not the other way around) now that NBPG is fixed at 4K To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/include/arm32/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/param.h diff -u src/sys/arch/arm/include/arm32/param.h:1.31 src/sys/arch/arm/include/arm32/param.h:1.32 --- src/sys/arch/arm/include/arm32/param.h:1.31 Wed Jul 8 06:54:57 2020 +++ src/sys/arch/arm/include/arm32/param.h Wed Jul 8 06:58:33 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.31 2020/07/08 06:54:57 skrll Exp $ */ +/* $NetBSD: param.h,v 1.32 2020/07/08 06:58:33 skrll Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -54,8 +54,8 @@ #define SSIZE 1 /* initial stack size/NBPG */ #define SINCR 1 /* increment of stack/NBPG */ -#define USPACE 8192 /* total size of u-area */ -#define UPAGES (USPACE / NBPG) /* pages of u-area */ +#define UPAGES 2 +#define USPACE (UPAGES * NBPG) /* total size of u-area */ #ifndef MSGBUFSIZE #define MSGBUFSIZE 16384 /* default message buffer size */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Wed Jul 8 06:54:57 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: param.h Log Message: Whitespace To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/include/arm32/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/param.h diff -u src/sys/arch/arm/include/arm32/param.h:1.30 src/sys/arch/arm/include/arm32/param.h:1.31 --- src/sys/arch/arm/include/arm32/param.h:1.30 Thu Feb 13 07:40:24 2020 +++ src/sys/arch/arm/include/arm32/param.h Wed Jul 8 06:54:57 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.30 2020/02/13 07:40:24 skrll Exp $ */ +/* $NetBSD: param.h,v 1.31 2020/07/08 06:54:57 skrll Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -36,7 +36,7 @@ #define _ARM_ARM32_PARAM_H_ #ifdef _KERNEL_OPT -# include "opt_arm32_pmap.h" +#include "opt_arm32_pmap.h" #endif /*
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Sat Jul 4 07:02:35 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: machdep.h Log Message: Protect with #ifdef _KERNEL To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/include/arm32/machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/machdep.h diff -u src/sys/arch/arm/include/arm32/machdep.h:1.33 src/sys/arch/arm/include/arm32/machdep.h:1.34 --- src/sys/arch/arm/include/arm32/machdep.h:1.33 Thu Mar 5 15:18:54 2020 +++ src/sys/arch/arm/include/arm32/machdep.h Sat Jul 4 07:02:35 2020 @@ -1,8 +1,10 @@ -/* $NetBSD: machdep.h,v 1.33 2020/03/05 15:18:54 riastradh Exp $ */ +/* $NetBSD: machdep.h,v 1.34 2020/07/04 07:02:35 skrll Exp $ */ #ifndef _ARM32_MACHDEP_H_ #define _ARM32_MACHDEP_H_ +#ifdef _KERNEL + /* Define various stack sizes in pages */ #ifndef IRQ_STACK_SIZE #define IRQ_STACK_SIZE 1 @@ -103,4 +105,7 @@ void set_spl_masks(void); #ifdef DIAGNOSTIC void dump_spl_masks(void); #endif -#endif + +#endif /* _KERNEL */ + +#endif /* _ARM32_MACHDEP_H_ */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Fri Jul 3 06:49:26 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: pmap.h Log Message: Consistency...#define To generate a diff of this commit: cvs rdiff -u -r1.167 -r1.168 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.167 src/sys/arch/arm/include/arm32/pmap.h:1.168 --- src/sys/arch/arm/include/arm32/pmap.h:1.167 Sat Apr 18 11:00:38 2020 +++ src/sys/arch/arm/include/arm32/pmap.h Fri Jul 3 06:49:26 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.167 2020/04/18 11:00:38 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.168 2020/07/03 06:49:26 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -84,20 +84,20 @@ #endif #ifdef ARM_MMU_EXTENDED -#define PMAP_HWPAGEWALKER 1 -#define PMAP_TLB_MAX 1 +#define PMAP_HWPAGEWALKER 1 +#define PMAP_TLB_MAX 1 #if PMAP_TLB_MAX > 1 -#define PMAP_TLB_NEED_SHOOTDOWN 1 +#define PMAP_TLB_NEED_SHOOTDOWN 1 #endif -#define PMAP_TLB_FLUSH_ASID_ON_RESET (arm_has_tlbiasid_p) -#define PMAP_TLB_NUM_PIDS 256 -#define cpu_set_tlb_info(ci, ti)((void)((ci)->ci_tlb_info = (ti))) +#define PMAP_TLB_FLUSH_ASID_ON_RESET (arm_has_tlbiasid_p) +#define PMAP_TLB_NUM_PIDS 256 +#define cpu_set_tlb_info(ci, ti)((void)((ci)->ci_tlb_info = (ti))) #if PMAP_TLB_MAX > 1 -#define cpu_tlb_info(ci) ((ci)->ci_tlb_info) +#define cpu_tlb_info(ci) ((ci)->ci_tlb_info) #else -#define cpu_tlb_info(ci) (_tlb0_info) +#define cpu_tlb_info(ci) (_tlb0_info) #endif -#define pmap_md_tlb_asid_max() (PMAP_TLB_NUM_PIDS - 1) +#define pmap_md_tlb_asid_max() (PMAP_TLB_NUM_PIDS - 1) #include #include @@ -143,7 +143,7 @@ * three of these to map their whole working set. */ #define L2_BUCKET_XLOG2 (L1_S_SHIFT) -#define L2_BUCKET_XSIZE (1 << L2_BUCKET_XLOG2) +#define L2_BUCKET_XSIZE (1 << L2_BUCKET_XLOG2) #define L2_BUCKET_LOG2 4 #define L2_BUCKET_SIZE (1 << L2_BUCKET_LOG2) @@ -160,9 +160,9 @@ * ARMv6 is physically-tagged but all others are virtually-tagged. */ #if (ARM_MMU_V6 + ARM_MMU_V7) > 0 -#define PMAP_CACHE_VIPT +#define PMAP_CACHE_VIPT #else -#define PMAP_CACHE_VIVT +#define PMAP_CACHE_VIVT #endif #ifndef _LOCORE @@ -356,13 +356,13 @@ extern int arm_poolpage_vmfreelist; #define pmap_copy(dp, sp, da, l, sa) /* nothing */ -#define pmap_phys_address(ppn) (arm_ptob((ppn))) +#define pmap_phys_address(ppn) (arm_ptob((ppn))) u_int arm32_mmap_flags(paddr_t); -#define ARM32_MMAP_WRITECOMBINE 0x4000 -#define ARM32_MMAP_CACHEABLE 0x2000 -#define ARM_MMAP_WRITECOMBINE ARM32_MMAP_WRITECOMBINE -#define ARM_MMAP_CACHEABLE ARM32_MMAP_CACHEABLE -#define pmap_mmap_flags(ppn) arm32_mmap_flags(ppn) +#define ARM32_MMAP_WRITECOMBINE 0x4000 +#define ARM32_MMAP_CACHEABLE 0x2000 +#define ARM_MMAP_WRITECOMBINE ARM32_MMAP_WRITECOMBINE +#define ARM_MMAP_CACHEABLE ARM32_MMAP_CACHEABLE +#define pmap_mmap_flags(ppn) arm32_mmap_flags(ppn) #define PMAP_PTE 0x1000 /* kenter_pa */ #define PMAP_DEV 0x2000 /* kenter_pa */ @@ -377,7 +377,7 @@ bool pmap_remove_all(pmap_t); bool pmap_extract(pmap_t, vaddr_t, paddr_t *); #define PMAP_NEED_PROCWR -#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ +#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */ #define PMAP_ENABLE_PMAP_KMPAGE /* enable the PMAP_KMPAGE flag */ #if (ARM_MMU_V6 + ARM_MMU_V7) > 0 @@ -426,7 +426,7 @@ void pmap_devmap_register(const struct p * Special page zero routine for use by the idle loop (no cache cleans). */ bool pmap_pageidlezero(paddr_t); -#define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa)) +#define PMAP_PAGEIDLEZERO(pa) pmap_pageidlezero((pa)) #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS /* @@ -546,14 +546,14 @@ pmap_ptesync(pt_entry_t *ptep, size_t cn #define PTE_SYNC(ptep) pmap_ptesync((ptep), PAGE_SIZE / L2_S_SIZE) #define PTE_SYNC_RANGE(ptep, cnt) pmap_ptesync((ptep), (cnt)) -#define l1pte_valid_p(pde) ((pde) != 0) -#define l1pte_section_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_S) -#define l1pte_supersection_p(pde) (l1pte_section_p(pde) \ +#define l1pte_valid_p(pde) ((pde) != 0) +#define l1pte_section_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_S) +#define l1pte_supersection_p(pde) (l1pte_section_p(pde) \ && ((pde) & L1_S_V6_SUPER) != 0) -#define l1pte_page_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_C) -#define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F) -#define l1pte_pa(pde) ((pde) & L1_C_ADDR_MASK) -#define l1pte_index(v) ((vaddr_t)(v) >> L1_S_SHIFT) +#define l1pte_page_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_C) +#define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F) +#define l1pte_pa(pde) ((pde) & L1_C_ADDR_MASK) +#define l1pte_index(v) ((vaddr_t)(v) >> L1_S_SHIFT) static inline void
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: joerg Date: Mon May 4 18:36:24 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: pte.h Log Message: Prevent double definition of pt_entry_t from machine/param.h To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/include/arm32/pte.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pte.h diff -u src/sys/arch/arm/include/arm32/pte.h:1.22 src/sys/arch/arm/include/arm32/pte.h:1.23 --- src/sys/arch/arm/include/arm32/pte.h:1.22 Sun Feb 2 09:19:48 2020 +++ src/sys/arch/arm/include/arm32/pte.h Mon May 4 18:36:24 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.22 2020/02/02 09:19:48 skrll Exp $ */ +/* $NetBSD: pte.h,v 1.23 2020/05/04 18:36:24 joerg Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -89,7 +89,11 @@ #ifndef _LOCORE typedef uint32_t pd_entry_t; /* L1 table entry */ -typedef uint32_t pt_entry_t; /* L2 table entry */ +#ifndef __BSD_PTENTRY_T__ +#define __BSD_PTENTRY_T__ +typedef uint32_t pt_entry_t; +#define PRIxPTE PRIx32 +#endif #endif /* _LOCORE */ #define L1_SS_SIZE 0x0100 /* 16M */
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: joerg Date: Tue Apr 21 11:35:02 UTC 2020 Modified Files: src/sys/arch/arm/include: asm.h Log Message: LLVM is a bit stricter and wants the ARM variant of %progbits. To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/asm.h diff -u src/sys/arch/arm/include/asm.h:1.32 src/sys/arch/arm/include/asm.h:1.33 --- src/sys/arch/arm/include/asm.h:1.32 Fri Apr 17 14:19:43 2020 +++ src/sys/arch/arm/include/asm.h Tue Apr 21 11:35:02 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.32 2020/04/17 14:19:43 joerg Exp $ */ +/* $NetBSD: asm.h,v 1.33 2020/04/21 11:35:02 joerg Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -221,7 +221,7 @@ #define PIC_SYM(x,y) x #endif /* __PIC__ */ -#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ +#define RCSID(x) .pushsection ".ident","MS",%progbits,1; \ .asciz x; \ .popsection
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Sun Mar 29 21:34:33 UTC 2020
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
Don't define pt_entry_t if _LOCORE
Reported by Patrick Welche
To generate a diff of this commit:
cvs rdiff -u -r1.165 -r1.166 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.165 src/sys/arch/arm/include/arm32/pmap.h:1.166
--- src/sys/arch/arm/include/arm32/pmap.h:1.165 Sun Mar 29 09:01:32 2020
+++ src/sys/arch/arm/include/arm32/pmap.h Sun Mar 29 21:34:33 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.165 2020/03/29 09:01:32 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.166 2020/03/29 21:34:33 skrll Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -1184,14 +1184,14 @@ do { \
(pg)->mdpage.k_mappings = 0; \
} while (/*CONSTCOND*/0)
-#endif /* !_LOCORE */
-
#ifndef __BSD_PTENTRY_T__
#define __BSD_PTENTRY_T__
typedef uint32_t pt_entry_t;
#define PRIxPTE PRIx32
#endif
+#endif /* !_LOCORE */
+
#endif /* _KERNEL */
#endif /* _ARM32_PMAP_H_ */
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Sun Mar 29 09:06:38 UTC 2020 Modified Files: src/sys/arch/arm/include: cpu.h Log Message: Provide a curpcb To generate a diff of this commit: cvs rdiff -u -r1.109 -r1.110 src/sys/arch/arm/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpu.h diff -u src/sys/arch/arm/include/cpu.h:1.109 src/sys/arch/arm/include/cpu.h:1.110 --- src/sys/arch/arm/include/cpu.h:1.109 Mon Mar 9 18:43:52 2020 +++ src/sys/arch/arm/include/cpu.h Sun Mar 29 09:06:38 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.109 2020/03/09 18:43:52 christos Exp $ */ +/* $NetBSD: cpu.h,v 1.110 2020/03/29 09:06:38 skrll Exp $ */ /* * Copyright (c) 1994-1996 Mark Brinicombe. @@ -262,6 +262,7 @@ curcpu(void) #ifndef curlwp #define curlwp (curcpu()->ci_curlwp) #endif +#define curpcb ((struct pcb *)lwp_getpcb(curlwp)) #define CPU_INFO_ITERATOR int #if defined(_MODULE) || defined(MULTIPROCESSOR)
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Sun Mar 29 09:01:32 UTC 2020
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
Provide a pt_entry_t and PRIxPTE
To generate a diff of this commit:
cvs rdiff -u -r1.164 -r1.165 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.164 src/sys/arch/arm/include/arm32/pmap.h:1.165
--- src/sys/arch/arm/include/arm32/pmap.h:1.164 Sat Mar 14 14:05:42 2020
+++ src/sys/arch/arm/include/arm32/pmap.h Sun Mar 29 09:01:32 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.164 2020/03/14 14:05:42 ad Exp $ */
+/* $NetBSD: pmap.h,v 1.165 2020/03/29 09:01:32 skrll Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -1186,6 +1186,12 @@ do { \
#endif /* !_LOCORE */
+#ifndef __BSD_PTENTRY_T__
+#define __BSD_PTENTRY_T__
+typedef uint32_t pt_entry_t;
+#define PRIxPTE PRIx32
+#endif
+
#endif /* _KERNEL */
#endif /* _ARM32_PMAP_H_ */
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: christos Date: Mon Mar 9 18:43:52 UTC 2020 Modified Files: src/sys/arch/arm/include: cpu.h Log Message: Don't expose curproc/curlwp and other random kernel macros/functions/variables du-jour. To generate a diff of this commit: cvs rdiff -u -r1.108 -r1.109 src/sys/arch/arm/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpu.h diff -u src/sys/arch/arm/include/cpu.h:1.108 src/sys/arch/arm/include/cpu.h:1.109 --- src/sys/arch/arm/include/cpu.h:1.108 Sat Feb 15 03:16:11 2020 +++ src/sys/arch/arm/include/cpu.h Mon Mar 9 14:43:52 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.108 2020/02/15 08:16:11 skrll Exp $ */ +/* $NetBSD: cpu.h,v 1.109 2020/03/09 18:43:52 christos Exp $ */ /* * Copyright (c) 1994-1996 Mark Brinicombe. @@ -101,7 +101,7 @@ void cpu_proc_fork(struct proc *, struct #ifndef _LOCORE #if defined(TPIDRPRW_IS_CURLWP) || defined(TPIDRPRW_IS_CURCPU) #include -#endif +#endif /* TPIDRPRW_IS_CURLWP || TPIDRPRW_IS_CURCPU */ /* 1 == use cpu_sleep(), 0 == don't */ extern int cpu_do_powersave; @@ -217,6 +217,7 @@ extern struct cpu_info cpu_info_store[]; struct lwp *arm_curlwp(void); struct cpu_info *arm_curcpu(void); +#ifdef _KERNEL #if defined(_MODULE) #define curlwp arm_curlwp() @@ -343,9 +344,11 @@ vaddr_t cpu_uarea_alloc_idlelwp(struct c int cpu_maxproc_hook(int); #endif +#endif /* _KERNEL */ + #endif /* !_LOCORE */ -#endif /* _KERNEL */ +#endif /* _KERNEL || _KMEMUSER */ #elif defined(__aarch64__)
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Sun Feb 23 15:12:19 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: pmap.h Log Message: G/C l1pte_pgindex To generate a diff of this commit: cvs rdiff -u -r1.161 -r1.162 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.161 src/sys/arch/arm/include/arm32/pmap.h:1.162 --- src/sys/arch/arm/include/arm32/pmap.h:1.161 Wed Feb 5 07:37:36 2020 +++ src/sys/arch/arm/include/arm32/pmap.h Sun Feb 23 15:12:18 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.161 2020/02/05 07:37:36 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.162 2020/02/23 15:12:18 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -557,8 +557,6 @@ pmap_ptesync(pt_entry_t *ptep, size_t cn #define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F) #define l1pte_pa(pde) ((pde) & L1_C_ADDR_MASK) #define l1pte_index(v) ((vaddr_t)(v) >> L1_S_SHIFT) -#define l1pte_pgindex(v) l1pte_index((v) & L1_ADDR_BITS \ - & ~(PAGE_SIZE * PAGE_SIZE / sizeof(pt_entry_t) - 1)) static inline void l1pte_setone(pt_entry_t *pdep, pt_entry_t pde)
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Thu Feb 13 07:40:24 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: param.h Log Message: Bump the amount of KMEM allowed to 1/3rd of KVM. _ARCH_ARM_6 has a split of 2:2 and others have a split of 3:1. Tested by martin@ Thanks To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/include/arm32/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/param.h diff -u src/sys/arch/arm/include/arm32/param.h:1.29 src/sys/arch/arm/include/arm32/param.h:1.30 --- src/sys/arch/arm/include/arm32/param.h:1.29 Sat Feb 1 09:21:49 2020 +++ src/sys/arch/arm/include/arm32/param.h Thu Feb 13 07:40:24 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.29 2020/02/01 09:21:49 skrll Exp $ */ +/* $NetBSD: param.h,v 1.30 2020/02/13 07:40:24 skrll Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -66,7 +66,12 @@ * logical pages. */ #define NKMEMPAGES_MIN_DEFAULT ((8 * 1024 * 1024) >> PAGE_SHIFT) -#define NKMEMPAGES_MAX_DEFAULT ((128 * 1024 * 1024) >> PAGE_SHIFT) + +#if defined(_ARM_ARCH_6) +#define NKMEMPAGES_MAX_DEFAULT ((768 * 1024 * 1024) >> PAGE_SHIFT) +#else +#define NKMEMPAGES_MAX_DEFAULT ((256 * 1024 * 1024) >> PAGE_SHIFT) +#endif /* Constants used to divide the USPACE area */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Tue Feb 11 13:31:23 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: types.h Log Message: G/C To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/include/arm32/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/types.h diff -u src/sys/arch/arm/include/arm32/types.h:1.12 src/sys/arch/arm/include/arm32/types.h:1.13 --- src/sys/arch/arm/include/arm32/types.h:1.12 Wed Jan 24 09:04:45 2018 +++ src/sys/arch/arm/include/arm32/types.h Tue Feb 11 13:31:23 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.12 2018/01/24 09:04:45 skrll Exp $ */ +/* $NetBSD: types.h,v 1.13 2020/02/11 13:31:23 skrll Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -38,13 +38,6 @@ #ifndef _ARM_ARM32_TYPES_H_ #define _ARM_ARM32_TYPES_H_ -#ifdef _KERNEL - -#ifdef _KERNEL_OPT -#include "opt_arm32_pmap.h" -#endif -#endif - #include /* pull in generic ARM definitions */ #define __HAVE_CPU_LWP_SETPRIVATE
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Fri Jan 17 20:28:14 UTC 2020 Modified Files: src/sys/arch/arm/include: types.h Log Message: Sort __HAVE_* defines To generate a diff of this commit: cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/include/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/types.h diff -u src/sys/arch/arm/include/types.h:1.38 src/sys/arch/arm/include/types.h:1.39 --- src/sys/arch/arm/include/types.h:1.38 Sat Apr 6 03:06:25 2019 +++ src/sys/arch/arm/include/types.h Fri Jan 17 20:28:14 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.38 2019/04/06 03:06:25 thorpej Exp $ */ +/* $NetBSD: types.h,v 1.39 2020/01/17 20:28:14 skrll Exp $ */ /* * Copyright (c) 1990 The Regents of the University of California. @@ -79,14 +79,14 @@ typedef int __register_t; #define __SIMPLELOCK_LOCKED 1 #define __SIMPLELOCK_UNLOCKED 0 -#define __HAVE_SYSCALL_INTERN -#define __HAVE_NEW_STYLE_BUS_H -#define __HAVE_MINIMAL_EMUL -#define __HAVE_CPU_DATA_FIRST -#define __HAVE___LWP_GETPRIVATE_FAST #define __HAVE_COMMON___TLS_GET_ADDR -#define __HAVE_TLS_VARIANT_I +#define __HAVE_CPU_DATA_FIRST +#define __HAVE_MINIMAL_EMUL +#define __HAVE_NEW_STYLE_BUS_H #define __HAVE_OLD_DISKLABEL +#define __HAVE_SYSCALL_INTERN +#define __HAVE_TLS_VARIANT_I +#define __HAVE___LWP_GETPRIVATE_FAST #if defined(__ARM_EABI__) && defined(_ARM_ARCH_6) #define __HAVE_ATOMIC64_OPS #endif
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: christos Date: Mon Jan 13 20:36:44 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Revert previous; we don't want arm to have variable page size. Instead nick@ is fixing the cache pages issue to use a separate pool. To generate a diff of this commit: cvs rdiff -u -r1.46 -r1.47 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.46 src/sys/arch/arm/include/arm32/vmparam.h:1.47 --- src/sys/arch/arm/include/arm32/vmparam.h:1.46 Sat Jan 11 14:06:34 2020 +++ src/sys/arch/arm/include/arm32/vmparam.h Mon Jan 13 15:36:44 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.46 2020/01/11 19:06:34 christos Exp $ */ +/* $NetBSD: vmparam.h,v 1.47 2020/01/13 20:36:44 christos Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -84,11 +84,6 @@ #define PAGE_SIZE (1 << PAGE_SHIFT) #define PAGE_MASK (PAGE_SIZE - 1) -#define MIN_PAGE_SHIFT 12 /* normal */ -#define MAX_PAGE_SHIFT 13 /* _ARM_ARCH_6 */ -#define MIN_PAGE_SIZE (1 << MIN_PAGE_SHIFT) -#define MAX_PAGE_SIZE (1 << MAX_PAGE_SHIFT) - /* * Mach derived constants */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: christos
Date: Sun Jan 12 20:06:52 UTC 2020
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
fix -Wsign-compare because module tests trigger it.
To generate a diff of this commit:
cvs rdiff -u -r1.157 -r1.158 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.157 src/sys/arch/arm/include/arm32/pmap.h:1.158
--- src/sys/arch/arm/include/arm32/pmap.h:1.157 Tue Dec 10 13:02:14 2019
+++ src/sys/arch/arm/include/arm32/pmap.h Sun Jan 12 15:06:52 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.157 2019/12/10 18:02:14 ad Exp $ */
+/* $NetBSD: pmap.h,v 1.158 2020/01/12 20:06:52 christos Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -564,13 +564,13 @@ l1pte_set(pt_entry_t *pdep, pt_entry_t p
*pdep = pde;
if (l1pte_page_p(pde)) {
KASSERTMSGuintptr_t)pdep / sizeof(pde)) & (PAGE_SIZE / L2_T_SIZE - 1)) == 0, "%p", pdep);
- for (size_t k = 1; k < PAGE_SIZE / L2_T_SIZE; k++) {
+ for (int k = 1; k < PAGE_SIZE / L2_T_SIZE; k++) {
pde += L2_T_SIZE;
pdep[k] = pde;
}
} else if (l1pte_supersection_p(pde)) {
KASSERTMSGuintptr_t)pdep / sizeof(pde)) & (L1_SS_SIZE / L1_S_SIZE - 1)) == 0, "%p", pdep);
- for (size_t k = 1; k < L1_SS_SIZE / L1_S_SIZE; k++) {
+ for (int k = 1; k < L1_SS_SIZE / L1_S_SIZE; k++) {
pdep[k] = pde;
}
}
@@ -589,12 +589,12 @@ l2pte_set(pt_entry_t *ptep, pt_entry_t p
{
if (l1pte_lpage_p(pte)) {
KASSERTMSGuintptr_t)ptep / sizeof(pte)) & (L2_L_SIZE / L2_S_SIZE - 1)) == 0, "%p", ptep);
- for (size_t k = 0; k < L2_L_SIZE / L2_S_SIZE; k++) {
+ for (int k = 0; k < L2_L_SIZE / L2_S_SIZE; k++) {
*ptep++ = pte;
}
} else {
KASSERTMSGuintptr_t)ptep / sizeof(pte)) & (PAGE_SIZE / L2_S_SIZE - 1)) == 0, "%p", ptep);
- for (size_t k = 0; k < PAGE_SIZE / L2_S_SIZE; k++) {
+ for (int k = 0; k < PAGE_SIZE / L2_S_SIZE; k++) {
KASSERTMSG(*ptep == opte, "%#x [*%p] != %#x", *ptep, ptep, opte);
*ptep++ = pte;
pte += L2_S_SIZE;
@@ -609,7 +609,7 @@ l2pte_reset(pt_entry_t *ptep)
{
KASSERTMSGuintptr_t)ptep / sizeof(*ptep)) & (PAGE_SIZE / L2_S_SIZE - 1)) == 0, "%p", ptep);
*ptep = 0;
- for (vsize_t k = 1; k < PAGE_SIZE / L2_S_SIZE; k++) {
+ for (int k = 1; k < PAGE_SIZE / L2_S_SIZE; k++) {
ptep[k] = 0;
}
}
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: christos Date: Sat Jan 11 19:06:35 UTC 2020 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Define the min and max page size supported for the benefit of jemalloc To generate a diff of this commit: cvs rdiff -u -r1.45 -r1.46 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.45 src/sys/arch/arm/include/arm32/vmparam.h:1.46 --- src/sys/arch/arm/include/arm32/vmparam.h:1.45 Wed Jun 19 05:54:42 2019 +++ src/sys/arch/arm/include/arm32/vmparam.h Sat Jan 11 14:06:34 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.45 2019/06/19 09:54:42 skrll Exp $ */ +/* $NetBSD: vmparam.h,v 1.46 2020/01/11 19:06:34 christos Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -84,6 +84,11 @@ #define PAGE_SIZE (1 << PAGE_SHIFT) #define PAGE_MASK (PAGE_SIZE - 1) +#define MIN_PAGE_SHIFT 12 /* normal */ +#define MAX_PAGE_SHIFT 13 /* _ARM_ARCH_6 */ +#define MIN_PAGE_SIZE (1 << MIN_PAGE_SHIFT) +#define MAX_PAGE_SIZE (1 << MAX_PAGE_SHIFT) + /* * Mach derived constants */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: ad
Date: Tue Dec 10 18:02:14 UTC 2019
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
pg->phys_addr -> VM_PAGE_TO_PHYS(pg)
To generate a diff of this commit:
cvs rdiff -u -r1.156 -r1.157 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.156 src/sys/arch/arm/include/arm32/pmap.h:1.157
--- src/sys/arch/arm/include/arm32/pmap.h:1.156 Thu Oct 18 09:01:52 2018
+++ src/sys/arch/arm/include/arm32/pmap.h Tue Dec 10 18:02:14 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.156 2018/10/18 09:01:52 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.157 2019/12/10 18:02:14 ad Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -1158,7 +1158,7 @@ struct vm_page_md {
*/
#if ARM_MMU_V6 > 0
#define VM_MDPAGE_PVH_ATTRS_INIT(pg) \
- (pg)->mdpage.pvh_attrs = (pg)->phys_addr & arm_cache_prefer_mask
+ (pg)->mdpage.pvh_attrs = VM_PAGE_TO_PHYS(pg) & arm_cache_prefer_mask
#else
#define VM_MDPAGE_PVH_ATTRS_INIT(pg) \
(pg)->mdpage.pvh_attrs = 0
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Thu May 2 15:37:10 UTC 2019 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: It's the Normal Memory Remap Register (not Normal Region Remap Register) To generate a diff of this commit: cvs rdiff -u -r1.126 -r1.127 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.126 src/sys/arch/arm/include/armreg.h:1.127 --- src/sys/arch/arm/include/armreg.h:1.126 Thu May 2 11:49:04 2019 +++ src/sys/arch/arm/include/armreg.h Thu May 2 15:37:10 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.126 2019/05/02 11:49:04 skrll Exp $ */ +/* $NetBSD: armreg.h,v 1.127 2019/05/02 15:37:10 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -870,8 +870,8 @@ ARMREG_READ_INLINE(l2ctrl, "p15,1,%0,c9, /* cp10 c10 registers */ ARMREG_READ_INLINE(prrr, "p15,0,%0,c10,c2,0") /* Primary Region Remap Register */ ARMREG_WRITE_INLINE(prrr, "p15,0,%0,c10,c2,0") /* Primary Region Remap Register */ -ARMREG_READ_INLINE(nmrr, "p15,0,%0,c10,c2,1") /* Normal Region Remap Register */ -ARMREG_WRITE_INLINE(nmrr, "p15,0,%0,c10,c2,1") /* Normal Region Remap Register */ +ARMREG_READ_INLINE(nmrr, "p15,0,%0,c10,c2,1") /* Normal Memory Remap Register */ +ARMREG_WRITE_INLINE(nmrr, "p15,0,%0,c10,c2,1") /* Normal Memory Remap Register */ /* cp15 c13 registers */ ARMREG_READ_INLINE(contextidr, "p15,0,%0,c13,c0,1") /* Context ID Register */ ARMREG_WRITE_INLINE(contextidr, "p15,0,%0,c13,c0,1") /* Context ID Register */
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Thu May 2 11:49:04 UTC 2019 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: Fix Normal Region Remap Register bitmask names To generate a diff of this commit: cvs rdiff -u -r1.125 -r1.126 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.125 src/sys/arch/arm/include/armreg.h:1.126 --- src/sys/arch/arm/include/armreg.h:1.125 Wed Jan 30 02:02:23 2019 +++ src/sys/arch/arm/include/armreg.h Thu May 2 11:49:04 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.125 2019/01/30 02:02:23 jmcneill Exp $ */ +/* $NetBSD: armreg.h,v 1.126 2019/05/02 11:49:04 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -523,12 +523,12 @@ #define TTBCR_L_EPD0 __BIT(7) // Don't use TTBR0 #define TTBCR_L_T0SZ __BITS(2,0) // TTBR0 size offset -#define NRRR_ORn(n) __BITS(17+2*(n),16+2*(n)) // Outer Cacheable mappings -#define NRRR_IRn(n) __BITS(1+2*(n),0+2*(n)) // Inner Cacheable mappings -#define NRRR_NC 0 // non-cacheable -#define NRRR_WB_WA 1 // write-back write-allocate -#define NRRR_WT 2 // write-through -#define NRRR_WB 3 // write-back +#define NMRR_ORn(n) __BITS(17+2*(n),16+2*(n)) // Outer Cacheable mappings +#define NMRR_IRn(n) __BITS(1+2*(n),0+2*(n)) // Inner Cacheable mappings +#define NMRR_NC 0 // non-cacheable +#define NMRR_WBWA 1 // write-back write-allocate +#define NMRR_WT 2 // write-through +#define NMRR_WB 3 // write-back #define PRRR_NOSn(n) __BITS(24+2*(n))// Memory region is Inner Shareable #define PRRR_NS1 __BIT(19) // Normal Shareable S=1 is Shareable #define PRRR_NS0 __BIT(18) // Normal Shareable S=0 is Shareable @@ -870,8 +870,8 @@ ARMREG_READ_INLINE(l2ctrl, "p15,1,%0,c9, /* cp10 c10 registers */ ARMREG_READ_INLINE(prrr, "p15,0,%0,c10,c2,0") /* Primary Region Remap Register */ ARMREG_WRITE_INLINE(prrr, "p15,0,%0,c10,c2,0") /* Primary Region Remap Register */ -ARMREG_READ_INLINE(nrrr, "p15,0,%0,c10,c2,1") /* Normal Region Remap Register */ -ARMREG_WRITE_INLINE(nrrr, "p15,0,%0,c10,c2,1") /* Normal Region Remap Register */ +ARMREG_READ_INLINE(nmrr, "p15,0,%0,c10,c2,1") /* Normal Region Remap Register */ +ARMREG_WRITE_INLINE(nmrr, "p15,0,%0,c10,c2,1") /* Normal Region Remap Register */ /* cp15 c13 registers */ ARMREG_READ_INLINE(contextidr, "p15,0,%0,c13,c0,1") /* Context ID Register */ ARMREG_WRITE_INLINE(contextidr, "p15,0,%0,c13,c0,1") /* Context ID Register */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: christos Date: Sat Mar 30 21:06:42 UTC 2019 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Need to include so that the _ARM_CPU* macros get defined so that we always select the correct page size (8K for armv6+). To generate a diff of this commit: cvs rdiff -u -r1.43 -r1.44 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.43 src/sys/arch/arm/include/arm32/vmparam.h:1.44 --- src/sys/arch/arm/include/arm32/vmparam.h:1.43 Wed Mar 27 13:15:29 2019 +++ src/sys/arch/arm/include/arm32/vmparam.h Sat Mar 30 17:06:42 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.43 2019/03/27 17:15:29 christos Exp $ */ +/* $NetBSD: vmparam.h,v 1.44 2019/03/30 21:06:42 christos Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -43,6 +43,7 @@ * Virtual Memory parameters common to all arm32 platforms. */ +#include #include #include
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Sun Mar 17 08:34:20 UTC 2019
Modified Files:
src/sys/arch/arm/include: undefined.h
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/include/undefined.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/undefined.h
diff -u src/sys/arch/arm/include/undefined.h:1.12 src/sys/arch/arm/include/undefined.h:1.13
--- src/sys/arch/arm/include/undefined.h:1.12 Sat Mar 14 14:45:55 2009
+++ src/sys/arch/arm/include/undefined.h Sun Mar 17 08:34:20 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: undefined.h,v 1.12 2009/03/14 14:45:55 dsl Exp $ */
+/* $NetBSD: undefined.h,v 1.13 2019/03/17 08:34:20 skrll Exp $ */
/*
* Copyright (c) 1995-1996 Mark Brinicombe.
@@ -64,7 +64,7 @@ enum arm_coprocs {
VFP_COPROC2 = 11,
DEBUG_COPROC = 14,
SYSTEM_COPROC = 15,
- /*
+ /*
*The following are not really co-processors, but are on the end
* of the unknown instruction table for each coproc.
*/
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Mon Feb 4 13:06:39 UTC 2019 Modified Files: src/sys/arch/arm/include/arm32: param.h Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/include/arm32/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/param.h diff -u src/sys/arch/arm/include/arm32/param.h:1.25 src/sys/arch/arm/include/arm32/param.h:1.26 --- src/sys/arch/arm/include/arm32/param.h:1.25 Fri Jun 9 01:16:54 2017 +++ src/sys/arch/arm/include/arm32/param.h Mon Feb 4 13:06:39 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.25 2017/06/09 01:16:54 chs Exp $ */ +/* $NetBSD: param.h,v 1.26 2019/02/04 13:06:39 skrll Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -98,7 +98,7 @@ #define arm_btop(x) ((unsigned)(x) >> PGSHIFT) #define arm_ptob(x) ((unsigned)(x) << PGSHIFT) #define arm_trunc_page(x) ((unsigned)(x) & ~PGOFSET) - + #ifdef _KERNEL #ifndef _LOCORE #ifndef __HIDE_DELAY
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: dholland Date: Sun Jan 27 04:52:07 UTC 2019 Modified Files: src/sys/arch/arm/include: asm.h Log Message: fix duplicated chunk from merge To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/include/asm.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/asm.h diff -u src/sys/arch/arm/include/asm.h:1.29 src/sys/arch/arm/include/asm.h:1.30 --- src/sys/arch/arm/include/asm.h:1.29 Sun Jan 27 02:08:37 2019 +++ src/sys/arch/arm/include/asm.h Sun Jan 27 04:52:07 2019 @@ -1,33 +1,4 @@ -/* $NetBSD: asm.h,v 1.29 2019/01/27 02:08:37 pgoyette Exp $ */ - -/*- - * Copyright (c) 2014 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Matt Thomas of 3am Software Foundry. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - *notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - *notice, this list of conditions and the following disclaimer in the - *documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ +/* $NetBSD: asm.h,v 1.30 2019/01/27 04:52:07 dholland Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc.
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: jmcneill Date: Thu Jan 3 15:10:37 UTC 2019 Modified Files: src/sys/arch/arm/include: cputypes.h Log Message: Add CPU_ID_CORTEXA15R4 To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/include/cputypes.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cputypes.h diff -u src/sys/arch/arm/include/cputypes.h:1.4 src/sys/arch/arm/include/cputypes.h:1.5 --- src/sys/arch/arm/include/cputypes.h:1.4 Sat Nov 24 15:44:13 2018 +++ src/sys/arch/arm/include/cputypes.h Thu Jan 3 15:10:37 2019 @@ -1,4 +1,4 @@ -/* $NetBSD: cputypes.h,v 1.4 2018/11/24 15:44:13 skrll Exp $ */ +/* $NetBSD: cputypes.h,v 1.5 2019/01/03 15:10:37 jmcneill Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -153,6 +153,7 @@ #define CPU_ID_CORTEXA9R4 0x414fc090 #define CPU_ID_CORTEXA15R2 0x412fc0f0 #define CPU_ID_CORTEXA15R3 0x413fc0f0 +#define CPU_ID_CORTEXA15R4 0x414fc0f0 #define CPU_ID_CORTEXA17R1 0x411fc0e0 #define CPU_ID_CORTEXA35R0 0x410fd040 #define CPU_ID_CORTEXA53R0 0x410fd030
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: alnsn Date: Tue Dec 11 19:38:42 UTC 2018 Modified Files: src/sys/arch/arm/include: cpufunc.h Log Message: Don't exclude code from rump kernel build. To generate a diff of this commit: cvs rdiff -u -r1.81 -r1.82 src/sys/arch/arm/include/cpufunc.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpufunc.h diff -u src/sys/arch/arm/include/cpufunc.h:1.81 src/sys/arch/arm/include/cpufunc.h:1.82 --- src/sys/arch/arm/include/cpufunc.h:1.81 Sat Oct 20 06:35:34 2018 +++ src/sys/arch/arm/include/cpufunc.h Tue Dec 11 19:38:42 2018 @@ -46,8 +46,6 @@ #ifdef _KERNEL -#if !defined(_RUMPKERNEL) - #include #include @@ -415,8 +413,6 @@ extern struct arm_cache_info arm_scache; extern uint32_t cpu_ttb; -#endif /* _GUMP */ - #endif /* _KERNEL */ #if defined(_KERNEL) || defined(_KMEMUSER)
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Sat Nov 24 15:44:13 UTC 2018 Modified Files: src/sys/arch/arm/include: cputypes.h Log Message: Add some ThunderX CPU Ids To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/include/cputypes.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cputypes.h diff -u src/sys/arch/arm/include/cputypes.h:1.3 src/sys/arch/arm/include/cputypes.h:1.4 --- src/sys/arch/arm/include/cputypes.h:1.3 Wed Oct 3 05:43:37 2018 +++ src/sys/arch/arm/include/cputypes.h Sat Nov 24 15:44:13 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: cputypes.h,v 1.3 2018/10/03 05:43:37 skrll Exp $ */ +/* $NetBSD: cputypes.h,v 1.4 2018/11/24 15:44:13 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -178,9 +178,13 @@ #define CPU_ID_CORTEX_A75_P(n) ((n & 0xff0ff0f0) == 0x410fd0a0) #define CPU_ID_THUNDERXRX 0x43000a10 +#define CPU_ID_THUNDERXP1d0 0x43000a10 +#define CPU_ID_THUNDERXP1d1 0x43000a11 +#define CPU_ID_THUNDERXP2d1 0x431f0a11 #define CPU_ID_THUNDERX81XXRX 0x43000a20 #define CPU_ID_THUNDERX83XXRX 0x43000a30 #define CPU_ID_THUNDERX2RX 0x43000af0 + #define CPU_ID_SA110 0x4401a100 #define CPU_ID_SA1100 0x4401a110 #define CPU_ID_TI925T 0x54029250
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Sun Oct 28 14:46:59 UTC 2018
Modified Files:
src/sys/arch/arm/include/arm32: frame.h
Log Message:
Consistency - NFC
To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/arm/include/arm32/frame.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/frame.h
diff -u src/sys/arch/arm/include/arm32/frame.h:1.46 src/sys/arch/arm/include/arm32/frame.h:1.47
--- src/sys/arch/arm/include/arm32/frame.h:1.46 Sun Oct 28 14:45:02 2018
+++ src/sys/arch/arm/include/arm32/frame.h Sun Oct 28 14:46:59 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.46 2018/10/28 14:45:02 skrll Exp $ */
+/* $NetBSD: frame.h,v 1.47 2018/10/28 14:46:59 skrll Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -402,7 +402,7 @@ LOCK_CAS_DEBUG_LOCALS
ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
mov r0, r0; /* NOP for previous instruction */ \
add sp, sp, #(TF_PC-TF_R0); /* Adjust the stack pointer */ \
- ldr lr, [sp], #0x0004 /* Pop the return address */
+ ldr lr, [sp], #4 /* Pop the return address */
#define PULLIDLEFRAME \
add sp, sp, #TF_R4; /* Adjust the stack pointer */ \
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Sun Oct 28 14:45:02 UTC 2018
Modified Files:
src/sys/arch/arm/include/arm32: frame.h
Log Message:
Remove magic number
To generate a diff of this commit:
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/arm/include/arm32/frame.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/frame.h
diff -u src/sys/arch/arm/include/arm32/frame.h:1.45 src/sys/arch/arm/include/arm32/frame.h:1.46
--- src/sys/arch/arm/include/arm32/frame.h:1.45 Fri Jul 7 16:59:35 2017
+++ src/sys/arch/arm/include/arm32/frame.h Sun Oct 28 14:45:02 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.45 2017/07/07 16:59:35 skrll Exp $ */
+/* $NetBSD: frame.h,v 1.46 2018/10/28 14:45:02 skrll Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -484,7 +484,7 @@ LOCK_CAS_DEBUG_LOCALS
*/
#define PULLFRAMEFROMSVCANDEXIT \
- ldr r0, [sp], #0x0008; /* Pop the SPSR from stack */ \
+ ldr r0, [sp], #TF_R0; /* Pop the SPSR from stack */ \
msr spsr_fsxc, r0; /* restore SPSR */ \
ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
mov r0, r0; /* NOP for previous instruction */ \
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Sat Oct 27 13:26:23 UTC 2018 Modified Files: src/sys/arch/arm/include/arm32: vmparam.h Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/include/arm32/vmparam.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/vmparam.h diff -u src/sys/arch/arm/include/arm32/vmparam.h:1.41 src/sys/arch/arm/include/arm32/vmparam.h:1.42 --- src/sys/arch/arm/include/arm32/vmparam.h:1.41 Mon Feb 13 09:46:30 2017 +++ src/sys/arch/arm/include/arm32/vmparam.h Sat Oct 27 13:26:23 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.41 2017/02/13 09:46:30 skrll Exp $ */ +/* $NetBSD: vmparam.h,v 1.42 2018/10/27 13:26:23 skrll Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -48,7 +48,7 @@ #include #include /* pt_entry_t */ -#define __USE_TOPDOWN_VM +#define __USE_TOPDOWN_VM #define USRSTACK VM_MAXUSER_ADDRESS /*
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Thu Oct 25 07:13:55 UTC 2018
Modified Files:
src/sys/arch/arm/include: cpu.h
Log Message:
Align struct cpu_info member names. NFC.
To generate a diff of this commit:
cvs rdiff -u -r1.98 -r1.99 src/sys/arch/arm/include/cpu.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/cpu.h
diff -u src/sys/arch/arm/include/cpu.h:1.98 src/sys/arch/arm/include/cpu.h:1.99
--- src/sys/arch/arm/include/cpu.h:1.98 Thu Oct 18 09:01:52 2018
+++ src/sys/arch/arm/include/cpu.h Thu Oct 25 07:13:55 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.98 2018/10/18 09:01:52 skrll Exp $ */
+/* $NetBSD: cpu.h,v 1.99 2018/10/25 07:13:55 skrll Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -132,37 +132,49 @@ static inline void cpu_dosoftints(void);
#include
struct cpu_info {
- struct cpu_data ci_data; /* MI per-cpu data */
- device_t ci_dev; /* Device corresponding to this CPU */
- cpuid_t ci_cpuid;
- uint32_t ci_arm_cpuid; /* aggregate CPU id */
- uint32_t ci_arm_cputype; /* CPU type */
- uint32_t ci_arm_cpurev; /* CPU revision */
- uint32_t ci_ctrl; /* The CPU control register */
- int ci_cpl; /* current processor level (spl) */
- volatile int ci_astpending; /* */
- int ci_want_resched; /* resched() was called */
- int ci_intr_depth; /* */
- struct cpu_softc *ci_softc; /* platform softc */
- lwp_t *ci_softlwps[SOFTINT_COUNT];
- volatile uint32_t ci_softints;
- lwp_t *ci_curlwp; /* current lwp */
- lwp_t *ci_lastlwp; /* last lwp */
- struct evcnt ci_arm700bugcount;
- int32_t ci_mtx_count;
- int ci_mtx_oldspl;
- register_t ci_undefsave[3];
- uint32_t ci_vfp_id;
- uint64_t ci_lastintr;
- struct pmap_tlb_info *ci_tlb_info;
- struct pmap *ci_pmap_lastuser;
- struct pmap *ci_pmap_cur;
- tlb_asid_t ci_pmap_asid_cur;
- struct trapframe *ci_ddb_regs;
- struct evcnt ci_abt_evs[16];
- struct evcnt ci_und_ev;
- struct evcnt ci_und_cp15_ev;
- struct evcnt ci_vfp_evs[3];
+ struct cpu_data ci_data; /* MI per-cpu data */
+ device_t ci_dev; /* Device corresponding to this CPU */
+ cpuid_t ci_cpuid;
+ uint32_t ci_arm_cpuid; /* aggregate CPU id */
+ uint32_t ci_arm_cputype; /* CPU type */
+ uint32_t ci_arm_cpurev; /* CPU revision */
+ uint32_t ci_ctrl; /* The CPU control register */
+ int ci_cpl; /* current processor level (spl) */
+ volatile int ci_astpending; /* */
+ int ci_want_resched;/* resched() was called */
+ int ci_intr_depth; /* */
+
+ struct cpu_softc *
+ ci_softc; /* platform softc */
+
+ lwp_t * ci_softlwps[SOFTINT_COUNT];
+ volatile uint32_t
+ ci_softints;
+
+ lwp_t * ci_curlwp; /* current lwp */
+ lwp_t * ci_lastlwp; /* last lwp */
+
+ struct evcnt ci_arm700bugcount;
+ int32_t ci_mtx_count;
+ int ci_mtx_oldspl;
+ register_t ci_undefsave[3];
+ uint32_t ci_vfp_id;
+ uint64_t ci_lastintr;
+
+ struct pmap_tlb_info *
+ ci_tlb_info;
+ struct pmap * ci_pmap_lastuser;
+ struct pmap * ci_pmap_cur;
+ tlb_asid_t ci_pmap_asid_cur;
+
+ struct trapframe *
+ ci_ddb_regs;
+
+ struct evcnt ci_abt_evs[16];
+ struct evcnt ci_und_ev;
+ struct evcnt ci_und_cp15_ev;
+ struct evcnt ci_vfp_evs[3];
+
#if defined(MP_CPU_INFO_MEMBERS)
MP_CPU_INFO_MEMBERS
#endif
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Wed Oct 10 19:13:51 UTC 2018
Modified Files:
src/sys/arch/arm/include: types.h
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/include/types.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/types.h
diff -u src/sys/arch/arm/include/types.h:1.35 src/sys/arch/arm/include/types.h:1.36
--- src/sys/arch/arm/include/types.h:1.35 Thu Jul 12 10:46:42 2018
+++ src/sys/arch/arm/include/types.h Wed Oct 10 19:13:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.35 2018/07/12 10:46:42 maxv Exp $ */
+/* $NetBSD: types.h,v 1.36 2018/10/10 19:13:51 skrll Exp $ */
/*
* Copyright (c) 1990 The Regents of the University of California.
@@ -43,7 +43,7 @@ typedef struct label_t { /* Used by setj
int val[11];
} label_t;
#endif
-
+
#if defined(_KERNEL) || defined(_KMEMUSER) || defined(_KERNTYPES) || defined(_STANDALONE)
typedef unsigned long paddr_t;
typedef unsigned long psize_t;
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Wed Oct 3 05:43:37 UTC 2018 Modified Files: src/sys/arch/arm/include: cputypes.h Log Message: Add some Cavium CPU_IDs (implementor and primary part number only aka CPU_PARTMASK) To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/include/cputypes.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cputypes.h diff -u src/sys/arch/arm/include/cputypes.h:1.2 src/sys/arch/arm/include/cputypes.h:1.3 --- src/sys/arch/arm/include/cputypes.h:1.2 Tue May 1 10:10:31 2018 +++ src/sys/arch/arm/include/cputypes.h Wed Oct 3 05:43:37 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: cputypes.h,v 1.2 2018/05/01 10:10:31 ryo Exp $ */ +/* $NetBSD: cputypes.h,v 1.3 2018/10/03 05:43:37 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -176,6 +176,11 @@ #define CPU_ID_CORTEX_A72_P(n) ((n & 0xff0ff0f0) == 0x410fd080) #define CPU_ID_CORTEX_A73_P(n) ((n & 0xff0ff0f0) == 0x410fd090) #define CPU_ID_CORTEX_A75_P(n) ((n & 0xff0ff0f0) == 0x410fd0a0) + +#define CPU_ID_THUNDERXRX 0x43000a10 +#define CPU_ID_THUNDERX81XXRX 0x43000a20 +#define CPU_ID_THUNDERX83XXRX 0x43000a30 +#define CPU_ID_THUNDERX2RX 0x43000af0 #define CPU_ID_SA110 0x4401a100 #define CPU_ID_SA1100 0x4401a110 #define CPU_ID_TI925T 0x54029250
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: jmcneill Date: Thu Sep 6 22:30:34 UTC 2018 Modified Files: src/sys/arch/arm/include: pci_machdep.h Log Message: Define _PCI_HAVE_DMA64 for aarch64 To generate a diff of this commit: cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/include/pci_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/pci_machdep.h diff -u src/sys/arch/arm/include/pci_machdep.h:1.12 src/sys/arch/arm/include/pci_machdep.h:1.13 --- src/sys/arch/arm/include/pci_machdep.h:1.12 Wed Apr 19 12:58:59 2017 +++ src/sys/arch/arm/include/pci_machdep.h Thu Sep 6 22:30:34 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: pci_machdep.h,v 1.12 2017/04/19 12:58:59 jmcneill Exp $ */ +/* $NetBSD: pci_machdep.h,v 1.13 2018/09/06 22:30:34 jmcneill Exp $ */ /* * Modified for arm32 by Mark Brinicombe @@ -37,6 +37,10 @@ * Machine-specific definitions for PCI autoconfiguration. */ +#ifdef __aarch64__ +#define _PCI_HAVE_DMA64 +#endif + #include /*
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Wed Aug 29 11:29:27 UTC 2018
Modified Files:
src/sys/arch/arm/include: cpufunc.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.79 -r1.80 src/sys/arch/arm/include/cpufunc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/cpufunc.h
diff -u src/sys/arch/arm/include/cpufunc.h:1.79 src/sys/arch/arm/include/cpufunc.h:1.80
--- src/sys/arch/arm/include/cpufunc.h:1.79 Sun Apr 1 04:35:04 2018
+++ src/sys/arch/arm/include/cpufunc.h Wed Aug 29 11:29:27 2018
@@ -358,7 +358,7 @@ cpsid(register_t psw)
case I32_bit|F32_bit: __asm("cpsid\tif"); break;
}
return oldpsw;
-#else
+#else
return disable_interrupts(psw);
#endif
}
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Wed Aug 15 06:13:56 UTC 2018 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: Some CPU specific ACTLR bit definitions To generate a diff of this commit: cvs rdiff -u -r1.123 -r1.124 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.123 src/sys/arch/arm/include/armreg.h:1.124 --- src/sys/arch/arm/include/armreg.h:1.123 Sun Aug 12 17:21:36 2018 +++ src/sys/arch/arm/include/armreg.h Wed Aug 15 06:13:56 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.123 2018/08/12 17:21:36 skrll Exp $ */ +/* $NetBSD: armreg.h,v 1.124 2018/08/15 06:13:56 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -282,6 +282,20 @@ #define PJ4B_AUXFMC0_DCSLFD __BIT(2) /* Disable DC Speculative linefill */ #define PJ4B_AUXFMC0_FW __BIT(8) /* alias of PJ4B_AUXCTL_FW*/ +/* Cortex-A5 Auxiliary Control Register (CP15 register 1, opcode 1) */ +#define CORTEXA5_ACTLR_FW __BIT(0) +#define CORTEXA5_ACTLR_SMP __BIT(6) /* Inner Cache Shared is cacheable */ +#define CORTEXA5_ACTLR_EXCL __BIT(7) /* Exclusive L1/L2 cache control */ + +/* Cortex-A7 Auxiliary Control Register (CP15 register 1, opcode 1) */ +#define CORTEXA7_ACTLR_L1ALIAS __BIT(0) /* Enables L1 cache alias checks */ +#define CORTEXA7_ACTLR_L2EN __BIT(1) /* Enables L2 cache */ +#define CORTEXA7_ACTLR_SMP __BIT(6) /* SMP */ + +/* Cortex-A8 Auxiliary Control Register (CP15 register 1, opcode 1) */ +#define CORTEXA8_ACTLR_L1ALIAS __BIT(0) /* Enables L1 cache alias checks */ +#define CORTEXA8_ACTLR_L2EN __BIT(1) /* Enables L2 cache */ + /* Cortex-A9 Auxiliary Control Register (CP15 register 1, opcode 1) */ #define CORTEXA9_AUXCTL_FW 0x0001 /* Cache and TLB updates broadcast */ #define CORTEXA9_AUXCTL_L2PE 0x0002 /* Prefetch hint enable */ @@ -296,6 +310,7 @@ #define CORTEXA15_ACTLR_BTB __BIT(0) /* Cache and TLB updates broadcast */ #define CORTEXA15_ACTLR_SMP __BIT(6) /* SMP */ #define CORTEXA15_ACTLR_IOBEU __BIT(15) /* In order issue in Branch Exec Unit */ +#define CORTEXA15_ACTLR_SDEH __BIT(31) /* snoop-delayed exclusive handling */ /* Marvell Feroceon Extra Features Register (CP15 register 1, opcode2 0) */ #define FC_DCACHE_REPL_LOCK 0x8000 /* Replace DCache Lock */
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: jakllsch Date: Fri Aug 10 17:05:22 UTC 2018 Modified Files: src/sys/arch/arm/include: int_const.h Log Message: fix arm int_const.h for aarch64 To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/include/int_const.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/int_const.h diff -u src/sys/arch/arm/include/int_const.h:1.4 src/sys/arch/arm/include/int_const.h:1.5 --- src/sys/arch/arm/include/int_const.h:1.4 Fri Jul 25 21:43:13 2014 +++ src/sys/arch/arm/include/int_const.h Fri Aug 10 17:05:22 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: int_const.h,v 1.4 2014/07/25 21:43:13 joerg Exp $ */ +/* $NetBSD: int_const.h,v 1.5 2018/08/10 17:05:22 jakllsch Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -44,17 +44,31 @@ #define INT8_C(c) c #define INT16_C(c) c #define INT32_C(c) c +#ifdef _LP64 +#define INT64_C(c) c ## L +#else #define INT64_C(c) c ## LL +#endif #define UINT8_C(c) c #define UINT16_C(c) c #define UINT32_C(c) c ## U +#ifdef _LP64 +#define UINT64_C(c) c ## UL +#else #define UINT64_C(c) c ## ULL +#endif /* 7.18.4.2 Macros for greatest-width integer constants */ +#ifdef _LP64 +#define INTMAX_C(c) c ## L +#define UINTMAX_C(c) c ## UL +#else #define INTMAX_C(c) c ## LL #define UINTMAX_C(c) c ## ULL #endif +#endif /* !__INTMAX_C_SUFFIX__ */ + #endif /* !_ARM_INT_CONST_H_ */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Sun Aug 5 06:18:05 UTC 2018
Modified Files:
src/sys/arch/arm/include/arm32: machdep.h
Log Message:
Expose kern_vtopdiff
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/include/arm32/machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/machdep.h
diff -u src/sys/arch/arm/include/arm32/machdep.h:1.24 src/sys/arch/arm/include/arm32/machdep.h:1.25
--- src/sys/arch/arm/include/arm32/machdep.h:1.24 Fri Aug 3 15:46:41 2018
+++ src/sys/arch/arm/include/arm32/machdep.h Sun Aug 5 06:18:05 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.h,v 1.24 2018/08/03 15:46:41 skrll Exp $ */
+/* $NetBSD: machdep.h,v 1.25 2018/08/05 06:18:05 skrll Exp $ */
#ifndef _ARM32_MACHDEP_H_
#define _ARM32_MACHDEP_H_
@@ -52,6 +52,8 @@ extern char *booted_kernel;
extern volatile uint32_t arm_cpu_hatched;
extern volatile uint32_t arm_cpu_mbox;
extern u_int arm_cpu_max;
+extern u_long kern_vtopdiff;
+
/* misc prototypes used by the many arm machdeps */
void cortex_pmc_ccnt_init(void);
@@ -74,16 +76,12 @@ struct boot_physmem;
static inline paddr_t
aarch32_kern_vtophys(vaddr_t va)
{
- extern u_long kern_vtopdiff;
-
return va - kern_vtopdiff;
}
static inline vaddr_t
aarch32_kern_phystov(paddr_t pa)
{
- extern u_long kern_vtopdiff;
-
return pa + kern_vtopdiff;
}
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Wed Aug 1 13:48:01 UTC 2018 Modified Files: src/sys/arch/arm/include/arm32: machdep.h Log Message: s/_ARM32_BOOT_MACHDEP_H_/_ARM32_MACHDEP_H_/ in multiple inclusion protection. To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/include/arm32/machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/machdep.h diff -u src/sys/arch/arm/include/arm32/machdep.h:1.22 src/sys/arch/arm/include/arm32/machdep.h:1.23 --- src/sys/arch/arm/include/arm32/machdep.h:1.22 Sun Jul 15 05:16:41 2018 +++ src/sys/arch/arm/include/arm32/machdep.h Wed Aug 1 13:48:00 2018 @@ -1,7 +1,7 @@ -/* $NetBSD: machdep.h,v 1.22 2018/07/15 05:16:41 maxv Exp $ */ +/* $NetBSD: machdep.h,v 1.23 2018/08/01 13:48:00 skrll Exp $ */ -#ifndef _ARM32_BOOT_MACHDEP_H_ -#define _ARM32_BOOT_MACHDEP_H_ +#ifndef _ARM32_MACHDEP_H_ +#define _ARM32_MACHDEP_H_ /* Define various stack sizes in pages */ #ifndef IRQ_STACK_SIZE
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: jmcneill Date: Sun Jul 15 23:46:57 UTC 2018 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: Add some PMC event registers To generate a diff of this commit: cvs rdiff -u -r1.121 -r1.122 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.121 src/sys/arch/arm/include/armreg.h:1.122 --- src/sys/arch/arm/include/armreg.h:1.121 Mon May 14 17:15:54 2018 +++ src/sys/arch/arm/include/armreg.h Sun Jul 15 23:46:57 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.121 2018/05/14 17:15:54 joerg Exp $ */ +/* $NetBSD: armreg.h,v 1.122 2018/07/15 23:46:57 jmcneill Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -835,8 +835,16 @@ ARMREG_READ_INLINE(pmcntenclr, "p15,0,%0 ARMREG_WRITE_INLINE(pmcntenclr, "p15,0,%0,c9,c12,2") /* PMC Count Enable Clear */ ARMREG_READ_INLINE(pmovsr, "p15,0,%0,c9,c12,3") /* PMC Overflow Flag Status */ ARMREG_WRITE_INLINE(pmovsr, "p15,0,%0,c9,c12,3") /* PMC Overflow Flag Status */ +ARMREG_READ_INLINE(pmselr, "p15,0,%0,c9,c12,5") /* PMC Event Counter Selection */ +ARMREG_WRITE_INLINE(pmselr, "p15,0,%0,c9,c12,5") /* PMC Event Counter Selection */ +ARMREG_READ_INLINE(pmceid0, "p15,0,%0,c9,c12,6") /* PMC Event ID 0 */ +ARMREG_READ_INLINE(pmceid1, "p15,0,%0,c9,c12,7") /* PMC Event ID 1 */ ARMREG_READ_INLINE(pmccntr, "p15,0,%0,c9,c13,0") /* PMC Cycle Counter */ ARMREG_WRITE_INLINE(pmccntr, "p15,0,%0,c9,c13,0") /* PMC Cycle Counter */ +ARMREG_READ_INLINE(pmxevtyper, "p15,0,%0,c9,c13,1") /* PMC Event Type Select */ +ARMREG_WRITE_INLINE(pmxevtyper, "p15,0,%0,c9,c13,1") /* PMC Event Type Select */ +ARMREG_READ_INLINE(pmxevcntr, "p15,0,%0,c9,c13,2") /* PMC Event Count */ +ARMREG_WRITE_INLINE(pmxevcntr, "p15,0,%0,c9,c13,2") /* PMC Event Count */ ARMREG_READ_INLINE(pmuserenr, "p15,0,%0,c9,c14,0") /* PMC User Enable */ ARMREG_WRITE_INLINE(pmuserenr, "p15,0,%0,c9,c14,0") /* PMC User Enable */ ARMREG_READ_INLINE(pmintenset, "p15,0,%0,c9,c14,1") /* PMC Interrupt Enable Set */
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: christos Date: Sun Jul 15 00:36:13 UTC 2018 Modified Files: src/sys/arch/arm/include: int_fmtio.h Log Message: Fix formats for gcc where int64 is long not long long (like clang which should be changed). To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/include/int_fmtio.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/int_fmtio.h diff -u src/sys/arch/arm/include/int_fmtio.h:1.9 src/sys/arch/arm/include/int_fmtio.h:1.10 --- src/sys/arch/arm/include/int_fmtio.h:1.9 Wed Aug 13 15:48:17 2014 +++ src/sys/arch/arm/include/int_fmtio.h Sat Jul 14 20:36:13 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: int_fmtio.h,v 1.9 2014/08/13 19:48:17 matt Exp $ */ +/* $NetBSD: int_fmtio.h,v 1.10 2018/07/15 00:36:13 christos Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -43,31 +43,57 @@ #define PRId8 "d" /* int8_t */ #define PRId16 "d" /* int16_t */ #define PRId32 "d" /* int32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRId64 "lld" /* int64_t */ +#else +#define PRId64 "ld" /* int64_t */ +#endif #define PRIdLEAST8 "d" /* int_least8_t */ #define PRIdLEAST16 "d" /* int_least16_t */ #define PRIdLEAST32 "d" /* int_least32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIdLEAST64 "lld" /* int_least64_t */ +#else +#define PRIdLEAST64 "ld" /* int_least64_t */ +#endif #define PRIdFAST8 "d" /* int_fast8_t */ #define PRIdFAST16 "d" /* int_fast16_t */ #define PRIdFAST32 "d" /* int_fast32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIdFAST64 "lld" /* int_fast64_t */ #define PRIdMAX "lld" /* intmax_t */ +#else +#define PRIdFAST64 "ld" /* int_fast64_t */ +#define PRIdMAX "ld" /* intmax_t */ +#endif #define PRIdPTR "ld" /* intptr_t */ #define PRIi8 "i" /* int8_t */ #define PRIi16 "i" /* int16_t */ #define PRIi32 "i" /* int32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIi64 "lli" /* int64_t */ +#else +#define PRIi64 "li" /* int64_t */ +#endif #define PRIiLEAST8 "i" /* int_least8_t */ #define PRIiLEAST16 "i" /* int_least16_t */ #define PRIiLEAST32 "i" /* int_least32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIiLEAST64 "lli" /* int_least64_t */ +#else +#define PRIiLEAST64 "li" /* int_least64_t */ +#endif #define PRIiFAST8 "i" /* int_fast8_t */ #define PRIiFAST16 "i" /* int_fast16_t */ #define PRIiFAST32 "i" /* int_fast32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIiFAST64 "lli" /* int_fast64_t */ #define PRIiMAX "lli" /* intmax_t */ +#else +#define PRIiFAST64 "li" /* int_fast64_t */ +#define PRIiMAX "li" /* intmax_t */ +#endif #define PRIiPTR "li" /* intptr_t */ /* fprintf macros for unsigned integers */ @@ -75,61 +101,113 @@ #define PRIo8 "o" /* uint8_t */ #define PRIo16 "o" /* uint16_t */ #define PRIo32 "o" /* uint32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIo64 "llo" /* uint64_t */ +#else +#define PRIo64 "lo" /* uint64_t */ +#endif #define PRIoLEAST8 "o" /* uint_least8_t */ #define PRIoLEAST16 "o" /* uint_least16_t */ #define PRIoLEAST32 "o" /* uint_least32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIoLEAST64 "llo" /* uint_least64_t */ +#else +#define PRIoLEAST64 "lo" /* uint_least64_t */ +#endif #define PRIoFAST8 "o" /* uint_fast8_t */ #define PRIoFAST16 "o" /* uint_fast16_t */ #define PRIoFAST32 "o" /* uint_fast32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIoFAST64 "llo" /* uint_fast64_t */ #define PRIoMAX "llo" /* uintmax_t */ +#else +#define PRIoFAST64 "lo" /* uint_fast64_t */ +#define PRIoMAX "lo" /* uintmax_t */ +#endif #define PRIoPTR "lo" /* uintptr_t */ #define PRIu8 "u" /* uint8_t */ #define PRIu16 "u" /* uint16_t */ #define PRIu32 "u" /* uint32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIu64 "llu" /* uint64_t */ +#else +#define PRIu64 "lu" /* uint64_t */ +#endif #define PRIuLEAST8 "u" /* uint_least8_t */ #define PRIuLEAST16 "u" /* uint_least16_t */ #define PRIuLEAST32 "u" /* uint_least32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIuLEAST64 "llu" /* uint_least64_t */ +#else +#define PRIuLEAST64 "lu" /* uint_least64_t */ +#endif #define PRIuFAST8 "u" /* uint_fast8_t */ #define PRIuFAST16 "u" /* uint_fast16_t */ #define PRIuFAST32 "u" /* uint_fast32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIuFAST64 "llu" /* uint_fast64_t */ #define PRIuMAX "llu" /* uintmax_t */ +#else +#define PRIuFAST64 "lu" /* uint_fast64_t */ +#define PRIuMAX "lu" /* uintmax_t */ +#endif #define PRIuPTR "lu" /* uintptr_t */ #define PRIx8 "x" /* uint8_t */ #define PRIx16 "x" /* uint16_t */ #define PRIx32 "x" /* uint32_t */ +#if defined(__clang__) || !defined(_LP64) #define PRIx64 "llx" /* uint64_t */ +#else +#define PRIx64 "lx" /*
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: ryo Date: Tue May 1 10:10:31 UTC 2018 Modified Files: src/sys/arch/arm/include: cputypes.h Log Message: fix define of CPU IDs * fix incorrect CPU_ID of APM/APPLE * add CPU_ID of SAMSUNG * fix typo about BROADCOM To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/include/cputypes.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cputypes.h diff -u src/sys/arch/arm/include/cputypes.h:1.1 src/sys/arch/arm/include/cputypes.h:1.2 --- src/sys/arch/arm/include/cputypes.h:1.1 Tue Mar 20 10:14:29 2018 +++ src/sys/arch/arm/include/cputypes.h Tue May 1 10:10:31 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: cputypes.h,v 1.1 2018/03/20 10:14:29 ryo Exp $ */ +/* $NetBSD: cputypes.h,v 1.2 2018/05/01 10:10:31 ryo Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -47,16 +47,18 @@ /* The high-order byte is always the implementor */ #define CPU_ID_IMPLEMENTOR_MASK 0xff00 #define CPU_ID_ARM_LTD 0x4100 /* 'A' */ -#define CPU_ID_BROADCMO 0x4200 /* 'B' */ +#define CPU_ID_BROADCOM 0x4200 /* 'B' */ #define CPU_ID_CAVIUM 0x4300 /* 'C' */ #define CPU_ID_DEC 0x4400 /* 'D' */ #define CPU_ID_INFINEON 0x4900 /* 'I' */ #define CPU_ID_MOTOROLA 0x4d00 /* 'M' */ #define CPU_ID_NVIDIA 0x4e00 /* 'N' */ -#define CPU_ID_APPLE 0x5000 /* 'P' */ +#define CPU_ID_APM 0x5000 /* 'P' */ #define CPU_ID_QUALCOMM 0x5100 /* 'Q' */ +#define CPU_ID_SAMSUNG 0x5300 /* 'S' */ #define CPU_ID_TI 0x5400 /* 'T' */ #define CPU_ID_MARVELL 0x5600 /* 'V' */ +#define CPU_ID_APPLE 0x6100 /* 'a' */ #define CPU_ID_FARADAY 0x6600 /* 'f' */ #define CPU_ID_INTEL 0x6900 /* 'i' */
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: ryo
Date: Sat Mar 17 04:16:09 UTC 2018
Modified Files:
src/sys/arch/arm/include: aout_machdep.h
Log Message:
whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/include/aout_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/aout_machdep.h
diff -u src/sys/arch/arm/include/aout_machdep.h:1.7 src/sys/arch/arm/include/aout_machdep.h:1.8
--- src/sys/arch/arm/include/aout_machdep.h:1.7 Mon Feb 24 16:57:57 2014
+++ src/sys/arch/arm/include/aout_machdep.h Sat Mar 17 04:16:09 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: aout_machdep.h,v 1.7 2014/02/24 16:57:57 christos Exp $ */
+/* $NetBSD: aout_machdep.h,v 1.8 2018/03/17 04:16:09 ryo Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
@@ -52,7 +52,7 @@ struct relocation_info_arm6 {
};
#define relocation_info relocation_info_arm6
-
+
/* No special executable format */
#define cpu_exec_aout_makecmds(a, b) ENOEXEC
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Sat Mar 3 16:11:22 UTC 2018 Modified Files: src/sys/arch/arm/include: bootconfig.h Log Message: Multiple inclusion protection To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/include/bootconfig.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/bootconfig.h diff -u src/sys/arch/arm/include/bootconfig.h:1.8 src/sys/arch/arm/include/bootconfig.h:1.9 --- src/sys/arch/arm/include/bootconfig.h:1.8 Sun May 28 23:31:41 2017 +++ src/sys/arch/arm/include/bootconfig.h Sat Mar 3 16:11:22 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: bootconfig.h,v 1.8 2017/05/28 23:31:41 jmcneill Exp $ */ +/* $NetBSD: bootconfig.h,v 1.9 2018/03/03 16:11:22 skrll Exp $ */ /* * Copyright (c) 1994 Mark Brinicombe. @@ -36,6 +36,9 @@ * SUCH DAMAGE. */ +#ifndef _ARM_BOOTCONFIG_H +#define _ARM_BOOTCONFIG_H + #ifdef _KERNEL #define BOOTOPT_TYPE_BOOLEAN 0 #define BOOTOPT_TYPE_STRING 1 @@ -59,3 +62,5 @@ char *get_bootconf_string(char *, const extern char *boot_args; #endif /* _KERNEL */ + +#endif
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: christos
Date: Fri Mar 2 22:23:17 UTC 2018
Modified Files:
src/sys/arch/arm/include: armreg.h
Log Message:
insert a couple of .fpu directives when we access the vfp registers while
is softvpf fpu mode for gcc 6. XXX: there is no .fpu push/pop...
To generate a diff of this commit:
cvs rdiff -u -r1.117 -r1.118 src/sys/arch/arm/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/armreg.h
diff -u src/sys/arch/arm/include/armreg.h:1.117 src/sys/arch/arm/include/armreg.h:1.118
--- src/sys/arch/arm/include/armreg.h:1.117 Wed Jan 24 04:04:45 2018
+++ src/sys/arch/arm/include/armreg.h Fri Mar 2 17:23:17 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.117 2018/01/24 09:04:45 skrll Exp $ */
+/* $NetBSD: armreg.h,v 1.118 2018/03/02 22:23:17 christos Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -858,13 +858,15 @@ static inline void armreg_##name##_write
static inline uint32_t armreg_##name##_read(void) \
{\
uint32_t __rv; \
- __asm __volatile(__insnstring : "=r"(__rv)); \
+ __asm __volatile(".fpu vfp");\
+ __asm __volatile(__insnstring : "=r"(__rv)); \
return __rv; \
}
#define ARMREG_WRITE_INLINE2(name, __insnstring) \
static inline void armreg_##name##_write(uint32_t __val) \
{\
+ __asm __volatile(".fpu vfp");\
__asm __volatile(__insnstring :: "r"(__val)); \
}
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Wed Jan 24 19:42:30 UTC 2018
Modified Files:
src/sys/arch/arm/include: frame.h
Log Message:
Remove references to arm26
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/include/frame.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/frame.h
diff -u src/sys/arch/arm/include/frame.h:1.20 src/sys/arch/arm/include/frame.h:1.21
--- src/sys/arch/arm/include/frame.h:1.20 Wed Jan 24 09:04:45 2018
+++ src/sys/arch/arm/include/frame.h Wed Jan 24 19:42:30 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.20 2018/01/24 09:04:45 skrll Exp $ */
+/* $NetBSD: frame.h,v 1.21 2018/01/24 19:42:30 skrll Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -35,7 +35,7 @@
* SUCH DAMAGE.
*/
/*
- * arm/frame.h - Stack frames structures common to arm26 and arm32
+ * arm/frame.h - Stack frames structures
*/
#ifndef _ARM_FRAME_H_
@@ -51,7 +51,7 @@
*/
typedef struct trapframe {
- register_t tf_spsr; /* Zero on arm26 */
+ register_t tf_spsr;
register_t tf_fill; /* fill here so r0 will be dword aligned */
register_t tf_r0;
register_t tf_r1;
@@ -68,8 +68,8 @@ typedef struct trapframe {
register_t tf_r12;
register_t tf_usr_sp;
register_t tf_usr_lr;
- register_t tf_svc_sp; /* Not used on arm26 */
- register_t tf_svc_lr; /* Not used on arm26 */
+ register_t tf_svc_sp;
+ register_t tf_svc_lr;
register_t tf_pc;
} trapframe_t;
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: christos
Date: Wed Dec 27 19:35:05 UTC 2017
Modified Files:
src/sys/arch/arm/include: ptrace.h
Log Message:
PR/52867: Martin Husemann: arm sofware breakpoint asm is slightly off
ARM uses an undefined instruction to emulate a software breakpoint.
However, the ptrace.h instruction on the one hand, and gdb/the kernel
disagree on the exact value.
This causes PTRACE_BREAKPOINT_ASM to generate a SIGILL instead of a SIGTRAP.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/include/ptrace.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/ptrace.h
diff -u src/sys/arch/arm/include/ptrace.h:1.11 src/sys/arch/arm/include/ptrace.h:1.12
--- src/sys/arch/arm/include/ptrace.h:1.11 Wed Apr 12 14:17:59 2017
+++ src/sys/arch/arm/include/ptrace.h Wed Dec 27 14:35:05 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: ptrace.h,v 1.11 2017/04/12 18:17:59 kamil Exp $ */
+/* $NetBSD: ptrace.h,v 1.12 2017/12/27 19:35:05 christos Exp $ */
/*
* Copyright (c) 1995 Frank Lancaster
@@ -64,7 +64,12 @@
#define PTRACE_REG_SP(_r) (_r)->r_sp
#define PTRACE_REG_INTRV(_r) (_r)->r[0]
-#define PTRACE_BREAKPOINT ((const uint8_t[]) { 0xe7, 0xff, 0xff, 0xfe })
-#define PTRACE_BREAKPOINT_INSN 0xe7fe
+#ifdef __ARMEB__
+#define PTRACE_BREAKPOINT ((const uint8_t[]) { 0xfe, 0xde, 0xff, 0xe7 })
+#define PTRACE_BREAKPOINT_INSN 0xfedeffe7
+#else
+#define PTRACE_BREAKPOINT ((const uint8_t[]) { 0xe7, 0xff, 0xde, 0xfe })
+#define PTRACE_BREAKPOINT_INSN 0xe7ffdefe
+#endif
#define PTRACE_BREAKPOINT_ASM __asm __volatile (".word " ___STRING(PTRACE_BREAKPOINT_INSN) )
#define PTRACE_BREAKPOINT_SIZE 4
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Wed Dec 20 15:22:14 UTC 2017 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: One copy of the generic timer register defines is enough for anyone. The ARM_ prefixed copies are prefered (at this point) and the comments from the non-ARM_ prefixed versions are copied over. To generate a diff of this commit: cvs rdiff -u -r1.115 -r1.116 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.115 src/sys/arch/arm/include/armreg.h:1.116 --- src/sys/arch/arm/include/armreg.h:1.115 Wed Dec 20 15:12:04 2017 +++ src/sys/arch/arm/include/armreg.h Wed Dec 20 15:22:14 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.115 2017/12/20 15:12:04 skrll Exp $ */ +/* $NetBSD: armreg.h,v 1.116 2017/12/20 15:22:14 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -528,19 +528,6 @@ #define CPU_CSSR_L1 0x #define CPU_CSSR_InD 0x0001 -/* ARMv7A CP15 Global Timer definitions */ -#define CNTKCTL_PL0PTEN 0x0200 /* PL0 Physical Timer Enable */ -#define CNTKCTL_PL0VTEN 0x0100 /* PL0 Virtual Timer Enable */ -#define CNTKCTL_EVNTI 0x00f0 /* CNTVCT Event Bit Select */ -#define CNTKCTL_EVNTDIR 0x0008 /* CNTVCT Event Dir (1->0) */ -#define CNTKCTL_EVNTEN 0x0004 /* CNTVCT Event Enable */ -#define CNTKCTL_PL0PCTEN 0x0200 /* PL0 Physical Counter Enable */ -#define CNTKCTL_PL0VCTEN 0x0100 /* PL0 Virtual Counter Enable */ - -#define CNT_CTL_ISTATUS 0x0004 /* Timer is asserted */ -#define CNT_CTL_IMASK 0x0002 /* Timer output is masked */ -#define CNT_CTL_ENABLE 0x0001 /* Timer is enabled */ - /* Fault status register definitions */ #define FAULT_TYPE_MASK 0x0f @@ -734,23 +721,24 @@ #define PJ4B_MPIDR_CPUID __BITS(0,3) /* AFF0 = core id */ /* Defines for ARM Generic Timer */ -#define ARM_CNTCTL_ENABLE __BIT(0) // Timer Enabled -#define ARM_CNTCTL_IMASK __BIT(1) // Mask Interrupt -#define ARM_CNTCTL_ISTATUS __BIT(2) // Interrupt is pending - -#define ARM_CNTKCTL_PL0PTEN __BIT(9) -#define ARM_CNTKCTL_PL0VTEN __BIT(8) -#define ARM_CNTKCTL_EVNTI __BITS(7,4) -#define ARM_CNTKCTL_EVNTDIR __BIT(3) -#define ARM_CNTKCTL_EVNTEN __BIT(2) -#define ARM_CNTKCTL_PL0VCTEN __BIT(1) -#define ARM_CNTKCTL_PL0PCTEN __BIT(0) - -#define ARM_CNTHCTL_EVNTI __BITS(7,4) -#define ARM_CNTHCTL_EVNTDIR __BIT(3) -#define ARM_CNTHCTL_EVNTEN __BIT(2) -#define ARM_CNTHCTL_PL1PCTEN __BIT(1) -#define ARM_CNTHCTL_PL1VCTEN __BIT(0) +#define ARM_CNTCTL_ISTATUS __BIT(2) // Interrupt is pending +#define ARM_CNTCTL_IMASK __BIT(1) // Mask Interrupt +#define ARM_CNTCTL_ENABLE __BIT(0) // Timer Enabled + +#define ARM_CNTKCTL_PL0PTEN __BIT(9) /* PL0 Physical Timer Enable */ +#define ARM_CNTKCTL_PL0VTEN __BIT(8) /* PL0 Virtual Timer Enable */ +#define ARM_CNTKCTL_EVNTI __BITS(7,4) /* CNTVCT Event Bit Select */ +#define ARM_CNTKCTL_EVNTDIR __BIT(3) /* CNTVCT Event Dir (1->0) */ +#define ARM_CNTKCTL_EVNTEN __BIT(2) /* CNTVCT Event Enable */ +#define ARM_CNTKCTL_PL0VCTEN __BIT(1) /* PL0 Virtual Counter Enable */ +#define ARM_CNTKCTL_PL0PCTEN __BIT(0) /* PL0 Physical Counter Enable */ + +/* CNCHCTL, Timer PL2 Control register, Virtualization Extensions */ +#define ARM_CNTHCTL_EVNTI __BITS(7,4) +#define ARM_CNTHCTL_EVNTDIR __BIT(3) +#define ARM_CNTHCTL_EVNTEN __BIT(2) +#define ARM_CNTHCTL_PL1PCEN __BIT(1) +#define ARM_CNTHCTL_PL1PCTEN __BIT(0) #define ARM_A5_TLBDATA_DOM __BITS(62,59) #define ARM_A5_TLBDATA_AP __BITS(58,56)
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Wed Dec 20 15:12:04 UTC 2017 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: Correct ARM_CNTKCTL_PL0[VP]CTEN values. NFC as nothing uses them. To generate a diff of this commit: cvs rdiff -u -r1.114 -r1.115 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.114 src/sys/arch/arm/include/armreg.h:1.115 --- src/sys/arch/arm/include/armreg.h:1.114 Sun Dec 17 09:39:00 2017 +++ src/sys/arch/arm/include/armreg.h Wed Dec 20 15:12:04 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.114 2017/12/17 09:39:00 skrll Exp $ */ +/* $NetBSD: armreg.h,v 1.115 2017/12/20 15:12:04 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -743,8 +743,8 @@ #define ARM_CNTKCTL_EVNTI __BITS(7,4) #define ARM_CNTKCTL_EVNTDIR __BIT(3) #define ARM_CNTKCTL_EVNTEN __BIT(2) -#define ARM_CNTKCTL_PL0PCTEN __BIT(1) -#define ARM_CNTKCTL_PL0VCTEN __BIT(0) +#define ARM_CNTKCTL_PL0VCTEN __BIT(1) +#define ARM_CNTKCTL_PL0PCTEN __BIT(0) #define ARM_CNTHCTL_EVNTI __BITS(7,4) #define ARM_CNTHCTL_EVNTDIR __BIT(3)
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Sun Dec 17 09:39:00 UTC 2017 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: Typo in comment cvS: -- To generate a diff of this commit: cvs rdiff -u -r1.113 -r1.114 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.113 src/sys/arch/arm/include/armreg.h:1.114 --- src/sys/arch/arm/include/armreg.h:1.113 Tue Oct 24 20:24:12 2017 +++ src/sys/arch/arm/include/armreg.h Sun Dec 17 09:39:00 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.113 2017/10/24 20:24:12 skrll Exp $ */ +/* $NetBSD: armreg.h,v 1.114 2017/12/17 09:39:00 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -724,7 +724,7 @@ #define CORTEXA9_MPIDR_MP MPIDR_MP #define CORTEXA9_MPIDR_U MPIDR_U #define CORTEXA9_MPIDR_CLID __BITS(11,8) /* AFF1 = cluster id */ -#define CORTEXA9_MPIDR_CPUID __BITS(0,1) /* AFF0 = phisycal core id */ +#define CORTEXA9_MPIDR_CPUID __BITS(0,1) /* AFF0 = physical core id */ /* MPIDR implementation of Marvell PJ4B-MP: AFF2 is not used */ #define PJ4B_MPIDR_MP MPIDR_MP
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Tue Oct 24 20:24:12 UTC 2017 Modified Files: src/sys/arch/arm/include: armreg.h Log Message: Some more registers To generate a diff of this commit: cvs rdiff -u -r1.112 -r1.113 src/sys/arch/arm/include/armreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/armreg.h diff -u src/sys/arch/arm/include/armreg.h:1.112 src/sys/arch/arm/include/armreg.h:1.113 --- src/sys/arch/arm/include/armreg.h:1.112 Sat Sep 16 00:47:16 2017 +++ src/sys/arch/arm/include/armreg.h Tue Oct 24 20:24:12 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.112 2017/09/16 00:47:16 matt Exp $ */ +/* $NetBSD: armreg.h,v 1.113 2017/10/24 20:24:12 skrll Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -1024,6 +1024,10 @@ ARMREG_READ_INLINE(pmccntr, "p15,0,%0,c9 ARMREG_WRITE_INLINE(pmccntr, "p15,0,%0,c9,c13,0") /* PMC Cycle Counter */ ARMREG_READ_INLINE(pmuserenr, "p15,0,%0,c9,c14,0") /* PMC User Enable */ ARMREG_WRITE_INLINE(pmuserenr, "p15,0,%0,c9,c14,0") /* PMC User Enable */ +ARMREG_READ_INLINE(pmintenset, "p15,0,%0,c9,c14,1") /* PMC Interrupt Enable Set */ +ARMREG_WRITE_INLINE(pmintenset, "p15,0,%0,c9,c14,1") /* PMC Interrupt Enable Set */ +ARMREG_READ_INLINE(pmintenclr, "p15,0,%0,c9,c14,2") /* PMC Interrupt Enable Clear */ +ARMREG_WRITE_INLINE(pmintenclr, "p15,0,%0,c9,c14,2") /* PMC Interrupt Enable Clear */ ARMREG_READ_INLINE(l2ctrl, "p15,1,%0,c9,c0,2") /* A7/A15 L2 Control Register */ /* cp10 c10 registers */ ARMREG_READ_INLINE(prrr, "p15,0,%0,c10,c2,0") /* Primary Region Remap Register */ @@ -1064,6 +1068,8 @@ ARMREG_READ64_INLINE(cntp_cval, "p15,2,% ARMREG_WRITE64_INLINE(cntp_cval, "p15,2,%Q0,%R0,c14") /* PL1 Physical Timer CompareValue Register */ ARMREG_READ64_INLINE(cntv_cval, "p15,3,%Q0,%R0,c14") /* PL1 Virtual Timer CompareValue Register */ ARMREG_WRITE64_INLINE(cntv_cval, "p15,3,%Q0,%R0,c14") /* PL1 Virtual Timer CompareValue Register */ +ARMREG_READ64_INLINE(cntvoff, "p15,4,%Q0,%R0,c14") /* Virtual Offset Register */ +ARMREG_WRITE64_INLINE(cntvoff, "p15,4,%Q0,%R0,c14") /* Virtual Offset Register */ /* cp15 c15 registers */ ARMREG_READ_INLINE(cbar, "p15,4,%0,c15,c0,0") /* Configuration Base Address Register */ ARMREG_READ_INLINE(pmcrv6, "p15,0,%0,c15,c12,0") /* PMC Control Register (armv6) */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Tue Aug 29 06:28:27 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: pmap.h Log Message: Revert the *_PROT_RO_* define changes and do all the work in the *_PROT() macros for RO kernel pages. cats boots again - no idea how it slipped through my testing previously To generate a diff of this commit: cvs rdiff -u -r1.151 -r1.152 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.151 src/sys/arch/arm/include/arm32/pmap.h:1.152 --- src/sys/arch/arm/include/arm32/pmap.h:1.151 Tue Jul 11 20:42:17 2017 +++ src/sys/arch/arm/include/arm32/pmap.h Tue Aug 29 06:28:26 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.151 2017/07/11 20:42:17 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.152 2017/08/29 06:28:26 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -728,12 +728,12 @@ extern void (*pmap_zero_page_func)(paddr */ #define L1_S_PROT_U_generic (L1_S_AP(AP_U)) #define L1_S_PROT_W_generic (L1_S_AP(AP_W)) -#define L1_S_PROT_RO_generic (L1_S_AP(AP_R)) /* AP_W == AP_R */ +#define L1_S_PROT_RO_generic (0) #define L1_S_PROT_MASK_generic (L1_S_PROT_U|L1_S_PROT_W|L1_S_PROT_RO) #define L1_S_PROT_U_xscale (L1_S_AP(AP_U)) #define L1_S_PROT_W_xscale (L1_S_AP(AP_W)) -#define L1_S_PROT_RO_xscale (L1_S_AP(AP_R)) /* AP_W == AP_R */ +#define L1_S_PROT_RO_xscale (0) #define L1_S_PROT_MASK_xscale (L1_S_PROT_U|L1_S_PROT_W|L1_S_PROT_RO) #define L1_S_PROT_U_armv6 (L1_S_AP(AP_R) | L1_S_AP(AP_U)) @@ -754,12 +754,12 @@ extern void (*pmap_zero_page_func)(paddr #define L2_L_PROT_U_generic (L2_AP(AP_U)) #define L2_L_PROT_W_generic (L2_AP(AP_W)) -#define L2_L_PROT_RO_generic (L2_AP(AP_R)) +#define L2_L_PROT_RO_generic (0) #define L2_L_PROT_MASK_generic (L2_L_PROT_U|L2_L_PROT_W|L2_L_PROT_RO) #define L2_L_PROT_U_xscale (L2_AP(AP_U)) #define L2_L_PROT_W_xscale (L2_AP(AP_W)) -#define L2_L_PROT_RO_xscale (L2_AP(AP_R)) +#define L2_L_PROT_RO_xscale (0) #define L2_L_PROT_MASK_xscale (L2_L_PROT_U|L2_L_PROT_W|L2_L_PROT_RO) #define L2_L_PROT_U_armv6n (L2_AP0(AP_R) | L2_AP0(AP_U)) @@ -780,12 +780,12 @@ extern void (*pmap_zero_page_func)(paddr #define L2_S_PROT_U_generic (L2_AP(AP_U)) #define L2_S_PROT_W_generic (L2_AP(AP_W)) -#define L2_S_PROT_RO_generic (L2_AP(AP_R)) +#define L2_S_PROT_RO_generic (0) #define L2_S_PROT_MASK_generic (L2_S_PROT_U|L2_S_PROT_W|L2_S_PROT_RO) #define L2_S_PROT_U_xscale (L2_AP0(AP_U)) #define L2_S_PROT_W_xscale (L2_AP0(AP_W)) -#define L2_S_PROT_RO_xscale (L2_AP(AP_R)) +#define L2_S_PROT_RO_xscale (0) #define L2_S_PROT_MASK_xscale (L2_S_PROT_U|L2_S_PROT_W|L2_S_PROT_RO) #define L2_S_PROT_U_armv6n (L2_AP0(AP_R) | L2_AP0(AP_U)) @@ -1028,31 +1028,44 @@ extern void (*pmap_zero_page_func)(paddr #define l1pte_set_writable(pte) (((pte) & ~L1_S_PROT_RO) | L1_S_PROT_W) #define l1pte_set_readonly(pte) (((pte) & ~L1_S_PROT_W) | L1_S_PROT_RO) -#define l2pte_set_writable(pte) (L2_S_PROT_W == L2_S_PROT_RO ? \ -((pte) | L2_S_PROT_W) : (((pte) & ~L2_S_PROT_RO) | L2_S_PROT_W)) - -#define l2pte_set_readonly(pte) (L2_S_PROT_W == L2_S_PROT_RO ? \ -((pte) & ~L2_S_PROT_RO) : (((pte) & ~L2_S_PROT_W) | L2_S_PROT_RO)) +#define l2pte_set_writable(pte) (((pte) & ~L2_S_PROT_RO) | L2_S_PROT_W) +#define l2pte_set_readonly(pte) (((pte) & ~L2_S_PROT_W) | L2_S_PROT_RO) #define l2pte_writable_p(pte) (((pte) & L2_S_PROT_W) == L2_S_PROT_W && \ - (L2_S_PROT_W == L2_S_PROT_RO || \ + (L2_S_PROT_RO == 0 || \ ((pte) & L2_S_PROT_RO) != L2_S_PROT_RO)) /* * These macros return various bits based on kernel/user and protection. * Note that the compiler will usually fold these at compile time. */ -#define L1_S_PROT(ku, pr) ku) == PTE_USER) ? L1_S_PROT_U : 0) | \ - (((pr) & VM_PROT_WRITE) ? L1_S_PROT_W : \ - (L1_S_PROT_W == L1_S_PROT_RO ? 0 : L1_S_PROT_RO))) - -#define L2_L_PROT(ku, pr) ku) == PTE_USER) ? L2_L_PROT_U : 0) | \ - (((pr) & VM_PROT_WRITE) ? L2_L_PROT_W : \ - (L2_L_PROT_W == L2_L_PROT_RO ? 0 : L2_L_PROT_RO))) - -#define L2_S_PROT(ku, pr) ku) == PTE_USER) ? L2_S_PROT_U : 0) | \ - (((pr) & VM_PROT_WRITE) ? L2_S_PROT_W : \ - (L2_S_PROT_W == L2_S_PROT_RO ? 0 : L2_S_PROT_RO))) + +#define L1_S_PROT(ku, pr) ( \ + (((ku) == PTE_USER) ? \ + L1_S_PROT_U | (((pr) & VM_PROT_WRITE) ? L1_S_PROT_W : 0) \ + : \ + (((L1_S_PROT_RO && \ + ((pr) & (VM_PROT_READ | VM_PROT_WRITE)) == VM_PROT_READ) ? \ + L1_S_PROT_RO : L1_S_PROT_W))) \ +) + +#define L2_L_PROT(ku, pr) ( \ + (((ku) == PTE_USER) ? \ + L2_L_PROT_U | (((pr) & VM_PROT_WRITE) ? L2_L_PROT_W : 0) \ + : \ + (((L2_L_PROT_RO && \ + ((pr) & (VM_PROT_READ | VM_PROT_WRITE)) == VM_PROT_READ) ? \ + L2_L_PROT_RO :
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: christos Date: Fri Aug 25 17:43:33 UTC 2017 Modified Files: src/sys/arch/arm/include: cpufunc_proto.h Log Message: fix the build (rump does not have opt_foo.h) To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/include/cpufunc_proto.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpufunc_proto.h diff -u src/sys/arch/arm/include/cpufunc_proto.h:1.6 src/sys/arch/arm/include/cpufunc_proto.h:1.7 --- src/sys/arch/arm/include/cpufunc_proto.h:1.6 Thu Aug 24 10:19:36 2017 +++ src/sys/arch/arm/include/cpufunc_proto.h Fri Aug 25 13:43:33 2017 @@ -44,7 +44,9 @@ #ifdef _KERNEL -#include "opt_multiprocessor.h" +#if !defined(_MODULE) && defined(_KERNEL_OPT) +# include "opt_multiprocessor.h" +#endif #include #include
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Tue Jul 11 20:42:17 UTC 2017
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
Fix up L{1_S,2_L,2_S}_PROT for recent changes to the
L{1_S,2_L,2_S}_PROT_RO* values.
To generate a diff of this commit:
cvs rdiff -u -r1.150 -r1.151 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.150 src/sys/arch/arm/include/arm32/pmap.h:1.151
--- src/sys/arch/arm/include/arm32/pmap.h:1.150 Thu Jul 6 15:17:47 2017
+++ src/sys/arch/arm/include/arm32/pmap.h Tue Jul 11 20:42:17 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.150 2017/07/06 15:17:47 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.151 2017/07/11 20:42:17 skrll Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -1043,13 +1043,16 @@ extern void (*pmap_zero_page_func)(paddr
* Note that the compiler will usually fold these at compile time.
*/
#define L1_S_PROT(ku, pr) ku) == PTE_USER) ? L1_S_PROT_U : 0) | \
- (((pr) & VM_PROT_WRITE) ? L1_S_PROT_W : L1_S_PROT_RO))
+ (((pr) & VM_PROT_WRITE) ? L1_S_PROT_W : \
+ (L1_S_PROT_W == L1_S_PROT_RO ? 0 : L1_S_PROT_RO)))
#define L2_L_PROT(ku, pr) ku) == PTE_USER) ? L2_L_PROT_U : 0) | \
- (((pr) & VM_PROT_WRITE) ? L2_L_PROT_W : L2_L_PROT_RO))
+ (((pr) & VM_PROT_WRITE) ? L2_L_PROT_W : \
+ (L2_L_PROT_W == L2_L_PROT_RO ? 0 : L2_L_PROT_RO)))
#define L2_S_PROT(ku, pr) ku) == PTE_USER) ? L2_S_PROT_U : 0) | \
- (((pr) & VM_PROT_WRITE) ? L2_S_PROT_W : L2_S_PROT_RO))
+ (((pr) & VM_PROT_WRITE) ? L2_S_PROT_W : \
+ (L2_S_PROT_W == L2_S_PROT_RO ? 0 : L2_S_PROT_RO)))
/*
* Macros to test if a mapping is mappable with an L1 SuperSection,
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Fri Jul 7 16:59:35 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: frame.h Log Message: Fixup the non-KDTRACE_HOOKS case of PUSHDTRACEGAP - we need to copy the stack pointer to r2. To generate a diff of this commit: cvs rdiff -u -r1.44 -r1.45 src/sys/arch/arm/include/arm32/frame.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/frame.h diff -u src/sys/arch/arm/include/arm32/frame.h:1.44 src/sys/arch/arm/include/arm32/frame.h:1.45 --- src/sys/arch/arm/include/arm32/frame.h:1.44 Fri Jul 7 00:34:09 2017 +++ src/sys/arch/arm/include/arm32/frame.h Fri Jul 7 16:59:35 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: frame.h,v 1.44 2017/07/07 00:34:09 chs Exp $ */ +/* $NetBSD: frame.h,v 1.45 2017/07/07 16:59:35 skrll Exp $ */ /* * Copyright (c) 1994-1997 Mark Brinicombe. @@ -455,7 +455,8 @@ LOCK_CAS_DEBUG_LOCALS mov r2, sp; \ subeq r2, r2, #(4 * 16); /* if so, leave a gap for dtrace */ #else -#define PUSHDTRACEGAP /* nothing */ +#define PUSHDTRACEGAP \ + mov r2, sp #endif #define PUSHTRAPFRAME(rX) \
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Thu Jul 6 15:17:47 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: pmap.h Log Message: KNF two comments To generate a diff of this commit: cvs rdiff -u -r1.149 -r1.150 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.149 src/sys/arch/arm/include/arm32/pmap.h:1.150 --- src/sys/arch/arm/include/arm32/pmap.h:1.149 Thu Jul 6 15:07:56 2017 +++ src/sys/arch/arm/include/arm32/pmap.h Thu Jul 6 15:17:47 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.149 2017/07/06 15:07:56 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.150 2017/07/06 15:17:47 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -924,8 +924,10 @@ extern void (*pmap_zero_page_func)(paddr #define L2_L_CACHE_MASK L2_L_CACHE_MASK_armv6n #define L2_S_CACHE_MASK L2_S_CACHE_MASK_armv6n -/* These prototypes make writeable mappings, while the other MMU types - * make read-only mappings. */ +/* + * These prototypes make writeable mappings, while the other MMU types + * make read-only mappings. + */ #define L1_SS_PROTO L1_SS_PROTO_armv6 #define L1_S_PROTO L1_S_PROTO_armv6 #define L1_C_PROTO L1_C_PROTO_armv6 @@ -1007,8 +1009,10 @@ extern void (*pmap_zero_page_func)(paddr #define L2_L_CACHE_MASK L2_L_CACHE_MASK_armv7 #define L2_S_CACHE_MASK L2_S_CACHE_MASK_armv7 -/* These prototypes make writeable mappings, while the other MMU types - * make read-only mappings. */ +/* + * These prototypes make writeable mappings, while the other MMU types + * make read-only mappings. + */ #define L1_SS_PROTO L1_SS_PROTO_armv7 #define L1_S_PROTO L1_S_PROTO_armv7 #define L1_C_PROTO L1_C_PROTO_armv7
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Thu Jul 6 15:07:56 UTC 2017
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
Re-define the L*_PROT_RO for MMUs that don't really support RO mapping
and adjust l2pte_set_{writeable,readony} to the new values.
This allows RO mappings for MMUs that actually support them.
To generate a diff of this commit:
cvs rdiff -u -r1.148 -r1.149 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.148 src/sys/arch/arm/include/arm32/pmap.h:1.149
--- src/sys/arch/arm/include/arm32/pmap.h:1.148 Thu Jul 6 06:31:24 2017
+++ src/sys/arch/arm/include/arm32/pmap.h Thu Jul 6 15:07:56 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.148 2017/07/06 06:31:24 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.149 2017/07/06 15:07:56 skrll Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -728,12 +728,12 @@ extern void (*pmap_zero_page_func)(paddr
*/
#define L1_S_PROT_U_generic (L1_S_AP(AP_U))
#define L1_S_PROT_W_generic (L1_S_AP(AP_W))
-#define L1_S_PROT_RO_generic (0)
+#define L1_S_PROT_RO_generic (L1_S_AP(AP_R)) /* AP_W == AP_R */
#define L1_S_PROT_MASK_generic (L1_S_PROT_U|L1_S_PROT_W|L1_S_PROT_RO)
#define L1_S_PROT_U_xscale (L1_S_AP(AP_U))
#define L1_S_PROT_W_xscale (L1_S_AP(AP_W))
-#define L1_S_PROT_RO_xscale (0)
+#define L1_S_PROT_RO_xscale (L1_S_AP(AP_R)) /* AP_W == AP_R */
#define L1_S_PROT_MASK_xscale (L1_S_PROT_U|L1_S_PROT_W|L1_S_PROT_RO)
#define L1_S_PROT_U_armv6 (L1_S_AP(AP_R) | L1_S_AP(AP_U))
@@ -754,12 +754,12 @@ extern void (*pmap_zero_page_func)(paddr
#define L2_L_PROT_U_generic (L2_AP(AP_U))
#define L2_L_PROT_W_generic (L2_AP(AP_W))
-#define L2_L_PROT_RO_generic (0)
+#define L2_L_PROT_RO_generic (L2_AP(AP_R))
#define L2_L_PROT_MASK_generic (L2_L_PROT_U|L2_L_PROT_W|L2_L_PROT_RO)
#define L2_L_PROT_U_xscale (L2_AP(AP_U))
#define L2_L_PROT_W_xscale (L2_AP(AP_W))
-#define L2_L_PROT_RO_xscale (0)
+#define L2_L_PROT_RO_xscale (L2_AP(AP_R))
#define L2_L_PROT_MASK_xscale (L2_L_PROT_U|L2_L_PROT_W|L2_L_PROT_RO)
#define L2_L_PROT_U_armv6n (L2_AP0(AP_R) | L2_AP0(AP_U))
@@ -780,12 +780,12 @@ extern void (*pmap_zero_page_func)(paddr
#define L2_S_PROT_U_generic (L2_AP(AP_U))
#define L2_S_PROT_W_generic (L2_AP(AP_W))
-#define L2_S_PROT_RO_generic (0)
+#define L2_S_PROT_RO_generic (L2_AP(AP_R))
#define L2_S_PROT_MASK_generic (L2_S_PROT_U|L2_S_PROT_W|L2_S_PROT_RO)
#define L2_S_PROT_U_xscale (L2_AP0(AP_U))
#define L2_S_PROT_W_xscale (L2_AP0(AP_W))
-#define L2_S_PROT_RO_xscale (0)
+#define L2_S_PROT_RO_xscale (L2_AP(AP_R))
#define L2_S_PROT_MASK_xscale (L2_S_PROT_U|L2_S_PROT_W|L2_S_PROT_RO)
#define L2_S_PROT_U_armv6n (L2_AP0(AP_R) | L2_AP0(AP_U))
@@ -1023,11 +1023,15 @@ extern void (*pmap_zero_page_func)(paddr
*/
#define l1pte_set_writable(pte) (((pte) & ~L1_S_PROT_RO) | L1_S_PROT_W)
#define l1pte_set_readonly(pte) (((pte) & ~L1_S_PROT_W) | L1_S_PROT_RO)
-#define l2pte_set_writable(pte) (((pte) & ~L2_S_PROT_RO) | L2_S_PROT_W)
-#define l2pte_set_readonly(pte) (((pte) & ~L2_S_PROT_W) | L2_S_PROT_RO)
+
+#define l2pte_set_writable(pte) (L2_S_PROT_W == L2_S_PROT_RO ? \
+((pte) | L2_S_PROT_W) : (((pte) & ~L2_S_PROT_RO) | L2_S_PROT_W))
+
+#define l2pte_set_readonly(pte) (L2_S_PROT_W == L2_S_PROT_RO ? \
+((pte) & ~L2_S_PROT_RO) : (((pte) & ~L2_S_PROT_W) | L2_S_PROT_RO))
#define l2pte_writable_p(pte) (((pte) & L2_S_PROT_W) == L2_S_PROT_W && \
- (L2_S_PROT_RO == 0 || \
+ (L2_S_PROT_W == L2_S_PROT_RO || \
((pte) & L2_S_PROT_RO) != L2_S_PROT_RO))
/*
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Thu Jul 6 06:31:24 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: pmap.h Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.147 -r1.148 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.147 src/sys/arch/arm/include/arm32/pmap.h:1.148 --- src/sys/arch/arm/include/arm32/pmap.h:1.147 Thu May 25 20:42:41 2017 +++ src/sys/arch/arm/include/arm32/pmap.h Thu Jul 6 06:31:24 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.147 2017/05/25 20:42:41 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.148 2017/07/06 06:31:24 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -488,7 +488,7 @@ extern int pmap_needs_pte_sync; * Finally, MEMC, GENERIC and XSCALE MMUs do not need PTE syncs. * * Use run time evaluation for all other cases. - * + * */ #if (ARM_NMMUS == 1) #if (ARM_MMU_SA1 + ARM_MMU_V6 != 0)
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Thu Jun 22 08:44:21 UTC 2017
Modified Files:
src/sys/arch/arm/include/arm32: frame.h
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/include/arm32/frame.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/frame.h
diff -u src/sys/arch/arm/include/arm32/frame.h:1.42 src/sys/arch/arm/include/arm32/frame.h:1.43
--- src/sys/arch/arm/include/arm32/frame.h:1.42 Fri Apr 17 17:28:33 2015
+++ src/sys/arch/arm/include/arm32/frame.h Thu Jun 22 08:44:21 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.42 2015/04/17 17:28:33 matt Exp $ */
+/* $NetBSD: frame.h,v 1.43 2017/06/22 08:44:21 skrll Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -64,7 +64,7 @@ struct switchframe {
u_int sf_sp;
u_int sf_pc;
};
-
+
/*
* System stack frames.
*/
@@ -240,7 +240,7 @@ void validate_trapframe(trapframe_t *, i
#define ENABLE_ALIGNMENT_FAULTS \
and r7, r0, #(PSR_MODE) /* Test for USR32 mode */ ;\
GET_CURCPU(r4) /* r4 = cpuinfo */
-
+
#define DO_AST_AND_RESTORE_ALIGNMENT_FAULTS\
DO_PENDING_SOFTINTS ;\
@@ -423,7 +423,7 @@ LOCK_CAS_DEBUG_LOCALS
* This should only be used if the processor is not currently in SVC32
* mode. The processor mode is switched to SVC mode and the trap frame is
* stored. The SVC lr field is used to store the previous value of
- * lr in SVC mode.
+ * lr in SVC mode.
*
* NOTE: r13 and r14 are stored separately as a work around for the
* SA110 rev 2 STM^ bug
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Thu May 25 20:42:41 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: pmap.h Log Message: Use the define name PMAP_HWPAGEWALKER and not PMAP_TLB_HWPAGEWALKER To generate a diff of this commit: cvs rdiff -u -r1.146 -r1.147 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.146 src/sys/arch/arm/include/arm32/pmap.h:1.147 --- src/sys/arch/arm/include/arm32/pmap.h:1.146 Thu May 25 20:32:48 2017 +++ src/sys/arch/arm/include/arm32/pmap.h Thu May 25 20:42:41 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.146 2017/05/25 20:32:48 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.147 2017/05/25 20:42:41 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -84,8 +84,8 @@ #endif #ifdef ARM_MMU_EXTENDED +#define PMAP_HWPAGEWALKER 1 #define PMAP_TLB_MAX 1 -#define PMAP_TLB_HWPAGEWALKER 1 #if PMAP_TLB_MAX > 1 #define PMAP_TLB_NEED_SHOOTDOWN 1 #endif
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Thu May 25 20:32:48 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: pmap.h Log Message: Spell ARM_MMU_EXTENDED correctly To generate a diff of this commit: cvs rdiff -u -r1.145 -r1.146 src/sys/arch/arm/include/arm32/pmap.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/pmap.h diff -u src/sys/arch/arm/include/arm32/pmap.h:1.145 src/sys/arch/arm/include/arm32/pmap.h:1.146 --- src/sys/arch/arm/include/arm32/pmap.h:1.145 Thu Feb 23 08:22:20 2017 +++ src/sys/arch/arm/include/arm32/pmap.h Thu May 25 20:32:48 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.145 2017/02/23 08:22:20 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.146 2017/05/25 20:32:48 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -167,7 +167,7 @@ #ifndef _LOCORE -#ifndef PMAP_MMU_EXTENDED +#ifndef ARM_MMU_EXTENDED struct l1_ttable; struct l2_dtable;
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Tue Apr 25 09:01:38 UTC 2017
Modified Files:
src/sys/arch/arm/include: frame.h
Log Message:
Expose lwp_trapframe for _KEMUSER, e.g. crash(8)
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/include/frame.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/frame.h
diff -u src/sys/arch/arm/include/frame.h:1.18 src/sys/arch/arm/include/frame.h:1.19
--- src/sys/arch/arm/include/frame.h:1.18 Sun Aug 18 05:07:19 2013
+++ src/sys/arch/arm/include/frame.h Tue Apr 25 09:01:38 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: frame.h,v 1.18 2013/08/18 05:07:19 matt Exp $ */
+/* $NetBSD: frame.h,v 1.19 2017/04/25 09:01:38 skrll Exp $ */
/*
* Copyright (c) 1994-1997 Mark Brinicombe.
@@ -100,14 +100,16 @@ struct sigframe_siginfo {
ucontext_t sf_uc; /* actual saved ucontext */
};
+#if defined(_KERNEL) || defined(_KMEMUSER)
#ifdef _KERNEL
__BEGIN_DECLS
void sendsig_sigcontext(const ksiginfo_t *, const sigset_t *);
void *getframe(struct lwp *, int, int *);
__END_DECLS
-#define lwp_trapframe(l) ((l)->l_md.md_tf)
#define lwp_settrapframe(l, tf) ((l)->l_md.md_tf = (tf))
#endif
+#define lwp_trapframe(l) ((l)->l_md.md_tf)
+#endif /* _KERNEL || _KMEMUSER */
#endif /* _LOCORE */
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: jmcneill
Date: Wed Apr 19 12:58:59 UTC 2017
Modified Files:
src/sys/arch/arm/include: pci_machdep.h
Log Message:
Provide a pci_intr_setattr implementation. For chipset tags that don't
implement pc_intr_setattr, simply return ENODEV.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/include/pci_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/pci_machdep.h
diff -u src/sys/arch/arm/include/pci_machdep.h:1.11 src/sys/arch/arm/include/pci_machdep.h:1.12
--- src/sys/arch/arm/include/pci_machdep.h:1.11 Sun Apr 16 18:02:50 2017
+++ src/sys/arch/arm/include/pci_machdep.h Wed Apr 19 12:58:59 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.h,v 1.11 2017/04/16 18:02:50 jmcneill Exp $ */
+/* $NetBSD: pci_machdep.h,v 1.12 2017/04/19 12:58:59 jmcneill Exp $ */
/*
* Modified for arm32 by Mark Brinicombe
@@ -37,6 +37,8 @@
* Machine-specific definitions for PCI autoconfiguration.
*/
+#include
+
/*
* Types provided to machine-independent PCI code
*/
@@ -116,4 +118,13 @@ struct arm32_pci_chipset {
#define pci_conf_interrupt(c, b, d, i, s, p)\
(*(c)->pc_conf_interrupt)((c)->pc_conf_v, (b), (d), (i), (s), (p))
+static inline int
+pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ihp,
+int attr, uint64_t data)
+{
+ if (!pc->pc_intr_setattr)
+ return ENODEV;
+ return pc->pc_intr_setattr(pc, ihp, attr, data);
+}
+
#endif /* _ARM_PCI_MACHDEP_H_ */
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: jmcneill
Date: Sun Apr 16 18:02:50 UTC 2017
Modified Files:
src/sys/arch/arm/include: pci_machdep.h
Log Message:
Add function ptr for pci_intr_setattr to struct arm32_pci_chipset
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/include/pci_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/pci_machdep.h
diff -u src/sys/arch/arm/include/pci_machdep.h:1.10 src/sys/arch/arm/include/pci_machdep.h:1.11
--- src/sys/arch/arm/include/pci_machdep.h:1.10 Sat Mar 29 19:28:26 2014
+++ src/sys/arch/arm/include/pci_machdep.h Sun Apr 16 18:02:50 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.h,v 1.10 2014/03/29 19:28:26 christos Exp $ */
+/* $NetBSD: pci_machdep.h,v 1.11 2017/04/16 18:02:50 jmcneill Exp $ */
/*
* Modified for arm32 by Mark Brinicombe
@@ -70,6 +70,8 @@ struct arm32_pci_chipset {
const char *(*pc_intr_string)(void *, pci_intr_handle_t,
char *, size_t);
const struct evcnt *(*pc_intr_evcnt)(void *, pci_intr_handle_t);
+ int (*pc_intr_setattr)(void *, pci_intr_handle_t *,
+ int, uint64_t);
void *(*pc_intr_establish)(void *, pci_intr_handle_t,
int, int (*)(void *), void *);
void (*pc_intr_disestablish)(void *, void *);
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: christos Date: Sun Apr 9 15:15:34 UTC 2017 Modified Files: src/sys/arch/arm/include: fenv.h Log Message: one typedef for fenv_t is enough. To generate a diff of this commit: cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/include/fenv.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/fenv.h diff -u src/sys/arch/arm/include/fenv.h:1.4 src/sys/arch/arm/include/fenv.h:1.5 --- src/sys/arch/arm/include/fenv.h:1.4 Wed Mar 22 19:11:09 2017 +++ src/sys/arch/arm/include/fenv.h Sun Apr 9 11:15:34 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: fenv.h,v 1.4 2017/03/22 23:11:09 chs Exp $ */ +/* $NetBSD: fenv.h,v 1.5 2017/04/09 15:15:34 christos Exp $ */ /* * Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995 @@ -42,7 +42,6 @@ typedef int fexcept_t; #include -typedef int fenv_t; #define __FENV_GET_FLAGS(__envp) __SHIFTOUT(*(__envp), VFP_FPSCR_CSUM) #define __FENV_GET_MASK(__envp) __SHIFTOUT(*(__envp), VFP_FPSCR_ESUM) #define __FENV_GET_ROUND(__envp) __SHIFTOUT(*(__envp), VFP_FPSCR_RMODE)
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: sevan Date: Tue Apr 4 09:26:32 UTC 2017 Modified Files: src/sys/arch/arm/include: cpu.h Log Message: Fix rcs tag. To generate a diff of this commit: cvs rdiff -u -r1.92 -r1.93 src/sys/arch/arm/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpu.h diff -u src/sys/arch/arm/include/cpu.h:1.92 src/sys/arch/arm/include/cpu.h:1.93 --- src/sys/arch/arm/include/cpu.h:1.92 Mon Mar 27 14:26:20 2017 +++ src/sys/arch/arm/include/cpu.h Tue Apr 4 09:26:32 2017 @@ -1,4 +1,4 @@ -/* cpu.h,v 1.45.4.7 2008/01/28 18:20:39 matt Exp */ +/* $NetBSD: cpu.h,v 1.93 2017/04/04 09:26:32 sevan Exp $ */ /* * Copyright (c) 1994-1996 Mark Brinicombe.
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Mon Mar 27 14:26:20 UTC 2017 Modified Files: src/sys/arch/arm/include: cpu.h Log Message: Expose correct cpu_number(), CPU_IS_PRIMARY() and CPU_INFO_FOREACH() for modules so that the dtrace module works on an MP system. To generate a diff of this commit: cvs rdiff -u -r1.91 -r1.92 src/sys/arch/arm/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpu.h diff -u src/sys/arch/arm/include/cpu.h:1.91 src/sys/arch/arm/include/cpu.h:1.92 --- src/sys/arch/arm/include/cpu.h:1.91 Mon Mar 6 11:10:23 2017 +++ src/sys/arch/arm/include/cpu.h Mon Mar 27 14:26:20 2017 @@ -230,10 +230,9 @@ curcpu(void) #endif #define CPU_INFO_ITERATOR int -#if defined(MULTIPROCESSOR) +#if defined(_MODULE) || defined(MULTIPROCESSOR) extern struct cpu_info *cpu_info[]; #define cpu_number() (curcpu()->ci_index) -void cpu_boot_secondary_processors(void); #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0) #define CPU_INFO_FOREACH(cii, ci) \ cii = 0, ci = cpu_info[0]; cii < ncpu && (ci = cpu_info[cii]) != NULL; cii++ @@ -245,6 +244,10 @@ void cpu_boot_secondary_processors(void) cii = 0, __USE(cii), ci = curcpu(); ci != NULL; ci = NULL #endif +#if defined(MULTIPROCESSOR) +void cpu_boot_secondary_processors(void); +#endif + #define LWP0_CPU_INFO (_info_store) static inline int
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Mon Mar 6 11:10:23 UTC 2017 Modified Files: src/sys/arch/arm/include: cpu.h Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.90 -r1.91 src/sys/arch/arm/include/cpu.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/cpu.h diff -u src/sys/arch/arm/include/cpu.h:1.90 src/sys/arch/arm/include/cpu.h:1.91 --- src/sys/arch/arm/include/cpu.h:1.90 Wed Apr 15 21:26:47 2015 +++ src/sys/arch/arm/include/cpu.h Mon Mar 6 11:10:23 2017 @@ -104,7 +104,7 @@ extern int cpu_fpu_present; ((curcpu()->ci_intr_depth > 1) || \ ((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE) #else -#define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1) +#define CLKF_INTR(cf) ((void)(cf), curcpu()->ci_intr_depth > 1) #endif /* @@ -202,7 +202,7 @@ _curlwp_set(struct lwp *l) armreg_tpidrprw_write((uintptr_t)l); } -// Also in but also here if this was included before +// Also in but also here if this was included before static inline struct cpu_info *lwp_getcpu(struct lwp *); #define curlwp _curlwp() @@ -237,7 +237,7 @@ void cpu_boot_secondary_processors(void) #define CPU_IS_PRIMARY(ci) ((ci)->ci_index == 0) #define CPU_INFO_FOREACH(cii, ci) \ cii = 0, ci = cpu_info[0]; cii < ncpu && (ci = cpu_info[cii]) != NULL; cii++ -#else +#else #define cpu_number()0 #define CPU_IS_PRIMARY(ci) true @@ -307,7 +307,7 @@ void cpu_proc_fork(struct proc *, struct void cpu_set_curpri(int); /* - * We've already preallocated the stack for the idlelwps for additional CPUs. + * We've already preallocated the stack for the idlelwps for additional CPUs. * This hook allows to return them. */ vaddr_t cpu_uarea_alloc_idlelwp(struct cpu_info *);
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Mon Feb 20 17:27:32 UTC 2017 Modified Files: src/sys/arch/arm/include: db_machdep.h Log Message: Trailing whitespace. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/include/db_machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/db_machdep.h diff -u src/sys/arch/arm/include/db_machdep.h:1.23 src/sys/arch/arm/include/db_machdep.h:1.24 --- src/sys/arch/arm/include/db_machdep.h:1.23 Mon Feb 20 10:34:55 2017 +++ src/sys/arch/arm/include/db_machdep.h Mon Feb 20 17:27:32 2017 @@ -1,29 +1,29 @@ -/* $NetBSD: db_machdep.h,v 1.23 2017/02/20 10:34:55 skrll Exp $ */ +/* $NetBSD: db_machdep.h,v 1.24 2017/02/20 17:27:32 skrll Exp $ */ /* * Copyright (c) 1996 Scott K Stevens - * + * * Mach Operating System * Copyright (c) 1991,1990 Carnegie Mellon University * All Rights Reserved. - * + * * Permission to use, copy, modify and distribute this software and its * documentation is hereby granted, provided that both the copyright * notice and this permission notice appear in all copies of the * software, derivative works or modified versions, and any portions * thereof, and that both notices appear in supporting documentation. - * + * * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * + * * Carnegie Mellon requests users of this software to return to - * + * * Software Distribution Coordinator or software.distribut...@cs.cmu.edu * School of Computer Science * Carnegie Mellon University * Pittsburgh PA 15213-3890 - * + * * any improvements or extensions that they make and grant Carnegie Mellon * the rights to redistribute these changes. */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Mon Feb 20 17:23:54 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: machdep.h Log Message: Whitespace in comment To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/include/arm32/machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/machdep.h diff -u src/sys/arch/arm/include/arm32/machdep.h:1.20 src/sys/arch/arm/include/arm32/machdep.h:1.21 --- src/sys/arch/arm/include/arm32/machdep.h:1.20 Mon Feb 20 17:22:26 2017 +++ src/sys/arch/arm/include/arm32/machdep.h Mon Feb 20 17:23:54 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.h,v 1.20 2017/02/20 17:22:26 skrll Exp $ */ +/* $NetBSD: machdep.h,v 1.21 2017/02/20 17:23:54 skrll Exp $ */ #ifndef _ARM32_BOOT_MACHDEP_H_ #define _ARM32_BOOT_MACHDEP_H_ @@ -69,7 +69,7 @@ void undefinedinstruction_bounce(trapfra void dumpsys(void); /* - * note that we use void *as all the platforms have different ideas on what + * note that we use void * as all the platforms have different ideas on what * the structure is */ u_int initarm(void *);
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: skrll Date: Mon Feb 20 17:22:26 UTC 2017 Modified Files: src/sys/arch/arm/include/arm32: machdep.h Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/include/arm32/machdep.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/machdep.h diff -u src/sys/arch/arm/include/arm32/machdep.h:1.19 src/sys/arch/arm/include/arm32/machdep.h:1.20 --- src/sys/arch/arm/include/arm32/machdep.h:1.19 Wed Nov 11 12:37:13 2015 +++ src/sys/arch/arm/include/arm32/machdep.h Mon Feb 20 17:22:26 2017 @@ -1,9 +1,9 @@ -/* $NetBSD: machdep.h,v 1.19 2015/11/11 12:37:13 jmcneill Exp $ */ +/* $NetBSD: machdep.h,v 1.20 2017/02/20 17:22:26 skrll Exp $ */ #ifndef _ARM32_BOOT_MACHDEP_H_ #define _ARM32_BOOT_MACHDEP_H_ -/* Define various stack sizes in pages */ +/* Define various stack sizes in pages */ #ifndef IRQ_STACK_SIZE #define IRQ_STACK_SIZE 1 #endif @@ -68,7 +68,7 @@ void prefetch_abort_handler(trapframe_t void undefinedinstruction_bounce(trapframe_t *); void dumpsys(void); -/* +/* * note that we use void *as all the platforms have different ideas on what * the structure is */
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Mon Feb 20 10:34:55 UTC 2017
Modified Files:
src/sys/arch/arm/include: db_machdep.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/include/db_machdep.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/db_machdep.h
diff -u src/sys/arch/arm/include/db_machdep.h:1.22 src/sys/arch/arm/include/db_machdep.h:1.23
--- src/sys/arch/arm/include/db_machdep.h:1.22 Sat Sep 13 18:08:38 2014
+++ src/sys/arch/arm/include/db_machdep.h Mon Feb 20 10:34:55 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.h,v 1.22 2014/09/13 18:08:38 matt Exp $ */
+/* $NetBSD: db_machdep.h,v 1.23 2017/02/20 10:34:55 skrll Exp $ */
/*
* Copyright (c) 1996 Scott K Stevens
@@ -81,7 +81,7 @@ extern db_regs_t *ddb_regp;
#define T_BREAKPOINT (1)
#define IS_BREAKPOINT_TRAP(type, code) ((type) == T_BREAKPOINT)
-#define IS_WATCHPOINT_TRAP(type, code) (0)
+#define IS_WATCHPOINT_TRAP(type, code) (0)
#define inst_trap_return(ins) (0)
/* ldmxx reg, {..., pc}
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: christos Date: Fri Jan 27 17:21:51 UTC 2017 Modified Files: src/sys/arch/arm/include: types.h Log Message: remove __HAVE_COMPAT_NETBSD32 To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/include/types.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/types.h diff -u src/sys/arch/arm/include/types.h:1.33 src/sys/arch/arm/include/types.h:1.34 --- src/sys/arch/arm/include/types.h:1.33 Thu Jan 26 10:55:09 2017 +++ src/sys/arch/arm/include/types.h Fri Jan 27 12:21:51 2017 @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.33 2017/01/26 15:55:09 christos Exp $ */ +/* $NetBSD: types.h,v 1.34 2017/01/27 17:21:51 christos Exp $ */ /* * Copyright (c) 1990 The Regents of the University of California. @@ -90,7 +90,6 @@ typedef int __register_t; #if defined(__ARM_EABI__) && defined(_ARM_ARCH_6) #define __HAVE_ATOMIC64_OPS #endif -#define __HAVE_COMPAT_NETBSD32 #if defined(_KERNEL) || defined(_KMEMUSER) #define PCU_FPU 0
