Re: OpenBSD joining worldwide software patent non-agression community
On Fri, Feb 14, 2014 at 08:37:32PM +0100, Valer Mischenko wrote: Hi the OpenBSD team, Ken Westerback advised me to appeal to you as a collective. My name is Valer and I am writing to you on behalf of the Open Invention Network (OIN). Our mission is to support projects developing or using Open Source and Linux-related technology by deterring patent aggression. We do this through a community that pledges not to assert patents against each other over this technology. This pledge covers over 2,100 Open Source packages. It is structured to reduce risk on core operating system and middleware technologies. Almost 750 projects and companies from all areas of technology creation, deployment and use have joined our community so far (see not very up to date list: http://www.openinventionnetwork.com/licensees.php) We wanted to invite OpenBSD Foundation to our community. We understand that there is no organization that owns or controls OpenBSD, but that is valid for lots of projects / distress who joined the non-aggression pact. Most of them are also autonomous collectives of individual contributors, each of various degrees of current influence over the source code. Mostly the team decides by consensus who may sign the pledge (can be done digitally). You may be interested in our community credentials and to get some more context about our work. Here is an endorsement from Eben Moglen, Chairman of the Software Freedom Law Center: http://emoglen.law.columbia.edu/now/organizations/OIN Here is an endorsement from Jim Zemlin, Executive Director of the Linux Foundation: http://www.linux-foundation.org/weblogs/jzemlin/2009/09/09/protecting-linux-from-microsoft-yesmicrosoft-got-caught/ Our community is free to join. The only thing we want is a pledge that OpenBSD would never use patents aggressively against the broader Linux System. Of course it never will, and that's a symbolic gesture, but it remains very important for our work. When we bind bigger companies with this pledge we are sure they will not attack the users of OpenBSD for example. But their participation in OIN is also very important in various other aspects. And these companies are numerous. For example Valve Software and Dropbox are on of the latest bigger companies joined in. UnitedStack from China joined just a weeks hours before. Pretty much everyone else is in there too, from Red Hat to GNOME, Fujitsu to CentOS, Google to KDE to OpenStack Foundation. This is the largest community to address software patent challenges in the world. The idea is: when everybody pledges freedom, there will be no wars. We are passionate supporters of open innovation and the Linux System in a very broad sense. I hope we can work together by welcoming OpenBSD as a project to our non-aggression community. (And may be also OpenSSH, OpenBGPD, OpenNTPD, and OpenCVS as separate projects.) Yes, we need mass to shift the current state of affairs to the better. Every single voice helps us face current market challenges while investing in a more collaborative future. Attached is a very short overview of OIN + FAQs, but I am happy to answer any questions and to explain in more detail why the pledge of patent non-aggression is so important for open innovation. May you decide positively there is a possibility to sign online: http://licenses.openinventionnetwork.com Please let me know what you think guys. Faithfully, Valer Mischenko, Open Invention Network www.openinventionnetwork.com OpenBSD is what part of the 'Linux System' exactly? :-)
Re: Iso image integrity verification
On Wed, Sep 11, 2013 at 01:57:22PM -0400, Brandon Mercer wrote: There's literally the same thing on the mirror? http://ftp.openbsd.org/pub/OpenBSD/snapshots/amd64/SHA256 This discussion is probably more suited for misc@, but as Brandon wrote, SHA256 checksums are on all the mirrors. If you don't trust your local ftp.openbsdmirror.ccTLD, it might be worth fetching the sets and then grabbing the SHA256 file directly from ftp.openbsd.org. -Bryan.
Re: OpenBSD on a Nokia IP380
On Sat, Aug 24, 2013 at 06:39:11AM -0400, s_gamm...@charter.net wrote: On Fri, Aug 23, 2013 at 11:06 PM, Mike Larkin wrote: At the boot prompt, what does mach mem show? -ml Hi Mike, here's the output from mach mem. It only has 1GB of memory. Not sure why it's saying the total is 2GB. Stan Using drive 0, partition 3. Loading. probing: pc0 com0 com1 pci mem[637K 1023M 1023M a20=on] disk: hd0+ OpenBSD/i386 BOOT 3.21 switching console to com0 OpenBSD/i386 BOOT 3.21 boot: illegal argument acpi boot mach mem Region 0: type 1 at 0x0 for 637KB Region 1: type 2 at 0x9f400 for 3KB Region 2: type 1 at 0x10 for 1047552KB Region 3: type 1 at 0x10 for 1047552KB Region 4: type 2 at 0xfff0 for 1024KB Low ram: 637KB High ram: 2095104KB Total free memory: 2095741KB boot $ This is likely a problem with the BIOS on the system, the memory map has duplicate entries.. You can attempt to manually fix this at boot using a variation of the same command used to retreive the mappings: boot mach mem =1023M You can play around with it, maybe try removing both of the duplicates first: boot mach mem -0x3ff0@0x10 boot mach mem -0x3ff0@0x10 -Bryan.
Re: OpenBSD on a Nokia IP380
On Sat, Aug 24, 2013 at 11:37:25AM -0400, s_gamm...@charter.net wrote: Bryan, removing both gives this warning: too little memory available;running in degraded mode press a key to confirm [ using 749064 bytes of bsd ELF symbol table ] Copyright (c) 1982, 1986, 1989, 1991, 1993 The Regents of the University of California. All rights reserved. Copyright (c) 1995-2013 OpenBSD. All rights reserved. http://www.OpenBSD.org OpenBSD 5.3 (GENERIC) #50: Tue Mar 12 18:35:23 MDT 2013 dera...@i386.openbsd.org:/usr/src/sys/arch/i386/compile/GENERIC cpu0: Intel Pentium III (GenuineIntel 686-class) 867 MHz cpu0: FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PSE36,PSN,MMX,FXSR,SSE real mem = 585728 (0MB) avail mem = 790528 (0MB) panic: procinit: malloc Stopped at Debugger+0x4: popl%ebp Debugger(d08fdcbc,d0bc9f04,d08d9e90,d0bc9f04,bc8000) at Debugger+0x4 panic(d08d9e90,29,2,d0a548c8,0) at panic+0x5d procinit(d08d6b00,d08d8f40,c0,d0bc9f4c,1) at procinit+0x29c main(d02004f6,d02004fe,0,0,0) at main+0x75 RUN AT LEAST 'trace' AND 'ps' AND INCLUDE OUTPUT WHEN REPORTING THIS PANIC! I meant removing both mappings and then adding a single 1023M mapping, I didn't expect it to work with 1M of RAM. ;-) Removing only one, I get this. As you can see, all the NICs have FF and 00 as the MAC address. So, it's a bit farther, but still not quite there... Stan [ using 749064 bytes of bsd ELF symbol table ] Copyright (c) 1982, 1986, 1989, 1991, 1993 The Regents of the University of California. All rights reserved. Copyright (c) 1995-2013 OpenBSD. All rights reserved. http://www.OpenBSD.org OpenBSD 5.3 (GENERIC) #50: Tue Mar 12 18:35:23 MDT 2013 dera...@i386.openbsd.org:/usr/src/sys/arch/i386/compile/GENERIC cpu0: Intel Pentium III (GenuineIntel 686-class) 867 MHz cpu0: FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PSE36,PSN,MMX,FXSR,SSE real mem = 1073278976 (1023MB) avail mem = 1044758528 (996MB) mainbus0 at root bios0 at mainbus0: AT/286+ BIOS, date 04/30/04, BIOS32 rev. 0 @ 0xe7650 pcibios0 at bios0: rev 2.1 @ 0xe76c0/0x600 pcibios0: PCI BIOS has 9 Interrupt Routing table entries pcibios0: PCI Exclusive IRQs: 5 7 9 10 11 pcibios0: PCI Interrupt Router at 000:15:0 (ServerWorks OSB4 rev 0x00) pcibios0: PCI bus #4 is the last bus cpu0 at mainbus0: (uniprocessor) pci0 at mainbus0 bus 0: configuration mode 1 (bios) pchb0 at pci0 dev 0 function 0 ServerWorks CNB20LE Host rev 0x06 pchb1 at pci0 dev 0 function 1 ServerWorks CNB20LE Host rev 0x06 pci1 at pchb1 bus 1 ppb0 at pci1 dev 0 function 0 Intel 21154AE/BE PCI-PCI rev 0x00 pci2 at ppb0 bus 2 fxp0 at pci2 dev 3 function 0 Intel 82559ER rev 0x10, i82551: irq 11, address ff:ff:ff:ff:ff:ff inphy0 at fxp0 phy 1: i82555 10/100 PHY, rev. 4 fxp1 at pci2 dev 4 function 0 Intel 82559ER rev 0x10, i82551: irq 11, address ff:ff:ff:ff:ff:ff inphy1 at fxp1 phy 1: i82555 10/100 PHY, rev. 4 fxp2 at pci2 dev 5 function 0 Intel 82559ER rev 0x10, i82551: irq 11, address ff:ff:ff:ff:ff:ff inphy2 at fxp2 phy 1: i82555 10/100 PHY, rev. 4 fxp3 at pci2 dev 6 function 0 Intel 82559ER rev 0x10, i82551: irq 11, address ff:ff:ff:ff:ff:ff inphy3 at fxp3 phy 1: i82555 10/100 PHY, rev. 4 ppb1 at pci1 dev 2 function 0 Intel 21154AE/BE PCI-PCI rev 0x00 pci3 at ppb1 bus 3 dc0 at pci3 dev 5 function 0 DEC 21142/3 rev 0x41: irq 10, address 00:00:00:00:00:00 bmtphy0 at dc0 phy 1: BCM5221 100baseTX PHY, rev. 4 dc1 at pci3 dev 6 function 0 DEC 21142/3 rev 0x41: irq 10, address 00:00:00:00:00:00 bmtphy1 at dc1 phy 1: BCM5221 100baseTX PHY, rev. 4 cbb0 at pci0 dev 9 function 0 TI PCI1420 CardBus rev 0x00: couldn't map interrupt cbb1 at pci0 dev 9 function 1 TI PCI1420 CardBus rev 0x00: couldn't map interrupt ubsec0 at pci0 dev 10 function 0 Broadcom 5802 rev 0x01: 3DES MD5 SHA1 RNG PK, irq 11 piixpm0 at pci0 dev 15 function 0 ServerWorks OSB4 rev 0x51: polling iic0 at piixpm0 lmenv0 at iic0 addr 0x2d: lm87 rev 6, starting scan lmenv1 at iic0 addr 0x2e: lm87 rev 6, starting scan spdmem0 at iic0 addr 0x50: 512MB SDRAM registered ECC PC133CL2 spdmem1 at iic0 addr 0x51: 512MB SDRAM registered ECC PC133CL2 pciide0 at pci0 dev 15 function 1 ServerWorks OSB4 IDE rev 0x00: DMA wd0 at pciide0 channel 0 drive 0: FUJITSU MHT2040AS wd0: 16-sector PIO, LBA, 38154MB, 78140160 sectors wd0(pciide0:0:0): using PIO mode 4, DMA mode 2, Ultra-DMA mode 2 ohci0 at pci0 dev 15 function 2 ServerWorks OSB4/CSB5 USB rev 0x04: irq 11, version 1.0, legacy support DO NOT EVEN BOTHER REPORTING THIS WITHOUT INCLUDING THAT INFORMATION! What is the new panic message? Does it enter ddb? The bogus MAC addresses could indicate a problem, but it's possible there is no EPROM defaults.. once you boot successfully you can configure your it manually with ifconfig int lladdr xx:xx:xx:xx:xx:xx. You mentioned problems with USB on FreeBSD, so try disabling ohci(4) in UKC and see if that helps (..remember
Add ITE 8728 device to it(4)
It seems there's an ITE 8728 chip on my motherboard, and, it's showing some sensible information! :-) ok? it0 at isa0 port 0x2e/2: IT8728F rev 1, EC port 0x228 hw.sensors.it0.temp0=37.00 degC hw.sensors.it0.temp1=34.00 degC hw.sensors.it0.temp2=27.00 degC hw.sensors.it0.fan0=2020 RPM hw.sensors.it0.fan1=0 RPM hw.sensors.it0.fan2=0 RPM hw.sensors.it0.volt0=1.87 VDC (VCORE_A) hw.sensors.it0.volt1=1.95 VDC (VCORE_B) hw.sensors.it0.volt2=2.69 VDC (+3.3V) hw.sensors.it0.volt3=3.79 VDC (+5V) hw.sensors.it0.volt4=10.82 VDC (+12V) hw.sensors.it0.volt5=-1.75 VDC (-12V) hw.sensors.it0.volt6=0.62 VDC (-5V) hw.sensors.it0.volt7=3.76 VDC (+5VSB) hw.sensors.it0.volt8=2.05 VDC (VBAT) Index: dev/isa/it.c === RCS file: /cvs/src/sys/dev/isa/it.c,v retrieving revision 1.42 diff -u -p -r1.42 it.c --- dev/isa/it.c14 Dec 2012 13:17:29 - 1.42 +++ dev/isa/it.c21 Mar 2013 17:59:54 - @@ -168,6 +168,7 @@ it_match(struct device *parent, void *ma case IT_ID_8720: case IT_ID_8721: case IT_ID_8726: + case IT_ID_8728: case IT_ID_8772: /* get environment controller base address */ it_writereg(ia-ia_iot, ioh, IT_LDN, IT_EC_LDN); Index: dev/isa/itvar.h === RCS file: /cvs/src/sys/dev/isa/itvar.h,v retrieving revision 1.14 diff -u -p -r1.14 itvar.h --- dev/isa/itvar.h 14 Dec 2012 13:17:29 - 1.14 +++ dev/isa/itvar.h 21 Mar 2013 17:59:54 - @@ -47,6 +47,7 @@ #define IT_ID_8720 0x8720 #define IT_ID_8721 0x8721 #define IT_ID_8726 0x8726 +#define IT_ID_8728 0x8728 #define IT_ID_8772 0x8772 #define IT_CCR 0x02
Re: tedu
On Fri, Mar 15, 2013 at 12:20:16PM -0400, Okan Demirmen wrote:
Index: bin/rm/Makefile
===
RCS file: /home/open/anoncvs/cvs/src/bin/rm/Makefile,v
retrieving revision 1.3
diff -u -p -r1.3 Makefile
--- bin/rm/Makefile 21 Sep 1997 11:35:40 - 1.3
+++ bin/rm/Makefile 15 Mar 2013 16:13:45 -
@@ -2,4 +2,6 @@
PROG=rm
+LINKS= ${BINDIR}/rm ${BINDIR}/tedu
+
.include bsd.prog.mk
Index: gnu/usr.bin/cvs/src/main.c
===
RCS file: /home/open/anoncvs/cvs/src/gnu/usr.bin/cvs/src/main.c,v
retrieving revision 1.39
diff -u -p -r1.39 main.c
--- gnu/usr.bin/cvs/src/main.c22 Jul 2010 10:31:10 - 1.39
+++ gnu/usr.bin/cvs/src/main.c15 Mar 2013 16:13:13 -
@@ -141,6 +141,7 @@ static const struct cmd
#endif
{ status, st, stat, cvsstatus, CVS_CMD_USES_WORK_DIR
},
{ tag, ta, freeze,cvstag,
CVS_CMD_MODIFIES_REPOSITORY | CVS_CMD_USES_WORK_DIR },
+{ tedu, tedu, tedu, cvsremove,
CVS_CMD_MODIFIES_REPOSITORY | CVS_CMD_USES_WORK_DIR },
{ unedit, NULL, NULL,unedit,
CVS_CMD_MODIFIES_REPOSITORY | CVS_CMD_USES_WORK_DIR },
{ update, up, upd, update,CVS_CMD_USES_WORK_DIR
},
{ version, ve, ver, version, 0 },
Just don't forget to tedu opencvs.. uhh, I mean, add tedu to opencvs.
Add family 15h devices, km(4) sensor.
So someone sent me a new toy, this adds the k15 PCIe devices. Names are
copied from the equivalent k14.. because I'm not sure wherefrom they
were originally sourced.
For km(4), it seems the temperature calculations are off.. according to
the BKDG curtmp doesn't seem to actually reflect the real temperature,
but some sort of value in relation to the max temperature.
On my system is shows around 10degC when idle, reaching 40degC when all
cores are under load. So.. the value increases! :P
The FreeBSD driver has all sorts of workarounds I'm not sure we want,
but it shows similar temperatures values.
ok?
-Bryan.
Index: dev/pci/km.c
===
RCS file: /cvs/src/sys/dev/pci/km.c,v
retrieving revision 1.5
diff -u -p -u -r1.5 km.c
--- dev/pci/km.c31 May 2011 00:19:55 - 1.5
+++ dev/pci/km.c12 Mar 2013 22:19:16 -
@@ -70,7 +70,8 @@ struct cfdriver km_cd = {
static const struct pci_matchid km_devices[] = {
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_10_MISC },
{ PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_11_MISC },
- { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_14_MISC }
+ { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_14_MISC },
+ { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_15_MISC }
};
Index: dev/pci/pcidevs
===
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
retrieving revision 1.1669
diff -u -p -u -r1.1669 pcidevs
--- dev/pci/pcidevs 8 Feb 2013 07:58:18 - 1.1669
+++ dev/pci/pcidevs 12 Mar 2013 22:19:16 -
@@ -693,6 +693,12 @@ product AMD AMD64_14_PCIE_20x1513 AMD64
product AMD AMD64_14_PCIE_30x1514 AMD64 14h PCIE
product AMD AMD64_14_PCIE_40x1515 AMD64 14h PCIE
product AMD AMD64_14_PCIE_50x1516 AMD64 14h PCIE
+product AMD AMD64_15_LINK 0x1600 AMD64 15h Link Cfg
+product AMD AMD64_15_ADDR 0x1601 AMD64 15h Address Map
+product AMD AMD64_15_DRAM 0x1602 AMD64 15h DRAM Cfg
+product AMD AMD64_15_MISC 0x1603 AMD64 15h Misc Cfg
+product AMD AMD64_15_CPU_PM0x1604 AMD64 15h CPU Power
+product AMD AMD64_15_HB0x1605 AMD64 15h Host
product AMD AMD64_14_LINK 0x1700 AMD64 14h Link Cfg
product AMD AMD64_14_ADDR 0x1701 AMD64 14h Address Map
product AMD AMD64_14_DRAM 0x1702 AMD64 14h DRAM Cfg
Re: add /etc/drirc to xetc set
On Thu, Jan 10, 2013 at 01:18:21AM +0100, Stefan Sperling wrote: radeon/r600 acceleration currently only works properly with the following drirc snippet: driconf device screen=0 driver=r600 application name=all option name=fthrottle_mode value=0/ option name=vblank_mode value=0/ /application /device /driconf See http://marc.info/?l=openbsd-cvsm=130679235018645w=2 Until this is fixed, I think we should include a /etc/drirc file as part of the xetc set. Else, cards supported by this driver do not properly support 3d and xvideo out of the box. Now that radeondrm(4) is attaching to more devices thanks to jsg@, this definitely makes sense.. :-) -Bryan.
Re: dhclient ignore
On Thu, Jul 26, 2012 at 10:09:28PM -0400, Ted Unangst wrote:
I have a system with two network interfaces (em0 and em1), running dhcp
on both. Both dhcp servers provide me with a nameserver, but only one
of them works (I can't fix this). There is a config file for dhclient
I can use, but it only supports the supersede keyword. I don't want
to statically configure a nameserver override for em1, because the
whole point is that the good nameserver on em0 can change. I just
want to say pretend this option did not arrive.
Diff below adds a little support for an ignore keyword. Like
supersede, except don't actually use the supplied value.
Not commenting on the diff or the feature, which could indeed be the
corect solution, if maybe only to work around some strict/broken servers.
I was under the impression that if you added an request statement
excluding the 'domain-name-servers' option the server would honour that and
only offer the options you've explictly requested..
Does something like this work for you?
interface em0 {
request subnet-mask, broadcast-address, routers, domain-name-servers;
}
interface em1 {
request subnet-mask, broadcast-address, routers;
}
-Bryan.
Hide user in top(1).
Hi,
Sometimes it's handy to hide a user from top(1) output, on a desktop
system for example you might want to quickly hide yourself and see what
else is running.
The syntax for interactive mode is u -user, passwd(5) entries shouldn't
begin with that character.
'-', like '+', will clear all filters when used without an argument.
Non-interactive mode is unchanged.
Anyone like this?
-Bryan.
Index: display.c
===
RCS file: /cvs/src/usr.bin/top/display.c,v
retrieving revision 1.42
diff -u -p -u -r1.42 display.c
--- display.c 15 Apr 2012 19:52:16 - 1.42
+++ display.c 1 Jun 2012 19:29:08 -
@@ -782,7 +782,7 @@ show_help(void)
r count pid - renice process `pid' to nice value `count'\n
S- toggle the display of system processes\n
s time - change delay between displays to `time' seconds\n
- u user - display processes for `user' (u+ selects all
users)\n
+ u [-]user- show processes for `user' (u+ shows all, u -user
hides one)\n
\n);
if (smart_terminal) {
Index: machine.c
===
RCS file: /cvs/src/usr.bin/top/machine.c,v
retrieving revision 1.72
diff -u -p -u -r1.72 machine.c
--- machine.c 21 Apr 2012 03:14:50 - 1.72
+++ machine.c 1 Jun 2012 19:29:08 -
@@ -330,6 +330,7 @@ get_process_info(struct system_info *si,
int (*compare) (const void *, const void *))
{
int show_idle, show_system, show_threads, show_uid, show_pid, show_cmd;
+ int hide_uid;
int total_procs, active_procs;
struct kinfo_proc **prefp, *pp;
int what = KERN_PROC_KTHREAD;
@@ -356,6 +357,7 @@ get_process_info(struct system_info *si,
show_system = sel-system;
show_threads = sel-threads;
show_uid = sel-uid != (uid_t)-1;
+ hide_uid = sel-huid != (uid_t)-1;
show_pid = sel-pid != (pid_t)-1;
show_cmd = sel-command != NULL;
@@ -381,6 +383,7 @@ get_process_info(struct system_info *si,
if (pp-p_stat != SZOMB
(show_idle || pp-p_pctcpu != 0 ||
pp-p_stat == SRUN)
+ (!hide_uid || pp-p_ruid != sel-huid)
(!show_uid || pp-p_ruid == sel-uid)
(!show_pid || pp-p_pid == sel-pid)
(!show_cmd || strstr(pp-p_comm,
Index: machine.h
===
RCS file: /cvs/src/usr.bin/top/machine.h,v
retrieving revision 1.16
diff -u -p -u -r1.16 machine.h
--- machine.h 10 Apr 2011 03:20:59 - 1.16
+++ machine.h 1 Jun 2012 19:29:08 -
@@ -74,6 +74,7 @@ struct process_select {
int system; /* show system processes */
int threads;/* show threads */
uid_t uid;/* only this uid (unless uid == -1) */
+ uid_t huid; /* hide this uid (unless huid == -1) */
pid_t pid;/* only this pid (unless pid == -1) */
char *command;/* only this command (unless == NULL) */
};
Index: top.1
===
RCS file: /cvs/src/usr.bin/top/top.1,v
retrieving revision 1.59
diff -u -p -u -r1.59 top.1
--- top.1 16 Dec 2011 14:50:24 - 1.59
+++ top.1 1 Jun 2012 19:29:08 -
@@ -354,11 +354,16 @@ Toggle the display of system processes.
Set the delay between screen updates to
.Ar time
seconds.
-.It u Ar user
+.It Xo
+.Ic u
+.Oo - Oc Ns Ar user
+.Xc
Show only those processes owned by
.Ar user .
.Sq u+
shows processes belonging to all users.
+.Sq u -user
+hides processes belonging to a single user.
.El
.Sh THE DISPLAY
.\ The actual display varies depending on the specific variant of Unix
Index: top.c
===
RCS file: /cvs/src/usr.bin/top/top.c,v
retrieving revision 1.77
diff -u -p -u -r1.77 top.c
--- top.c 20 Apr 2012 16:36:11 - 1.77
+++ top.c 1 Jun 2012 19:29:08 -
@@ -282,6 +282,7 @@ main(int argc, char *argv[])
ps.idle = Yes;
ps.system = No;
ps.uid = (uid_t)-1;
+ ps.huid = (uid_t)-1;
ps.pid = (pid_t)-1;
ps.command = NULL;
@@ -540,7 +541,6 @@ rundisplay(void)
char ch, *iptr;
int change, i;
struct pollfd pfd[1];
- uid_t uid;
static char command_chars[] = \f qh?en#sdkriIuSopCHg+P1;
/*
@@ -774,15 +774,21 @@ rundisplay(void)
new_message(MT_standout,
Username to show: );
if (readline(tempbuf, sizeof(tempbuf)) 0) {
- if (tempbuf[0] == '+'
+ if ((tempbuf[0] == '+' || tempbuf[0] == '-')
Re: Hide user in top(1).
On Fri, Jun 01, 2012 at 04:02:11PM -0400, Brynet wrote:
Hi,
Sometimes it's handy to hide a user from top(1) output, on a desktop
system for example you might want to quickly hide yourself and see what
else is running.
The syntax for interactive mode is u -user, passwd(5) entries shouldn't
begin with that character.
'-', like '+', will clear all filters when used without an argument.
Non-interactive mode is unchanged.
Anyone like this?
-Bryan.
Ugh, wrong diff.
-Bryan.
Index: display.c
===
RCS file: /cvs/src/usr.bin/top/display.c,v
retrieving revision 1.42
diff -u -p -u -r1.42 display.c
--- display.c 15 Apr 2012 19:52:16 - 1.42
+++ display.c 1 Jun 2012 19:29:08 -
@@ -782,7 +782,7 @@ show_help(void)
r count pid - renice process `pid' to nice value `count'\n
S- toggle the display of system processes\n
s time - change delay between displays to `time' seconds\n
- u user - display processes for `user' (u+ selects all
users)\n
+ u [-]user- show processes for `user' (u+ shows all, u -user
hides user)\n
\n);
if (smart_terminal) {
Index: machine.c
===
RCS file: /cvs/src/usr.bin/top/machine.c,v
retrieving revision 1.72
diff -u -p -u -r1.72 machine.c
--- machine.c 21 Apr 2012 03:14:50 - 1.72
+++ machine.c 1 Jun 2012 19:29:08 -
@@ -330,6 +330,7 @@ get_process_info(struct system_info *si,
int (*compare) (const void *, const void *))
{
int show_idle, show_system, show_threads, show_uid, show_pid, show_cmd;
+ int hide_uid;
int total_procs, active_procs;
struct kinfo_proc **prefp, *pp;
int what = KERN_PROC_KTHREAD;
@@ -356,6 +357,7 @@ get_process_info(struct system_info *si,
show_system = sel-system;
show_threads = sel-threads;
show_uid = sel-uid != (uid_t)-1;
+ hide_uid = sel-huid != (uid_t)-1;
show_pid = sel-pid != (pid_t)-1;
show_cmd = sel-command != NULL;
@@ -381,6 +383,7 @@ get_process_info(struct system_info *si,
if (pp-p_stat != SZOMB
(show_idle || pp-p_pctcpu != 0 ||
pp-p_stat == SRUN)
+ (!hide_uid || pp-p_ruid != sel-huid)
(!show_uid || pp-p_ruid == sel-uid)
(!show_pid || pp-p_pid == sel-pid)
(!show_cmd || strstr(pp-p_comm,
Index: machine.h
===
RCS file: /cvs/src/usr.bin/top/machine.h,v
retrieving revision 1.16
diff -u -p -u -r1.16 machine.h
--- machine.h 10 Apr 2011 03:20:59 - 1.16
+++ machine.h 1 Jun 2012 19:29:08 -
@@ -74,6 +74,7 @@ struct process_select {
int system; /* show system processes */
int threads;/* show threads */
uid_t uid;/* only this uid (unless uid == -1) */
+ uid_t huid; /* hide this uid (unless huid == -1) */
pid_t pid;/* only this pid (unless pid == -1) */
char *command;/* only this command (unless == NULL) */
};
Index: top.1
===
RCS file: /cvs/src/usr.bin/top/top.1,v
retrieving revision 1.59
diff -u -p -u -r1.59 top.1
--- top.1 16 Dec 2011 14:50:24 - 1.59
+++ top.1 1 Jun 2012 19:29:08 -
@@ -354,11 +354,16 @@ Toggle the display of system processes.
Set the delay between screen updates to
.Ar time
seconds.
-.It u Ar user
+.It Xo
+.Ic u
+.Oo - Oc Ns Ar user
+.Xc
Show only those processes owned by
.Ar user .
.Sq u+
shows processes belonging to all users.
+.Sq u -user
+hides processes belonging to a single user.
.El
.Sh THE DISPLAY
.\ The actual display varies depending on the specific variant of Unix
Index: top.c
===
RCS file: /cvs/src/usr.bin/top/top.c,v
retrieving revision 1.77
diff -u -p -u -r1.77 top.c
--- top.c 20 Apr 2012 16:36:11 - 1.77
+++ top.c 1 Jun 2012 19:29:08 -
@@ -282,6 +282,7 @@ main(int argc, char *argv[])
ps.idle = Yes;
ps.system = No;
ps.uid = (uid_t)-1;
+ ps.huid = (uid_t)-1;
ps.pid = (pid_t)-1;
ps.command = NULL;
@@ -540,7 +541,6 @@ rundisplay(void)
char ch, *iptr;
int change, i;
struct pollfd pfd[1];
- uid_t uid;
static char command_chars[] = \f qh?en#sdkriIuSopCHg+P1;
/*
@@ -774,15 +774,21 @@ rundisplay(void)
new_message(MT_standout,
Username to show: );
if (readline(tempbuf, sizeof(tempbuf)) 0) {
- if (tempbuf[0
Re: IBM-M4 available for getting OpenBSD working with it.
On Wed, May 16, 2012 at 03:20:08PM +0200, chefren wrote: The Netherlands We have a brand new IBM-M4 available for getting OpenBSD working with it. We are interested in working 32 and 64 versions of OpenBSD for the basic M4 frame with 4 Intel i350 Ethernet ports. FreeBSD drivers for the i350 seem to be available. We presume the work consists of porting the driver and checking/fixing the interrupt setup. It's a basic version of the very silent and nicest build 1U server we have ever seen (truly state of the art). As an extra there is a dual 10Gbit Ethernet card inserted with SPF+ ports, (we don't need those working). The person who gets the latest version of OpenBSD-5.1 working within a reasonable time frame and makes the working source code available to the community may have it. If you can make us believe you can fix the problem sooner than someone else we will be happy to send the machine to you if needed. If you just send us working code, better! After approval we will send the machine FOB to the address you want. +++chefren This isn't a donation, this is a job listing. -Bryan.
SMBus support for AMD Hudson-2.
Hudson-2/SB900 was tested by Jorg Willekens, works the same as the SB800.
...
piixpm0 at pci0 dev 20 function 0 AMD Hudson-2 SMBus rev 0x13: polling
iic0 at piixpm0
spdmem0 at iic0 addr 0x50: 4GB DDR3 SDRAM PC3-10600
spdmem1 at iic0 addr 0x51: 4GB DDR3 SDRAM PC3-10600
spdmem2 at iic0 addr 0x52: 4GB DDR3 SDRAM PC3-10600
spdmem3 at iic0 addr 0x53: 4GB DDR3 SDRAM PC3-10600
..
ok?
-Bryan.
Index: piixpm.c
===
RCS file: /cvs/src/sys/dev/pci/piixpm.c,v
retrieving revision 1.36
diff -u -p -u -r1.36 piixpm.c
--- dev/pci/piixpm.c28 May 2011 14:56:32 - 1.36
+++ dev/pci/piixpm.c5 Mar 2012 00:02:40 -
@@ -85,6 +85,8 @@ struct cfdriver piixpm_cd = {
};
const struct pci_matchid piixpm_ids[] = {
+ { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON2_SMB },
+
{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_SMB },
{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB300_SMB },
{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_SMB },
@@ -124,11 +126,13 @@ piixpm_attach(struct device *parent, str
sc-sc_iot = pa-pa_iot;
- if (PCI_VENDOR(pa-pa_id) == PCI_VENDOR_ATI
+ if ((PCI_VENDOR(pa-pa_id) == PCI_VENDOR_AMD
+ PCI_PRODUCT(pa-pa_id) == PCI_PRODUCT_AMD_HUDSON2_SMB) ||
+ (PCI_VENDOR(pa-pa_id) == PCI_VENDOR_ATI
PCI_PRODUCT(pa-pa_id) == PCI_PRODUCT_ATI_SBX00_SMB
- PCI_REVISION(pa-pa_class) = 0x40) {
+ PCI_REVISION(pa-pa_class) = 0x40)) {
/*
-* On the AMD SB800, the SMBus I/O registers are well
+* On the AMD SB800+, the SMBus I/O registers are well
* hidden. We need to look at the SMBus0En Power
* Management register to find out where they live.
* We use indirect IO access through the index/data
add missing ipad usbdevs entries + quirks.
Allows gphoto2 for PTP transfers, plus other libusb stuff in the future.
-Bryan.
Index: uaudio.c
===
RCS file: /cvs/src/sys/dev/usb/uaudio.c,v
retrieving revision 1.94
diff -u -p -u -r1.94 uaudio.c
--- uaudio.c26 Jan 2012 09:00:36 - 1.94
+++ uaudio.c30 Jan 2012 23:25:23 -
@@ -207,6 +207,10 @@ struct uaudio_devs {
UAUDIO_FLAG_BAD_AUDIO },
{ { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_TOUCH_4G },
UAUDIO_FLAG_BAD_AUDIO },
+ { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPAD },
+ UAUDIO_FLAG_BAD_AUDIO },
+ { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPAD2 },
+ UAUDIO_FLAG_BAD_AUDIO },
{ { USB_VENDOR_CREATIVE, USB_PRODUCT_CREATIVE_EMU0202 },
UAUDIO_FLAG_VENDOR_CLASS | UAUDIO_FLAG_EMU0202 |
UAUDIO_FLAG_DEPENDENT },
Index: usb_quirks.c
===
RCS file: /cvs/src/sys/dev/usb/usb_quirks.c,v
retrieving revision 1.65
diff -u -p -u -r1.65 usb_quirks.c
--- usb_quirks.c1 Dec 2011 23:02:12 - 1.65
+++ usb_quirks.c30 Jan 2012 23:25:23 -
@@ -120,7 +120,9 @@ const struct usbd_quirk_entry {
{ USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_TOUCH, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_TOUCH_2G, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_TOUCH_3G, ANY,{ UQ_BAD_HID }},
- { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_TOUCH_4G, ANY,{ UQ_BAD_HID
}},
+ { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_TOUCH_4G, ANY,{ UQ_BAD_HID }},
+ { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPAD, ANY,{ UQ_BAD_HID }},
+ { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPAD2, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_APPLE, USB_PRODUCT_APPLE_SPEAKERS, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C100, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C120, ANY,{ UQ_BAD_HID }},
Index: usbdevs
===
RCS file: /cvs/src/sys/dev/usb/usbdevs,v
retrieving revision 1.570
diff -u -p -u -r1.570 usbdevs
--- usbdevs 29 Jan 2012 10:59:23 - 1.570
+++ usbdevs 30 Jan 2012 23:25:24 -
@@ -893,8 +893,10 @@ product APPLE IPOD_TOUCH_2G0x1293 iPod
product APPLE IPHONE_3GS 0x1294 iPhone 3GS
product APPLE IPHONE_4_GSM 0x1297 iPhone 4 GSM
product APPLE IPOD_TOUCH_3G0x1299 iPod Touch 3G
+product APPLE IPAD 0x129a iPad
product APPLE IPHONE_4_CDMA0x129c iPhone 4 CDMA
product APPLE IPOD_TOUCH_4G0x129e iPod Touch 4G
+product APPLE IPAD20x129f iPad 2
product APPLE IPHONE_4S0x12a0 iPhone 4S
product APPLE ETHERNET 0x1402 Ethernet A1277
product APPLE BLUETOOTH2 0x8205 Bluetooth
Re: small vr(4) patch.
On Sat, Jan 28, 2012 at 09:57:34AM +, Stuart Henderson wrote: On 2012/01/27 21:54, Brynet wrote: Remove redundant call to vr_reset, it gets called in vr_init. Can you show me where it gets called? I don't see it. Apologies, it gets called in vr_chipinit, which is called early in vr_init. -Bryan.
small vr(4) patch.
Remove redundant call to vr_reset, it gets called in vr_init. -Bryan. Index: if_vr.c === RCS file: /cvs/src/sys/dev/pci/if_vr.c,v retrieving revision 1.113 diff -u -p -u -r1.113 if_vr.c --- dev/pci/if_vr.c 5 Jan 2012 19:08:25 - 1.113 +++ dev/pci/if_vr.c 28 Jan 2012 02:41:20 - @@ -1124,7 +1124,6 @@ vr_intr(void *arg) if (status VR_ISR_TX_UNDERRUN) printf(%s: transmit underrun\n, sc-sc_dev.dv_xname); - vr_reset(sc); vr_init(sc); status = 0; }
amd k1x patch, silly mistake.
The initial msr read is pointless now, quit passing it around. I don't use the
value in k1x_acpi_states().
My bad. But I guess it could be left in as an early detection of a newer CPU
that doesn't support K10 style msr's (..vs as soon as someone fiddles
with a sysctl or enables apmd).
-Bryan.
Index: amd64/amd64/k1x-pstate.c
===
RCS file: /cvs/src/sys/arch/amd64/amd64/k1x-pstate.c,v
retrieving revision 1.3
diff -u -p -u -r1.3 k1x-pstate.c
--- arch/amd64/amd64/k1x-pstate.c 7 Jan 2012 05:55:08 - 1.3
+++ arch/amd64/amd64/k1x-pstate.c 28 Jan 2012 02:58:15 -
@@ -76,8 +76,7 @@ void k1x_transition(struct k1x_cpu_state
#if NACPICPU 0
void k1x_acpi_init(struct k1x_cpu_state *);
-void k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int,
-u_int64_t);
+void k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int);
#endif
void
@@ -131,7 +130,7 @@ k1x_transition(struct k1x_cpu_state *cst
void
k1x_acpi_states(struct k1x_cpu_state *cstate, struct acpicpu_pss *pss,
-int nstates, u_int64_t msr)
+int nstates)
{
struct k1x_state state;
int j, n;
@@ -157,15 +156,12 @@ void
k1x_acpi_init(struct k1x_cpu_state *cstate)
{
struct acpicpu_pss *pss;
- u_int64_t msr;
cstate-n_states = acpicpu_fetch_pss(pss);
if (cstate-n_states == 0)
return;
- msr = rdmsr(MSR_K1X_STATUS);
-
- k1x_acpi_states(cstate, pss, cstate-n_states, msr);
+ k1x_acpi_states(cstate, pss, cstate-n_states);
return;
}
Index: i386/i386/k1x-pstate.c
===
RCS file: /cvs/src/sys/arch/i386/i386/k1x-pstate.c,v
retrieving revision 1.3
diff -u -p -u -r1.3 k1x-pstate.c
--- arch/i386/i386/k1x-pstate.c 7 Jan 2012 05:55:08 - 1.3
+++ arch/i386/i386/k1x-pstate.c 28 Jan 2012 02:58:16 -
@@ -76,8 +76,7 @@ void k1x_transition(struct k1x_cpu_state
#if NACPICPU 0
void k1x_acpi_init(struct k1x_cpu_state *);
-void k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int,
-u_int64_t);
+void k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int);
#endif
void
@@ -131,7 +130,7 @@ k1x_transition(struct k1x_cpu_state *cst
void
k1x_acpi_states(struct k1x_cpu_state *cstate, struct acpicpu_pss *pss,
-int nstates, u_int64_t msr)
+int nstates)
{
struct k1x_state state;
int j, n;
@@ -157,15 +156,12 @@ void
k1x_acpi_init(struct k1x_cpu_state *cstate)
{
struct acpicpu_pss *pss;
- u_int64_t msr;
cstate-n_states = acpicpu_fetch_pss(pss);
if (cstate-n_states == 0)
return;
- msr = rdmsr(MSR_K1X_STATUS);
-
- k1x_acpi_states(cstate, pss, cstate-n_states, msr);
+ k1x_acpi_states(cstate, pss, cstate-n_states);
return;
}
k10+ pstate fix.
Check for valid ACPI _PSS object before doing the MSR read, fixes KVM brokeness
as reported/tested by Walter Haidinger.
It could also potentially avoid a general protection fault on theoretically
real (..yet so far not witnessed) systems.
I'm still open to doing the CPUID check, but as I explained in a previous mail
it shouldn't be necessary.
Testers, ok's and commit welcome.
-Bryan.
Index: arch/amd64/amd64/k1x-pstate.c
===
RCS file: /cvs/src/sys/arch/amd64/amd64/k1x-pstate.c,v
retrieving revision 1.2
diff -u -p -u -r1.2 k1x-pstate.c
--- arch/amd64/amd64/k1x-pstate.c 29 May 2011 12:29:28 - 1.2
+++ arch/amd64/amd64/k1x-pstate.c 13 Nov 2011 18:38:25 -
@@ -75,7 +75,7 @@ struct k1x_cpu_state *k1x_current_state;
void k1x_transition(struct k1x_cpu_state *, int);
#if NACPICPU 0
-void k1x_acpi_init(struct k1x_cpu_state *, u_int64_t);
+void k1x_acpi_init(struct k1x_cpu_state *);
void k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int,
u_int64_t);
#endif
@@ -154,14 +154,17 @@ k1x_acpi_states(struct k1x_cpu_state *cs
}
void
-k1x_acpi_init(struct k1x_cpu_state *cstate, u_int64_t msr)
+k1x_acpi_init(struct k1x_cpu_state *cstate)
{
struct acpicpu_pss *pss;
+ u_int64_t msr;
cstate-n_states = acpicpu_fetch_pss(pss);
if (cstate-n_states == 0)
return;
+ msr = rdmsr(MSR_K1X_STATUS);
+
k1x_acpi_states(cstate, pss, cstate-n_states, msr);
return;
@@ -172,12 +175,9 @@ k1x_acpi_init(struct k1x_cpu_state *csta
void
k1x_init(struct cpu_info *ci)
{
-#if NACPICPU 0
- u_int64_t msr;
-#endif
- u_int i;
struct k1x_cpu_state *cstate;
struct k1x_state *state;
+ u_int i;
if (setperf_prio 1)
return;
@@ -189,8 +189,7 @@ k1x_init(struct cpu_info *ci)
cstate-n_states = 0;
#if NACPICPU 0
- msr = rdmsr(MSR_K1X_STATUS);
- k1x_acpi_init(cstate, msr);
+ k1x_acpi_init(cstate);
#endif
if (cstate-n_states) {
printf(%s: %d MHz: speeds:,
Index: arch/i386/i386/k1x-pstate.c
===
RCS file: /cvs/src/sys/arch/i386/i386/k1x-pstate.c,v
retrieving revision 1.2
diff -u -p -u -r1.2 k1x-pstate.c
--- arch/i386/i386/k1x-pstate.c 29 May 2011 12:29:28 - 1.2
+++ arch/i386/i386/k1x-pstate.c 13 Nov 2011 18:38:25 -
@@ -75,7 +75,7 @@ struct k1x_cpu_state *k1x_current_state;
void k1x_transition(struct k1x_cpu_state *, int);
#if NACPICPU 0
-void k1x_acpi_init(struct k1x_cpu_state *, u_int64_t);
+void k1x_acpi_init(struct k1x_cpu_state *);
void k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int,
u_int64_t);
#endif
@@ -154,14 +154,17 @@ k1x_acpi_states(struct k1x_cpu_state *cs
}
void
-k1x_acpi_init(struct k1x_cpu_state *cstate, u_int64_t msr)
+k1x_acpi_init(struct k1x_cpu_state *cstate)
{
struct acpicpu_pss *pss;
+ u_int64_t msr;
cstate-n_states = acpicpu_fetch_pss(pss);
if (cstate-n_states == 0)
return;
+ msr = rdmsr(MSR_K1X_STATUS);
+
k1x_acpi_states(cstate, pss, cstate-n_states, msr);
return;
@@ -172,12 +175,9 @@ k1x_acpi_init(struct k1x_cpu_state *csta
void
k1x_init(struct cpu_info *ci)
{
-#if NACPICPU 0
- u_int64_t msr;
-#endif
- u_int i;
struct k1x_cpu_state *cstate;
struct k1x_state *state;
+ u_int i;
if (setperf_prio 1)
return;
@@ -189,8 +189,7 @@ k1x_init(struct cpu_info *ci)
cstate-n_states = 0;
#if NACPICPU 0
- msr = rdmsr(MSR_K1X_STATUS);
- k1x_acpi_init(cstate, msr);
+ k1x_acpi_init(cstate);
#endif
if (cstate-n_states) {
printf(%s: %d MHz: speeds:,
vr(4) suspend/resume.
It seems to work, I'm not really sure if any laptops used rhine, but this
makes ACPI suspend/resume work on one of my early ACPI-capable systems.
Tested on:
vr0 at pci0 dev 12 function 0 VIA VT6105 RhineIII rev 0x86: apic 2 int 19,
address 00:19:5b:82:a1:e0
-Bryan.
Index: if_vr.c
===
RCS file: /cvs/src/sys/dev/pci/if_vr.c,v
retrieving revision 1.112
diff -u -p -u -r1.112 if_vr.c
--- dev/pci/if_vr.c 8 Dec 2011 20:19:23 - 1.112
+++ dev/pci/if_vr.c 20 Dec 2011 01:02:56 -
@@ -103,9 +103,11 @@
int vr_probe(struct device *, void *, void *);
int vr_quirks(struct pci_attach_args *);
void vr_attach(struct device *, struct device *, void *);
+int vr_activate(struct device *, int);
struct cfattach vr_ca = {
- sizeof(struct vr_softc), vr_probe, vr_attach
+ sizeof(struct vr_softc), vr_probe, vr_attach, NULL,
+ vr_activate
};
struct cfdriver vr_cd = {
NULL, vr, DV_IFNET
@@ -120,6 +122,7 @@ void vr_rxtick(void *);
int vr_intr(void *);
void vr_start(struct ifnet *);
int vr_ioctl(struct ifnet *, u_long, caddr_t);
+void vr_chipinit(struct vr_softc *);
void vr_init(void *);
void vr_stop(struct vr_softc *);
void vr_watchdog(struct ifnet *);
@@ -567,27 +570,10 @@ vr_attach(struct device *parent, struct
printf(: %s, intrstr);
sc-vr_revid = PCI_REVISION(pa-pa_class);
+ sc-sc_pc = pa-pa_pc;
+ sc-sc_tag = pa-pa_tag;
- /*
-* Windows may put the chip in suspend mode when it
-* shuts down. Be sure to kick it in the head to wake it
-* up again.
-*/
- if (pci_get_capability(pa-pa_pc, pa-pa_tag,
- PCI_CAP_PWRMGMT, NULL, NULL))
- VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
-
- /* Reset the adapter. */
- vr_reset(sc);
-
- /*
-* Turn on bit2 (MIION) in PCI configuration register 0x53 during
-* initialization and disable AUTOPOLL.
-*/
- pci_conf_write(pa-pa_pc, pa-pa_tag, VR_PCI_MODE,
- pci_conf_read(pa-pa_pc, pa-pa_tag, VR_PCI_MODE) |
- (VR_MODE3_MIION 24));
- VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL);
+ vr_chipinit(sc);
/*
* Get station address. The way the Rhine chips work,
@@ -697,6 +683,31 @@ fail_1:
bus_space_unmap(sc-vr_btag, sc-vr_bhandle, size);
}
+int
+vr_activate(struct device *self, int act)
+{
+ struct vr_softc *sc = (struct vr_softc *)self;
+ struct ifnet *ifp = sc-arpcom.ac_if;
+ int rv = 0;
+
+ switch (act) {
+ case DVACT_QUIESCE:
+ rv = config_activate_children(self, act);
+ break;
+ case DVACT_SUSPEND:
+ if (ifp-if_flags IFF_RUNNING)
+ vr_stop(sc);
+ rv = config_activate_children(self, act);
+ break;
+ case DVACT_RESUME:
+ rv = config_activate_children(self, act);
+ if (ifp-if_flags IFF_UP)
+ vr_init(sc);
+ break;
+ }
+ return (rv);
+}
+
/*
* Initialize the transmit descriptors.
*/
@@ -1296,6 +1307,29 @@ vr_start(struct ifnet *ifp)
}
void
+vr_chipinit(struct vr_softc *sc)
+{
+ /*
+* Make sure it isn't suspended.
+*/
+ if (pci_get_capability(sc-sc_pc, sc-sc_tag,
+ PCI_CAP_PWRMGMT, NULL, NULL))
+ VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
+
+ /* Reset the adapter. */
+ vr_reset(sc);
+
+ /*
+* Turn on bit2 (MIION) in PCI configuration register 0x53 during
+* initialization and disable AUTOPOLL.
+*/
+ pci_conf_write(sc-sc_pc, sc-sc_tag, VR_PCI_MODE,
+ pci_conf_read(sc-sc_pc, sc-sc_tag, VR_PCI_MODE) |
+ (VR_MODE3_MIION 24));
+ VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL);
+}
+
+void
vr_init(void *xsc)
{
struct vr_softc *sc = xsc;
@@ -1309,7 +1343,7 @@ vr_init(void *xsc)
* Cancel pending I/O and free all RX/TX buffers.
*/
vr_stop(sc);
- vr_reset(sc);
+ vr_chipinit(sc);
/*
* Set our station address.
Index: if_vrreg.h
===
RCS file: /cvs/src/sys/dev/pci/if_vrreg.h,v
retrieving revision 1.29
diff -u -p -u -r1.29 if_vrreg.h
--- dev/pci/if_vrreg.h 8 Dec 2011 20:19:24 - 1.29
+++ dev/pci/if_vrreg.h 20 Dec 2011 01:02:57 -
@@ -481,6 +481,8 @@ struct vr_mii_frame {
struct vr_softc {
struct device sc_dev; /* generic device structure */
+ pci_chipset_tag_t sc_pc; /* PCI registers info */
+ pcitag_tsc_tag;
void * sc_ih; /* interrupt handler cookie */
struct arpcom arpcom; /* interface info */
bus_space_handle_t vr_bhandle; /* bus
Re: Make Apple products somewhat usable
On Thu, Dec 01, 2011 at 11:32:14AM -0500, David Hill wrote: For those who have an iProduct from Apple, you know it spams the dmesg with uhids when plugged in. It also attacheds itself as a uaudio device as well. This diff disables all that and allows the device as ugen, so we can at least use gphoto2 to grab photos off it. I have added iPod Touch 2G and 4G, and the iPhone 4G. Anyone have others? Test? Ok? I sent a similar diff for my iPod 4G back in July, but it makes more sense to add the rest. There is a short list here: http://theiphonewiki.com/wiki/index.php?title=Normal_Mode#Device_IDs -Bryan.
Re: enable aucat by default
I think if anything this strengthens the need for MD-specific rc scripts, for platforms with absolutely no audio support, at all, no PCI bus, no USB bus, and no fancy i2c audio controllers. Don't enable aucat + libsndio + audio(4). On every other supported platform, enable audio, including aucat. I can't believe so many people are freaking out about this, the daemon runs privsep.. it's minimal and doesn't listen on tcp by default. It is a base component that is required and implements functionallity that would typically be in the kernel anyway. -Bryan.
Re: enable aucat by default
On Fri, Oct 07, 2011 at 01:35:49PM -0600, Theo de Raadt wrote: Really! Which of our platforms have no audio support at all? Can you list them? That part was for effect, I was really hoping none existed. :-) -Bryan.
nc port scan, aka udp noise maker.
I think this was a feature, right? :-) Index: netcat.c === RCS file: /cvs/src/usr.bin/nc/netcat.c,v retrieving revision 1.101 diff -u -p -u -r1.101 netcat.c --- netcat.c21 Jun 2011 17:31:07 - 1.101 +++ netcat.c9 Sep 2011 07:01:05 - @@ -264,6 +264,8 @@ main(int argc, char *argv[]) errx(1, cannot use -p and -l); if (lflag zflag) errx(1, cannot use -z and -l); + if (uflag zflag) + errx(1, cannot use -u and -z); if (!lflag kflag) errx(1, must use -l with -k);
arp(8) verb omission
Index: arp.8 === RCS file: /cvs/src/usr.sbin/arp/arp.8,v retrieving revision 1.29 diff -u -p -u -r1.29 arp.8 --- src/usr.sbin/arp/arp.8 13 Mar 2011 21:24:20 - 1.29 +++ src/usr.sbin/arp/arp.8 1 Sep 2011 20:38:31 - @@ -65,7 +65,7 @@ may be specified by name or by number, using Internet dot notation. .Pp .Nm -can also used to send Wake on LAN (WoL) frames over a local +can also be used to send Wake on LAN (WoL) frames over a local Ethernet network to one or more hosts using their link layer (hardware) addresses. WoL functionality is generally enabled in a machine's BIOS
Re: UPDATE: usr.bin/less
The version of less is in base is under a BSD equivalent license, the one you're updating us to is.. GPLv3. -Bryan.
Re: UPDATE: usr.bin/less
On Tue, Aug 30, 2011 at 01:45:04PM -0400, Brynet wrote: The version of less is in base is under a BSD equivalent license, the one you're updating us to is.. GPLv3. -Bryan. Ah, nevermind. It's actually under a dual BSD-alike and GPLv3 license. Hmm. -Bryan.
Re: iPod Touch dmesg noise - ugen(4).
On Tue, Jul 19, 2011 at 07:21:05PM -0400, Brynet wrote:
The userland stuff I found depends on libusb-1.x which currently lacks an
OpenBSD backend.
So this is pretty much just a cosmetic change until we get that or people
stop
using libusb 1.x and use the widely ported libusb-0.x.
So this can be ignored, but still a step in the right direction.
-Bryan.
I just noticed that the device supports PTP mode, so with the patch I can
upload/download files to the device using the gphoto2 port.
So I guess it would help for it to go in, any comments?
-Bryan.
Index: uaudio.c
===
RCS file: /cvs/src/sys/dev/usb/uaudio.c,v
retrieving revision 1.92
diff -u -r1.92 uaudio.c
--- uaudio.c3 Jul 2011 15:47:17 - 1.92
+++ uaudio.c19 Jul 2011 21:09:45 -
@@ -187,6 +187,8 @@
UAUDIO_FLAG_BAD_ADC } ,
{ { USB_VENDOR_ALTEC, USB_PRODUCT_ALTEC_ASC495 },
UAUDIO_FLAG_BAD_AUDIO },
+ { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_4G },
+ UAUDIO_FLAG_BAD_AUDIO },
{ { USB_VENDOR_CREATIVE, USB_PRODUCT_CREATIVE_EMU0202 },
UAUDIO_FLAG_VENDOR_CLASS | UAUDIO_FLAG_EMU0202 |
UAUDIO_FLAG_DEPENDENT },
Index: usb_quirks.c
===
RCS file: /cvs/src/sys/dev/usb/usb_quirks.c,v
retrieving revision 1.64
diff -u -r1.64 usb_quirks.c
--- usb_quirks.c9 Mar 2011 17:03:06 - 1.64
+++ usb_quirks.c19 Jul 2011 21:09:45 -
@@ -112,6 +112,7 @@
{ USB_VENDOR_APC, USB_PRODUCT_APC_UPS,ANY,{
UQ_BAD_HID }},
{ USB_VENDOR_APC, USB_PRODUCT_APC_UPS5G, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_APPLE, USB_PRODUCT_APPLE_SPEAKERS, ANY,{ UQ_BAD_HID }},
+ { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_4G,ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C100, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C120, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C550AVR,ANY,{ UQ_BAD_HID }},
Index: usbdevs
===
RCS file: /cvs/src/sys/dev/usb/usbdevs,v
retrieving revision 1.548
diff -u -r1.548 usbdevs
--- usbdevs 8 Jul 2011 23:09:06 - 1.548
+++ usbdevs 19 Jul 2011 21:09:46 -
@@ -877,6 +877,7 @@
product APPLE OPTMOUSE 0x0302 Optical mouse
product APPLE ADB 0x1000 ADB device
product APPLE SPEAKERS 0x1101 Speakers
+product APPLE IPOD_4G 0x129e iPod Touch 4G
product APPLE ETHERNET 0x1402 Ethernet A1277
product APPLE BLUETOOTH2 0x8205 Bluetooth
product APPLE BLUETOOTH0x8300 Bluetooth
Re: iPod Touch dmesg noise - ugen(4).
Whoops, got the order wrong in uaudio.. I think the rest is right. Thanks brad for noticing. -Bryan.
Re: iPod Touch dmesg noise - ugen(4).
On Tue, Jul 19, 2011 at 05:13:07PM -0400, Brynet wrote:
Whoops, got the order wrong in uaudio.. I think the rest is right.
Thanks brad for noticing.
-Bryan.
Might help to attach it, eh? :-)
Index: uaudio.c
===
RCS file: /cvs/src/sys/dev/usb/uaudio.c,v
retrieving revision 1.92
diff -u -r1.92 uaudio.c
--- uaudio.c3 Jul 2011 15:47:17 - 1.92
+++ uaudio.c19 Jul 2011 21:09:45 -
@@ -187,6 +187,8 @@
UAUDIO_FLAG_BAD_ADC } ,
{ { USB_VENDOR_ALTEC, USB_PRODUCT_ALTEC_ASC495 },
UAUDIO_FLAG_BAD_AUDIO },
+ { { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_4G },
+ UAUDIO_FLAG_BAD_AUDIO },
{ { USB_VENDOR_CREATIVE, USB_PRODUCT_CREATIVE_EMU0202 },
UAUDIO_FLAG_VENDOR_CLASS | UAUDIO_FLAG_EMU0202 |
UAUDIO_FLAG_DEPENDENT },
Index: usb_quirks.c
===
RCS file: /cvs/src/sys/dev/usb/usb_quirks.c,v
retrieving revision 1.64
diff -u -r1.64 usb_quirks.c
--- usb_quirks.c9 Mar 2011 17:03:06 - 1.64
+++ usb_quirks.c19 Jul 2011 21:09:45 -
@@ -112,6 +112,7 @@
{ USB_VENDOR_APC, USB_PRODUCT_APC_UPS,ANY,{
UQ_BAD_HID }},
{ USB_VENDOR_APC, USB_PRODUCT_APC_UPS5G, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_APPLE, USB_PRODUCT_APPLE_SPEAKERS, ANY,{ UQ_BAD_HID }},
+ { USB_VENDOR_APPLE, USB_PRODUCT_APPLE_IPOD_4G,ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C100, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C120, ANY,{ UQ_BAD_HID }},
{ USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F6C550AVR,ANY,{ UQ_BAD_HID }},
Index: usbdevs
===
RCS file: /cvs/src/sys/dev/usb/usbdevs,v
retrieving revision 1.548
diff -u -r1.548 usbdevs
--- usbdevs 8 Jul 2011 23:09:06 - 1.548
+++ usbdevs 19 Jul 2011 21:09:46 -
@@ -877,6 +877,7 @@
product APPLE OPTMOUSE 0x0302 Optical mouse
product APPLE ADB 0x1000 ADB device
product APPLE SPEAKERS 0x1101 Speakers
+product APPLE IPOD_4G 0x129e iPod Touch 4G
product APPLE ETHERNET 0x1402 Ethernet A1277
product APPLE BLUETOOTH2 0x8205 Bluetooth
product APPLE BLUETOOTH0x8300 Bluetooth
Re: hostid 64-bit support
This might be useful.. but POSIX defines a hostid as 32-bit, however the use of 'long' makes it ambiguous. http://pubs.opengroup.org/onlinepubs/9699919799/functions/gethostid.html Not sure if anything actually would break if you bumped this, do you know if anything relies on it? or was it mainly intended for humans. Does it default to '0' on other systems as well? -Bryan.
Re: tcp keepalive diff #1
Here is sthen's first diff again that fixes keepalives, without that stray
variable and with the space vs. tabs nits cleared up.
It works well here, anyone willing to ok this for sthen?
-Bryan.
Index: netinet/tcp_input.c
===
RCS file: /cvs/src/sys/netinet/tcp_input.c,v
retrieving revision 1.250
diff -u -p -u -r1.250 tcp_input.c
--- netinet/tcp_input.c 13 May 2011 14:31:16 - 1.250
+++ netinet/tcp_input.c 21 Jun 2011 11:51:40 -
@@ -961,8 +961,12 @@ findpcb:
* Reset idle time and keep-alive timer.
*/
tp-t_rcvtime = tcp_now;
- if (TCPS_HAVEESTABLISHED(tp-t_state))
- TCP_TIMER_ARM(tp, TCPT_KEEP, tcp_keepidle);
+ if (TCPS_HAVEESTABLISHED(tp-t_state)) {
+ if (tp-t_inpcb-inp_socket-so_options SO_KEEPALIVE)
+ TCP_TIMER_ARM(tp, TCPT_KEEP, tcp_keepintvl);
+ else
+ TCP_TIMER_ARM(tp, TCPT_KEEP, tcp_keepidle);
+ }
#ifdef TCP_SACK
if (tp-sack_enable)
Re: tcp keepalive diff #2: always_keepalive
I haven't tested this yet, but it would be handy, I had to patch bitlbee to set the SO_KEEPALIVE option otherwise gtalk would keep reconnecting. -Bryan.
Re: Add SB800+ SMBus support to piixpm.
On Sat, May 21, 2011 at 10:32:01PM +0200, Mark Kettenis wrote: Date: Thu, 19 May 2011 19:09:36 -0400 From: Brynet bry...@gmail.com Here it is a again with the magic relocated to piixreg.h. To clarify, if you have: piixpm0 at pci0 dev 20 function 0 ATI SBx00 SMBus Then check if the revision is = 0x40, which is the relevant southbridge. If it works, you'll see pretty stuff like this:: spdmem0 at iic addr 0x50: 2GB DDR3 SDRAM PC3-10600 SO-DIMM .. Had a look at the chipset docs, and it took me some time to figure out how AMD had hidden these registers away. So I wrote a somewhat less cryptic comment that explains the code a bit better. I also noticed that there is a register that indicates whether SMI is enabled or not. So here's a cleaned up diff. Does this still work for you? It does indeed, thanks for the help. -Bryan.
AMD K10/K11 family frequency scaling.
Adds support for family 10h/11h AMD processors, not sure if it's the best way
to do this.. but it works and noticably lowers the temperatures reported by the
die sensors.
# sysctl hw.setperf=0
# echo apmd_flags=\-C\ /etc/rc.conf.local
Just putting it here again for testing, could also be easily adapted for amd64
running on i386, but I don't do that.
Works for me, tease me about my last name and I'll cut you.
-Bryan.
--- /dev/null Wed Feb 2 02:26:51 2011
+++ arch/amd64/amd64/k1x-pstate.c Wed Feb 2 02:26:49 2011
@@ -0,0 +1,215 @@
+/* $OpenBSD$ */
+/*
+ * Copyright (c) 2011 Bryan Steele bry...@gmail.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/* AMD K10/K11 pstate driver */
+
+#include sys/types.h
+#include sys/param.h
+#include sys/systm.h
+#include sys/malloc.h
+#include sys/proc.h
+#include sys/sysctl.h
+
+#include machine/cpu.h
+#include machine/cpufunc.h
+#include machine/bus.h
+
+#include acpicpu.h
+
+#if NACPICPU 0
+#include dev/acpi/acpidev.h
+#include dev/acpi/acpivar.h
+#endif
+
+extern int setperf_prio;
+
+#define MSR_K1X_LIMIT 0xc0010061
+#define MSR_K1X_CONTROL0xc0010062
+#define MSR_K1X_STATUS 0xc0010063
+#define MSR_K1X_CONFIG 0xc0010064
+
+/* MSR_K1X_LIMIT */
+#define K1X_PSTATE_MAX_VAL(x) (((x) 4) 0x7)
+#define K1X_PSTATE_LIMIT(x)(((x)) 0x7)
+
+/* MSR_K1X_CONFIG */
+#define K1X_FID(x) ((x) 0x3f)
+#define K1X_DID(x) (((x) 6) 0x07)
+
+/* Maximum pstates */
+#define K1X_MAX_STATES 16
+
+struct k1x_state {
+ int freq;
+ u_int8_t fid;
+};
+
+struct k1x_cpu_state {
+ struct k1x_state state_table[K1X_MAX_STATES];
+ u_int n_states;
+};
+
+struct k1x_cpu_state *k1x_current_state;
+
+void k1x_transition(struct k1x_cpu_state *, int);
+
+#if NACPICPU 0
+void k1x_acpi_init(struct k1x_cpu_state *, u_int64_t);
+int k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int,
+u_int64_t);
+#endif
+
+void
+k1x_setperf(int level)
+{
+ u_int i = 0;
+ struct k1x_cpu_state *cstate;
+
+ cstate = k1x_current_state;
+
+ i = ((level * cstate-n_states) + 1) / 101;
+ if (i = cstate-n_states)
+ i = cstate-n_states - 1;
+
+ k1x_transition(cstate, i);
+}
+
+void
+k1x_transition(struct k1x_cpu_state *cstate, int level) {
+ u_int64_t msr;
+ int i, cfid, fid = cstate-state_table[level].fid;
+
+ msr = rdmsr(MSR_K1X_STATUS);
+ cfid = K1X_FID(msr);
+
+ if (fid == cfid)
+ return;
+
+ if (cfid != fid) {
+ wrmsr(MSR_K1X_CONTROL, fid);
+ for (i = 0; i 100; i++) {
+ msr = rdmsr(MSR_K1X_STATUS);
+ if (msr == fid)
+ break;
+ DELAY(100);
+ }
+ cfid = K1X_FID(msr);
+ }
+ if (cfid == fid) {
+ cpuspeed = cstate-state_table[level].freq;
+#if 0
+ (void)printf(Target: %d Current: %d Pstate: %d\n,
+ cstate-state_table[level].freq,
+ cpuspeed, cfid);
+#endif
+ }
+}
+
+#if NACPICPU 0
+
+int
+k1x_acpi_states(struct k1x_cpu_state *cstate, struct acpicpu_pss *pss,
+int nstates, u_int64_t msr)
+{
+ struct k1x_state state;
+ int j, k, n;
+ u_int32_t ctrl;
+
+ k = -1;
+
+ for (n = 0; n cstate-n_states; n++) {
+ if ((K1X_FID(msr) == K1X_FID(pss[n].pss_status)))
+ k = n;
+ ctrl = pss[n].pss_ctrl;
+ state.fid = K1X_FID(ctrl);
+ state.freq = pss[n].pss_core_freq;
+ j = n;
+ while (j 0 cstate-state_table[j - 1].freq state.freq) {
+
Re: Add SB800+ SMBus support to piixpm.
Here it is a again with the magic relocated to piixreg.h.
To clarify, if you have:
piixpm0 at pci0 dev 20 function 0 ATI SBx00 SMBus
Then check if the revision is = 0x40, which is the relevant southbridge.
If it works, you'll see pretty stuff like this::
spdmem0 at iic addr 0x50: 2GB DDR3 SDRAM PC3-10600 SO-DIMM
..
-Bryan.
Index: piixpm.c
===
RCS file: /cvs/src/sys/dev/pci/piixpm.c,v
retrieving revision 1.35
diff -u -r1.35 piixpm.c
--- piixpm.c9 Apr 2011 04:33:40 - 1.35
+++ piixpm.c19 May 2011 22:57:59 -
@@ -114,50 +114,102 @@
{
struct piixpm_softc *sc = (struct piixpm_softc *)self;
struct pci_attach_args *pa = aux;
- struct i2cbus_attach_args iba;
- pcireg_t base, conf;
+ pcireg_t conf;
+ bus_space_handle_t pm_ioh;
+ u_int8_t smben_reg[2];
+ bus_addr_t base;
pci_intr_handle_t ih;
const char *intrstr = NULL;
+ struct i2cbus_attach_args iba;
+
+ if (PCI_VENDOR(pa-pa_id) == PCI_VENDOR_ATI
+ PCI_PRODUCT(pa-pa_id) == PCI_PRODUCT_ATI_SBX00_SMB
+ PCI_REVISION(pa-pa_class) = 0x40) {
+ /*
+* AMD SB800+
+* Power management reg: PMREG_BASE(index)/PMREG_BASE+1(data).
+* SMB base addr + EN-bit: PMREG_BASE+SMB0EN(16), I/O mapped.
+*/
+ /* This could be mapped already, failure the only option? */
+ if (bus_space_map(sc-sc_iot, SB800_PMREG_BASE,
+ SB800_PMREG_SIZE, 0, pm_ioh) != 0) {
+ printf(: can't map i/o space\n);
+ return;
+ }
+
+ /* Read SmBus0En byte 1 */
+ bus_space_write_1(sc-sc_iot, pm_ioh, 0, SB800_PMREG_SMB0EN);
+ smben_reg[0] = bus_space_read_1(sc-sc_iot, pm_ioh, 1);
+ if ((smben_reg[0] SB800_SMB_EN) == 0) {
+ bus_space_unmap(sc-sc_iot, pm_ioh, SB800_PMREG_SIZE);
+ printf(: SMBus disabled\n);
+ return;
+ }
+ /* Read SmBus0En byte 2 */
+ bus_space_write_1(sc-sc_iot, pm_ioh, 0, SB800_PMREG_SMB0EN2);
+ smben_reg[1] = bus_space_read_1(sc-sc_iot, pm_ioh, 1);
+
+ /* XXX: PM_Reg may be required by other devices. */
+ bus_space_unmap(sc-sc_iot, pm_ioh, SB800_PMREG_SIZE);
- /* Read configuration */
- conf = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_HOSTC);
- DPRINTF((: conf 0x%08x, conf));
-
- if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
- printf(: SMBus disabled\n);
- return;
- }
-
- /* Map I/O space */
- sc-sc_iot = pa-pa_iot;
- base = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_BASE) 0x;
- if (PCI_MAPREG_IO_ADDR(base) == 0 ||
- bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
- PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
- printf(: can't map i/o space\n);
- return;
- }
-
- sc-sc_poll = 1;
- if ((conf PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_SMI) {
- /* No PCI IRQ */
+ /* Construct the base address. */
+ base = ((smben_reg[1] SB800_SMB_BASE_SHIFT) | smben_reg[0])
+ SB800_SMB_BASE_MASK;
+ if (base == 0 || bus_space_map(sc-sc_iot, base, SB800_SMB_SIZE,
+ 0, sc-sc_ioh)) {
+ printf(: can't map i/o space);
+ return;
+ }
+
+ /* XXX: IRQ.. */
printf(: SMI);
+ sc-sc_poll = 1;
} else {
- if ((conf PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_IRQ) {
+ /* Read configuration */
+ conf = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_HOSTC);
+ DPRINTF((: conf 0x%08x, conf));
+
+ if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
+ printf(: SMBus disabled\n);
+ return;
+ }
+
+ /* Map I/O space */
+ sc-sc_iot = pa-pa_iot;
+ base = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_BASE)
+ 0x;
+ if (PCI_MAPREG_IO_ADDR(base) == 0 ||
+ bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
+ PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
+ printf(: can't map i/o space\n);
+ return;
+ }
+
+ sc-sc_poll = 1;
+ switch ((conf PIIX_SMB_HOSTC_INTMASK)) {
+ /* No PCI IRQ */
+ case PIIX_SMB_HOSTC_SMI:
+ printf(: SMI);
+ break;
/* Install interrupt handler */
- if (pci_intr_map(pa, ih) == 0) {
-
Re: AMD K10/K11 family frequency scaling.
Claudio wrote: Since my new amd64 runs i386 at the moment I ported the code over. Cool, thanks. According to md5 -tt it seems to work. :-) -Bryan.
Re: Add SB800+ SMBus support to piixpm.
This adds support for SB800+ and is a little easier to understand, but it
probably isn't very pretty.
Information obtained from AMD SB800 datasheets, 45481.pdf/45482.pdf/45483.pdf.
Any comments? I'm not really sure if playing with non-pci I/O space in a PCI
driver makes sense.. but there really isn't any choice with this chipset.
-Bryan.
Index: piixpm.c
===
RCS file: /cvs/src/sys/dev/pci/piixpm.c,v
retrieving revision 1.35
diff -u -r1.35 piixpm.c
--- piixpm.c9 Apr 2011 04:33:40 - 1.35
+++ piixpm.c19 May 2011 04:39:29 -
@@ -114,50 +114,100 @@
{
struct piixpm_softc *sc = (struct piixpm_softc *)self;
struct pci_attach_args *pa = aux;
- struct i2cbus_attach_args iba;
- pcireg_t base, conf;
+ pcireg_t conf;
+ bus_space_handle_t pm_ioh;
+ u_int8_t smben_reg[2];
+ bus_addr_t base;
pci_intr_handle_t ih;
const char *intrstr = NULL;
+ struct i2cbus_attach_args iba;
+
+ if (PCI_VENDOR(pa-pa_id) == PCI_VENDOR_ATI
+ PCI_PRODUCT(pa-pa_id) == PCI_PRODUCT_ATI_SBX00_SMB
+ PCI_REVISION(pa-pa_class) = 0x40) {
+ /*
+* AMD SB800+
+* PM_Reg is defined as 0xcd6(index), 0xcd7(data).
+* Base addr + enabled bit in PM_Reg, I/O mapped.
+*/
+ /* This could be mapped already, failure the only option? */
+ if (bus_space_map(sc-sc_iot, 0xcd6, 2, 0, pm_ioh) != 0) {
+ printf(: can't map i/o space\n);
+ return;
+ }
+
+ /* SmBus0En byte 1 */
+ bus_space_write_1(sc-sc_iot, pm_ioh, 0, 0x2c);
+ smben_reg[0] = bus_space_read_1(sc-sc_iot, pm_ioh, 1);
+ if ((smben_reg[0] 0x01) == 0) {
+ bus_space_unmap(sc-sc_iot, pm_ioh, 2);
+ printf(: SMBus disabled\n);
+ return;
+ }
+ /* SmBus0En byte 2 */
+ bus_space_write_1(sc-sc_iot, pm_ioh, 0, 0x2c + 1);
+ smben_reg[1] = bus_space_read_1(sc-sc_iot, pm_ioh, 1);
+
+ /* XXX: PM_Reg may be mapped by other devices. */
+ bus_space_unmap(sc-sc_iot, pm_ioh, 2);
- /* Read configuration */
- conf = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_HOSTC);
- DPRINTF((: conf 0x%08x, conf));
-
- if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
- printf(: SMBus disabled\n);
- return;
- }
-
- /* Map I/O space */
- sc-sc_iot = pa-pa_iot;
- base = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_BASE) 0x;
- if (PCI_MAPREG_IO_ADDR(base) == 0 ||
- bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
- PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
- printf(: can't map i/o space\n);
- return;
- }
-
- sc-sc_poll = 1;
- if ((conf PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_SMI) {
- /* No PCI IRQ */
+ /* Retrieve base address. */
+ base = ((smben_reg[1] 8) | smben_reg[0]) 0xffe0;
+ if (base == 0 || bus_space_map(sc-sc_iot, base, PIIX_SMB_SIZE,
+ 0, sc-sc_ioh)) {
+ printf(: can't map i/o space);
+ return;
+ }
+
+ /* XXX: IRQ.. */
printf(: SMI);
+ sc-sc_poll = 1;
} else {
- if ((conf PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_IRQ) {
+ /* Read configuration */
+ conf = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_HOSTC);
+ DPRINTF((: conf 0x%08x, conf));
+
+ if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
+ printf(: SMBus disabled\n);
+ return;
+ }
+
+ /* Map I/O space */
+ sc-sc_iot = pa-pa_iot;
+ base = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_BASE)
+ 0x;
+ if (PCI_MAPREG_IO_ADDR(base) == 0 ||
+ bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
+ PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
+ printf(: can't map i/o space\n);
+ return;
+ }
+
+ sc-sc_poll = 1;
+ switch ((conf PIIX_SMB_HOSTC_INTMASK)) {
+ /* No PCI IRQ */
+ case PIIX_SMB_HOSTC_SMI:
+ printf(: SMI);
+ break;
/* Install interrupt handler */
- if (pci_intr_map(pa, ih) == 0) {
- intrstr = pci_intr_string(pa-pa_pc, ih);
- sc-sc_ih = pci_intr_establish(pa-pa_pc,
- ih,
Re: Filesystem Hierarchy Standard (FHS) and OpenBSD
Many UNIX systems include a hier(7) man page, OpenBSD is no exception. http://www.openbsd.org/cgi-bin/man.cgi?query=hiermanpath=OpenBSD+Currentformat=html -Bryan.
Re: Synaptics touchpad
I noticed the following in my Xorg.0.log: Touchpad0: invalid pressure range. defaulting to 0 - 256 Touchpad0: invalid finger width range. defaulting to 0 - 16 Just curious if that's normal. -Bryan.
Re: Synaptics touchpad
Thanks to both of you, it works fairly well on my Acer Aspire 5551 laptop with Synaptics 7.2 firmware. What's the prefered method of configuration? xorg.conf/synclient or xinput? I use the following from .xintrc/.xsession: synclient TapButton1=1 synclient TapButton2=2 synclient TapButton3=3 synclient VertEdgeScroll=1 synclient VertTwoFingerScroll=0 syndaemon -d -t -K The sensitivity is a bit high for tap-to-click though, especially for buttons 2 and 3.. for bringing up cwm menu's, etc. It's still something that has been missing for a long time, the physical buttons are annoying to use on my laptop.. fortunately button 1 was implemented in the firmware (..and hence worked with xf86-input-mouse). -Bryan.
Re: Support for OpenGL on r600/r700. Testing required.
Thanks for sending this, it works on my Mobility Radeon HD 4250 (1002:9712).
I updated to the most recent snapshot, updated my tree and applied the patch in
your mail.
You need to install the updated headers/includes, just copying radeon_drm.h
to /usr/include/dev/pci/drm/ before make {obj,build} in lib/libdrm works.
I also needed to change the following in libGL/dri/Makefile:
-SUBDIR+= i810 i915 i965 radeon r200 r300
+SUBDIR+= i810 i915 i965 radeon r200 r300 r600
Also, if you're using a new version of xf86-video-radeon add --disable-kms to
the configure command.
Once that's done, you'll need the following ~/.drirc or /etc/drirc:
driconf
device screen=0 driver=r600
application name=all
option name=fthrottle_mode value=0/
option name=vblank_mode value=0/
/application
/device
/driconf
Very cool.
-Bryan.
Re: Add SB800+ SMBus support to piixpm.
On Sun, Apr 24, 2011 at 12:23:03AM -0400, Brynet wrote: I sent this accidentally (..and mangled) a few minutes ago, so, here it is again.. allows iic(4)/spdmem(4) to attach on my laptop. Works for me, let me know if there is a better way. -Bryan. Ignore this for now, I can't figure out how to do this by programming the PCI configuration space.. the chipset (..or BIOS) only allows indirect I/O by default. -Bryan.
[no subject]
Index: dev/pci/piixpm.c
===
RCS file: /cvs/src/sys/dev/pci/piixpm.c,v
retrieving revision 1.35
diff -u -r1.35 piixpm.c
--- dev/pci/piixpm.c9 Apr 2011 04:33:40 - 1.35
+++ dev/pci/piixpm.c24 Apr 2011 03:16:31 -
@@ -115,6 +115,7 @@
struct piixpm_softc *sc = (struct piixpm_softc *)self;
struct pci_attach_args *pa = aux;
struct i2cbus_attach_args iba;
+ u_int8_t base_en_low, base_en_high;
pcireg_t base, conf;
pci_intr_handle_t ih;
const char *intrstr = NULL;
@@ -123,19 +124,33 @@
conf = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_HOSTC);
DPRINTF((: conf 0x%08x, conf));
- if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
- printf(: SMBus disabled\n);
- return;
- }
-
/* Map I/O space */
sc-sc_iot = pa-pa_iot;
- base = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_BASE) 0x;
- if (PCI_MAPREG_IO_ADDR(base) == 0 ||
- bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
- PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
- printf(: can't map i/o space\n);
- return;
+ if (PCI_VENDOR(pa-pa_id) == PCI_VENDOR_ATI
+ PCI_PRODUCT(pa-pa_id) == PCI_PRODUCT_ATI_SBX00_SMB
+ PCI_REVISION(pa-pa_class) = 0x40) {
+ /* SB800+ SMB configuration.. pio macros avoidable? */
+ outb(0xcd6, 0x2c);
+ base_en_low = inb(0xcd7);
+ outb(0xcd6, 0x2d);
+ base_en_high = inb(0xcd7);
+ base = ((base_en_high 8) | base_en_low) 0xffe0;
+ bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
+ PIIX_SMB_SIZE, 0, sc-sc_ioh);
+ } else {
+ if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
+ printf(: SMBus disabled\n);
+ return;
+ }
+
+ base = pci_conf_read(pa-pa_pc, pa-pa_tag,
+ PIIX_SMB_BASE) 0x;
+ if (PCI_MAPREG_IO_ADDR(base) == 0 ||
+ bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
+ PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
+ printf(: can't map i/o space\n);
+ return;
+ }
}
sc-sc_poll = 1;
Add SB800+ SMBus support to piixpm.
I sent this accidentally (..and mangled) a few minutes ago, so, here
it is again.. allows iic(4)/spdmem(4) to attach on my laptop.
Works for me, let me know if there is a better way.
-Bryan.
Index: dev/pci/piixpm.c
===
RCS file: /cvs/src/sys/dev/pci/piixpm.c,v
retrieving revision 1.35
diff -u -r1.35 piixpm.c
--- dev/pci/piixpm.c9 Apr 2011 04:33:40 - 1.35
+++ dev/pci/piixpm.c24 Apr 2011 03:16:31 -
@@ -115,6 +115,7 @@
struct piixpm_softc *sc = (struct piixpm_softc *)self;
struct pci_attach_args *pa = aux;
struct i2cbus_attach_args iba;
+ u_int8_t base_en_low, base_en_high;
pcireg_t base, conf;
pci_intr_handle_t ih;
const char *intrstr = NULL;
@@ -123,19 +124,33 @@
conf = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_HOSTC);
DPRINTF((: conf 0x%08x, conf));
- if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
- printf(: SMBus disabled\n);
- return;
- }
-
/* Map I/O space */
sc-sc_iot = pa-pa_iot;
- base = pci_conf_read(pa-pa_pc, pa-pa_tag, PIIX_SMB_BASE) 0x;
- if (PCI_MAPREG_IO_ADDR(base) == 0 ||
- bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
- PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
- printf(: can't map i/o space\n);
- return;
+ if (PCI_VENDOR(pa-pa_id) == PCI_VENDOR_ATI
+ PCI_PRODUCT(pa-pa_id) == PCI_PRODUCT_ATI_SBX00_SMB
+ PCI_REVISION(pa-pa_class) = 0x40) {
+ /* SB800+ SMB configuration.. pio macros avoidable? */
+ outb(0xcd6, 0x2c);
+ base_en_low = inb(0xcd7);
+ outb(0xcd6, 0x2d);
+ base_en_high = inb(0xcd7);
+ base = ((base_en_high 8) | base_en_low) 0xffe0;
+ bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
+ PIIX_SMB_SIZE, 0, sc-sc_ioh);
+ } else {
+ if ((conf PIIX_SMB_HOSTC_HSTEN) == 0) {
+ printf(: SMBus disabled\n);
+ return;
+ }
+
+ base = pci_conf_read(pa-pa_pc, pa-pa_tag,
+ PIIX_SMB_BASE) 0x;
+ if (PCI_MAPREG_IO_ADDR(base) == 0 ||
+ bus_space_map(sc-sc_iot, PCI_MAPREG_IO_ADDR(base),
+ PIIX_SMB_SIZE, 0, sc-sc_ioh)) {
+ printf(: can't map i/o space\n);
+ return;
+ }
}
sc-sc_poll = 1;
Re: Important bge(4) diff to test!
Robert wrote: Hello, The following diff is really important because on some machines bge(4) gets detached because of ASPM. The following diff is also in the latest snapshots but you can also compile a kernel with it. So if you have a bge(4) please update/compile a kernel and get back to me if it works or fails in some way. Thank you! No regression here, although I'm not sure if my controller is capable of ASPM. bge0 at pci2 dev 0 function 0 Broadcom BCM57780 rev 0x01, BCM57780 A1 (0x57780001): apic 4 int 16 (irq 7), address 88:ae:1d:0e:3a:76 -Bryan.
Re: kernel/6501: CPU frequency scaling on AMD K10/Acer Aspire laptop.
On 10/27/10 00:05, gn...@cvs.openbsd.org wrote:
Thank you very much for your problem report.
It has the internal identification `kernel/6501'.
The individual assigned to look at your
report is: bugs.
Category: kernel
Responsible:bugs
Synopsis: CPU frequency scaling on AMD K10/Acer Aspire laptop.
Arrival-Date: Wed Oct 27 04:00:01 GMT 2010
Hi again,
I realize now this was essentially a feature request, but I'm wondering
if anyone is playing with this at all?
Alternatively, is anyone aware of some published documentation that
outlines the differences between AMD K8/K10 PowerNow/Cool'n'Quiet?
What changes are required to implement support for this on OpenBSD?
Thanks,
-Bryan.
Hello, once again,
I finally sat down this weekend and started reading the datasheets
(K10/11 BKDG) and I believe I've got things working for these processors.
It's not perfect, but it works, at least manually using sysctl
hw.setperf and watching km0.temp and visually seeing performance changes
in several apps like openssl/glxgears.
I don't believe I have the delay right after the MSR write, and maybe
the developers would have preferred k8-powernow.c be extended.
If you want to silence the noise, change the #ifdef 1 to 0 in
k1x_transition()..
You can see a list of speeds gathered from ACPI tables using by grepping
for cpu0 in the dmesg.
I've only tested on a dual-core laptop, not tested on systems with 2
physical processors (..with multiple cores each).
Any opinions?
-Bryan.
--- /dev/null Mon Jan 31 00:06:58 2011
+++ arch/amd64/amd64/k1x-pstate.c Sun Jan 30 23:53:38 2011
@@ -0,0 +1,254 @@
+/* $OpenBSD$ */
+/*
+ * Copyright (c) 2011 Brynet bry...@gmail.com
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/* AMD K10/K11 pstate driver */
+
+#include sys/types.h
+#include sys/param.h
+#include sys/systm.h
+#include sys/malloc.h
+#include sys/proc.h
+#include sys/sysctl.h
+
+#include machine/cpu.h
+#include machine/cpufunc.h
+#include machine/bus.h
+
+#include acpicpu.h
+
+#if NACPICPU 0
+#include dev/acpi/acpidev.h
+#include dev/acpi/acpivar.h
+#endif
+
+extern int setperf_prio;
+extern int perflevel;
+
+#define MSR_K1X_LIMIT 0xc0010061
+#define MSR_K1X_CONTROL0xc0010062
+#define MSR_K1X_STATUS 0xc0010063
+#define MSR_K1X_CONFIG 0xc0010064
+
+/* MSR_K1X_LIMIT */
+#define K1X_PSTATE_MAX_VAL(x) (((x) 4) 0x7)
+#define K1X_PSTATE_LIMIT(x)(((x)) 0x7)
+
+/* MSR_K1X_CONFIG */
+#define K1X_FID(x) ((x) 0x3f)
+#define K1X_DID(x) (((x) 6) 0x07)
+
+/* Maximum pstates */
+#define K1X_MAX_STATES 16
+
+struct k1x_state {
+ int freq;
+ u_int8_t fid;
+};
+
+struct k1x_cpu_state {
+ struct k1x_state state_table[K1X_MAX_STATES];
+ u_int n_states;
+};
+
+struct k1x_cpu_state *k1x_current_state;
+
+void k1x_transition(struct k1x_cpu_state *, int);
+
+#if NACPICPU 0
+void k1x_acpi_init(struct k1x_cpu_state *, u_int64_t);
+void k1x_acpi_pss_changed(struct acpicpu_pss *, int);
+int k1x_acpi_states(struct k1x_cpu_state *, struct acpicpu_pss *, int,
+u_int64_t);
+#endif
+
+void
+k1x_setperf(int level)
+{
+ u_int i = 0;
+ struct k1x_cpu_state *cstate;
+
+ cstate = k1x_current_state;
+
+ i = ((level * cstate-n_states) + 1) / 101;
+ if (i = cstate-n_states)
+ i = cstate-n_states - 1;
+
+ k1x_transition(cstate, i);
+}
+
+void
+k1x_transition(struct k1x_cpu_state *cstate, int level) {
+ u_int64_t msr;
+ int i, cfid, fid = cstate-state_table[level].fid;
+
+ msr = rdmsr(MSR_K1X_STATUS);
+ cfid = K1X_FID(msr);
+
+ if (fid == cfid)
+ return;
+
+ if (cfid != fid) {
+ wrmsr(MSR_K1X_CONTROL
Re: http gzip support for ftp
If someone can find a server that is broken and barfs on getting a request version greater than it expects Marcus Glocker's nostromo has this problem, among others, I can't seem to get any feedback out of him though. ;-) It rejects HTTP/1.2, even though that's nonexistent.. a server must accept it, as you explained. As for gzip support for ftp(1), that's awesome, definately a requirement for a modern HTTP client.. minimalistic or otherwise. -Bryan.
Re: add Radeon HD 4250 to sys/dev/pci/pcidevs
Nigel wrote: Hi, You might be interested in other patches for the 880 chip set. See OpenBSD X11 mail lists. ATI/AMD driver for 880G chipset http://marc.info/?l=openbsd-x11m=128975076103964w=2 I am considering attempting updating to xf86-video-ati v6.13.2 driver, as I have another missing device HD 545v in my laptop, works with basic vesa driver but would like the correct resolution. Regards Nigel Taylor Hi, I sent in a patch for my ATI Radeon HD 4250 (..shared with others, so just called 4200) and it was applied, product ID is 0x9712 but same chip family. http://marc.info/?l=openbsd-techm=128568931313974w=2 http://www.openbsd.org/cgi-bin/cvsweb/src/sys/dev/pci/drm/radeon_drv.c.diff?r1=1.51;r2=1.50 In my case it works with the older driver, but 2D accel was sluggish and XVideo doesn't work at all. Once you have the relevant drm bits adapted, the newer driver compiles/works fine.. no dri module built yet though. I'm not sure why the driver in Xenocara is so old, but I think it has to do with broken multihead on some cards. $ ftp http://ftp.x.org/pub/individual/driver/xf86-video-ati-6.13.2.tar.gz $ tar xvzf xf86-video-ati-6.13.2.tar.gz $ cd xf86-video-ati-6.13.2; ./configure --prefix=/usr/X11R6 --sysconfdir=/etc --mandir=/usr/X11R6/man --with-xorg-module-dir=/usr/X11R6/lib/modules $ make; sudo make install This obviously trashes the existing driver. -Bryan.
Re: PCI power management diff
My Acer Aspire 5551 works perfectly now with this, thanks. -Bryan.
Re: vr(4) diff
Mark Kettenis wrote: Here's an attempt to fix a potential MCLGETI issue with vr(4) similar to what I recently fixed fro re(4). Unfortunately I don't have any vr(4) hardware myself, so I need some hep testing this. Things to look for are: 1. Does this diff have any effect on throughput (packets/s, bits/s). 2. Does this fix any problems with the interface if you blast it with packets? 3. Does livelock mitigation actualy work? Thanks, Mark Hi Mark, Did you receive any feedback for this? is there an easy way to replicate the problems others are seeing, as my systems seem stable. Using this patch doesn't seem to cause any noticeable performance regressions. -Bryan.
Re: sync adduser with installer
Paul de Weerd wrote: Welcome, to the real world. Users are incapable of just about anything. Except for fucking things up, they're extremely good at that. Live with it. So wait, are you for or against creating lone groups for individual users? All I was trying to communicate is that the exposure of a users home directory is something that must be dealt with by system administrators or preferably by the individual users themselves. By default on OpenBSD, home directories are world readable, the installer (..if directed) uses user(8) tools to create a default account, this adds the user to the shared 'users' group. This is expected behaviour for people who use the user(8) tools directly, all users can read each others files and if they're in the same group can even allow write access for shared work. It seems people using adduser(8) are accustomed to having world readable files, and no shared group by default. People should really take a look at the default permissions in /home on a case-by-case basis (..who is on the system, how many users) and choose permissions that make sense.. educating users about the your system defaults and how to change them also makes a lot of sense. Changing behaviour of either command is quite likely to wake a few people up, but, that's life.. they will have to deal with it. :-) -Bryan.
Re: sync adduser with installer
Daniel wrote: Same here. Really, I'm surprised that anyone is using the 'users' group at all these days, especially on OpenBSD. If all users are in the same group, group permissions are no different from world permissions. I believe the real problem here is that you're allowing users on your systems that are incapable of properly setting the group/world permissions of their home directories. It's also a possibility that you are derelict in your duties as a systems administrator. No cookies for you. -Bryan.
[PATCH] adding a usbdevs vendor/product.
I got a fancy optical mouse the other day, has all these purty lights inside it. :-) The vendor info gleamed from linux-usb.org and the official usb.org list. -Bryan. Index: dev/usb/usbdevs === RCS file: /cvs/src/sys/dev/usb/usbdevs,v retrieving revision 1.515 diff -u -r1.515 usbdevs --- dev/usb/usbdevs 29 Aug 2010 15:28:11 - 1.515 +++ dev/usb/usbdevs 3 Oct 2010 01:51:26 - @@ -541,6 +541,7 @@ vendor AMIT0x18c5 AMIT vendor QCOM0x18e8 Qcom vendor LINKSYS30x1915 Linksys +vendor AVAGO 0x192f Avago Technologies, Pte. vendor MEINBERG0x1938 Meinberg Funkuhren vendor ZTE 0x19d2 ZTE Inc. vendor QUANTA 0x1a32 Quanta @@ -949,6 +950,8 @@ /* Audio-Technica products */ product AUDIOTECHNICA ATCHA4USB0x0009 ATC-HA4USB USB headphone +/* Avago Technologies products */ +product AVAGO MOUSE0x Optical Mouse /* Avance Logic products */ product AVANCELOGIC USBAUDIO 0x0100 USB Audio Speaker
Re: [PATCH] adding a usbdevs vendor/product.
Hmm, Someone mentioned the vendor name is a bit verbose, so, how's this instead? Index: dev/usb/usbdevs === RCS file: /cvs/src/sys/dev/usb/usbdevs,v retrieving revision 1.515 diff -u -r1.515 usbdevs --- dev/usb/usbdevs 29 Aug 2010 15:28:11 - 1.515 +++ dev/usb/usbdevs 3 Oct 2010 01:51:26 - @@ -541,6 +541,7 @@ vendor AMIT0x18c5 AMIT vendor QCOM0x18e8 Qcom vendor LINKSYS30x1915 Linksys +vendor AVAGO 0x192f Avago vendor MEINBERG0x1938 Meinberg Funkuhren vendor ZTE 0x19d2 ZTE Inc. vendor QUANTA 0x1a32 Quanta @@ -949,6 +950,8 @@ /* Audio-Technica products */ product AUDIOTECHNICA ATCHA4USB0x0009 ATC-HA4USB USB headphone +/* Avago Technologies products */ +product AVAGO MOUSE0x Optical Mouse /* Avance Logic products */ product AVANCELOGIC USBAUDIO 0x0100 USB Audio Speaker
[PATCH] Add product name for Radeon Mobility 4200 series cards.
Morning,
I recently picked up a new (..well, to me) Acer Aspire 5551 notebook
which includes an ATI Mobility Radeon 4250, it seems all 42xx mobility
series cards use the same product ID so the following patch just calls
them all 4200.
In the latest amd64 snapshot the xf86-video-ati driver is a little out
of date, doesn't entirely recognize this family yet.
So, drm(4) is never opened.. but modsetting works and I get a nice
widescreen desktop (1366x768) on a 15.6 16:9 screen.
If I go beyond the unsupported and build 6.13.1 (..with non-kms fix from
git) it opens drm(4) and 2D/Xv start working.. but there doesn't appear
to be a r600 DRI module included yet.
http://brynet.biz.tm/~brynet/dmesg_acer.txt
http://brynet.biz.tm/~brynet/new_acer_dmesg.txt
Apologies, It's my first computer from this decade. :-)
Index: dev/pci/pcidevs
===
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
retrieving revision 1.1572
diff -u -r1.1572 pcidevs
--- dev/pci/pcidevs 21 Sep 2010 11:41:34 - 1.1572
+++ dev/pci/pcidevs 27 Sep 2010 07:53:02 -
@@ -1355,6 +1355,7 @@
product ATI RADEON_HD3300 0x9614 Radeon HD 3300
product ATI RADEON_HD4200_HDA 0x970f Radeon HD 4200 HD Audio
product ATI RADEON_HD4200 0x9710 Radeon HD 4200
+product ATI RADEON_HD4200_M0x9712 Mobility Radeon HD 4200
product ATI RADEON_HD2600_HDA 0xaa08 Radeon HD 2600 HD Audio
product ATI RS690M_HDA 0xaa10 RS690M HD Audio
product ATI RADEON_HD3870_HDA 0x0018 Radeon HD 3870 HD Audio
Index: dev/pci/drm/radeon_drv.c
===
RCS file: /cvs/src/sys/dev/pci/drm/radeon_drv.c,v
retrieving revision 1.50
diff -u -r1.50 radeon_drv.c
--- dev/pci/drm/radeon_drv.c8 Sep 2010 17:19:15 - 1.50
+++ dev/pci/drm/radeon_drv.c27 Sep 2010 07:53:03 -
@@ -524,6 +524,8 @@
CHIP_RV770|RADEON_NEW_MEMMAP},
{PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4200,
CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP},
+ {PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4200_M,
+ CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP},
{0, 0, 0}
};
Re: MCLGETI support for xl(4)
This is nice, there are some minor issues with the diff. * The xl_fill_rx_ring function body uses spaces instead of tabs. * Around -1125,11 +1138,11, you insert a few tabs unnecessarily. * ..and around -1195,12 +1182,14, within the while loop, spaces. * For the header patch, more spaces. I am seeing some neat 'netstat -m' values when using this patch on an older P3 system, memory utilization goes down to 7/8%, reaching only 20% when transferring a file over SSH. :-) Without the patch it goes immediately to 25% after 'ifconfig xl0 address'. Actually seems to perform better even, although perhaps that's my mind playing tricks on me. Thanks, -Bryan.
Re: Backout mclgeti for vr(4).
Evening, I have two machines with vr(4) interfaces running 4.7, and I can't seem to find any problem running ping -f against them. vr0 at pci0 dev 12 function 0 VIA VT6105 RhineIII rev 0x86: apic 2 int 19 (irq 10), address 00:19:5b:82:a1:e0 vr0 at pci0 dev 16 function 0 VIA Rhine/RhineII rev 0x06: irq 9, address 00:50:ba:bd:89:4d Is it possible that this bug only effects a few models? -Bryan.
Re: xargs -0 and -L
Atte Peltomdki wrote: Where did you find it btw? I can't find 2008 edition anywhere that wouldn't require registration and whatnot. Hi, http://www.opengroup.org/onlinepubs/9699919799/ http://www.opengroup.org/onlinepubs/9699919799/mindex.html http://www.opengroup.org/onlinepubs/9699919799/download/ Firefox/IE7/Chrome/etc search bar thingy: http://mycroft.mozdev.org/search-engines.html?name=ieee+2008 -Bryan.
Re: How can I get my driver bug fix committed?
Hi, There could be many reasons it hasn't been awknoledged, perhaps the developer is trying to find the optimal way to fix it? or maybe it effects multiple chipsets? It's also quite possible that he hasn't had a chance to review the patch yet, try reporting the bug via sendbug (..so it gets tracked). If you cannot use sendbug(1), it's possible to generate a template using the '-P' argument.. which you can then paste into your prefered MTA and mail it to 'gn...@openbsd.org', just use a blank subject line. Or, look at the AUTHORS section in ral(4). -Bryan.
Re: mixerctl(1) to sysctl(8); a simpler interface
Thomas Pfaff wrote: What I wanted was a simpler way of controlling the basic features of the device. Yes, but what you failed to comprehend is that these devices are very complex, it is not easy to define the basic features of the device because there are many devices in different vendor-imposed configurations (..which may or may not be easily detectable). I think Jacob Meuser has done a good job at picking some sane defaults, in the end there will be some devices where this is inadequate.. fortunately you can manipulate mixerctl(1) to fit your specialized needs and save your changes in /etc/mixerctl.conf. He is more then willing to accept sane patches, but what they've been trying to explain to you is.. It's a helluva' lot simpler than other free operating systems. Take care. -Bryan.
Re: FW: Broadcom BCM5787
Daniel Rapp wrote: Anybody have any ideas ? otherwise I will have to send the machine back.. .. acpi at bios0 function 0x0 not configured pcibios0 at bios0: rev 3.0 @ 0xf/0xdc04 pcibios0: PCI IRQ Routing Table rev 1.0 @ 0xfda50/416 (24 entries) pcibios0: bad IRQ table checksum pcibios0: PCI BIOS has 25 Interrupt Routing table entries pcibios0: PCI Exclusive IRQs: 5 7 10 11 pcibios0: no compatible PCI ICU found pcibios0: Warning, unable to fix up PCI interrupt routing pcibios0: PCI bus #2 is the last bus ... Hi, What about trying ACPI? those pcibios warnings don't look very pleasant.. boot boot -c UKC disable apm UKC quit Perhaps that may work. -Brynet.
