Re: [time-nuts] Building a mains frequency monitor

[Magnus Danielson]

Guten nacht Attila,

On 04/14/2016 12:24 PM, Attila Kinali wrote:

God middag Magnus,

On Thu, 14 Apr 2016 03:38:38 +0200
Magnus Danielson  wrote:


The professional equipment does it this way. It samples, filters and
decimate the data. For the professional use the absolute phase is
relevant, so group delay needs to be flat, known an
calibrated/compensated.


Jupp, I am aware of those. But I didn't expect many people here
to know of them :-) I have quite a few friends who work in the
energy distribution busines and its related problems (like network
stability, oscillations of dynamic systems, complexity theory etc)
hence I have a cursory interest in the equipment to monitor power
networks as well. It is intersting to see, that modern power networks
rely more and more on precise timing as well.


Indeed. I've even written an article with researchers relating to PMUs.


Even more interesting
is that the primary source for time is GPS these days, with all its
problems. I am not sure whether the desginers of these networks are
fully aware of the security and reliability implications that come
with GPS (or GNSS in general). Maybe i should dig a little bit around
and see what's current common practice in europe.


See my and Alison's presentation at the US PNT advisory board.

Using Alison's words, we need to do some hygiene cleanup.

Cheers,
Magnus
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Re: [time-nuts] Building a mains frequency monitor

[Attila Kinali]

God middag Magnus,

On Thu, 14 Apr 2016 03:38:38 +0200
Magnus Danielson  wrote:

> The professional equipment does it this way. It samples, filters and 
> decimate the data. For the professional use the absolute phase is 
> relevant, so group delay needs to be flat, known an 
> calibrated/compensated. 

Jupp, I am aware of those. But I didn't expect many people here
to know of them :-) I have quite a few friends who work in the
energy distribution busines and its related problems (like network
stability, oscillations of dynamic systems, complexity theory etc)
hence I have a cursory interest in the equipment to monitor power
networks as well. It is intersting to see, that modern power networks
rely more and more on precise timing as well. Even more interesting
is that the primary source for time is GPS these days, with all its
problems. I am not sure whether the desginers of these networks are
fully aware of the security and reliability implications that come
with GPS (or GNSS in general). Maybe i should dig a little bit around
and see what's current common practice in europe.

Attila Kinali
-- 
It is upon moral qualities that a society is ultimately founded. All 
the prosperity and technological sophistication in the world is of no 
use without that foundation.
 -- Miss Matheson, The Diamond Age, Neil Stephenson
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Re: [time-nuts] Building a mains frequency monitor

[Magnus Danielson]

Attila,

On 04/11/2016 12:19 AM, Attila Kinali wrote:

Why all these complicated filtering systems? As Jim wrote, we live in
a digital world. One can easily sample the 60Hz with an ADC, 200sps is more
than enough, the resolution doesn't need to be good either, 8bit would be 
sufficient. Do some filtering in the digital domain with some narrow band
FIR or IIR filter. No need to worry about temperature stability or whether
there will be any spikes. Time stamping is also easy as the zero crossing
"detection" is just a simple bit of math.

All this can be done in a 16bit uC.. or use one of the many cortex-M0/M3 out
there... or if you want to use floats for simplicity, use an M4.


If you want to go all out and do a luxury solution, how about sampling
at 100ksps (something which most modern 32bit uC support with their
internal ADC), so a simple 200Hz or so RC filter would be enough to get
rid of all harmonics, spikes and other stuff that would cause aliasing.
Filter in the digital domain, decimate, filter again, decimate, filter
until you're down at a couple of Hz of bandwidth. Then mix the signal
down to DC with an 60Hz generated from an NCO and detect the phase.
Send phase value to PC using USB or ethernet interface.


The professional equipment does it this way. It samples, filters and 
decimate the data. For the professional use the absolute phase is 
relevant, so group delay needs to be flat, known an 
calibrated/compensated. It also produces frequency and ROCOF (Rate of 
Change of Frequency) according to standardized estimators. The phasor is 
normalized to that of the reference time and the frequency (50 or 60 Hz) 
setting. Phasor measurements up to 120 Hz is seen in installations, 
typically on voltages of all three phases, but also currents and 
sometimes on both.


NIST in Gaithersburg work on calibration of these PMUs. It was 
interesting when I could show them some of the T tricks to measure 
phase of limited slew-rate, proposing calibrator designs etc. so promote 
absolute phase measurements etc.


Cheers,
Magnus
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Re: [time-nuts] Building a mains frequency monitor

[Bob Camp]

Hi

The same “Collins Limiter” stuff that goes along with DMTD’s applies to 60 Hz 
power 
measurement as well. There is a “magic bandwidth” that combined with a slew 
rate 
will give you an optimum result. The gotcha is that you need to know the noise 
parameters inorder to work it out. Even back in the 1960’s there was enough 
“stuff” 
feeding crud to the power line that a general solution wasn’t going to be 
possible. These 
days …. no way.

Bob

> On Apr 13, 2016, at 6:23 PM, David  wrote:
> 
> Tektronix used transformer isolation followed by a low pass RC filter
> with about a 1 kHz cutoff; this was fed directly into the trigger
> source selector just like any other trigger source.  There is still
> enough noise present that the trigger coupling can be used to select
> specific features to trigger on.
> 
> Modern DSOs often (always?) use an optocoupler circuit for isolation.
> I saw an example schematic somewhere and it is pretty simple.  It
> produces a roughly linear output referenced to the negative or
> positive peak so triggering can still occur over almost 360 degrees of
> phase.  I do not know what kind of low pass filtering was implemented.
> 
> On Tue, 12 Apr 2016 09:38:13 -0400, you wrote:
> 
>> ...
>> 
>> I have yet to dredge up the 60Hz line-lock schematic circuit used in more
>> than half a century of analog scope trigger circuits. The Tek scopes had
>> exceptionally robust trigger circuits.
>> 
>> Tim N3QE
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Re: [time-nuts] Building a mains frequency monitor

[David]

Tektronix used transformer isolation followed by a low pass RC filter
with about a 1 kHz cutoff; this was fed directly into the trigger
source selector just like any other trigger source.  There is still
enough noise present that the trigger coupling can be used to select
specific features to trigger on.

Modern DSOs often (always?) use an optocoupler circuit for isolation.
I saw an example schematic somewhere and it is pretty simple.  It
produces a roughly linear output referenced to the negative or
positive peak so triggering can still occur over almost 360 degrees of
phase.  I do not know what kind of low pass filtering was implemented.

On Tue, 12 Apr 2016 09:38:13 -0400, you wrote:

>...
>
>I have yet to dredge up the 60Hz line-lock schematic circuit used in more
>than half a century of analog scope trigger circuits. The Tek scopes had
>exceptionally robust trigger circuits.
>
>Tim N3QE
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Re: [time-nuts] Building a mains frequency monitor

[Morris Odell]

Hi all,

This is an interesting thread. I have built many clocks using the mains as a 
reference and have settled on a "belt and braces" approach that works well 
and does not seem to pass noise or transients. I begin with low voltage AC 
from the mains transformer and use it to feed the input diodes in a dual 
optocoupler back to back through a single pole LPF made up of the 
appropriate current limiting resistor and as big a cap as I can get away 
with. On the output side the phototransistors are paralleled and thus 
produce pulses at double the mains frequency. These are used to injection 
lock a free running oscillator made from one stage of a 1489 quad line 
receiver followed by another stage in cascade. The end result in a nice 
train of clean square waves. It's cheap and easy and doesn't take up too 
much PCB real estate.


Morris 



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Re: [time-nuts] Building a mains frequency monitor

[Charles Steinmetz]

Nick wrote:

At one point, I did try an LM393 instead of a 358. The result was 
that noise caused excessive false triggering. The 358, so far as I 
can tell, when acting as a comparator lacked sufficient bandwidth 
and/or speed to keep up with the noise.


My results also seemed to be on a par with the published results of 
other similar investigations (particularly those of tvb).


I'm on record as being in favor of pre-filtering to separate true 
grid phase artifacts from local noise, as much as 
practicable.  However, it would be serendipitous indeed (more like 
miraculous, actually) if the slew-rate limit of an LM358 just 
happened to be exactly the right degree of filtering.  Close enough 
for a science-fair project, perhaps, but not a time-nuts-level solution.


Tom uses a Schmitt trigger input (which, as I pointed out yesterday, 
guarantees that the "non-zero-cross detector" [or, 
"zero-cross-by-proxy detector"] will have AM to PM conversion), and 
(last I knew) he does not filter the input (other than the incidental 
interaction of the input resistance of his pickup with the input 
capacitance of the gate).  A proper comparator with a 0v threshold 
and a few mV of hysteresis, preceded by carefully designed filtering, 
can generate a ZCD output with substantially lower cycle-to-cycle and 
second-to-second phase errors due to local noise that is a 
significantly more faithful representation of the actual grid phase 
and frequency.  If what we're interested in is measuring the grid 
phase and frequency, rather than the incidental local noise that has 
nothing to do with the grid phase and frequency, this is the clearly 
better approach, IMO.


Best regards,

Charles


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Re: [time-nuts] Building a mains frequency monitor

[Alexander Pummer]

just look what is happening in one amplifier which happened to be a bit 
to slow for for the passing trough signal. The part of the spectrum -- 
which  can't make it -- although will not show up at the output, will 
not disappear, but --if the amplitude is large enough --  overdrive 
parts of the amplifier, causing recovery effects and delays. the delay 
will influence the propagation of the desired signals too. That is 
particularly important if the desired signals  position on the time 
range is important.
Also, by comparing the structure of a comparator and an amplifier it is 
very good visible, that a comparator, has much less stages which have 
all relative high bandwidth and lower gain, and the dominant pole -- 
which at the mentioned amplifier [LM358 ] is not much higher than 5 
[five] Hz, yes you could see it here: 
http://www.onsemi.com/pub_link/Collateral/LM358-D.PDF
It could happen that the signal coming out from a miss-used amplifier 
look very nice, but it is very likely, that it is not exactly correct, 
and there is a good reason, why the solid-state industry produce not 
just amplifiers but also compactors, which would need pre-filtering, but 
provides the correct output signal

73
KJ6UHN
Alex
who used to be corporate applications engineer at ON Semiconductor, 
Intersil Corporation and Elantec



On 4/12/2016 2:00 PM, Charles Steinmetz wrote:

Nick wrote:

At one point, I did try an LM393 instead of a 358. The result was 
that noise caused excessive false triggering. The 358, so far as I 
can tell, when acting as a comparator lacked sufficient bandwidth 
and/or speed to keep up with the noise.


My results also seemed to be on a par with the published results of 
other similar investigations (particularly those of tvb).


I'm on record as being in favor of pre-filtering to separate true grid 
phase artifacts from local noise, as much as practicable. However, it 
would be serendipitous indeed (more like miraculous, actually) if the 
slew-rate limit of an LM358 just happened to be exactly the right 
degree of filtering.  Close enough for a science-fair project, 
perhaps, but not a time-nuts-level solution.


Tom uses a Schmitt trigger input (which, as I pointed out yesterday, 
guarantees that the "non-zero-cross detector" [or, 
"zero-cross-by-proxy detector"] will have AM to PM conversion), and 
(last I knew) he does not filter the input (other than the incidental 
interaction of the input resistance of his pickup with the input 
capacitance of the gate).  A proper comparator with a 0v threshold and 
a few mV of hysteresis, preceded by carefully designed filtering, can 
generate a ZCD output with substantially lower cycle-to-cycle and 
second-to-second phase errors due to local noise that is a 
significantly more faithful representation of the actual grid phase 
and frequency.  If what we're interested in is measuring the grid 
phase and frequency, rather than the incidental local noise that has 
nothing to do with the grid phase and frequency, this is the clearly 
better approach, IMO.


Best regards,

Charles


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Re: [time-nuts] Building a mains frequency monitor

[Will]

If you don't want to digitally log the frequency or want .0hz accuracy then 
use one of the "tuning fork"? indicators. They have a row of reeds (12 or 20, 
long time since I have seen one) that resonate at differing frequencies from a 
few hz.below nominal to nominal frequency and then to a few hz. above nominal.

It gives a quick at a glance showing of the frequency. Ones I saw were used to 
adjust the phase of generator to AC mains before switching back to AC mains.


Cheers
Will
ZL1TAO


> Sent: Monday, April 11, 2016 at 10:31 AM
> From: "Nick Sayer via time-nuts" <time-nuts@febo.com>
> To: "Bill Hawkins" <bill.i...@pobox.com>
> Cc: "Discussion of precise time and frequency measurement" 
> <time-nuts@febo.com>
> Subject: Re: [time-nuts] Building a mains frequency monitor
>
> 
> > On Apr 9, 2016, at 10:20 PM, Bill Hawkins <bill.i...@pobox.com> wrote:
> > 
> > The schematic is too simple. There is noise on the power line from
> > switching things on and off, leakage from dimmers and switching power
> > supplies, and the occasional animal that gets across the HV distribution
> > line, not to mention lightning, induced or direct.
> > 
> > A simple capacitor will reduce high frequency stuff. The purist will
> > invest in an L and C that resonates at 60 Hz. Alternatively, use a
> > synchronous motor driving a load with sufficient inertia in combination
> > with a slotted disk and photo pickup. Perhaps an old record turntable
> > will do - but not one with a regulated DC motor.
> 
> I invite you to perform the same experiment with and without the extra 
> filtering and report exactly how much benefit the extra filtering conveys. 
> Otherwise, it’s just Monday morning quarterbacking.
> 
> > 
> > The science fair folks got enough interesting data without all that, but
> > the precision is not known.
> 
> So, the “science fair folks” is me. It wasn’t a real science fair entry, per 
> se. I titled it that way because it seemed to me to be a great idea for 
> someone to use in a science fair if they wanted.
> 
> In any event, unless you’re suggesting that the data is wrong, then I would 
> assert that the precision was sufficient. Perfect is the enemy of good.
> 
> > 
> > The link didn’t have any reference to code at all.
> 
> Really? Did you miss the 3rd and 4th pages? The ones with the Arduino sketch 
> and the Linux monitor program? In C? That code?
> 
> > 
> > This is a way of looking at frequency variations with natural causes
> > that does not require expensive equipment, if done right.
> > 
> > Bill Hawkins
> 
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> If you don't want to digitally log the frequency or want .0hz accuracy 
> then use one of the "tuning fork"? indicators. They have a row of reeds (12 
> or 20, long time since I have seen one) that resonate at differing 
> frequencies from a few hz.below nominal to nominal frequency and then to a 
> few hz. above nominal.

It gives a quick at a glance showing of the frequency. Ones I saw were used to 
adjust the phase of generator to AC mains before switching back to AC mains.
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Re: [time-nuts] Building a mains frequency monitor

[Nick Sayer via time-nuts]

At one point, I did try an LM393 instead of a 358. The result was that noise 
caused excessive false triggering. The 358, so far as I can tell, when acting 
as a comparator lacked sufficient bandwidth and/or speed to keep up with the 
noise. The result was that the per-second cycle offsets reported were almost 
always ±1, and were not every second. When I plotted my results, the scale of 
the “cycle debt,” as I termed it, was so broad that I concluded that whatever 
inaccuracy there was was being swamped by the signal being measured. My results 
also seemed to be on a par with the published results of other similar 
investigations (particularly those of tvb).


> On Apr 11, 2016, at 11:00 PM, Charles Steinmetz  wrote:
> 
> Nick wrote:
> 
>> The instructable I wrote about it is at [link]
>> 
>> There's code for the Arduino and the
>> Linux side as well as schematics.
> 
> Several things to note about that front end circuit, from a time-nut 
> perspective (the circuit was apparently created as a science project, and it 
> may be fine for that):
> 
> 1)  The LM358 makes a very poor comparator, even for a 60Hz ZCD, with rise 
> and fall times of tens of microseconds.  Also, its output doesn't pull closer 
> than about 1.5v to the positive supply.
> 
> 2)  With the non-inverting input biased to +2.5v, the switching threshold is 
> over 3 volts positive from the zero cross of the AC mains voltage, which 
> guarantees that mains voltage variations will create timing offsets.  
> Ideally, the non-inverting input would be biased one diode drop below ground 
> so the actual switching threshold would be near 0v.  However, that is not 
> within the input voltage range of the 358 running on a single supply, so 
> ground would be the closest workable choice (the 358 is a "single supply" 
> op-amp, so its input common-mode range includes the negative supply -- 
> ground, in this case).  Just remove R2 to implement this change.
> 
> 3)  The unused section of the LM358 has its noninverting and inverting inputs 
> grounded, with the output left floating.  This is not a good way to connect 
> an unused op-amp.  Generally, one should connect the noninverting input to a 
> potential that is within both the input common-mode range and the output 
> voltage range (here, from ground to about 3.5v), and connect the output to 
> the inverting input (making it a unity-gain follower).
> 
> A much better solution is to use a real comparator with the threshold at 0v.  
> Instead of a series diode on the input, use a series resistor and clamp 
> diodes as necessary to keep the comparator's noninverting input within its 
> allowable voltage range.
> 
> I didn't review the code, but anyone building the circuit should check it 
> carefully to see if there are any similar issues on the software end.
> 
> Best regards,
> 
> Charles
> 
> 
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Re: [time-nuts] Building a mains frequency monitor

[Tim Shoppa]

I shared a schematic from a 70's era consumer clock 60Hz detector in the
past week. I never really noticed any of these dropping cycles or picking
up extra cycles, but I'm sure it happened. The single pole of RC low pass
filtering in front of the Schmitt trigger seems to do fine.

Tom, you shared the AD app note which showed a synchronized Schmitt-trigger
oscillator. That kind of circuit was very common in 90's era consumer
digital clocks but was usually described as "battery backup" mode in the
consumer clock labeling - those would free-run near 60Hz while unplugged
thanks to the simple locked RC oscillator.

The above applications don't care too much about phase sensitivity but do
care about dropped cycles.

I have yet to dredge up the 60Hz line-lock schematic circuit used in more
than half a century of analog scope trigger circuits. The Tek scopes had
exceptionally robust trigger circuits.

Tim N3QE

On Tue, Apr 12, 2016 at 8:25 AM, Tom Van Baak <t...@leapsecond.com> wrote:

> Hi Hal,
>
> > What do you mean by a double wide cycle?
> > What do you mean by a missed cycle?
> > They seem like the same thing - if you miss one, the next one will be
> twice as wide.
>
> Yes, sorry, I mixed up my words there. A missed cycle would be a reading
> that looks closer to 32 ms than 16 ms. And a double cycle is one where, for
> example, the negative zero crossing confuses the ZCD and you get two
> readings that each look like 8 ms instead of one at 16 ms. Or if there's
> noise you might get 2 ms and 14 ms, or 0.1 ms and 16.5 ms, etc. I've seen
> period counters where you get cycle slips as a result.
>
> This effect is especially bad in 1970's era mains clocks where they would
> keep time by counting mains cycles. That's a case where signal conditioning
> is important.
>
> Similar problems occur with a TIC when you use a GPS 1PPS as start and DUT
> 1PPS as stop. You can get into awkward situations where each reading takes
> 2 seconds instead of 1 second.
>
> With a time-stamping counter every reading essentially includes the full
> history of phase, so missing or extra data doesn't change the net result.
> At worst you use a "picket fence" model to clean up the raw data.
>
> By the way, a cool thing you can do with a mains time-stamping counter is
> check the polarity of your AC outlets. You can go around the house with a
> battery operated timestamping counter and depending on which way you orient
> the plug or which 120-0-120 leg your outlet is on, you get 8 ms shifts in
> the time stamps.
>
> > I agree that working with time stamps seems simpler.  I wonder if that's
> > because I got started that way and/or wanted to watch phase drift?  I'll
> bet
> > durations work just as well if the data collection code remembers the
> round
> > off and includes it in the calculations for the next cycle.
>
> Correct, a data set of phase (or timestamps) and a data set of intervals
> (or duration, or period, or frequency) are mathematically equivalent and
> you can freely convert from one to the other, plus a constant.
>
> You have to watch out for floating-point data formats, where you can loose
> precision if you are not careful, due to rounding or range. This is
> especially true for data files of frequency; that 1/period calculation can
> result in accumulation of error.
>
> > To me, this is the important advantage of working with time stamps, but
> > that's because I was interested in tracking phase which turns into clock
> > error.
>
> Right. You and I both record phase because we're treating mains as a
> clock. But I think other people are more interested to see strip charts of
> frequency over time, or histograms of frequency deviation and the like. In
> that case, the occasional bad data or cycle slip is not a problem. Another
> way to put it -- being a time nut is always harder than being a frequency
> nut.
>
> /tvb
>
> - Original Message -
> From: "Hal Murray" <hmur...@megapathdsl.net>
> To: "Tom Van Baak" <t...@leapsecond.com>; "Discussion of precise time and
> frequency measurement" <time-nuts@febo.com>
> Cc: <hmur...@megapathdsl.net>
> Sent: Monday, April 11, 2016 7:04 PM
> Subject: Re: [time-nuts] Building a mains frequency monitor
>
>
> >> record the duration of each cycle directly
> >> 5) Double wide cycles are detectable but missed cycles are not.
> >
> > What do you mean by a double wide cycle?
> > What do you mean by a missed cycle?
> > They seem like the same thing - if you miss one, the next one will be
> twice
> > as wide.
> >
> >> Here are the advantages of the timestamping method:
> >> 5) Extra or missing cycle

Re: [time-nuts] Building a mains frequency monitor

[Graham / KE9H]

For all you Powerline Time nuts, and maybe GPSDO time nuts, too.

Consider this new PIC.PIC16F1619
$1.60 USD, quantity one at Mouser.

It was designed to be an AC motor controller.

So has some interesting built in hardware peripherals:
Mains Zero crossing detector.
Runs up to 32 MHz master clock, which says you could time stamp with 8
MHz resolution. ~125 ns.
Hardware PID engine and Math Accelerator.
CRC engine
Band gap voltage reference
Configurable Logic Cell (for small amount of custom logic.)
Angular Timer
Signal Measurement Timer

Plus all the other normal PIC stuff: A->D, D->A, PWM, multiple other
timers,
comparators, serial, SPI and I2C communications.

I think the Angular Timer and/or Signal Measurement Timer hardware
peripherals
could be used as high accuracy 1 PPS phase detectors for GPSDO.

--- Graham

==

On Tue, Apr 12, 2016 at 7:25 AM, Tom Van Baak <t...@leapsecond.com> wrote:

> Hi Hal,
>
> > What do you mean by a double wide cycle?
> > What do you mean by a missed cycle?
> > They seem like the same thing - if you miss one, the next one will be
> twice as wide.
>
> Yes, sorry, I mixed up my words there. A missed cycle would be a reading
> that looks closer to 32 ms than 16 ms. And a double cycle is one where, for
> example, the negative zero crossing confuses the ZCD and you get two
> readings that each look like 8 ms instead of one at 16 ms. Or if there's
> noise you might get 2 ms and 14 ms, or 0.1 ms and 16.5 ms, etc. I've seen
> period counters where you get cycle slips as a result.
>
> This effect is especially bad in 1970's era mains clocks where they would
> keep time by counting mains cycles. That's a case where signal conditioning
> is important.
>
> Similar problems occur with a TIC when you use a GPS 1PPS as start and DUT
> 1PPS as stop. You can get into awkward situations where each reading takes
> 2 seconds instead of 1 second.
>
> With a time-stamping counter every reading essentially includes the full
> history of phase, so missing or extra data doesn't change the net result.
> At worst you use a "picket fence" model to clean up the raw data.
>
> By the way, a cool thing you can do with a mains time-stamping counter is
> check the polarity of your AC outlets. You can go around the house with a
> battery operated timestamping counter and depending on which way you orient
> the plug or which 120-0-120 leg your outlet is on, you get 8 ms shifts in
> the time stamps.
>
> > I agree that working with time stamps seems simpler.  I wonder if that's
> > because I got started that way and/or wanted to watch phase drift?  I'll
> bet
> > durations work just as well if the data collection code remembers the
> round
> > off and includes it in the calculations for the next cycle.
>
> Correct, a data set of phase (or timestamps) and a data set of intervals
> (or duration, or period, or frequency) are mathematically equivalent and
> you can freely convert from one to the other, plus a constant.
>
> You have to watch out for floating-point data formats, where you can loose
> precision if you are not careful, due to rounding or range. This is
> especially true for data files of frequency; that 1/period calculation can
> result in accumulation of error.
>
> > To me, this is the important advantage of working with time stamps, but
> > that's because I was interested in tracking phase which turns into clock
> > error.
>
> Right. You and I both record phase because we're treating mains as a
> clock. But I think other people are more interested to see strip charts of
> frequency over time, or histograms of frequency deviation and the like. In
> that case, the occasional bad data or cycle slip is not a problem. Another
> way to put it -- being a time nut is always harder than being a frequency
> nut.
>
> /tvb
>
> - Original Message -
> From: "Hal Murray" <hmur...@megapathdsl.net>
> To: "Tom Van Baak" <t...@leapsecond.com>; "Discussion of precise time and
> frequency measurement" <time-nuts@febo.com>
> Cc: <hmur...@megapathdsl.net>
> Sent: Monday, April 11, 2016 7:04 PM
> Subject: Re: [time-nuts] Building a mains frequency monitor
>
>
> >> record the duration of each cycle directly
> >> 5) Double wide cycles are detectable but missed cycles are not.
> >
> > What do you mean by a double wide cycle?
> > What do you mean by a missed cycle?
> > They seem like the same thing - if you miss one, the next one will be
> twice
> > as wide.
> >
> >> Here are the advantages of the timestamping method:
> >> 5) Extra or missing cycles are easy to detect and repair with no loss of
>

Re: [time-nuts] Building a mains frequency monitor

[Tom Van Baak]

Hi Hal,

> What do you mean by a double wide cycle?
> What do you mean by a missed cycle?
> They seem like the same thing - if you miss one, the next one will be twice 
> as wide.

Yes, sorry, I mixed up my words there. A missed cycle would be a reading that 
looks closer to 32 ms than 16 ms. And a double cycle is one where, for example, 
the negative zero crossing confuses the ZCD and you get two readings that each 
look like 8 ms instead of one at 16 ms. Or if there's noise you might get 2 ms 
and 14 ms, or 0.1 ms and 16.5 ms, etc. I've seen period counters where you get 
cycle slips as a result.

This effect is especially bad in 1970's era mains clocks where they would keep 
time by counting mains cycles. That's a case where signal conditioning is 
important.

Similar problems occur with a TIC when you use a GPS 1PPS as start and DUT 1PPS 
as stop. You can get into awkward situations where each reading takes 2 seconds 
instead of 1 second.

With a time-stamping counter every reading essentially includes the full 
history of phase, so missing or extra data doesn't change the net result. At 
worst you use a "picket fence" model to clean up the raw data.

By the way, a cool thing you can do with a mains time-stamping counter is check 
the polarity of your AC outlets. You can go around the house with a battery 
operated timestamping counter and depending on which way you orient the plug or 
which 120-0-120 leg your outlet is on, you get 8 ms shifts in the time stamps.

> I agree that working with time stamps seems simpler.  I wonder if that's 
> because I got started that way and/or wanted to watch phase drift?  I'll bet 
> durations work just as well if the data collection code remembers the round 
> off and includes it in the calculations for the next cycle.

Correct, a data set of phase (or timestamps) and a data set of intervals (or 
duration, or period, or frequency) are mathematically equivalent and you can 
freely convert from one to the other, plus a constant.

You have to watch out for floating-point data formats, where you can loose 
precision if you are not careful, due to rounding or range. This is especially 
true for data files of frequency; that 1/period calculation can result in 
accumulation of error.

> To me, this is the important advantage of working with time stamps, but 
> that's because I was interested in tracking phase which turns into clock 
> error.

Right. You and I both record phase because we're treating mains as a clock. But 
I think other people are more interested to see strip charts of frequency over 
time, or histograms of frequency deviation and the like. In that case, the 
occasional bad data or cycle slip is not a problem. Another way to put it -- 
being a time nut is always harder than being a frequency nut.

/tvb

- Original Message - 
From: "Hal Murray" <hmur...@megapathdsl.net>
To: "Tom Van Baak" <t...@leapsecond.com>; "Discussion of precise time and 
frequency measurement" <time-nuts@febo.com>
Cc: <hmur...@megapathdsl.net>
Sent: Monday, April 11, 2016 7:04 PM
Subject: Re: [time-nuts] Building a mains frequency monitor


>> record the duration of each cycle directly
>> 5) Double wide cycles are detectable but missed cycles are not.
> 
> What do you mean by a double wide cycle?
> What do you mean by a missed cycle?
> They seem like the same thing - if you miss one, the next one will be twice 
> as wide.
> 
>> Here are the advantages of the timestamping method:
>> 5) Extra or missing cycles are easy to detect and repair with no loss of
>> phase information. 
> 
> I'd expect the extra or missing cycles would be easy to spot if you were 
> looking at the duration.  The duration would either be twice normal or less 
> than half of normal.  In the latter case, you have to figure out which is the 
> extra pulse.
> 
> I agree that working with time stamps seems simpler.  I wonder if that's 
> because I got started that way and/or wanted to watch phase drift?  I'll bet 
> durations work just as well if the data collection code remembers the round 
> off and includes it in the calculations for the next cycle.
> 
> To me, this is the important advantage of working with time stamps, but 
> that's because I was interested in tracking phase which turns into clock 
> error.
> 
> Cycle duration:
>> 3) With period or frequency measurements, if you lose even a single reading,
>> you lose track of phase (timekeeping). 
> 
> Timestamps:
>> 3) You get perfect long-term phase tracking, even if there is noise or
>> glitches or lost or corrupted data. 
> 
> 
> 
> -- 
> These are my opinions.  I hate spam.
> 
> 
>
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Re: [time-nuts] Building a mains frequency monitor

[Charles Steinmetz]

Nick wrote:


The instructable I wrote about it is at [link]

There's code for the Arduino and the
Linux side as well as schematics.


Several things to note about that front end circuit, from a time-nut 
perspective (the circuit was apparently created as a science project, 
and it may be fine for that):


1)  The LM358 makes a very poor comparator, even for a 60Hz ZCD, with 
rise and fall times of tens of microseconds.  Also, its output 
doesn't pull closer than about 1.5v to the positive supply.


2)  With the non-inverting input biased to +2.5v, the switching 
threshold is over 3 volts positive from the zero cross of the AC 
mains voltage, which guarantees that mains voltage variations will 
create timing offsets.  Ideally, the non-inverting input would be 
biased one diode drop below ground so the actual switching threshold 
would be near 0v.  However, that is not within the input voltage 
range of the 358 running on a single supply, so ground would be the 
closest workable choice (the 358 is a "single supply" op-amp, so its 
input common-mode range includes the negative supply -- ground, in 
this case).  Just remove R2 to implement this change.


3)  The unused section of the LM358 has its noninverting and 
inverting inputs grounded, with the output left floating.  This is 
not a good way to connect an unused op-amp.  Generally, one should 
connect the noninverting input to a potential that is within both the 
input common-mode range and the output voltage range (here, from 
ground to about 3.5v), and connect the output to the inverting input 
(making it a unity-gain follower).


A much better solution is to use a real comparator with the threshold 
at 0v.  Instead of a series diode on the input, use a series resistor 
and clamp diodes as necessary to keep the comparator's noninverting 
input within its allowable voltage range.


I didn't review the code, but anyone building the circuit should 
check it carefully to see if there are any similar issues on the software end.


Best regards,

Charles


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Re: [time-nuts] Building a mains frequency monitor

[Hal Murray]

> record the duration of each cycle directly
> 5) Double wide cycles are detectable but missed cycles are not.

What do you mean by a double wide cycle?
What do you mean by a missed cycle?
They seem like the same thing - if you miss one, the next one will be twice 
as wide.

> Here are the advantages of the timestamping method:
> 5) Extra or missing cycles are easy to detect and repair with no loss of
> phase information. 

I'd expect the extra or missing cycles would be easy to spot if you were 
looking at the duration.  The duration would either be twice normal or less 
than half of normal.  In the latter case, you have to figure out which is the 
extra pulse.

I agree that working with time stamps seems simpler.  I wonder if that's 
because I got started that way and/or wanted to watch phase drift?  I'll bet 
durations work just as well if the data collection code remembers the round 
off and includes it in the calculations for the next cycle.

To me, this is the important advantage of working with time stamps, but 
that's because I was interested in tracking phase which turns into clock 
error.

Cycle duration:
> 3) With period or frequency measurements, if you lose even a single reading,
> you lose track of phase (timekeeping). 

Timestamps:
> 3) You get perfect long-term phase tracking, even if there is noise or
> glitches or lost or corrupted data. 



-- 
These are my opinions.  I hate spam.



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Re: [time-nuts] Building a mains frequency monitor

[Nick Sayer via time-nuts]

> On Apr 11, 2016, at 2:31 PM, Tom Van Baak  wrote:
> 
> 
> 6) picPET output is directly readable by TimeLab via serial/USB.

This one line item twigged my interest.

Dedicating my 53220A to certain long running tasks that don’t require its full 
capabilities irks me a little. If can design my own gizmo to provide time 
interval sampling/averaging, what’s the best route to connecting it up to 
TimeLab?

Let’s start with the assumption that I can generate serial data and get that 
into a Raspberry Pi that’s on the network running ser2net. So I have a TCP 
listening socket that will spit out… what? Time interval values in ASCII one 
per line in seconds in scientific notation (3.14159E-3)? If I can do that, what 
driver (that is, acquisition source type) do I use in TimeLab to gather it up?

I’m strongly inclined to use networking for this because I run TimeLab in a VM 
on my laptop, and for long-running tasks, it’s stationed rather far removed 
from my workbench.
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Re: [time-nuts] Building a mains frequency monitor

[Bob Camp]

Hi

If you *do* want to go with the fancy ADC approach, there are MCU’s that are 
built specifically for 
power meter applications. They have cool stuff like 24 bit ADC’s and DSP 
capability. Since the 
target it high volume, the cost is sub $10 …

That’s still an IF by the way. It’s still not at all clear to me that the DSP 
stuff really adds much to the 
process if the ultimate result will be highly decimated. 

Bob


> On Apr 11, 2016, at 5:31 PM, Tom Van Baak <t...@leapsecond.com> wrote:
> 
> Hi Jay,
> 
>> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
>> point in the waveform, the frequency at any given cycle is easy to 
>> calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
>> way? That method just feels... naive, for some reason.
> 
> Ah! if it "feels naive" then I've accomplished my goal for the picPET: a 
> simple solution that gives superb results.
> 
> Is there a better way? Well, another way to measure mains frequency is record 
> the duration of each cycle directly (e.g., 16. ms). It works, but be 
> careful:
> 
> 1) Period, or especially frequency readings are susceptible to numerical 
> round-off errors.
> 2) Depending on how the interval is measured there may be deadtime effects, 
> or timing windows.
> 3) With period or frequency measurements, if you lose even a single reading, 
> you lose track of phase (timekeeping).
> 4) Certain types of noise create erratic or too-short periods which are hard 
> or impossible to repair in the data.
> 5) Double wide cycles are detectable but missed cycles are not.
> 
> Here are the advantages of the timestamping method:
> 
> 1) You get accurate period data by just subtracting adjacent timestamps.
> 2) There is zero deadtime; and never rounding errors.
> 3) You get perfect long-term phase tracking, even if there is noise or 
> glitches or lost or corrupted data.
> 4) If you want, you get a count of expected or unexpected events.
> 5) Extra or missing cycles are easy to detect and repair with no loss of 
> phase information.
> 6) picPET output is directly readable by TimeLab via serial/USB.
> 7) Unwrapped timestamp data can be decimated to any level for frequency(tau) 
> averaging, simultaneously.
> 
> 
>> Q2: What are the sources of noise in this design? Assuming the picPET is as
> 
> There is some noise but it was too low for me to worry about. Look at the 
> ADEV plot to understand why.
> 
> At the seconds level, even at the cycle level, mains wanders around so much 
> that jitter at the microsecond level is uninteresting from a timekeeping 
> perspective. If you're interested in a full phase noise spectrum or THD and 
> the like, then a zero-crossing detector and counter is not the right 
> instrument; go with high-speed ADC sampling instead.
> 
> 
>> Q3: The open-ended question: How do I improve on this?
> 
> I'd say see if you have a problem before you worry about improving it. I 
> originally had plans for a fancy zero-crossing detector or robust mains 
> signal filtering, as others have proposed. But when I tried a plain 6.3VAC 
> signal (via 1kR) on the PIC's Schmitt trigger input pin I got such clean data 
> for days and months at a time that I never went back and made it more 
> complicated. I now log once a second (instead of once a cycle).
> 
> /tvb
> 
> - Original Message - 
> From: "Jay Grizzard" <elfchief-timen...@lupine.org>
> To: <time-nuts@febo.com>
> Sent: Wednesday, April 06, 2016 6:21 PM
> Subject: [time-nuts] Building a mains frequency monitor
> 
> 
>> Since it seems to be a week for new projects on time-nuts... ;)
>> 
>> So I've been wanting to set up a power line frequency monitor for a while,
>> and now(ish) seemed to be a good time for me.
>> 
>> So initially, I was planning on doing a simple design that was posted here
>> a couple of years back, which basically works out to:
>> 
>> mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET
>> 
>> I have a good 10MHz reference to feed the picPET, so this seems like it
>> would make a good first shot. But, of course, I eventually want to do
>> better than just a first shot. So, I have questions!
>> 
>> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
>> point in the waveform, the frequency at any given cycle is easy to 
>> calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
>> way? That method just feels... naive, for some reason.
>> 
>> Q2: What are the sources of noise in this design? Assuming the picPET is as
>> accurate as my 10MHz reference is, I can think of a few p

Re: [time-nuts] Building a mains frequency monitor

[Tom Van Baak]

Hi Jay,

> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
> point in the waveform, the frequency at any given cycle is easy to 
> calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
> way? That method just feels... naive, for some reason.

Ah! if it "feels naive" then I've accomplished my goal for the picPET: a simple 
solution that gives superb results.

Is there a better way? Well, another way to measure mains frequency is record 
the duration of each cycle directly (e.g., 16. ms). It works, but be 
careful:

1) Period, or especially frequency readings are susceptible to numerical 
round-off errors.
2) Depending on how the interval is measured there may be deadtime effects, or 
timing windows.
3) With period or frequency measurements, if you lose even a single reading, 
you lose track of phase (timekeeping).
4) Certain types of noise create erratic or too-short periods which are hard or 
impossible to repair in the data.
5) Double wide cycles are detectable but missed cycles are not.

Here are the advantages of the timestamping method:

1) You get accurate period data by just subtracting adjacent timestamps.
2) There is zero deadtime; and never rounding errors.
3) You get perfect long-term phase tracking, even if there is noise or glitches 
or lost or corrupted data.
4) If you want, you get a count of expected or unexpected events.
5) Extra or missing cycles are easy to detect and repair with no loss of phase 
information.
6) picPET output is directly readable by TimeLab via serial/USB.
7) Unwrapped timestamp data can be decimated to any level for frequency(tau) 
averaging, simultaneously.


> Q2: What are the sources of noise in this design? Assuming the picPET is as

There is some noise but it was too low for me to worry about. Look at the ADEV 
plot to understand why.

At the seconds level, even at the cycle level, mains wanders around so much 
that jitter at the microsecond level is uninteresting from a timekeeping 
perspective. If you're interested in a full phase noise spectrum or THD and the 
like, then a zero-crossing detector and counter is not the right instrument; go 
with high-speed ADC sampling instead.


> Q3: The open-ended question: How do I improve on this?

I'd say see if you have a problem before you worry about improving it. I 
originally had plans for a fancy zero-crossing detector or robust mains signal 
filtering, as others have proposed. But when I tried a plain 6.3VAC signal (via 
1kR) on the PIC's Schmitt trigger input pin I got such clean data for days and 
months at a time that I never went back and made it more complicated. I now log 
once a second (instead of once a cycle).

/tvb

- Original Message - 
From: "Jay Grizzard" <elfchief-timen...@lupine.org>
To: <time-nuts@febo.com>
Sent: Wednesday, April 06, 2016 6:21 PM
Subject: [time-nuts] Building a mains frequency monitor


> Since it seems to be a week for new projects on time-nuts... ;)
> 
> So I've been wanting to set up a power line frequency monitor for a while,
> and now(ish) seemed to be a good time for me.
> 
> So initially, I was planning on doing a simple design that was posted here
> a couple of years back, which basically works out to:
> 
>  mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET
> 
> I have a good 10MHz reference to feed the picPET, so this seems like it
> would make a good first shot. But, of course, I eventually want to do
> better than just a first shot. So, I have questions!
> 
> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
> point in the waveform, the frequency at any given cycle is easy to 
> calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
> way? That method just feels... naive, for some reason.
> 
> Q2: What are the sources of noise in this design? Assuming the picPET is as
> accurate as my 10MHz reference is, I can think of a few potential places
> that phase noise could creep into the measurements:
>  - Whatever is in the power brick beyond the transformer (I don't think a 
> step down transformer alone would add phase noise, right?)
>  - The dropping resistor will slowly change the amplitude of the waveform 
> (and thus the point in the cycle that the schmitt trigger fires) due to 
> thermal and aging effects, if we're measuring anything that's not the exact 
> zero crossing
>  - The point at which the schmitt trigger in the picPET fires will change 
> over time for the same reasons. Also potentially due to picPET input voltage, 
> depending on how the comparitor is built
>  - Am I missing any?
> 
> Q3: The open-ended question: How do I improve on this? I suspect the main 
> place for improvement will be in the trigger, but I'm not sure where to go 
> with that.  Most designs I've seen involve a 

Re: [time-nuts] Building a mains frequency monitor

[Ron Bean]

>> A more modern name for a synchronous motor is a permanent magnet stepper
>> motor.  Any PM stepper, and a couple of microfarad capacitor becomes a
>> synchronous motor when connected to the power line.

I've seen a data sheet for a motor that's actually spec'd for both uses.
I don't know how common that is.

>The old pre-digital way of generating a rotating field for a synchronous
>motor was a shaded pole.  They worked well for low torque applications like
>clock motors.  I saw plenty of them when I was a kid.  The rotor was hidden
>in a package with the first layer of gears.  I assume it was a permanent
>magnet but never took a package apart to verify that.

You're thinking of the Telechron clocks (also branded GE, Revere, and 
Herschede). Some good pics of the motors here:

http://telechronclock.com/
https://clockhistory.com/telechron/

Also, lots of pics of the clocks themselves:
http://www.telechron.net/main.htm

There are people who rebuild the rotors, for a fee (usually they'll swap 
yours for a rebuilt one). I've fixed one clock this way, and I have a 
couple of others that need it.

The other major manufacturer was Sessions, they had a bayonet system 
that allowed you to replace the whole motor easily (not including the 
gears), but they weren't as durable as the Telechrons.

A friend of mine has an early Sessions clock where the motor is held in 
with #5 screws. I'd never seen these before, it took me a while to find 
the right wrench to take it apart.

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Re: [time-nuts] Building a mains frequency monitor

[Tim Shoppa]

IMHO the transients and harmonic content, are more interesting than the
60Hz frequency!

But if the 60Hz frequency with superb rejection of transients is the only
goal:

The 60Hz line clock chips of the 1970's used the LV transformer secondary,
a single pole of RC low-pass filtering to get rid of spikes, and a Schmitt
trigger.

See e.g. MM5402N datasheet:
http://electrosurplus.online.fr/data/MM5402N%20NATIONAL.pdf

I believe there are some good tube circuits for extracting 60Hz from line
frequency, in the MIT Radiation Lab series and follow on books. I think at
least one example is in the phantastron section.
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Re: [time-nuts] Building a mains frequency monitor

[David]

On Wed, 6 Apr 2016 18:21:43 -0700, you wrote:

>...
>
>Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
>point in the waveform, the frequency at any given cycle is easy to 
>calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
>way? That method just feels... naive, for some reason.

Given the low power line frequency and high noise content, this method
provides plenty of resolution.

>Q2: What are the sources of noise in this design? Assuming the picPET is as
>accurate as my 10MHz reference is, I can think of a few potential places
>that phase noise could creep into the measurements:
>  - Whatever is in the power brick beyond the transformer (I don't think a 
> step down transformer alone would add phase noise, right?)
>  - The dropping resistor will slowly change the amplitude of the waveform 
> (and thus the point in the cycle that the schmitt trigger fires) due to 
> thermal and aging effects, if we're measuring anything that's not the exact 
> zero crossing
>  - The point at which the schmitt trigger in the picPET fires will change 
> over time for the same reasons. Also potentially due to picPET input voltage, 
> depending on how the comparitor is built
>  - Am I missing any?

High frequency noise on the 60 Hz waveform itself will dominate
sources within the circuit.  Phase controlled light dimmers are
especially noisy but intermittent sources of noise from heavy loads
starting and stopping like motors and microwave ovens are also an
issue.

>Q3: The open-ended question: How do I improve on this? I suspect the main 
>place for improvement will be in the trigger, but I'm not sure where to go 
>with that.  Most designs I've seen involve a schmitt trigger, generally with 
>reference voltages set by things like voltage dividers. This seems dubious at 
>best, to me, since that means the reference voltage will be affected by the 
>same effects I'm calling out above. Is there a *specific* design (rather than 
>"make a zero crossing detector!" or something similarly vague) that someone 
>can point me to, that would minimize this kind of trigger noise?

Take a look at page 12 of Linear Technology application note 31 for an
example of a simple Schmitt trigger based injection locked 60 Hz
oscillator intended for exactly this application:

http://www.linear.com/docs/4124

Schmitt triggers are great for preventing false triggering but are
less useful where low jitter is desired since they amplify high
frequency noise.  The old alternative I have sometimes seen involves
an analog phase locked loop but it would be pretty easy to implement a
modern DSP version in a simple microcontroller.

>Q3.1: Is there a better way to get mains voltage down to something I can work 
>more directly with? I saw at least one design that just used a couple of 
>megaohm resistors inline -- does that introduce appreciably less phase noise 
>than random AC/AC power brick?

A transformer is one of the better ways because it provides galvanic
isolation; it is safe, low noise, and easy to get right.  Modern DSOs
use an optocoupler for their line trigger.  High value (and voltage)
resistors to neutral and ground will work but the high impedance will
pick up more ambient noise.  Capacitive coupling would work better
than resistors and Y type safety capacitors could be used for better
safety.
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Re: [time-nuts] Building a mains frequency monitor

[jimlux]

On 4/10/16 3:19 PM, Attila Kinali wrote:

On Sun, 10 Apr 2016 12:03:51 -0700
jimlux  wrote:


On 4/9/16 10:20 PM, Bill Hawkins wrote:

The schematic is too simple. There is noise on the power line from
switching things on and off, leakage from dimmers and switching power
supplies, and the occasional animal that gets across the HV distribution
line, not to mention lightning, induced or direct.

A simple capacitor will reduce high frequency stuff. The purist will
invest in an L and C that resonates at 60 Hz.


Or a series of R/C stages: you don't care about loss.


Alternatively, use a
synchronous motor driving a load with sufficient inertia in combination
with a slotted disk and photo pickup. Perhaps an old record turntable
will do - but not one with a regulated DC motor.


A clever idea because of the mechanical low pass filtering, but probably
impractical..

A record turntable with a synchronous motor?  That's going to be ancient
and hard to find in this age of digital music players.


Why all these complicated filtering systems? As Jim wrote, we live in
a digital world. One can easily sample the 60Hz with an ADC, 200sps is more
than enough, the resolution doesn't need to be good either, 8bit would be 
sufficient. Do some filtering in the digital domain with some narrow band
FIR or IIR filter. No need to worry about temperature stability or whether
there will be any spikes. Time stamping is also easy as the zero crossing
"detection" is just a simple bit of math.


Excellent idea.. a $19 teensy can handle 200 ksps 16 bit ADC samples and 
filter them to 4 Hz BW with no problem.


If you want to put a narrow band 60 Hz filter in there, and a zero 
crossing interpolator, it would be easy.


In a mixture of fixed and floating point.








All this can be done in a 16bit uC.. or use one of the many cortex-M0/M3 out
there... or if you want to use floats for simplicity, use an M4.


If you want to go all out and do a luxury solution, how about sampling
at 100ksps (something which most modern 32bit uC support with their
internal ADC), so a simple 200Hz or so RC filter would be enough to get
rid of all harmonics, spikes and other stuff that would cause aliasing.
Filter in the digital domain, decimate, filter again, decimate, filter
until you're down at a couple of Hz of bandwidth. Then mix the signal
down to DC with an 60Hz generated from an NCO and detect the phase.
Send phase value to PC using USB or ethernet interface.



Attila kinali



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Re: [time-nuts] Building a mains frequency monitor

[Hal Murray]

cfhar...@erols.com said:
> A more modern name for a synchronous motor is a permanent magnet stepper
> motor.  Any PM stepper, and a couple of microfarad capacitor becomes a
> synchronous motor when connected to the power line. 

The old pre-digital way of generating a rotating field for a synchronous 
motor was a shaded pole.  They worked well for low torque applications like 
clock motors.  I saw plenty of them when I was a kid.  The rotor was hidden 
in a package with the first layer of gears.  I assume it was a permanent 
magnet but never took a package apart to verify that.

Good pictures here:
  https://en.wikipedia.org/wiki/Shaded-pole_motor


-- 
These are my opinions.  I hate spam.



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Re: [time-nuts] Building a mains frequency monitor

[Vlad]

I just finished similar project recently. I am using OCXO 9,830400MHZ as 
the reference. My MCU driven by this crystal (No PLL). And I was using 
opto-coupler as ZCD.
At the begining I was using every crossing (which 120 times per second 
in case of 60Hz). However that design was not good. Long live to tom 
(/tvb) who did analyses of raw data I provide and gave me very valuable 
advises how to improve my project.


The main purpose of my project was to drive the Telechron clock. The 
Main measurement was added just for fun. My project has three clocks 
inside. Its RTC, driven my simple watch crystal, it is Main clock, 
driven my ZDC and it is MCU clock, driven by OCXO.


The MCU still capturing every ZDC events (120 events per second in case 
of 60Hz). But I concentrate on full cycles. Also, I implement the switch 
how often do the records to the log file. Its either every 64 ZDC events 
or once per 8192 cycles. Basically it recording the time difference 
between number of ZDC events.


The log looks like this:

# Uptime:   139 hours
# RTC time: 18:00:00
# MCU time: 18:00:00
# MAIN time:18:00:03
# [Time Stamp][Period]  [1/9830400]
16-04-11 18:00:17.253 [+] 0.01665924072269  163767  -4
16-04-11 18:01:25.500 [+] 0.01666137695315  163788  -21
16-04-11 18:02:33.765 [+] 0.0156494141  163839  -51
16-04-11 18:03:42.035 [-] 0.01666798909505  163853  -14
16-04-11 18:04:50.300 [+] 0.01666564941407  163830  +23
16-04-11 18:05:58.570 [-] 0.01666748046875  163848  -18
16-04-11 18:07:06.847 [-] 0.01666961669921  163869  -21
16-04-11 18:08:15.097 [+] 0.01666239420575  163798  +71

Time stamp, then "sign" which means if we are bellow or above the 
"ethalon", then period, then raw value of capturing timer and then delta 
between two readings.

Works great for me.

Regards,
Vlad



On 2016-04-06 21:21, Jay Grizzard wrote:

Since it seems to be a week for new projects on time-nuts... ;)

So I've been wanting to set up a power line frequency monitor for a 
while,

and now(ish) seemed to be a good time for me.

So initially, I was planning on doing a simple design that was posted 
here

a couple of years back, which basically works out to:

  mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET

I have a good 10MHz reference to feed the picPET, so this seems like it
would make a good first shot. But, of course, I eventually want to do
better than just a first shot. So, I have questions!

Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
point in the waveform, the frequency at any given cycle is easy to
calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
way? That method just feels... naive, for some reason.

Q2: What are the sources of noise in this design? Assuming the picPET 
is as
accurate as my 10MHz reference is, I can think of a few potential 
places

that phase noise could creep into the measurements:
  - Whatever is in the power brick beyond the transformer (I don't
think a step down transformer alone would add phase noise, right?)
  - The dropping resistor will slowly change the amplitude of the
waveform (and thus the point in the cycle that the schmitt trigger
fires) due to thermal and aging effects, if we're measuring anything
that's not the exact zero crossing
  - The point at which the schmitt trigger in the picPET fires will
change over time for the same reasons. Also potentially due to picPET
input voltage, depending on how the comparitor is built
  - Am I missing any?

Q3: The open-ended question: How do I improve on this? I suspect the
main place for improvement will be in the trigger, but I'm not sure
where to go with that.  Most designs I've seen involve a schmitt
trigger, generally with reference voltages set by things like voltage
dividers. This seems dubious at best, to me, since that means the
reference voltage will be affected by the same effects I'm calling out
above. Is there a *specific* design (rather than "make a zero crossing
detector!" or something similarly vague) that someone can point me to,
that would minimize this kind of trigger noise?

Q3.1: Is there a better way to get mains voltage down to something I
can work more directly with? I saw at least one design that just used
a couple of megaohm resistors inline -- does that introduce
appreciably less phase noise than random AC/AC power brick?

I apologize if any of this is overly basic. I've actually read
everything I could find both in the time-nuts archives and the
internet at large about this kind of project, but I've still found
myself left with the questions above.

I appreciate any comments / feedback / pointers!

-j
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Re: [time-nuts] Building a mains frequency monitor

[Chuck Harris]

A more modern name for a synchronous motor is a permanent
magnet stepper motor.  Any PM stepper, and a couple of
microfarad capacitor becomes a synchronous motor when
connected to the power line.

-Chuck Harris

jimlux wrote:


  Alternatively, use a

synchronous motor driving a load with sufficient inertia in combination
with a slotted disk and photo pickup. Perhaps an old record turntable
will do - but not one with a regulated DC motor.


A clever idea because of the mechanical low pass filtering, but probably 
impractical..

A record turntable with a synchronous motor?  That's going to be ancient and 
hard to
find in this age of digital music players. People like us would happen to have
something in the garage.. but for a science fair project, unlikely that a 6-12th
grader would have such a thing, or even know where to find one.  *I* have a lot 
of
junk in the garage, and even some synchronous motors, but not one that could 
directly
be connected to the mains.

an AC powered rotary dial electric clock, perhaps? (assuming it's not a wall 
wart
powering a "quartz movement".)

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Re: [time-nuts] Building a mains frequency monitor

[Attila Kinali]

On Sun, 10 Apr 2016 12:03:51 -0700
jimlux  wrote:

> On 4/9/16 10:20 PM, Bill Hawkins wrote:
> > The schematic is too simple. There is noise on the power line from
> > switching things on and off, leakage from dimmers and switching power
> > supplies, and the occasional animal that gets across the HV distribution
> > line, not to mention lightning, induced or direct.
> >
> > A simple capacitor will reduce high frequency stuff. The purist will
> > invest in an L and C that resonates at 60 Hz.
> 
> Or a series of R/C stages: you don't care about loss.
>
> > Alternatively, use a
> > synchronous motor driving a load with sufficient inertia in combination
> > with a slotted disk and photo pickup. Perhaps an old record turntable
> > will do - but not one with a regulated DC motor.
> 
> A clever idea because of the mechanical low pass filtering, but probably 
> impractical..
> 
> A record turntable with a synchronous motor?  That's going to be ancient 
> and hard to find in this age of digital music players. 

Why all these complicated filtering systems? As Jim wrote, we live in
a digital world. One can easily sample the 60Hz with an ADC, 200sps is more
than enough, the resolution doesn't need to be good either, 8bit would be 
sufficient. Do some filtering in the digital domain with some narrow band
FIR or IIR filter. No need to worry about temperature stability or whether
there will be any spikes. Time stamping is also easy as the zero crossing
"detection" is just a simple bit of math.

All this can be done in a 16bit uC.. or use one of the many cortex-M0/M3 out
there... or if you want to use floats for simplicity, use an M4.


If you want to go all out and do a luxury solution, how about sampling
at 100ksps (something which most modern 32bit uC support with their
internal ADC), so a simple 200Hz or so RC filter would be enough to get
rid of all harmonics, spikes and other stuff that would cause aliasing.
Filter in the digital domain, decimate, filter again, decimate, filter
until you're down at a couple of Hz of bandwidth. Then mix the signal
down to DC with an 60Hz generated from an NCO and detect the phase.
Send phase value to PC using USB or ethernet interface.



Attila kinali

-- 
Reading can seriously damage your ignorance.
-- unknown
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Re: [time-nuts] Building a mains frequency monitor

[Nick Sayer via time-nuts]

> On Apr 9, 2016, at 10:20 PM, Bill Hawkins  wrote:
> 
> The schematic is too simple. There is noise on the power line from
> switching things on and off, leakage from dimmers and switching power
> supplies, and the occasional animal that gets across the HV distribution
> line, not to mention lightning, induced or direct.
> 
> A simple capacitor will reduce high frequency stuff. The purist will
> invest in an L and C that resonates at 60 Hz. Alternatively, use a
> synchronous motor driving a load with sufficient inertia in combination
> with a slotted disk and photo pickup. Perhaps an old record turntable
> will do - but not one with a regulated DC motor.

I invite you to perform the same experiment with and without the extra 
filtering and report exactly how much benefit the extra filtering conveys. 
Otherwise, it’s just Monday morning quarterbacking.

> 
> The science fair folks got enough interesting data without all that, but
> the precision is not known.

So, the “science fair folks” is me. It wasn’t a real science fair entry, per 
se. I titled it that way because it seemed to me to be a great idea for someone 
to use in a science fair if they wanted.

In any event, unless you’re suggesting that the data is wrong, then I would 
assert that the precision was sufficient. Perfect is the enemy of good.

> 
> The link didn’t have any reference to code at all.

Really? Did you miss the 3rd and 4th pages? The ones with the Arduino sketch 
and the Linux monitor program? In C? That code?

> 
> This is a way of looking at frequency variations with natural causes
> that does not require expensive equipment, if done right.
> 
> Bill Hawkins

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Re: [time-nuts] Building a mains frequency monitor

[jimlux]

On 4/9/16 10:20 PM, Bill Hawkins wrote:

The schematic is too simple. There is noise on the power line from
switching things on and off, leakage from dimmers and switching power
supplies, and the occasional animal that gets across the HV distribution
line, not to mention lightning, induced or direct.

A simple capacitor will reduce high frequency stuff. The purist will
invest in an L and C that resonates at 60 Hz.


Or a series of R/C stages: you don't care about loss.



 Alternatively, use a

synchronous motor driving a load with sufficient inertia in combination
with a slotted disk and photo pickup. Perhaps an old record turntable
will do - but not one with a regulated DC motor.


A clever idea because of the mechanical low pass filtering, but probably 
impractical..


A record turntable with a synchronous motor?  That's going to be ancient 
and hard to find in this age of digital music players. People like us 
would happen to have something in the garage.. but for a science fair 
project, unlikely that a 6-12th grader would have such a thing, or even 
know where to find one.  *I* have a lot of junk in the garage, and even 
some synchronous motors, but not one that could directly be connected to 
the mains.


an AC powered rotary dial electric clock, perhaps? (assuming it's not a 
wall wart powering a "quartz movement".)








The science fair folks got enough interesting data without all that, but
the precision is not known.

The link didn't have any reference to code at all.

This is a way of looking at frequency variations with natural causes
that does not require expensive equipment, if done right.


I think that the key, especially for the putative science fair project, 
if *I* were the judge in senior division, would be good software to look 
for anomalies and excising oddball transients.


have a simple data logger that logs the time of zero crossings (or 
similar), and then post process to reject zero crossings that aren't 
within some "expected band" and which tolerates "missing pulses".


That would be a winning project. Assuming it weren't copied from 
somewhere - and that's why they want people like us as judges.


The International Science and Engineering Fair is in May in Phoenix this 
year, and they're always looking for judges. Always the week after 
(U.S.) Mother's day.


https://student.societyforscience.org/grand-award-judges

Ignore the formal qualifications listing - if you have the chops and 
experience, they'll take you.




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Re: [time-nuts] Building a mains frequency monitor

[Bill Hawkins]

The schematic is too simple. There is noise on the power line from
switching things on and off, leakage from dimmers and switching power
supplies, and the occasional animal that gets across the HV distribution
line, not to mention lightning, induced or direct.

A simple capacitor will reduce high frequency stuff. The purist will
invest in an L and C that resonates at 60 Hz. Alternatively, use a
synchronous motor driving a load with sufficient inertia in combination
with a slotted disk and photo pickup. Perhaps an old record turntable
will do - but not one with a regulated DC motor.

The science fair folks got enough interesting data without all that, but
the precision is not known.

The link didn't have any reference to code at all.

This is a way of looking at frequency variations with natural causes
that does not require expensive equipment, if done right.

Bill Hawkins


-Original Message-
From: Nick Sayer
Sent: Friday, April 08, 2016 7:20 PM

The instructable I wrote about it is at
http://www.instructables.com/id/Science-fair-How-accurate-is-the-AC-line
-frequency/

There's code for the Arduino and the Linux side as well as schematics.


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Re: [time-nuts] Building a mains frequency monitor

[Ben Hall]

On 4/8/2016 7:19 PM, Nick Sayer via time-nuts wrote:

The instructable I wrote about it is at
http://www.instructables.com/id/Science-fair-How-accurate-is-the-AC-line-frequency/

 There’s code for the Arduino and the Linux side as well as
schematics.


Hi Nick,

Awesome, thanks mucho!!!

thanks again,
ben, kd5byb

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Re: [time-nuts] Building a mains frequency monitor

[Chris Albertson]

It works the same on PC hardware

The PPS causes an interrupt and the handler captures the value of a counter
that is driven by the system clock.  It is typically a nanosecond level
clock that just free runs.  It saves the captured value were a user level
process can read it.  The user level process can do whatever it likes it
typically load the captured counter value.  I would not use the syslog time
stamp as that has more lag but for this purpose maybe it is close enough.

The source for Linux PPS has a test program that does exactly the above.

On Fri, Apr 8, 2016 at 10:32 AM, Ben Hall  wrote:

> On 4/6/2016 11:34 PM, Nick Sayer via time-nuts wrote:
>
>> fed into a Raspberry Pi serial port that was running a simple daemon
>> that logged every line it got to syslog. Syslog is handy because it
>> timestamps everything for you and keeps rotating log files and the
>> like.
>>
>
> Would you be so kind as to elaborate how to do this?  Been looking for
> such a solution off and on for a while...and I'm not having a lot of luck
> with Google search at the moment.
>
> thanks much and 73,
> ben
>
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-- 

Chris Albertson
Redondo Beach, California
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Re: [time-nuts] Building a mains frequency monitor

[Nick Sayer via time-nuts]

The instructable I wrote about it is at 
http://www.instructables.com/id/Science-fair-How-accurate-is-the-AC-line-frequency/

There’s code for the Arduino and the Linux side as well as schematics.

> On Apr 8, 2016, at 10:32 AM, Ben Hall  wrote:
> 
> On 4/6/2016 11:34 PM, Nick Sayer via time-nuts wrote:
>> fed into a Raspberry Pi serial port that was running a simple daemon
>> that logged every line it got to syslog. Syslog is handy because it
>> timestamps everything for you and keeps rotating log files and the
>> like.
> 
> Would you be so kind as to elaborate how to do this?  Been looking for such a 
> solution off and on for a while...and I'm not having a lot of luck with 
> Google search at the moment.
> 
> thanks much and 73,
> ben
> 
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Re: [time-nuts] Building a mains frequency monitor

[Ben Hall]

On 4/6/2016 11:34 PM, Nick Sayer via time-nuts wrote:

fed into a Raspberry Pi serial port that was running a simple daemon
that logged every line it got to syslog. Syslog is handy because it
timestamps everything for you and keeps rotating log files and the
like.


Would you be so kind as to elaborate how to do this?  Been looking for 
such a solution off and on for a while...and I'm not having a lot of 
luck with Google search at the moment.


thanks much and 73,
ben

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Re: [time-nuts] Building a mains frequency monitor

[Jeremy Nichols]

A good source for what is actually going on with power line frequency is 
the web site of the University of Tennessee, which in partnership with 
Oak Ridge National Labs has a mains frequency monitoring program at 
http://fnetpublic.utk.edu/. The "Table Display" page shows frequency 
data for the United States and some other parts of the world. My station 
is #853 in the "Western Interconnection."


The frequency bounces around seemingly at random but within ±0.1 Hz 
maximum and usually half of that. The random pattern of the frequency 
shifts certainly could be used to identify a point in time at which a 
recording was made. By the looks of the data, I doubt that small 
measurement errors such as those being discussed would affect results.


Jeremy


On 4/6/2016 6:21 PM, Jay Grizzard wrote:

Since it seems to be a week for new projects on time-nuts... ;)

So I've been wanting to set up a power line frequency monitor for a while,
and now(ish) seemed to be a good time for me.

So initially, I was planning on doing a simple design that was posted here
a couple of years back, which basically works out to:

   mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET

I have a good 10MHz reference to feed the picPET, so this seems like it
would make a good first shot. But, of course, I eventually want to do
better than just a first shot. So, I have questions!

Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
point in the waveform, the frequency at any given cycle is easy to
calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
way? That method just feels... naive, for some reason.

Q2: What are the sources of noise in this design? Assuming the picPET is as
accurate as my 10MHz reference is, I can think of a few potential places
that phase noise could creep into the measurements:
   - Whatever is in the power brick beyond the transformer (I don't think a 
step down transformer alone would add phase noise, right?)
   - The dropping resistor will slowly change the amplitude of the waveform 
(and thus the point in the cycle that the schmitt trigger fires) due to thermal 
and aging effects, if we're measuring anything that's not the exact zero 
crossing
   - The point at which the schmitt trigger in the picPET fires will change 
over time for the same reasons. Also potentially due to picPET input voltage, 
depending on how the comparitor is built
   - Am I missing any?

Q3: The open-ended question: How do I improve on this? I suspect the main place for 
improvement will be in the trigger, but I'm not sure where to go with that.  Most designs 
I've seen involve a schmitt trigger, generally with reference voltages set by things like 
voltage dividers. This seems dubious at best, to me, since that means the reference 
voltage will be affected by the same effects I'm calling out above. Is there a *specific* 
design (rather than "make a zero crossing detector!" or something similarly 
vague) that someone can point me to, that would minimize this kind of trigger noise?

Q3.1: Is there a better way to get mains voltage down to something I can work 
more directly with? I saw at least one design that just used a couple of 
megaohm resistors inline -- does that introduce appreciably less phase noise 
than random AC/AC power brick?

I apologize if any of this is overly basic. I've actually read everything I 
could find both in the time-nuts archives and the internet at large about this 
kind of project, but I've still found myself left with the questions above.

I appreciate any comments / feedback / pointers!

-j
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Re: [time-nuts] Building a mains frequency monitor

[Tom Van Baak]

Mark,

Start with:

https://en.wikipedia.org/wiki/Electrical_network_frequency_analysis

and then spend some time searching. There's hundreds of technical papers and 
interesting details. Definitely time nut material.

/tvb


- Original Message - 
From: "Mark Sims" <hol...@hotmail.com>
To: <time-nuts@febo.com>
Sent: Wednesday, April 06, 2016 10:27 PM
Subject: [time-nuts] Building a mains frequency monitor


> And that can be very interesting...  a while back I read some stories on how 
> the NSA, police, etc could find out where an audio recording was made by 
> correlating AC hum in the recording with logs that they had of the power 
> grids.  Apparently logging AC mains is rather popular among the spooky / law 
> enforcement types around the world (Britain appears to be rather fond of it).
> I did an experiment where I logged the AC mains at a few places around town 
> along with some audio recordings made in the same areas.  I used some simple 
> correlation software and could easily determine where and when the recordings 
> were made.
> -
>> Phase noise? The line frequency shifts phase every time a major
> electrical load is added or dropped from the power line.
> 
>   
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Re: [time-nuts] Building a mains frequency monitor

[Jeremy Nichols]

My measurements show the fractional frequency deviation of the power line
at my home is ~25 e-6 with a 1-second measurement and 100 loops through the
calculation. I agree with Bill that a precision frequency source is not
necessary.

Jeremy
N6WFO


On Wednesday, April 6, 2016, Bill Hawkins <bill.i...@pobox.com> wrote:

> Phase noise? The line frequency shifts phase every time a major
> electrical load is added or dropped from the power line.
>
> Seems to me this effect swamps every error in the measurement system.
>
> You are looking for parts per thousand at most. Precision GPSDO 10 MHz
> is overkill.
>
> In my humble opinion, that is.
>
> Bill Hawkins
>
>
> -Original Message-
> From: time-nuts [mailto:time-nuts-boun...@febo.com <javascript:;>] On
> Behalf Of Jay
> Grizzard
> Sent: Wednesday, April 06, 2016 8:22 PM
> To: time-nuts@febo.com <javascript:;>
> Subject: [time-nuts] Building a mains frequency monitor
>
> Since it seems to be a week for new projects on time-nuts... ;)
>
> So I've been wanting to set up a power line frequency monitor for a
> while, and now(ish) seemed to be a good time for me.
>
>  %< ---
>
> I appreciate any comments / feedback / pointers!
>
> -j
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-- 
Sent from Gmail Mobile
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Re: [time-nuts] Building a mains frequency monitor

[Chris Albertson]

Transformers really are nearly noiseless.  They can pick up magnetic fields
but most of that is the 60Hz you are trying to measure. (the problem is
normally with audio transformers picking up the 60Hz)

A transformer is by far the safest way to go.  I'd even go so far as to use
a split bobbin type so even if the transformer fails you are still safe.
So look for a _quality_ name brand plug-in transformer with AC output and a
"UL" stamp on it.

I think you really do want a zero crossing detector.  The biggest source of
error is going to be the non-constant AC line voltage that might go from
125 volts to 110 volts depending on the time of day and it might even cycle
along with the next door neighbor's air conditions unit or if your
microwave oven is running.

even with zero crossing I think the very best why to do this is to assume
the trigger is not perfect so you try and measure the imperfection then
remove it in post processing.   So perhaps you have two triggers that in
theory should be symmetric.  One measure the raising edge the other the
falling edge.  They should be exactly 180 degrees out of phase and have the
same period.  You compare what should be to what is measured and assume the
difference is some kind of imperfection in the trigger that needs to be
accounted for.

Then you do your best to fit a variable frequency sine wave to your data
points.

Are you only interested in frequency?  What about line transients?  For
that you simply run the AC into a A/D converter and log all the data points
at maybe 48K samples per second.  Sounds like a lot of data but with not
really, only a few hundred megabytes per hour and you can trash the data
after it is processed  You likely be looking at an FFT to get frequency
domain data from your sampled AC line.

On Wed, Apr 6, 2016 at 6:21 PM, Jay Grizzard 
wrote:

> Since it seems to be a week for new projects on time-nuts... ;)
>
> So I've been wanting to set up a power line frequency monitor for a while,
> and now(ish) seemed to be a good time for me.
>
> So initially, I was planning on doing a simple design that was posted here
> a couple of years back, which basically works out to:
>
>   mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET
>
> I have a good 10MHz reference to feed the picPET, so this seems like it
> would make a good first shot. But, of course, I eventually want to do
> better than just a first shot. So, I have questions!
>
> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
> point in the waveform, the frequency at any given cycle is easy to
> calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
> way? That method just feels... naive, for some reason.
>
> Q2: What are the sources of noise in this design? Assuming the picPET is as
> accurate as my 10MHz reference is, I can think of a few potential places
> that phase noise could creep into the measurements:
>   - Whatever is in the power brick beyond the transformer (I don't think a
> step down transformer alone would add phase noise, right?)
>   - The dropping resistor will slowly change the amplitude of the waveform
> (and thus the point in the cycle that the schmitt trigger fires) due to
> thermal and aging effects, if we're measuring anything that's not the exact
> zero crossing
>   - The point at which the schmitt trigger in the picPET fires will change
> over time for the same reasons. Also potentially due to picPET input
> voltage, depending on how the comparitor is built
>   - Am I missing any?
>
> Q3: The open-ended question: How do I improve on this? I suspect the main
> place for improvement will be in the trigger, but I'm not sure where to go
> with that.  Most designs I've seen involve a schmitt trigger, generally
> with reference voltages set by things like voltage dividers. This seems
> dubious at best, to me, since that means the reference voltage will be
> affected by the same effects I'm calling out above. Is there a *specific*
> design (rather than "make a zero crossing detector!" or something similarly
> vague) that someone can point me to, that would minimize this kind of
> trigger noise?
>
> Q3.1: Is there a better way to get mains voltage down to something I can
> work more directly with? I saw at least one design that just used a couple
> of megaohm resistors inline -- does that introduce appreciably less phase
> noise than random AC/AC power brick?
>
> I apologize if any of this is overly basic. I've actually read everything
> I could find both in the time-nuts archives and the internet at large about
> this kind of project, but I've still found myself left with the questions
> above.
>
> I appreciate any comments / feedback / pointers!
>
> -j
> ___
> time-nuts mailing list -- time-nuts@febo.com
> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>



-- 

Chris Albertson

Re: [time-nuts] Building a mains frequency monitor

[Hal Murray]

bill.i...@pobox.com said:
> You are looking for parts per thousand at most. Precision GPSDO 10 MHz is
> overkill.

That depends on the time scale you are interested in.

If you want to plot the line frequency on the scale of seconds or minutes, 
then a junk crystal is probably good enough.

If you are want to measure the drift over hours or days, then you want a 
reference with long term stability.  You can do that with either a PPS or a 
10 MHz reference.




elfchief-timen...@lupine.org said:
>   - The dropping resistor will slowly change the amplitude of the waveform
> (and thus the point in the cycle that the schmitt trigger fires) due to
> thermal and aging effects, if we're measuring anything that's not the exact
> zero crossing 

There is all sorts of crap on the line.

I think temperature and aging of a resistor will be lost in the noise of 
normal shifts in the line voltage.  When I run out of other things to do, I 
want to capture what happens when the washing machine or refrigerator turns 
on and compare that with random dips that the power company delivers.

The APC UPS units have a serial or USB port to tell your system when to shut 
down.  At least the one I have will also tell you the line voltage and the 
min and max since the last time you asked.

On a good day, my 120V line voltage wanders over about 5 volts.  On other 
days, there are 10-15 volt dips.




-- 
These are my opinions.  I hate spam.



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[time-nuts] Building a mains frequency monitor

[Mark Sims]

And that can be very interesting...  a while back I read some stories on how 
the NSA, police, etc could find out where an audio recording was made by 
correlating AC hum in the recording with logs that they had of the power grids. 
 Apparently logging AC mains is rather popular among the spooky / law 
enforcement types around the world (Britain appears to be rather fond of it).
I did an experiment where I logged the AC mains at a few places around town 
along with some audio recordings made in the same areas.  I used some simple 
correlation software and could easily determine where and when the recordings 
were made.
-
> Phase noise? The line frequency shifts phase every time a major
electrical load is added or dropped from the power line.

  
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Re: [time-nuts] Building a mains frequency monitor

[Charles Steinmetz]

Jay wrote:

Q3: The open-ended question: How do I improve on this? I suspect the 
main place for improvement will be in the trigger, but I'm not sure 
where to go with that.  Most designs I've seen involve a schmitt 
trigger, generally with reference voltages set by things like 
voltage dividers. This seems dubious at best, to me, since that 
means the reference voltage will be affected by the same effects I'm 
calling out above. Is there a *specific* design (rather than "make a 
zero crossing detector!" or something similarly vague) that someone 
can point me to, that would minimize this kind of trigger noise?


Q3.1: Is there a better way to get mains voltage down to something I 
can work more directly with? I saw at least one design that just 
used a couple of megaohm resistors inline -- does that introduce 
appreciably less phase noise than random AC/AC power brick?



I posted a very simple circuit that performs very well some time 
ago.  It can be found here:




This circuit was designed specifically to avoid the problems with 
Schmitt triggers and with iffy input circuits.  It is transformer 
isolated, but uses the second primary winding of a small dual-voltage 
power transformer for input (i.e., 120v), which is immediately 
dropped by resistors into a diode clamp.  Why?  Because the higher 
the voltage you start with, the faster it slews through the zero 
cross and, therefore, the more precise the trigger point will 
be.  Using a 120v winding gives you a 10x slew rate advantage 
compared to using a 12v winding.  Free gain, free precision!


There was some on-list discussion starting on 12/16/14, with the 
Subject: "Simple AC mains zero-cross detector".  (I'd include a link 
to the first message in the thread, but febo.com appears to be down 
at the moment.  Use the link at the bottom of this message, choose 
list archive, then choose December 2014 and display the messages by date.)


Best regards,

Charles


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Re: [time-nuts] Building a mains frequency monitor

[Jeremy Nichols]

I've monitored line frequency with one of my old HP frequency counters. A
filament transformer with a potentiometer across the secondary allows me to
dial a safe voltage for the counter, about 1 V RMS.

My ancient counters are limited in their data collection abilities; I'm
sure your picPET device (whatever that is!) will do a better job.

Jeremy
N6WFO


On Wednesday, April 6, 2016, Jay Grizzard 
wrote:

> Since it seems to be a week for new projects on time-nuts... ;)
>
> So I've been wanting to set up a power line frequency monitor for a while,
> and now(ish) seemed to be a good time for me.
>
> So initially, I was planning on doing a simple design that was posted here
> a couple of years back, which basically works out to:
>
>   mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET
>
> I have a good 10MHz reference to feed the picPET, so this seems like it
> would make a good first shot. But, of course, I eventually want to do
> better than just a first shot. So, I have questions!
>
> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
> point in the waveform, the frequency at any given cycle is easy to
> calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
> way? That method just feels... naive, for some reason.
>
> Q2: What are the sources of noise in this design? Assuming the picPET is as
> accurate as my 10MHz reference is, I can think of a few potential places
> that phase noise could creep into the measurements:
>   - Whatever is in the power brick beyond the transformer (I don't think a
> step down transformer alone would add phase noise, right?)
>   - The dropping resistor will slowly change the amplitude of the waveform
> (and thus the point in the cycle that the schmitt trigger fires) due to
> thermal and aging effects, if we're measuring anything that's not the exact
> zero crossing
>   - The point at which the schmitt trigger in the picPET fires will change
> over time for the same reasons. Also potentially due to picPET input
> voltage, depending on how the comparitor is built
>   - Am I missing any?
>
> Q3: The open-ended question: How do I improve on this? I suspect the main
> place for improvement will be in the trigger, but I'm not sure where to go
> with that.  Most designs I've seen involve a schmitt trigger, generally
> with reference voltages set by things like voltage dividers. This seems
> dubious at best, to me, since that means the reference voltage will be
> affected by the same effects I'm calling out above. Is there a *specific*
> design (rather than "make a zero crossing detector!" or something similarly
> vague) that someone can point me to, that would minimize this kind of
> trigger noise?
>
> Q3.1: Is there a better way to get mains voltage down to something I can
> work more directly with? I saw at least one design that just used a couple
> of megaohm resistors inline -- does that introduce appreciably less phase
> noise than random AC/AC power brick?
>
> I apologize if any of this is overly basic. I've actually read everything
> I could find both in the time-nuts archives and the internet at large about
> this kind of project, but I've still found myself left with the questions
> above.
>
> I appreciate any comments / feedback / pointers!
>
> -j
> ___
> time-nuts mailing list -- time-nuts@febo.com 
> To unsubscribe, go to
> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
> and follow the instructions there.
>


-- 
Sent from Gmail Mobile
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Re: [time-nuts] Building a mains frequency monitor

[Bill Hawkins]

Phase noise? The line frequency shifts phase every time a major
electrical load is added or dropped from the power line.

Seems to me this effect swamps every error in the measurement system.

You are looking for parts per thousand at most. Precision GPSDO 10 MHz
is overkill.

In my humble opinion, that is.

Bill Hawkins


-Original Message-
From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Jay
Grizzard
Sent: Wednesday, April 06, 2016 8:22 PM
To: time-nuts@febo.com
Subject: [time-nuts] Building a mains frequency monitor

Since it seems to be a week for new projects on time-nuts... ;)

So I've been wanting to set up a power line frequency monitor for a
while, and now(ish) seemed to be a good time for me.

 %< ---

I appreciate any comments / feedback / pointers!

-j
___

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Re: [time-nuts] Building a mains frequency monitor

[Nick Sayer via time-nuts]

I did this not too long ago.

I used GPS PPS as the reference.

I took a 9v wall wart, pinned one side to ground, ran the other through a 
rectifier diode and into one input of an LM358 wired as a comparator, comparing 
to 2.5 volts (Vcc/2). The 358 was slow enough that hysteresis wasn’t required. 
When I tried the same thing with an LM393, it flapped a lot because it was so 
much faster.

What I did for the code was simply count the rising edges on the 60 Hz pin 
between each rising edge of the PPS pin. Most of the time, it was 60. When it 
wasn’t, I output a serial line with the delta. That fed into a Raspberry Pi 
serial port that was running a simple daemon that logged every line it got to 
syslog. Syslog is handy because it timestamps everything for you and keeps 
rotating log files and the like.

Some awk scripts turned the log file(s) into CSVs, and excel graphed them.

My results were that I could definitely see that there was discipline being 
applied to the frequency (so the long term average number of cycles per day was 
correct), but the short term drift was in the thousands of cycles. Enough that 
if you drove a clock directly from the 60 Hz, it would be just about pointless 
to give it a second hand.

The short term results were so wide that I felt quite confident that the actual 
effects I was seeing would have overwhelmed any measurement subtleties from the 
relative imprecision of the circuit I had designed.
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Re: [time-nuts] Building a mains frequency monitor

[Tom Van Baak]

Hi Jay,

Building a mains frequency monitor is a great way to expose yourself to almost 
everything about precise time & frequency and measurement -- for a few dollars. 
Working with quartz, rubidium, cesium simply moves the decimal place over a few 
digits.

Have a look at:

http://leapsecond.com/pages/mains/

http://leapsecond.com/pages/mains-cv/

It turns out that worrying about how to measure the exact zero-crossing of 
every 50/60 Hz cycle to the microsecond has little to no effect on any mid- to 
long-term analysis that you do. The low-level microsecond phase noise quickly 
averages away. You can see that here:

http://leapsecond.com/pages/mains/mains-adev-mdev-gnuplot-g4.png

The main thing you want to avoid is accidentally missing a cycle, or 
accidentally adding a cycle. But a glaring 16 ms gap is so easy to spot.

Some people go through elaborate electronics and filtering to avoid this. 
That's fine. Whatever works for you.

I use a picPET through a 5 VAC transformer with no filtering and just measure 
what shows up. Once in a great while, due to excessive noise, I see a stray 
pulse. But the cool thing about timestamping counters is that if a pulse shows 
up when you know it isn't expected you can just delete that data point in s/w 
and all is well. Similarly, if for whatever reason you miss a cycle, you just 
interpolate it in s/w. I get glitches like this at the rate of a few a year. 
There are about 2 billion 60 Hz cycles a year so this level of data repair is 
fine with me. Over the past 5 years the worst problem is city-wide power 
failures. But in those cases I just trade data with Hal Murray, who is in the 
same grid as me, but a different state.

So I think between the two of us we have a complete record of 60 Hz phase going 
back years. Check the time-nuts archives as this interesting subject of mains 
monitoring comes up a every year or two.

I logged data every cycle for a while. Then I switched to every second. Even 
that's more than enough.

Some people use transformers, or opto-isolators, or RC filters, or Schmitt 
triggers, or even 60 Hz PLL's. Just pick one that you think will work and play 
with it for a couple of days or weeks and see how you like it. I also run a 
wall-mount, synchronous motor, kitchen clock to keep me honest. You can see 
that, compared to a cesium clock, here:

http://leapsecond.com/pages/tec/mains-clock-ani.gif

/tvb

- Original Message - 
From: "Jay Grizzard" <elfchief-timen...@lupine.org>
To: <time-nuts@febo.com>
Sent: Wednesday, April 06, 2016 6:21 PM
Subject: [time-nuts] Building a mains frequency monitor


> Since it seems to be a week for new projects on time-nuts... ;)
> 
> So I've been wanting to set up a power line frequency monitor for a while,
> and now(ish) seemed to be a good time for me.
> 
> So initially, I was planning on doing a simple design that was posted here
> a couple of years back, which basically works out to:
> 
>  mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET
> 
> I have a good 10MHz reference to feed the picPET, so this seems like it
> would make a good first shot. But, of course, I eventually want to do
> better than just a first shot. So, I have questions!
> 
> Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
> point in the waveform, the frequency at any given cycle is easy to 
> calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
> way? That method just feels... naive, for some reason.
> 
> Q2: What are the sources of noise in this design? Assuming the picPET is as
> accurate as my 10MHz reference is, I can think of a few potential places
> that phase noise could creep into the measurements:
>  - Whatever is in the power brick beyond the transformer (I don't think a 
> step down transformer alone would add phase noise, right?)
>  - The dropping resistor will slowly change the amplitude of the waveform 
> (and thus the point in the cycle that the schmitt trigger fires) due to 
> thermal and aging effects, if we're measuring anything that's not the exact 
> zero crossing
>  - The point at which the schmitt trigger in the picPET fires will change 
> over time for the same reasons. Also potentially due to picPET input voltage, 
> depending on how the comparitor is built
>  - Am I missing any?
> 
> Q3: The open-ended question: How do I improve on this? I suspect the main 
> place for improvement will be in the trigger, but I'm not sure where to go 
> with that.  Most designs I've seen involve a schmitt trigger, generally with 
> reference voltages set by things like voltage dividers. This seems dubious at 
> best, to me, since that means the reference voltage will be affected by the 
> same effects I'm calling out above. Is there a *specific* design (rather than 
> "make a zero crossing detector!"

[time-nuts] Building a mains frequency monitor

[Jay Grizzard]

Since it seems to be a week for new projects on time-nuts... ;)

So I've been wanting to set up a power line frequency monitor for a while,
and now(ish) seemed to be a good time for me.

So initially, I was planning on doing a simple design that was posted here
a couple of years back, which basically works out to:

  mains -> simple 9v ac/ac power brick -> dropping resistor -> picPET

I have a good 10MHz reference to feed the picPET, so this seems like it
would make a good first shot. But, of course, I eventually want to do
better than just a first shot. So, I have questions!

Q1: Assuming the schmitt trigger in the picPET triggers at a consistent
point in the waveform, the frequency at any given cycle is easy to 
calculate: 1.0 / (timestamp2 - timestamp1)...but, is there a better
way? That method just feels... naive, for some reason.

Q2: What are the sources of noise in this design? Assuming the picPET is as
accurate as my 10MHz reference is, I can think of a few potential places
that phase noise could creep into the measurements:
  - Whatever is in the power brick beyond the transformer (I don't think a step 
down transformer alone would add phase noise, right?)
  - The dropping resistor will slowly change the amplitude of the waveform (and 
thus the point in the cycle that the schmitt trigger fires) due to thermal and 
aging effects, if we're measuring anything that's not the exact zero crossing
  - The point at which the schmitt trigger in the picPET fires will change over 
time for the same reasons. Also potentially due to picPET input voltage, 
depending on how the comparitor is built
  - Am I missing any?

Q3: The open-ended question: How do I improve on this? I suspect the main place 
for improvement will be in the trigger, but I'm not sure where to go with that. 
 Most designs I've seen involve a schmitt trigger, generally with reference 
voltages set by things like voltage dividers. This seems dubious at best, to 
me, since that means the reference voltage will be affected by the same effects 
I'm calling out above. Is there a *specific* design (rather than "make a zero 
crossing detector!" or something similarly vague) that someone can point me to, 
that would minimize this kind of trigger noise?

Q3.1: Is there a better way to get mains voltage down to something I can work 
more directly with? I saw at least one design that just used a couple of 
megaohm resistors inline -- does that introduce appreciably less phase noise 
than random AC/AC power brick?

I apologize if any of this is overly basic. I've actually read everything I 
could find both in the time-nuts archives and the internet at large about this 
kind of project, but I've still found myself left with the questions above.

I appreciate any comments / feedback / pointers!

-j
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