Re: [U-Boot] Pull request: u-boot-arm/master
Hi Benoît, On Thu, 11 Apr 2013 01:20:44 +0200 (CEST), Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Hi Albert, On Thursday, April 11, 2013 1:12:17 AM, Albert ARIBAUD wrote: Hello, The following changes since commit 009d75ccc11d27b9a083375a88bb93cb746b4800: Merge branch 'u-boot/master' into 'u-boot-arm/master' (2013-03-28 18:50:01 +0100) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to aad17a2f2bdd0b456522e24a90a0f8b8d8adb1f9: ARM: fix CONFIG_SPL_MAX_SIZE semantics (2013-04-11 00:18:03 +0200) *** NOTE *** there should be a single, and trivial, merge conflict on file drivers/video/exynos_fb.c. You have forgotten to apply this one: http://patchwork.ozlabs.org/patch/233964/ Thanks for pointing it out -- it got flushed from my mental cache by the SPL max size one. I have superseded my original request, am build-testing for any hiccup, and will sent out an amended PR including 233964 (with the typo in the commit fixed). Best regards, Benoît Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/1] ARM: Add support for Seagate GoFlexHome
Hi Suriyan, On Wed, 10 Apr 2013 17:04:33 -0700, Suriyan Ramasami suriya...@gmail.com wrote: This is yet another attempt with patch v3. Thanks to Wolfgang, Prafulla and Albert for comments, corrections, and suggestions. Comments on the files: MAINTAINERS: Add maintainer entry for the Seagate GoFlexHome board/Seagate/goflexhome/Makefile: Start with the Dockstar Makefile The object file is goflexhome.o board/Seagate/goflexhome/goflexhome.c: Start with dockstar.c and rename it to goflexhome.c Include goflexhome.h instead of dockstar.h Change #define DOCKSTAR_* to #define GOFLEXHOME_* Change the MACH_TYPE_DOCKSTAR to MACH_TYPE_GOFLEXHOME to reflect that its a GoFlexHome. board/Seagate/goflexhome/goflexhome.h: Start with dockstar.h and rename it to goflexhome.h In all the #defines cosmetically change DOCKSTAR to GOFLEXHOME board/Seagate/goflexhome/kwbimage.cfg: Copy the dockstar/kwbimage.cfg to goflexhome/kwbimage.cfg boards.cfg: Copy the dockstar line and rename dockstar to goflexhome include/configs/goflexhome.h: Start with dockstar.h and rename it to goflexhome.h Change CONFIG_IDENT_STRING to be GoFlex specific Add #define CONFIG_CMD_IDE, CONFIG_MVSATA_IDE for IDE support Add #define CONFIG_CMD_DATE, CONFIG_RTC_MV for RTC support Add #define CONFIG_CMD_EXT4 for supporting ext4 FS Change CONFIG_SYS_PROMPT to be GoFlex specific Change CONFIG_ENV_ADDR and CONFIG_ENV_OFFSET to the default address present in ArchLinuxArm install (/etc/fw_env.config) Signed-off-by: Suriyan Ramasami suriya...@gmail.com The text above, until the line '---' below, will remain in the commit message. This message should only be a one-line summary and a few lines of general description. Here, the 'thank you' part (appreciated nonetheless!) should be moved down just below the '---' separator line , and the details on the changes should simply not be given (after all, it all can be seen in the diff). --- Changes in v3: Squash the board support in one file Remove goflexhomemenu.c from this patch as its not board related Changes in v2: Coding style changes MAINTAINERS |4 + board/Seagate/goflexhome/Makefile | 51 + board/Seagate/goflexhome/goflexhome.c | 187 + board/Seagate/goflexhome/goflexhome.h | 47 board/Seagate/goflexhome/kwbimage.cfg | 168 + boards.cfg|1 + include/configs/goflexhome.h | 135 7 files changed, 593 insertions(+), 0 deletions(-) create mode 100644 board/Seagate/goflexhome/Makefile create mode 100644 board/Seagate/goflexhome/goflexhome.c create mode 100644 board/Seagate/goflexhome/goflexhome.h create mode 100644 board/Seagate/goflexhome/kwbimage.cfg create mode 100644 include/configs/goflexhome.h diff --git a/MAINTAINERS b/MAINTAINERS index 1614b91..6292a58 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -847,6 +847,10 @@ Sricharan R r.sricha...@ti.com omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC) omap5_evm ARM ARMV7 (OMAP5xx Soc) +Suriyan Ramasami suriya...@gmail.com + + goflexhome ARM926EJS (Kirkwood SoC) + Thierry Reding thierry.red...@avionic-design.de plutux Tegra20 (ARM7 A9 Dual Core) diff --git a/board/Seagate/goflexhome/Makefile b/board/Seagate/goflexhome/Makefile new file mode 100644 index 000..9948fe2 --- /dev/null +++ b/board/Seagate/goflexhome/Makefile @@ -0,0 +1,51 @@ +# +# Copyright (C) 2013 Suriyan Ramasami suriya...@gmail.com +# +# Based on dockstar/Makefile originally written by +# Copyright (C) 2010 Eric C. Cooper e...@cmu.edu +# +# Based on sheevaplug/Makefile originally written by +# Prafulla Wadaskar prafu...@marvell.com +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS:= goflexhome.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS:= $(addprefix $(obj),$(SOBJS)) + +$(LIB):
Re: [U-Boot] [U-Boot, v6, 4/9] nand: Extend nand_(read|write)_skip_bad with *actual and limit parameters
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 04/10/13 16:08, Tom Rini wrote: On Thu, Mar 14, 2013 at 05:32:50AM -, Tom Rini wrote: We make these two functions take a size_t pointer to how much space was used on NAND to read or write the buffer (when reads/writes happen) so that bad blocks can be accounted for. We also make them take an loff_t limit on how much data can be read or written. This means that we can now catch the case of when writing to a partition would exceed the partition size due to bad blocks. To do this we also need to make check_skip_len count not just complete blocks used but partial ones as well. All callers of nand_(read|write)_skip_bad are adjusted to call these with the most sensible limits available. The changes were started by Pantelis and finished by Tom. Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com Signed-off-by: Tom Rini tr...@ti.com With current master, the following changes are needed to adapt cm_t35 to these call changes: I guess, you will squash both patches into one, right? Acked-by: Igor Grinberg grinb...@compulab.co.il diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c index 629ce4a..84c36ba 100644 --- a/board/cm_t35/cm_t35.c +++ b/board/cm_t35/cm_t35.c @@ -91,6 +91,7 @@ static int splash_load_from_nand(u32 bmp_load_addr) res = nand_read_skip_bad(nand_info[nand_curr_device], splash_screen_nand_offset, bmp_header_size, + NULL, nand_info[nand_curr_device].size, (u_char *)bmp_load_addr); if (res 0) return res; @@ -103,6 +104,7 @@ static int splash_load_from_nand(u32 bmp_load_addr) return nand_read_skip_bad(nand_info[nand_curr_device], splash_screen_nand_offset, bmp_size, + NULL, nand_info[nand_curr_device].size, (u_char *)bmp_load_addr); splash_address_too_high: - -- Regards, Igor. -BEGIN PGP SIGNATURE- Version: GnuPG v2.0.17 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRZlo8AAoJEBDE8YO64EfazSoP/1u/f8FQwl7zZDcwlUIWSJPe nsk66wJxMteHKPG9Ib3DGKNW+ncAEfNYWH7Pzqg9rnsp+oWf/bMpTil/qWV0J8Qp QSTC3ez5QOYONBn/Zb8MyOyMcHVnbOFrKiHIR+7zjPhaWWRzVAM7VBxiYS/gtGUY tiK8ccqH9w8r+t4s6fbWZ8WWTX0ZryKcCiGxiNnjFGz5xphsS9+AvTbIL7n2r+ji mie9SD/Lb6GCeEhgYT9XBgo7gjx6Q0RNEXZL5fP+YWpII73KPFzvzzMTRo2jwWxr /vggymfjJ3amAFvMuFuIk3OEbH5CSWKnfX5pwyW2TIZ+GZttiFw040ZurmA6k3f9 LdwhFdgrp0BzRkwC92FLR+aMyV8A8WgFYkMysuqDlJkiaSXLVFlcLB43le6kuuyq uKbRDTMMNiyHncet6znIjgmH3wzYECXlRyAkH7K0mz6DrkmAGraYizUy/XwxK6cr /Zh0rmR0Owg/XZKZRRdhQnwGf/B9+FufNZehgYJlhOFHVFwm9bbHX02k16RD2PP5 P/AgdV8psCR0HvH9dJ+/93Y0r/paIp3PeAAt4nZxMwiHp07cJwqpjwgQUWDjxPkK q3R6H0otAh7cDzE84QotNzeHlR1GuxFU6wQLuTE16EDrGE7BHyMaYjuhRXH9zHek ptNpTuQm5/O7yn6tQHvV =6ma+ -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master - UPDATED
Hi Tom, On Thu, 11 Apr 2013 01:12:17 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: The following changes since commit 009d75ccc11d27b9a083375a88bb93cb746b4800: Merge branch 'u-boot/master' into 'u-boot-arm/master' (2013-03-28 18:50:01 +0100) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to abbecf4c873aa3e9ec9331c5b3eba1e2a9c84902: ARM: Fix __bss_start and __bss_end in linker scripts (2013-04-11 08:10:59 +0200) *** NOTE *** there should be a single, and trivial, merge conflict on file drivers/video/exynos_fb.c. Abbas Raza (1): mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by a board Ajay Kumar (13): video: exynos_fb: Remove callbacks from the driver video: exynos_dp: Remove callbacks from the driver video: exynos_fb: Make fimd_ctrl global EXYNOS: FDT: Add compatible strings for FIMD video: exynos_fb: add DT support for FIMD driver EXYNOS5: Add device node for FIMD SMDK5250: Add device node for FIMD video: exynos_dp: Make dp_regs global EXYNOS5: FDT: Add compatible strings for FIMD video: exynos_dp: Add function to parse DP DT node EXYNOS5: Add device node for DP SMDK5250: Add device node for DP SMDK5250: Use statically defined structures only in non DT case Akshay Saraswat (8): Exynos: clock: Fix a bug in PLL lock check condition Exynos: Add hardware accelerated SHA256 and SHA1 Exynos: config: Enable ACE HW for SHA 256 for Exynos gen: Add sha h/w acceleration to hash Exynos: config: Enable hash command Exynos5: clock: Fix a typo bug in exynos clock init Exynos5: config: enable time command Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk Albert ARIBAUD (8): Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics ARM: fix CONFIG_SPL_MAX_SIZE semantics ARM: Fix __bss_start and __bss_end in linker scripts Alexandre Pereira da Silva (1): mx23_olinuxino: Fix netboot console Andreas Bießmann (6): omap3/cpu.h: add BCH support asm/omap_gpmc.h: consolidate common defines omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel omap_gpmc: change nandecc command omap_gpmc: add support for hw assisted BCH8 tricorder: enable hw assisted BCH8 in SPL and u-boot Benoît Thébaudeau (29): mx25pdk: Enable imxdi RTC nand: mxc: Prepare to add support for i.MX5 nand: mxc: Add support for i.MX5 imx: mx5: lowlevel_init: Simplify code imx: mx53ard: Add support for NAND Flash nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome() nand: mxc: Use appropriate page number in syndrome functions arm: start.S: Fix _TEXT_BASE for SPL arm: relocate_code() is no longer noreturn arm1136: Remove redundant relocate_code() return arm: relocate_code(): Remove useless relocation offset computation arm: relocate_code(): Use __image_copy_end for end of relocation arm: crt0.S: Remove bogus .globl autoconfig.mk: Make it possible to define configs from other configs Makefile: Change CONFIG_SPL_PAD_TO to image offset imx: Fix automatic make targets for imx images nand: mxc: Switch NAND SPL to generic SPL arm926ejs: Remove deprecated and now unused NAND SPL arm: Remove unused relocate_code() parameters Makefile: Move SHELL setup to config.mk .gitignore: Add /SPL imx: Add u-boot-with-spl.imx make target imx: Add u-boot-with-nand-spl.imx make target arm: Remove support for smdk6400 Revert mkconfig: start deprecating Makefile config targets arm: Remove support for unused s3c64xx arm: Remove deprecated and now unused NAND SPL arm1176: Remove unused MMU setup from start.S arm: Make all linker scripts compatible with per-symbol sections Bin Liu (2): musb: am335x: disable bulk split-combine feature musb: set MUSB speed based on CONFIG Che-Liang Chiou (1): Exynos: Add timer_get_us function Dirk Behme (1): spi: mxc_spi: Fix ECSPI reset handling Eric Nelson (2): i.MX6: Add hdmidet command to detect attached HDMI monitor i.MX6: mx6qsabrelite: discard override of CONFIG_ARP_TIMEOUT Fabio Estevam (13): mxs: spl_mem_init: Align DDR2 init with FSL bootlets source configs: mx28evk: Use single-line comments mx28evk: Disable CONFIG_CMD_I2C Add initial support for Wandboard dual lite and solo. mx28evk: Introduce a new target for saving env vars to NAND
[U-Boot] [v3] new SPL support for IFC based Feescale platforms
This patch series ports existing Freescale's IFC based platforms/boards to new SPL based architecture. It is done to support NAND boot. It contains following patches: 1. powerpc/mpc85xx:No NOR boot,do not compile IFC errata A003399 2. powerpc/mpc85xx: new SPL support for IFC NAND 3. board/p1010rdb:Add NAND boot support using new SPL format 4. board/bsc9131rdb:Add NAND boot support using new SPL format 5. board/bsc9132qds:Add NAND boot support using new SPL format ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/5][v3] powerpc/mpc85xx:No NOR boot, do not compile IFC errata A003399
IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR flash or
no NOR boot, do not compile its workaround.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Based upon git://git.denx.de/u-boot.git branch master
Changes for v2:
- Add CONFIG_A003399_NOR_WORKAROUND for errata workaround
- Add CONFIG_A003399_NOR_WORKAROUND in README
Changes for v3:
- Use only CONFIG_A003399_NOR_WORKAROUND for errata workaround
README|4
arch/powerpc/cpu/mpc85xx/cpu_init_early.c |6 +++---
arch/powerpc/cpu/mpc8xxx/fsl_ifc.c|2 +-
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/README b/README
index 5701016..ee86f75 100644
--- a/README
+++ b/README
@@ -414,6 +414,10 @@ The following options need to be configured:
See Freescale App Note 4493 for more information about
this erratum.
+ CONFIG_A003399_NOR_WORKAROUND
+ Enables a workaround for IFC erratum A003399. It is only
+ requred during NOR boot.
+
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
This is the value to write into CCSR offset 0x18600
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index dacfdd1..439a873 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -25,7 +25,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) !defined(CONFIG_SYS_RAMBOOT)
+#ifdef CONFIG_A003399_NOR_WORKAROUND
void setup_ifc(void)
{
struct fsl_ifc *ifc_regs = (void *)CONFIG_SYS_IFC_ADDR;
@@ -99,7 +99,7 @@ void cpu_init_early_f(void)
#ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
#endif
-#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) !defined(CONFIG_SYS_RAMBOOT)
+#ifdef CONFIG_A003399_NOR_WORKAROUND
ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
u32 *dst, *src;
void (*setup_ifc_sram)(void);
@@ -138,7 +138,7 @@ void cpu_init_early_f(void)
* Work Around for IFC Erratum A003399, issue will hit only when execution
* from NOR Flash
*/
-#if defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) !defined(CONFIG_SYS_RAMBOOT)
+#ifdef CONFIG_A003399_NOR_WORKAROUND
#define SRAM_BASE_ADDR (0x)
/* TLB for SRAM */
mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(9);
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
index 56b319f..959a0e2 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_ifc.c
@@ -43,7 +43,7 @@ void init_early_memctl_regs(void)
set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
-#if !defined(CONFIG_SYS_FSL_ERRATUM_IFC_A003399) || defined(CONFIG_SYS_RAMBOOT)
+#ifndef CONFIG_A003399_NOR_WORKAROUND
#ifdef CONFIG_SYS_CSPR0_EXT
set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
#endif
--
1.7.9.5
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[U-Boot] [PATCH 2/5][v3] powerpc/mpc85xx: new SPL support for IFC NAND
Linker script is not able find start.o binary. So add its absolute path in
u-boot-spl.lds. This change is similar to u-boot-nand.lds
common/Makefile: Avoid compiling unnecssary files
fsl_ifc_spl.c : It is is responsible for reading u-boot binary from
NAND flash and copying into DDR. It also transfer cotrol from NAND SPL
to u-boot image present in DDR.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Based upon git://git.denx.de/u-boot.git branch master
Changes for v2: Sending as it is
Changes for v3: Fix tools/checkpatch errors
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds |2 +-
board/freescale/common/Makefile | 10 ++
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/fsl_ifc_spl.c | 258 +++
4 files changed, 270 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/fsl_ifc_spl.c
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index f2b7bff..cf6fa7c 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -60,7 +60,7 @@ SECTIONS
#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
.bootpg ADDR(.text) + 0x1000 :
{
- start.o (.bootpg)
+ arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
}
#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
#elif defined(CONFIG_FSL_ELBC)
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 75725b4..a4d521c 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -29,6 +29,15 @@ endif
LIB= $(obj)libfreescale.o
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+ifndef MINIMAL
COBJS-$(CONFIG_FSL_CADMUS) += cadmus.o
COBJS-$(CONFIG_FSL_VIA)+= cds_via.o
COBJS-$(CONFIG_FMAN_ENET) += fman.o
@@ -62,6 +71,7 @@ SUBLIB-$(CONFIG_P3041DS) += p_corenet/libp_corenet.o
SUBLIB-$(CONFIG_P4080DS) += p_corenet/libp_corenet.o
SUBLIB-$(CONFIG_P5020DS) += p_corenet/libp_corenet.o
SUBLIB-$(CONFIG_P5040DS) += p_corenet/libp_corenet.o
+endif
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index c77c0c4..9d7deb8 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -82,6 +82,7 @@ COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
else # minimal SPL drivers
COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
+COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
endif # drivers
endif # nand
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c
new file mode 100644
index 000..adfe7b1
--- /dev/null
+++ b/drivers/mtd/nand/fsl_ifc_spl.c
@@ -0,0 +1,258 @@
+/*
+ * NAND boot for Freescale Integrated Flash Controller, NAND FCM
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Author: Dipen Dudhat dipen.dud...@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/fsl_ifc.h
+#include linux/mtd/nand.h
+
+static inline int is_blank(uchar *addr, int page_size)
+{
+ int i;
+
+ for (i = 0; i page_size; i++) {
+ if (__raw_readb(addr[i]) != 0xff)
+ return 0;
+ }
+
+ /*
+* For the SPL, don't worry about uncorrectable errors
+* where the main area is all FFs but shouldn't be.
+*/
+ return 1;
+}
+
+/* returns nonzero if entire page is blank */
+static inline int check_read_ecc(uchar *buf, u32 *eccstat,
+unsigned int bufnum, int page_size)
+{
+ u32 reg = eccstat[bufnum / 4];
+ int errors = (reg ((3 - bufnum % 4) * 8)) 15;
+
+ if (errors == 15) { /* uncorrectable */
+ /* Blank pages fail hw ECC checks */
+ if (is_blank(buf, page_size))
+ return 1;
+
+ puts(ecc error\n);
+ for (;;)
+ ;
+ }
+
+ return 0;
+}
+
+static inline void nand_wait(uchar *buf, int bufnum, int page_size)
+{
+ struct fsl_ifc *ifc = IFC_BASE_ADDR;
+ u32 status;
+ u32 eccstat[4];
+
[U-Boot] [PATCH 3/5][v3] board/p1010rdb:Add NAND boot support using new SPL format
- defines contants
- Add spl_minimal.c to initialise DDR
- update TLB entries as per NAND boot
- remove nand_spl support for P1010RDB
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Based upon git://git.denx.de/u-boot.git branch master
Changes for v2:
- Define CONFIG_A003399_NOR_WORKAROUND for NOR boot
Changes for v3:
- Put CONFIG_A003399_NOR_WORKAROUND in
CONFIG_SYS_FSL_ERRATUM_IFC_A003399
- Fix tools/checkpatch errors
board/freescale/p1010rdb/Makefile | 16 ++
.../freescale/p1010rdb/spl_minimal.c | 20 +-
board/freescale/p1010rdb/tlb.c | 12 +-
include/configs/P1010RDB.h | 75 +++---
nand_spl/board/freescale/p1010rdb/Makefile | 142 --
nand_spl/nand_boot_fsl_ifc.c | 271
6 files changed, 78 insertions(+), 458 deletions(-)
rename nand_spl/board/freescale/p1010rdb/nand_boot.c =
board/freescale/p1010rdb/spl_minimal.c (95%)
delete mode 100644 nand_spl/board/freescale/p1010rdb/Makefile
delete mode 100644 nand_spl/nand_boot_fsl_ifc.c
diff --git a/board/freescale/p1010rdb/Makefile
b/board/freescale/p1010rdb/Makefile
index 4c705b6..e6563be 100644
--- a/board/freescale/p1010rdb/Makefile
+++ b/board/freescale/p1010rdb/Makefile
@@ -24,11 +24,27 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+ifdef MINIMAL
+
+COBJS-y+= spl_minimal.o tlb.o law.o
+
+else
+
COBJS-y+= $(BOARD).o
COBJS-y+= ddr.o
COBJS-y+= law.o
COBJS-y+= tlb.o
+endif
+
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
diff --git a/nand_spl/board/freescale/p1010rdb/nand_boot.c
b/board/freescale/p1010rdb/spl_minimal.c
similarity index 95%
rename from nand_spl/board/freescale/p1010rdb/nand_boot.c
rename to board/freescale/p1010rdb/spl_minimal.c
index 3c7bc2b..c909e0e 100644
--- a/nand_spl/board/freescale/p1010rdb/nand_boot.c
+++ b/board/freescale/p1010rdb/spl_minimal.c
@@ -31,11 +31,18 @@
DECLARE_GLOBAL_DATA_PTR;
-unsigned long ddr_freq_mhz;
void sdram_init(void)
{
ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ u32 ddr_ratio;
+ unsigned long ddr_freq_mhz;
+
+ ddr_ratio = in_be32(gur-porpllsr) MPC85xx_PORPLLSR_DDR_RATIO;
+ ddr_ratio = ddr_ratio MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
+ ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 0x100;
+
/* mask off E bit */
u32 svr = SVR_SOC_VER(mfspr(SPRN_SVR));
@@ -81,6 +88,7 @@ void sdram_init(void)
__raw_writel((CONFIG_SYS_DDR_CS0_BNDS 1) 0x0fff0fff,
ddr-cs0_bnds);
}
+ asm volatile(sync;isync);
udelay(500);
/* Let the controller go */
@@ -91,7 +99,7 @@ void sdram_init(void)
void board_init_f(ulong bootflag)
{
- u32 plat_ratio, ddr_ratio;
+ u32 plat_ratio;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
/* initialize selected port with appropriate baud rate */
@@ -99,10 +107,6 @@ void board_init_f(ulong bootflag)
plat_ratio = 1;
gd-bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
- ddr_ratio = in_be32(gur-porpllsr) MPC85xx_PORPLLSR_DDR_RATIO;
- ddr_ratio = ddr_ratio MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
- ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 0x100;
-
NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
gd-bus_clk / 16 / CONFIG_BAUDRATE);
@@ -115,8 +119,8 @@ void board_init_f(ulong bootflag)
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
*/
- relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0,
- CONFIG_SYS_NAND_U_BOOT_RELOC);
+
+ relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
}
void board_init_r(gd_t *gd, ulong dest_addr)
diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c
index 4256bf4..7a8690a 100644
--- a/board/freescale/p1010rdb/tlb.c
+++ b/board/freescale/p1010rdb/tlb.c
@@ -43,16 +43,16 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 1 */
/* *I*** - Covers boot page */
- SET_TLB_ENTRY(1, 0xf000, 0xf000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 0, BOOKE_PAGESZ_4K, 1),
+ SET_TLB_ENTRY(1, 0xe000, 0xe000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 0, BOOKE_PAGESZ_8K, 1),
/* *I*G* - CCSRBAR */
SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_1M, 1),
-#ifndef
[U-Boot] [PATCH 4/5][v3] board/bsc9131rdb:Add NAND boot support using new SPL format
- Add NAND boot target
- defines contants
- Add spl_minimal.c to initialise DDR
- update TLB entries as per NAND boot
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Based upon git://git.denx.de/u-boot.git branch master
Changes for v2: Sending as it is
Changes for v3: Fix tools/checkpatch errors
board/freescale/bsc9131rdb/Makefile | 16
board/freescale/bsc9131rdb/spl_minimal.c | 118 ++
board/freescale/bsc9131rdb/tlb.c |8 +-
boards.cfg |1 +
include/configs/BSC9131RDB.h | 49 ++---
5 files changed, 177 insertions(+), 15 deletions(-)
create mode 100644 board/freescale/bsc9131rdb/spl_minimal.c
diff --git a/board/freescale/bsc9131rdb/Makefile
b/board/freescale/bsc9131rdb/Makefile
index 6f4cb26..2e829ad 100644
--- a/board/freescale/bsc9131rdb/Makefile
+++ b/board/freescale/bsc9131rdb/Makefile
@@ -24,12 +24,28 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+ifdef MINIMAL
+
+COBJS-y+= spl_minimal.o tlb.o law.o
+
+else
+
COBJS-y+= $(BOARD).o
COBJS-y+= ddr.o
COBJS-y+= law.o
COBJS-y+= tlb.o
#COBJS-y += bsc9131rdb_mux.o
+endif
+
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
diff --git a/board/freescale/bsc9131rdb/spl_minimal.c
b/board/freescale/bsc9131rdb/spl_minimal.c
new file mode 100644
index 000..301115e
--- /dev/null
+++ b/board/freescale/bsc9131rdb/spl_minimal.c
@@ -0,0 +1,118 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include ns16550.h
+#include asm/io.h
+#include nand.h
+#include linux/compiler.h
+#include asm/fsl_law.h
+#include asm/fsl_ddr_sdram.h
+#include asm/global_data.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Fixed sdram init -- doesn't use serial presence detect.
+ */
+static void sdram_init(void)
+{
+ ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+
+ __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, ddr-cs0_bnds);
+ __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, ddr-cs0_config);
+#if CONFIG_CHIP_SELECTS_PER_CTRL 1
+ __raw_writel(CONFIG_SYS_DDR_CS1_BNDS, ddr-cs1_bnds);
+ __raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, ddr-cs1_config);
+#endif
+ __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, ddr-timing_cfg_3);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_0_800, ddr-timing_cfg_0);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_1_800, ddr-timing_cfg_1);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, ddr-timing_cfg_2);
+
+ __raw_writel(CONFIG_SYS_DDR_CONTROL_2, ddr-sdram_cfg_2);
+ __raw_writel(CONFIG_SYS_DDR_MODE_1_800, ddr-sdram_mode);
+ __raw_writel(CONFIG_SYS_DDR_MODE_2_800, ddr-sdram_mode_2);
+
+ __raw_writel(CONFIG_SYS_DDR_INTERVAL_800, ddr-sdram_interval);
+ __raw_writel(CONFIG_SYS_DDR_DATA_INIT, ddr-sdram_data_init);
+ __raw_writel(CONFIG_SYS_DDR_CLK_CTRL_800, ddr-sdram_clk_cntl);
+
+ __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, ddr-ddr_wrlvl_cntl);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_4, ddr-timing_cfg_4);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_5, ddr-timing_cfg_5);
+ __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, ddr-ddr_zq_cntl);
+
+ /* Set, but do not enable the memory */
+ __raw_writel(CONFIG_SYS_DDR_CONTROL ~SDRAM_CFG_MEM_EN,
ddr-sdram_cfg);
+
+ asm volatile(sync;isync);
+ udelay(500);
+
+ /* Let the controller go */
+ out_be32(ddr-sdram_cfg, in_be32(ddr-sdram_cfg) | SDRAM_CFG_MEM_EN);
+
+ set_next_law(CONFIG_SYS_NAND_DDR_LAW, LAW_SIZE_1G, LAW_TRGT_IF_DDR_1);
+}
+
+void board_init_f(ulong bootflag)
+{
+ u32 plat_ratio;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ /* initialize selected port with appropriate baud rate */
+ plat_ratio = in_be32(gur-porpllsr) MPC85xx_PORPLLSR_PLAT_RATIO;
+ plat_ratio = 1;
+ gd-bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+
+ NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+gd-bus_clk / 16 / CONFIG_BAUDRATE);
+
+
[U-Boot] [PATCH 5/5][v3] board/bsc9132qds:Add NAND boot support using new SPL format
- Add NAND boot target
- defines contants
- Add spl_minimal.c to initialise DDR
- update TLB, LAW entries as per NAND boot
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Based upon git://git.denx.de/u-boot.git branch master
Changes for v2: Sending as it is
Changes for v2: Fix tools/checkpatch errors
board/freescale/bsc9132qds/Makefile | 17
board/freescale/bsc9132qds/law.c |6 +-
board/freescale/bsc9132qds/spl_minimal.c | 130 ++
board/freescale/bsc9132qds/tlb.c | 24 +++---
boards.cfg |2 +
include/configs/BSC9132QDS.h | 63 +--
6 files changed, 225 insertions(+), 17 deletions(-)
create mode 100644 board/freescale/bsc9132qds/spl_minimal.c
diff --git a/board/freescale/bsc9132qds/Makefile
b/board/freescale/bsc9132qds/Makefile
index 267400b..72b1917 100644
--- a/board/freescale/bsc9132qds/Makefile
+++ b/board/freescale/bsc9132qds/Makefile
@@ -24,11 +24,28 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+MINIMAL=
+
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_INIT_MINIMAL
+MINIMAL=y
+endif
+endif
+
+ifdef MINIMAL
+
+COBJS-y+= spl_minimal.o tlb.o law.o
+
+else
+
+
COBJS-y+= $(BOARD).o
COBJS-y+= ddr.o
COBJS-y+= law.o
COBJS-y+= tlb.o
+endif
+
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
diff --git a/board/freescale/bsc9132qds/law.c b/board/freescale/bsc9132qds/law.c
index dc23658..b4bce99 100644
--- a/board/freescale/bsc9132qds/law.c
+++ b/board/freescale/bsc9132qds/law.c
@@ -25,11 +25,13 @@
#include asm/mmu.h
struct law_entry law_table[] = {
-#ifndef CONFIG_SYS_NO_FLASH
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_128M, LAW_TRGT_IF_IFC),
-#endif
+#ifdef CONFIG_SYS_NAND_BASE_PHYS
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
+#endif
+#ifdef CONFIG_SYS_FPGA_BASE_PHYS
SET_LAW(CONFIG_SYS_FPGA_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
+#endif
};
int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/bsc9132qds/spl_minimal.c
b/board/freescale/bsc9132qds/spl_minimal.c
new file mode 100644
index 000..62dee52
--- /dev/null
+++ b/board/freescale/bsc9132qds/spl_minimal.c
@@ -0,0 +1,130 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include ns16550.h
+#include asm/io.h
+#include nand.h
+#include linux/compiler.h
+#include asm/fsl_law.h
+#include asm/fsl_ddr_sdram.h
+#include asm/global_data.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void sdram_init(void)
+{
+ ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
+#if CONFIG_DDR_CLK_FREQ == 1
+ __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, ddr-cs0_bnds);
+ __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, ddr-cs0_config);
+ __raw_writel(CONFIG_SYS_DDR_CONTROL_800 | SDRAM_CFG_32_BE,
ddr-sdram_cfg);
+ __raw_writel(CONFIG_SYS_DDR_CONTROL_2_800, ddr-sdram_cfg_2);
+ __raw_writel(CONFIG_SYS_DDR_DATA_INIT, ddr-sdram_data_init);
+
+ __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, ddr-timing_cfg_3);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_0_800, ddr-timing_cfg_0);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_1_800, ddr-timing_cfg_1);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_2_800, ddr-timing_cfg_2);
+ __raw_writel(CONFIG_SYS_DDR_MODE_1_800, ddr-sdram_mode);
+ __raw_writel(CONFIG_SYS_DDR_MODE_2_800, ddr-sdram_mode_2);
+ __raw_writel(CONFIG_SYS_DDR_INTERVAL_800, ddr-sdram_interval);
+ __raw_writel(CONFIG_SYS_DDR_CLK_CTRL_800, ddr-sdram_clk_cntl);
+ __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, ddr-ddr_wrlvl_cntl);
+
+ __raw_writel(CONFIG_SYS_DDR_TIMING_4_800, ddr-timing_cfg_4);
+ __raw_writel(CONFIG_SYS_DDR_TIMING_5_800, ddr-timing_cfg_5);
+ __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, ddr-ddr_zq_cntl);
+#elif CONFIG_DDR_CLK_FREQ == 13300
+ __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, ddr-cs0_bnds);
+ __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, ddr-cs0_config);
+ __raw_writel(CONFIG_SYS_DDR_CONTROL_1333 | SDRAM_CFG_32_BE,
ddr-sdram_cfg);
+
Re: [U-Boot] [PATCH v3 1/1] ARM: Add support for Seagate GoFlexHome
Dear Suriyan Ramasami,
In message 1365638673-7815-1-git-send-email-suriya...@gmail.com you wrote:
This is yet another attempt with patch v3.
Thanks to Wolfgang, Prafulla and Albert for comments, corrections,
and suggestions.
On addition to the comments already made about how the commit message
should be organized and where comments go, here some additional
remarks:
+ static const u32 kwmpp_config[] = {
...
+ };
+ kirkwood_mpp_conf(kwmpp_config, NULL);
Please always insert a blank line between declarations and code.
+static void set_leds(u32 leds, u32 blinking)
+{
+ struct kwgpio_registers *r = (struct kwgpio_registers *)KW_GPIO1_BASE;
+ u32 oe = readl(r-oe) | BOTH_LEDS;
+ writel(oe ~leds, r-oe); /* active low */
Ditto. Please fix globally.
+ u32 bl = readl(r-blink_en) ~BOTH_LEDS;
Please never mix declarations and code. Please fix globally.
diff --git a/board/Seagate/goflexhome/goflexhome.h
b/board/Seagate/goflexhome/goflexhome.h
new file mode 100644
index 000..2af2596
--- /dev/null
+++ b/board/Seagate/goflexhome/goflexhome.h
What is this file needed for? It appears all this could go into
include/configs/goflexhome.h instead?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Science makes godlike -- it is all over with priests and gods when
man becomes scientific. Moral: science is the forbidden as such -- it
alone is forbidden. Science is the *first* sin, the *original* sin.
*This alone is morality.* ``Thou shalt not know'' -- the rest
follows. - Friedrich Nietzsche
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Re: [U-Boot] [PATCH] imx: Add titanium board support (i.MX6 based)
Hi Wolfgang,
On 10.04.2013 14:13, Wolfgang Denk wrote:
+int board_mmc_init(bd_t *bis)
+{
+s32 status = 0;
+u32 index = 0;
+
+usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+
+for (index = 0; index CONFIG_SYS_FSL_USDHC_NUM; ++index) {
+switch (index) {
+case 0:
+imx_iomux_v3_setup_multiple_pads(
+usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+break;
+default:
+printf(Warning: you configured more USDHC controllers
+ (%d) then supported by the board (%d)\n,
+ index + 1, CONFIG_SYS_FSL_USDHC_NUM);
+return status;
+}
+
+status |= fsl_esdhc_initialize(bis, usdhc_cfg[index]);
+}
+
+return status;
+}
CONFIG_SYS_FSL_USDHC_NUM is a #defined constant, so the test can be
done at compile time. Doing this at run time makes no sense at all.
Drop the whole loop here, it is not needed for a single interface. It
is just a waste of code that obfuscates what you are doing.
Okay.
You return status but where do you actually set it? And where do
you test for errors of imx_iomux_v3_setup_multiple_pads() ?
With only one pad-IF to configure I can use imx_iomux_v3_setup_pad()
which does not return an error:
int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
{
u32 mux_ctrl_ofs = (pad MUX_CTRL_OFS_MASK) MUX_CTRL_OFS_SHIFT;
u32 mux_mode = (pad MUX_MODE_MASK) MUX_MODE_SHIFT;
u32 sel_input_ofs =
(pad MUX_SEL_INPUT_OFS_MASK) MUX_SEL_INPUT_OFS_SHIFT;
u32 sel_input =
(pad MUX_SEL_INPUT_MASK) MUX_SEL_INPUT_SHIFT;
u32 pad_ctrl_ofs =
(pad MUX_PAD_CTRL_OFS_MASK) MUX_PAD_CTRL_OFS_SHIFT;
u32 pad_ctrl = (pad MUX_PAD_CTRL_MASK) MUX_PAD_CTRL_SHIFT;
if (mux_ctrl_ofs)
__raw_writel(mux_mode, base + mux_ctrl_ofs);
if (sel_input_ofs)
__raw_writel(sel_input, base + sel_input_ofs);
if (!(pad_ctrl NO_PAD_CTRL) pad_ctrl_ofs)
__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
return 0;
}
So we can change this function to void:
void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
And this makes returning an error in the multiple version also
useless. I can change it to void as well.
Guess that should be fixed globally (and for some other boards as
well).
Yes, I'll look into this. Thanks for the review.
Best regards,
Stefan
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[U-Boot] [PATCH v2] blackfin: Move blackfin watchdog driver out of the blackfin arch folder.
From: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
Changes in v2:
- Disable hardware watchdog before changing the timeout MMR.
Changes in v1:
- Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined.
- Move blackfin hw watchdog driver to the generic driver folder.
- Call hw_watchdog_init() from blackfin board init code.
- Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS
- Update README.watchdog accordingly
arch/blackfin/cpu/Makefile |1 -
arch/blackfin/cpu/initcode.c |5 +++-
arch/blackfin/cpu/start.S | 24 +--
arch/blackfin/lib/board.c |4 +-
doc/README.watchdog|3 ++
drivers/watchdog/Makefile |1 +
.../cpu/watchdog.c = drivers/watchdog/bfin_wdt.c |7 -
include/configs/bfin_adi_common.h |6 +
include/watchdog.h |3 +-
9 files changed, 38 insertions(+), 16 deletions(-)
rename arch/blackfin/cpu/watchdog.c = drivers/watchdog/bfin_wdt.c (64%)
diff --git a/arch/blackfin/cpu/Makefile b/arch/blackfin/cpu/Makefile
index 0a72ec5..145f63e 100644
--- a/arch/blackfin/cpu/Makefile
+++ b/arch/blackfin/cpu/Makefile
@@ -25,7 +25,6 @@ COBJS-y += os_log.o
COBJS-y += reset.o
COBJS-y += serial.o
COBJS-y += traps.o
-COBJS-$(CONFIG_HW_WATCHDOG) += watchdog.o
SRCS := $(SEXTRA:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 8ef0b92..078209f 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -13,6 +13,7 @@
#include config.h
#include asm/blackfin.h
+#include asm/mach-common/bits/watchdog.h
#include asm/mach-common/bits/bootrom.h
#include asm/mach-common/bits/core.h
@@ -468,9 +469,11 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint
*divB, uint *vcoB)
bfin_write_SEC_GCTL(0x1);
bfin_write_SEC_CCTL(0x1);
#endif
+ bfin_write_WDOG_CTL(WDDIS);
+ SSYNC();
bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE));
#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART
- bfin_write_WDOG_CTL(0);
+ bfin_write_WDOG_CTL(WDEN);
#endif
serial_putc('f');
}
diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S
index 7155fc8..35ad4bb 100644
--- a/arch/blackfin/cpu/start.S
+++ b/arch/blackfin/cpu/start.S
@@ -32,6 +32,7 @@
#include config.h
#include asm/blackfin.h
+#include asm/mach-common/bits/watchdog.h
#include asm/mach-common/bits/core.h
#include asm/mach-common/bits/pll.h
@@ -65,20 +66,27 @@ ENTRY(_start)
p5.h = HI(COREMMR_BASE);
#ifdef CONFIG_HW_WATCHDOG
-#ifndef __ADSPBF60x__
-# ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
-# define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
-# endif
- /* Program the watchdog with an initial timeout of ~5 seconds.
+ /* Program the watchdog with default timeout of ~5 seconds.
* That should be long enough to bootstrap ourselves up and
* then the common u-boot code can take over.
*/
+ r1 = WDDIS;
+# ifdef __ADSPBF60x__
+ [p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# else
+ W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# endif
+ SSYNC;
r0 = 0;
- r0.h = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START));
+ r0.h = HI(MSEC_TO_SCLK(CONFIG_WATCHDOG_TIMEOUT_MSECS));
[p4 + (WDOG_CNT - SYSMMR_BASE)] = r0;
+ r1 = WDEN;
/* fire up the watchdog - R0.L above needs to be 0x */
- W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
-#endif
+# ifdef __ADSPBF60x__
+ [p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# else
+ W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# endif
#endif
/* Turn on the serial for debugging the init process */
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index c1e14e2..99970e1 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -279,9 +279,9 @@ void board_init_f(ulong bootflag)
dcache_enable();
#endif
-#ifdef CONFIG_WATCHDOG
+#ifdef CONFIG_HW_WATCHDOG
serial_early_puts(Setting up external watchdog\n);
- watchdog_init();
+ hw_watchdog_init();
#endif
#ifdef DEBUG
diff --git a/doc/README.watchdog b/doc/README.watchdog
index ee65008..f2a9d26 100644
--- a/doc/README.watchdog
+++ b/doc/README.watchdog
@@ -27,3 +27,6 @@ CONFIG_IMX_WATCHDOG
Available for i.mx31/35/5x/6x to service the watchdog. This is not
automatically set because some boards (vision2) still need to define
their own hw_watchdog_reset routine.
+
+CONFIG_BFIN_WATCHDOG
+ Available for bf5xx and bf6xx to service the watchdog.
diff --git a/drivers/watchdog/Makefile
Re: [U-Boot] [STATUS] v2013.04-rc2 released
Hi Albert, Tom, On 04/04/2013 10:20 AM, Albert ARIBAUD wrote: Mainly I am waiting for Vincent's V10 to be tested a bit, and also I am going to post the fix for the __bss_end mixup. Anything else for 2013.04 ARM still missing, people please yell at me. I only want to drop a note that there are still some ARM related patches pending for 2013.04. They should run through the marvell tree. Prafulla is already aware of this: http://lists.denx.de/pipermail/u-boot/2013-April/151229.html Regards Holger ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] imx: Add titanium board support (i.MX6 based)
Titanium is a i.MX6 based board from ProjectionDesign / Barco. This
patch adds support for this board with the newly introduced NAND
support for i.MX6.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Stefano Babic sba...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
---
v2:
- Fixed comment in imximage.imx
- Use only english comments
- Move include files to top of config header
- Remove unnecessary loop in board_mmc_init()
- Minor fixups
- No magic values used any more
- Increade NAND clock (GPMI IO) to 100MHz
- CONFIG_ARP_TIMEOUT removed as its not needed
MAINTAINERS | 2 +
arch/arm/include/asm/arch-mx6/crm_regs.h | 7 +-
board/freescale/titanium/Makefile| 36
board/freescale/titanium/imximage.cfg| 173 +++
board/freescale/titanium/titanium.c | 360 +++
boards.cfg | 1 +
include/configs/titanium.h | 278
7 files changed, 855 insertions(+), 2 deletions(-)
create mode 100644 board/freescale/titanium/Makefile
create mode 100644 board/freescale/titanium/imximage.cfg
create mode 100644 board/freescale/titanium/titanium.c
create mode 100644 include/configs/titanium.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 1614b91..5cac2fb 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -876,6 +876,8 @@ Stefan Roese s...@denx.de
x600ARM926EJS (spear600 Soc)
+ titaniumi.MX6Q
+
pdnb3 xscale/ixp
scpuxscale/ixp
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 7676457..cf5c694 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -262,10 +262,13 @@ struct mxc_ccm_reg {
/* Define the bits in register CS2CDR */
#define MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK (0x3F 21)
#define MXC_CCM_CS2CDR_ENFC_CLK_PODF_OFFSET21
+#define MXC_CCM_CS2CDR_ENFC_CLK_PODF(v)(((v) 0x3f)
21)
#define MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK (0x7 18)
#define MXC_CCM_CS2CDR_ENFC_CLK_PRED_OFFSET18
+#define MXC_CCM_CS2CDR_ENFC_CLK_PRED(v)(((v) 0x7)
18)
#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK (0x3 16)
#define MXC_CCM_CS2CDR_ENFC_CLK_SEL_OFFSET 16
+#define MXC_CCM_CS2CDR_ENFC_CLK_SEL(v) (((v) 0x3) 16)
#define MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK(0x7 12)
#define MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET 12
#define MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK(0x7 9)
@@ -415,8 +418,8 @@ struct mxc_ccm_reg {
#define MXC_CCM_CCGR0_AIPS_TZ1_MASK
(3MXC_CCM_CCGR0_AIPS_TZ1_OFFSET)
#define MXC_CCM_CCGR0_AIPS_TZ2_OFFSET 2
#define MXC_CCM_CCGR0_AIPS_TZ2_MASK
(3MXC_CCM_CCGR0_AIPS_TZ2_OFFSET)
-#define MXC_CCM_CCGR0_APBHDMA HCLK_OFFSET 4
-#define MXC_CCM_CCGR0_AMASK
(3MXC_CCM_CCGR0_APBHDMA)
+#define MXC_CCM_CCGR0_APBHDMA_OFFSET 4
+#define MXC_CCM_CCGR0_APBHDMA_MASK
(3MXC_CCM_CCGR0_APBHDMA_OFFSET)
#define MXC_CCM_CCGR0_ASRC_OFFSET 6
#define MXC_CCM_CCGR0_ASRC_MASK
(3MXC_CCM_CCGR0_ASRC_OFFSET)
#define MXC_CCM_CCGR0_CAAM_SECURE_MEM_OFFSET 8
diff --git a/board/freescale/titanium/Makefile
b/board/freescale/titanium/Makefile
new file mode 100644
index 000..46827f8
--- /dev/null
+++ b/board/freescale/titanium/Makefile
@@ -0,0 +1,36 @@
+#
+# Copyright (C) 2007, Guennadi Liakhovetski l...@denx.de
+#
+# (C) Copyright 2011 Freescale Semiconductor, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := titanium.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/freescale/titanium/imximage.cfg
b/board/freescale/titanium/imximage.cfg
new file mode 100644
index 000..5661d58
--- /dev/null
+++ b/board/freescale/titanium/imximage.cfg
@@ -0,0 +1,173 @@
+/*
+ * Projectiondesign AS
+
[U-Boot] [PATCH] arm: imx: Change iomux functions to void type
They never return anything also than 0, so lets change the function
to void instead.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/imx-common/iomux-v3.c | 18 +-
arch/arm/include/asm/imx-common/iomux-v3.h | 4 ++--
2 files changed, 7 insertions(+), 15 deletions(-)
diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
index 08fad78..7fe5ce7 100644
--- a/arch/arm/imx-common/iomux-v3.c
+++ b/arch/arm/imx-common/iomux-v3.c
@@ -30,7 +30,7 @@ static void *base = (void *)IOMUXC_BASE_ADDR;
/*
* configures a single pad in the iomuxer
*/
-int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
+void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
{
u32 mux_ctrl_ofs = (pad MUX_CTRL_OFS_MASK) MUX_CTRL_OFS_SHIFT;
u32 mux_mode = (pad MUX_MODE_MASK) MUX_MODE_SHIFT;
@@ -50,22 +50,14 @@ int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
if (!(pad_ctrl NO_PAD_CTRL) pad_ctrl_ofs)
__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
-
- return 0;
}
-int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
-unsigned count)
+void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
+ unsigned count)
{
iomux_v3_cfg_t const *p = pad_list;
int i;
- int ret;
- for (i = 0; i count; i++) {
- ret = imx_iomux_v3_setup_pad(*p);
- if (ret)
- return ret;
- p++;
- }
- return 0;
+ for (i = 0; i count; i++)
+ imx_iomux_v3_setup_pad(*p++);
}
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h
b/arch/arm/include/asm/imx-common/iomux-v3.h
index c34bb76..70bf3cd 100644
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -97,8 +97,8 @@ typedef u64 iomux_v3_cfg_t;
#define MUX_CONFIG_SION(0x1 4)
-int imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
-int imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
+void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
+void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
unsigned count);
#endif /* __MACH_IOMUX_V3_H__*/
--
1.8.2.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [STATUS] v2013.04-rc2 released
Hi Holger, On Thu, 11 Apr 2013 10:34:09 +0200, Holger Brunck holger.bru...@keymile.com wrote: Hi Albert, Tom, On 04/04/2013 10:20 AM, Albert ARIBAUD wrote: Mainly I am waiting for Vincent's V10 to be tested a bit, and also I am going to post the fix for the __bss_end mixup. Anything else for 2013.04 ARM still missing, people please yell at me. I only want to drop a note that there are still some ARM related patches pending for 2013.04. They should run through the marvell tree. Prafulla is already aware of this: http://lists.denx.de/pipermail/u-boot/2013-April/151229.html Thanks Holger. While Prafulla processes them, I'll gather them in a temporary branch here and build-test them to speed things up when the Marvell PR comes in. That would be: http://patchwork.ozlabs.org/patch/212438/ http://patchwork.ozlabs.org/patch/212441/ http://patchwork.ozlabs.org/patch/212439/ http://patchwork.ozlabs.org/patch/212440/ Let me know (patchwork URLs) if any other patch should be considered. Regards Holger Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/4] imx: Add iMX6 NAND support
Hi Marek, On 10.04.2013 10:21, Marek Vasut wrote: To support NAND on the iMX6 this patch moves some headers into i.MX common locations. Instead of creating new files in the imx6 include directory containing nearly the same content. Here the diffstat: They look reasonable, can you give them a test on m28evk please? Yes. Unfortunately it doesn't boot to the prompt. But this is not a problem of my patchset. It also happens with the latest master branch: U-Boot 2013.04-rc2-00031-gfac150e (Apr 11 2013 - 11:24:25) CPU: Freescale i.MX28 rev1.2 at 454 MHz Here it hangs!!! :-( You are the m28 expert, so perhaps you might want to take a look? ;) Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: imx: Codingstyle enhancement of include/asm/arch-mx6/crm_regs.h
Add spaces before and after .
Please note that I intentionally didn't wrap the 80 lines for
the sake of better readability.
Signed-off-by: Stefan Roese s...@denx.de
---
arch/arm/include/asm/arch-mx6/crm_regs.h | 172 +++
1 file changed, 86 insertions(+), 86 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h
b/arch/arm/include/asm/arch-mx6/crm_regs.h
index cf5c694..87e0889 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -415,183 +415,183 @@ struct mxc_ccm_reg {
#define MXC_CCM_CCGR_CG_MASK 3
#define MXC_CCM_CCGR0_AIPS_TZ1_OFFSET 0
-#define MXC_CCM_CCGR0_AIPS_TZ1_MASK
(3MXC_CCM_CCGR0_AIPS_TZ1_OFFSET)
+#define MXC_CCM_CCGR0_AIPS_TZ1_MASK(3
MXC_CCM_CCGR0_AIPS_TZ1_OFFSET)
#define MXC_CCM_CCGR0_AIPS_TZ2_OFFSET 2
-#define MXC_CCM_CCGR0_AIPS_TZ2_MASK
(3MXC_CCM_CCGR0_AIPS_TZ2_OFFSET)
+#define MXC_CCM_CCGR0_AIPS_TZ2_MASK(3
MXC_CCM_CCGR0_AIPS_TZ2_OFFSET)
#define MXC_CCM_CCGR0_APBHDMA_OFFSET 4
-#define MXC_CCM_CCGR0_APBHDMA_MASK
(3MXC_CCM_CCGR0_APBHDMA_OFFSET)
+#define MXC_CCM_CCGR0_APBHDMA_MASK (3
MXC_CCM_CCGR0_APBHDMA_OFFSET)
#define MXC_CCM_CCGR0_ASRC_OFFSET 6
-#define MXC_CCM_CCGR0_ASRC_MASK
(3MXC_CCM_CCGR0_ASRC_OFFSET)
+#define MXC_CCM_CCGR0_ASRC_MASK(3
MXC_CCM_CCGR0_ASRC_OFFSET)
#define MXC_CCM_CCGR0_CAAM_SECURE_MEM_OFFSET 8
-#define MXC_CCM_CCGR0_CAAM_SECURE_MEM_MASK
(3MXC_CCM_CCGR0_CAAM_SECURE_MEM_OFFSET)
+#define MXC_CCM_CCGR0_CAAM_SECURE_MEM_MASK (3
MXC_CCM_CCGR0_CAAM_SECURE_MEM_OFFSET)
#define MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_OFFSET 10
-#define MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_MASK
(3MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_OFFSET)
+#define MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_MASK (3
MXC_CCM_CCGR0_CAAM_WRAPPER_ACLK_OFFSET)
#define MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_OFFSET 12
-#define MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_MASK
(3MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_OFFSET)
+#define MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_MASK(3
MXC_CCM_CCGR0_CAAM_WRAPPER_IPG_OFFSET)
#define MXC_CCM_CCGR0_CAN1_OFFSET 14
-#define MXC_CCM_CCGR0_CAN1_MASK
(3MXC_CCM_CCGR0_CAN1_OFFSET)
+#define MXC_CCM_CCGR0_CAN1_MASK(3
MXC_CCM_CCGR0_CAN1_OFFSET)
#define MXC_CCM_CCGR0_CAN1_SERIAL_OFFSET 16
-#define MXC_CCM_CCGR0_CAN1_SERIAL_MASK
(3MXC_CCM_CCGR0_CAN1_SERIAL_OFFSET)
+#define MXC_CCM_CCGR0_CAN1_SERIAL_MASK (3
MXC_CCM_CCGR0_CAN1_SERIAL_OFFSET)
#define MXC_CCM_CCGR0_CAN2_OFFSET 18
-#define MXC_CCM_CCGR0_CAN2_MASK
(3MXC_CCM_CCGR0_CAN2_OFFSET)
+#define MXC_CCM_CCGR0_CAN2_MASK(3
MXC_CCM_CCGR0_CAN2_OFFSET)
#define MXC_CCM_CCGR0_CAN2_SERIAL_OFFSET 20
-#define MXC_CCM_CCGR0_CAN2_SERIAL_MASK
(3MXC_CCM_CCGR0_CAN2_SERIAL_OFFSET)
+#define MXC_CCM_CCGR0_CAN2_SERIAL_MASK (3
MXC_CCM_CCGR0_CAN2_SERIAL_OFFSET)
#define MXC_CCM_CCGR0_CHEETAH_DBG_CLK_OFFSET 22
-#define MXC_CCM_CCGR0_CHEETAH_DBG_CLK_MASK
(3MXC_CCM_CCGR0_CHEETAH_DBG_CLK_OFFSET)
+#define MXC_CCM_CCGR0_CHEETAH_DBG_CLK_MASK (3
MXC_CCM_CCGR0_CHEETAH_DBG_CLK_OFFSET)
#define MXC_CCM_CCGR0_DCIC1_OFFSET 24
-#define MXC_CCM_CCGR0_DCIC1_MASK
(3MXC_CCM_CCGR0_DCIC1_OFFSET)
+#define MXC_CCM_CCGR0_DCIC1_MASK (3
MXC_CCM_CCGR0_DCIC1_OFFSET)
#define MXC_CCM_CCGR0_DCIC2_OFFSET 26
-#define MXC_CCM_CCGR0_DCIC2_MASK
(3MXC_CCM_CCGR0_DCIC2_OFFSET)
+#define MXC_CCM_CCGR0_DCIC2_MASK (3
MXC_CCM_CCGR0_DCIC2_OFFSET)
#define MXC_CCM_CCGR0_DTCP_OFFSET 28
-#define MXC_CCM_CCGR0_DTCP_MASK
(3MXC_CCM_CCGR0_DTCP_OFFSET)
+#define MXC_CCM_CCGR0_DTCP_MASK(3
MXC_CCM_CCGR0_DTCP_OFFSET)
#define MXC_CCM_CCGR1_ECSPI1S_OFFSET 0
-#define MXC_CCM_CCGR1_ECSPI1S_MASK
(3MXC_CCM_CCGR1_ECSPI1S_OFFSET)
+#define MXC_CCM_CCGR1_ECSPI1S_MASK (3
MXC_CCM_CCGR1_ECSPI1S_OFFSET)
#define MXC_CCM_CCGR1_ECSPI2S_OFFSET 2
-#define MXC_CCM_CCGR1_ECSPI2S_MASK
(3MXC_CCM_CCGR1_ECSPI2S_OFFSET)
+#define MXC_CCM_CCGR1_ECSPI2S_MASK (3
MXC_CCM_CCGR1_ECSPI2S_OFFSET)
#define MXC_CCM_CCGR1_ECSPI3S_OFFSET 4
-#define MXC_CCM_CCGR1_ECSPI3S_MASK
(3MXC_CCM_CCGR1_ECSPI3S_OFFSET)
+#define MXC_CCM_CCGR1_ECSPI3S_MASK
[U-Boot] [PATCH v3] blackfin: Move blackfin watchdog driver out of the blackfin arch folder.
From: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
Changes in v3:
- Make sure the write operations to watchdog timeout and enable MMRs are done
before executing other instructions.
Changes in v2:
- Disable hardware watchdog before changing the timeout MMR.
Changes in v1:
- Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined.
- Move blackfin hw watchdog driver to the generic driver folder.
- Call hw_watchdog_init() from blackfin board init code.
- Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS
- Update README.watchdog accordingly
arch/blackfin/cpu/Makefile |1 -
arch/blackfin/cpu/initcode.c |5 +++-
arch/blackfin/cpu/start.S | 26 +--
arch/blackfin/lib/board.c |4 +-
doc/README.watchdog|3 ++
drivers/watchdog/Makefile |1 +
.../cpu/watchdog.c = drivers/watchdog/bfin_wdt.c |7 -
include/configs/bfin_adi_common.h |6
include/watchdog.h |3 +-
9 files changed, 40 insertions(+), 16 deletions(-)
rename arch/blackfin/cpu/watchdog.c = drivers/watchdog/bfin_wdt.c (64%)
diff --git a/arch/blackfin/cpu/Makefile b/arch/blackfin/cpu/Makefile
index 0a72ec5..145f63e 100644
--- a/arch/blackfin/cpu/Makefile
+++ b/arch/blackfin/cpu/Makefile
@@ -25,7 +25,6 @@ COBJS-y += os_log.o
COBJS-y += reset.o
COBJS-y += serial.o
COBJS-y += traps.o
-COBJS-$(CONFIG_HW_WATCHDOG) += watchdog.o
SRCS := $(SEXTRA:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 8ef0b92..078209f 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -13,6 +13,7 @@
#include config.h
#include asm/blackfin.h
+#include asm/mach-common/bits/watchdog.h
#include asm/mach-common/bits/bootrom.h
#include asm/mach-common/bits/core.h
@@ -468,9 +469,11 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint
*divB, uint *vcoB)
bfin_write_SEC_GCTL(0x1);
bfin_write_SEC_CCTL(0x1);
#endif
+ bfin_write_WDOG_CTL(WDDIS);
+ SSYNC();
bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE));
#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART
- bfin_write_WDOG_CTL(0);
+ bfin_write_WDOG_CTL(WDEN);
#endif
serial_putc('f');
}
diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S
index 7155fc8..1c6ae35 100644
--- a/arch/blackfin/cpu/start.S
+++ b/arch/blackfin/cpu/start.S
@@ -32,6 +32,7 @@
#include config.h
#include asm/blackfin.h
+#include asm/mach-common/bits/watchdog.h
#include asm/mach-common/bits/core.h
#include asm/mach-common/bits/pll.h
@@ -65,20 +66,29 @@ ENTRY(_start)
p5.h = HI(COREMMR_BASE);
#ifdef CONFIG_HW_WATCHDOG
-#ifndef __ADSPBF60x__
-# ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
-# define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
-# endif
- /* Program the watchdog with an initial timeout of ~5 seconds.
+ /* Program the watchdog with default timeout of ~5 seconds.
* That should be long enough to bootstrap ourselves up and
* then the common u-boot code can take over.
*/
+ r1 = WDDIS;
+# ifdef __ADSPBF60x__
+ [p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# else
+ W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# endif
+ SSYNC;
r0 = 0;
- r0.h = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START));
+ r0.h = HI(MSEC_TO_SCLK(CONFIG_WATCHDOG_TIMEOUT_MSECS));
[p4 + (WDOG_CNT - SYSMMR_BASE)] = r0;
+ SSYNC;
+ r1 = WDEN;
/* fire up the watchdog - R0.L above needs to be 0x */
- W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
-#endif
+# ifdef __ADSPBF60x__
+ [p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# else
+ W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r1;
+# endif
+ SSYNC;
#endif
/* Turn on the serial for debugging the init process */
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index c1e14e2..99970e1 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -279,9 +279,9 @@ void board_init_f(ulong bootflag)
dcache_enable();
#endif
-#ifdef CONFIG_WATCHDOG
+#ifdef CONFIG_HW_WATCHDOG
serial_early_puts(Setting up external watchdog\n);
- watchdog_init();
+ hw_watchdog_init();
#endif
#ifdef DEBUG
diff --git a/doc/README.watchdog b/doc/README.watchdog
index ee65008..f2a9d26 100644
--- a/doc/README.watchdog
+++ b/doc/README.watchdog
@@ -27,3 +27,6 @@ CONFIG_IMX_WATCHDOG
Available for i.mx31/35/5x/6x to service the watchdog. This is not
automatically set because some boards (vision2) still need to define
their own hw_watchdog_reset
Re: [U-Boot] [PATCH v3] BUGFIX: arm: data abort in get_bad_stack_swi
Hello Albert
How about this patch?
(04/05/2013 07:12 PM), Tetsuyuki Kobayashi wrote:
When swi instruction is executed, it is expected to get message
software interrupt in console and dump registers and reboot, as
do_software_interrupt() in arch/arm/lib/interrupts.c.
But, actually it causes data abort accessing wrong address in
get_bad_stack_swi
macro in arch/arm/cpu/v7/start.S.
This patch fixes this problem.
The same mistake in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- added arch/arm/cpu/{arm1136,arm1176,pxa}/start.S
Changes for v3:
- restore lr register in all 4 files.
Only arm/arm/cpu/armv7/start.S is tested on KZM-A9-GT board.
arch/arm/cpu/arm1136/start.S |3 ++-
arch/arm/cpu/arm1176/start.S |4 +++-
arch/arm/cpu/armv7/start.S |3 ++-
arch/arm/cpu/pxa/start.S |3 ++-
4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index eba2324..bccfdbf 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -392,8 +392,9 @@ cpu_init_crit:
str r0, [r13] @ save R0's value.
ldr r0, IRQ_STACK_START_IN @ get data regions start
str lr, [r0]@ save caller lr in position 0
of saved stack
- mrs r0, spsr@ get the spsr
+ mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of
saved stack
+ ldr lr, [r0]@ restore lr
ldr r0, [r13] @ restore r0
add r13, r13, #4@ pop stack entry
.endm
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 3c291fb..694f79d 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -480,9 +480,11 @@ phy_last_jump:
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */
- mrs r0, spsr
+ mrs lr, spsr
/* save spsr in position 1 of saved stack */
str lr, [r0, #4]
+ /* restore lr */
+ ldr lr, [r0]
/* restore r0 */
ldr r0, [r13]
/* pop stack entry */
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 36a4c3c..e5e157b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -465,9 +465,10 @@ ENDPROC(cpu_init_crit)
@ spots for abort stack
str lr, [r0]@ save caller lr in position 0
@ of saved stack
- mrs r0, spsr@ get the spsr
+ mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of
@ saved stack
+ ldr lr, [r0]@ restore lr
ldr r0, [r13] @ restore r0
add r13, r13, #4@ pop stack entry
.endm
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 456a783..9c525e8 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -387,8 +387,9 @@ cpu_init_crit:
str r0, [r13] @ save R0's value.
ldr r0, IRQ_STACK_START_IN @ get data regions start
str lr, [r0]@ save caller lr in position 0
of saved stack
- mrs r0, spsr@ get the spsr
+ mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of
saved stack
+ ldr lr, [r0]@ restore lr
ldr r0, [r13] @ restore r0
add r13, r13, #4@ pop stack entry
.endm
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[U-Boot] [PATCH v1] blackfin: Add comments for watchdog event initialization.
From: Sonic Zhang sonic.zh...@analog.com
- Add comments for watchdog event initialization.
- Make sure the writting operation to MMRs are finished.
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
arch/blackfin/cpu/initcode.c | 12 ++--
1 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 5fc06e1..ffaf101 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -458,15 +458,23 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB,
uint *divB, uint *vcoB)
if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
serial_putc('e');
#ifdef __ADSPBF60x__
+ /* Reset system event controller */
bfin_write_SEC_GCTL(0x2);
+ bfin_write_SEC_CCTL(0x2);
SSYNC();
+
+ /* Enable fault event input and system reset action in fault
+* controller. Route watchdog timeout event to fault interface.
+*/
bfin_write_SEC_FCTL(0xc1);
+ /* Enable watchdog interrupt source */
bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
-
- bfin_write_SEC_CCTL(0x2);
SSYNC();
+
+ /* Enable system event controller */
bfin_write_SEC_GCTL(0x1);
bfin_write_SEC_CCTL(0x1);
+ SSYNC();
#endif
bfin_write_WDOG_CTL(WDDIS);
SSYNC();
--
1.7.0.4
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[U-Boot] Build failure on am335x_evm
On the current git master, I get the following build failure:- $ make am335x_evm common/libcommon.o: In function `do_fat_fsinfo': /home/mpfj/u-boot/u-boot/common/cmd_fat.c:87: undefined reference to `fat_set_blk_dev' /home/mpfj/u-boot/u-boot/common/cmd_fat.c:92: undefined reference to `file_fat_detectfs' drivers/mtd/nand/libnand.o: In function `nand_register': /home/mpfj/u-boot/u-boot/drivers/mtd/nand/nand.c:66: undefined reference to `add_mtd_device' fs/libfs.o:(.data+0x4): undefined reference to `fat_set_blk_dev' fs/libfs.o:(.data+0x8): undefined reference to `file_fat_ls' fs/libfs.o:(.data+0xc): undefined reference to `fat_read_file' fs/libfs.o:(.data+0x10): undefined reference to `fat_close' fs/libfs.o:(.data+0x18): undefined reference to `ext4fs_probe' fs/libfs.o:(.data+0x1c): undefined reference to `ext4fs_ls' fs/libfs.o:(.data+0x20): undefined reference to `ext4_read_file' fs/libfs.o:(.data+0x24): undefined reference to `ext4fs_close' arm-linux-ld.bfd: BFD (GNU Binutils) 2.23.1 assertion fail elf32-arm.c:7677 arm-linux-ld.bfd: BFD (GNU Binutils) 2.23.1 assertion fail elf32-arm.c:7677 arm-linux-ld.bfd: BFD (GNU Binutils) 2.23.1 assertion fail elf32-arm.c:7677 arm-linux-ld.bfd: error: required section '.rel.plt' not found in the linker script arm-linux-ld.bfd: final link failed: Invalid operation make[1]: *** [u-boot] Error 1 make[1]: Leaving directory `/home/mpfj/u-boot/u-boot' make: *** [am335x_evm] Error 2 Any ideas ? Cheers Mark JACKSON ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] OMAP5: USB: hsusbtll_clkctrl has to be in hw_auto for USB to work
USB TLL clocks do not support 'explicit_en', only 'hw_auto'
control (R. Sricharan). cm_l3init_hsusbtll_clkctrl has to be
moved to the clk_modules_hw_auto_essential[] array in order
to make the clock work.
This fix is needed (but not sufficient) for USB EHCI operation
in U-Boot.
Signed-off-by: Lubomir Popov lpo...@mm-sol.com
---
V3 updates commit comments only.
V2 fixes line wrap issue of the patch itself.
arch/arm/cpu/armv7/omap5/hw_data.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
b/arch/arm/cpu/armv7/omap5/hw_data.c
index ced274e..e5e41fd 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -403,6 +403,7 @@ void enable_basic_uboot_clocks(void)
};
u32 const clk_modules_hw_auto_essential[] = {
+ (*prcm)-cm_l3init_hsusbtll_clkctrl,
0
};
@@ -411,7 +412,6 @@ void enable_basic_uboot_clocks(void)
(*prcm)-cm_l4per_i2c2_clkctrl,
(*prcm)-cm_l4per_i2c3_clkctrl,
(*prcm)-cm_l4per_i2c4_clkctrl,
- (*prcm)-cm_l3init_hsusbtll_clkctrl,
(*prcm)-cm_l3init_hsusbhost_clkctrl,
(*prcm)-cm_l3init_fsusb_clkctrl,
0
--
1.7.9.5
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[U-Boot] [PATCH] tpm: add AUTH1 cmds for LoadKey2 and GetPubKey
This patch requires Che-Liang Chious TPM library patch to be applied first.
(published 2013-02-28 on ML as [PATCH v3] tpm: Add TPM command library)
Extend the tpm library with support for single authorized (AUTH1) commands
as specified in the TCG Main Specification 1.2. (The internally used helper
functions are implemented in a way that they could also be used for double
authorized commands if someone needs it.)
Provide enums with the return codes from the TCG Main specification.
For now only a single OIAP session is supported.
OIAP authorized version of the commands TPM_LoadKey2 and TPM_GetPubKey are
provided. Both features are available using the 'tpm' command, too.
Authorized commands are enabled with CONFIG_TPM_AUTH_SESSIONS. (Note that
this also requires CONFIG_SHA1 to be enabled.)
Signed-off-by: Reinhard Pfau p...@gdsys.de
---
README | 14 ++
common/cmd_tpm.c | 93 +++
include/tpm.h| 174 +++
lib/tpm.c| 348 +-
4 files changed, 628 insertions(+), 1 deletions(-)
diff --git a/README b/README
index 42544ce..b21c352 100644
--- a/README
+++ b/README
@@ -1199,6 +1199,20 @@ The following options need to be configured:
to. Contemporary x86 systems usually map it at
0xfed4.
+ CONFIG_CMD_TPM
+ Add tpm monitor functions.
+ Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
+ provides monitor access to authorized functions.
+
+ CONFIG_TPM
+ Define this to enable the TPM support library which provides
+ functional interfaces to some TPM commands.
+ Requires support for a TPM device.
+
+ CONFIG_TPM_AUTH_SESSIONS
+ Define this to enable authorized functions in the TPM library.
+ Requires CONFIG_TPM and CONFIG_SHA1.
+
- USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405, MPC5200); define
diff --git a/common/cmd_tpm.c b/common/cmd_tpm.c
index 46fae18..c8767a4 100644
--- a/common/cmd_tpm.c
+++ b/common/cmd_tpm.c
@@ -546,6 +546,72 @@ static int do_tpm_nv_write(cmd_tbl_t *cmdtp, int flag,
return convert_return_code(err);
}
+#ifdef CONFIG_TPM_AUTH_SESSIONS
+
+static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ uint32_t auth_handle, err;
+
+ err = tpm_oiap(auth_handle);
+
+ return convert_return_code(err);
+}
+
+static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ uint32_t parent_handle, key_len, key_handle, err;
+ uint8_t usage_auth[20];
+ void *key;
+
+ if (argc 5)
+ return CMD_RET_USAGE;
+
+ parent_handle = simple_strtoul(argv[1], NULL, 0);
+ key = (void *)simple_strtoul(argv[2], NULL, 0);
+ key_len = simple_strtoul(argv[3], NULL, 0);
+ if (strlen(argv[4]) != 40)
+ return CMD_RET_FAILURE;
+ parse_byte_string(argv[4], usage_auth, NULL);
+
+ err = tpm_load_key2_oiap(parent_handle, key, key_len, usage_auth,
+ key_handle);
+ if (!err)
+ printf(Key handle is 0x%x\n, key_handle);
+
+ return convert_return_code(err);
+}
+
+static int do_tpm_get_pub_key_oiap(cmd_tbl_t *cmdtp, int flag,
+ int argc, char * const argv[])
+{
+ uint32_t key_handle, err;
+ uint8_t usage_auth[20];
+ uint8_t pub_key_buffer[288];
+ size_t pub_key_len = sizeof(pub_key_buffer);
+
+ if (argc 3)
+ return CMD_RET_USAGE;
+
+ key_handle = simple_strtoul(argv[1], NULL, 0);
+ if (strlen(argv[2]) != 40)
+ return CMD_RET_FAILURE;
+ parse_byte_string(argv[2], usage_auth, NULL);
+
+ err = tpm_get_pub_key_oiap(key_handle, usage_auth,
+ pub_key_buffer, pub_key_len);
+ if (!err) {
+ printf(dump of received pub key structure:\n);
+ print_byte_string(pub_key_buffer, pub_key_len);
+ }
+ return convert_return_code(err);
+}
+
+TPM_COMMAND_NO_ARG(tpm_end_oiap)
+
+#endif /* CONFIG_TPM_AUTH_SESSIONS */
+
#define MAKE_TPM_CMD_ENTRY(cmd) \
U_BOOT_CMD_MKENT(cmd, 0, 1, do_tpm_ ## cmd, , )
@@ -590,6 +656,16 @@ static cmd_tbl_t tpm_commands[] = {
do_tpm_nv_read, , ),
U_BOOT_CMD_MKENT(nv_write, 0, 1,
do_tpm_nv_write, , ),
+#ifdef CONFIG_TPM_AUTH_SESSIONS
+ U_BOOT_CMD_MKENT(oiap, 0, 1,
+ do_tpm_oiap, , ),
+ U_BOOT_CMD_MKENT(end_oiap, 0, 1,
+ do_tpm_end_oiap, , ),
+ U_BOOT_CMD_MKENT(load_key2_oiap, 0, 1,
+ do_tpm_load_key2_oiap, , ),
+ U_BOOT_CMD_MKENT(get_pub_key_oiap, 0, 1,
+
[U-Boot] [PATCH] powerpc/85xx: Add TWR-P10xx board support
TWR-P1025 Specification:
---
Memory subsystem:
512MB DDR3 (on board DDR)
64Mbyte 16bit NOR flash
One microSD Card slot
Ethernet:
eTSEC1: Connected to Atheros AR8035 GETH PHY
eTSEC3: Connected to Atheros AR8035 GETH PHY
UART:
Two UARTs are routed to the FDTI dual USB to RS232 convertor
USB: Two USB2.0 Type A ports
I2C:
AT24C01B 1K Board EEPROM (8 bit address)
QUICC Engine:
Connected to DP83849i PHY supply two 10/100M ethernet ports
QE UART for RS485 or RS232
PCIE:
One mini-PCIE slot
Signed-off-by: Michael Johnston michael.johns...@freescale.com
Signed-off-by: Xie Xiaobo x@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h | 2 +
board/freescale/p1_twr/Makefile | 52 +++
board/freescale/p1_twr/ddr.c | 71
board/freescale/p1_twr/law.c | 32 ++
board/freescale/p1_twr/p1_twr.c | 333
board/freescale/p1_twr/tlb.c | 92 +
boards.cfg| 2 +
include/configs/p1_twr.h | 694 ++
8 files changed, 1278 insertions(+)
create mode 100644 board/freescale/p1_twr/Makefile
create mode 100644 board/freescale/p1_twr/ddr.c
create mode 100644 board/freescale/p1_twr/law.c
create mode 100644 board/freescale/p1_twr/p1_twr.c
create mode 100644 board/freescale/p1_twr/tlb.c
create mode 100644 include/configs/p1_twr.h
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index 296b549..1730827 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2164,6 +2164,8 @@ typedef struct ccsr_gur {
u32 porbmsr;/* POR boot mode status */
#define MPC85xx_PORBMSR_HA 0x0007
#define MPC85xx_PORBMSR_HA_SHIFT 16
+#define MPC85xx_PORBMSR_ROMLOC 0x0f00
+#define MPC85xx_PORBMSR_ROMLOC_SHIFT 24
u32 porimpscr; /* POR I/O impedance status control */
u32 pordevsr; /* POR I/O device status regsiter */
#if defined(CONFIG_P1017) || defined(CONFIG_P1023)
diff --git a/board/freescale/p1_twr/Makefile b/board/freescale/p1_twr/Makefile
new file mode 100644
index 000..8056af8
--- /dev/null
+++ b/board/freescale/p1_twr/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright 2010-2011 Freescale Semiconductor, Inc.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y+= $(BOARD).o
+COBJS-y+= ddr.o
+COBJS-y+= law.o
+COBJS-y+= tlb.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(OBJS) $(SOBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/freescale/p1_twr/ddr.c b/board/freescale/p1_twr/ddr.c
new file mode 100644
index 000..b67ec1b
--- /dev/null
+++ b/board/freescale/p1_twr/ddr.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ */
+
+#include common.h
+#include asm/mmu.h
+#include asm/immap_85xx.h
+#include asm/processor.h
+#include asm/fsl_ddr_sdram.h
+#include asm/fsl_ddr_dimm_params.h
+#include asm/io.h
+#include asm/fsl_law.h
+
+/* Fixed sdram init -- doesn't use serial presence detect. */
+phys_size_t fixed_sdram(void)
+{
+ sys_info_t sysinfo;
+ char buf[32];
+ size_t ddr_size;
+ fsl_ddr_cfg_regs_t ddr_cfg_regs = {
+ .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
+ .cs[0].config = CONFIG_SYS_DDR_CS0_CONFIG,
+ .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
+#if CONFIG_CHIP_SELECTS_PER_CTRL 1
+
Re: [U-Boot] [v3] command/cache: Add flush command
Dear Scott, In message 1365634846.8381.24@snotra you wrote: Do you have any real technical arguments? I'm done arguing and have already recommended we just keep this patch in our local tree. We do not have unlimited time to spend messing around with other arch code to produce a result that wouldn't be better in any meaningful way. If someone else wants to hack up flush_cache(), they're welcome to. Let me try to summarize the situation: - You want to add a user command that implements some cache operations for a range of addresses. The needed operations are 1) flushing the data cache; and 2) invalidating the instruction cache. - U-Boot currently provides a common, architecture-independent C API that implements this functionality: void flush_cache(ulong start_addr, ulong size) All architectures provide such a function, but implementation differs: some provide functions like void flush_dcache_range(unsigned long addr, unsigned long end) void invalidate_icache_range(unsigned long addr, unsigned long end) while others (like SPARC) always flush the whole cache, and even other implement only parts like data cache flushing (like sh4) or just an empty dummy function (like sh2). - The cheapest way (in terms of efforts) to provide the requested command line API would be to add a new command that maps to the existing flush_cache() function. - However, we already have a command line API that deals with cache operations: the commands icache and dcache. - The existing command line API could be extended like this: dcache flush addr size = flush_dcache_range(addr, addr+size) icache invalidate addr size = invalidate_icache_range(addr, addr+size) [Additional functionality, like flushing/invalidating the whole caches if arguments are omitted, are straightforward to add.] - This implementation requires more effort, since all architectures need to be touched (and then tested), and some of the architecture specific code needs a closer look. Also. this approach is less convenient to the user who now needs to run two commands instead of one. - Do you agree to this summary, or am I missing important points or is anything wrong? Cache handling has always been a much neglected area in U-Boot. There has never been an attempt to provide a common, generic API (neither in C nor on the command line) for it. Instead, cache support has always been added only where needed, i. e. when some cache related bug popped up. You can see the result of this by just comparing the implemen- tations of flush_cache() for the different architectures: basically evera architecture invented her approach and interfaces. This is an area where the code is not exactly in perfect shape - any work to unify this wuld be more than welcome. When we are now discussing to provide a command line API to more cache related functions we should not make the same mistakes again. That means that we should not just take existing code and use it just because it is existing (and thus convenient to use), but we should spend a thought or two to come up with a simple yet powerful (and backward compatible) command line API that can be used across all currently known architectures. This is why I resist to the cheap and easy way of just adding somthing like a flush_cache command. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Love is an ideal thing, marriage a real thing; a confusion of the real with the ideal never goes unpunished. - Goethe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, v6, 4/9] nand: Extend nand_(read|write)_skip_bad with *actual and limit parameters
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 04/11/2013 02:37 AM, Igor Grinberg wrote: On 04/10/13 16:08, Tom Rini wrote: On Thu, Mar 14, 2013 at 05:32:50AM -, Tom Rini wrote: We make these two functions take a size_t pointer to how much space was used on NAND to read or write the buffer (when reads/writes happen) so that bad blocks can be accounted for. We also make them take an loff_t limit on how much data can be read or written. This means that we can now catch the case of when writing to a partition would exceed the partition size due to bad blocks. To do this we also need to make check_skip_len count not just complete blocks used but partial ones as well. All callers of nand_(read|write)_skip_bad are adjusted to call these with the most sensible limits available. The changes were started by Pantelis and finished by Tom. Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com Signed-off-by: Tom Rini tr...@ti.com With current master, the following changes are needed to adapt cm_t35 to these call changes: I guess, you will squash both patches into one, right? Yes, Marek already squashed this in as part of his pull request that I need to switch hats and grab. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRZqeDAAoJENk4IS6UOR1WLuIP/RWThgn2nc7xMuMA2soKHQQQ rSrF/wAAvVNRV3g0g6qQ7VZ/+IkH8C+cjPhpD/VUVbeodx+0b24kiW1Zfxcpblmw G5cgIMDtAT9prs7upcktjzUwnU/JuZDx0HAfIeA7kWu/hpm2xhe7p3JIID47/sr1 k5Cw+8X+pKYVCt4px68TWhy+gEdKgfvK5rXKVpB4RCLVjTC9hyfmdySo7h6n1M+t JhmuoHRbDmQsB/qVcauZypirO5AidrRU+baak83XBqgQnwTAPy/i6jDOegHYlaou 9rVzpyOpCUDXNEqDNrU9lOslFpSf0NfpRsAsWsvu35AbcA7yMnRR2kNXeOr2Djur sUvWpaLpWYpvhT16GGvk8xyoj6eaA3G+LycBFdTcRZPsdeIfs4/lnjRn0Nreq1jQ CST9w6HyMzBEUhwV4BarPmR4nk1tRwbmX6hfkRbH4iENhG63PYRuX5A18uC8O8uS wCOZo71a2GvOHFvDSNd2Qkscs3A1QC+6jcm9FBbvydzU4NXo9yIFt+QlsWjenhwv MWHsFZX5tBP4U2N/mkkRoaJfrpTW137RqPvxwsqB96JObeafdw0SNGGlks6N7X1Z /83jyM2iEy7icg8e3g+cVTtrJUwAifyZI6wjBGiEV4rxtthLyxNBhm0nerJcXvX+ B8AiXe67JK9wju7t7fRt =ACw6 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] freescale i.MX28 mxsboot NAND booting on mx28evk bad blocks
I don't think the image u-boot mxsboot generates includes any OOB
data. For me, it made an image which is *exactly* 24 blocks of 128
kiB each. If the FCB blocks had OOB data then there would need to
be some multiple of 64 OBB bytes in the image (16 kiB I would think).
I think maybe this is the problem. The update_nand_full script
calls nand write.raw ${loadaddr} 0x0 ${fcb_sz} and write.raw
expects loadaddr to contain $fcb_sz pages of (2048 + 64) bytes each.
I'm not sure what you mean. According to u-boot:
Device 0: nand0, sector size 128 KiB
Page size 2048 b
OOB size 64 b
The page size is 2048 bytes, with 64 bytes of oob data, for a total of
2112 bytes.
When I burn the first part of the image with u-boot:
MX28EVK U-Boot nand write.raw ${loadaddr} 0x0 ${fcb_sz}
NAND write: 540672 bytes written: OK
I'm talking about the image file as generated by mxsimage. If I hex dump
that, it's clearly written entirely with 2048 byte pages. If you hexdump
your image are the FCB blocks exactly 128k apart? Or are they 64 * 2112 =
132k apart? It should be the latter, as 132k * 4 = 540672 bytes.
If you look at the mxsboot source code:
for (i = 0; i STRIDE_PAGES * STRIDE_COUNT; i += STRIDE_PAGES) {
offset = i * nand_writesize;
memcpy(buf + offset, fcbblock, nand_writesize + nand_oobsize);
}
It appears to be writing the FCB including oob data.
Looks wrong to me! Notice that offset is equal to i * nand_writesize, not
i * (nand_writesize + nand_oobsize). I think this only produce a bootable
image because:
The FCB data is only 1036 bytes in size. The remaining 1012 bytes of data
and 64 oob bytes in the page aren't used. And the 63 pages after the first
aren't used either. So they can be full of garbage and it doesn't matter.
The image mxsboot creates is ok for the first 1036 bytes. Everything
after that is wrong, but it doesn't matter.
There are four copies of the FCB blocks. The ROM bootloader looks for the
first valid one and uses it. The first one is ok in the mxsboot image.
All the rest are corrupted since they are written in the wrong location.
But since the first one was ok the bootloader never even looks at the bad
ones. Unless the NAND page goes bad, then the whole point of having
redundant copies will be defeated.
Now, look at the mx28_nand_fcb_block() that generates the FCB block. It
calls memset() to fill the entire 2112 bytes with ZERO. The mx28_nand_fcb
struct is 512 bytes, so the copy to copy the fcb struct to the buffer at
offset 12, and then the code to write the fcb ecc at offset 512+12 only
writes the first 1036 bytes. The remaining bytes, including the OOB, will
all be zero. And a ZERO byte in the first OOB byte makes the NAND block as
bad. So that's why burning the mxsboot generated image with nand write.raw
makes the blocks bad. Using kobs-ng doesn't write the OOB data and erase
any bad block markers, which is better. I guess this is not just a bug in
mxsboot, but also a deficiency in u-boot's nand support. It allows one to
write 2048 bytes in ECC mode or 2112 bytes in raw mode. What one should
actually do to flash these blocks is write 2048 bytes in raw mode.
This is why writing with nandwrite doesn't work. The ROM bootloader
expects the FCB blocks, which contain the BCH parameters, to be in
raw mode and apparently expects the rest to be in BCH mode.
Unless I am misunderstanding the u-boot instructions, the FCB blocks are
written in raw mode:
It's not the flashing that is in the wrong mode, but the image mxsboot
generates that is wrong.
There are no explicit instructions for nandwrite in u-boot, I simply
split the mxsboot NAND image into two pieces to match the pieces that
u-boot wrote:
dd if=test.nand bs=2112 count=256 of=test-head.nand
dd if=test.nand bs=1 skip=524288 of=test-tail.nand
And then wrote the first piece with nandwrite -oob at offset 0 and the
second with regular nandwrite at offset 0x8. This worked exactly the
same as using u-boot, including the four blocks being marked as bad by
Linux.
If the four blocks were already marked as bad, then nandwrite will not
write them. So maybe you only have a working image because it was already
working and wasn't modified? Can you erase flash in u-boot, verify that
nand does not boot, and the make a working nand using just nandwrite --oob?
I think you will also need to use the option --noecc to write in raw mode.
U-boot appears to write the OOB data (with all zeros), causing the
pages to become marked as bad.
If you look at the mxsboot source code, they appear to be trying to
calculate the ecc and generate the oob data, but maybe they are doing it
wrong?
Look closer, they don't. The ECC they generate is just the 512 bytes of
ecc data for the 512 bytes of FCB data. This is a special ecc just used
for the FCBs. Nothing will actually write past the 1036th byte of the
block and so it will still be all zero past that including
Re: [U-Boot] [PATCH v2 8/8] ARM: Present a menu of bootable options on boot
On 04/10/2013 06:43 PM, Rob Herring wrote: On Wed, Apr 10, 2013 at 8:12 AM, Suriyan Ramasami suriya...@gmail.com wrote: Initialize usb and ide. Scan through the usb for storage and boot capable partitions. Scan through the ide interface for boot capable partitions. Present such bootable options to the user to choose to boot from If the user does not choose any choose the default option the default option is the option chosen by the user the last time If no such default option exists, boot from the first possible bootable option. This all sounds very generic but... Signed-off-by: Suriyan Ramasami suriya...@gmail.com --- Changes in v2: - Coding style changes board/Seagate/goflexhome/goflexhomemenu.c | 415 + but this is not a generic location. This feature would interest me and probably Stephen as well. I was thinking along these lines as well for the treo 680. Suriyan, perhaps we can collaborate, with the guidance of the maintainers here. Mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Build failure on am335x_evm
On Thu, Apr 11, 2013 at 10:58:19AM +0100, Mark Jackson wrote: On the current git master, I get the following build failure:- $ make am335x_evm common/libcommon.o: In function `do_fat_fsinfo': /home/mpfj/u-boot/u-boot/common/cmd_fat.c:87: undefined reference to `fat_set_blk_dev' /home/mpfj/u-boot/u-boot/common/cmd_fat.c:92: undefined reference to `file_fat_detectfs' drivers/mtd/nand/libnand.o: In function `nand_register': /home/mpfj/u-boot/u-boot/drivers/mtd/nand/nand.c:66: undefined reference to `add_mtd_device' fs/libfs.o:(.data+0x4): undefined reference to `fat_set_blk_dev' fs/libfs.o:(.data+0x8): undefined reference to `file_fat_ls' fs/libfs.o:(.data+0xc): undefined reference to `fat_read_file' fs/libfs.o:(.data+0x10): undefined reference to `fat_close' fs/libfs.o:(.data+0x18): undefined reference to `ext4fs_probe' fs/libfs.o:(.data+0x1c): undefined reference to `ext4fs_ls' fs/libfs.o:(.data+0x20): undefined reference to `ext4_read_file' fs/libfs.o:(.data+0x24): undefined reference to `ext4fs_close' arm-linux-ld.bfd: BFD (GNU Binutils) 2.23.1 assertion fail elf32-arm.c:7677 arm-linux-ld.bfd: BFD (GNU Binutils) 2.23.1 assertion fail elf32-arm.c:7677 arm-linux-ld.bfd: BFD (GNU Binutils) 2.23.1 assertion fail elf32-arm.c:7677 arm-linux-ld.bfd: error: required section '.rel.plt' not found in the linker script arm-linux-ld.bfd: final link failed: Invalid operation make[1]: *** [u-boot] Error 1 make[1]: Leaving directory `/home/mpfj/u-boot/u-boot' make: *** [am335x_evm] Error 2 What rev are you on? 98f9200 should have fixed this issue. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Build failure on am335x_evm
On 11/04/13 14:13, Tom Rini wrote: On Thu, Apr 11, 2013 at 10:58:19AM +0100, Mark Jackson wrote: On the current git master, I get the following build failure:- snip What rev are you on? 98f9200 should have fixed this issue. Fixed ... I needed to do a make distclean when I switched compiling from one board to another. Cheers Mark J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
Hi Stephen, On Wed, 10 Apr 2013 17:09:45 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/10/2013 04:50 PM, Albert ARIBAUD wrote: On Wed, 10 Apr 2013 16:21:54 -0600, Stephen Warren wrote: On 04/09/2013 05:14 PM, Albert ARIBAUD wrote: ... This still seems to have separate defines for SPL text/data/rodata size and BSS size. If I want instead to limit the total text/data/rodata/bss size, but place no specific limit on the bss size individually, can I not do that? This would defeat the purpose of giving CONFIG_SPL_MAX_SIZE a constant meaning -- one of the issues which prompted this patch series is that in ARM sometime CONFIG_SPL_MAX_SIZE meant BSS included, and sometime excluded, and this inconsistency had to be resolved. As in the rest of U-boot, CONFIG_SPL_MAX_SIZE was meant BSS excluded, this is the semantics that was decided. What we could do, though, is subdivide testing based on the existence or non-existence of CONFIG_SPL_BSS_START_ADDR: - if CONFIG_SPL_BSS_START_ADDR exists, then we assume SPL image and BSS are disjoint and we test each one against its max size, as this patch series does; - if CONFIG_SPL_BSS_START_ADDR does not exist, then we assume SPL image and BSS are contiguous and we test the whole of SPL against the sum of CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE. Why not either: a) define CONFIG_SPL_MAX_SIZE to include the BSS size if CONFIG_SPL_BSS_START_ADDR is not set, but exclude it if it is. That was in my original proposals, and it was spoken against: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158073 http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158094 or: b) use 3 defines instead of 2, so that CONFIG_SPL_MAX_SIZE (if defined) always limits text+rodata+data, CONFIG_SPL_MAX_FOOTPRINT (if defined) always limits text+rodata+data+bss, and CONFIG_SPL_BSS_MAX_SIZE (if defined) always limits bss size. Tegra would define only CONFIG_SPL_MAX_FOOTPRINT in this scheme. Other boards would presumably define other combinations of those. That is a possibility, with the minor nitpick that we could possibly end up having conflicting values for the three symbols, whereas with the CONFIG_SPL_BSS_START_ADDR solution, there can be no value conflict. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
Hi Stephen, On Wed, 10 Apr 2013 17:16:49 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/10/2013 05:09 PM, Albert ARIBAUD wrote: On Thu, 11 Apr 2013 00:50:01 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: What we could do, though, is subdivide testing based on the existence or non-existence of CONFIG_SPL_BSS_START_ADDR: - if CONFIG_SPL_BSS_START_ADDR exists, then we assume SPL image and BSS are disjoint and we test each one against its max size, as this patch series does; - if CONFIG_SPL_BSS_START_ADDR does not exist, then we assume SPL image and BSS are contiguous and we test the whole of SPL against the sum of CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE. I guess this will be considered useless complication -- after all, once you have artificially partitioned your SPL space into image+BSS -- and you know from the build command how much should be allotted to each of them -- the worst that can happen is that a later build fails with an explicit error message forcing you to look at current image and BSS size and adjust one or both of the max values accordingly. P.S. In any case, the proposal above will go in, if at all, as a separate patch; the current patch series is going in right now as it is. I wonder what the point of code-review is if you're just going to ignore it. Can we please avoid this kind of talk? It has no argumentative value and can only lead to conflicts. Your account below is sufficient to convey your argumentation without any of the potential ill-effects of the above. What's really odd here is that by my reading of the relevant threads, TomR already pointed out this exact issue earlier on, and you had agreed that you'd resolve it in a way that didn't have this issue, yet the patch has this issue??? Then our reading of the thread do not agree. Here is mine: - in http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158046, Tom clearly asks for separate text+data+rodata size on one hand and BSS size on the other hand (his #2 case, which he wants applied uniformally and a solution found for Tegra. - in http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158073 I replied to Tom with a proposal in two parts, the first implementing his #2 case strictly, the second implementing case #1 at the cost of some minor added complexity and of muddying the symbol's semantics; I suggested that if Tom really did not want the second part of my proposal, it could be dropped and only the first part implemented. - in http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158094, Tom asked that I keep part 1 and drop part 2 -- which I did. Additionally, I did ask Tom on IRC if V2 was ok with him, and had his agreement. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] omap5_common: Add optargs variable for kernel command line args
Add 'optargs' variable to be set to additional kernel arguments, similar
to omap3*/am3* usage.
Cc: Sricharan R r.sricha...@ti.com
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/omap5_common.h |2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index 2751627..5384a55 100644
--- a/include/configs/omap5_common.h
+++ b/include/configs/omap5_common.h
@@ -150,10 +150,12 @@
usbtty=cdc_acm\0 \
vram=16M\0 \
partitions= PARTS_DEFAULT \0 \
+ optargs=\0 \
mmcdev=0\0 \
mmcroot=/dev/mmcblk0p2 rw\0 \
mmcrootfstype=ext3 rootwait\0 \
mmcargs=setenv bootargs console=${console} \
+ ${optargs} \
vram=${vram} \
root=${mmcroot} \
rootfstype=${mmcrootfstype}\0 \
--
1.7.9.5
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[U-Boot] [ARM] Rollback *again* -- 5 patches
Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts (HIDDEN not known by most binutils 2.22 or older ones) aad17a2 ARM: fix CONFIG_SPL_MAX_SIZE semantics 72c1601 smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics 55e46fc da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics 0502854 cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics (PPC builds fail because --pad-to receives an expr, not a constant) Prafulla (and any other impacted ARM tree custodians), be sure to rebase as necessary. Stephen, that is an occasion to add your proposal to aad17a2. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts
On Fri, 5 Apr 2013 00:13:53 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Commit 3ebd1cbc introduced compiler-generated __bss_start
and __bss_end__ and commit c23561e7 rewrote all __bss_end__
as __bss_end. Their merge caused silent and harmless but
potentially bug-inducing clashes between compiler- and linker-
enerated __bss_end symbols.
Make __bss_end and __bss_start compiler-only, and create
__bss_base and __bss_limit for linker-only use.
Reported-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
arch/arm/cpu/ixp/u-boot.lds| 14 ++
arch/arm/cpu/u-boot.lds| 14 ++
board/actux1/u-boot.lds| 14 ++
board/actux2/u-boot.lds| 14 ++
board/actux3/u-boot.lds| 14 ++
board/dvlhost/u-boot.lds | 14 ++
board/freescale/mx31ads/u-boot.lds | 14 ++
7 files changed, 70 insertions(+), 28 deletions(-)
diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds
index 8345b55..c999829 100644
--- a/arch/arm/cpu/ixp/u-boot.lds
+++ b/arch/arm/cpu/ixp/u-boot.lds
@@ -67,17 +67,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ HIDDEN(__bss_base = .);
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
- __bss_end = .;
+ HIDDEN(__bss_limit = .);
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 3a1083d..0543b06 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -81,18 +81,24 @@ SECTIONS
*(.mmutable)
}
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ HIDDEN(__bss_base = .);
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
- __bss_end = .;
+ HIDDEN(__bss_limit = .);
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds
index c76728a..7e5c4d8 100644
--- a/board/actux1/u-boot.lds
+++ b/board/actux1/u-boot.lds
@@ -74,17 +74,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ HIDDEN(__bss_base = .);
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
- __bss_end = .;
+ HIDDEN(__bss_limit = .);
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds
index 984f70e..ce1b7c9 100644
--- a/board/actux2/u-boot.lds
+++ b/board/actux2/u-boot.lds
@@ -74,17 +74,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ HIDDEN(__bss_base = .);
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
- __bss_end = .;
+ HIDDEN(__bss_limit = .);
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
index fc48cf0..3e091dd 100644
--- a/board/actux3/u-boot.lds
+++ b/board/actux3/u-boot.lds
@@ -74,17 +74,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated
[U-Boot] [PATCH V2] ARM: Fix __bss_start and __bss_end in linker scripts
Commit 3ebd1cbc introduced compiler-generated __bss_start
and __bss_end__ and commit c23561e7 rewrote all __bss_end__
as __bss_end. Their merge caused silent and harmless but
potentially bug-inducing clashes between compiler- and linker-
enerated __bss_end symbols.
Make __bss_end and __bss_start compiler-only, and create
__bss_base and __bss_limit for linker-only use.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
Reported-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v2:
- remove HIDDEN(), not supported by binutils 2.23
arch/arm/cpu/ixp/u-boot.lds| 14 ++
arch/arm/cpu/u-boot.lds| 14 ++
board/actux1/u-boot.lds| 14 ++
board/actux2/u-boot.lds| 14 ++
board/actux3/u-boot.lds| 14 ++
board/dvlhost/u-boot.lds | 14 ++
board/freescale/mx31ads/u-boot.lds | 14 ++
7 files changed, 70 insertions(+), 28 deletions(-)
diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds
index 388a67f..553589c 100644
--- a/arch/arm/cpu/ixp/u-boot.lds
+++ b/arch/arm/cpu/ixp/u-boot.lds
@@ -69,17 +69,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ __bss_base = .;
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
-__bss_end = .;
+__bss_limit = .;
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 3a1083d..d5e42d3a 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -81,18 +81,24 @@ SECTIONS
*(.mmutable)
}
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ __bss_base = .;
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
-__bss_end = .;
+__bss_limit = .;
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds
index 52fc9fc..ef4a25b 100644
--- a/board/actux1/u-boot.lds
+++ b/board/actux1/u-boot.lds
@@ -77,17 +77,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ __bss_base = .;
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
-__bss_end = .;
+__bss_limit = .;
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds
index cafd3d8..00ad8b7 100644
--- a/board/actux2/u-boot.lds
+++ b/board/actux2/u-boot.lds
@@ -77,17 +77,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
+ __bss_base = .;
}
- .bss __bss_start (OVERLAY) : {
+ .bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
-__bss_end = .;
+__bss_limit = .;
}
- .bss_end __bss_end (OVERLAY) : {
- KEEP(*(__bss_end));
+ .bss_end __bss_limit (OVERLAY) : {
+ KEEP(*(.__bss_end));
}
/DISCARD/ : { *(.dynstr*) }
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
index 168fe17..44b990e 100644
--- a/board/actux3/u-boot.lds
+++ b/board/actux3/u-boot.lds
@@ -77,17 +77,23 @@ SECTIONS
_end = .;
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for
Re: [U-Boot] [PATCH] imx: Add titanium board support (i.MX6 based)
Hi Stefan,
On Wed, Apr 10, 2013 at 4:17 AM, Stefan Roese s...@denx.de wrote:
+u32 get_board_rev(void)
+{
+ return get_cpu_rev();
+}
You can drop this, since I recently sent a patch that places it on a
common location.
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE(1u * 512 * 1024 * 1024)
When I initially submitted the Wandboard support patch, Wolfgang
commented that this '1u' is not really needed, and then I used
SZ_512M, which provides better readability. Maybe you can do the same
here?
Regards,
Fabio Estevam
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Re: [U-Boot] [ARM] Rollback *again* -- 5 patches
On 04/11/2013 09:25 AM, Albert ARIBAUD wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts ... Stephen, that is an occasion to add your proposal to aad17a2. Tom Warren as the Tegra maintainer should be taking care of this. I am simply pointing out that the currently proposed changes to the SPL size checking don't fulfil the requirements for Tegra. I don't expect to have to fix the patches. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
On Thu, Apr 11, 2013 at 04:32:53PM +0200, Albert ARIBAUD wrote: Hi Stephen, On Wed, 10 Apr 2013 17:16:49 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/10/2013 05:09 PM, Albert ARIBAUD wrote: On Thu, 11 Apr 2013 00:50:01 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: What we could do, though, is subdivide testing based on the existence or non-existence of CONFIG_SPL_BSS_START_ADDR: - if CONFIG_SPL_BSS_START_ADDR exists, then we assume SPL image and BSS are disjoint and we test each one against its max size, as this patch series does; - if CONFIG_SPL_BSS_START_ADDR does not exist, then we assume SPL image and BSS are contiguous and we test the whole of SPL against the sum of CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE. I guess this will be considered useless complication -- after all, once you have artificially partitioned your SPL space into image+BSS -- and you know from the build command how much should be allotted to each of them -- the worst that can happen is that a later build fails with an explicit error message forcing you to look at current image and BSS size and adjust one or both of the max values accordingly. P.S. In any case, the proposal above will go in, if at all, as a separate patch; the current patch series is going in right now as it is. I wonder what the point of code-review is if you're just going to ignore it. Can we please avoid this kind of talk? It has no argumentative value and can only lead to conflicts. Your account below is sufficient to convey your argumentation without any of the potential ill-effects of the above. What's really odd here is that by my reading of the relevant threads, TomR already pointed out this exact issue earlier on, and you had agreed that you'd resolve it in a way that didn't have this issue, yet the patch has this issue??? Then our reading of the thread do not agree. Here is mine: - in http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158046, Tom clearly asks for separate text+data+rodata size on one hand and BSS size on the other hand (his #2 case, which he wants applied uniformally and a solution found for Tegra. - in http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158073 I replied to Tom with a proposal in two parts, the first implementing his #2 case strictly, the second implementing case #1 at the cost of some minor added complexity and of muddying the symbol's semantics; I suggested that if Tom really did not want the second part of my proposal, it could be dropped and only the first part implemented. - in http://article.gmane.org/gmane.comp.boot-loaders.u-boot/158094, Tom asked that I keep part 1 and drop part 2 -- which I did. Additionally, I did ask Tom on IRC if V2 was ok with him, and had his agreement. To be clear, I think the fake partitioning scheme we use when the case is we care about text/data/rodata/bss fitting in $X is not optimal, but it covers all of the cases without adding more complexity / another way to achieve the same ends. If it turns out that platforms end up needing to re-tweak this value we can come back and say it's time to add a different mechanism for this hard-limit case. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
On 04/11/2013 10:08 AM, Tom Rini wrote: ... To be clear, I think the fake partitioning scheme we use when the case is we care about text/data/rodata/bss fitting in $X is not optimal, but it covers all of the cases without adding more complexity / another way to achieve the same ends. But it does add more complexity; somebody has to pick, and potentially keep adjusting, the split between text/rodata/data and bss, even though they don't care about that split, but it's an implementation wart. It's also trivial to fix it properly as I described. But, if it absolutely has to be that way, then OK. However, I would ask that at least the Tegra board configuration files be set up so that the previous overall restriction (bss doesn't overlap the main U-Boot) be left in tact, so we don't have to debug that problem again. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM] Rollback *again* -- 5 patches PLUS 31 patches...
Hi Albert, On Thu, 11 Apr 2013 17:25:34 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts (HIDDEN not known by most binutils 2.22 or older ones) aad17a2 ARM: fix CONFIG_SPL_MAX_SIZE semantics 72c1601 smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics 55e46fc da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics 0502854 cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics (PPC builds fail because --pad-to receives an expr, not a constant) Actually, the failure was not due to this series, but to patch 16/30 of Benoît's series. In agreement with Tom, rolling further back, removing the recent TI PR merge and all of Benoît's series. Benoît, can you fix 16/30 wrt PPC building? If you provide branches, I or Tom can do tests. Once v12 is ready, I'll apply it back, then the TI PR, then the __bss_end patch, then the SPL max size series, this one list in order to give us time to choose how overall SPL text+data+rodata+BSS size testing should be done. This still stands: Prafulla (and any other impacted ARM tree custodians), be sure to rebase as necessary. Stephen, that is an occasion to add your proposal to aad17a2. Amicalement, Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM] Rollback *again* -- 5 patches
Hi Stephen, On Thu, 11 Apr 2013 09:49:45 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/11/2013 09:25 AM, Albert ARIBAUD wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts ... Stephen, that is an occasion to add your proposal to aad17a2. Tom Warren as the Tegra maintainer should be taking care of this. I am simply pointing out that the currently proposed changes to the SPL size checking don't fulfil the requirements for Tegra. I don't expect to have to fix the patches. I did not mean for you to do it, only that there was an opportunity to do it. :) Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: Add titanium board support (i.MX6 based)
Hi Fabio,
On 11.04.2013 17:48, Fabio Estevam wrote:
+u32 get_board_rev(void)
+{
+ return get_cpu_rev();
+}
You can drop this, since I recently sent a patch that places it on a
common location.
Hmmm, removing this function results in this error:
$ ./MAKEALL titanium
Configuring for titanium - Board: titanium, Options:
IMX_CONFIG=board/freescale/titanium/imximage.cfg
make: *** [u-boot] Error 139
arm-linux-gnueabi-size: ./u-boot: File format not recognized
arch/arm/lib/libarm.o: In function `setup_revision_tag':
/home/stefan/git/u-boot/u-boot/arch/arm/lib/bootm.c:215: undefined reference to
`get_board_rev'
...
So your patch is not in mainline yet? Is it in the ARM
custodian repo? Then the pending ARM PR will solve this.
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE(1u * 512 * 1024 * 1024)
When I initially submitted the Wandboard support patch, Wolfgang
commented that this '1u' is not really needed, and then I used
SZ_512M, which provides better readability. Maybe you can do the same
here?
I have no strong feelings here, but with Wolfgang preference of the
notation, I'll change to this:
#define PHYS_SDRAM_SIZE (512 20)
I find this also quite easy to read: x 10 is x KiB and
y 20 is y MiB. Nothing obscured via some defines.
Best regards,
Stefan
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Re: [U-Boot] [ARM] Rollback *again* -- 5 patches PLUS 31 patches...
Hi Albert, On Thursday, April 11, 2013 6:30:58 PM, Albert ARIBAUD wrote: Hi Albert, On Thu, 11 Apr 2013 17:25:34 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts (HIDDEN not known by most binutils 2.22 or older ones) aad17a2 ARM: fix CONFIG_SPL_MAX_SIZE semantics 72c1601 smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics 55e46fc da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics 0502854 cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics (PPC builds fail because --pad-to receives an expr, not a constant) Actually, the failure was not due to this series, but to patch 16/30 of Benoît's series. In agreement with Tom, rolling further back, removing the recent TI PR merge and all of Benoît's series. Benoît, can you fix 16/30 wrt PPC building? If you provide branches, I or Tom can do tests. Once v12 is ready, I'll apply it back, then the TI PR, then the __bss_end patch, then the SPL max size series, this one list in order to give us time to choose how overall SPL text+data+rodata+BSS size testing should be done. OK, I'll do that. I need to know: - which board fails, - where to find the toolchain binaries ready to use for PPC (Ubuntu package?), - if all other arches have been build-tested in order to avoid new issues popping out later. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM] Rollback *again* -- 5 patches PLUS 31 patches...
Hi Benoît, On Thu, 11 Apr 2013 18:33:35 +0200 (CEST), Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: Hi Albert, On Thursday, April 11, 2013 6:30:58 PM, Albert ARIBAUD wrote: Hi Albert, On Thu, 11 Apr 2013 17:25:34 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts (HIDDEN not known by most binutils 2.22 or older ones) aad17a2 ARM: fix CONFIG_SPL_MAX_SIZE semantics 72c1601 smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics 55e46fc da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics 0502854 cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics (PPC builds fail because --pad-to receives an expr, not a constant) Actually, the failure was not due to this series, but to patch 16/30 of Benoît's series. In agreement with Tom, rolling further back, removing the recent TI PR merge and all of Benoît's series. Benoît, can you fix 16/30 wrt PPC building? If you provide branches, I or Tom can do tests. Once v12 is ready, I'll apply it back, then the TI PR, then the __bss_end patch, then the SPL max size series, this one list in order to give us time to choose how overall SPL text+data+rodata+BSS size testing should be done. OK, I'll do that. I need to know: - which board fails, P1021RDB-PC_NAND - where to find the toolchain binaries ready to use for PPC (Ubuntu package?), Toolchain is ELDK 5.2.1 for powerpc (installs in /opt, need to set PATH=...:/opt/eldk-5.2.1/powerpc/sysroots/i686-eldk-linux/usr/bin/powerpc-linux, ARCH=powerpc, and CROSS_COMPILE=powerpc-linux- - if all other arches have been build-tested in order to avoid new issues popping out later. Tom? Best regards, Benoît Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM] Rollback *again* -- 5 patches PLUS 31 patches...
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 04/11/2013 12:33 PM, Benoît Thébaudeau wrote: Hi Albert, On Thursday, April 11, 2013 6:30:58 PM, Albert ARIBAUD wrote: Hi Albert, On Thu, 11 Apr 2013 17:25:34 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts (HIDDEN not known by most binutils 2.22 or older ones) aad17a2 ARM: fix CONFIG_SPL_MAX_SIZE semantics 72c1601 smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics 55e46fc da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics 0502854 cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics (PPC builds fail because --pad-to receives an expr, not a constant) Actually, the failure was not due to this series, but to patch 16/30 of Benoît's series. In agreement with Tom, rolling further back, removing the recent TI PR merge and all of Benoît's series. Benoît, can you fix 16/30 wrt PPC building? If you provide branches, I or Tom can do tests. Once v12 is ready, I'll apply it back, then the TI PR, then the __bss_end patch, then the SPL max size series, this one list in order to give us time to choose how overall SPL text+data+rodata+BSS size testing should be done. OK, I'll do that. I need to know: - which board fails, - where to find the toolchain binaries ready to use for PPC (Ubuntu package?), - if all other arches have been build-tested in order to avoid new issues popping out later. P1021RDB-PC_NAND fails and I use ELDK 5.2 for a toolchain for PowerPC. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRZuluAAoJENk4IS6UOR1WxeQP/2X5/dNDz2DyMnd6qaSxZMEG 2wlMRkGjOe8vA47R0NzqS5KyUMhwvMZAhebk798lRjqkY/t5cdFy1sXEnWI3kod3 z4j456bpoQpfbctsaqHw0nCDU/HKBW53BDsFIRTA++2obeZ3Ywmj+TQxkefAgBJY UoyL33yZKC2M+CjeCKMaHJlmBYEkhthLxYn84zedoN/L8RZi66DXQ5QuGitRWZPL DfewModX/KNvjyjyJNca4fGymT0PtWvB3gS39Kju9qcF9iSp/aTlla5/xdVx1gY5 FvnXheabmp1iNkyKD/783HExBkbVg99aMWJAo8ARc9HfbZwgY8Dlji7hdVWGXPYG +RWgPwIp4PdKYTZnC5BK/sAHzWAVMv9iOxzkunxSbla9ULMysh1kPD9x+PVECo57 gJ9Eutui9q5NSLSUF/cIx2NXB9977ScYiFvy5+DX7MxytZvjOOQKor99qA9SqSYJ kiOybsKtlemfR+wAxPy2hGvxf5CUX/Yc6NPk16x74kQ3bZIy+0/Z8hWkGpRTqDY6 jW8jDtDv90YwnDYVEsQBEoCyBjr/5g2a3sOuTUBhYszMTzC+eJVn8nVaMqyiWPpX DBGMHC0o9pHJva1jVMf7AH7Q/uD4oUVmZRiSNpZ1znct1WU6D3ik/pTbsG+v3wIE Qa2PbeHT2Y8Pe3uFzFLN =2cE2 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/4] ARM: fix CONFIG_SPL_MAX_SIZE semantics
Hi Stephen, On Wed, 10 Apr 2013 17:09:45 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/10/2013 04:50 PM, Albert ARIBAUD wrote: On Wed, 10 Apr 2013 16:21:54 -0600, Stephen Warren wrote: On 04/09/2013 05:14 PM, Albert ARIBAUD wrote: ... This still seems to have separate defines for SPL text/data/rodata size and BSS size. If I want instead to limit the total text/data/rodata/bss size, but place no specific limit on the bss size individually, can I not do that? This would defeat the purpose of giving CONFIG_SPL_MAX_SIZE a constant meaning -- one of the issues which prompted this patch series is that in ARM sometime CONFIG_SPL_MAX_SIZE meant BSS included, and sometime excluded, and this inconsistency had to be resolved. As in the rest of U-boot, CONFIG_SPL_MAX_SIZE was meant BSS excluded, this is the semantics that was decided. What we could do, though, is subdivide testing based on the existence or non-existence of CONFIG_SPL_BSS_START_ADDR: - if CONFIG_SPL_BSS_START_ADDR exists, then we assume SPL image and BSS are disjoint and we test each one against its max size, as this patch series does; - if CONFIG_SPL_BSS_START_ADDR does not exist, then we assume SPL image and BSS are contiguous and we test the whole of SPL against the sum of CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE. Why not either: a) define CONFIG_SPL_MAX_SIZE to include the BSS size if CONFIG_SPL_BSS_START_ADDR is not set, but exclude it if it is. or: b) use 3 defines instead of 2, so that CONFIG_SPL_MAX_SIZE (if defined) always limits text+rodata+data, CONFIG_SPL_MAX_FOOTPRINT (if defined) always limits text+rodata+data+bss, and CONFIG_SPL_BSS_MAX_SIZE (if defined) always limits bss size. Tegra would define only CONFIG_SPL_MAX_FOOTPRINT in this scheme. Other boards would presumably define other combinations of those. Tom R on IRC showed preference for CONFIG_SPL_MAX_FOOTPRINT -- I'll send out a V3 with this solution. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/4] Homogeneize semantics of CONFIG_SPL_MAX_SIZE
On Thu, 11 Apr 2013 01:10:17 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: On Wed, 10 Apr 2013 01:14:51 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE did not have constant semantics across all of U-boot. This patch series aims at fixing this by splitting the maximum size into separate image (code + data + rodata + linker list) size on the one hand, and BSS size on the other hand. Changes in v2: - brought back total size to 12K - fixed commit summary typoes - fixed spacing in commit summary - removed mmutable in SPL linker file Albert ARIBAUD (4): cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics ARM: fix CONFIG_SPL_MAX_SIZE semantics README | 17 +++-- arch/arm/cpu/u-boot-spl.lds| 19 --- arch/arm/cpu/u-boot.lds|4 board/ait/cam_enc_4xx/u-boot-spl.lds |2 +- board/davinci/da8xxevm/u-boot-spl-da850evm.lds |2 +- board/samsung/smdk5250/smdk5250-uboot-spl.lds |2 +- include/configs/cam_enc_4xx.h |4 +++- include/configs/da850evm.h |4 +++- include/configs/exynos5250-dt.h|3 ++- 9 files changed, 34 insertions(+), 23 deletions(-) Applied to u-boot-arm/master. ... and then rolled back. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: Add titanium board support (i.MX6 based)
On Thu, Apr 11, 2013 at 1:39 PM, Stefan Roese s...@denx.de wrote:
Hi Fabio,
On 11.04.2013 17:48, Fabio Estevam wrote:
+u32 get_board_rev(void)
+{
+ return get_cpu_rev();
+}
You can drop this, since I recently sent a patch that places it on a
common location.
Hmmm, removing this function results in this error:
$ ./MAKEALL titanium
Configuring for titanium - Board: titanium, Options:
IMX_CONFIG=board/freescale/titanium/imximage.cfg
make: *** [u-boot] Error 139
arm-linux-gnueabi-size: ./u-boot: File format not recognized
arch/arm/lib/libarm.o: In function `setup_revision_tag':
/home/stefan/git/u-boot/u-boot/arch/arm/lib/bootm.c:215: undefined reference
to `get_board_rev'
...
So your patch is not in mainline yet? Is it in the ARM
custodian repo? Then the pending ARM PR will solve this.
This patch is in Stefano's and Albert's tree. It will hit mainline
soon, I guess.
Regards,
Fabio Estevam
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Re: [U-Boot] [ARM] Rollback *again* -- 5 patches PLUS 31 patches...
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 04/11/2013 12:48 PM, Albert ARIBAUD wrote: Hi Benoît, On Thu, 11 Apr 2013 18:33:35 +0200 (CEST), Benoît Thébaudeau benoit.thebaud...@advansee.com wrote: [snip] - if all other arches have been build-tested in order to avoid new issues popping out later. Tom? Everything else seemed fine. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJRZuzjAAoJENk4IS6UOR1Wf3cP/2/Bt+79bqmElu+fMJZvhitM fEMvblZYxKvY3u5+t9dUWi8yo2VnrMDHpyXcaMqcBzByf6mOm2T729UmGuYKAKUl GBqUFcgHjxpycjDMM13OcVppzP8K6QFpI4SHEm7F67mEmqIm48NqHvH3oBCRwVIV Se9dOIFQYlKV0on3JfSCj3deQB5+yPQ98/4mZbybzJnBfwfiX8oU7Q37JeWaRf9W lZu8OMdHQhWpyvP6zHTT9MAqZKfuSWT2Ie1HQNj9vhBWwZpk20Gk6v9+sZ36FFGI qYDaBrAKv2NzcZG5OYiNehb/aeX+iSnmJhcBkCElKqbp6xZW23YzQxPZwTl6c0ot w/XvLF52p1bHUiXfu0MatFI6ik1T5ON0H+XVjEoVKIo73+OBB646NtikmwMvGnxl bO+68lFLBMMe6+8L4qxhbDwwnNGpznbczcKVon5V45cTKiMSgRqkWdRSodPl98jp UcZXjMk7zdsLakSBvgiUFjZ4bkYrV8MJJSZcA9jI7PWAuGEblA2zKdMCiRbhFhmR kXLYE5WmcVgUc0A6g4oJQSd1hv87iGbRAbMcTvXV3Il72aquytLUqksTOQ6dajQ8 GKhnr//qmWuzbxhmn7F16Gv1Zs+e2t43awdjYW96fh1jCIgbLFgKjxwBMWTJSvSP +k/rWf2Mik2uLd+wspVE =9sN6 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/1] ARM: Add Seagate GoFlex Home support
Add Seagate GoFlex Home support Start with dockstar configuration define support for RTC, DATE, SATA and EXT4FS Signed-off-by: Suriyan Ramasami suriya...@gmail.com --- Changes in v4: Remove board/Seagate/goflexhome/goflexhome.h from patch and merge it in configs/include/goflexhome.h Snip commit messages and move comments Coding style changes - Blank line between decl and code - Dont mix declarations and code Changes in v3: Squash the board support in one file Remove goflexhomemenu.c from this patch as its not board related Changes in v2: Coding style changes MAINTAINERS |4 + board/Seagate/goflexhome/Makefile | 51 + board/Seagate/goflexhome/goflexhome.c | 189 + board/Seagate/goflexhome/kwbimage.cfg | 168 + boards.cfg|1 + include/configs/goflexhome.h | 151 ++ 6 files changed, 564 insertions(+), 0 deletions(-) create mode 100644 board/Seagate/goflexhome/Makefile create mode 100644 board/Seagate/goflexhome/goflexhome.c create mode 100644 board/Seagate/goflexhome/kwbimage.cfg create mode 100644 include/configs/goflexhome.h diff --git a/MAINTAINERS b/MAINTAINERS index 1614b91..6292a58 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -847,6 +847,10 @@ Sricharan R r.sricha...@ti.com omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC) omap5_evm ARM ARMV7 (OMAP5xx Soc) +Suriyan Ramasami suriya...@gmail.com + + goflexhome ARM926EJS (Kirkwood SoC) + Thierry Reding thierry.red...@avionic-design.de plutux Tegra20 (ARM7 A9 Dual Core) diff --git a/board/Seagate/goflexhome/Makefile b/board/Seagate/goflexhome/Makefile new file mode 100644 index 000..9948fe2 --- /dev/null +++ b/board/Seagate/goflexhome/Makefile @@ -0,0 +1,51 @@ +# +# Copyright (C) 2013 Suriyan Ramasami suriya...@gmail.com +# +# Based on dockstar/Makefile originally written by +# Copyright (C) 2010 Eric C. Cooper e...@cmu.edu +# +# Based on sheevaplug/Makefile originally written by +# Prafulla Wadaskar prafu...@marvell.com +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := goflexhome.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/Seagate/goflexhome/goflexhome.c b/board/Seagate/goflexhome/goflexhome.c new file mode 100644 index 000..17c1905 --- /dev/null +++ b/board/Seagate/goflexhome/goflexhome.c @@ -0,0 +1,189 @@ +/* + * Copyright (C) 2013 Suriyan Ramasami suriya...@gmail.com + * + * Based on dockstar.c originally written by + * Copyright (C) 2010 Eric C. Cooper e...@cmu.edu + * + * Based on sheevaplug.c originally written by + * Prafulla Wadaskar prafu...@marvell.com + * (C) Copyright 2009 + * Marvell Semiconductor www.marvell.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA
Re: [U-Boot] [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts
Albert, -Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Friday, April 05, 2013 8:59 AM To: Tom Rini Cc: Albert ARIBAUD; Scott Wood; u-boot@lists.denx.de; step...@theia.denx.de; Tom Warren; Simon Glass; Allen Martin Subject: Re: [U-Boot] [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts I just fetched merged TOT u-boot-arm (getting ready for a PR from u-boot-tegra - u-boot-arm), and did a test build of all Tegra boards. I get the following linker (ld) error on all builds due to this commit (abbecf4c8, ARM: Fix __bss_start and __bss_end in linker scripts): arm-linux-gnueabi-ld.bfd:u-boot.lds:44: syntax error This is pointing to the 'HIDDEN(__bss_base = .);' lines added in this change (in the generated u-boot.lds in the root dir). I'm seeing this with both gcc 4.4.1/ld 2.19.51 and gcc 4.6.2/ld 2.22 tools. What compiler/binutils did you use to build/test this? Tom On 04/05/2013 07:53 AM, Tom Rini wrote: On Fri, Apr 05, 2013 at 08:00:43AM +0200, Albert ARIBAUD wrote: Hi Beno??t, CC:ing Stephen Warren who wrote commit 2b7818d4 which git blame tells me added the ASSERT() to arch/arm/cpu/u-boot.lds, and Tom Rini to help decide what to do. [snip] Looks good, but what about the __bss_end in ASSERT(__bss_end (CONFIG_SPL_TEXT_BASE + CONFIG_SPL_MAX_SIZE), SPL image too big); ? Shouldn't it be replaced with __bss_limit, or even better, with __image_copy_end (why should BSS be taken into account for SPL image size?)? I meant __bss_base, not __image_copy_end. Part of SPL can use BSS, once board_init_f() has handed things over to board_init_r(), I agree with that. and this test is meant to ensure that .text+.data+.bss fits in the RAM available to SPL. This ASSERT() compares the upper limit of this RAM to the upper limit of the SPL needs, i.e. __bss_end. IOW, this ASSERT is about how much memory SPL will use when it runs, This is where there might be an issue with the definition / usage of CONFIG_SPL_MAX_SIZE. I had understood that this is the purpose of this assert, but this usage of CONFIG_SPL_MAX_SIZE, while frequent on arm, conflicts with its definition in README, as well as with some arm and other usages, e.g. in include/configs/am335x_evm.h or include/configs/p1_p2_rdb_pc.h. The README's definition is also how I understood this config when discussing it with Scott about my 16/30, which led to the #error test that was added at some point to this patch. Sorry, I'd missed that. Adding Stephen for any comment regarding the ASSERT() and CONFIG_SPL_MAX_SIZE semantics. Yes. I'm a little confused about this one as well now. ... If I read all of the tegra files correctly, the way they work is that SPL and U-Boot are both loaded into memory, and thus they're ensuring that the BSS won't overlap with the full U-Boot that's right behind. Yes exactly. I'll explain the whole situation just so there's something to refer to in the archives. Tegra has two different types of CPU. As far as boot process goes, the AVP (Audio/Video Processor) is what is released from reset at system boot time, and what runs the built-in Tegra boot ROM and the U-Boot SPL. The AVP is an ARM7TDMI. The SPL initializes the main CPU complex (A9/A15), and causes it to execute the main U-Boot. The boot process is: * Entire U-Boot binary (SPL+pad+U-Boot) sits in boot flash. * Boot ROM code running on AVP: ** Initializes DRAM controller. ** Copies entire SPL+pad+U-Boot to DRAM byte-for-byte. ** Jumps to U-Boot SPL. * U-Boot SPL running on AVP: ** Initializes clocks/... required to boot A9 CPUs. ** Set up the A9 reset vector to point at the main U-Boot code, and releases A9 CPUs from reset. * Main U-Boot running on A9: ** Runs in the typical fashion, including regular relocation. Thus, the in-flash layout of SPL+U-Boot must match the in-DRAM layout, since the boot ROM just copies it byte-for-byte, and the SPL does nothing to move the appended main U-Boot out-of-the-way before executing. The gap between SPL and concatenated U-Boot must be large enough to hold the BSS (since SPL will use BSS without moving U-boot), but is also larger so that we can hard-code the TEXT_BASE of the main U-Boot to some stable value, without having to move it about often if SPL changes size. So the U-Boot binary layout in flash/DRAM is: +-+ | SPL | +-+ | Pad, including | | space for BSS | +-+ | Main U-Boot | +-+ The assert in question ensures that the start of the Main U-Boot in the diagram above is at a large enough address that it doesn't overlap the SPL's BSS usage in RAM. It's possible that I chose the wrong defines to validate when writing that assert. As long as the assert continues to ensure the above image layout in the
Re: [U-Boot] [ARM] Rollback *again* -- 5 patches
Albert, -Original Message- From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net] Sent: Thursday, April 11, 2013 9:38 AM To: Stephen Warren Cc: U-Boot; Prafulla Wadaskar; Tom Rini; Tom Warren Subject: Re: [ARM] Rollback *again* -- 5 patches Hi Stephen, On Thu, 11 Apr 2013 09:49:45 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/11/2013 09:25 AM, Albert ARIBAUD wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts ... Stephen, that is an occasion to add your proposal to aad17a2. Tom Warren as the Tegra maintainer should be taking care of this. I am simply pointing out that the currently proposed changes to the SPL size checking don't fulfil the requirements for Tegra. I don't expect to have to fix the patches. I did not mean for you to do it, only that there was an opportunity to do it. :) Why should I be fixing something I didn't break, and that worked fine before your change? As Stephen has pointed out, Tegra uses the whole enchilada (text/rodata/data/bss) for the SPL portion. Any change you add should account for that. Even if we are unique in that use/requirement, it still needs to work correctly before and after your patch. Tom Amicalement, -- Albert. --- This email message is for the sole use of the intended recipient(s) and may contain confidential information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply email and destroy all copies of the original message. --- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts
Hi Tom, On Thu, 11 Apr 2013 10:52:08 -0700, Tom Warren twar...@nvidia.com wrote: Albert, -Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Friday, April 05, 2013 8:59 AM To: Tom Rini Cc: Albert ARIBAUD; Scott Wood; u-boot@lists.denx.de; step...@theia.denx.de; Tom Warren; Simon Glass; Allen Martin Subject: Re: [U-Boot] [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts I just fetched merged TOT u-boot-arm (getting ready for a PR from u-boot-tegra - u-boot-arm), and did a test build of all Tegra boards. I get the following linker (ld) error on all builds due to this commit (abbecf4c8, ARM: Fix __bss_start and __bss_end in linker scripts): arm-linux-gnueabi-ld.bfd:u-boot.lds:44: syntax error This is pointing to the 'HIDDEN(__bss_base = .);' lines added in this change (in the generated u-boot.lds in the root dir). I'm seeing this with both gcc 4.4.1/ld 2.19.51 and gcc 4.6.2/ld 2.22 tools. What compiler/binutils did you use to build/test this? This has been detected already, and one of the reasons why Tom and I decided to roll back ARM. Normally, you should have u-boot-arm/master = u-boot-arm/master = dd2445ec1b839a5ca61ff8438a5b7aebb21b7986. Tom Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM] Rollback *again* -- 5 patches
Hi Tom, On Thu, 11 Apr 2013 10:59:29 -0700, Tom Warren twar...@nvidia.com wrote: Albert, -Original Message- From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net] Sent: Thursday, April 11, 2013 9:38 AM To: Stephen Warren Cc: U-Boot; Prafulla Wadaskar; Tom Rini; Tom Warren Subject: Re: [ARM] Rollback *again* -- 5 patches Hi Stephen, On Thu, 11 Apr 2013 09:49:45 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/11/2013 09:25 AM, Albert ARIBAUD wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts ... Stephen, that is an occasion to add your proposal to aad17a2. Tom Warren as the Tegra maintainer should be taking care of this. I am simply pointing out that the currently proposed changes to the SPL size checking don't fulfil the requirements for Tegra. I don't expect to have to fix the patches. I did not mean for you to do it, only that there was an opportunity to do it. :) Why should I be fixing something I didn't break, and that worked fine before your change? Er... Was I did not mean for you to do it unclear? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] omap5_common.h: Switch to ext4
ext3 should not be used on SD cards, so use ext4 instead.
Cc: Sricharan R r.sricha...@ti.com
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/omap5_common.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index 34e54d8..b346e4f 100644
--- a/include/configs/omap5_common.h
+++ b/include/configs/omap5_common.h
@@ -152,7 +152,7 @@
optargs=\0 \
mmcdev=0\0 \
mmcroot=/dev/mmcblk0p2 rw\0 \
- mmcrootfstype=ext3 rootwait\0 \
+ mmcrootfstype=ext4 rootwait\0 \
mmcargs=setenv bootargs console=${console} \
${optargs} \
vram=${vram} \
--
1.7.9.5
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Re: [U-Boot] [ARM] Rollback *again* -- 5 patches
Albert, On Thu, Apr 11, 2013 at 11:01 AM, Albert ARIBAUD albert.u.b...@aribaud.netwrote: Hi Tom, On Thu, 11 Apr 2013 10:59:29 -0700, Tom Warren twar...@nvidia.com wrote: Albert, -Original Message- From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net] Sent: Thursday, April 11, 2013 9:38 AM To: Stephen Warren Cc: U-Boot; Prafulla Wadaskar; Tom Rini; Tom Warren Subject: Re: [ARM] Rollback *again* -- 5 patches Hi Stephen, On Thu, 11 Apr 2013 09:49:45 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/11/2013 09:25 AM, Albert ARIBAUD wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts ... Stephen, that is an occasion to add your proposal to aad17a2. Tom Warren as the Tegra maintainer should be taking care of this. I am simply pointing out that the currently proposed changes to the SPL size checking don't fulfil the requirements for Tegra. I don't expect to have to fix the patches. I did not mean for you to do it, only that there was an opportunity to do it. :) Why should I be fixing something I didn't break, and that worked fine before your change? Er... Was I did not mean for you to do it unclear? Yes, it was unclear. Tom Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts
Albert, On Thu, Apr 11, 2013 at 10:59 AM, Albert ARIBAUD albert.u.b...@aribaud.netwrote: Hi Tom, On Thu, 11 Apr 2013 10:52:08 -0700, Tom Warren twar...@nvidia.com wrote: Albert, -Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Friday, April 05, 2013 8:59 AM To: Tom Rini Cc: Albert ARIBAUD; Scott Wood; u-boot@lists.denx.de; step...@theia.denx.de; Tom Warren; Simon Glass; Allen Martin Subject: Re: [U-Boot] [PATCH] ARM: Fix __bss_start and __bss_end in linker scripts I just fetched merged TOT u-boot-arm (getting ready for a PR from u-boot-tegra - u-boot-arm), and did a test build of all Tegra boards. I get the following linker (ld) error on all builds due to this commit (abbecf4c8, ARM: Fix __bss_start and __bss_end in linker scripts): arm-linux-gnueabi-ld.bfd:u-boot.lds:44: syntax error This is pointing to the 'HIDDEN(__bss_base = .);' lines added in this change (in the generated u-boot.lds in the root dir). I'm seeing this with both gcc 4.4.1/ld 2.19.51 and gcc 4.6.2/ld 2.22 tools. What compiler/binutils did you use to build/test this? This has been detected already, and one of the reasons why Tom and I decided to roll back ARM. Normally, you should have u-boot-arm/master = u-boot-arm/master = dd2445ec1b839a5ca61ff8438a5b7aebb21b7986. you should have u-boot-arm/master = u-boot-arm/master = dd2445ec1b839a5ca61ff8438a5b7aebb21b7986. I would hope that u-boot-arm/master would always == u-boot-arm/master ;) That commit is not 5 patches back (from our other thread 'Rollback *again* -- 5 patches), but more like 45. I'll wait to do a fetch/rebase/PR for u-boot-tegra until the Tegra builds are fixed. Thanks, Tom Tom Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [ARM] Rollback *again* -- 5 patches
Hi Tom, On Thu, 11 Apr 2013 11:04:44 -0700, Tom Warren twarren.nvi...@gmail.com wrote: Albert, On Thu, Apr 11, 2013 at 11:01 AM, Albert ARIBAUD albert.u.b...@aribaud.netwrote: Hi Tom, On Thu, 11 Apr 2013 10:59:29 -0700, Tom Warren twar...@nvidia.com wrote: Albert, -Original Message- From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net] Sent: Thursday, April 11, 2013 9:38 AM To: Stephen Warren Cc: U-Boot; Prafulla Wadaskar; Tom Rini; Tom Warren Subject: Re: [ARM] Rollback *again* -- 5 patches Hi Stephen, On Thu, 11 Apr 2013 09:49:45 -0600, Stephen Warren swar...@wwwdotorg.org wrote: On 04/11/2013 09:25 AM, Albert ARIBAUD wrote: Hello, Older toolchain and PPC incompatibilities appeared in the last two additions to ToT ARM. To avoid non-bisectability, ToT has been rolled back from abbecf4c87 to ae74b65987. This removes abbecf4 ARM: Fix __bss_start and __bss_end in linker scripts ... Stephen, that is an occasion to add your proposal to aad17a2. Tom Warren as the Tegra maintainer should be taking care of this. I am simply pointing out that the currently proposed changes to the SPL size checking don't fulfil the requirements for Tegra. I don't expect to have to fix the patches. I did not mean for you to do it, only that there was an opportunity to do it. :) Why should I be fixing something I didn't break, and that worked fine before your change? Er... Was I did not mean for you to do it unclear? Yes, it was unclear. Apologies, then. I only meant to say that we had time to discuss and incorporate your solution in the SPL max size patch series since it had just had to be unapplied. Tom Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] freescale i.MX28 mxsboot NAND booting on mx28evk bad blocks
On 4/11/2013 5:03 AM, Trent Piepho wrote: I'm talking about the image file as generated by mxsimage. If I hex dump that, it's clearly written entirely with 2048 byte pages. If you hexdump your image are the FCB blocks exactly 128k apart? Hmm, I don't have one in front of me to conveniently look at, but as I recall when I was working with it the FCB blocks did indeed appear to be evenly spaced at locations divisible by 1k. Looks wrong to me! Notice that offset is equal to i * nand_writesize, not i * (nand_writesize + nand_oobsize). Ah, good eye. They are writing the the correct amount of data, but in the wrong places. All the rest are corrupted since they are written in the wrong location. But since the first one was ok the bootloader never even looks at the bad ones. Unless the NAND page goes bad, then the whole point of having redundant copies will be defeated. That sounds like a correct conclusion. What one should actually do to flash these blocks is write 2048 bytes in raw mode. I guess that would only work if whatever reading the blocks also read them in raw mode, as otherwise the lack of ECC in the OOB area would fail the read? If the four blocks were already marked as bad, then nandwrite will not write them. So maybe you only have a working image because it was already working and wasn't modified? Can you erase flash in u-boot, verify that nand does not boot, and the make a working nand using just nandwrite --oob? I think you will also need to use the option --noecc to write in raw mode. I did actually erase the NAND before testing the burn in Linux, so I can confirm it does actually work – the first time. After the first burn, the next time Linux is booted, it detects the blocks as bad, and will not overwrite them, even in raw mode. I unfortunately did not make good notes, and don't recall the specific flags I used with nandwrite during the test. I've done that before. The u-boot env was written from Linux to tell u-boot which kernel to boot, the firmware update kernel and rootfs or the main kernel and rootfs. I think we're going to always have u-boot boot the recovery kernel and have that bootstrap the production kernel. We plan to have a physical reset button on the device, which if held down when powered on will reset the device to factory defaults. The recovery kernel will check if that button is pressed when it loads and rewrite the production area of the flash if so from a recovery partition, otherwise just load the production kernel. Hopefully Otavio is watching this thread and can address the issues you found with mxsboot. Thanks much… ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-arm/master - UPDATED
On Thu, Apr 11, 2013 at 08:45:30AM +0200, Albert ARIBAUD wrote: Hi Tom, On Thu, 11 Apr 2013 01:12:17 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: The following changes since commit 009d75ccc11d27b9a083375a88bb93cb746b4800: Merge branch 'u-boot/master' into 'u-boot-arm/master' (2013-03-28 18:50:01 +0100) are available in the git repository at: git://git.denx.de/u-boot-arm master for you to fetch changes up to abbecf4c873aa3e9ec9331c5b3eba1e2a9c84902: ARM: Fix __bss_start and __bss_end in linker scripts (2013-04-11 08:10:59 +0200) *** NOTE *** there should be a single, and trivial, merge conflict on file drivers/video/exynos_fb.c. Abbas Raza (1): mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by a board Ajay Kumar (13): video: exynos_fb: Remove callbacks from the driver video: exynos_dp: Remove callbacks from the driver video: exynos_fb: Make fimd_ctrl global EXYNOS: FDT: Add compatible strings for FIMD video: exynos_fb: add DT support for FIMD driver EXYNOS5: Add device node for FIMD SMDK5250: Add device node for FIMD video: exynos_dp: Make dp_regs global EXYNOS5: FDT: Add compatible strings for FIMD video: exynos_dp: Add function to parse DP DT node EXYNOS5: Add device node for DP SMDK5250: Add device node for DP SMDK5250: Use statically defined structures only in non DT case Akshay Saraswat (8): Exynos: clock: Fix a bug in PLL lock check condition Exynos: Add hardware accelerated SHA256 and SHA1 Exynos: config: Enable ACE HW for SHA 256 for Exynos gen: Add sha h/w acceleration to hash Exynos: config: Enable hash command Exynos5: clock: Fix a typo bug in exynos clock init Exynos5: config: enable time command Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk Albert ARIBAUD (8): Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' cam_enc_4xx: fix CONFIG_SPL_MAX_SIZE semantics da850evm, da850_am18xxevm: fix CONFIG_SPL_MAX_SIZE semantics smdk5250, snow: fix CONFIG_SPL_MAX_SIZE semantics ARM: fix CONFIG_SPL_MAX_SIZE semantics ARM: Fix __bss_start and __bss_end in linker scripts Alexandre Pereira da Silva (1): mx23_olinuxino: Fix netboot console Andreas Bie??mann (6): omap3/cpu.h: add BCH support asm/omap_gpmc.h: consolidate common defines omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel omap_gpmc: change nandecc command omap_gpmc: add support for hw assisted BCH8 tricorder: enable hw assisted BCH8 in SPL and u-boot Beno??t Th??baudeau (29): mx25pdk: Enable imxdi RTC nand: mxc: Prepare to add support for i.MX5 nand: mxc: Add support for i.MX5 imx: mx5: lowlevel_init: Simplify code imx: mx53ard: Add support for NAND Flash nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome() nand: mxc: Use appropriate page number in syndrome functions arm: start.S: Fix _TEXT_BASE for SPL arm: relocate_code() is no longer noreturn arm1136: Remove redundant relocate_code() return arm: relocate_code(): Remove useless relocation offset computation arm: relocate_code(): Use __image_copy_end for end of relocation arm: crt0.S: Remove bogus .globl autoconfig.mk: Make it possible to define configs from other configs Makefile: Change CONFIG_SPL_PAD_TO to image offset imx: Fix automatic make targets for imx images nand: mxc: Switch NAND SPL to generic SPL arm926ejs: Remove deprecated and now unused NAND SPL arm: Remove unused relocate_code() parameters Makefile: Move SHELL setup to config.mk .gitignore: Add /SPL imx: Add u-boot-with-spl.imx make target imx: Add u-boot-with-nand-spl.imx make target arm: Remove support for smdk6400 Revert mkconfig: start deprecating Makefile config targets arm: Remove support for unused s3c64xx arm: Remove deprecated and now unused NAND SPL arm1176: Remove unused MMU setup from start.S arm: Make all linker scripts compatible with per-symbol sections Bin Liu (2): musb: am335x: disable bulk split-combine feature musb: set MUSB speed based on CONFIG Che-Liang Chiou (1): Exynos: Add timer_get_us function Dirk Behme (1): spi: mxc_spi: Fix ECSPI reset handling Eric Nelson (2): i.MX6: Add hdmidet command to detect attached HDMI monitor i.MX6: mx6qsabrelite: discard override of CONFIG_ARP_TIMEOUT Fabio Estevam (13): mxs: spl_mem_init: Align DDR2 init with FSL bootlets source configs: mx28evk: Use
Re: [U-Boot] [PATCH] integrator: enable device tree
On Thu, Apr 4, 2013 at 7:19 AM, Linus Walleij linus.wall...@linaro.org wrote: This enables the device tree library on the Integrator platforms so we can pass a device tree when booting. Signed-off-by: Linus Walleij linus.wall...@linaro.org Tom, is this patch OK, if so coul you perhaps pick it up? Yours, Linus Walleij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
From: Fabio Estevam fabio.este...@freescale.com Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Scott Wood scottw...@freescale.com Reviewed-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None README |9 ++--- drivers/mtd/nand/ndfc.c |4 ++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/README b/README index 5c5cd18..e9c3145 100644 --- a/README +++ b/README @@ -3755,9 +3755,12 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_SRIOn_MEM_SIZE: Size of SRIO port 'n' memory region -- CONFIG_SYS_NDFC_16 - Defined to tell the NDFC that the NAND chip is using a - 16 bit bus. +- CONFIG_SYS_NAND_BUSWIDTH_16BIT + Defined to tell the NAND controller that the NAND chip is using + a 16 bit bus. + Not all NAND drivers use this symbol. + Example of driver that uses it: + - drivers/mtd/nand/ndfc.c - CONFIG_SYS_NDFC_EBC0_CFG Sets the EBC0_CFG register for the NDFC. If not defined diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 6ebbb5e..213d2c9 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -156,7 +156,7 @@ static uint8_t ndfc_read_byte(struct mtd_info *mtd) struct nand_chip *chip = mtd-priv; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT return (uint8_t) readw(chip-IO_ADDR_R); #else return readb(chip-IO_ADDR_R); @@ -218,7 +218,7 @@ int board_nand_init(struct nand_chip *nand) nand-ecc.bytes = 3; nand-select_chip = ndfc_select_chip; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT nand-options |= NAND_BUSWIDTH_16; #endif -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 02/30] mtd: nand: mxc_nand: Fix is_16bit_nand()
From: Fabio Estevam fabio.este...@freescale.com
Currently is_16bit_nand() is a per SoC function and it decides the bus nand
width by reading some boot related registers.
This method works when NAND is the boot medium, but does not work if another
boot medium is used. For example: booting from a SD card and then using NAND
to store the environment variables, would lead to the following error:
NAND bus width 16 instead 8 bit
No NAND device found!!!
0 MiB
Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width.
If it is defined in the board file, then consider 16-bit NAND bus-width,
otherwise assume 8-bit NAND is used.
This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which
states:
nand-bus-width : 8 or 16 bus width if not present 8
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Scott Wood scottw...@freescale.com
Reviewed-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- New patch.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
README |3 ++-
drivers/mtd/nand/mxc_nand.c | 37 +++--
2 files changed, 5 insertions(+), 35 deletions(-)
diff --git a/README b/README
index e9c3145..9285ddd 100644
--- a/README
+++ b/README
@@ -3759,8 +3759,9 @@ Low Level (hardware related) configuration options:
Defined to tell the NAND controller that the NAND chip is using
a 16 bit bus.
Not all NAND drivers use this symbol.
- Example of driver that uses it:
+ Example of drivers that use it:
- drivers/mtd/nand/ndfc.c
+ - drivers/mtd/nand/mxc_nand.c
- CONFIG_SYS_NDFC_EBC0_CFG
Sets the EBC0_CFG register for the NDFC. If not defined
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index d0ded48..bb475f2 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -98,45 +98,14 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
#endif
#endif
-#ifdef CONFIG_MX27
static int is_16bit_nand(void)
{
- struct system_control_regs *sc_regs =
- (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
-
- if (readl(sc_regs-fmcr) NF_16BIT_SEL)
- return 1;
- else
- return 0;
-}
-#elif defined(CONFIG_MX31)
-static int is_16bit_nand(void)
-{
- struct clock_control_regs *sc_regs =
- (struct clock_control_regs *)CCM_BASE;
-
- if (readl(sc_regs-rcsr) CCM_RCSR_NF16B)
- return 1;
- else
- return 0;
-}
-#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
-static int is_16bit_nand(void)
-{
- struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
-
- if (readl(ccm-rcsr) CCM_RCSR_NF_16BIT_SEL)
- return 1;
- else
- return 0;
-}
+#if defined(CONFIG_SYS_NAND_BUSWIDTH_16BIT)
+ return 1;
#else
-#warning 8/16 bit NAND autodetection not supported
-static int is_16bit_nand(void)
-{
return 0;
-}
#endif
+}
static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t
size)
{
--
1.7.10.4
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[U-Boot] [PATCH v12 05/30] imx: mx5: lowlevel_init: Simplify code
Don't use several instructions to build constant values. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Acked-by: Stefano Babic sba...@denx.de --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - New patch. Changes in v2: None arch/arm/cpu/armv7/mx5/lowlevel_init.S |8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 6d9396a..dfce0ca 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -309,8 +309,7 @@ setup_pll_func: ldr r0, =CCM_BASE_ADDR ldr r1, =0x00015154 str r1, [r0, #CLKCTL_CBCMR] -ldr r1, =0x02888945 -orr r1, r1, #(1 16) +ldr r1, =0x02898945 str r1, [r0, #CLKCTL_CBCDR] /* make sure change is effective */ 1: ldr r1, [r0, #CLKCTL_CDHIPR] @@ -321,10 +320,7 @@ setup_pll_func: /* Switch peripheral to PLL2 */ ldr r0, =CCM_BASE_ADDR - ldr r1, =0x00808145 - orr r1, r1, #(2 10) - orr r1, r1, #(0 16) - orr r1, r1, #(1 19) + ldr r1, =0x00888945 str r1, [r0, #CLKCTL_CBCDR] ldr r1, =0x00016154 -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 06/30] imx: mx53ard: Add support for NAND Flash
Add support for the Samsung K9LAG08U0M NAND Flash (2-GiB MLC NAND Flash, 2-kiB
pages, 256-kiB blocks, 30-ns R/W cycles, 1 CS) on mx53ard.
eNFC_CLK_ROOT is set up with a cycle time of 37.5 ns (400 MHz / 3 / 5) for this
board, which satisfies the 30-ns NF R/W cycle requirement.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Tested-by: Fabio Estevam fabio.este...@freescale.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Fix NFC pad setup using Freescale's.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- New patch.
Changes in v2: None
board/freescale/mx53ard/mx53ard.c | 66 +
include/configs/mx53ard.h | 10 ++
2 files changed, 76 insertions(+)
diff --git a/board/freescale/mx53ard/mx53ard.c
b/board/freescale/mx53ard/mx53ard.c
index 2fc8570..8d433a3 100644
--- a/board/freescale/mx53ard/mx53ard.c
+++ b/board/freescale/mx53ard/mx53ard.c
@@ -58,6 +58,71 @@ void dram_init_banksize(void)
gd-bd-bi_dram[1].size = PHYS_SDRAM_2_SIZE;
}
+#ifdef CONFIG_NAND_MXC
+static void setup_iomux_nand(void)
+{
+ u32 i, reg;
+ #define M4IF_GENP_WEIM_MM_MASK 0x0001
+ #define WEIM_GCR2_MUX16_BYP_GRANT_MASK 0x1000
+
+ reg = __raw_readl(M4IF_BASE_ADDR + 0xc);
+ reg = ~M4IF_GENP_WEIM_MM_MASK;
+ __raw_writel(reg, M4IF_BASE_ADDR + 0xc);
+ for (i = 0x4; i 0x94; i += 0x18) {
+ reg = __raw_readl(WEIM_BASE_ADDR + i);
+ reg = ~WEIM_GCR2_MUX16_BYP_GRANT_MASK;
+ __raw_writel(reg, WEIM_BASE_ADDR + i);
+ }
+
+ mxc_request_iomux(MX53_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_CS0, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_CS1, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_CS1, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_RB0, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
+ mxc_request_iomux(MX53_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_CLE, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_ALE, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_WP_B, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
+ mxc_request_iomux(MX53_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_RE_B, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_NANDF_WE_B, PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA0, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA0, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA1, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA1, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA2, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA2, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA3, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA3, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA4, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA4, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA5, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA5, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA6, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA6, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+ mxc_request_iomux(MX53_PIN_EIM_DA7, IOMUX_CONFIG_ALT0);
+ mxc_iomux_set_pad(MX53_PIN_EIM_DA7, PAD_CTL_PKE_ENABLE |
+ PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+}
+#else
+static void setup_iomux_nand(void)
+{
+}
+#endif
+
static void setup_iomux_uart(void)
{
/* UART1 RXD */
@@ -277,6 +342,7 @@ static void weim_cs1_settings(void)
int board_early_init_f(void)
{
+ setup_iomux_nand();
setup_iomux_uart();
return 0;
}
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 62cb42b..148f7a2 100644
--- a/include/configs/mx53ard.h
+++
[U-Boot] [PATCH v12 03/30] nand: mxc: Prepare to add support for i.MX5
Add some abstraction to NFC definitions so that some parts of the current code
can also be used for future i.MX5 code.
Clean up a few things by the way.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
Tested-by: Fabio Estevam fabio.este...@freescale.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7:
- Fix typo in patch description.
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Separate code reformatting from behavioral changes.
Changes in v2:
- Fix warning for unused tmp variable in board_nand_init() for NFC V1.
drivers/mtd/nand/mxc_nand.c | 92 +-
include/fsl_nfc.h| 72 -
nand_spl/nand_boot_fsl_nfc.c | 47 +++--
3 files changed, 97 insertions(+), 114 deletions(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index bb475f2..6ae95d6 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -119,7 +119,7 @@ static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t
*source, size_t size
/*
* This function polls the NANDFC to wait for the basic operation to
- * complete by checking the INT bit of config2 register.
+ * complete by checking the INT bit.
*/
static void wait_op_done(struct mxc_nand_host *host, int max_retries,
uint16_t param)
@@ -127,10 +127,10 @@ static void wait_op_done(struct mxc_nand_host *host, int
max_retries,
uint32_t tmp;
while (max_retries-- 0) {
- if (readw(host-regs-config2) NFC_INT) {
- tmp = readw(host-regs-config2);
- tmp = ~NFC_INT;
- writew(tmp, host-regs-config2);
+ tmp = readnfc(host-regs-config2);
+ if (tmp NFC_V1_V2_CONFIG2_INT) {
+ tmp = ~NFC_V1_V2_CONFIG2_INT;
+ writenfc(tmp, host-regs-config2);
break;
}
udelay(1);
@@ -149,8 +149,8 @@ static void send_cmd(struct mxc_nand_host *host, uint16_t
cmd)
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_cmd(host, 0x%x)\n, cmd);
- writew(cmd, host-regs-flash_cmd);
- writew(NFC_CMD, host-regs-config2);
+ writenfc(cmd, host-regs-flash_cmd);
+ writenfc(NFC_CMD, host-regs-operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, cmd);
@@ -165,8 +165,8 @@ static void send_addr(struct mxc_nand_host *host, uint16_t
addr)
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_addr(host, 0x%x)\n, addr);
- writew(addr, host-regs-flash_addr);
- writew(NFC_ADDR, host-regs-config2);
+ writenfc(addr, host-regs-flash_addr);
+ writenfc(NFC_ADDR, host-regs-operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, addr);
@@ -198,19 +198,19 @@ static void send_prog_page(struct mxc_nand_host *host,
uint8_t buf_id,
}
}
- writew(buf_id, host-regs-buf_addr);
+ writenfc(buf_id, host-regs-buf_addr);
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
- uint16_t config1 = readw(host-regs-config1);
+ uint16_t config1 = readnfc(host-regs-config1);
if (spare_only)
- config1 |= NFC_SP_EN;
+ config1 |= NFC_CONFIG1_SP_EN;
else
- config1 = ~NFC_SP_EN;
- writew(config1, host-regs-config1);
+ config1 = ~NFC_CONFIG1_SP_EN;
+ writenfc(config1, host-regs-config1);
}
- writew(NFC_INPUT, host-regs-config2);
+ writenfc(NFC_INPUT, host-regs-operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, spare_only);
@@ -225,19 +225,19 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_read_page (%d)\n, spare_only);
- writew(buf_id, host-regs-buf_addr);
+ writenfc(buf_id, host-regs-buf_addr);
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
- uint32_t config1 = readw(host-regs-config1);
+ uint32_t config1 = readnfc(host-regs-config1);
if (spare_only)
- config1 |= NFC_SP_EN;
+ config1 |= NFC_CONFIG1_SP_EN;
else
- config1 = ~NFC_SP_EN;
- writew(config1, host-regs-config1);
+ config1 = ~NFC_CONFIG1_SP_EN;
+ writenfc(config1, host-regs-config1);
}
- writew(NFC_OUTPUT, host-regs-config2);
+ writenfc(NFC_OUTPUT, host-regs-operation);
/* Wait for
[U-Boot] [PATCH v12 09/30] arm: start.S: Fix _TEXT_BASE for SPL
_TEXT_BASE must be set to CONFIG_SPL_TEXT_BASE for generic SPL, and to CONFIG_SYS_TEXT_BASE for non-SPL builds. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Reviewed-by: Tom Rini tr...@ti.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - Apply to mxs SPL too. Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |4 arch/arm/cpu/arm1176/start.S |8 arch/arm/cpu/arm720t/start.S |2 +- arch/arm/cpu/arm920t/start.S |4 arch/arm/cpu/arm925t/start.S |4 arch/arm/cpu/arm926ejs/mxs/start.S |4 arch/arm/cpu/arm926ejs/start.S |2 +- arch/arm/cpu/arm946es/start.S |4 arch/arm/cpu/arm_intcm/start.S |6 +- arch/arm/cpu/armv7/start.S |4 arch/arm/cpu/ixp/start.S |4 arch/arm/cpu/pxa/start.S |2 +- arch/arm/cpu/s3c44b0/start.S |4 arch/arm/cpu/sa1100/start.S|4 14 files changed, 52 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index eba2324..0cd2400 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -88,7 +88,11 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 3c291fb..adc 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -98,7 +98,15 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: +#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ .word CONFIG_SYS_TEXT_BASE +#else +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else + .word CONFIG_SYS_TEXT_BASE +#endif +#endif /* * Below variable is very important because we use MMU in U-Boot. diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 43bd6ed..1e3e5a1 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -85,7 +85,7 @@ _pad: .word 0x12345678 /* now 16*4=64 */ .globl _TEXT_BASE _TEXT_BASE: -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 2864d12..8c2c836 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -73,7 +73,11 @@ _fiq:.word fiq .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 827fee2..7f067c0 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -79,7 +79,11 @@ _fiq:.word fiq .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S index 373e6d8..bf54423 100644 --- a/arch/arm/cpu/arm926ejs/mxs/start.S +++ b/arch/arm/cpu/arm926ejs/mxs/start.S @@ -119,7 +119,11 @@ fiq: .globl _TEXT_BASE _TEXT_BASE: +#ifdef CONFIG_SPL_TEXT_BASE + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are defined in the board-specific linker script. diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index f5d1582..efdff3e 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -123,7 +123,7 @@ _TEXT_BASE: #ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ .word CONFIG_SYS_TEXT_BASE #else -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 9dec35b..85adc62 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -89,7 +89,11 @@ _vectors_end: .globl _TEXT_BASE _TEXT_BASE: +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) + .word CONFIG_SPL_TEXT_BASE +#else .word CONFIG_SYS_TEXT_BASE +#endif /* * These are
[U-Boot] [PATCH v12 11/30] arm1136: Remove redundant relocate_code() return
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - New patch, extracted from nand: mxc: Switch NAND SPL to generic SPL. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index eda4bc0..5225639 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -237,8 +237,6 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop - bx lr - #endif relocate_done: -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 07/30] nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome()
The page number indicated in the debug trace of mxc_nand_read_oob_syndrome() did
not match the page being worked on.
By the way, replace the GCC-specific __FUNCTION__ with __func__.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- Replace __FUNCTION__ with __func__.
Changes in v4:
- New patch.
Changes in v3: None
Changes in v2: None
drivers/mtd/nand/mxc_nand.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index db72cdc..62d6965 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -409,7 +409,7 @@ static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
MTDDEBUG(MTD_DEBUG_LEVEL0,
%s: Reading OOB area of page %u to oob %p\n,
-__FUNCTION__, host-page_addr, buf);
+__func__, page, buf);
chip-cmdfunc(mtd, NAND_CMD_READOOB, mtd-writesize, page);
for (i = 0; i chip-ecc.steps; i++) {
--
1.7.10.4
___
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U-Boot@lists.denx.de
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[U-Boot] [PATCH v12 10/30] arm: relocate_code() is no longer noreturn
Commit e05e5de7fae5bec79617e113916dac6631251156 made ARM's relocate_code() return to its caller, but it did not update its declaration accordingly. Fixing this function declaration fixes dropped C code following calls to relocate_code(). Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - Update relocate_code() description in ARM start.S comments. Changes in v7: None Changes in v6: - New patch, extracted from nand: mxc: Switch NAND SPL to generic SPL. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |4 +--- arch/arm/cpu/arm1176/start.S |4 +--- arch/arm/cpu/arm720t/start.S |4 +--- arch/arm/cpu/arm920t/start.S |4 +--- arch/arm/cpu/arm925t/start.S |4 +--- arch/arm/cpu/arm926ejs/start.S |4 +--- arch/arm/cpu/arm946es/start.S |4 +--- arch/arm/cpu/arm_intcm/start.S |4 +--- arch/arm/cpu/armv7/start.S |4 +--- arch/arm/cpu/ixp/start.S |4 +--- arch/arm/cpu/pxa/start.S |4 +--- arch/arm/cpu/s3c44b0/start.S |4 +--- arch/arm/cpu/sa1100/start.S|4 +--- include/common.h |6 +- 14 files changed, 18 insertions(+), 40 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 0cd2400..eda4bc0 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -176,9 +176,7 @@ next: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index adc..c0698e6 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -239,9 +239,7 @@ skip_tcmdisable: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 1e3e5a1..c65af3f 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -154,9 +154,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 8c2c836..2b8b7ad 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -193,9 +193,7 @@ copyex: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 7f067c0..6920c93 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -183,9 +183,7 @@ poll1: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index efdff3e..90b4e53 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -200,9 +200,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 85adc62..84fabf4 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -158,9 +158,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */ .globl relocate_code relocate_code: diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index a69fb17..d0f8a48 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -154,9 +154,7 @@ reset: /* * void relocate_code (addr_sp, gd, addr_moni) * - * This function does not return, instead it continues in RAM - * after relocating the monitor code. - * + * This function relocates the monitor code. */
[U-Boot] [PATCH v12 08/30] nand: mxc: Use appropriate page number in syndrome functions
The syndrome functions should use the page number passed as argument instead of
the page number saved upon NAND_CMD_READ0.
This does not make any difference if the NAND_NO_AUTOINCR option is set, but
otherwise this fixes accesses to the wrong pages.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- New patch.
Changes in v3: None
Changes in v2: None
drivers/mtd/nand/mxc_nand.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 62d6965..29ceab3 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -463,7 +463,7 @@ static int mxc_nand_read_page_raw_syndrome(struct mtd_info
*mtd,
int n;
_mxc_nand_enable_hwecc(mtd, 0);
- chip-cmdfunc(mtd, NAND_CMD_READ0, 0x00, host-page_addr);
+ chip-cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
for (n = 0, steps = chip-ecc.steps; steps 0; n++, steps--) {
host-col_addr = n * eccsize;
@@ -507,7 +507,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
uint8_t *oob = chip-oob_poi;
MTDDEBUG(MTD_DEBUG_LEVEL1, Reading page %u to buf %p oob %p\n,
- host-page_addr, buf, oob);
+ page, buf, oob);
/* first read the data area and the available portion of OOB */
for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
@@ -545,7 +545,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
/* Then switch ECC off and read the OOB area to get the ECC code */
_mxc_nand_enable_hwecc(mtd, 0);
- chip-cmdfunc(mtd, NAND_CMD_READOOB, mtd-writesize, host-page_addr);
+ chip-cmdfunc(mtd, NAND_CMD_READOOB, mtd-writesize, page);
eccsteps = chip-ecc.steps;
oob = chip-oob_poi + chip-ecc.prepad;
for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
--
1.7.10.4
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[U-Boot] [PATCH v12 04/30] nand: mxc: Add support for i.MX5
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Acked-by: Scott Wood scottw...@freescale.com
Tested-by: Fabio Estevam fabio.este...@freescale.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9:
- Drop the now unused SRC register definitions.
Changes in v8:
- Rebase on Fabio's patches using CONFIG_SYS_NAND_BUSWIDTH_16BIT instead of
NAND Flash boot config pins to determine NAND Flash bus width.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- Separate code reformatting from behavioral changes.
Changes in v2: None
drivers/mtd/nand/mxc_nand.c | 119 ++
include/fsl_nfc.h| 79 +++-
nand_spl/nand_boot_fsl_nfc.c | 67 +++-
3 files changed, 250 insertions(+), 15 deletions(-)
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 6ae95d6..db72cdc 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -22,7 +22,8 @@
#include nand.h
#include linux/err.h
#include asm/io.h
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) || \
+ defined(CONFIG_MX51) || defined(CONFIG_MX53)
#include asm/arch/imx-regs.h
#endif
#include fsl_nfc.h
@@ -36,6 +37,9 @@ struct mxc_nand_host {
struct nand_chip*nand;
struct fsl_nfc_regs __iomem *regs;
+#ifdef MXC_NFC_V3_2
+ struct fsl_nfc_ip_regs __iomem *ip_regs;
+#endif
int spare_only;
int status_request;
int pagesize_2k;
@@ -77,7 +81,7 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
.oobfree = { {2, 4}, {11, 11}, {27, 11}, {43, 11}, {59, 5} },
};
#endif
-#elif defined(MXC_NFC_V2_1)
+#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
#ifndef CONFIG_SYS_NAND_LARGEPAGE
static struct nand_ecclayout nand_hw_eccoob = {
.eccbytes = 9,
@@ -127,10 +131,17 @@ static void wait_op_done(struct mxc_nand_host *host, int
max_retries,
uint32_t tmp;
while (max_retries-- 0) {
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
tmp = readnfc(host-regs-config2);
if (tmp NFC_V1_V2_CONFIG2_INT) {
tmp = ~NFC_V1_V2_CONFIG2_INT;
writenfc(tmp, host-regs-config2);
+#elif defined(MXC_NFC_V3_2)
+ tmp = readnfc(host-ip_regs-ipc);
+ if (tmp NFC_V3_IPC_INT) {
+ tmp = ~NFC_V3_IPC_INT;
+ writenfc(tmp, host-ip_regs-ipc);
+#endif
break;
}
udelay(1);
@@ -182,7 +193,7 @@ static void send_prog_page(struct mxc_nand_host *host,
uint8_t buf_id,
if (spare_only)
MTDDEBUG(MTD_DEBUG_LEVEL1, send_prog_page (%d)\n, spare_only);
- if (is_mxc_nfc_21()) {
+ if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
int i;
/*
* The controller copies the 64 bytes of spare data from
@@ -198,11 +209,18 @@ static void send_prog_page(struct mxc_nand_host *host,
uint8_t buf_id,
}
}
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
writenfc(buf_id, host-regs-buf_addr);
+#elif defined(MXC_NFC_V3_2)
+ uint32_t tmp = readnfc(host-regs-config1);
+ tmp = ~NFC_V3_CONFIG1_RBA_MASK;
+ tmp |= NFC_V3_CONFIG1_RBA(buf_id);
+ writenfc(tmp, host-regs-config1);
+#endif
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
- uint16_t config1 = readnfc(host-regs-config1);
+ uint32_t config1 = readnfc(host-regs-config1);
if (spare_only)
config1 |= NFC_CONFIG1_SP_EN;
else
@@ -225,7 +243,14 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
{
MTDDEBUG(MTD_DEBUG_LEVEL3, send_read_page (%d)\n, spare_only);
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
writenfc(buf_id, host-regs-buf_addr);
+#elif defined(MXC_NFC_V3_2)
+ uint32_t tmp = readnfc(host-regs-config1);
+ tmp = ~NFC_V3_CONFIG1_RBA_MASK;
+ tmp |= NFC_V3_CONFIG1_RBA(buf_id);
+ writenfc(tmp, host-regs-config1);
+#endif
/* Configure spare or page+spare access */
if (!host-pagesize_2k) {
@@ -242,7 +267,7 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, spare_only);
- if (is_mxc_nfc_21()) {
+ if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
int i;
/*
@@ -262,10 +287,16 @@ static void send_read_page(struct mxc_nand_host *host,
uint8_t buf_id,
/* Request the NANDFC to perform a
[U-Boot] [PATCH v12 14/30] arm: crt0.S: Remove bogus .globl
The purpose of .globl is to export symbols for ld, not to declare external symbols. By the way, use the ENTRY() and ENDPROC() macros to define functions rather than using .global directly. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: - Rebase on current u-boot-arm/master. Changes in v9: None Changes in v8: - Use ENTRY() and ENDPROC() to define functions. Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/lib/crt0.S | 28 1 file changed, 4 insertions(+), 24 deletions(-) diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 37d9927..1524f7e 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -24,6 +24,7 @@ #include config.h #include asm-offsets.h +#include linux/linkage.h /* * This file handles the target-independent stages of the U-Boot @@ -67,33 +68,10 @@ */ /* - * declare nand_boot() or board_init_r() to jump to at end of crt0 - */ - -#if defined(CONFIG_NAND_SPL) - -.globl nand_boot - -#elif ! defined(CONFIG_SPL_BUILD) - -.globl board_init_r - -#endif - -/* - * start and end of BSS - */ - -.globl __bss_start -.globl __bss_end - -/* * entry point of crt0 sequence */ -.global _main - -_main: +ENTRY(_main) /* * Set up initial C runtime environment and call board_init_f(0). @@ -171,3 +149,5 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */ /* we should not return here. */ #endif + +ENDPROC(_main) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 16/30] Makefile: Change CONFIG_SPL_PAD_TO to image offset
Change CONFIG_SPL_PAD_TO from a link address to an image offset since this is
more handy and closer to the purpose of this config.
Automatically define CONFIG_SPL_PAD_TO to CONFIG_SPL_MAX_SIZE (or 0 without
CONFIG_SPL_MAX_SIZE).
Test that CONFIG_SPL_PAD_TO = CONFIG_SPL_MAX_SIZE if CONFIG_SPL_PAD_TO is
non-zero.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12:
- Use literal constant instead of expression for p1_p2_rdb_pc's
CONFIG_SPL_MAX_SIZE in order to avoid a build issue with --pad-to for
P1021RDB-PC_NAND.
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Rebase on latest u-boot-imx/master.
- Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for u-boot-with-spl.bin
padding.
Changes in v7:
- Use u-boot-spl.bin instead of u-boot-spl in order to avoid having to use
--change-addresses.
Changes in v6:
- Fix size passed to --pad-to thanks to --change-addresses.
Changes in v5: None
Changes in v4:
- New patch.
Changes in v3: None
Changes in v2: None
Makefile |5 ++---
README |7 +--
include/config_fallbacks.h | 16
include/configs/MPC8313ERDB.h |2 +-
include/configs/p1_p2_rdb_pc.h |2 +-
5 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/Makefile b/Makefile
index 4ede937..8d0e2b8 100644
--- a/Makefile
+++ b/Makefile
@@ -486,9 +486,8 @@ $(obj)u-boot.dis: $(obj)u-boot
$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(or $(CONFIG_SPL_PAD_TO),0) \
- -O binary $(obj)spl/u-boot-spl \
- $(obj)spl/u-boot-spl-pad.bin
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+ -I binary -O binary $ $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $@
rm $(obj)spl/u-boot-spl-pad.bin
diff --git a/README b/README
index 9285ddd..6272853 100644
--- a/README
+++ b/README
@@ -2908,8 +2908,11 @@ FIT uImage format:
Support for lib/libgeneric.o in SPL binary
CONFIG_SPL_PAD_TO
- Linker address to which the SPL should be padded before
- appending the SPL payload.
+ Image offset to which the SPL should be padded before appending
+ the SPL payload. By default, this is defined as
+ CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
+ CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
+ payload without any padding, or = CONFIG_SPL_MAX_SIZE.
CONFIG_SPL_TARGET
Final target image containing SPL and payload. Some SPLs
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 9298d0e..e59ee96 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -9,6 +9,22 @@
#ifndef __CONFIG_FALLBACKS_H
#define __CONFIG_FALLBACKS_H
+#ifdef CONFIG_SPL
+#ifdef CONFIG_SPL_PAD_TO
+#ifdef CONFIG_SPL_MAX_SIZE
+#if CONFIG_SPL_PAD_TO CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
+#error CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
+#endif
+#endif
+#else
+#ifdef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE
+#else
+#define CONFIG_SPL_PAD_TO 0
+#endif
+#endif
+#endif
+
#ifndef CONFIG_SYS_BAUDRATE_TABLE
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#endif
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 275d4f2..c28dfe0 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -52,7 +52,7 @@
#define CONFIG_SYS_TEXT_BASE 0x0010 /* CONFIG_SYS_NAND_U_BOOT_DST */
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff0
#define CONFIG_SPL_MAX_SIZE(4 * 1024)
-#define CONFIG_SPL_PAD_TO 0xfff04000
+#define CONFIG_SPL_PAD_TO 0x4000
#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 10)
#define CONFIG_SYS_NAND_U_BOOT_DST 0x0010
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 964bfcd..7ed634b 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -164,7 +164,7 @@
#define CONFIG_SPL_TARGET u-boot-with-spl.bin
#define CONFIG_SPL_TEXT_BASE 0xf000
-#define CONFIG_SPL_MAX_SIZE(4 * 1024)
+#define CONFIG_SPL_MAX_SIZE4096
#ifdef CONFIG_SYS_INIT_L2_ADDR
/* We multiply CONFIG_SPL_MAX_SIZE by two to leave some room for BSS. */
--
1.7.10.4
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[U-Boot] [PATCH v12 12/30] arm: relocate_code(): Remove useless relocation offset computation
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Make sure that r9 is initialized in all cases because it may be used after
relocate_code().
Changes in v7: None
Changes in v6:
- New patch.
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm1136/start.S |8 +++-
arch/arm/cpu/arm1176/start.S |8 +++-
arch/arm/cpu/arm720t/start.S |8 +++-
arch/arm/cpu/arm920t/start.S |8 +++-
arch/arm/cpu/arm925t/start.S |8 +++-
arch/arm/cpu/arm926ejs/start.S |9 +++--
arch/arm/cpu/arm946es/start.S |8 +++-
arch/arm/cpu/arm_intcm/start.S |8 +++-
arch/arm/cpu/armv7/start.S |8 +++-
arch/arm/cpu/ixp/start.S |8 +++-
arch/arm/cpu/pxa/start.S |8 +++-
arch/arm/cpu/s3c44b0/start.S |8 +++-
arch/arm/cpu/sa1100/start.S|8 +++-
13 files changed, 39 insertions(+), 66 deletions(-)
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 5225639..67fcc4f 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -185,16 +185,15 @@ relocate_code:
mov r6, r2 /* save addr of destination */
adr r0, _start
- cmp r0, r6
- moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
- ldmia r0!, {r9-r10} /* copy from source address [r0]*/
- stmia r1!, {r9-r10} /* copy to target address [r1]*/
+ ldmia r0!, {r10-r11} /* copy from source address [r0]*/
+ stmia r1!, {r10-r11} /* copy to target address [r1]*/
cmp r0, r2 /* until source end address [r2]*/
blo copy_loop
@@ -203,7 +202,6 @@ copy_loop:
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 - Text base */
- sub r9, r6, r0 /* r9 - relocation offset */
ldr r10, _dynsym_start_ofs /* r10 - sym table ofs */
add r10, r10, r0/* r10 - sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 - rel dyn start ofs */
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index c0698e6..17b1277 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -248,16 +248,15 @@ relocate_code:
mov r6, r2 /* save addr of destination */
adr r0, _start
- cmp r0, r6
- moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
- ldmia r0!, {r9-r10} /* copy from source address [r0]*/
- stmia r1!, {r9-r10} /* copy to target address [r1]*/
+ ldmia r0!, {r10-r11} /* copy from source address [r0]*/
+ stmia r1!, {r10-r11} /* copy to target address [r1]*/
cmp r0, r2 /* until source end address [r2]*/
blo copy_loop
@@ -266,7 +265,6 @@ copy_loop:
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 - Text base */
- sub r9, r6, r0 /* r9 - relocation offset */
ldr r10, _dynsym_start_ofs /* r10 - sym table ofs */
add r10, r10, r0/* r10 - sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 - rel dyn start ofs */
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index c65af3f..95f4447 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -163,16 +163,15 @@ relocate_code:
mov r6, r2 /* save addr of destination */
adr r0, _start
- cmp r0, r6
- moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
- ldmia r0!, {r9-r10} /* copy from source
[U-Boot] [PATCH v12 17/30] imx: Fix automatic make targets for imx images
Automatically build the 'u-boot.imx' (i.e. imx header + u-boot.bin) and 'SPL' (i.e. imx header + u-boot-spl.bin) make targets for all imx processors supporting this header, so for arm926ejs, arm1136 and armv7. Some combinations were missing. At the same time, fix the build of SPL targets not supporting the imx header on arm1136. For arm1136, the 'SPL' make target was forced to build in all cases if CONFIG_SPL_BUILD was defined, even for non-imx platforms or imx setups without an imx header. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - New patch, extracted from nand: mxc: Switch NAND SPL to generic SPL. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/config.mk |7 +++ arch/arm/cpu/arm926ejs/config.mk |8 ++-- arch/arm/cpu/armv7/config.mk |6 ++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk index 9092d91..797d122 100644 --- a/arch/arm/cpu/arm1136/config.mk +++ b/arch/arm/cpu/arm1136/config.mk @@ -31,6 +31,13 @@ PLATFORM_CPPFLAGS += -march=armv5 # = PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) + +ifneq ($(CONFIG_IMX_CONFIG),) +ifdef CONFIG_SPL ifdef CONFIG_SPL_BUILD ALL-y += $(OBJTREE)/SPL endif +else +ALL-y += $(obj)u-boot.imx +endif +endif diff --git a/arch/arm/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk index 6a3a1bb..f0e31d1 100644 --- a/arch/arm/cpu/arm926ejs/config.mk +++ b/arch/arm/cpu/arm926ejs/config.mk @@ -33,7 +33,11 @@ PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-mali PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) ifneq ($(CONFIG_IMX_CONFIG),) - +ifdef CONFIG_SPL +ifdef CONFIG_SPL_BUILD +ALL-y += $(OBJTREE)/SPL +endif +else ALL-y += $(obj)u-boot.imx - +endif endif diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk index 9c3e2f3..56b8053 100644 --- a/arch/arm/cpu/armv7/config.mk +++ b/arch/arm/cpu/armv7/config.mk @@ -40,5 +40,11 @@ PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,) PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED) ifneq ($(CONFIG_IMX_CONFIG),) +ifdef CONFIG_SPL +ifdef CONFIG_SPL_BUILD +ALL-y += $(OBJTREE)/SPL +endif +else ALL-y += $(obj)u-boot.imx endif +endif -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 13/30] arm: relocate_code(): Use __image_copy_end for end of relocation
Use __image_copy_end instead of __bss_start for the end of the image to
relocate. This is the same as commit 033ca72, but applied to all ARM start.S.
This is a more appropriate symbol naming for an image copy relocate feature,
and this also saves a useless copy of data put between __image_copy_end and
__bss_start in linker scripts (e.g. relocation information, or MMU
initialization tables used only before jumping to the relocated image).
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Rebase on current u-boot-arm/master.
Changes in v9: None
Changes in v8:
- Fix space before tab warning.
- Give more details in patch description.
Changes in v7: None
Changes in v6:
- New patch.
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm1136/start.S |4 ++--
arch/arm/cpu/arm1176/start.S |6 +-
arch/arm/cpu/arm720t/start.S |6 +-
arch/arm/cpu/arm920t/ep93xx/u-boot.lds |3 +++
arch/arm/cpu/arm920t/start.S |6 +-
arch/arm/cpu/arm925t/start.S |6 +-
arch/arm/cpu/arm926ejs/start.S |6 +-
arch/arm/cpu/arm946es/start.S |6 +-
arch/arm/cpu/arm_intcm/start.S |6 +-
arch/arm/cpu/armv7/start.S |4 ++--
arch/arm/cpu/ixp/start.S |6 +-
arch/arm/cpu/ixp/u-boot.lds|2 ++
arch/arm/cpu/pxa/start.S |6 +-
arch/arm/cpu/s3c44b0/start.S |6 +-
arch/arm/cpu/sa1100/start.S|6 +-
board/actux1/u-boot.lds|3 +++
board/actux2/u-boot.lds|3 +++
board/actux3/u-boot.lds|3 +++
board/davinci/da8xxevm/u-boot-spl-hawk.lds |1 +
board/dvlhost/u-boot.lds |3 +++
board/samsung/smdk6400/u-boot-nand.lds |4
board/vpac270/u-boot-spl.lds |2 ++
nand_spl/board/karo/tx25/u-boot.lds|2 ++
nand_spl/board/samsung/smdk6400/u-boot.lds |2 ++
24 files changed, 87 insertions(+), 15 deletions(-)
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 67fcc4f..e36d7d3 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -104,9 +104,9 @@ _TEXT_BASE:
_bss_start_ofs:
.word __bss_start - _start
-.global_image_copy_end_ofs
+.globl _image_copy_end_ofs
_image_copy_end_ofs:
- .word __image_copy_end - _start
+ .word __image_copy_end - _start
.globl _bss_end_ofs
_bss_end_ofs:
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 17b1277..0b570d5 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -127,6 +127,10 @@ _TEXT_PHY_BASE:
_bss_start_ofs:
.word __bss_start - _start
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+ .word __image_copy_end - _start
+
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end - _start
@@ -251,7 +255,7 @@ relocate_code:
subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
- ldr r3, _bss_start_ofs
+ ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 95f4447..a640eaa 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -101,6 +101,10 @@ _TEXT_BASE:
_bss_start_ofs:
.word __bss_start - _start
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+ .word __image_copy_end - _start
+
.globl _bss_end_ofs
_bss_end_ofs:
.word __bss_end - _start
@@ -166,7 +170,7 @@ relocate_code:
subsr9, r6, r0 /* r9 - relocation offset */
beq relocate_done /* skip relocation */
mov r1, r6 /* r1 - scratch for copy_loop */
- ldr r3, _bss_start_ofs
+ ldr r3, _image_copy_end_ofs
add r2, r0, r3 /* r2 - source end address */
copy_loop:
diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index e483820..d0b1ada 100644
--- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -55,6 +55,9 @@ SECTIONS
}
. = ALIGN(4);
+
+ __image_copy_end = .;
+
__bss_start = .;
.bss : { *(.bss) }
__bss_end = .;
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index cd8c8db..940ce72 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -89,6 +89,10 @@ _TEXT_BASE:
_bss_start_ofs:
[U-Boot] [PATCH v12 15/30] autoconfig.mk: Make it possible to define configs from other configs
Give more flexibility to define configs that can be interpreted by make, e.g. to define fallback values of configs like in the example below. Before this change, the config lines: #define CONFIG_SPL_MAX_SIZE2048 #define CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE would have been changed in autoconfig.mk into: CONFIG_SPL_MAX_SIZE=2048 CONFIG_SPL_PAD_TO=CONFIG_SPL_MAX_SIZE Hence, a make recipe using as an argument to $(OBJCOPY): --pad-to=$(CONFIG_SPL_PAD_TO) would have issued: --pad-to=CONFIG_SPL_MAX_SIZE which means nothing for $(OBJCOPY) and makes it fail. Thanks to this change, the config lines above are changed in autoconfig.mk into: CONFIG_SPL_MAX_SIZE=2048 CONFIG_SPL_PAD_TO=$(CONFIG_SPL_MAX_SIZE) Hence, the make recipe above now issues: --pad-to=2048 as expected from the defined config. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Reviewed-by: Tom Rini tr...@ti.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: - Add detailed patch description. Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None tools/scripts/define2mk.sed |2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/scripts/define2mk.sed b/tools/scripts/define2mk.sed index 13e2845..c641edf 100644 --- a/tools/scripts/define2mk.sed +++ b/tools/scripts/define2mk.sed @@ -24,6 +24,8 @@ s/=\([0-9][0-9]*\)/=\1/; # ... and from hex numbers s/=\(0[Xx][0-9a-fA-F][0-9a-fA-F]*\)/=\1/; + # ... and from configs defined from other configs + s/=\(CONFIG_[A-Za-z0-9_][A-Za-z0-9_]*\)/=$(\1)/; # Change '1' and empty values to y (not perfect, but # supports conditional compilation in the makefiles s/=$/=y/; -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 19/30] arm926ejs: Remove deprecated and now unused NAND SPL
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: - Rebase on current u-boot-arm/master. Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm926ejs/start.S | 10 -- 1 file changed, 10 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 0a9cf1d..3c9de3f 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -120,15 +120,11 @@ _fiq: .globl _TEXT_BASE _TEXT_BASE: -#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ - .word CONFIG_SYS_TEXT_BASE -#else #if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE #endif -#endif /* * These are defined in the board-specific linker script. @@ -152,12 +148,6 @@ _bss_end_ofs: _end_ofs: .word _end - _start -#ifdef CONFIG_NAND_U_BOOT -.globl _end -_end: - .word __bss_end -#endif - #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ .globl IRQ_STACK_START -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 23/30] imx: Add u-boot-with-spl.imx make target
This image combines the SPL with the i.MX header and U-Boot. This is a
convenient way of having a single image to program on some boot devices.
The i.MX header has to be added to the SPL before appending U-Boot, so that the
boot ROM loads only the SPL.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding, which
allows to pad the SPL after adding the i.MX header, which may save time when
the boot ROM loads the SPL.
- Add /u-boot-with-spl.imx to .gitignore.
Changes in v7:
- New patch.
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.gitignore |1 +
Makefile |5 +
arch/arm/imx-common/Makefile |6 ++
3 files changed, 12 insertions(+)
diff --git a/.gitignore b/.gitignore
index bff721e..e42d837 100644
--- a/.gitignore
+++ b/.gitignore
@@ -30,6 +30,7 @@
/u-boot
/u-boot.hex
/u-boot.imx
+/u-boot-with-spl.imx
/u-boot.map
/u-boot.srec
/u-boot.ldr
diff --git a/Makefile b/Makefile
index caca851..e22faa5 100644
--- a/Makefile
+++ b/Makefile
@@ -486,6 +486,10 @@ $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin
$(obj)u-boot.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin $@
rm $(obj)spl/u-boot-spl-pad.bin
+$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+ $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(OBJTREE)/u-boot-with-spl.imx
+
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $ $(obj)u-boot.ubl
@@ -850,6 +854,7 @@ clobber:tidy
@rm -f $(obj)u-boot.kwb
@rm -f $(obj)u-boot.pbl
@rm -f $(obj)u-boot.imx
+ @rm -f $(obj)u-boot-with-spl.imx
@rm -f $(obj)u-boot.ubl
@rm -f $(obj)u-boot.ais
@rm -f $(obj)u-boot.dtb
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 428a57e..f59ae6f 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -55,6 +55,12 @@ $(OBJTREE)/SPL: $(OBJTREE)/spl/u-boot-spl.bin
$(OBJTREE)/$(patsubst %,%,$(CONF
$(OBJTREE)/tools/mkimage -n $(filter-out %.bin,$^) -T imximage \
-e $(CONFIG_SPL_TEXT_BASE) -d $ $@
+$(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+ -I binary -O binary $ $(OBJTREE)/spl/u-boot-spl-pad.imx
+ cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.bin $@
+ rm $(OBJTREE)/spl/u-boot-spl-pad.imx
+
#
--
1.7.10.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 18/30] nand: mxc: Switch NAND SPL to generic SPL
This also fixes support for mx31pdk and tx25, which had been broken by commit e05e5de7fae5bec79617e113916dac6631251156. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Acked-by: Scott Wood scottw...@freescale.com Tested-by: Fabio Estevam fabio.este...@freescale.com --- Changes in v12: None Changes in v11: - mx31pdk: Rename u-boot-nand.bin to u-boot-with-spl.bin (new target binary name) in prg_uboot command. - mx31pdk: Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x32000 to 0x3f800 (which corresponds to the size allocated for this purpose in NAND Flash) in order to leave enough room whatever the toolchain used. - mx31pdk: Set back CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE by 0x0010 because the original U-Boot at CONFIG_SYS_TEXT_BASE was overlapping the global data being written prior to relocation by arch/arm/lib/board.c:board_init_f(). Changes in v10: - Rebase on current u-boot-arm/master, especially following commits 3ebd1cb and 65cdd64, which make it necessary to change CONFIG_SPL_LDSCRIPT to arch/$(ARCH)/cpu/u-boot-spl.lds for mx31pdk.h and tx25.h. Changes in v9: None Changes in v8: - Update doc/README.arm-relocation. - Drop useless line feed at end of inline asm. - Set CONFIG_SYS_NAND_U_BOOT_OFFS to CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE (this is a cosmetic change since they now have the same value). - Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x3 to 0x32000 to let u-boot.bin fit in for mx31pdk. Changes in v7: None Changes in v6: - Automate 'u-boot.imx' and 'SPL' make targets for all imx processors. - Move board_init_f() to board.c. - Get rid of board SPL linker scripts. - Define CONFIG_SYS_NAND_U_BOOT_OFFS as CONFIG_SPL_MAX_SIZE rather than duplicating the constant value. - Define CONFIG_SYS_NAND_U_BOOT_DST as CONFIG_SYS_TEXT_BASE rather than duplicating the constant value. - Pass 0 as the 1st argument to relocate_code() since it's unused. - Fix stack pointers. - Rebase on latest u-boot-imx/master. - Move unrelated changes to separate patches. Changes in v5: - Remove spaces between function name and open parenthesis. - Fix mx31pdk and tx25 Makefile-s and SPL linker scripts. - Remove the useless definition of CONFIG_SPL_LDSCRIPT. - Fix the call to nand_boot(). Changes in v4: - New patch. Changes in v3: None Changes in v2: None arch/arm/cpu/arm926ejs/start.S |3 +- board/freescale/mx31pdk/Makefile |3 + board/freescale/mx31pdk/config.mk |5 -- board/freescale/mx31pdk/mx31pdk.c |8 ++ board/karo/tx25/Makefile |4 +- board/karo/tx25/config.mk |5 -- board/karo/tx25/tx25.c |8 ++ boards.cfg |2 +- doc/README.arm-relocation | 14 ++-- drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/mxc_nand.c| 10 +-- include/fsl_nfc.h = drivers/mtd/nand/mxc_nand.h | 10 +-- .../mtd/nand/mxc_nand_spl.c| 26 ++ include/configs/mx31pdk.h | 21 +++-- include/configs/tx25.h | 22 +++-- nand_spl/board/freescale/mx31pdk/Makefile | 63 -- nand_spl/board/freescale/mx31pdk/u-boot.lds| 87 nand_spl/board/karo/tx25/Makefile | 84 --- nand_spl/board/karo/tx25/config.mk |1 - nand_spl/board/karo/tx25/u-boot.lds| 87 20 files changed, 81 insertions(+), 383 deletions(-) delete mode 100644 board/freescale/mx31pdk/config.mk delete mode 100644 board/karo/tx25/config.mk rename include/fsl_nfc.h = drivers/mtd/nand/mxc_nand.h (98%) rename nand_spl/nand_boot_fsl_nfc.c = drivers/mtd/nand/mxc_nand_spl.c (92%) delete mode 100644 nand_spl/board/freescale/mx31pdk/Makefile delete mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds delete mode 100644 nand_spl/board/karo/tx25/Makefile delete mode 100644 nand_spl/board/karo/tx25/config.mk delete mode 100644 nand_spl/board/karo/tx25/u-boot.lds diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 552279f..0a9cf1d 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -200,7 +200,6 @@ reset: /*--*/ -#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_NAND_SPL) /* * void relocate_code (addr_sp, gd, addr_moni) * @@ -269,6 +268,8 @@ relocate_done: bx lr +#ifndef CONFIG_SPL_BUILD + _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile index 5b7cafd..b910722 100644 ---
[U-Boot] [PATCH v12 22/30] .gitignore: Add /SPL
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None .gitignore |1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index be09894..bff721e 100644 --- a/.gitignore +++ b/.gitignore @@ -25,6 +25,7 @@ # /MLO +/SPL /System.map /u-boot /u-boot.hex -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 21/30] Makefile: Move SHELL setup to config.mk
make never uses the SHELL variable from the environment. Instead, it uses /bin/sh, or the value assigned to the SHELL variable by the Makefile. This makes the export of the SHELL variable useless for sub-makes (but still useful for the environment of recipes). However, we want all makes to use the same shell. This patch fixes this issue by moving the SHELL variable setup and export to the top config.mk, so that all Makefile-s including it use the same shell. Since BASH is used by default, this makes it possible to use things like 'echo -e ...' in sub-makes, which would otherwise fail e.g. with /bin/sh symlinked to /bin/dash on Ubuntu. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com Reviewed-by: Tom Rini tr...@ti.com --- Changes in v12: None Changes in v11: None Changes in v10: - Rebase on current u-boot-arm/master. Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Makefile |7 +-- config.mk |7 +++ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/Makefile b/Makefile index 8d0e2b8..caca851 100644 --- a/Makefile +++ b/Makefile @@ -46,12 +46,7 @@ HOSTARCH := $(shell uname -m | \ HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \ sed -e 's/\(cygwin\).*/cygwin/') -# Set shell to bash if possible, otherwise fall back to sh -SHELL := $(shell if [ -x $$BASH ]; then echo $$BASH; \ - else if [ -x /bin/bash ]; then echo /bin/bash; \ - else echo sh; fi; fi) - -export HOSTARCH HOSTOS SHELL +export HOSTARCH HOSTOS # Deal with colliding definitions from tcsh etc. VENDOR= diff --git a/config.mk b/config.mk index 4e6a19b..1fd109f 100644 --- a/config.mk +++ b/config.mk @@ -23,6 +23,13 @@ # +# Set shell to bash if possible, otherwise fall back to sh +SHELL := $(shell if [ -x $$BASH ]; then echo $$BASH; \ + else if [ -x /bin/bash ]; then echo /bin/bash; \ + else echo sh; fi; fi) + +export SHELL + ifeq ($(CURDIR),$(SRCTREE)) dir := else -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 20/30] arm: Remove unused relocate_code() parameters
Commit e05e5de7fae5bec79617e113916dac6631251156 made the 2 1st parameters of ARM's relocate_code() useless since it moved the code handling them to crt0.S. So, drop these parameters. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - Update the function prototype in start.S comments. Changes in v7: None Changes in v6: - New patch. Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1136/start.S |6 ++ arch/arm/cpu/arm1176/start.S |6 ++ arch/arm/cpu/arm720t/start.S |6 ++ arch/arm/cpu/arm920t/start.S |6 ++ arch/arm/cpu/arm925t/start.S |6 ++ arch/arm/cpu/arm926ejs/start.S |6 ++ arch/arm/cpu/arm946es/start.S |6 ++ arch/arm/cpu/arm_intcm/start.S |6 ++ arch/arm/cpu/armv7/start.S |6 ++ arch/arm/cpu/ixp/start.S |6 ++ arch/arm/cpu/pxa/start.S |6 ++ arch/arm/cpu/s3c44b0/start.S |6 ++ arch/arm/cpu/sa1100/start.S|6 ++ arch/arm/lib/crt0.S|8 +++- board/freescale/mx31pdk/mx31pdk.c |2 +- board/karo/tx25/tx25.c |2 +- board/samsung/smdk6400/smdk6400_nand_spl.c |3 +-- include/common.h |8 18 files changed, 36 insertions(+), 65 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index e36d7d3..ad24b80 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -174,15 +174,13 @@ next: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 0b570d5..5654c19 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -241,15 +241,13 @@ skip_tcmdisable: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index a640eaa..9facc7e 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -156,15 +156,13 @@ reset: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 940ce72..6250025 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -195,15 +195,13 @@ copyex: /*--*/ /* - * void relocate_code (addr_sp, gd, addr_moni) + * void relocate_code(addr_moni) * * This function relocates the monitor code. */ .globl relocate_code relocate_code: - mov r4, r0 /* save addr_sp */ - mov r5, r1 /* save addr of gd */ - mov r6, r2 /* save addr of destination */ + mov r6, r0 /* save addr of destination */ adr r0, _start subsr9, r6, r0 /* r9 - relocation offset */ diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index ed683b4..021e241 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -185,15 +185,13 @@ poll1:
[U-Boot] [PATCH v12 24/30] imx: Add u-boot-with-nand-spl.imx make target
This image combines the SPL with the i.MX header, the FCB and U-Boot.
For i.MX25/35/51, the FCB is ignored by the boot ROM, so this image is just
useful because it can be programmed on a NAND Flash page boundary.
For i.MX53, the FCB is required by the boot ROM.
This does not support i.MX6 so far because its FCB is more complicated.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Change the dummy 1024-byte header into a true FCB in order to add support for
i.MX53.
- Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding, which
allows to pad the SPL after adding the i.MX header and the FCB, which may
save time when the boot ROM loads the SPL.
- Add /u-boot-with-nand-spl.imx to .gitignore.
Changes in v7:
- New patch.
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.gitignore |1 +
Makefile |5 +
arch/arm/imx-common/Makefile | 11 +++
3 files changed, 17 insertions(+)
diff --git a/.gitignore b/.gitignore
index e42d837..ed21203 100644
--- a/.gitignore
+++ b/.gitignore
@@ -31,6 +31,7 @@
/u-boot.hex
/u-boot.imx
/u-boot-with-spl.imx
+/u-boot-with-nand-spl.imx
/u-boot.map
/u-boot.srec
/u-boot.ldr
diff --git a/Makefile b/Makefile
index e22faa5..df03974 100644
--- a/Makefile
+++ b/Makefile
@@ -490,6 +490,10 @@ $(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin
$(obj)u-boot.bin
$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
$(OBJTREE)/u-boot-with-spl.imx
+$(obj)u-boot-with-nand-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+ $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(OBJTREE)/u-boot-with-nand-spl.imx
+
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $ $(obj)u-boot.ubl
@@ -855,6 +859,7 @@ clobber:tidy
@rm -f $(obj)u-boot.pbl
@rm -f $(obj)u-boot.imx
@rm -f $(obj)u-boot-with-spl.imx
+ @rm -f $(obj)u-boot-with-nand-spl.imx
@rm -f $(obj)u-boot.ubl
@rm -f $(obj)u-boot.ais
@rm -f $(obj)u-boot.dtb
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index f59ae6f..44b6822 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -61,6 +61,17 @@ $(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL
$(OBJTREE)/u-boot.bin
cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.bin $@
rm $(OBJTREE)/spl/u-boot-spl-pad.imx
+$(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
+ (echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' \
+ dd bs=1015 count=1 if=/dev/zero 2/dev/null) | \
+ cat - $ $(OBJTREE)/spl/u-boot-nand-spl.imx
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+ -I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \
+ $(OBJTREE)/spl/u-boot-nand-spl-pad.imx
+ rm $(OBJTREE)/spl/u-boot-nand-spl.imx
+ cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.bin $@
+ rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx
+
#
--
1.7.10.4
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[U-Boot] [PATCH v12 26/30] Revert mkconfig: start deprecating Makefile config targets
This reverts commit 1285a2808a254f3d1a809c1a541f0c0f746e03d7 since the migration
of boards from Makefile to boards.cfg is now complete.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12: None
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- New patch.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
doc/feature-removal-schedule.txt | 16
mkconfig |9 -
2 files changed, 25 deletions(-)
diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt
index 58db440..ce72861 100644
--- a/doc/feature-removal-schedule.txt
+++ b/doc/feature-removal-schedule.txt
@@ -51,22 +51,6 @@ Who: Andy Fleming aflem...@freescale.com and driver
maintainers
---
-What: boards with xxx_config targets in top level Makefile
-When: Release v2012.03
-
-Why: We have a boards.cfg file which the vast majority of boards have
- converted over to. Boards that still manually run mkconfig in the
- top level Makefile are either dead, or the maintainer doesn't care,
- or they are doing something weird/wrong that should be fixed in a
- different way, or they need to extend boards.cfg syntax (unlikely).
-
- In any case, if no one cares about these boards to figure out how
- to make boards.cfg work, then we'll just punt them.
-
-Who: Mike Frysinger vap...@gentoo.org
-
-
What: GPL cleanup
When: August 2009
Why: Over time, a couple of files have sneaked in into the U-Boot
diff --git a/mkconfig b/mkconfig
index 7c9aa74..73f852e 100755
--- a/mkconfig
+++ b/mkconfig
@@ -29,15 +29,6 @@ if [ \( $# -eq 2 \) -a \( $1 = -A \) ] ; then
set ${line}
# add default board name if needed
[ $# = 3 ] set ${line} ${1}
-elif [ ${MAKEFLAGS+set}${MAKELEVEL+set} = setset ] ; then
- # only warn when using a config target in the Makefile
- cat -EOF
-
- warning: Please migrate to boards.cfg. Failure to do so will
-mean removal of your board in the next release.
-
- EOF
- sleep 5
fi
while [ $# -gt 0 ] ; do
--
1.7.10.4
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[U-Boot] [PATCH v12 28/30] arm: Remove deprecated and now unused NAND SPL
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/config.mk |2 -- arch/arm/cpu/arm1176/start.S | 12 arch/arm/lib/crt0.S | 16 ++-- 3 files changed, 6 insertions(+), 24 deletions(-) diff --git a/arch/arm/config.mk b/arch/arm/config.mk index e7839be..461899e 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -87,9 +87,7 @@ endif endif # needed for relocation -ifndef CONFIG_NAND_SPL LDFLAGS_u-boot += -pie -endif # # FIXME: binutils versions 2.22 have a bug in the assembler where diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 5654c19..a7cf728 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -51,7 +51,7 @@ .globl _start _start: b reset -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -98,15 +98,11 @@ _end_vect: .globl _TEXT_BASE _TEXT_BASE: -#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */ - .word CONFIG_SYS_TEXT_BASE -#else #if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) .word CONFIG_SPL_TEXT_BASE #else .word CONFIG_SYS_TEXT_BASE #endif -#endif /* * Below variable is very important because we use MMU in U-Boot. @@ -176,7 +172,7 @@ cpu_init_crit: * When booting from NAND - it has definitely been a reset, so, no need * to flush caches and disable the MMU */ -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * flush v4 I/D caches */ @@ -361,7 +357,7 @@ c_runtime_cpu_setup: mov pc, lr -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * we assume that cache operation is done before. (eg. cleanup_before_linux()) * actually, we don't need to do anything about cache if not use d-cache in @@ -539,4 +535,4 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index fa25319..a9657d1 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -64,7 +64,7 @@ *have some work left to do at this point regarding memory, so *call c_runtime_cpu_setup. * - * 6. Branch to either nand_boot() or board_init_r(). + * 6. Branch to board_init_r(). */ /* @@ -77,10 +77,7 @@ ENTRY(_main) * Set up initial C runtime environment and call board_init_f(0). */ -#if defined(CONFIG_NAND_SPL) - /* deprecated, use instead CONFIG_SPL_BUILD */ - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) -#elif defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_STACK) +#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_STACK) ldr sp, =(CONFIG_SPL_STACK) #else ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) @@ -129,21 +126,12 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */ bl coloured_LED_init bl red_led_on -#if defined(CONFIG_NAND_SPL) - - /* call _nand_boot() */ - ldr pc, =nand_boot - -#else - /* call board_init_r(gd_t *id, ulong dest_addr) */ mov r0, r8 /* gd_t */ ldr r1, [r8, #GD_RELOCADDR] /* dest_addr */ /* call board_init_r */ ldr pc, =board_init_r /* this is auto-relocated! */ -#endif - /* we should not return here. */ #endif -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 29/30] arm1176: Remove unused MMU setup from start.S
Following the removal of the smdk6400 board, the MMU setup code in arm1176/start.S becomes unused, so remove it. It will still be possible to restore it later from the Git history if necessary, in which case it should be moved out of the relocate_code() function. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: - Do not use scrapyard in patch description because this is reserved to refer to the board scrapyard file. Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/cpu/arm1176/start.S | 91 +- 1 file changed, 1 insertion(+), 90 deletions(-) diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index a7cf728..1fc1da0 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -33,11 +33,8 @@ #include asm-offsets.h #include config.h #include version.h -#ifdef CONFIG_ENABLE_MMU -#include asm/proc/domain.h -#endif -#if !defined(CONFIG_ENABLE_MMU) !defined(CONFIG_SYS_PHY_UBOOT_BASE) +#ifndef CONFIG_SYS_PHY_UBOOT_BASE #define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE #endif @@ -105,14 +102,6 @@ _TEXT_BASE: #endif /* - * Below variable is very important because we use MMU in U-Boot. - * Without it, we cannot run code correctly before MMU is ON. - * by scsuh. - */ -_TEXT_PHY_BASE: - .word CONFIG_SYS_PHY_UBOOT_BASE - -/* * These are defined in the board-specific linker script. * Subtracting _start from them lets the linker put their * relative position in the executable instead of leaving @@ -298,44 +287,6 @@ fixnext: blo fixloop #endif -#ifdef CONFIG_ENABLE_MMU -enable_mmu: - /* enable domain access */ - ldr r5, =0x - mcr p15, 0, r5, c3, c0, 0 /* load domain access register */ - - /* Set the TTB register */ - ldr r0, _mmu_table_base - ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE - ldr r2, =0xfff0 - bic r0, r0, r2 - orr r1, r0, r1 - mcr p15, 0, r1, c2, c0, 0 - - /* Enable the MMU */ - mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #1 /* Set CR_M to enable MMU */ - - /* Prepare to enable the MMU */ - adr r1, skip_hw_init - and r1, r1, #0x3fc - ldr r2, _TEXT_BASE - ldr r3, =0xfff0 - and r2, r2, r3 - orr r2, r2, r1 - b mmu_enable - - .align 5 - /* Run in a single cache-line */ -mmu_enable: - - mcr p15, 0, r0, c1, c0, 0 - nop - nop - mov pc, r2 -skip_hw_init: -#endif - relocate_done: bx lr @@ -347,11 +298,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#ifdef CONFIG_ENABLE_MMU -_mmu_table_base: - .word mmu_table -#endif - .globl c_runtime_cpu_setup c_runtime_cpu_setup: @@ -359,41 +305,6 @@ c_runtime_cpu_setup: #ifndef CONFIG_SPL_BUILD /* - * we assume that cache operation is done before. (eg. cleanup_before_linux()) - * actually, we don't need to do anything about cache if not use d-cache in - * U-Boot. So, in this function we clean only MMU. by scsuh - * - * voidtheLastJump(void *kernel, int arch_num, uint boot_params); - */ -#ifdef CONFIG_ENABLE_MMU - .globl theLastJump -theLastJump: - mov r9, r0 - ldr r3, =0xfff0 - ldr r4, _TEXT_PHY_BASE - adr r5, phy_last_jump - bic r5, r5, r3 - orr r5, r5, r4 - mov pc, r5 -phy_last_jump: - /* -* disable MMU stuff -*/ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x2300 /* clear bits 13, 9:8 (--V- --RS) */ - bic r0, r0, #0x0087 /* clear bits 7, 2:0 (B--- -CAM) */ - orr r0, r0, #0x0002 /* set bit 2 (A) Align */ - orr r0, r0, #0x1000 /* set bit 12 (I) I-Cache */ - mcr p15, 0, r0, c1, c0, 0 - - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - - mov r0, #0 - mov pc, r9 -#endif - - -/* * * * Interrupt handling -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v12 30/30] arm: Make all linker scripts compatible with per-symbol sections
Let all ARM linker scripts handle properly -ffunction-sections
and -fdata-sections. This will be useful for future changes in order to create
symbol-specific sections in common .S files.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
Changes in v12: None
Changes in v11: None
Changes in v10:
- Rebase on current u-boot-arm/master.
Changes in v9:
- Reword following the removal of arm: Remove duplicated start.S code.
Changes in v8:
- New patch.
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm1136/u-boot-spl.lds|2 +-
arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 10 +-
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds |6 +++---
arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds|6 +++---
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds |2 +-
arch/arm/cpu/armv7/socfpga/u-boot-spl.lds |2 +-
board/ait/cam_enc_4xx/u-boot-spl.lds |2 +-
board/davinci/da8xxevm/u-boot-spl-da850evm.lds |2 +-
board/davinci/da8xxevm/u-boot-spl-hawk.lds |8
board/freescale/mx31ads/u-boot.lds | 18 +-
board/samsung/smdk5250/smdk5250-uboot-spl.lds |2 +-
board/vpac270/u-boot-spl.lds |4 ++--
12 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm/cpu/arm1136/u-boot-spl.lds
b/arch/arm/cpu/arm1136/u-boot-spl.lds
index b09b4eb..8296e5d 100644
--- a/arch/arm/cpu/arm1136/u-boot-spl.lds
+++ b/arch/arm/cpu/arm1136/u-boot-spl.lds
@@ -38,7 +38,7 @@ SECTIONS
.text :
{
__start = .;
- arch/arm/cpu/arm1136/start.o (.text)
+ arch/arm/cpu/arm1136/start.o (.text*)
*(.text*)
} .sram
diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index d0b1ada..cf55bf7 100644
--- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -31,18 +31,18 @@ SECTIONS
. = ALIGN(4);
.text :
{
- arch/arm/cpu/arm920t/start.o (.text)
+ arch/arm/cpu/arm920t/start.o (.text*)
/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
. = 0x1000;
LONG(0x53555243)
- *(.text)
+ *(.text*)
}
. = ALIGN(4);
- .rodata : { *(.rodata) }
+ .rodata : { *(.rodata*) }
. = ALIGN(4);
- .data : { *(.data) }
+ .data : { *(.data*) }
. = ALIGN(4);
.got : { *(.got) }
@@ -59,7 +59,7 @@ SECTIONS
__image_copy_end = .;
__bss_start = .;
- .bss : { *(.bss) }
+ .bss : { *(.bss*) }
__bss_end = .;
_end = .;
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
index 67b204e..673c725 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
@@ -37,8 +37,8 @@ SECTIONS
. = ALIGN(4);
.text :
{
- arch/arm/cpu/arm926ejs/mxs/start.o (.text)
- *(.text)
+ arch/arm/cpu/arm926ejs/mxs/start.o (.text*)
+ *(.text*)
}
. = ALIGN(4);
@@ -46,7 +46,7 @@ SECTIONS
. = ALIGN(4);
.data : {
- *(.data)
+ *(.data*)
}
. = ALIGN(4);
diff --git a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
index 7405917..967a135 100644
--- a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
@@ -37,8 +37,8 @@ SECTIONS
. = ALIGN(4);
.text :
{
- arch/arm/cpu/arm926ejs/spear/start.o(.text)
- *(.text)
+ arch/arm/cpu/arm926ejs/spear/start.o(.text*)
+ *(.text*)
}
. = ALIGN(4);
@@ -46,7 +46,7 @@ SECTIONS
. = ALIGN(4);
.data : {
- *(.data)
+ *(.data*)
}
. = ALIGN(4);
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index efae381..bd218c0 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -38,7 +38,7 @@ SECTIONS
.text :
{
__start = .;
- arch/arm/cpu/armv7/start.o (.text)
+ arch/arm/cpu/armv7/start.o (.text*)
*(.text*)
} .sram
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
index 79cc93c..15f8c01 100644
--- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
@@ -27,7 +27,7 @@ SECTIONS
. = ALIGN(4);
.text :
{
- arch/arm/cpu/armv7/start.o (.text)
+
[U-Boot] [PATCH v12 25/30] arm: Remove support for smdk6400
The migration of boards from Makefile to boards.cfg was due for v2012.03, but smdk6400 did not follow, and it does not build, so move it to scrapyard. It will still be possible to restore it from the Git history before fixing it. Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: - Rebase on current u-boot-arm/master. Changes in v9: - Rebase following upstream changes on doc/README.scrapyard. Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None MAINTAINERS|4 - Makefile | 17 -- arch/arm/include/asm/mach-types.h | 13 -- board/samsung/smdk6400/.gitignore |5 - board/samsung/smdk6400/Makefile| 48 - board/samsung/smdk6400/config.mk | 30 --- board/samsung/smdk6400/lowlevel_init.S | 323 board/samsung/smdk6400/smdk6400.c | 134 board/samsung/smdk6400/smdk6400_nand_spl.c | 36 board/samsung/smdk6400/u-boot-nand.lds | 90 doc/README.scrapyard |1 + include/configs/smdk6400.h | 296 - nand_spl/board/samsung/smdk6400/Makefile | 117 -- nand_spl/board/samsung/smdk6400/config.mk | 40 nand_spl/board/samsung/smdk6400/u-boot.lds | 82 --- 15 files changed, 1 insertion(+), 1235 deletions(-) delete mode 100644 board/samsung/smdk6400/.gitignore delete mode 100644 board/samsung/smdk6400/Makefile delete mode 100644 board/samsung/smdk6400/config.mk delete mode 100644 board/samsung/smdk6400/lowlevel_init.S delete mode 100644 board/samsung/smdk6400/smdk6400.c delete mode 100644 board/samsung/smdk6400/smdk6400_nand_spl.c delete mode 100644 board/samsung/smdk6400/u-boot-nand.lds delete mode 100644 include/configs/smdk6400.h delete mode 100644 nand_spl/board/samsung/smdk6400/Makefile delete mode 100644 nand_spl/board/samsung/smdk6400/config.mk delete mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds diff --git a/MAINTAINERS b/MAINTAINERS index e131f80..bbab5fe 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1030,10 +1030,6 @@ Vladimir Zapolskiy v...@mleia.com devkit3250 lpc32xx -Zhong Hongbo bocui...@gmail.com - - SMDK6400ARM1176 (S3C6400 SoC) - Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com Tetsuyuki Kobayashi k...@kmckk.co.jp diff --git a/Makefile b/Makefile index df03974..e0f2c86 100644 --- a/Makefile +++ b/Makefile @@ -784,23 +784,6 @@ lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/') ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/') # -## ARM1176 Systems -# -smdk6400_noUSB_config \ -smdk6400_config: unconfig - @mkdir -p $(obj)include $(obj)board/samsung/smdk6400 - @mkdir -p $(obj)nand_spl/board/samsung/smdk6400 - @echo #define CONFIG_NAND_U_BOOT $(obj)include/config.h - @echo CONFIG_NAND_U_BOOT = y $(obj)include/config.mk - @if [ -z $(findstring smdk6400_noUSB_config,$@) ]; then \ - echo RAM_TEXT = 0x57e0 $(obj)board/samsung/smdk6400/config.tmp;\ - else \ - echo RAM_TEXT = 0xc7e0 $(obj)board/samsung/smdk6400/config.tmp;\ - fi - @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx - @echo CONFIG_NAND_U_BOOT = y $(obj)include/config.mk - -# # clean: diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h index a676b6d..440b041 100644 --- a/arch/arm/include/asm/mach-types.h +++ b/arch/arm/include/asm/mach-types.h @@ -223,7 +223,6 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_MIOA701 1257 #define MACH_TYPE_ARMADILLO5X0 1260 #define MACH_TYPE_CC9P9360JS 1264 -#define MACH_TYPE_SMDK6400 1270 #define MACH_TYPE_NOKIA_N800 1271 #define MACH_TYPE_EP80219 1281 #define MACH_TYPE_GORAMO_MLR 1292 @@ -3640,18 +3639,6 @@ extern unsigned int __machine_arch_type; # define machine_is_cc9p9360js() (0) #endif -#ifdef CONFIG_MACH_SMDK6400 -# ifdef machine_arch_type -# undef machine_arch_type -# define machine_arch_type__machine_arch_type -# else -# define machine_arch_typeMACH_TYPE_SMDK6400 -# endif -# define machine_is_smdk6400() (machine_arch_type == MACH_TYPE_SMDK6400) -#else -# define machine_is_smdk6400() (0) -#endif - #ifdef
Re: [U-Boot] [PATCH 2/5][v3] powerpc/mpc85xx: new SPL support for IFC NAND
On 04/11/2013 02:25:09 AM, Prabhakar Kushwaha wrote: Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer cotrol from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com --- Based upon git://git.denx.de/u-boot.git branch master Changes for v2: Sending as it is Changes for v3: Fix tools/checkpatch errors arch/powerpc/cpu/mpc85xx/u-boot-spl.lds |2 +- board/freescale/common/Makefile | 10 ++ drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/fsl_ifc_spl.c | 258 +++ 4 files changed, 270 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/nand/fsl_ifc_spl.c Did you use -C in git format-patch? I'd expect fsl_ifc_spl.c to be recognized as a copy. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Do not call board_early_init_f() twice
On Tue, Apr 09, 2013 at 05:06:51PM -0700, Vadim Bendebury wrote: Apparently due to a missed rebase conflict resolution board_early_init_f() is included twice in the list of initialization functions. Leave only the first occurrence. . built and boot an Exynos 5250 target Signed-off-by: Vadim Bendebury vben...@chromium.org Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/5][v3] board/p1010rdb:Add NAND boot support using new SPL format
On 04/11/2013 02:25:22 AM, Prabhakar Kushwaha wrote: diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 437ee6e..a6ef276 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -33,6 +33,8 @@ #ifdef CONFIG_P1010RDB #define CONFIG_P1010 +#define CONFIG_E500/* BOOKE e500 family */ +#include asm/config_mpc85xx.h #define CONFIG_NAND_FSL_IFC #endif Why is this inside the P1010RDB ifdef? Why do we even have a CONFIG_P1010RDB? What other boards use this file? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v12 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
On Thursday, April 11, 2013 9:35:34 PM, Benoît Thébaudeau wrote: From: Fabio Estevam fabio.este...@freescale.com Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Acked-by: Scott Wood scottw...@freescale.com Reviewed-by: Benoît Thébaudeau benoit.thebaud...@advansee.com --- Changes in v12: None Changes in v11: None Changes in v10: None Changes in v9: None Changes in v8: - New patch. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None The only change in this series compared to v11 is in p1_p2_rdb_pc.h in 16/30. Best regards, Benoît ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Add TWR-P10xx board support
On 04/11/2013 05:30:07 AM, Xie Xiaobo wrote:
+int checkboard(void)
+{
+ ccsr_gur_t *gur = (void __iomem
*)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u8 boot_status;
+
+ printf(Board: %s\n, CONFIG_BOARDNAME);
+
+#ifdef CONFIG_PHYS_64BIT
+ puts((36-bit addrmap) );
+#endif
Is there really a need for supporting both 32-bit and 36-bit address
maps here? How much RAM does the board have, and is it pluggable or
soldered? If it's pluggable, you really should use SPD...
+ boot_status = ((gur-porbmsr) MPC85xx_PORBMSR_ROMLOC)
+MPC85xx_PORBMSR_ROMLOC_SHIFT;
+ puts(rom_loc: );
+ if (boot_status == 0x0F || boot_status == 0x0E)
+ puts(nor flash);
+ else if (boot_status == 0x07)
+ puts(sd);
+ else
+ puts(unknow);
unknown
+int board_early_init_r(void)
+{
+ const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
+ const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+
+ /*
+* Remap Boot flash region to caching-inhibited
+* so that flash can be erased properly.
+*/
+
+ /* Flush d-cache and invalidate i-cache of any FLASH data */
+ flush_dcache();
+ invalidate_icache();
+
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+
+ set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn,
rpn */
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,/* perms, wimge
*/
+ 0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize,
iprot */
You should be done executing from flash here, so remove SX. The
guarded bit won't prevent speculative instruction fetches.
+#if defined(CONFIG_TWR_P1025)
+static void fdt_board_fixup_etsec(void *blob)
+{
+ int node;
+
+ /* In TWR-P1025 board, the eTSEC2 don't
+* be used, remove the node from dt blob.
+*/
+ node = fdt_path_offset(blob, /soc/ethernet@b1000);
+ if (node = 0)
+ fdt_del_node(blob, node);
+
+ return;
+}
+#endif
Why is it in the dts (and not disabled) in the first place? Do you not
have a separate dts for twr_p1025?
+struct fsl_e_tlb_entry tlb_table[] = {
+ /* TLB 0 - for temp stack in cache */
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024 ,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024 ,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024 ,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+
+ /* TLB 1 */
+ /* *I*** - Covers boot page */
+ SET_TLB_ENTRY(1, 0xf000, 0xf000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I,
+ 0, 0, BOOKE_PAGESZ_4K, 1),
+
+ /* *I*G* - CCSRBAR */
+ SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 1, BOOKE_PAGESZ_1M, 1),
+
+#ifndef CONFIG_NAND_SPL
+ /* W**G* - Flash, localbus */
+ /* This will be changed to *I*G* after relocation to RAM. */
+ SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE_PHYS,
+ MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
+ 0, 2, BOOKE_PAGESZ_64M, 1),
+
+ /* W**G* - Flash, localbus */
+ /* This will be changed to *I*G* after relocation to RAM. */
+ SET_TLB_ENTRY(1, CONFIG_SYS_SSD_BASE, CONFIG_SYS_SSD_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 5, BOOKE_PAGESZ_1M, 1),
+
+#ifdef CONFIG_PCI
+ /* *I*G* - PCI memory 1.5G */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT,
CONFIG_SYS_PCIE1_MEM_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 3, BOOKE_PAGESZ_1G, 1),
+
+ /* *I*G* - PCI I/O effective: 192K */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT,
CONFIG_SYS_PCIE1_IO_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 4, BOOKE_PAGESZ_256K, 1),
+#endif
As above, don't put MAS3_SX on I/O TLB entries.
diff --git a/boards.cfg b/boards.cfg
index 35f38f3..fab6f67 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -798,6 +798,8 @@ P1025RDB_36BIT powerpc
mpc85xx p1_p2_rdb_pcfreesca
P1025RDB_NANDpowerpc
Re: [U-Boot] [PATCH v2 8/8] ARM: Present a menu of bootable options on boot
Sounds good to me. I shall attempt a generic version and call it cmd_bootscan.c in the common directory. - Suriyan On Thu, Apr 11, 2013 at 6:02 AM, Mike Dunn miked...@newsguy.com wrote: On 04/10/2013 06:43 PM, Rob Herring wrote: On Wed, Apr 10, 2013 at 8:12 AM, Suriyan Ramasami suriya...@gmail.com wrote: Initialize usb and ide. Scan through the usb for storage and boot capable partitions. Scan through the ide interface for boot capable partitions. Present such bootable options to the user to choose to boot from If the user does not choose any choose the default option the default option is the option chosen by the user the last time If no such default option exists, boot from the first possible bootable option. This all sounds very generic but... Signed-off-by: Suriyan Ramasami suriya...@gmail.com --- Changes in v2: - Coding style changes board/Seagate/goflexhome/goflexhomemenu.c | 415 + but this is not a generic location. This feature would interest me and probably Stephen as well. I was thinking along these lines as well for the treo 680. Suriyan, perhaps we can collaborate, with the guidance of the maintainers here. Mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/7] mtd: nand: add driver for diskonchip g4 nand flash
On 04/10/2013 07:45:27 PM, Mike Dunn wrote:
This patch adds a driver for the diskonchip G4 nand flash device. It
is based
on the driver from the linux kernel.
This also includes a separate SPL driver. A separate SPL driver is
used because
the device operates in a different mode (reliable mode) when loading
a boot
image, and also because the storage format of the boot image is
different from
normal data (pages are stored redundantly). The SPL driver basically
mimics how
a typical IPL reads data from the device. The special operating mode
and
storage format are used to compensate for the fact that the IPL does
not contain
the BCH ecc decoding algorithm (due to size constraints). Although
the u-boot
SPL *could* use ecc, it operates like an IPL for the sake of
simplicity and
uniformity, since the IPL and SPL share the task of loading the
u-boot image.
As a side benefit, the SPL driver is very small.
[port from linux kernel 3.4 commit
570469f3bde7f71cc1ece07a18d54a05b6a8775d]
Signed-off-by: Mike Dunn miked...@newsguy.com
---
drivers/mtd/nand/Makefile|2 +
drivers/mtd/nand/docg4.c | 1035
++
drivers/mtd/nand/docg4_spl.c | 222 +
include/linux/mtd/docg4.h| 134 ++
4 files changed, 1393 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/docg4.c
create mode 100644 drivers/mtd/nand/docg4_spl.c
create mode 100644 include/linux/mtd/docg4.h
[snip]
+#ifdef DEBUG_DOCG4
+#define dbg(format, arg...) printf(DEBUG: format, ##arg)
+#else
+#define dbg(format, arg...) do {} while (0)
+#endif
Maybe use MTDDEBUG?
Otherwise:
Acked-by: Scott Wood scottw...@freescale.com
-Scott
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