Re: [PATCH] usb: ehci: Fix "EHCI timed out on TD - token=XXXX" error on ehci-hcd

[Marek Vasut]

On 2/29/20 4:20 AM, Tom Rini wrote:
> On Sat, Feb 29, 2020 at 12:32:57AM +0100, Marek Vasut wrote:
>> On 2/26/20 12:29 PM, Lukasz Majewski wrote:
>>> This patch aims to improve robustness of 'usb' command operation on the
>>> ehci-hcd IP block as it ports to contemporary U-Boot the patch described
>>> and provided in [1] (originally applicable to U-Boot 2016.05).
>>>
>>> According to the fix author - "rayvt" (from [1]):
>>
>> [...]
>>
>>> diff --git a/common/usb_storage.c b/common/usb_storage.c
>>> index 097b6729c1..48c8c2ae64 100644
>>> --- a/common/usb_storage.c
>>> +++ b/common/usb_storage.c
>>> @@ -111,6 +111,18 @@ int usb_stor_get_info(struct usb_device *dev, struct 
>>> us_data *us,
>>>   struct blk_desc *dev_desc);
>>>  int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
>>>   struct us_data *ss);
>>> +
>>> +#ifdef CONFIG_USB_EHCI_HCD
>>> +   /*
>>> +* The U-Boot EHCI driver can handle any transfer length as long as
>>> +* there is enough free heap space left, but the SCSI READ(10) and
>>> +* WRITE(10) commands are limited to 65535 blocks.
>>> +*/
>>> +int usb_max_xfer_blk = 4096;
>>> +#else
>>> +int usb_max_xfer_blk = 20;
>>> +#endif
>>
>> This all looks horribly wrong and exactly what
>> 7d6fd7f0ba71cd93d94079132f958d9630f27a89 and
>> 02b0e1a36c5bc20174299312556ec4e266872bd6 fixed properly.
>>
>> All those "dynamic reduction of transfer size" attempts are nonsensical,
>> the real solution (sadly) is to reduce the transfer size to cater for
>> the most limited devices and profile/fix the remaining delays in the USB
>> stack (which should have already been done, see the commits above). This
>> is also what the Linux USB stack does.
>>
>> What is the problem you are trying to solve here ?
> 
> Things like the following (omap3_beagle_defconfig):
> U-Boot SPL 2020.04-rc3-9-g9e1d65f36b83 (Feb 28 2020 - 19:08:53 -0500)
> Trying to boot from MMC1

[...]

> EHCI timed out on TD - token=0x80008c80
> EHCI timed out on TD - token=0x80008c80
> EHCI timed out on TD - token=0x80008d80
> 3 USB Device(s) found
>scanning usb for ethernet devices... 0 Ethernet Device(s) found
> Hit any key to stop autoboot:  2  0 
> BeagleBoard # usb tree
> USB device tree:
>   1  Hub (480 Mb/s, 0mA)
>   |  u-boot EHCI Host Controller 
>   |
>   |+-2  Hub (480 Mb/s, 2mA)
> |
> |+-3  See Interface (480 Mb/s, 0mA)
>  ??? ??? ???
>
> BeagleBoard # 
> 
> Note that the hub and ethernet are on-SBC and not something I'm plugging
> in.  Thanks!

The device #3 is a usb mass storage or what is it ?

Can you try and implement usb_get_max_xfer_size for musb and make it
report 240*512 unconditionally (*size = 240*512; return 0;) ? I think
that would "fix" it for you on omap too.

[GIT PULL] UniPhier SoC updates for v2020.04 (3rd)

[Masahiro Yamada]

Hi Tom,

Please pull more updates.

Thanks.



The following changes since commit 548ce227d3d852455c6395c0cec30af0cda77b09:

  Prepare v2020.04-rc3 (2020-02-26 07:53:20 -0500)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier.git
tags/uniphier-v2020.04-3

for you to fetch changes up to 53265152d2e395bc363d9824a06a1ffd5df3438e:

  ARM: dts: uniphier: remove U-Boot own EEPROM compatible and property
(2020-02-29 14:12:51 +0900)


UniPhier SoC updates for v2020.04 (3rd)

 - Enable ADMA and HS400 for the eMMC driver on 64-bit SoCs

 - Add some convenient environment variables to handle SD card

 - Sanitize the NAND controller reset sequence and its WP handling

 - Sync DT with Linux


Masahiro Yamada (9):
  ARM: uniphier: enable CONFIG_MMC_SDHCI_ADMA for uniphier_v8_defconfig
  ARM: uniphier: add sdscript, sdboot, sdupdate environment variables
  ARM: uniphier: move NAND reset assertion to U-Boot proper from SPL
  ARM: uniphier: remove workaround for the NAND write protect
  ARM: uniphier: detect the base of micro support card at run-time
  ARM: uniphier: enable CONFIG_MMC_HS400_SUPPORT for uniphier_v8_defconfig
  ARM: dts: uniphier: rename DT nodes to follow json-schema
  ARM: dts: uniphier: add reset-names to NAND controller node
  ARM: dts: uniphier: remove U-Boot own EEPROM compatible and property

 arch/arm/dts/uniphier-ld11-global.dts   |  2 +-
 arch/arm/dts/uniphier-ld11.dtsi |  9 ---
 arch/arm/dts/uniphier-ld20.dtsi | 11 
 arch/arm/dts/uniphier-ld4.dtsi  | 13 +-
 arch/arm/dts/uniphier-pro4-ace.dts  |  3 +--
 arch/arm/dts/uniphier-pro4-sanji.dts|  3 +--
 arch/arm/dts/uniphier-pro4.dtsi | 15 +--
 arch/arm/dts/uniphier-pro5.dtsi | 15 +--
 arch/arm/dts/uniphier-pxs2-gentil.dts   |  3 +--
 arch/arm/dts/uniphier-pxs2.dtsi | 13 +-
 arch/arm/dts/uniphier-pxs3.dtsi | 11 
 arch/arm/dts/uniphier-ref-daughter.dtsi |  3 +--
 arch/arm/dts/uniphier-sld8.dtsi | 13 +-
 arch/arm/mach-uniphier/Makefile |  1 +
 arch/arm/mach-uniphier/board_init.c |  4 +++
 arch/arm/mach-uniphier/board_late_init.c| 17 -
 arch/arm/mach-uniphier/clk/clk-early-ld4.c  |  7 --
 arch/arm/mach-uniphier/init.h   |  8 ++
 arch/arm/mach-uniphier/micro-support-card.c | 43
+++-
 arch/arm/mach-uniphier/mmc-first-dev.c  | 27 +---
 arch/arm/mach-uniphier/nand-reset.c | 43

 configs/uniphier_v8_defconfig   |  4 +--
 include/configs/uniphier.h  | 11 
 23 files changed, 182 insertions(+), 97 deletions(-)
 create mode 100644 arch/arm/mach-uniphier/nand-reset.c


-- 
Best Regards
Masahiro Yamada

Re: [PATCH 2/3] ARM: dts: uniphier: add reset-names to NAND controller node

[Masahiro Yamada]

On Fri, Feb 28, 2020 at 9:58 PM Masahiro Yamada
 wrote:
>
> Import Linux commits:
>
> 37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node")
> e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node")
>
> Signed-off-by: Masahiro Yamada 
> ---


Applied to u-boot-uniphier.


>  arch/arm/dts/uniphier-ld11.dtsi | 3 ++-
>  arch/arm/dts/uniphier-ld20.dtsi | 3 ++-
>  arch/arm/dts/uniphier-ld4.dtsi  | 3 ++-
>  arch/arm/dts/uniphier-pro4.dtsi | 3 ++-
>  arch/arm/dts/uniphier-pro5.dtsi | 3 ++-
>  arch/arm/dts/uniphier-pxs2.dtsi | 3 ++-
>  arch/arm/dts/uniphier-pxs3.dtsi | 3 ++-
>  arch/arm/dts/uniphier-sld8.dtsi | 3 ++-
>  8 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
> index b3d44e868956..e0737ac7f06c 100644
> --- a/arch/arm/dts/uniphier-ld11.dtsi
> +++ b/arch/arm/dts/uniphier-ld11.dtsi
> @@ -631,7 +631,8 @@
> pinctrl-0 = <_nand>;
> clock-names = "nand", "nand_x", "ecc";
> clocks = <_clk 2>, <_clk 3>, <_clk 3>;
> -   resets = <_rst 2>;
> +   reset-names = "nand", "reg";
> +   resets = <_rst 2>, <_rst 2>;
> };
> };
>  };
> diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
> index 5a7bd3301dd7..59e4191dfc39 100644
> --- a/arch/arm/dts/uniphier-ld20.dtsi
> +++ b/arch/arm/dts/uniphier-ld20.dtsi
> @@ -954,7 +954,8 @@
> pinctrl-0 = <_nand>;
> clock-names = "nand", "nand_x", "ecc";
> clocks = <_clk 2>, <_clk 3>, <_clk 3>;
> -   resets = <_rst 2>;
> +   reset-names = "nand", "reg";
> +   resets = <_rst 2>, <_rst 2>;
> };
> };
>  };
> diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
> index e40407a0dfa5..1eebc7fa3bee 100644
> --- a/arch/arm/dts/uniphier-ld4.dtsi
> +++ b/arch/arm/dts/uniphier-ld4.dtsi
> @@ -408,7 +408,8 @@
> pinctrl-0 = <_nand2cs>;
> clock-names = "nand", "nand_x", "ecc";
> clocks = <_clk 2>, <_clk 3>, <_clk 3>;
> -   resets = <_rst 2>;
> +   reset-names = "nand", "reg";
> +   resets = <_rst 2>, <_rst 2>;
> };
> };
>  };
> diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
> index 7e81260d33d3..d006b45f7a3d 100644
> --- a/arch/arm/dts/uniphier-pro4.dtsi
> +++ b/arch/arm/dts/uniphier-pro4.dtsi
> @@ -636,7 +636,8 @@
> pinctrl-0 = <_nand>;
> clock-names = "nand", "nand_x", "ecc";
> clocks = <_clk 2>, <_clk 3>, <_clk 3>;
> -   resets = <_rst 2>;
> +   reset-names = "nand", "reg";
> +   resets = <_rst 2>, <_rst 2>;
> };
> };
>  };
> diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
> index 05828d785cec..ba7e224b38e6 100644
> --- a/arch/arm/dts/uniphier-pro5.dtsi
> +++ b/arch/arm/dts/uniphier-pro5.dtsi
> @@ -499,7 +499,8 @@
> pinctrl-0 = <_nand2cs>;
> clock-names = "nand", "nand_x", "ecc";
> clocks = <_clk 2>, <_clk 3>, <_clk 3>;
> -   resets = <_rst 2>;
> +   reset-names = "nand", "reg";
> +   resets = <_rst 2>, <_rst 2>;
> };
>
> emmc: mmc@6840 {
> diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
> index bf852c28005a..8d968d368102 100644
> --- a/arch/arm/dts/uniphier-pxs2.dtsi
> +++ b/arch/arm/dts/uniphier-pxs2.dtsi
> @@ -809,7 +809,8 @@
> pinctrl-0 = <_nand2cs>;
> clock-names = "nand", "nand_x", "ecc";
> clocks = <_clk 2>, <_clk 3>, <_clk 3>;
> -   resets = <_rst 2>;
> +   reset-names = "nand", "reg";
> +   resets = <_rst 2>, <_rst 2>;
> };
> };
>  };
> diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
> index f830cef8941e..ed079c171137 100644
> --- a/arch/arm/dts/uniphier-pxs3.dtsi
> +++ b/arch/arm/dts/uniphier-pxs3.dtsi
> @@ -831,7 +831,8 @@
> pinctrl-0 = <_nand>;
> clock-names = "nand", "nand_x", "ecc";
> clocks = <_clk 2>, <_clk 3>, <_clk 3>;
> -   resets = <_rst 2>;
> +   reset-names = "nand", "reg";
> +   resets = <_rst 2>, <_rst 2>;
> };
> };
>  };
> diff --git a/arch/arm/dts/uniphier-sld8.dtsi 

Re: [PATCH 3/3] ARM: dts: uniphier: remove U-Boot own EEPROM compatible and property

[Masahiro Yamada]

On Fri, Feb 28, 2020 at 9:58 PM Masahiro Yamada
 wrote:
>
> The compatible string "i2c-eeprom" is U-Boot own compatible, which
> has never been approved by the DT community. "u-boot,i2c-offset-len"
> is also a U-Boot own hack.
>
> Linux adds "atmel,*" as generic compatibles, and U-Boot also followed
> it by commit d7e28918aa3f ("i2c_eeprom: Add reading support").
>
> The U-Boot own hack is no longer needed. Just sync with Linux.
>
> Signed-off-by: Masahiro Yamada 
> ---


Applied to u-boot-uniphier.


>
>  arch/arm/dts/uniphier-ld11-global.dts   | 2 +-
>  arch/arm/dts/uniphier-pro4-ace.dts  | 3 +--
>  arch/arm/dts/uniphier-pro4-sanji.dts| 3 +--
>  arch/arm/dts/uniphier-pxs2-gentil.dts   | 3 +--
>  arch/arm/dts/uniphier-ref-daughter.dtsi | 3 +--
>  5 files changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/dts/uniphier-ld11-global.dts 
> b/arch/arm/dts/uniphier-ld11-global.dts
> index 744b36e28a33..7968d524351b 100644
> --- a/arch/arm/dts/uniphier-ld11-global.dts
> +++ b/arch/arm/dts/uniphier-ld11-global.dts
> @@ -132,7 +132,7 @@
> };
>
> eeprom@50 {
> -   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
> +   compatible = "st,24c64", "atmel,24c64";
> reg = <0x50>;
> pagesize = <32>;
> };
> diff --git a/arch/arm/dts/uniphier-pro4-ace.dts 
> b/arch/arm/dts/uniphier-pro4-ace.dts
> index ce8ea7b79bbf..92cc48dd86d0 100644
> --- a/arch/arm/dts/uniphier-pro4-ace.dts
> +++ b/arch/arm/dts/uniphier-pro4-ace.dts
> @@ -50,10 +50,9 @@
> status = "okay";
>
> eeprom@54 {
> -   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
> +   compatible = "st,24c64", "atmel,24c64";
> reg = <0x54>;
> pagesize = <32>;
> -   u-boot,i2c-offset-len = <2>;
> };
>  };
>
> diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts 
> b/arch/arm/dts/uniphier-pro4-sanji.dts
> index 686dd3af7e95..3b68a7c605c2 100644
> --- a/arch/arm/dts/uniphier-pro4-sanji.dts
> +++ b/arch/arm/dts/uniphier-pro4-sanji.dts
> @@ -45,10 +45,9 @@
> status = "okay";
>
> eeprom@54 {
> -   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
> +   compatible = "st,24c64", "atmel,24c64";
> reg = <0x54>;
> pagesize = <32>;
> -   u-boot,i2c-offset-len = <2>;
> };
>  };
>
> diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts 
> b/arch/arm/dts/uniphier-pxs2-gentil.dts
> index b13d6277bf13..e27fd4f2a569 100644
> --- a/arch/arm/dts/uniphier-pxs2-gentil.dts
> +++ b/arch/arm/dts/uniphier-pxs2-gentil.dts
> @@ -48,10 +48,9 @@
> status = "okay";
>
> eeprom@54 {
> -   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
> +   compatible = "st,24c64", "atmel,24c64";
> reg = <0x54>;
> pagesize = <32>;
> -   u-boot,i2c-offset-len = <2>;
> };
>  };
>
> diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi 
> b/arch/arm/dts/uniphier-ref-daughter.dtsi
> index 9240a313b933..a11897669c26 100644
> --- a/arch/arm/dts/uniphier-ref-daughter.dtsi
> +++ b/arch/arm/dts/uniphier-ref-daughter.dtsi
> @@ -7,9 +7,8 @@
>
>   {
> eeprom@50 {
> -   compatible = "microchip,24lc128", "i2c-eeprom";
> +   compatible = "microchip,24lc128", "atmel,24c128";
> reg = <0x50>;
> pagesize = <64>;
> -   u-boot,i2c-offset-len = <2>;
> };
>  };
> --
> 2.17.1
>


-- 
Best Regards
Masahiro Yamada

Re: [PATCH 1/3] ARM: dts: uniphier: rename DT nodes to follow json-schema

[Masahiro Yamada]

On Fri, Feb 28, 2020 at 9:58 PM Masahiro Yamada
 wrote:
>
> Import the nodename changes I made in Linux for avoiding dt-schama
> warnings. This follows the $nodename patterns in the dt-schema.
>
> Signed-off-by: Masahiro Yamada 
> ---

Applied to u-boot-uniphier.


>  arch/arm/dts/uniphier-ld11.dtsi |  6 +++---
>  arch/arm/dts/uniphier-ld20.dtsi |  8 
>  arch/arm/dts/uniphier-ld4.dtsi  | 10 +-
>  arch/arm/dts/uniphier-pro4.dtsi | 12 ++--
>  arch/arm/dts/uniphier-pro5.dtsi | 12 ++--
>  arch/arm/dts/uniphier-pxs2.dtsi | 10 +-
>  arch/arm/dts/uniphier-pxs3.dtsi |  8 
>  arch/arm/dts/uniphier-sld8.dtsi | 10 +-
>  8 files changed, 38 insertions(+), 38 deletions(-)
>
> diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
> index 337a3537ed28..b3d44e868956 100644
> --- a/arch/arm/dts/uniphier-ld11.dtsi
> +++ b/arch/arm/dts/uniphier-ld11.dtsi
> @@ -433,7 +433,7 @@
> };
> };
>
> -   emmc: sdhc@5a00 {
> +   emmc: mmc@5a00 {
> compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
> reg = <0x5a00 0x400>;
> interrupts = <0 78 4>;
> @@ -566,7 +566,7 @@
> };
> };
>
> -   aidet: aidet@5fc2 {
> +   aidet: interrupt-controller@5fc2 {
> compatible = "socionext,uniphier-ld11-aidet";
> reg = <0x5fc2 0x200>;
> interrupt-controller;
> @@ -621,7 +621,7 @@
> };
> };
>
> -   nand: nand@6800 {
> +   nand: nand-controller@6800 {
> compatible = "socionext,uniphier-denali-nand-v5b";
> status = "disabled";
> reg-names = "nand_data", "denali_reg";
> diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
> index 3721110b17a7..5a7bd3301dd7 100644
> --- a/arch/arm/dts/uniphier-ld20.dtsi
> +++ b/arch/arm/dts/uniphier-ld20.dtsi
> @@ -559,7 +559,7 @@
> };
> };
>
> -   emmc: sdhc@5a00 {
> +   emmc: mmc@5a00 {
> compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
> reg = <0x5a00 0x400>;
> interrupts = <0 78 4>;
> @@ -578,7 +578,7 @@
> cdns,phy-dll-delay-sdclk-hsmmc = <21>;
> };
>
> -   sd: sdhc@5a40 {
> +   sd: mmc@5a40 {
> compatible = "socionext,uniphier-sd-v3.1.1";
> status = "disabled";
> reg = <0x5a40 0x800>;
> @@ -664,7 +664,7 @@
> };
> };
>
> -   aidet: aidet@5fc2 {
> +   aidet: interrupt-controller@5fc2 {
> compatible = "socionext,uniphier-ld20-aidet";
> reg = <0x5fc2 0x200>;
> interrupt-controller;
> @@ -944,7 +944,7 @@
> socionext,syscon = <_glue>;
> };
>
> -   nand: nand@6800 {
> +   nand: nand-controller@6800 {
> compatible = "socionext,uniphier-denali-nand-v5b";
> status = "disabled";
> reg-names = "nand_data", "denali_reg";
> diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
> index c2706cef0b8a..e40407a0dfa5 100644
> --- a/arch/arm/dts/uniphier-ld4.dtsi
> +++ b/arch/arm/dts/uniphier-ld4.dtsi
> @@ -51,7 +51,7 @@
> ranges;
> interrupt-parent = <>;
>
> -   l2: l2-cache@500c {
> +   l2: cache-controller@500c {
> compatible = "socionext,uniphier-system-cache";
> reg = <0x500c 0x2000>, <0x503c0100 0x4>,
>   <0x506c 0x400>;
> @@ -245,7 +245,7 @@
> #dma-cells = <1>;
> };
>
> -   sd: sdhc@5a40 {
> +   sd: mmc@5a40 {
> compatible = "socionext,uniphier-sd-v2.91";
> status = "disabled";
> reg = <0x5a40 0x200>;
> @@ -265,7 +265,7 @@
> sd-uhs-sdr50;
> };
>
> -   emmc: sdhc@5a50 {
> +   emmc: mmc@5a50 {
> compatible = "socionext,uniphier-sd-v2.91";
> status = "disabled";
> reg = <0x5a50 0x200>;
> @@ -375,7 +375,7 @@
> interrupt-controller;
> };
>
> -   aidet: aidet@6183 {
> +   aidet: 

Re: [PATCH] usb: ehci: Fix "EHCI timed out on TD - token=XXXX" error on ehci-hcd

[Tom Rini]

On Sat, Feb 29, 2020 at 12:32:57AM +0100, Marek Vasut wrote:
> On 2/26/20 12:29 PM, Lukasz Majewski wrote:
> > This patch aims to improve robustness of 'usb' command operation on the
> > ehci-hcd IP block as it ports to contemporary U-Boot the patch described
> > and provided in [1] (originally applicable to U-Boot 2016.05).
> > 
> > According to the fix author - "rayvt" (from [1]):
> 
> [...]
> 
> > diff --git a/common/usb_storage.c b/common/usb_storage.c
> > index 097b6729c1..48c8c2ae64 100644
> > --- a/common/usb_storage.c
> > +++ b/common/usb_storage.c
> > @@ -111,6 +111,18 @@ int usb_stor_get_info(struct usb_device *dev, struct 
> > us_data *us,
> >   struct blk_desc *dev_desc);
> >  int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
> >   struct us_data *ss);
> > +
> > +#ifdef CONFIG_USB_EHCI_HCD
> > +   /*
> > +* The U-Boot EHCI driver can handle any transfer length as long as
> > +* there is enough free heap space left, but the SCSI READ(10) and
> > +* WRITE(10) commands are limited to 65535 blocks.
> > +*/
> > +int usb_max_xfer_blk = 4096;
> > +#else
> > +int usb_max_xfer_blk = 20;
> > +#endif
> 
> This all looks horribly wrong and exactly what
> 7d6fd7f0ba71cd93d94079132f958d9630f27a89 and
> 02b0e1a36c5bc20174299312556ec4e266872bd6 fixed properly.
> 
> All those "dynamic reduction of transfer size" attempts are nonsensical,
> the real solution (sadly) is to reduce the transfer size to cater for
> the most limited devices and profile/fix the remaining delays in the USB
> stack (which should have already been done, see the commits above). This
> is also what the Linux USB stack does.
> 
> What is the problem you are trying to solve here ?

Things like the following (omap3_beagle_defconfig):
U-Boot SPL 2020.04-rc3-9-g9e1d65f36b83 (Feb 28 2020 - 19:08:53 -0500)
Trying to boot from MMC1


U-Boot 2020.04-rc3-9-g9e1d65f36b83 (Feb 28 2020 - 19:08:53 -0500)

OMAP3630/3730-GP ES1.1, CPU-OPP2, L3-200MHz, Max CPU Clock 800 MHz
Model: TI OMAP3 BeagleBoard
OMAP3 Beagle board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  0 MiB
MMC:   OMAP SD/MMC: 0
Loading Environment from NAND... *** Warning - readenv() failed, using default 
environment

Beagle xM Rev A/B
No EEPROM on expansion board
OMAP die ID: 6e5e00211ff0015739eb08031024
Net:   usb_ether
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... EHCI timed out on TD - token=0x80008d80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
 ERROR: NOT USB_CONFIG_DESC b8
EHCI timed out on TD - token=0x80008d80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008d80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008d80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008d80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008c80
EHCI timed out on TD - token=0x80008d80
3 USB Device(s) found
   scanning usb for ethernet devices... 0 Ethernet Device(s) found
Hit any key to stop autoboot:  2  0 
BeagleBoard # usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller 
  |
  |+-2  Hub (480 Mb/s, 2mA)
|
|+-3  See Interface (480 Mb/s, 0mA)
 ??? ??? ???
   
BeagleBoard # 

Note that the hub and ethernet are on-SBC and not something I'm plugging
in.  Thanks!

-- 
Tom


signature.asc
Description: PGP signature

Re: [U-Boot] [RFC/RFT PATCH v4 3/3] image: Add compressed Image parsing support in booti.

[Atish Patra]

On Thu, Feb 20, 2020 at 2:25 PM Atish Patra  wrote:
>
> On Thu, Feb 20, 2020 at 1:14 PM David Abdurachmanov
>  wrote:
> >
> > On Tue, Feb 18, 2020 at 10:38 PM Tom Rini  wrote:
> > >
> > > On Sun, Feb 16, 2020 at 04:48:22PM -0800, Atish Patra wrote:
> > > > On Fri, Feb 14, 2020 at 8:43 AM Tom Rini  wrote:
> > > > >
> > > > > On Thu, Feb 13, 2020 at 11:32:52PM +0200, David Abdurachmanov wrote:
> > > > > > On Thu, Feb 13, 2020 at 6:17 PM Tom Rini  wrote:
> > > > > > >
> > > > > > > On Wed, Feb 05, 2020 at 12:01:38AM +, Atish Patra wrote:
> > > > > > > > On Fri, 2019-11-22 at 18:19 -0800, Atish Patra wrote:
> > > > > > > > > On Wed, 2019-11-13 at 11:47 -0800, Atish Patra wrote:
> > > > > > > > > > On Wed, 2019-11-13 at 15:36 +0200, David Abdurachmanov 
> > > > > > > > > > wrote:
> > > > > > > > > > > On Sat, Nov 9, 2019 at 2:14 AM Atish Patra 
> > > > > > > > > > > 
> > > > > > > > > > > wrote:
> > > > > > > > > > > > Add compressed Image parsing support so that booti can 
> > > > > > > > > > > > parse
> > > > > > > > > > > > both
> > > > > > > > > > > > flat and compressed Image to boot Linux. Currently, it 
> > > > > > > > > > > > is
> > > > > > > > > > > > difficult
> > > > > > > > > > > > to calculate a safe address for every board where the
> > > > > > > > > > > > compressed
> > > > > > > > > > > > image can be decompressed. It is also not possible to 
> > > > > > > > > > > > figure
> > > > > > > > > > > > out
> > > > > > > > > > > > the
> > > > > > > > > > > > size of the compressed file as well. Thus, user need to 
> > > > > > > > > > > > set two
> > > > > > > > > > > > additional environment variables kernel_comp_addr_r and
> > > > > > > > > > > > filesize
> > > > > > > > > > > > to
> > > > > > > > > > > > make this work.
> > > > > > > > > > > >
> > > > > > > > > > > > Following compression methods are supported for now.
> > > > > > > > > > > > lzma, lzo, bzip2, gzip.
> > > > > > > > > > > >
> > > > > > > > > > > > lz4 support is not added as ARM64 kernel generates a lz4
> > > > > > > > > > > > compressed
> > > > > > > > > > > > image with legacy header which U-Boot doesn't know how 
> > > > > > > > > > > > to parse
> > > > > > > > > > > > and
> > > > > > > > > > > > decompress.
> > > > > > > > > > > >
> > > > > > > > > > > > Tested on HiFive Unleashed and Qemu for RISC-V.
> > > > > > > > > > > > Tested on Qemu for ARM64.
> > > > > > > > > > > >
> > > > > > > > > > > > Signed-off-by: Atish Patra 
> > > > > > > > > > > > ---
> > > > > > > > > > > > I could not test this patch on any ARM64 boards due to 
> > > > > > > > > > > > lack of
> > > > > > > > > > > > access to any ARM64 board. If anybody can test it on 
> > > > > > > > > > > > ARM64,
> > > > > > > > > > > > that
> > > > > > > > > > > > would be great.
> > > > > > > > > > > > ---
> > > > > > > > > > > >  cmd/booti.c| 40 
> > > > > > > > > > > > ++-
> > > > > > > > > > > >  doc/README.distro  | 12 +
> > > > > > > > > > > >  doc/board/sifive/fu540.rst | 55
> > > > > > > > > > > > ++
> > > > > > > > > > > >  3 files changed, 106 insertions(+), 1 deletion(-)
> > > > > > > > > > > >
> > > > > > > > > > > > diff --git a/cmd/booti.c b/cmd/booti.c
> > > > > > > > > > > > index c36b0235df8c..cd8670a9a8db 100644
> > > > > > > > > > > > --- a/cmd/booti.c
> > > > > > > > > > > > +++ b/cmd/booti.c
> > > > > > > > > > > > @@ -13,6 +13,7 @@
> > > > > > > > > > > >  #include 
> > > > > > > > > > > >  #include 
> > > > > > > > > > > >
> > > > > > > > > > > > +DECLARE_GLOBAL_DATA_PTR;
> > > > > > > > > > > >  /*
> > > > > > > > > > > >   * Image booting support
> > > > > > > > > > > >   */
> > > > > > > > > > > > @@ -23,6 +24,12 @@ static int booti_start(cmd_tbl_t 
> > > > > > > > > > > > *cmdtp, int
> > > > > > > > > > > > flag, int argc,
> > > > > > > > > > > > ulong ld;
> > > > > > > > > > > > ulong relocated_addr;
> > > > > > > > > > > > ulong image_size;
> > > > > > > > > > > > +   uint8_t *temp;
> > > > > > > > > > > > +   ulong dest;
> > > > > > > > > > > > +   ulong dest_end;
> > > > > > > > > > > > +   unsigned long comp_len;
> > > > > > > > > > > > +   unsigned long decomp_len;
> > > > > > > > > > > > +   int ctype;
> > > > > > > > > > > >
> > > > > > > > > > > > ret = do_bootm_states(cmdtp, flag, argc, argv,
> > > > > > > > > > > > BOOTM_STATE_START,
> > > > > > > > > > > >   images, 1);
> > > > > > > > > > > > @@ -37,6 +44,33 @@ static int booti_start(cmd_tbl_t 
> > > > > > > > > > > > *cmdtp, int
> > > > > > > > > > > > flag, int argc,
> > > > > > > > > > > > debug("*  kernel: cmdline image address 
> > > > > > > > > > > > =
> > > > > > > > > > > > 0x%08lx\n", ld);
> > > > > > > > > > > > }
> > > > > > > > > > > >
> > > > > > > > > > > > +   temp = map_sysmem(ld, 0);
> > > > > > > > > > > > +   ctype = image_decomp_type(temp, 2);
> > > > > > 

[PATCH] serial: mcfuart: renaming to a more appropriate name

[Angelo Dureghello]

From: Angelo Durgehello 

All drivers seems to align now to serial_xxx maning, so, aligning
also this driver, to allow to be found easily.

Signed-off-by: Angelo Durgehello 
---
 drivers/serial/Makefile  |   2 +-
 drivers/serial/mcfuart.c | 179 ---
 2 files changed, 1 insertion(+), 180 deletions(-)
 delete mode 100644 drivers/serial/mcfuart.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index e26b64494e..e4a927 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -39,7 +39,7 @@ obj-$(CONFIG_COREBOOT_SERIAL) += serial_coreboot.o
 obj-$(CONFIG_CORTINA_UART) += serial_cortina.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
-obj-$(CONFIG_MCFUART) += mcfuart.o
+obj-$(CONFIG_MCFUART) += serial_mcf.o
 obj-$(CONFIG_SYS_NS16550) += ns16550.o
 obj-$(CONFIG_S5P) += serial_s5p.o
 obj-$(CONFIG_MXC_UART) += serial_mxc.o
diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c
deleted file mode 100644
index b599064b48..00
--- a/drivers/serial/mcfuart.c
+++ /dev/null
@@ -1,179 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew, tsi-chung.l...@freescale.com.
- *
- * Modified to add device model (DM) support
- * (C) Copyright 2015  Angelo Dureghello 
- *
- * Modified to add DM and fdt support, removed non DM code
- * (C) Copyright 2018  Angelo Dureghello 
- */
-
-/*
- * Minimal serial functions needed to use one of the uart ports
- * as serial console interface.
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern void uart_port_conf(int port);
-
-static int mcf_serial_init_common(uart_t *uart, int port_idx, int baudrate)
-{
-   u32 counter;
-
-   uart_port_conf(port_idx);
-
-   /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
-   writeb(UART_UCR_RESET_RX, >ucr);
-   writeb(UART_UCR_RESET_TX, >ucr);
-   writeb(UART_UCR_RESET_ERROR, >ucr);
-   writeb(UART_UCR_RESET_MR, >ucr);
-   __asm__("nop");
-
-   writeb(0, >uimr);
-
-   /* write to CSR: RX/TX baud rate from timers */
-   writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, >ucsr);
-
-   writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, >umr);
-   writeb(UART_UMR_SB_STOP_BITS_1, >umr);
-
-   /* Setting up BaudRate */
-   counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2));
-   counter = counter / baudrate;
-
-   /* write to CTUR: divide counter upper byte */
-   writeb((u8)((counter & 0xff00) >> 8), >ubg1);
-   /* write to CTLR: divide counter lower byte */
-   writeb((u8)(counter & 0x00ff), >ubg2);
-
-   writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, >ucr);
-
-   return (0);
-}
-
-static void mcf_serial_setbrg_common(uart_t *uart, int baudrate)
-{
-   u32 counter;
-
-   /* Setting up BaudRate */
-   counter = (u32) ((gd->bus_clk / 32) + (baudrate / 2));
-   counter = counter / baudrate;
-
-   /* write to CTUR: divide counter upper byte */
-   writeb(((counter & 0xff00) >> 8), >ubg1);
-   /* write to CTLR: divide counter lower byte */
-   writeb((counter & 0x00ff), >ubg2);
-
-   writeb(UART_UCR_RESET_RX, >ucr);
-   writeb(UART_UCR_RESET_TX, >ucr);
-
-   writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, >ucr);
-}
-
-static int coldfire_serial_probe(struct udevice *dev)
-{
-   struct coldfire_serial_platdata *plat = dev->platdata;
-
-   plat->port = dev->seq;
-
-   return mcf_serial_init_common((uart_t *)plat->base,
-   plat->port, plat->baudrate);
-}
-
-static int coldfire_serial_putc(struct udevice *dev, const char ch)
-{
-   struct coldfire_serial_platdata *plat = dev->platdata;
-   uart_t *uart = (uart_t *)plat->base;
-
-   /* Wait for last character to go. */
-   if (!(readb(>usr) & UART_USR_TXRDY))
-   return -EAGAIN;
-
-   writeb(ch, >utb);
-
-   return 0;
-}
-
-static int coldfire_serial_getc(struct udevice *dev)
-{
-   struct coldfire_serial_platdata *plat = dev->platdata;
-   uart_t *uart = (uart_t *)(plat->base);
-
-   /* Wait for a character to arrive. */
-   if (!(readb(>usr) & UART_USR_RXRDY))
-   return -EAGAIN;
-
-   return readb(>urb);
-}
-
-int coldfire_serial_setbrg(struct udevice *dev, int baudrate)
-{
-   struct coldfire_serial_platdata *plat = dev->platdata;
-   uart_t *uart = (uart_t *)(plat->base);
-
-   mcf_serial_setbrg_common(uart, baudrate);
-
-   return 0;
-}
-
-static int coldfire_serial_pending(struct udevice *dev, bool input)
-{
-   struct coldfire_serial_platdata *plat = dev->platdata;
-   uart_t *uart = (uart_t *)(plat->base);
-
-   if (input)
-   return readb(>usr) & UART_USR_RXRDY ? 1 : 0;
-   else
-   return readb(>usr) & UART_USR_TXRDY ? 0 : 1;
-

[PATCH] serial: mcfuart: fix uart port index

[Angelo Dureghello]

From: Angelo Durgehello 

Actually, using dev->seq value before probe to deduce the current
serial port index leads to reading an invalid seq value (-1).
So, getting dev->seq at probe time.

Signed-off-by: Angelo Durgehello 
---
 drivers/serial/mcfuart.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c
index 066e5a18d8..b599064b48 100644
--- a/drivers/serial/mcfuart.c
+++ b/drivers/serial/mcfuart.c
@@ -85,6 +85,8 @@ static int coldfire_serial_probe(struct udevice *dev)
 {
struct coldfire_serial_platdata *plat = dev->platdata;
 
+   plat->port = dev->seq;
+
return mcf_serial_init_common((uart_t *)plat->base,
plat->port, plat->baudrate);
 }
@@ -148,8 +150,6 @@ static int coldfire_ofdata_to_platdata(struct udevice *dev)
return -ENODEV;
 
plat->base = (uint32_t)addr_base;
-
-   plat->port = dev->seq;
plat->baudrate = gd->baudrate;
 
return 0;
-- 
2.25.0

Re: [U-Boot] [PATCH] usb: ehci-mx5: Fix bus enumeration for DM case

[Marek Vasut]

On 2/26/20 10:16 AM, Lukasz Majewski wrote:
[...]
> diff --git a/drivers/usb/host/ehci-mx5.c
> b/drivers/usb/host/ehci-mx5.c index 0b32728c57..4db513f4e5 100644
> --- a/drivers/usb/host/ehci-mx5.c
> +++ b/drivers/usb/host/ehci-mx5.c
> @@ -301,6 +301,22 @@ static int ehci_usb_ofdata_to_platdata(struct
> udevice *dev) return 0;
>  }
>  
> +static int ehci_usb_bind(struct udevice *dev)
> +{
> + static int num_controllers;
> +
> + /*
> +  * Without this hack, if we return ENODEV for USB
> Controller 0, on
> +  * probe for the next controller, USB Controller 1 will
> be given a
> +  * sequence number of 0. This conflicts with our
> requirement of
> +  * sequence numbers while initialising the peripherals.
> +  */
> + dev->req_seq = num_controllers;
> + num_controllers++;
> +
> + return 0;
> +}
> +
>  static int ehci_usb_probe(struct udevice *dev)
>  {
>   struct usb_platdata *plat = dev_get_platdata(dev);
> @@ -362,6 +378,7 @@ U_BOOT_DRIVER(usb_mx5) = {
>   .id = UCLASS_USB,
>   .of_match = mx5_usb_ids,
>   .ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
> + .bind   = ehci_usb_bind,
>   .probe  = ehci_usb_probe,
>   .remove = ehci_deregister,
>   .ops= _usb_ops,

 Tested-by: Lukasz Majewski 

 Tested on HSC|DDC i.MX53 board (usb start works as previously).
  
>>>
>>> Gentle ping on this patch :-)  
>>
>> I think this approach doesn't work, 
>> there was a discussion about this
>> under a patch like this for ehci-mx6.c . Take a look at the patches
>> for the ehci-mx6.c in mainline and replicate the approach
> 
> The code for ehci-mx5 DM/DTS conversion was based on ehci-mx6. There is
> a patch developed by you - SHA1:
> 501547cec1f7f0438cae388a104ff60f18576c01 which provides a partial DT
> conversion. 

Yes, and devfdt_get_addr_size_index() and "dev->req_seq = (addr -
USB_BASE_ADDR) / size" is used for a reason, read the TODO text in
501547cec1f7f0438cae388a104ff60f18576c01 .

> On top of that is another patch - SHA1:
> 1198a104d37b10064cd90f36d472787d549eda02 developed by Igor, which adds
> even more hacks for i.MX7.
> 
> That is what we do have now in-tree for iMX6/iMX7.

The TODO explains why it is done like that and how to finish the conversion.

> Since the last ping for this patch (6+ months) we do have a regression
> (just not usable USB) for some iMX53 boards. This patch fixes them.

This patch also breaks other MX53 boards for sure, again, read the TODO
in 501547cec1f7f0438cae388a104ff60f18576c01, it explains why this patch
is wrong, it's about the sequential ordering of PHY addresses.

Basically, consider that you only enable USB controller #1 and not USB
controller #0 . Then the controller ID would not match the PHY ID, but
the PHY address offset is derived from controller ID. So this setup
would then fail by accessing the wrong PHY for the controller.

> Why are you reluctant to accept the fix? It is similar to what was
> added for iMX7.

Because this is NOT a fix, this introduces another problem, see above.

>> , or even
>> better, solve the TODO there altogether.
> 
> Please correct me if I did not understood you correctly:
> 
> To fix regression on i.MX53 boards (with applying this patch) you do
> recommend to look for out of tree patches for i.MX6/i.MX7 and solve the
> TODO for i.MX6/i.MX7?

No. I recommend to fix this problem the same way as is done in
501547cec1f7f0438cae388a104ff60f18576c01 and ideally fix the TODO
outlined in that patch completely (which is more involved).

There are no out-of-tree patches involved here.

Re: [PATCH] usb: ehci: Fix "EHCI timed out on TD - token=XXXX" error on ehci-hcd

[Marek Vasut]

On 2/26/20 12:29 PM, Lukasz Majewski wrote:
> This patch aims to improve robustness of 'usb' command operation on the
> ehci-hcd IP block as it ports to contemporary U-Boot the patch described
> and provided in [1] (originally applicable to U-Boot 2016.05).
> 
> According to the fix author - "rayvt" (from [1]):

[...]

> diff --git a/common/usb_storage.c b/common/usb_storage.c
> index 097b6729c1..48c8c2ae64 100644
> --- a/common/usb_storage.c
> +++ b/common/usb_storage.c
> @@ -111,6 +111,18 @@ int usb_stor_get_info(struct usb_device *dev, struct 
> us_data *us,
> struct blk_desc *dev_desc);
>  int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,
> struct us_data *ss);
> +
> +#ifdef CONFIG_USB_EHCI_HCD
> + /*
> +  * The U-Boot EHCI driver can handle any transfer length as long as
> +  * there is enough free heap space left, but the SCSI READ(10) and
> +  * WRITE(10) commands are limited to 65535 blocks.
> +  */
> +int usb_max_xfer_blk = 4096;
> +#else
> +int usb_max_xfer_blk = 20;
> +#endif

This all looks horribly wrong and exactly what
7d6fd7f0ba71cd93d94079132f958d9630f27a89 and
02b0e1a36c5bc20174299312556ec4e266872bd6 fixed properly.

All those "dynamic reduction of transfer size" attempts are nonsensical,
the real solution (sadly) is to reduce the transfer size to cater for
the most limited devices and profile/fix the remaining delays in the USB
stack (which should have already been done, see the commits above). This
is also what the Linux USB stack does.

What is the problem you are trying to solve here ?

Re: Fixing low-speed USB keyboard detection

[Marek Vasut]

On 2/26/20 12:04 PM, Soeren Moch wrote:
> Adding Marek as USB maintainer. Otherwise this non-patch-email may get
> lost when sent to the mailing list only.

Well, can you send these as proper patches ?

> Soeren
> 
> On 25.02.20 18:45, Stefan wrote:
>> Hello!
>>
>> I own a D-Link DBT-120 Bluetooth Adapter, which has a CSR firmware running 
>> in a so called “HID proxy mode”. This firmware pretends to be a USB keyboard 
>> (and mouse) and thus allows to use a Bluetooth keyboard in U-Boot.
>>
>> Unfortunately it acts as a low-speed device and there seems to be some well 
>> known troubles about low-speed USB keyboards. There is a FAQ entry for 
>> openSUSE about this: 
>> https://en.opensuse.org/HCL:Raspberry_Pi3#I_cannot_use_keyboard_in_U-Boot_and_Grub_but_it_works_in_Linux
>>
>> I spend some effort to solve this issue. There are three tiny changes to get 
>> my Bluetooth keyboard working reliably as a low-speed USB keyboard.
[...]

Re: [PATCH v5 25/33] wdt: Move asm/utils.h to log2.h

[Marek Vasut]

On 2/28/20 11:43 PM, Sean Anderson wrote:
> 
> On 2/28/20 4:46 PM, Marek Vasut wrote:
>> On 2/28/20 10:05 PM, Sean Anderson wrote:
>>> This header is needed outside of the arm architecture for the designware
>>> watchdog.
>>>
>>> Signed-off-by: Sean Anderson 
>>> Reviewed-by: Simon Glass 
>>> ---
>>> This patch previously appeared as
>>> https://patchwork.ozlabs.org/patch/1232411/
>>
>> Can't you call round_up(fls(...)) in that DW watchdog driver (and the
>> omap emif driver, and remove all this log2 stuff altogether) ?
>>
> 
> That could work; I just wanted to make the smallest change necessary to
> get everything working.

And yet, the smallest change could be a one-liner :-)

The removal / fix for the omap-emif should be a subsequent patch.

caching BLOBLISTT_SPL_HANDOFF (was Re: [PATCH] common/board_f.c: use #ifdefs a little more consistently)

[Rasmus Villemoes]

On 28/02/2020 18.35, Tom Rini wrote:
> On Fri, Feb 28, 2020 at 05:24:58PM +, Rasmus Villemoes wrote:

>> eliminated, and there's not an #ifdef in sight.
> 
> That sounds pretty nice actually.  If you're so inclined I'd like to see
> it.
> 

So I started looking at that, and while it's mostly mechanical, one
quickly hits the case I was worried about, some of the functions
referring to symbols or struct members that are conditionally
defined/declared, so there's no way around guarding such accesses at the
preprocessor level.

Case in point: I'd like to do

--- a/common/board_f.c
+++ b/common/board_f.c
@@ -287,11 +287,9 @@ static int setup_mon_len(void)

 static int setup_spl_handoff(void)
 {
-#if CONFIG_IS_ENABLED(HANDOFF)
gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
sizeof(struct spl_handoff));
debug("Found SPL hand-off info %p\n", gd->spl_handoff);
-#endif

return 0;
 }
@@ -886,7 +884,7 @@ static const init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_BLOBLIST
bloblist_init,
 #endif
-   setup_spl_handoff,
+   CONFIG_IS_ENABLED(HANDOFF) ? setup_spl_handoff : NULL,
initf_console_record,
 #if defined(CONFIG_HAVE_FSP)
arch_fsp_init,

but that doesn't work because gd->spl_handoff only exists when
CONFIG_IS_ENABLED(BLOBLIST) && defined(CONFIG_SPL).

Now that particular one seems a bit fishy: Why is it ok to cache the
location of the BLOBLISTT_SPL_HANDOFF blob in gd->spl_handoff? Later in
the init sequence there's a call to reserve_bloblist, and later again
reloc_bloblist. Doesn't that leave gd->spl_handoff stale?

I'd expect that users would always have to look it up via
bloblist_find(). Simon?

Rasmus

Re: m68k hangs silently

[Angelo Dureghello]

Hi Simon,

On Wed, Feb 19, 2020 at 10:21 PM Simon Glass  wrote:
>
> Hi Angelo,
>
> On Wed, 19 Feb 2020 at 07:36, Angelo Dureghello
>  wrote:
> >
> > Hi Simon,
> >
> > after this commit:
> >
> > commit 29f7d05a347ab7a42577c67fdfb787ef91537302
> > Author: Simon Glass 
> > Date:   Sun Dec 29 21:19:17 2019 -0700
> >
> > dm: core: Move ofdata_to_platdata() call earlier
> >
> > This method is supposed to extract platform data from the device tree. 
> > It
> > should be done before the device itself is probed. Move it earlier in 
> > the
> > device_probe() function.
> >
> > Signed-off-by: Simon Glass 
> >
> > stmark2 (mcf5441x based board) hangs silently.
> >
> > I am debugging into this, since seems to be something wrong in my arch
> > files, or related dm drivers, but if you have any hint about where to
> > look, welcome.
>
> Good to have a JTAG debugger or at least a working DEBUG_UART.
>
> It could be that you have one device relying on another's ofdata, but
> the reading of it is in the probe() method instead of
> ofdata_to_platdata().
>
> Also make sure you have proper error checking in these methods since
> silent failure (e.g. to read an address) can cause invalid data to be
> used by the driver.
>
> You can also enable CONFIG_LOG_ERROR_RETURN if you are using log_ret()
> or log_msg_ret() in your drivers.
>
> I can't actually even find the serial driver for m68k so I don't think
> I will be much help...
>
> Regards,
> Simon


thanks, so, just for y i.
Looks like the issue is that my driver (mcfuart.c) uses "dev->seq"
to deduce uart port is 0. And dev->seq after your commit above is
now -1 (it was 0).

So, looks like dev->seq can't be used now from  _ofdata_to_platdata,
where i was assigning

plat->port = dev->seq;

Will fix this in the driver.

Regards,
Angelo

-- 
Angelo Dureghello
Timesys
e. angelo.dureghe...@timesys.com

Re: [PATCH v5 25/33] wdt: Move asm/utils.h to log2.h

[Sean Anderson]

On 2/28/20 4:46 PM, Marek Vasut wrote:
> On 2/28/20 10:05 PM, Sean Anderson wrote:
>> This header is needed outside of the arm architecture for the designware
>> watchdog.
>>
>> Signed-off-by: Sean Anderson 
>> Reviewed-by: Simon Glass 
>> ---
>> This patch previously appeared as
>> https://patchwork.ozlabs.org/patch/1232411/
> 
> Can't you call round_up(fls(...)) in that DW watchdog driver (and the
> omap emif driver, and remove all this log2 stuff altogether) ?
> 

That could work; I just wanted to make the smallest change necessary to
get everything working.

--Sean

Re: [PATCH v5 25/33] wdt: Move asm/utils.h to log2.h

[Marek Vasut]

On 2/28/20 10:05 PM, Sean Anderson wrote:
> This header is needed outside of the arm architecture for the designware
> watchdog.
> 
> Signed-off-by: Sean Anderson 
> Reviewed-by: Simon Glass 
> ---
> This patch previously appeared as
> https://patchwork.ozlabs.org/patch/1232411/

Can't you call round_up(fls(...)) in that DW watchdog driver (and the
omap emif driver, and remove all this log2 stuff altogether) ?

[PATCH v5 33/33] riscv: Add Sipeed Maix support

[Sean Anderson]

The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a
"KPU" neural network processor, an audio processor supporting beamforming
reception, and a digital video port supporting capture and output at VGA
resolution. Other peripherals include 8M of sram (accessible with and
without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
peripherals vary, but include spi flash; on-board usb-serial bridges; ports
for cameras, displays, and sd cards; and ESP32 chips. Currently, only the
Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly
similar.

Documentation for Maix boards is located at
.  Documentation for the Kendryte K210 is
located at . However, hardware details are
rather lacking, so most technical reference has been taken from the
standalone sdk located at
.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- Configure relocation location with CONFIG_SYS_SDRAM_*
- Enable ram clocks
- Add pinmux/gpio/led support
- Remove (broken) MMC support
- Store the environment in flash
- Add partitions
- Add bootcmd
- Add docs for pinctrl and booting

Changes in v4:
- Rework documentation to be organized by board mfg not cpu mfg
- Update docs to reflect working SPI support
- Add proper spi support
- Don't define unneecessary macros in config.h
- Lower the default stack so it isn't clobbered on relocation
- Update MAINTAINERS
- Update copyright

Changes in v3:
- Reorder to be last in the patch series
- Add documentation for the board
- Generate defconfig with "make savedefconfig"
- Update Kconfig to imply most features we need
- Update MAINTAINERS

Changes in v2:
- Select CONFIG_SYS_RISCV_NOCOUNTER
- Imply CONFIG_CLK_K210
- Remove spurious references to CONFIG_ARCH_K210
- Remove many configs from defconfig where the defaults were fine
- Add a few "not set" lines to suppress unneeded defaults
- Reduce pre-reloc malloc space, now that clocks initialization happens
  later

 arch/riscv/Kconfig |   4 +
 board/sipeed/maix/Kconfig  |  72 ++
 board/sipeed/maix/MAINTAINERS  |  11 ++
 board/sipeed/maix/Makefile |   5 +
 board/sipeed/maix/maix.c   |  54 +++
 configs/sipeed_maix_bitm_defconfig |  16 +++
 doc/board/index.rst|   1 +
 doc/board/sipeed/index.rst |   9 ++
 doc/board/sipeed/maix.rst  | 223 +
 include/configs/sipeed-maix.h  |  24 
 10 files changed, 419 insertions(+)
 create mode 100644 board/sipeed/maix/Kconfig
 create mode 100644 board/sipeed/maix/MAINTAINERS
 create mode 100644 board/sipeed/maix/Makefile
 create mode 100644 board/sipeed/maix/maix.c
 create mode 100644 configs/sipeed_maix_bitm_defconfig
 create mode 100644 doc/board/sipeed/index.rst
 create mode 100644 doc/board/sipeed/maix.rst
 create mode 100644 include/configs/sipeed-maix.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index b7a5757584..d016dd75d7 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_FU540
bool "Support SiFive FU540 Board"
 
+config TARGET_SIPEED_MAIX
+   bool "Support Sipeed Maix Board"
+
 endchoice
 
 config SYS_ICACHE_OFF
@@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
new file mode 100644
index 00..939eb4829a
--- /dev/null
+++ b/board/sipeed/maix/Kconfig
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2019-20 Sean Anderson 
+
+if TARGET_SIPEED_MAIX
+
+config SYS_BOARD
+   default "maix"
+
+config SYS_VENDOR
+   default "sipeed"
+
+config SYS_CPU
+   default "generic"
+
+config SYS_CONFIG_NAME
+   default "sipeed-maix"
+
+config SYS_TEXT_BASE
+   default 0x8000
+
+config DEFAULT_DEVICE_TREE
+   default "k210-maix-bit"
+
+config NR_CPUS
+   default 2
+
+config NR_DRAM_BANKS
+   default 3
+
+config SF_DEFAULT_BUS
+   default 3
+
+config BOARD_SPECIFIC_OPTIONS
+   def_bool y
+   select GENERIC_RISCV
+   select RISCV_PRIV_1_9
+   imply SMP
+   imply OF_BOARD_SETUP
+   imply DM_SERIAL
+   imply SIFIVE_SERIAL
+   imply SIFIVE_CLINT
+   imply POWER_DOMAIN
+   imply SIMPLE_PM_BUS
+   imply CLK_CCF
+   imply CLK_COMPOSITE_CCF
+   imply CLK_K210
+   imply DM_RESET
+   imply RESET_SYSCON
+   imply SYSRESET

[PATCH v5 29/33] riscv: Allow use of reset drivers

[Sean Anderson]

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS
example, and disable the default reset handler when the sysreset driver is
enabled.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v3:
- New

 arch/riscv/lib/reset.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c
index ce3c1cf872..7622e5df43 100644
--- a/arch/riscv/lib/reset.c
+++ b/arch/riscv/lib/reset.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 
+#ifndef CONFIG_SYSRESET
 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
printf("resetting ...\n");
@@ -16,3 +17,4 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
 
return 0;
 }
+#endif
-- 
2.25.0

[PATCH v5 32/33] riscv: Add device tree for K210 and Sipeed Maix BitM

[Sean Anderson]

Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- Add more compatible strings
- Add cache line size
- Document CPUs as rocket cores
- Flesh out the gpio devices
- Add ports for audio and video devices
- Add fpioa pinctrl support
- Configure pins for MMC on SPI1
- Enable MMC
- Fix a couple uart properties (Thanks laanwj)
- Reorder ram now that relocation is handled with CONFIG_SYS defines
- Enable WDT
- Add pinctrl properties
- Add gpio support
- Add led support
- Add assorted AV bindings
- Add compatible strings for ram
- Use GPIO-based CS for MMC
- Limit SPI flash to 50 MHz

Changes in v4:
- Set regs sizes to full address range
- Remove clock-frequency property from cpus
- Add spi-max-frequency to spi devices from documentation
- Add more compatible strings for each device
- Add AI ram as a separate memory bank. Its clock is disabled on boot, and
  it cannot be accessed
- Reorder memory banks so u-boot relocates higher, leaving more room to
  load boot images
- Add designware ssi CTRL0 field shifts to spi devices
- Don't enable the MMC slot
- Update copyright
- Lint

Changes in v3:
- Move this patch to the end of the series
- Add a max frequency for spi3
- Remov unused compatible strings from spi-flash@0
- Add s and u to isa string
- Fix mmu-type
- Remove cache-line size since it is unused (in u-boot) and undocumented
  (upstream)
- Add timer interrupts to clint0
- Round up various registers
- Add riscv,max-priority to plic
- Add apb* busses, since they have clocks which need to be enabled to
  access their devices
- Change uart compatible strings to "snps,dw-apb-uart", since that appears
  to match their registers
- Add compatible string for wdt*
- Add system reset device under sysctl
- Add reset device under sysctl

Changes in v2:
- Model changed to "Sipeed Maix Bit" to match file name
- Value of stdout-path fixed
- SD card slot compatible changed to "mmc-spi-slot"
- "jedec,spi-nor" added to spi flash compatible list
- Aliases for spi busses added
- timebase-frequency divided by 50 to match timer speed
- cpu-frequency renamed to clock-frequency
- CPUX_intc restyled to cpuX_intc
- "kendryte,k210-soc" added to soc compatible list for future-proofing
- PLIC handle renamed to plic0 from pic0
- K210_RST_SOC removed from sysrst, due to not being located in the reset
  register
- K210_RST_* numbers changed to match their bit offset within the reset
  register
- gpio_controller restyled to gpio-controller
- Added a second clock to the dma binding to match what the driver expects
- Changed "snps,designware-spi" compatible string to "snps,dw-apb-ssi" to
  match the correct driver
- Added a name to the spi clocks
- Added reg-io-width property to spi bindings
- Assigned a default parent to K210_CLK_SPI3
- Removed assigned clocks for ACLK and PLLs
- Removed u-boot,dm-pre-reloc bindings

 arch/riscv/dts/Makefile |   1 +
 arch/riscv/dts/k210-maix-bit.dts| 333 
 arch/riscv/dts/k210.dtsi| 649 
 include/dt-bindings/reset/k210-sysctl.h |  38 ++
 4 files changed, 1021 insertions(+)
 create mode 100644 arch/riscv/dts/k210-maix-bit.dts
 create mode 100644 arch/riscv/dts/k210.dtsi
 create mode 100644 include/dt-bindings/reset/k210-sysctl.h

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 4f30e6936f..3a6f96c67d 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
+dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
new file mode 100644
index 00..cb4dba5e13
--- /dev/null
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -0,0 +1,333 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+
+/dts-v1/;
+
+#include "k210.dtsi"
+
+#include 
+
+/ {
+   model = "Sipeed Maix Bit 2.0";
+   compatible = "sipeed,maix-bitm", "sipeed,maix-bit", "kendryte,k210";
+
+   chosen {
+   stdout-path = "serial0:115200";
+   };
+
+   gpio-leds {
+   compatible = "gpio-leds";
+
+   green {
+   gpios = <_0 4 GPIO_ACTIVE_LOW>;
+   };
+
+   red {
+   gpios = <_0 5 GPIO_ACTIVE_LOW>;
+   };
+
+   blue {
+   gpios = <_0 6 GPIO_ACTIVE_LOW>;
+   };
+   };
+
+   sound {
+   compatible = "simple-audio-card";
+   simple-audio-card,format = "i2s";
+   status = 

[PATCH v5 31/33] riscv: Enable cpu clock if it is present

[Sean Anderson]

The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously submitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index c6ed060abc..9ce58695aa 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2018, Bin Meng 
+ * Copyright (C) 2020, Sean Anderson 
  */
 
 #include 
@@ -117,6 +118,24 @@ static int riscv_cpu_bind(struct udevice *dev)
return 0;
 }
 
+static int riscv_cpu_probe(struct udevice *dev)
+{
+   int ret = 0;
+   struct clk clk;
+
+   /* Get a clock if it exists */
+   ret = clk_get_by_index(dev, 0, );
+   if (ret)
+   return 0;
+
+   ret = clk_enable();
+   clk_free();
+   if (ret == -ENOSYS || ret == -ENOTSUPP)
+   return 0;
+   else
+   return ret;
+}
+
 static const struct cpu_ops riscv_cpu_ops = {
.get_desc   = riscv_cpu_get_desc,
.get_info   = riscv_cpu_get_info,
@@ -133,6 +152,7 @@ U_BOOT_DRIVER(riscv_cpu) = {
.id = UCLASS_CPU,
.of_match = riscv_cpu_ids,
.bind = riscv_cpu_bind,
+   .probe = riscv_cpu_probe,
.ops = _cpu_ops,
.flags = DM_FLAG_PRE_RELOC,
 };
-- 
2.25.0

[PATCH v5 30/33] riscv: Try to get cpu frequency from a "clocks" node if it exists

[Sean Anderson]

Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---
This patch was previously sumbitted on its own as
https://patchwork.ozlabs.org/patch/1232420/

This patch is the combination of the patches
https://patchwork.ozlabs.org/patch/1223933/
https://patchwork.ozlabs.org/patch/1224957/
"riscv: Fix incorrect cpu frequency on RV64"
"riscv: Try to get cpu frequency from device tree"

Changes in v5:
- Include linux/err.h explicitly
- Reword commit message

Changes in v4:
- New

 drivers/cpu/riscv_cpu.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 28ad0aa30f..c6ed060abc 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -3,12 +3,14 @@
  * Copyright (C) 2018, Bin Meng 
  */
 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -27,9 +29,24 @@ static int riscv_cpu_get_desc(struct udevice *dev, char 
*buf, int size)
 
 static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info)
 {
+   int ret;
+   struct clk clk;
const char *mmu;
 
-   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
+   /* Zero out the frequency, in case sizeof(ulong) != sizeof(u32) */
+   info->cpu_freq = 0;
+
+   /* First try getting the frequency from the assigned clock */
+   ret = clk_get_by_index(dev, 0, );
+   if (!ret) {
+   ret = clk_get_rate();
+   if (!IS_ERR_VALUE(ret))
+   info->cpu_freq = ret;
+   clk_free();
+   }
+
+   if (!info->cpu_freq)
+   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
 
mmu = dev_read_string(dev, "mmu-type");
if (!mmu)
-- 
2.25.0

[PATCH v5 27/33] riscv: Fix race conditions when initializing IPI

[Sean Anderson]

The IPI code could have race conditions in several places.
* Several harts could race on the value of gd->arch->clint/plic
* Non-boot harts could race with the main hart on the DM subsystem In
  addition, if an IPI was pending when U-Boot started, it would cause the
  IPI handler to jump to address 0.

To address these problems, a new function riscv_init_ipi is introduced. It
is called once during arch_cpu_init_dm. Before this point, no riscv_*_ipi
functions may be called. Access is synchronized by gd->arch->ipi_ready.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 arch/riscv/cpu/cpu.c |  9 
 arch/riscv/include/asm/global_data.h |  1 +
 arch/riscv/include/asm/smp.h | 43 ++
 arch/riscv/lib/andes_plic.c  | 34 +-
 arch/riscv/lib/sbi_ipi.c |  5 ++
 arch/riscv/lib/sifive_clint.c| 33 +-
 arch/riscv/lib/smp.c | 68 
 7 files changed, 101 insertions(+), 92 deletions(-)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index e457f6acbf..a971ec8694 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -96,6 +96,15 @@ int arch_cpu_init_dm(void)
csr_write(CSR_SATP, 0);
}
 
+#ifdef CONFIG_SMP
+   ret = riscv_init_ipi();
+   if (ret)
+   return ret;
+
+   /* Atomically set a flag enabling IPI handling */
+   WRITE_ONCE(gd->arch.ipi_ready, 1);
+#endif
+
return 0;
 }
 
diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index 7276d9763f..b24f8fd2a7 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -28,6 +28,7 @@ struct arch_global_data {
 #endif
 #ifdef CONFIG_SMP
struct ipi_data ipi[CONFIG_NR_CPUS];
+   long ipi_ready; /* Set after riscv_init_ipi is called */
 #endif
 #ifndef CONFIG_XIP
ulong available_harts;
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 74de92ed13..1b428856b2 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -51,4 +51,47 @@ void handle_ipi(ulong hart);
  */
 int smp_call_function(ulong addr, ulong arg0, ulong arg1, int wait);
 
+/**
+ * riscv_init_ipi() - Initialize inter-process interrupt (IPI) driver
+ *
+ * Platform code must provide this function. This function is called once after
+ * the cpu driver is initialized. No other riscv_*_ipi() calls will be made
+ * before this function is called.
+ *
+ * @return 0 if OK, -ve on error
+ */
+int riscv_init_ipi(void);
+
+/**
+ * riscv_send_ipi() - Send inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of receiving hart
+ * @return 0 if OK, -ve on error
+ */
+int riscv_send_ipi(int hart);
+
+/**
+ * riscv_clear_ipi() - Clear inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of hart to be cleared
+ * @return 0 if OK, -ve on error
+ */
+int riscv_clear_ipi(int hart);
+
+/**
+ * riscv_get_ipi() - Get status of inter-processor interrupt (IPI)
+ *
+ * Platform code must provide this function.
+ *
+ * @hart: Hart ID of hart to be checked
+ * @pending: Pointer to variable with result of the check,
+ *   1 if IPI is pending, 0 otherwise
+ * @return 0 if OK, -ve on error
+ */
+int riscv_get_ipi(int hart, int *pending);
+
 #endif
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
index 20529ab3eb..8484f76386 100644
--- a/arch/riscv/lib/andes_plic.c
+++ b/arch/riscv/lib/andes_plic.c
@@ -30,20 +30,6 @@
 #define SEND_IPI_TO_HART(hart)  (0x80 >> (hart))
 
 DECLARE_GLOBAL_DATA_PTR;
-static int init_plic(void);
-
-#define PLIC_BASE_GET(void)\
-   do {\
-   long *ret;  \
-   \
-   if (!gd->arch.plic) {   \
-   ret = syscon_get_first_range(RISCV_SYSCON_PLIC); \
-   if (IS_ERR(ret))\
-   return PTR_ERR(ret);\
-   gd->arch.plic = ret;\
-   init_plic();\
-   }   \
-   } while (0)
 
 static int enable_ipi(int hart)
 {
@@ -93,13 +79,21 @@ static int init_plic(void)
return -ENODEV;
 }
 
+int riscv_init_ipi(void)
+{
+   int ret = syscon_get_first_range(RISCV_SYSCON_PLIC);
+
+   if (IS_ERR(ret))
+   return PTR_ERR(ret);
+   gd->arch.plic = ret;
+
+   return init_plic();
+}
+
 int riscv_send_ipi(int hart)
 {
-   unsigned int ipi;
+   unsigned int ipi 

[PATCH v5 28/33] riscv: Add option to support RISC-V privileged spec 1.9

[Sean Anderson]

Some older processors (notably the Kendryte K210) use an older version of
the RISC-V privileged specification. The primary changes between the old
and new are in virtual memory, and in the merging of three separate counter
enable CSRs.  Using the new CSR on an old processor causes an illegal
instruction exception.  This patch adds an option to use the old CSRs
instead of the new one.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v5:
- Rename to 1.9 to reflect the spec as implemented by the k210

Changes in v4:
- Fixed CSRs not being defined properly (thanks bmeng)
- Added ifdefs for all changed CSRs (e.g. for VM)
- Also properly disable VM on boot

Changes in v3:
- Renamed from "riscv: Add option to disable writes to mcounteren"
- Added original functionality back for older priv specs.

Changes in v2:
- Moved forward in the patch series

 arch/riscv/Kconfig   | 10 +
 arch/riscv/cpu/cpu.c |  9 
 arch/riscv/include/asm/csr.h | 40 
 3 files changed, 59 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 3338b788f8..b7a5757584 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -225,6 +225,16 @@ config XIP
 config SHOW_REGS
bool "Show registers on unhandled exception"
 
+config RISCV_PRIV_1_9
+   bool "Use version 1.9 of the RISC-V priviledged specification"
+   help
+ Older versions of the RISC-V priviledged specification had
+ separate counter enable CSRs for each privilege mode. Writing
+ to the unified mcounteren CSR on a processor implementing the
+ old specification will result in an illegal instruction
+ exception. In addition to counter CSR changes, the way virtual
+ memory is configured was also changed.
+
 config STACK_SIZE_SHIFT
int
default 14
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index a971ec8694..263fccc675 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -89,11 +89,20 @@ int arch_cpu_init_dm(void)
 * Enable perf counters for cycle, time,
 * and instret counters only
 */
+#ifdef CONFIG_RISCV_PRIV_1_9
+   csr_write(CSR_MSCOUNTEREN, GENMASK(2, 0));
+   csr_write(CSR_MUCOUNTEREN, GENMASK(2, 0));
+#else
csr_write(CSR_MCOUNTEREN, GENMASK(2, 0));
+#endif
 
/* Disable paging */
if (supports_extension('s'))
+#ifdef CONFIG_RISCV_PRIV_1_9
+   csr_read_clear(CSR_MSTATUS, SR_VM);
+#else
csr_write(CSR_SATP, 0);
+#endif
}
 
 #ifdef CONFIG_SMP
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index d1520743a2..12b6146b97 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -15,7 +15,11 @@
 #define SR_SIE _AC(0x0002, UL) /* Supervisor Interrupt Enable */
 #define SR_SPIE_AC(0x0020, UL) /* Previous Supervisor IE */
 #define SR_SPP _AC(0x0100, UL) /* Previously Supervisor */
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define SR_PUM _AC(0x0004, UL) /* Protect User Memory Access */
+#else
 #define SR_SUM _AC(0x0004, UL) /* Supervisor User Memory Access */
+#endif
 
 #define SR_FS  _AC(0x6000, UL) /* Floating-point Status */
 #define SR_FS_OFF  _AC(0x, UL)
@@ -29,6 +33,22 @@
 #define SR_XS_CLEAN_AC(0x0001, UL)
 #define SR_XS_DIRTY_AC(0x00018000, UL)
 
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define SR_VM  _AC(0x1F00, UL) /* Virtualization Management */
+#define SR_VM_MODE_BARE_AC(0x, UL) /* No translation or 
protection */
+#define SR_VM_MODE_BB  _AC(0x0100, UL) /* Single base-and-bound */
+#define SR_VM_MODE_BBID_AC(0x0200, UL) /* Separate instruction and
+  data base-and-bound */
+#ifndef CONFIG_64BIT
+#define SR_VM_MODE_32  _AC(0x0800, UL)
+#define SR_VM_MODE SR_VM_MODE_32
+#else
+#define SR_VM_MODE_39  _AC(0x0900, UL)
+#define SR_VM_MODE_48  _AC(0x0A00, UL)
+#define SR_VM_MODE SR_VM_MODE_39
+#endif
+#endif
+
 #ifndef CONFIG_64BIT
 #define SR_SD  _AC(0x8000, UL) /* FS/XS dirty */
 #else
@@ -36,6 +56,7 @@
 #endif
 
 /* SATP flags */
+#ifndef CONFIG_RISCV_PRIV_1_9
 #ifndef CONFIG_64BIT
 #define SATP_PPN   _AC(0x003F, UL)
 #define SATP_MODE_32   _AC(0x8000, UL)
@@ -45,6 +66,7 @@
 #define SATP_MODE_39   _AC(0x8000, UL)
 #define SATP_MODE  SATP_MODE_39
 #endif
+#endif
 
 /* SCAUSE */
 #define SCAUSE_IRQ_FLAG(_AC(1, UL) << (__riscv_xlen - 1))
@@ -88,17 +110,35 @@
 #define CSR_SCAUSE 0x142
 #define CSR_STVAL  0x143
 #define CSR_SIP0x144
+#ifdef CONFIG_RISCV_PRIV_1_9
+#define CSR_SPTBR  0x180
+#else
 #define CSR_SATP   0x180
+#endif
 #define CSR_MSTATUS

[PATCH v5 24/33] spi: dw: Add mem_ops

[Sean Anderson]

The designware ssi device has "broken" chip select behaviour [1], and needs
specific manipulation to use the built-in chip select. The existing fix is
to use an external GPIO for chip select, but typically the K210 has SPI3
directly connected to a flash chip with dedicated pins. This makes it
impossible to use the spi_xfer function to use spi, since the CS is
de-asserted in between calls.  This patch adds an implementation of
exec_op, which gives correct behaviour when reading/writing spi flash.

Work on this device has been difficult because the only example code I have
to work off is Kendryte's sdk, and I do not have access to the datasheet
(if anyone does, I would love to have a look!). The MMC device is still not
working, but I have been making progress.

[1] https://lkml.org/lkml/2015/12/23/132

Signed-off-by: Sean Anderson 
---

Changes in v5:
- Set rx and rx_end when writing

Changes in v4:
- New

 drivers/spi/designware_spi.c | 130 ++-
 1 file changed, 127 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index b80e99ee7f..7a03e66530 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -108,8 +109,8 @@ struct dw_spi_priv {
int len;
 
u32 fifo_len;   /* depth of the FIFO buffer */
-   void *tx;
-   void *tx_end;
+   const void *tx;
+   const void *tx_end;
void *rx;
void *rx_end;
 
@@ -428,7 +429,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int 
bitlen,
priv->tx_end = priv->tx + priv->len;
priv->rx = rx;
/* If we aren't recieving, rx_end needs to be valid for tx_max() */
-   priv->rx_end = priv->rx + (rx ? priv->len : 0);
+   priv->rx_end = priv->rx + priv->len;
 
/* Disable controller before writing control registers */
spi_enable_chip(priv, 0);
@@ -472,6 +473,124 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int 
bitlen,
return ret;
 }
 
+/*
+ * This function is necessary for reading SPI flash with the native CS
+ * c.f. https://lkml.org/lkml/2015/12/23/132
+ */
+static int dw_spi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
+{
+   bool read = op->data.dir == SPI_MEM_DATA_IN;
+   int pos, i, ret = 0;
+   struct udevice *bus = slave->dev->parent;
+   struct dw_spi_platdata *plat = dev_get_platdata(bus);
+   struct dw_spi_priv *priv = dev_get_priv(bus);
+   u8 op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
+   u8 op_buf[op_len];
+   u32 cr0;
+
+   if (read)
+   priv->tmode = SPI_TMOD_EPROMREAD;
+   else
+   priv->tmode = SPI_TMOD_TO;
+
+   debug("%s: buf=%p len=%u [bytes]\n",
+ __func__, op->data.buf.in, op->data.nbytes);
+
+   cr0 = GEN_CTRL0(priv, plat);
+   debug("%s: cr0=%08x\n", __func__, cr0);
+
+   spi_enable_chip(priv, 0);
+   dw_write(priv, DW_SPI_CTRL0, cr0);
+   if (read)
+   dw_write(priv, DW_SPI_CTRL1, op->data.nbytes - 1);
+   spi_enable_chip(priv, 1);
+
+   /* From spi_mem_exec_op */
+   pos = 0;
+   op_buf[pos++] = op->cmd.opcode;
+   if (op->addr.nbytes) {
+   for (i = 0; i < op->addr.nbytes; i++)
+   op_buf[pos + i] = op->addr.val >>
+   (8 * (op->addr.nbytes - i - 1));
+
+   pos += op->addr.nbytes;
+   }
+   if (op->dummy.nbytes)
+   memset(op_buf + pos, 0xff, op->dummy.nbytes);
+
+   priv->tx = _buf;
+   priv->tx_end = priv->tx + op_len;
+   priv->rx = NULL;
+   priv->rx_end = NULL;
+   while (priv->tx != priv->tx_end) {
+   dw_writer(priv);
+   /* This loop needs a delay otherwise we can hang */
+   udelay(1);
+   }
+
+   /*
+* XXX: The following are tight loops! Enabling debug messages may cause
+* them to fail because we are not reading/writing the fifo fast enough.
+*
+* We heuristically break out of the loop when we stop getting data.
+* This is to stop us from hanging if the device doesn't send any data
+* (either at all, or after sending a response). For example, one flash
+* chip I tested did not send anything back after the first 64K of data.
+*/
+   if (read) {
+   /* If we have gotten any data back yet */
+   bool got_data = false;
+   /* How many times we have looped without reading anything */
+   int loops_since_read = 0;
+   struct spi_mem_op *mut_op = (struct spi_mem_op *)op;
+
+   priv->rx = op->data.buf.in;
+   priv->rx_end = priv->rx + op->data.nbytes;
+
+   dw_write(priv, DW_SPI_SER, 1 << spi_chip_select(slave->dev));
+   while 

[PATCH v5 25/33] wdt: Move asm/utils.h to log2.h

[Sean Anderson]

This header is needed outside of the arm architecture for the designware
watchdog.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---
This patch previously appeared as
https://patchwork.ozlabs.org/patch/1232411/

Changes in v5:
- New
- Include linux/err.h explicitly

 arch/arm/cpu/armv7/cache_v7.c  | 2 +-
 arch/arm/mach-davinci/spl.c| 2 +-
 arch/arm/mach-omap2/clocks-common.c| 2 +-
 arch/arm/mach-omap2/emif-common.c  | 2 +-
 arch/arm/mach-omap2/omap4/emif.c   | 2 +-
 arch/arm/mach-omap2/omap5/dra7xx_iodelay.c | 2 +-
 arch/arm/mach-omap2/omap5/emif.c   | 2 +-
 arch/arm/mach-omap2/omap5/hwinit.c | 2 +-
 arch/arm/mach-socfpga/spl_a10.c| 2 +-
 arch/arm/mach-socfpga/spl_agilex.c | 2 +-
 arch/arm/mach-socfpga/spl_gen5.c   | 2 +-
 arch/arm/mach-socfpga/spl_s10.c| 2 +-
 drivers/watchdog/designware_wdt.c  | 3 ++-
 arch/arm/include/asm/utils.h => include/log2.h | 4 ++--
 14 files changed, 16 insertions(+), 15 deletions(-)
 rename arch/arm/include/asm/utils.h => include/log2.h (93%)

diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 99eb7db342..049a27cc92 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -8,7 +8,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #define ARMV7_DCACHE_INVAL_RANGE   1
 #define ARMV7_DCACHE_CLEAN_INVAL_RANGE 2
diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c
index d44e840aa0..c1a62b662d 100644
--- a/arch/arm/mach-davinci/spl.c
+++ b/arch/arm/mach-davinci/spl.c
@@ -8,7 +8,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-omap2/clocks-common.c 
b/arch/arm/mach-omap2/clocks-common.c
index 9aff83e9df..67c62e8eb0 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -19,7 +19,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-omap2/emif-common.c 
b/arch/arm/mach-omap2/emif-common.c
index 4658f67e84..2762934092 100644
--- a/arch/arm/mach-omap2/emif-common.c
+++ b/arch/arm/mach-omap2/emif-common.c
@@ -17,7 +17,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-omap2/omap4/emif.c b/arch/arm/mach-omap2/omap4/emif.c
index 35a51645be..d2b530535e 100644
--- a/arch/arm/mach-omap2/omap4/emif.c
+++ b/arch/arm/mach-omap2/omap4/emif.c
@@ -11,7 +11,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
 u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;
diff --git a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c 
b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
index 598074ba21..607188bcae 100644
--- a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
+++ b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
@@ -8,7 +8,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-omap2/omap5/emif.c b/arch/arm/mach-omap2/omap5/emif.c
index f3661a0e74..a5c74261c0 100644
--- a/arch/arm/mach-omap2/omap5/emif.c
+++ b/arch/arm/mach-omap2/omap5/emif.c
@@ -11,7 +11,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
 #define print_timing_reg(reg) debug(#reg" - 0x%08x\n", (reg))
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c 
b/arch/arm/mach-omap2/omap5/hwinit.c
index 3b1733099f..290449e918 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -19,7 +19,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index d9ef851054..0f24bec4ef 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -9,7 +9,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-socfpga/spl_agilex.c 
b/arch/arm/mach-socfpga/spl_agilex.c
index ecc1a35c49..54b16c9061 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -6,7 +6,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
index a01e2a5cb9..bab609ad29 100644
--- a/arch/arm/mach-socfpga/spl_gen5.c
+++ b/arch/arm/mach-socfpga/spl_gen5.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
index d89151d902..48c64ef47a 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -7,7 +7,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git 

[PATCH v5 26/33] riscv: Add headers for asm/global_data.h

[Sean Anderson]

This header depended on bd_t and ulong, but did not include the appropriate
headers.

Signed-off-by: Sean Anderson 
Reviewed-by: Bin Meng 
---

Changes in v4:
- Include compiler.h not linux/compiler.h

 arch/riscv/include/asm/global_data.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index b74bd7e738..7276d9763f 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -11,6 +11,8 @@
 #define __ASM_GBL_DATA_H
 
 #include 
+#include 
+#include 
 
 /* Architecture-specific global data */
 struct arch_global_data {
-- 
2.25.0

[PATCH v5 21/33] spi: dw: Use generic function to read reg address

[Sean Anderson]

Using an fdt-specific function causes problems when compiled with a live
tree.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/spi/designware_spi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 765fa2f582..38c24fe550 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -161,7 +161,9 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus)
 {
struct dw_spi_platdata *plat = bus->platdata;
 
-   plat->regs = (struct dw_spi *)devfdt_get_addr(bus);
+   plat->regs = dev_read_addr_ptr(bus);
+   if (!plat->regs)
+   return -EINVAL;
 
/* Use 500KHz as a suitable default */
plat->frequency = dev_read_u32_default(bus, "spi-max-frequency",
-- 
2.25.0

[PATCH v5 19/33] spi: dw: Add device tree properties for fields in CTRL1

[Sean Anderson]

Some devices have different layouts for the fields in CTRL1 (e.g. the
Kendryte K210). Allow this layout to be configurable from the device tree.
The documentation has been taken from Linux.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v4:
- New

 .../spi/snps,dw-apb-ssi.txt   | 43 +++
 drivers/spi/designware_spi.c  | 40 ++---
 2 files changed, 68 insertions(+), 15 deletions(-)
 create mode 100644 doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt

diff --git a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt 
b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
new file mode 100644
index 00..4b6152f6b7
--- /dev/null
+++ b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
@@ -0,0 +1,43 @@
+Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface.
+
+Required properties:
+- compatible : "snps,dw-apb-ssi"
+- reg : The register base for the controller. For "mscc,-spi", a second
+  register set is required (named ICPU_CFG:SPI_MST)
+- #address-cells : <1>, as required by generic SPI binding.
+- #size-cells : <0>, also as required by generic SPI binding.
+- clocks : phandles for the clocks, see the description of clock-names below.
+   The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock
+   is optional. If a single clock is specified but no clock-name, it is the
+   "ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
+
+Optional properties:
+- clock-names : Contains the names of the clocks:
+"ssi_clk", for the core clock used to generate the external SPI clock.
+"pclk", the interface clock, required for register access.
+- cs-gpios : Specifies the gpio pins to be used for chipselects.
+- num-cs : The number of chipselects. If omitted, this will default to 4.
+- reg-io-width : The I/O register width (in bytes) implemented by this
+  device.  Supported values are 2 or 4 (the default).
+- snps,dfs-offset The offset in bits of the DFS field in CTRL0, defaulting to 0
+- snps,frf-offset The offset in bits of the FRF field in CTRL0, defaulting to 4
+- snps,tmod-offset The offset in bits of the tmode field in CTRL0, defaulting
+  to 6
+- snps,mode-offset The offset in bits of the work mode field in CTRL0,
+  defaulting to 8
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+   spi@fff0 {
+   compatible = "snps,dw-apb-ssi";
+   reg = <0xfff0 0x1000>;
+   interrupts = <0 154 4>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <_m_clk>;
+   num-cs = <2>;
+   cs-gpios = < 13 0>,
+  < 14 0>;
+   };
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 2dc16736a3..6e1c289297 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -3,6 +3,7 @@
  * Designware master SPI core controller driver
  *
  * Copyright (C) 2014 Stefan Roese 
+ * Copyright (C) 2020 Sean Anderson 
  *
  * Very loosely based on the Linux driver:
  * drivers/spi/spi-dw.c, which is:
@@ -51,20 +52,14 @@
 #define DW_SPI_DR  0x60
 
 /* Bit fields in CTRLR0 */
-#define SPI_DFS_OFFSET 0
-
-#define SPI_FRF_OFFSET 4
 #define SPI_FRF_SPI0x0
 #define SPI_FRF_SSP0x1
 #define SPI_FRF_MICROWIRE  0x2
 #define SPI_FRF_RESV   0x3
 
-#define SPI_MODE_OFFSET6
-#define SPI_SCPH_OFFSET6
-#define SPI_SCOL_OFFSET7
+#define SPI_MODE_SCPH  0x1
+#define SPI_MODE_SCOL  0x2
 
-#define SPI_TMOD_OFFSET8
-#define SPI_TMOD_MASK  (0x3 << SPI_TMOD_OFFSET)
 #defineSPI_TMOD_TR 0x0 /* xmit & recv 
*/
 #define SPI_TMOD_TO0x1 /* xmit only */
 #define SPI_TMOD_RO0x2 /* recv only */
@@ -89,6 +84,12 @@
 struct dw_spi_platdata {
s32 frequency;  /* Default clock frequency, -1 for none */
void __iomem *regs;
+
+   /* Offsets in CTRL0 */
+   u8 dfs_off;
+   u8 frf_off;
+   u8 tmod_off;
+   u8 mode_off;
 };
 
 struct dw_spi_priv {
@@ -115,6 +116,15 @@ struct dw_spi_priv {
struct reset_ctl_bulk   resets;
 };
 
+static inline u32 GEN_CTRL0(struct dw_spi_priv *priv,
+   struct dw_spi_platdata *plat)
+{
+   return ((priv->bits_per_word - 1) << plat->dfs_off |
+ (priv->type << plat->frf_off) |
+ (priv->mode << plat->mode_off) |
+ (priv->tmode << plat->tmod_off));
+}
+
 static inline u32 dw_read(struct dw_spi_priv *priv, u32 offset)
 {
return __raw_readl(priv->regs + offset);
@@ -160,6 +170,10 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus)
/* Use 500KHz as 

[PATCH v5 17/33] gpio: dw: Return output value when direction is out

[Sean Anderson]

dm_gpio_ops.get_value can be called when the gpio is either input or
output. The current dw code always returns the input value, which is
invalid if the direction is set to out.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/gpio/dwapb_gpio.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c
index 09abab5c39..058c5fbfbf 100644
--- a/drivers/gpio/dwapb_gpio.c
+++ b/drivers/gpio/dwapb_gpio.c
@@ -64,13 +64,6 @@ static int dwapb_gpio_direction_output(struct udevice *dev, 
unsigned pin,
return 0;
 }
 
-static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
-{
-   struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
-   return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin));
-}
-
-
 static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
 {
struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
@@ -96,6 +89,18 @@ static int dwapb_gpio_get_function(struct udevice *dev, 
unsigned offset)
return GPIOF_INPUT;
 }
 
+static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
+{
+   struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
+   u32 value;
+
+   if (dwapb_gpio_get_function(dev, pin) == GPIOF_OUTPUT)
+   value = readl(plat->base + GPIO_SWPORT_DR(plat->bank));
+   else
+   value = readl(plat->base + GPIO_EXT_PORT(plat->bank));
+   return !!(value & BIT(pin));
+}
+
 static const struct dm_gpio_ops gpio_dwapb_ops = {
.direction_input= dwapb_gpio_direction_input,
.direction_output   = dwapb_gpio_direction_output,
-- 
2.25.0

[PATCH v5 23/33] spi: dw: Properly set rx_end when not recieving

[Sean Anderson]

The difference between rx and rx_end is used by tx_max when calculating how
much to write. If we aren't reading anything, this could cause us to let
the tx fifo bottom out.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/spi/designware_spi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 613eb0d0e6..b80e99ee7f 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -427,7 +427,8 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int 
bitlen,
priv->tx = (void *)tx;
priv->tx_end = priv->tx + priv->len;
priv->rx = rx;
-   priv->rx_end = priv->rx + priv->len;
+   /* If we aren't recieving, rx_end needs to be valid for tx_max() */
+   priv->rx_end = priv->rx + (rx ? priv->len : 0);
 
/* Disable controller before writing control registers */
spi_enable_chip(priv, 0);
-- 
2.25.0

[PATCH v5 22/33] spi: dw: Speed up transfer loops

[Sean Anderson]

The transfer loops are very tight on some platforms (especially on higher
speeds). If we don't read/write fast enough we can run into over-/under-
flow problems. This patch removes several divisions and log statements,
and simplifies the read logic.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/spi/designware_spi.c | 29 +
 1 file changed, 9 insertions(+), 20 deletions(-)

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 38c24fe550..613eb0d0e6 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -304,7 +304,7 @@ static inline u32 tx_max(struct dw_spi_priv *priv)
 {
u32 tx_left, tx_room, rxtx_gap;
 
-   tx_left = (priv->tx_end - priv->tx) / (priv->bits_per_word >> 3);
+   tx_left = priv->tx_end - priv->tx;
tx_room = priv->fifo_len - dw_read(priv, DW_SPI_TXFLR);
 
/*
@@ -315,8 +315,7 @@ static inline u32 tx_max(struct dw_spi_priv *priv)
 * shift registers. So a control from sw point of
 * view is taken.
 */
-   rxtx_gap = ((priv->rx_end - priv->rx) - (priv->tx_end - priv->tx)) /
-   (priv->bits_per_word >> 3);
+   rxtx_gap = ((priv->rx_end - priv->rx) - (priv->tx_end - priv->tx));
 
return min3(tx_left, tx_room, (u32)(priv->fifo_len - rxtx_gap));
 }
@@ -324,7 +323,7 @@ static inline u32 tx_max(struct dw_spi_priv *priv)
 /* Return the max entries we should read out of rx fifo */
 static inline u32 rx_max(struct dw_spi_priv *priv)
 {
-   u32 rx_left = (priv->rx_end - priv->rx) / (priv->bits_per_word >> 3);
+   u32 rx_left = priv->rx_end - priv->rx;
 
return min_t(u32, rx_left, dw_read(priv, DW_SPI_RXFLR));
 }
@@ -336,15 +335,10 @@ static void dw_writer(struct dw_spi_priv *priv)
 
while (max--) {
/* Set the tx word if the transfer's original "tx" is not null 
*/
-   if (priv->tx_end - priv->len) {
-   if (priv->bits_per_word == 8)
-   txw = *(u8 *)(priv->tx);
-   else
-   txw = *(u16 *)(priv->tx);
-   }
+   if (priv->tx_end - priv->len)
+   txw = *(u8 *)(priv->tx);
dw_write(priv, DW_SPI_DR, txw);
-   debug("%s: tx=0x%02x\n", __func__, txw);
-   priv->tx += priv->bits_per_word >> 3;
+   priv->tx++;
}
 }
 
@@ -355,16 +349,11 @@ static void dw_reader(struct dw_spi_priv *priv)
 
while (max--) {
rxw = dw_read(priv, DW_SPI_DR);
-   debug("%s: rx=0x%02x\n", __func__, rxw);
 
/* Care about rx if the transfer's original "rx" is not null */
-   if (priv->rx_end - priv->len) {
-   if (priv->bits_per_word == 8)
-   *(u8 *)(priv->rx) = rxw;
-   else
-   *(u16 *)(priv->rx) = rxw;
-   }
-   priv->rx += priv->bits_per_word >> 3;
+   if (priv->rx_end - priv->len)
+   *(u8 *)(priv->rx) = rxw;
+   priv->rx++;
}
 }
 
-- 
2.25.0

[PATCH v5 20/33] spi: dw: Rename "cs-gpio" to "cs-gpios"

[Sean Anderson]

This property is named differently than other SPI drivers with the same
property, as well as the property as used in Linux.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 arch/arc/dts/axs10x_mb.dtsi  |  3 ++-
 arch/arc/dts/hsdk.dts|  3 ++-
 drivers/spi/designware_spi.c | 10 +++---
 3 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index 5b77642b8d..50e62788cf 100644
--- a/arch/arc/dts/axs10x_mb.dtsi
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -97,7 +97,8 @@
spi-max-frequency = <400>;
clocks = <>;
clock-names = "spi_clk";
-   cs-gpio = <_gpio 0>;
+   num-cs = <1>;
+   cs-gpios = <_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
index 34ef3a620a..719ffdbce5 100644
--- a/arch/arc/dts/hsdk.dts
+++ b/arch/arc/dts/hsdk.dts
@@ -120,7 +120,8 @@
spi-max-frequency = <400>;
clocks = <_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
-   cs-gpio = <_gpio 0>;
+   num-cs = <1>;
+   cs-gpios = <_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 6e1c289297..765fa2f582 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -142,7 +142,8 @@ static int request_gpio_cs(struct udevice *bus)
int ret;
 
/* External chip select gpio line is optional */
-   ret = gpio_request_by_name(bus, "cs-gpio", 0, >cs_gpio, 0);
+   ret = gpio_request_by_name(bus, "cs-gpios", 0, >cs_gpio,
+  GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
if (ret == -ENOENT)
return 0;
 
@@ -151,12 +152,7 @@ static int request_gpio_cs(struct udevice *bus)
return ret;
}
 
-   if (dm_gpio_is_valid(>cs_gpio)) {
-   dm_gpio_set_dir_flags(>cs_gpio,
- GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
-   }
-
-   debug("%s: used external gpio for CS management\n", __func__);
+   debug("%s: using external gpio for CS management\n", __func__);
 #endif
return 0;
 }
-- 
2.25.0

[PATCH v5 18/33] led: gpio: Default to using node name if label is absent

[Sean Anderson]

This more closely mirrors Linux's behaviour, and will make it easier to
transition to using function+color in the future.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/led/led_gpio.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index af6b8245c9..643d5e2116 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -98,11 +98,8 @@ static int led_gpio_bind(struct udevice *parent)
const char *label;
 
label = ofnode_read_string(node, "label");
-   if (!label) {
-   debug("%s: node %s has no label\n", __func__,
- ofnode_get_name(node));
-   return -EINVAL;
-   }
+   if (!label)
+   label = ofnode_get_name(node);
ret = device_bind_driver_to_node(parent, "gpio_led",
 ofnode_get_name(node),
 node, );
-- 
2.25.0

[PATCH v5 13/33] pinctrl: Add support for Kendryte K210 FPIOA

[Sean Anderson]

The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 MAINTAINERS   |   2 +
 .../pinctrl/kendryte,k210-fpioa.txt   | 116 +++
 drivers/pinctrl/Kconfig   |   1 +
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/kendryte/Kconfig  |   7 +
 drivers/pinctrl/kendryte/Makefile |   1 +
 drivers/pinctrl/kendryte/pinctrl.c| 663 ++
 drivers/pinctrl/kendryte/pinctrl.h| 325 +
 include/dt-bindings/pinctrl/k210-pinctrl.h|  12 +
 9 files changed, 1128 insertions(+)
 create mode 100644 doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
 create mode 100644 drivers/pinctrl/kendryte/Kconfig
 create mode 100644 drivers/pinctrl/kendryte/Makefile
 create mode 100644 drivers/pinctrl/kendryte/pinctrl.c
 create mode 100644 drivers/pinctrl/kendryte/pinctrl.h
 create mode 100644 include/dt-bindings/pinctrl/k210-pinctrl.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 8e9e0569ba..8725bcf9af 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -809,7 +809,9 @@ RISC-V KENDRYTE
 M: Sean Anderson 
 S: Maintained
 F: doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
+F: doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
 F: drivers/clk/kendryte/
+F: drivers/pinctrl/kendryte/
 F: include/kendryte/
 
 RNG
diff --git a/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt 
b/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
new file mode 100644
index 00..299ce65304
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/kendryte,k210-fpioa.txt
@@ -0,0 +1,116 @@
+Kendryte K210 FPIOA
+
+This binding describes the Fully-Programmable Input/Output Array found on
+Kendryte K210 SoCs. Any of the 256 functions can be mapped to any of the 48
+pins.
+
+Required properties:
+- compatible: should be "kendryte,k210-fpioa"
+- reg: address and length of the FPIOA registers
+- kendryte,sysctl: phandle to the "sysctl" register map node
+- kendryte,power-offset: offset in the register map of the power bank control
+  register (in bytes)
+
+Configuration nodes
+
+Pin configuration nodes are documented in pinctrl-bindings.txt
+
+Valid values for pins, groups, and function names:
+
+pins:
+   "IO_X", where X is a number from 0 to 47.
+
+groups:
+   A0, A1, A2, B0, B1, B2, C0, C1
+
+functions:
+   JTAG_TCLK, JTAG_TDI, JTAG_TMS, JTAG_TDO, SPI0_D0, SPI0_D1, SPI0_D2,
+   SPI0_D3, SPI0_D4, SPI0_D5, SPI0_D6, SPI0_D7, SPI0_SS0, SPI0_SS1,
+   SPI0_SS2, SPI0_SS3, SPI0_ARB, SPI0_SCLK, UARTHS_RX, UARTHS_TX, RESV6,
+   RESV7, CLK_SPI1, CLK_I2C1, GPIOHS0, GPIOHS1, GPIOHS2, GPIOHS3, GPIOHS4,
+   GPIOHS5, GPIOHS6, GPIOHS7, GPIOHS8, GPIOHS9, GPIOHS10, GPIOHS11,
+   GPIOHS12, GPIOHS13, GPIOHS14, GPIOHS15, GPIOHS16, GPIOHS17, GPIOHS18,
+   GPIOHS19, GPIOHS20, GPIOHS21, GPIOHS22, GPIOHS23, GPIOHS24, GPIOHS25,
+   GPIOHS26, GPIOHS27, GPIOHS28, GPIOHS29, GPIOHS30, GPIOHS31, GPIO0,
+   GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, UART1_RX, UART1_TX,
+   UART2_RX, UART2_TX, UART3_RX, UART3_TX, SPI1_D0, SPI1_D1, SPI1_D2,
+   SPI1_D3, SPI1_D4, SPI1_D5, SPI1_D6, SPI1_D7, SPI1_SS0, SPI1_SS1,
+   SPI1_SS2, SPI1_SS3, SPI1_ARB, SPI1_SCLK, SPI2_D0, SPI2_SS, SPI2_SCLK,
+   I2S0_MCLK, I2S0_SCLK, I2S0_WS, I2S0_IN_D0, I2S0_IN_D1, I2S0_IN_D2,
+   I2S0_IN_D3, I2S0_OUT_D0, I2S0_OUT_D1, I2S0_OUT_D2, I2S0_OUT_D3,
+   I2S1_MCLK, I2S1_SCLK, I2S1_WS, I2S1_IN_D0, I2S1_IN_D1, I2S1_IN_D2,
+   I2S1_IN_D3, I2S1_OUT_D0, I2S1_OUT_D1, I2S1_OUT_D2, I2S1_OUT_D3,
+   I2S2_MCLK, I2S2_SCLK, I2S2_WS, I2S2_IN_D0, I2S2_IN_D1, I2S2_IN_D2,
+   I2S2_IN_D3, I2S2_OUT_D0, I2S2_OUT_D1, I2S2_OUT_D2, I2S2_OUT_D3, RESV0,
+   RESV1, RESV2, RESV3, RESV4, RESV5, I2C0_SCLK, I2C0_SDA, I2C1_SCLK,
+   I2C1_SDA, I2C2_SCLK, I2C2_SDA, DVP_XCLK, DVP_RST, DVP_PWDN, DVP_VSYNC,
+   DVP_HREF, DVP_PCLK, DVP_D0, DVP_D1, DVP_D2, DVP_D3, DVP_D4, DVP_D5,
+   DVP_D6, DVP_D7, SCCB_SCLK, SCCB_SDA, UART1_CTS, UART1_DSR, UART1_DCD,
+   UART1_RI, UART1_SIR_IN, UART1_DTR, UART1_RTS, UART1_OUT2, UART1_OUT1,
+   UART1_SIR_OUT, UART1_BAUD, UART1_RE, UART1_DE, UART1_RS485_EN,
+   UART2_CTS, UART2_DSR, UART2_DCD, UART2_RI, UART2_SIR_IN, UART2_DTR,
+   UART2_RTS, UART2_OUT2, UART2_OUT1, UART2_SIR_OUT, UART2_BAUD, UART2_RE,
+   UART2_DE, UART2_RS485_EN, UART3_CTS, UART3_DSR, UART3_DCD, UART3_RI,
+   UART3_SIR_IN, UART3_DTR, UART3_RTS, UART3_OUT2, UART3_OUT1,
+   UART3_SIR_OUT, UART3_BAUD, UART3_RE, UART3_DE, UART3_RS485_EN,
+   TIMER0_TOGGLE1, TIMER0_TOGGLE2, TIMER0_TOGGLE3, TIMER0_TOGGLE4,
+   TIMER1_TOGGLE1, TIMER1_TOGGLE2, TIMER1_TOGGLE3, TIMER1_TOGGLE4,
+   

[PATCH v5 14/33] gpio: sifive: Use generic reg read function

[Sean Anderson]

Using an fdt-specific function causes problems with a live tree.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/gpio/sifive-gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/sifive-gpio.c b/drivers/gpio/sifive-gpio.c
index 76d5a1d34e..111f759d2e 100644
--- a/drivers/gpio/sifive-gpio.c
+++ b/drivers/gpio/sifive-gpio.c
@@ -158,7 +158,7 @@ static int sifive_gpio_ofdata_to_platdata(struct udevice 
*dev)
struct sifive_gpio_platdata *plat = dev_get_platdata(dev);
fdt_addr_t addr;
 
-   addr = devfdt_get_addr(dev);
+   addr = dev_read_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
 
-- 
2.25.0

[PATCH v5 15/33] gpio: dw: Fix warnings about casting int to pointer

[Sean Anderson]

Explicitly cast fdt_addr_t to a void pointer, since we pass it to readl.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/gpio/dwapb_gpio.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c
index e3439eebb5..56dcad36f0 100644
--- a/drivers/gpio/dwapb_gpio.c
+++ b/drivers/gpio/dwapb_gpio.c
@@ -38,7 +38,7 @@ struct gpio_dwapb_platdata {
const char  *name;
int bank;
int pins;
-   fdt_addr_t  base;
+   void __iomem*base;
 };
 
 static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
@@ -174,7 +174,7 @@ static int gpio_dwapb_bind(struct udevice *dev)
if (!plat)
return -ENOMEM;
 
-   plat->base = base;
+   plat->base = (void *)base;
plat->bank = bank;
plat->pins = ofnode_read_u32_default(node, "snps,nr-gpios", 0);
 
-- 
2.25.0

[PATCH v5 11/33] reset: Add generic reset driver

[Sean Anderson]

This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v5:
- Reorder includes
- Include linux/err.h explicitly

Changes in v4:
- Added basic test
- Fix incorrect usage of regmap_update_bits

Changes in v3:
- New

 arch/sandbox/dts/test.dts | 15 
 configs/sandbox_defconfig |  1 +
 .../reset/syscon-reset.txt| 36 +
 drivers/reset/Kconfig |  5 ++
 drivers/reset/Makefile|  1 +
 drivers/reset/reset-syscon.c  | 80 +++
 test/dm/Makefile  |  1 +
 test/dm/syscon-reset.c| 58 ++
 8 files changed, 197 insertions(+)
 create mode 100644 doc/device-tree-bindings/reset/syscon-reset.txt
 create mode 100644 drivers/reset/reset-syscon.c
 create mode 100644 test/dm/syscon-reset.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 96e0b55eed..6f2fcc64a4 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -940,6 +940,21 @@
clocks = <_sandbox 4>;
power-domains = < 1>;
};
+
+   resetc2: syscon-reset {
+   compatible = "syscon-reset";
+   #reset-cells = <1>;
+   regmap = <>;
+   offset = <1>;
+   mask = <0x27FF>;
+   assert-high = <0>;
+   };
+
+   syscon-reset-test {
+   compatible = "sandbox,misc_sandbox";
+   resets = < 15>, < 30>, < 60>;
+   reset-names = "valid", "no_mask", "out_of_range";
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 22c1a073c4..ff0eaf3c4d 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -191,6 +191,7 @@ CONFIG_DM_RESET=y
 CONFIG_SANDBOX_RESET=y
 CONFIG_DM_RNG=y
 CONFIG_RNG_SANDBOX=y
+CONFIG_RESET_SYSCON=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_RV8803=y
 CONFIG_DEBUG_UART_SANDBOX=y
diff --git a/doc/device-tree-bindings/reset/syscon-reset.txt 
b/doc/device-tree-bindings/reset/syscon-reset.txt
new file mode 100644
index 00..f136b3d225
--- /dev/null
+++ b/doc/device-tree-bindings/reset/syscon-reset.txt
@@ -0,0 +1,36 @@
+Generic SYSCON mapped register reset driver
+
+This is a generic reset driver using syscon to map the reset register.
+The reset is generally performed with a write to the reset register
+defined by the register map pointed by syscon reference plus the offset and
+shifted by the reset specifier/
+
+To assert a reset on some device, the equivalent of the following operation is
+performed, where reset_id is the reset specifier from the device's resets
+property.
+
+   if (BIT(reset_id) & mask)
+   regmap[offset][reset_id] = assert-high;
+
+Required properties:
+- compatible: should contain "syscon-reset"
+- #reset-cells: must be 1
+- regmap: this is phandle to the register map node
+- offset: offset in the register map for the reboot register (in bytes)
+
+Optional properties:
+- mask: accept only the reset specifiers defined by the mask (32 bit)
+- assert-high: Bit to write when asserting a reset. Defaults to 1.
+
+Default will be little endian mode, 32 bit access only.
+
+Example:
+
+   reset-controller {
+   compatible = "syscon-reset";
+   #reset-cells = <1>;
+   regmap = <>;
+   offset = <0x20>;
+   mask = <0x27FF>;
+   assert-high = <0>;
+   };
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 75ccd65799..097bf32b21 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -148,4 +148,9 @@ config RESET_IMX7
help
  Support for reset controller on i.MX7/8 SoCs.
 
+config RESET_SYSCON
+   bool "Enable generic syscon reset driver support"
+   depends on DM_RESET
+   help
+ Support generic syscon mapped register reset devices.
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0a044d5d8c..433f1eca54 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
 obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
 obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
 obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
+obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o
diff --git a/drivers/reset/reset-syscon.c b/drivers/reset/reset-syscon.c
new file mode 100644
index 00..34dfe0bab6
--- /dev/null
+++ b/drivers/reset/reset-syscon.c
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Sean Anderson
+ */
+
+#include 
+#include 

[PATCH v5 16/33] gpio: dw: Add a trailing underscore to generated name

[Sean Anderson]

Previously, if there was no bank-name property, it was easy to have
confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch
follows the example of the sifive gpio driver.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/gpio/dwapb_gpio.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c
index 56dcad36f0..09abab5c39 100644
--- a/drivers/gpio/dwapb_gpio.c
+++ b/drivers/gpio/dwapb_gpio.c
@@ -184,7 +184,15 @@ static int gpio_dwapb_bind(struct udevice *dev)
 * Fall back to node name. This means accessing pins
 * via bank name won't work.
 */
-   plat->name = ofnode_get_name(node);
+   char name[32];
+
+   snprintf(name, sizeof(name), "%s_",
+ofnode_get_name(node));
+   plat->name = strdup(name);
+   if (!plat->name) {
+   kfree(plat);
+   return -ENOMEM;
+   }
}
 
ret = device_bind_ofnode(dev, dev->driver, plat->name,
-- 
2.25.0

[PATCH v5 05/33] clk: Add K210 pll support

[Sean Anderson]

This pll code is primarily based on the code from the kendryte standalone
sdk in lib/drivers/sysctl.c. k210_pll_calc_params is roughly analogous to
the algorithm used to set the pll frequency, but it has been completely
rewritten to be fixed-point based.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- Add function to register from a struct

Changes in v4:
- Rename the reference clock to "divider clock", and input clock to "reference
  clock" to match the upstream documentation.
- Add a test for calc_params. This currently resides in test/dm, but perhaps it
  should be moved to its own directory.
- Update MAINTAINERS
- Update copyright
- Lint

Changes in v3:
- Add an option to not include support for setting the pll rate. This saves
  around 1K in the final executable.
- Remove udelays to suppress warnings
- Bypass PLL after enabling, instead of before
- Check if the PLL is enabled already before doing a reset
- Fix bug with locked mask

Changes in v2:
- Rename driver to "k210_clk_pll"
- Add additional in-line documentation on algorithm and PLLs
- Restrict the range of internal VCO and reference frequencies
- Don't load driver before relocation
- Remove spurious references to mach-k210

 drivers/clk/Kconfig   |   1 +
 drivers/clk/Makefile  |   1 +
 drivers/clk/kendryte/Kconfig  |  12 +
 drivers/clk/kendryte/Makefile |   1 +
 drivers/clk/kendryte/pll.c| 600 ++
 include/kendryte/pll.h|  57 
 include/test/export.h |  16 +
 test/dm/Makefile  |   1 +
 test/dm/k210_pll.c|  95 ++
 9 files changed, 784 insertions(+)
 create mode 100644 drivers/clk/kendryte/Kconfig
 create mode 100644 drivers/clk/kendryte/Makefile
 create mode 100644 drivers/clk/kendryte/pll.c
 create mode 100644 include/kendryte/pll.h
 create mode 100644 include/test/export.h
 create mode 100644 test/dm/k210_pll.c

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 1992d4a4b4..fb8335267b 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -155,6 +155,7 @@ source "drivers/clk/analogbits/Kconfig"
 source "drivers/clk/at91/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 source "drivers/clk/imx/Kconfig"
+source "drivers/clk/kendryte/Kconfig"
 source "drivers/clk/meson/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/owl/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index e01783391d..d911954581 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_CLK_EXYNOS) += exynos/
 obj-$(CONFIG_$(SPL_TPL_)CLK_INTEL) += intel/
 obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o
+obj-$(CONFIG_CLK_K210) += kendryte/
 obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o
 obj-$(CONFIG_CLK_OWL) += owl/
 obj-$(CONFIG_CLK_RENESAS) += renesas/
diff --git a/drivers/clk/kendryte/Kconfig b/drivers/clk/kendryte/Kconfig
new file mode 100644
index 00..7b69c8afaf
--- /dev/null
+++ b/drivers/clk/kendryte/Kconfig
@@ -0,0 +1,12 @@
+config CLK_K210
+   bool "Clock support for Kendryte K210"
+   depends on CLK && CLK_CCF
+   help
+ This enables support clock driver for Kendryte K210 platforms.
+
+config CLK_K210_SET_RATE
+   bool "Enable setting the Kendryte K210 PLL rate"
+   depends on CLK_K210
+   help
+ Add functionality to calculate new rates for K210 PLLs. Enabling this
+ feature adds around 1K to U-Boot's final size.
diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
new file mode 100644
index 00..c56d93ea1c
--- /dev/null
+++ b/drivers/clk/kendryte/Makefile
@@ -0,0 +1 @@
+obj-y += pll.o
diff --git a/drivers/clk/kendryte/pll.c b/drivers/clk/kendryte/pll.c
new file mode 100644
index 00..8333e32e61
--- /dev/null
+++ b/drivers/clk/kendryte/pll.c
@@ -0,0 +1,600 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+#include 
+
+#define LOG_CATEGORY UCLASS_CLK
+#include 
+/* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define CLK_K210_PLL "k210_clk_pll"
+
+#ifdef CONFIG_CLK_K210_SET_RATE
+static int k210_pll_enable(struct clk *clk);
+static int k210_pll_disable(struct clk *clk);
+
+/*
+ * The PLL included with the Kendryte K210 appears to be a True Circuits, Inc.
+ * General-Purpose PLL. The logical layout of the PLL with internal feedback is
+ * approximately the following:
+ *
+ *  +---+
+ *  |reference clock|
+ *  +---+
+ *  |
+ *  v
+ *+--+
+ *|/r|
+ *+--+
+ *  |
+ *  v
+ *   +-+
+ *   |divided clock|
+ *   +-+
+ *  |
+ *  v
+ *  +--+
+ *  |phase detector|<---+
+ *  +--+|
+ *  |   |
+ *  v   +--+
+ *+---+ |feedback clock|
+ *|VCO| 

[PATCH v5 12/33] lib: Always set errno in hcreate_r

[Sean Anderson]

This could give a confusing error message if it failed and didn't set
errno.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 lib/hashtable.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/hashtable.c b/lib/hashtable.c
index 907e8a642f..e9ac7e252e 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -109,8 +109,10 @@ int hcreate_r(size_t nel, struct hsearch_data *htab)
}
 
/* There is still another table active. Return with error. */
-   if (htab->table != NULL)
+   if (htab->table != NULL) {
+   __set_errno(EINVAL);
return 0;
+   }
 
/* Change nel to the first prime number not smaller as nel. */
nel |= 1;   /* make odd */
@@ -123,8 +125,10 @@ int hcreate_r(size_t nel, struct hsearch_data *htab)
/* allocate memory and zero out */
htab->table = (struct env_entry_node *)calloc(htab->size + 1,
sizeof(struct env_entry_node));
-   if (htab->table == NULL)
+   if (htab->table == NULL) {
+   __set_errno(ENOMEM);
return 0;
+   }
 
/* everything went alright */
return 1;
-- 
2.25.0

[PATCH v5 10/33] dm: Fix error handling for dev_read_addr_ptr

[Sean Anderson]

dev_read_addr_ptr had different semantics depending on whether OF_LIVE was
enabled. This patch converts both implementations to return NULL on error,
and converts all call sites which check for FDT_ADDR_T_NONE to check for
NULL instead. This patch also removes the call to map_physmem, since we
have dev_remap_addr* for those semantics.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/clk/imx/clk-imx8mp.c  | 2 +-
 drivers/core/read.c   | 2 +-
 drivers/pinctrl/broadcom/pinctrl-bcm283x.c| 2 +-
 drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 2 +-
 include/dm/read.h | 4 +++-
 5 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index a2693d2f7a..df30f4a087 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -281,7 +281,7 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_SYS_PLL2_1000M, imx_clk_fixed_factor("sys_pll2_1000m", 
"sys_pll2_out", 1, 1));
 
base = dev_read_addr_ptr(dev);
-   if (base == (void *)FDT_ADDR_T_NONE)
+   if (!base)
return -EINVAL;
 
clk_dm(IMX8MP_CLK_A53_SRC, imx_clk_mux2("arm_a53_src", base + 0x8000, 
24, 3, imx8mp_a53_sels, ARRAY_SIZE(imx8mp_a53_sels)));
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 1f999b1b31..2a8813fff1 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -154,7 +154,7 @@ void *dev_read_addr_ptr(const struct udevice *dev)
 {
fdt_addr_t addr = dev_read_addr(dev);
 
-   return (addr == FDT_ADDR_T_NONE) ? NULL : map_sysmem(addr, 0);
+   return (addr == FDT_ADDR_T_NONE) ? NULL : addr;
 }
 
 void *dev_remap_addr(const struct udevice *dev)
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c 
b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
index eb720f09f8..6961536a4d 100644
--- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
+++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
@@ -116,7 +116,7 @@ int bcm283x_pinctl_probe(struct udevice *dev)
}
 
priv->base_reg = dev_read_addr_ptr(dev);
-   if (priv->base_reg == (void *)FDT_ADDR_T_NONE) {
+   if (!priv->base_reg) {
debug("%s: Failed to get base address\n", __func__);
return -EINVAL;
}
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c 
b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index c7351f32bb..bd95662ed5 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -630,7 +630,7 @@ int mtk_pinctrl_common_probe(struct udevice *dev,
int ret;
 
priv->base = dev_read_addr_ptr(dev);
-   if (priv->base == (void *)FDT_ADDR_T_NONE)
+   if (!priv->base)
return -EINVAL;
 
priv->soc = soc;
diff --git a/include/dm/read.h b/include/dm/read.h
index da8c7f25e7..d7183713dd 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -715,7 +715,9 @@ static inline fdt_addr_t dev_read_addr(const struct udevice 
*dev)
 
 static inline void *dev_read_addr_ptr(const struct udevice *dev)
 {
-   return devfdt_get_addr_ptr(dev);
+   void *addr = devfdt_get_addr_ptr(dev);
+
+   return ((fdt_addr_t)addr == FDT_ADDR_T_NONE) ? NULL : addr;
 }
 
 static inline fdt_addr_t dev_read_addr_pci(const struct udevice *dev)
-- 
2.25.0

[PATCH v5 07/33] clk: Add K210 clock support

[Sean Anderson]

Due to the large number of clocks, I decided to use the CCF. The overall
structure is modeled after the imx code. Clocks are stored in several
arrays.  There are some translation macros (FOOIFY()) which allow for more
dense packing.  A possible improvement could be to only store the
parameters we need, instead of the whole CCF struct.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- Don't unmap priv->reg
- Remove comment on APB clocks since it has been clarified by Kendryte
- Add i2s mclks
- Reorder clock ids to be continuous
- Rewrite to statically allocate all clocks. This has helped find several bugs
  (since it is easy to see when a clock has the wrong register).
- Fix ACLK sometimes having the wrong parent
- Fix SPI3 having the wrong divider
- Prevent being probed multiple times on failure

Changes in v4:
- Reparent aclk before configuring pll0
- Update copyright
- Lint

Changes in v3:
- Removed sysctl struct, replacing it with defines. This is to have the same
  interface to sysctl from C as from the device tree.
- Fixed clocks having the same id
- Fixed clocks not using the correct register/bits
- Aligned the defines in headers

Changes in v2:
- Add clk.o to obj-y
- Don't probe before relocation

 MAINTAINERS   |   7 +
 .../mfd/kendryte,k210-sysctl.txt  |  33 ++
 drivers/clk/kendryte/Kconfig  |   2 +-
 drivers/clk/kendryte/Makefile |   2 +-
 drivers/clk/kendryte/clk.c| 478 ++
 include/dt-bindings/clock/k210-sysctl.h   |  56 ++
 include/dt-bindings/mfd/k210-sysctl.h |  38 ++
 include/kendryte/clk.h|  35 ++
 8 files changed, 649 insertions(+), 2 deletions(-)
 create mode 100644 doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
 create mode 100644 drivers/clk/kendryte/clk.c
 create mode 100644 include/dt-bindings/clock/k210-sysctl.h
 create mode 100644 include/dt-bindings/mfd/k210-sysctl.h
 create mode 100644 include/kendryte/clk.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 82e4159bec..8e9e0569ba 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -805,6 +805,13 @@ F: arch/riscv/
 F: cmd/riscv/
 F: tools/prelink-riscv.c
 
+RISC-V KENDRYTE
+M: Sean Anderson 
+S: Maintained
+F: doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
+F: drivers/clk/kendryte/
+F: include/kendryte/
+
 RNG
 M: Sughosh Ganu 
 R: Heinrich Schuchardt 
diff --git a/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt 
b/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
new file mode 100644
index 00..5b24abcb62
--- /dev/null
+++ b/doc/device-tree-bindings/mfd/kendryte,k210-sysctl.txt
@@ -0,0 +1,33 @@
+Kendryte K210 Sysctl
+
+This binding describes the K210 sysctl device, which contains many 
miscellaneous
+registers controlling system functionality. This node is a register map and can
+be reference by other bindings which need a phandle to the K210 sysctl regmap.
+
+Required properties:
+- compatible: should be
+   "kendryte,k210-sysctl", "syscon", "simple-mfd"
+- reg: address and length of the sysctl registers
+- reg-io-width: must be <4>
+
+Clock sub-node
+
+This node is a binding for the clock tree driver
+
+Required properties:
+- compatible: should be "kendryte,k210-clk"
+- clocks: phandle to the "in0" external oscillator
+- #clock-cells: must be <1>
+
+Example:
+sysctl: syscon@5044 {
+   compatible = "kendryte,k210-sysctl", "syscon", "simple-mfd";
+   reg = <0x5044 0x100>;
+   reg-io-width = <4>;
+
+   sysclk: clock-controller {
+   compatible = "kendryte,k210-clk";
+   clocks = <>;
+   #clock-cells = <1>;
+   };
+};
diff --git a/drivers/clk/kendryte/Kconfig b/drivers/clk/kendryte/Kconfig
index 7b69c8afaf..073fca0781 100644
--- a/drivers/clk/kendryte/Kconfig
+++ b/drivers/clk/kendryte/Kconfig
@@ -1,6 +1,6 @@
 config CLK_K210
bool "Clock support for Kendryte K210"
-   depends on CLK && CLK_CCF
+   depends on CLK && CLK_CCF && CLK_COMPOSITE_CCF
help
  This enables support clock driver for Kendryte K210 platforms.
 
diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
index 47f682fce3..6fb68253ae 100644
--- a/drivers/clk/kendryte/Makefile
+++ b/drivers/clk/kendryte/Makefile
@@ -1 +1 @@
-obj-y += bypass.o pll.o
+obj-y += bypass.o clk.o pll.o
diff --git a/drivers/clk/kendryte/clk.c b/drivers/clk/kendryte/clk.c
new file mode 100644
index 00..b01d246682
--- /dev/null
+++ b/drivers/clk/kendryte/clk.c
@@ -0,0 +1,478 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson 
+ */
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+static ulong k210_clk_get_rate(struct clk *clk)
+{
+   struct clk *c;
+   int err = clk_get_by_id(clk->id, );
+
+   if (err)
+   return err;
+   return clk_get_rate(c);
+}
+

[PATCH v5 09/33] dm: Add support for simple-pm-bus

[Sean Anderson]

This type of bus is used in Linux to designate buses which have power
domains and/or clocks which need to be enabled before their child devices
can be used. Because power domains are automatically enabled before probing
in U-Boot, we just need to enable any clocks present.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v5:
- Reorder includes (simple pm)

Changes in v4:
- Split the bus off into its own driver
- Add test
- Fix line spacing in Kconfig
- Lint

Changes in v3:
- New

 arch/sandbox/dts/test.dts |  6 ++
 arch/sandbox/include/asm/clk.h|  1 +
 configs/sandbox_defconfig |  1 +
 .../bus/simple-pm-bus.txt | 44 +++
 drivers/core/Kconfig  |  7 +++
 drivers/core/Makefile |  1 +
 drivers/core/simple-pm-bus.c  | 56 +++
 test/dm/Makefile  |  1 +
 test/dm/simple-pm-bus.c   | 45 +++
 9 files changed, 162 insertions(+)
 create mode 100644 doc/device-tree-bindings/bus/simple-pm-bus.txt
 create mode 100644 drivers/core/simple-pm-bus.c
 create mode 100644 test/dm/simple-pm-bus.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 4a277934a7..96e0b55eed 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -934,6 +934,12 @@
mdio: mdio-test {
compatible = "sandbox,mdio";
};
+
+   pm-bus-test {
+   compatible = "simple-pm-bus";
+   clocks = <_sandbox 4>;
+   power-domains = < 1>;
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 1573e4a134..c184c4bffc 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -21,6 +21,7 @@ enum sandbox_clk_id {
SANDBOX_CLK_ID_I2C,
SANDBOX_CLK_ID_UART1,
SANDBOX_CLK_ID_UART2,
+   SANDBOX_CLK_ID_BUS,
 
SANDBOX_CLK_ID_COUNT,
 };
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 7b02b8de7c..22c1a073c4 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -90,6 +90,7 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_DEVRES=y
 CONFIG_DEBUG_DEVRES=y
+CONFIG_SIMPLE_PM_BUS=y
 CONFIG_ADC=y
 CONFIG_ADC_SANDBOX=y
 CONFIG_AXI=y
diff --git a/doc/device-tree-bindings/bus/simple-pm-bus.txt 
b/doc/device-tree-bindings/bus/simple-pm-bus.txt
new file mode 100644
index 00..6f15037131
--- /dev/null
+++ b/doc/device-tree-bindings/bus/simple-pm-bus.txt
@@ -0,0 +1,44 @@
+Simple Power-Managed Bus
+
+
+A Simple Power-Managed Bus is a transparent bus that doesn't need a real
+driver, as it's typically initialized by the boot loader.
+
+However, its bus controller is part of a PM domain, or under the control of a
+functional clock.  Hence, the bus controller's PM domain and/or clock must be
+enabled for child devices connected to the bus (either on-SoC or externally)
+to function.
+
+While "simple-pm-bus" follows the "simple-bus" set of properties, as specified
+in the Devicetree Specification, it is not an extension of "simple-bus".
+
+
+Required properties:
+  - compatible: Must contain at least "simple-pm-bus".
+   Must not contain "simple-bus".
+   It's recommended to let this be preceded by one or more
+   vendor-specific compatible values.
+  - #address-cells, #size-cells, ranges: Must describe the mapping between
+   parent address and child address spaces.
+
+Optional platform-specific properties for clock or PM domain control (at least
+one of them is required):
+  - clocks: Must contain a reference to the functional clock(s),
+  - power-domains: Must contain a reference to the PM domain.
+Please refer to the binding documentation for the clock and/or PM domain
+providers for more details.
+
+
+Example:
+
+   bsc: bus@fec1 {
+   compatible = "renesas,bsc-sh73a0", "renesas,bsc",
+"simple-pm-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0 0x2000>;
+   reg = <0xfec1 0x400>;
+   interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = <_clk>;
+   power-domains = <_a4s>;
+   };
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 3b95b5387b..0cd687526e 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -195,6 +195,13 @@ config SPL_SIMPLE_BUS
  Supports the 'simple-bus' driver, which is used on some systems
  in SPL.
 
+config SIMPLE_PM_BUS
+   bool "Support simple-pm-bus driver"
+   depends on DM && OF_CONTROL && CLK && POWER_DOMAIN
+   help
+ Supports the 'simple-pm-bus' driver, which is used for busses that
+ have power domains and/or clocks which need to be 

[PATCH v5 06/33] clk: Add a bypass clock for K210

[Sean Anderson]

This is a small driver to do a software bypass of a clock if hardware
bypass is not working. I have tried to write this in a generic fashion, so
that it could be potentially broken out of the kendryte code at some future
date. For the K210, it is used to have aclk bypass pll0 and use in0 instead
so that the CPU keeps on working.

Signed-off-by: Sean Anderson 
---

Changes in v5:
- Add function to register from a struct bypass

Changes in v4:
- New

 drivers/clk/kendryte/Makefile |   2 +-
 drivers/clk/kendryte/bypass.c | 270 ++
 include/kendryte/bypass.h |  31 
 3 files changed, 302 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/kendryte/bypass.c
 create mode 100644 include/kendryte/bypass.h

diff --git a/drivers/clk/kendryte/Makefile b/drivers/clk/kendryte/Makefile
index c56d93ea1c..47f682fce3 100644
--- a/drivers/clk/kendryte/Makefile
+++ b/drivers/clk/kendryte/Makefile
@@ -1 +1 @@
-obj-y += pll.o
+obj-y += bypass.o pll.o
diff --git a/drivers/clk/kendryte/bypass.c b/drivers/clk/kendryte/bypass.c
new file mode 100644
index 00..eb3e27d055
--- /dev/null
+++ b/drivers/clk/kendryte/bypass.c
@@ -0,0 +1,270 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Sean Anderson 
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#define LOG_CATEGORY UCLASS_CLK
+#include 
+
+#define CLK_K210_BYPASS "k210_clk_bypass"
+
+/*
+ * This is a small driver to do a software bypass of a clock if hardware bypass
+ * is not working. I have tried to write this in a generic fashion, so that it
+ * could be potentially broken out of the kendryte code at some future date.
+ *
+ * Say you have the following clock configuration
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ * ^
+ */|
+ *   / |
+ *  /  |
+ * /   |
+ */|
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * But the pll does not have a bypass, so when you configure the pll, the
+ * configuration needs to change to look like
+ *
+ * +---+ +---+
+ * |osc| |pll|
+ * +---+ +---+
+ *   ^
+ *   |\
+ *   | \
+ *   |  \
+ *   |   \
+ *   |\
+ * +---+ +---+
+ * |clk| |clk|
+ * +---+ +---+
+ *
+ * To set this up, create a bypass clock with bypassee=pll and alt=osc. When
+ * creating the child clocks, set their parent to the bypass clock. After
+ * creating all the children, call k210_bypass_setchildren().
+ */
+
+static int k210_bypass_dobypass(struct k210_bypass *bypass)
+{
+   int ret, i;
+
+   /*
+* If we already have saved parents, then the children are already
+* bypassed
+*/
+   if (bypass->child_count && bypass->saved_parents[0])
+   return 0;
+
+   for (i = 0; i < bypass->child_count; i++) {
+   struct clk *child = bypass->children[i];
+   struct clk *parent = clk_get_parent(child);
+
+   if (IS_ERR(parent)) {
+   for (; i; i--)
+   bypass->saved_parents[i] = NULL;
+   return PTR_ERR(parent);
+   }
+   bypass->saved_parents[i] = parent;
+   }
+
+   for (i = 0; i < bypass->child_count; i++) {
+   struct clk *child = bypass->children[i];
+
+   ret = clk_set_parent(child, bypass->alt);
+   if (ret) {
+   for (; i; i--)
+   clk_set_parent(bypass->children[i],
+  bypass->saved_parents[i]);
+   for (i = 0; i < bypass->child_count; i++)
+   bypass->saved_parents[i] = NULL;
+   return ret;
+   }
+   }
+
+   return 0;
+}
+
+static int k210_bypass_unbypass(struct k210_bypass *bypass)
+{
+   int err, ret, i;
+
+   if (!bypass->child_count && !bypass->saved_parents[0]) {
+   log_warning("Cannot unbypass children; dobypass not called 
first\n");
+   return 0;
+   }
+
+   ret = 0;
+   for (i = 0; i < bypass->child_count; i++) {
+   err = clk_set_parent(bypass->children[i],
+bypass->saved_parents[i]);
+   if (err)
+   ret = err;
+   bypass->saved_parents[i] = NULL;
+   }
+   return ret;
+}
+
+static ulong k210_bypass_get_rate(struct clk *clk)
+{
+   struct k210_bypass *bypass = to_k210_bypass(clk);
+   const struct clk_ops *ops = bypass->bypassee_ops;
+
+   if (ops->get_rate)
+   return ops->get_rate(bypass->bypassee);
+   else
+   return clk_get_parent_rate(bypass->bypassee);
+}
+
+static ulong k210_bypass_set_rate(struct clk *clk, unsigned long rate)
+{
+   int ret;
+   struct k210_bypass *bypass = to_k210_bypass(clk);
+   const struct clk_ops *ops = bypass->bypassee_ops;
+
+   /* Don't bother bypassing if we aren't going to set the rate */
+   if 

[PATCH v5 04/33] clk: Add functions to register CCF clock structs

[Sean Anderson]

This patch adds alternate versions of the clk_*_register functions for use
with statically-allocated struct clks. This allows drivers to define clocks
at compile-time and register them at run-time without malloc-ing. This
increases the size of the binary, but should not affect ram usage (since
the clocks now no longer live on the heap).

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 drivers/clk/clk-composite.c  | 103 +++
 drivers/clk/clk-divider.c|  56 +--
 drivers/clk/clk-gate.c   |  38 -
 include/linux/clk-provider.h |   9 +++
 4 files changed, 112 insertions(+), 94 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 819bfca2fc..b328c4e5a5 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -95,6 +95,51 @@ static int clk_composite_disable(struct clk *clk)
return 0;
 }
 
+struct clk *clk_register_composite_struct(const char *name,
+ const char * const *parent_names,
+ int num_parents,
+ struct clk_composite *composite)
+{
+   int ret;
+   struct clk *clk;
+
+   if (!num_parents || (num_parents != 1 && !composite->mux))
+   return ERR_PTR(-EINVAL);
+
+   if (composite->mux && composite->mux_ops)
+   composite->mux->data = (ulong)composite;
+
+   if (composite->rate && composite->rate_ops) {
+   if (!composite->rate_ops->get_rate)
+   return ERR_PTR(-EINVAL);
+
+   composite->rate->data = (ulong)composite;
+   }
+
+   if (composite->gate && composite->gate_ops) {
+   if (!composite->gate_ops->enable ||
+   !composite->gate_ops->disable)
+   return ERR_PTR(-EINVAL);
+
+   composite->gate->data = (ulong)composite;
+   }
+
+   clk = >clk;
+   ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
+  parent_names[clk_composite_get_parent(clk)]);
+   if (ret)
+   clk = ERR_PTR(ret);
+
+   if (composite->mux)
+   composite->mux->dev = clk->dev;
+   if (composite->rate)
+   composite->rate->dev = clk->dev;
+   if (composite->gate)
+   composite->gate->dev = clk->dev;
+
+   return clk;
+}
+
 struct clk *clk_register_composite(struct device *dev, const char *name,
   const char * const *parent_names,
   int num_parents, struct clk *mux,
@@ -107,62 +152,24 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
 {
struct clk *clk;
struct clk_composite *composite;
-   int ret;
-
-   if (!num_parents || (num_parents != 1 && !mux))
-   return ERR_PTR(-EINVAL);
 
composite = kzalloc(sizeof(*composite), GFP_KERNEL);
if (!composite)
return ERR_PTR(-ENOMEM);
 
-   if (mux && mux_ops) {
-   composite->mux = mux;
-   composite->mux_ops = mux_ops;
-   mux->data = (ulong)composite;
-   }
+   composite->mux = mux;
+   composite->mux_ops = mux_ops;
 
-   if (rate && rate_ops) {
-   if (!rate_ops->get_rate) {
-   clk = ERR_PTR(-EINVAL);
-   goto err;
-   }
+   composite->rate = rate;
+   composite->rate_ops = rate_ops;
 
-   composite->rate = rate;
-   composite->rate_ops = rate_ops;
-   rate->data = (ulong)composite;
-   }
+   composite->gate = gate;
+   composite->gate_ops = gate_ops;
 
-   if (gate && gate_ops) {
-   if (!gate_ops->enable || !gate_ops->disable) {
-   clk = ERR_PTR(-EINVAL);
-   goto err;
-   }
-
-   composite->gate = gate;
-   composite->gate_ops = gate_ops;
-   gate->data = (ulong)composite;
-   }
-
-   clk = >clk;
-   ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
-  parent_names[clk_composite_get_parent(clk)]);
-   if (ret) {
-   clk = ERR_PTR(ret);
-   goto err;
-   }
-
-   if (composite->mux)
-   composite->mux->dev = clk->dev;
-   if (composite->rate)
-   composite->rate->dev = clk->dev;
-   if (composite->gate)
-   composite->gate->dev = clk->dev;
-
-   return clk;
-
-err:
-   kfree(composite);
+   clk = clk_register_composite_struct(name, parent_names, num_parents,
+   composite);
+   if (IS_ERR(clk))
+   kfree(composite);
return clk;
 }
 
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 5fe1c3941f..747504d0a0 100644
--- 

[PATCH v5 02/33] clk: Check that ops of composite clock components exist before calling

[Sean Anderson]

clk_composite_ops was shared between all devices in the composite clock
driver.  If one clock had a feature (such as supporting set_parent) which
another clock did not, it could call a null pointer dereference.

This patch does three things
1. It adds null-pointer checks to all composite clock functions.
2. It makes clk_composite_ops const and sets its functions at compile-time.
3. It adds some basic sanity checks to num_parents.

The combined effect of these changes is that any of mux, rate, or gate can
be NULL, and composite clocks will still function normally. Previously, at
least mux had to exist, since clk_composite_get_parent was used to
determine the parent for clk_register.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v4:
- Return ENOTSUPP not ENOSYS with no set_parent

Changes in v3:
- Don't return an error code where a no-op would be fine

 drivers/clk/clk-composite.c | 57 +++--
 1 file changed, 35 insertions(+), 22 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 2ff1d6b47f..819bfca2fc 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -24,7 +24,10 @@ static u8 clk_composite_get_parent(struct clk *clk)
(struct clk *)dev_get_clk_ptr(clk->dev) : clk);
struct clk *mux = composite->mux;
 
-   return clk_mux_get_parent(mux);
+   if (mux)
+   return clk_mux_get_parent(mux);
+   else
+   return 0;
 }
 
 static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
@@ -34,7 +37,10 @@ static int clk_composite_set_parent(struct clk *clk, struct 
clk *parent)
const struct clk_ops *mux_ops = composite->mux_ops;
struct clk *mux = composite->mux;
 
-   return mux_ops->set_parent(mux, parent);
+   if (mux && mux_ops)
+   return mux_ops->set_parent(mux, parent);
+   else
+   return -ENOTSUPP;
 }
 
 static unsigned long clk_composite_recalc_rate(struct clk *clk)
@@ -44,7 +50,10 @@ static unsigned long clk_composite_recalc_rate(struct clk 
*clk)
const struct clk_ops *rate_ops = composite->rate_ops;
struct clk *rate = composite->rate;
 
-   return rate_ops->get_rate(rate);
+   if (rate && rate_ops)
+   return rate_ops->get_rate(rate);
+   else
+   return clk_get_parent_rate(clk);
 }
 
 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
@@ -54,7 +63,10 @@ static ulong clk_composite_set_rate(struct clk *clk, 
unsigned long rate)
const struct clk_ops *rate_ops = composite->rate_ops;
struct clk *clk_rate = composite->rate;
 
-   return rate_ops->set_rate(clk_rate, rate);
+   if (rate && rate_ops)
+   return rate_ops->set_rate(clk_rate, rate);
+   else
+   return clk_get_rate(clk);
 }
 
 static int clk_composite_enable(struct clk *clk)
@@ -64,7 +76,10 @@ static int clk_composite_enable(struct clk *clk)
const struct clk_ops *gate_ops = composite->gate_ops;
struct clk *gate = composite->gate;
 
-   return gate_ops->enable(gate);
+   if (gate && gate_ops)
+   return gate_ops->enable(gate);
+   else
+   return 0;
 }
 
 static int clk_composite_disable(struct clk *clk)
@@ -74,15 +89,12 @@ static int clk_composite_disable(struct clk *clk)
const struct clk_ops *gate_ops = composite->gate_ops;
struct clk *gate = composite->gate;
 
-   gate_ops->disable(gate);
-
-   return 0;
+   if (gate && gate_ops)
+   return gate_ops->disable(gate);
+   else
+   return 0;
 }
 
-struct clk_ops clk_composite_ops = {
-   /* This will be set according to clk_register_composite */
-};
-
 struct clk *clk_register_composite(struct device *dev, const char *name,
   const char * const *parent_names,
   int num_parents, struct clk *mux,
@@ -96,7 +108,9 @@ struct clk *clk_register_composite(struct device *dev, const 
char *name,
struct clk *clk;
struct clk_composite *composite;
int ret;
-   struct clk_ops *composite_ops = _composite_ops;
+
+   if (!num_parents || (num_parents != 1 && !mux))
+   return ERR_PTR(-EINVAL);
 
composite = kzalloc(sizeof(*composite), GFP_KERNEL);
if (!composite)
@@ -105,8 +119,6 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
if (mux && mux_ops) {
composite->mux = mux;
composite->mux_ops = mux_ops;
-   if (mux_ops->set_parent)
-   composite_ops->set_parent = clk_composite_set_parent;
mux->data = (ulong)composite;
}
 
@@ -115,11 +127,6 @@ struct clk *clk_register_composite(struct device *dev, 
const char *name,
clk = ERR_PTR(-EINVAL);
goto err;

[PATCH v5 08/33] doc: Fix typo in FIT documentation

[Sean Anderson]

u_boot should be u-boot

Signed-off-by: Sean Anderson 
---

Changes in v5:
- New

 doc/uImage.FIT/source_file_format.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/uImage.FIT/source_file_format.txt 
b/doc/uImage.FIT/source_file_format.txt
index 18d2aedcb7..00c4dc337c 100644
--- a/doc/uImage.FIT/source_file_format.txt
+++ b/doc/uImage.FIT/source_file_format.txt
@@ -172,7 +172,7 @@ the '/images' node should have the following layout:
   - os : OS name, mandatory for types "kernel" and "ramdisk". Valid OS names
 are: "openbsd", "netbsd", "freebsd", "4_4bsd", "linux", "svr4", "esix",
 "solaris", "irix", "sco", "dell", "ncr", "lynxos", "vxworks", "psos", 
"qnx",
-"u_boot", "rtems", "unity", "integrity".
+"u-boot", "rtems", "unity", "integrity".
   - arch : Architecture name, mandatory for types: "standalone", "kernel",
 "firmware", "ramdisk" and "fdt". Valid architecture names are: "alpha",
 "arm", "i386", "ia64", "mips", "mips64", "ppc", "s390", "sh", "sparc",
-- 
2.25.0

[PATCH v5 03/33] clk: Unconditionally recursively en-/dis-able clocks

[Sean Anderson]

For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
just enable them as normal. The enable count is local to the struct clk,
but this will never result in the actual en-/dis-able op being called
(unless the same struct clk is enabled twice).

For clocks in the CCF, we always traverse up the tree when enabling.
Previously, CCF clocks without id set would be skipped, stopping the
traversal too early.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v5:
- Clear enable_count on request

Changes in v4:
- Lint

Changes in v3:
- New

 drivers/clk/clk-uclass.c | 60 ++--
 1 file changed, 27 insertions(+), 33 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index b42e76ebfa..ffd8f874dc 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -410,6 +410,7 @@ int clk_request(struct udevice *dev, struct clk *clk)
ops = clk_dev_ops(dev);
 
clk->dev = dev;
+   clk->enable_count = 0;
 
if (!ops->request)
return 0;
@@ -522,7 +523,6 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 int clk_enable(struct clk *clk)
 {
const struct clk_ops *ops;
-   struct clk *clkp = NULL;
int ret;
 
debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name);
@@ -531,32 +531,29 @@ int clk_enable(struct clk *clk)
ops = clk_dev_ops(clk->dev);
 
if (CONFIG_IS_ENABLED(CLK_CCF)) {
-   /* Take id 0 as a non-valid clk, such as dummy */
-   if (clk->id && !clk_get_by_id(clk->id, )) {
-   if (clkp->enable_count) {
-   clkp->enable_count++;
-   return 0;
-   }
-   if (clkp->dev->parent &&
-   device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
-   ret = 
clk_enable(dev_get_clk_ptr(clkp->dev->parent));
-   if (ret) {
-   printf("Enable %s failed\n",
-  clkp->dev->parent->name);
-   return ret;
-   }
+   if (clk->enable_count) {
+   clk->enable_count++;
+   return 0;
+   }
+   if (clk->dev->parent &&
+   device_get_uclass_id(clk->dev->parent) == UCLASS_CLK) {
+   ret = clk_enable(dev_get_clk_ptr(clk->dev->parent));
+   if (ret) {
+   printf("Enable %s failed\n",
+  clk->dev->parent->name);
+   return ret;
}
}
 
if (ops->enable) {
ret = ops->enable(clk);
if (ret) {
-   printf("Enable %s failed\n", clk->dev->name);
+   printf("Enable %s failed (error %d)\n",
+  clk->dev->name, ret);
return ret;
}
}
-   if (clkp)
-   clkp->enable_count++;
+   clk->enable_count++;
} else {
if (!ops->enable)
return -ENOSYS;
@@ -582,7 +579,6 @@ int clk_enable_bulk(struct clk_bulk *bulk)
 int clk_disable(struct clk *clk)
 {
const struct clk_ops *ops;
-   struct clk *clkp = NULL;
int ret;
 
debug("%s(clk=%p)\n", __func__, clk);
@@ -591,29 +587,27 @@ int clk_disable(struct clk *clk)
ops = clk_dev_ops(clk->dev);
 
if (CONFIG_IS_ENABLED(CLK_CCF)) {
-   if (clk->id && !clk_get_by_id(clk->id, )) {
-   if (clkp->enable_count == 0) {
-   printf("clk %s already disabled\n",
-  clkp->dev->name);
-   return 0;
-   }
-
-   if (--clkp->enable_count > 0)
-   return 0;
+   if (clk->enable_count == 0) {
+   printf("clk %s already disabled\n",
+  clk->dev->name);
+   return 0;
}
 
+   if (--clk->enable_count > 0)
+   return 0;
+
if (ops->disable) {
ret = ops->disable(clk);
if (ret)
return ret;
}
 
-   if (clkp && clkp->dev->parent &&
-   device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
-   ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
+   if (clk->dev->parent &&
+   

[PATCH v5 00/33] riscv: Add Sipeed Maix support

[Sean Anderson]

This patch series adds support for Sipeed Maix boards and the Kendryte
K210 CPU. Currently, only the Maix Bit V2.0 is supported, however other
models are similar. This series depends on

(clk: Include missing headers for linux/clk-provider.h).

This will (hopefully) be the last version of this series adding any new
functionality, other than that needed to fix the bugs below.

Known Bugs/Limitations:
- Accessing the AI ram hangs, limiting available ram to 6M
- The MMC cannot be accessed with the dw_spi driver
- Trying to boot an image with bootm fails with
  ERROR: Failed to allocate 0x7d60 bytes below 0x8000.

To flash u-boot to a maix bit, run
kflash -tp /dev/ -B bit_mic u-boot-dtb.bin

Boot output should look like the following:

U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)

DRAM:  8 MiB
WDT:   Started with servicing (60s timeout)
MMC:   spi@5300:slot@0: 0
In:serial@3800
Out:   serial@3800
Err:   serial@3800
Hit any key to stop autoboot:  0
SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
Reading 5242880 byte(s) at offset 0x
## Starting application at 0x8000 ...

Changes for v5:
- Rebase onto master
- Add pinconf support
- Add gpio support
- Store environment in spi flash
- Group patches by prefix
- Add additional documentation
- Add SMP support
- Add WDT support

Changes for v4:
- Linted several patches
- Updated the copyright year for several files
- Added tests for syscon-reset, simple-pm-bus, and the pll calc_rate function
- Added/updated documentation
- Fixed SPI for the nor flash
- Fixed PLLs not enabling/setting rate properly
- RISCV_PRIV_1_9_1 now (un)defines all diferring CSRs, and also disables VM
- More devicetree changes

Changes for v3:
- Remove patch to set RV64I as default
- Remove patch for a separate sysctl driver
- Split off cpu frequency patch into its own series
- Reorder support/devicetree patches to come last
- Add patch for reset driver
- Add simple-pm-bus for busses with their own clocks
- Add additional documentation
- Reword mcounteren patch to refer to the RISC-V priv spec 1.9.1
- Many devicetree changes
- Switch to "make savedefconfig" to generate the config

Changes for v2:
- Many bugfixes for the device tree
- Modify the config to build without errors
- Add support for keeping internal PLL frequencies in-range
- Fix several rebase-induced artifacts

Sean Anderson (33):
  clk: Always use the supplied struct clk
  clk: Check that ops of composite clock components exist before calling
  clk: Unconditionally recursively en-/dis-able clocks
  clk: Add functions to register CCF clock structs
  clk: Add K210 pll support
  clk: Add a bypass clock for K210
  clk: Add K210 clock support
  doc: Fix typo in FIT documentation
  dm: Add support for simple-pm-bus
  dm: Fix error handling for dev_read_addr_ptr
  reset: Add generic reset driver
  lib: Always set errno in hcreate_r
  pinctrl: Add support for Kendryte K210 FPIOA
  gpio: sifive: Use generic reg read function
  gpio: dw: Fix warnings about casting int to pointer
  gpio: dw: Add a trailing underscore to generated name
  gpio: dw: Return output value when direction is out
  led: gpio: Default to using node name if label is absent
  spi: dw: Add device tree properties for fields in CTRL1
  spi: dw: Rename "cs-gpio" to "cs-gpios"
  spi: dw: Use generic function to read reg address
  spi: dw: Speed up transfer loops
  spi: dw: Properly set rx_end when not recieving
  spi: dw: Add mem_ops
  wdt: Move asm/utils.h to log2.h
  riscv: Add headers for asm/global_data.h
  riscv: Fix race conditions when initializing IPI
  riscv: Add option to support RISC-V privileged spec 1.9
  riscv: Allow use of reset drivers
  riscv: Try to get cpu frequency from a "clocks" node if it exists
  riscv: Enable cpu clock if it is present
  riscv: Add device tree for K210 and Sipeed Maix BitM
  riscv: Add Sipeed Maix support

 MAINTAINERS   |   9 +
 arch/arc/dts/axs10x_mb.dtsi   |   3 +-
 arch/arc/dts/hsdk.dts |   3 +-
 arch/arm/cpu/armv7/cache_v7.c |   2 +-
 arch/arm/mach-davinci/spl.c   |   2 +-
 arch/arm/mach-omap2/clocks-common.c   |   2 +-
 arch/arm/mach-omap2/emif-common.c |   2 +-
 arch/arm/mach-omap2/omap4/emif.c  |   2 +-
 arch/arm/mach-omap2/omap5/dra7xx_iodelay.c|   2 +-
 arch/arm/mach-omap2/omap5/emif.c  |   2 +-
 arch/arm/mach-omap2/omap5/hwinit.c|   2 +-
 arch/arm/mach-socfpga/spl_a10.c   |   2 +-
 arch/arm/mach-socfpga/spl_agilex.c|   2 +-
 arch/arm/mach-socfpga/spl_gen5.c  |   2 +-
 arch/arm/mach-socfpga/spl_s10.c   |   2 +-
 arch/riscv/Kconfig|  14 +
 arch/riscv/cpu/cpu.c  |  18 +
 arch/riscv/dts/Makefile   |   1 +
 

[PATCH v5 01/33] clk: Always use the supplied struct clk

[Sean Anderson]

CCF clocks should always use the struct clock passed to their methods for
extracting the driver-specific clock information struct. Previously, many
functions would use the clk->dev->priv if the device was bound. This could
cause problems with composite clocks. The individual clocks in a composite
clock did not have the ->dev field filled in. This was fine, because the
device-specific clock information would be used. However, since there was
no ->dev, there was no way to get the parent clock. This caused the
recalc_rate method of the CCF divider clock to fail. One option would be to
use the clk->priv field to get the composite clock and from there get the
appropriate parent device. However, this would tie the implementation to
the composite clock. In general, different devices should not rely on the
contents of ->priv from another device.

The simple solution to this problem is to just always use the supplied
struct clock. The composite clock now fills in the ->dev pointer of its
child clocks.  This allows child clocks to make calls like clk_get_parent()
without issue.

imx avoided the above problem by using a custom get_rate function with
composite clocks.

Signed-off-by: Sean Anderson 
Acked-by: Lukasz Majewski 
---

Changes in v4:
- Lint

Changes in v3:
- Documented new assumptions in the CCF
- Wrapped docs to 80 columns

 doc/imx/clk/ccf.txt| 63 +-
 drivers/clk/clk-composite.c|  7 
 drivers/clk/clk-divider.c  |  6 ++--
 drivers/clk/clk-fixed-factor.c |  3 +-
 drivers/clk/clk-gate.c |  6 ++--
 drivers/clk/clk-mux.c  | 12 +++
 drivers/clk/imx/clk-gate2.c|  4 +--
 7 files changed, 50 insertions(+), 51 deletions(-)

diff --git a/doc/imx/clk/ccf.txt b/doc/imx/clk/ccf.txt
index 36b60dc438..e40ac360e8 100644
--- a/doc/imx/clk/ccf.txt
+++ b/doc/imx/clk/ccf.txt
@@ -1,42 +1,37 @@
 Introduction:
 =
 
-This documentation entry describes the Common Clock Framework [CCF]
-port from Linux kernel (v5.1.12) to U-Boot.
+This documentation entry describes the Common Clock Framework [CCF] port from
+Linux kernel (v5.1.12) to U-Boot.
 
-This code is supposed to bring CCF to IMX based devices (imx6q, imx7
-imx8). Moreover, it also provides some common clock code, which would
-allow easy porting of CCF Linux code to other platforms.
+This code is supposed to bring CCF to IMX based devices (imx6q, imx7 imx8).
+Moreover, it also provides some common clock code, which would allow easy
+porting of CCF Linux code to other platforms.
 
 Design decisions:
 =
 
-* U-Boot's driver model [DM] for clk differs from Linux CCF. The most
-  notably difference is the lack of support for hierarchical clocks and
-  "clock as a manager driver" (single clock DTS node acts as a starting
-  point for all other clocks).
+* U-Boot's driver model [DM] for clk differs from Linux CCF. The most notably
+  difference is the lack of support for hierarchical clocks and "clock as a
+  manager driver" (single clock DTS node acts as a starting point for all other
+  clocks).
 
-* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE
-  is not set (no need for recursive access).
+* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE is
+  not set (no need for recursive access).
 
-* On purpose the "manager" clk driver (clk-imx6q.c) is not using large
-  table to store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] = 
-  Instead we use udevice's linked list for the same class (UCLASS_CLK).
+* On purpose the "manager" clk driver (clk-imx6q.c) is not using large table to
+  store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] =  Instead we
+  use udevice's linked list for the same class (UCLASS_CLK).
 
   Rationale:
   --
-When porting the code as is from Linux, one would need ~1KiB of RAM to
-store it. This is way too much if we do plan to use this driver in SPL.
+When porting the code as is from Linux, one would need ~1KiB of RAM to 
store
+it. This is way too much if we do plan to use this driver in SPL.
 
 * The "central" structure of this patch series is struct udevice and its
   uclass_priv field contains the struct clk pointer (to the originally created
   one).
 
-* Up till now U-Boot's driver model (DM) CLK operates on udevice (main
-  access to clock is by udevice ops)
-  In the CCF the access to struct clk (embodying pointer to *dev) is
-  possible via dev_get_clk_ptr() (it is a wrapper on dev_get_uclass_priv()).
-
 * To keep things simple the struct udevice's uclass_priv pointer is used to
   store back pointer to corresponding struct clk. However, it is possible to
   modify clk-uclass.c file and add there struct uc_clk_priv, which would have
@@ -45,13 +40,17 @@ Design decisions:
   setting .per_device_auto_alloc_size = sizeof(struct uc_clk_priv)) the
   uclass_priv stores the pointer to struct clk.
 
+* Non-CCF clocks do not have a pointer to a clock in 

Re: [PATCH] watchdog: Don't select CONFIG_WATCHDOG and CONFIG_HW_WATCHDOG at the same time

[Tom Rini]

On Wed, Feb 26, 2020 at 04:17:52PM +, Christophe Leroy wrote:

> Commit 06985289d452 ("watchdog: Implement generic watchdog_reset()
> version") introduced an automatic selection of CONFIG_WATCHDOG by
> CONFIG_WDT. But for boards selecting CONFIG_HW_WATCHDOG, like
> boards have a powerpc 8xx, CONFIG_WATCHDOG shall not be selected
> as they are mutually exclusive.
> 
> Make CONFIG_WATCHDOG dependent on !CONFIG_HW_WATCHDOG
> 
> Fixes: 06985289d452 ("watchdog: Implement generic watchdog_reset() version")
> Cc: Stefan Roese 
> Signed-off-by: Christophe Leroy 
> Reviewed-by: Stefan Roese 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] watchdog: mpc8xx: Revert the 8xx watchdog back to CONFIG_HW_WATCHDOG

[Tom Rini]

On Thu, Feb 20, 2020 at 07:39:51AM +, Christophe Leroy wrote:

> Commit f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros
> cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not
> compatible with the 8xx because it starts the watchdog HW timer at
> reset and must be serviced from the very beginning including while
> U-boot is executed in the firmware before relocation in RAM.
> 
> Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible.
> 
> Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by
> removing the lines put in comment in that commit, and also remove
> again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by
> that commit and brought back by mistake by commit b3134ffbd944
> ("watchdog: Kconfig: Sort entry alphabetically")
> 
> Note that there was an 'imply WATCHDOG' in the original commit but
> it disappeared in the Kconfig alphabetical sorting, so no need to
> remove it here.
> 
> Fixes: f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros 
> cleanup")
> Fixes: b3134ffbd944 ("watchdog: Kconfig: Sort entry alphabetically")
> Signed-off-by: Christophe Leroy 
> Cc: Stefan Roese 
> Cc: Patrice Chotard 
> Reviewed-by: Stefan Roese 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] common: update_tftp: remove unnecessary build check

[Heinrich Schuchardt]

On 2/28/20 1:06 AM, AKASHI Takahiro wrote:

Logically, the current update_tftp() should and does compile and work
correctly even without satisfying the following condition:


#if defined(CONFIG_UPDATE_TFTP) && !defined(CONFIG_MTD_NOR_FLASH)
#error "CONFIG_UPDATE_TFTP and !CONFIG_MTD_NOR_FLASH needed for
  legacy behaviour"
#endif


It would be better to just drop it so that this function will be
used on wider range of platforms.


Function update_tftp() calls update_flash(). update_flash() does nothing
if CONFIG_MTD_NOR_FLASH=n.

Please, describe which configuration would be additionally usable if
your patch is applied.

Best regards

Heinrich



Signed-off-by: AKASHI Takahiro 
---
  common/update.c | 7 ++-
  1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/common/update.c b/common/update.c
index c8dd346a0956..ade029851dbd 100644
--- a/common/update.c
+++ b/common/update.c
@@ -14,10 +14,6 @@
  #error "CONFIG_FIT and CONFIG_OF_LIBFDT are required for auto-update feature"
  #endif

-#if defined(CONFIG_UPDATE_TFTP) && !defined(CONFIG_MTD_NOR_FLASH)
-#error "CONFIG_UPDATE_TFTP and !CONFIG_MTD_NOR_FLASH needed for legacy 
behaviour"
-#endif
-
  #include 
  #include 
  #include 
@@ -210,8 +206,9 @@ static int update_flash(ulong addr_source, ulong 
addr_first, ulong size)
printf("Error: could not protect flash sectors\n");
return 1;
}
+#else
+   return -1;
  #endif
-   return 0;
  }

  static int update_fit_getparams(const void *fit, int noffset, ulong *addr,

Re: [PATCH] efi_loader: file: set a backend block device for file operations

[Heinrich Schuchardt]

On 2/28/20 1:05 AM, AKASHI Takahiro wrote:

In the current implementation, set_blk_dev() is called in opening a file,
but not in opening a directory. This will cause failures at succeeding
directory operations as the "current" block device remains nullified.
Adding set_blk_dev() fixes this issue.

Signed-off-by: AKASHI Takahiro 
---
  lib/efi_loader/efi_file.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c
index 140116ddc4ac..ba55b2829e03 100644
--- a/lib/efi_loader/efi_file.c
+++ b/lib/efi_loader/efi_file.c
@@ -235,6 +235,9 @@ static struct efi_file_handle *file_open(struct file_system 
*fs,
} else {
fh->isdir = 1;
strcpy(fh->path, "");
+
+   if (set_blk_dev(fh))
+   goto error;


In the 'true' path of the if statement is_dir() results in fs_type =
FS_TYPE_ANY. It would be inconsistent to call set_blk_dev() here.

Which "succeeding directory operation" does not call set_blk_dev(fh)?

Where did you observe an error?

Best regards

Heinrich

}

return >base;

Re: [PATCH] cmd: efidebug: fix a failure of "boot rm" sub-command

[Heinrich Schuchardt]

On 2/28/20 1:05 AM, AKASHI Takahiro wrote:

There is a wrong usage of utf8_utf16_strncpy() in "boot rm" command, and
then it will end up with a failure of this command due to a wrong
value of an interim variable ("var_name16").

Signed-off-by: AKASHI Takahiro 
---
  cmd/efidebug.c | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 576e95b395dc..3a50dafbbca6 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -641,7 +641,7 @@ static int do_efi_boot_rm(cmd_tbl_t *cmdtp, int flag,
int id, i;
char *endp;
char var_name[9];
-   u16 var_name16[9];
+   u16 var_name16[9], *p;
efi_status_t ret;

if (argc == 1)
@@ -654,7 +654,8 @@ static int do_efi_boot_rm(cmd_tbl_t *cmdtp, int flag,
return CMD_RET_FAILURE;

sprintf(var_name, "Boot%04X", id);
-   utf8_utf16_strncpy((u16 **)_name16, var_name, 9);
+   p = var_name16;
+   utf8_utf16_strncpy(, var_name, 9);


This is duplicating code in do_efi_boot_add(). Please, consider putting
the following codeblock into separate function:

    id = (int)simple_strtoul(argv[1], , 16);
if (*endp != '\0' || id > 0x)
return CMD_RET_USAGE;

sprintf(var_name, "Boot%04X", id);
p = var_name16;
utf8_utf16_strncpy(, var_name, 9);

try_load_entry() has another implementation.

Best regards

Heinrich



ret = EFI_CALL(RT->set_variable(var_name16, , 0, 0, NULL));
if (ret) {

Re: [PATCH 1/1] doc: fix references to driver-model

[Heinrich Schuchardt]

On 2/28/20 3:56 PM, Patrick DELAUNAY wrote:

Hi,


From: U-Boot  On Behalf Of Patrick DELAUNAY
Sent: vendredi 28 février 2020 14:49

Hi Heinrich


From: U-Boot  On Behalf Of Heinrich
Schuchardt
Sent: mardi 25 février 2020 21:36

Fix some errors pointed out by 'make refcheckdocs'.

Signed-off-by: Heinrich Schuchardt 
---


I found also the same issue in

 doc/README.SPL 
 index
4e3478a13a..929b9672b0 100644 @@ -81,7 +81,7 @@ fdtgrep is also used to
remove:
('u-boot,dm-pre-reloc', 'u-boot,dm-spl' and 'u-boot,dm-tpl')

  All the nodes remaining in the SPL devicetree are bound -(see driver-
model/README.txt).
+(see driver-model/design.rst).


Edit: need to add "doc/"

+( see doc/driver-model/design.rst)

Regards
Patrick


Please, create an additional patch.

Best regards

Heinrich

Re: [PATCH] common/board_f.c: use #ifdefs a little more consistently

[Tom Rini]

On Fri, Feb 28, 2020 at 05:24:58PM +, Rasmus Villemoes wrote:
> On 28/02/2020 16.46, Tom Rini wrote:
> > On Fri, Feb 28, 2020 at 08:42:21AM +, Rasmus Villemoes wrote:
> >> On 28/02/2020 00.40, Simon Glass wrote:
> 
> >>> Using if() is preferable to #if if there is no cost.
> >>
> >> Completely agree, and I also prefer to have the linker eliminate unused
> >> functions rather than cluttering the C code with #ifdefs. But that can't
> >> be used in this case.
> >>
> >> Anyway, this wasn't primarily to save 112 bytes or whatnot from the
> >> U-Boot image, just to use one style a little more consistently.
> > 
> > Perhaps we could come up with a little more macro-magic?  In
> > psuedo-code:
> > #define RESERVE_INIT_SEQ_F_ENTRY(fn) \
> > #if CONFIG_IS_ENABLED(toupper(fn))
> > reserve_##fn
> > #endif
> > #endif
> 
> I'm afraid that's rather far from something that can be implemented;
> macros cannot expand to other preprocessor directives, and toupper is
> also pretty hard to do.

Darn.  I would have been willing to move to reserve_FUNCTION if it would
have otherwise worked.

> What we could do if we want to reduce #ifdefs while still eliminating
> the no-op functions is to replace
> 
> #ifdef CONFIG_FOO
> static int foo_init(void) {
>   blabla;
>   return 0;
> }
> #endif
> ...
> init_sequence_f[] = { ...
> #ifdef CONFIG_FOO
>   foo_init,
> #endif
> ...
> }
> 
> by
> 
> static int foo_init(void) { /* always defined */
>   blabla;
>   return 0;
> }
> 
> init_sequence_f[] = { ...
>   IS_ENABLED(CONFIG_FOO) ? foo_init : NULL,
> ...
> }
> 
> and teach the iterator to ignore NULL entries (I don't remember if we
> use a NULL terminator or use ARRAY_SIZE; if the former one should switch
> to the latter). It will still cost sizeof(void*) for the NULL entries,
> but the function bodies (and on powerpc the .fixups) should be
> eliminated, and there's not an #ifdef in sight.

That sounds pretty nice actually.  If you're so inclined I'd like to see
it.

-- 
Tom


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[PATCH v2 1/1] scripts: add documentation-file-ref-check

[Heinrich Schuchardt]

'make refcheckdocs' requires scripts/documentation-file-ref-check.
Adopt script from Linux v5.6-rc3.

Signed-off-by: Heinrich Schuchardt 
---
v2:
our device-tree documentation is at doc/device-tree-bindings/
---
 scripts/documentation-file-ref-check | 226 +++
 1 file changed, 226 insertions(+)
 create mode 100755 scripts/documentation-file-ref-check

diff --git a/scripts/documentation-file-ref-check 
b/scripts/documentation-file-ref-check
new file mode 100755
index 00..0bfc5feefb
--- /dev/null
+++ b/scripts/documentation-file-ref-check
@@ -0,0 +1,226 @@
+#!/usr/bin/env perl
+# SPDX-License-Identifier: GPL-2.0
+#
+# Treewide grep for references to files under doc, and report
+# non-existing files in stderr.
+
+use warnings;
+use strict;
+use Getopt::Long qw(:config no_auto_abbrev);
+
+# NOTE: only add things here when the file was gone, but the text wants
+# to mention a past documentation file, for example, to give credits for
+# the original work.
+my %false_positives = (
+);
+
+my $scriptname = $0;
+$scriptname =~ s,.*/([^/]+/),$1,;
+
+# Parse arguments
+my $help = 0;
+my $fix = 0;
+my $warn = 0;
+
+if (! -d ".git") {
+   printf "Warning: can't check if file exists, as this is not a git tree";
+   exit 0;
+}
+
+GetOptions(
+   'fix' => \$fix,
+   'warn' => \$warn,
+   'h|help|usage' => \$help,
+);
+
+if ($help != 0) {
+print "$scriptname [--help] [--fix]\n";
+exit -1;
+}
+
+# Step 1: find broken references
+print "Finding broken references. This may take a while...  " if ($fix);
+
+my %broken_ref;
+
+my $doc_fix = 0;
+
+open IN, "git grep ':doc:\`' doc/|"
+ or die "Failed to run git grep";
+while () {
+   next if (!m,^([^:]+):.*\:doc\:\`([^\`]+)\`,);
+
+   my $d = $1;
+   my $doc_ref = $2;
+
+   my $f = $doc_ref;
+
+   $d =~ s,(.*/).*,$1,;
+   $f =~ s,.*\<([^\>]+)\>,$1,;
+
+   $f ="$d$f.rst";
+
+   next if (grep -e, glob("$f"));
+
+   if ($fix && !$doc_fix) {
+   print STDERR "\nWARNING: Currently, can't fix broken :doc:`` 
fields\n";
+   }
+   $doc_fix++;
+
+   print STDERR "$f: :doc:`$doc_ref`\n";
+}
+close IN;
+
+open IN, "git grep 'doc/'|"
+ or die "Failed to run git grep";
+while () {
+   next if (!m/^([^:]+):(.*)/);
+
+   my $f = $1;
+   my $ln = $2;
+
+   # On linux-next, discard the Next/ directory
+   next if ($f =~ m,^Next/,);
+
+   # Makefiles and scripts contain nasty expressions to parse docs
+   next if ($f =~ m/Makefile/ || $f =~ m/\.sh$/);
+
+   # Skip this script
+   next if ($f eq $scriptname);
+
+   # Ignore the dir where documentation will be built
+   next if ($ln =~ m,\b(\S*)doc/output,);
+
+   if ($ln =~ m,\b(\S*)(doc/[A-Za-z0-9\_\.\,\~/\*\[\]\?+-]*)(.*),) {
+   my $prefix = $1;
+   my $ref = $2;
+   my $base = $2;
+   my $extra = $3;
+
+   # some file references are like:
+   # /usr/src/linux/doc/DMA-{API,mapping}.txt
+   # For now, ignore them
+   next if ($extra =~ m/^{/);
+
+   # Remove footnotes at the end like:
+   # doc/devicetree/dt-object-internal.txt[1]
+   $ref =~ s/(txt|rst)\[\d+]$/$1/;
+
+   # Remove ending ']' without any '['
+   $ref =~ s/\].*// if (!($ref =~ m/\[/));
+
+   # Remove puntuation marks at the end
+   $ref =~ s/[\,\.]+$//;
+
+   my $fulref = "$prefix$ref";
+
+   $fulref =~ s/^(\ 1) {
+   print STDERR "WARNING: Won't auto-replace, as found multiple 
files close to $ref:\n";
+   foreach my $j (@find) {
+   $j =~ s,^./,,;
+   print STDERR "$j\n";
+   }
+   } else {
+   $f = $find[0];
+   $f =~ s,^./,,;
+   print "INFO: Replacing $ref to $f\n";
+   foreach my $j (qx(git grep -l $ref)) {
+   qx(sed "s\@$ref\@$f\@g" -i $j);
+   }
+   }
+}
--
2.25.0

Re: [PATCH] common/board_f.c: use #ifdefs a little more consistently

[Rasmus Villemoes]

On 28/02/2020 16.46, Tom Rini wrote:
> On Fri, Feb 28, 2020 at 08:42:21AM +, Rasmus Villemoes wrote:
>> On 28/02/2020 00.40, Simon Glass wrote:

>>> Using if() is preferable to #if if there is no cost.
>>
>> Completely agree, and I also prefer to have the linker eliminate unused
>> functions rather than cluttering the C code with #ifdefs. But that can't
>> be used in this case.
>>
>> Anyway, this wasn't primarily to save 112 bytes or whatnot from the
>> U-Boot image, just to use one style a little more consistently.
> 
> Perhaps we could come up with a little more macro-magic?  In
> psuedo-code:
> #define RESERVE_INIT_SEQ_F_ENTRY(fn) \
> #if CONFIG_IS_ENABLED(toupper(fn))
> reserve_##fn
> #endif
> #endif

I'm afraid that's rather far from something that can be implemented;
macros cannot expand to other preprocessor directives, and toupper is
also pretty hard to do.

What we could do if we want to reduce #ifdefs while still eliminating
the no-op functions is to replace

#ifdef CONFIG_FOO
static int foo_init(void) {
  blabla;
  return 0;
}
#endif
...
init_sequence_f[] = { ...
#ifdef CONFIG_FOO
  foo_init,
#endif
...
}

by

static int foo_init(void) { /* always defined */
  blabla;
  return 0;
}

init_sequence_f[] = { ...
  IS_ENABLED(CONFIG_FOO) ? foo_init : NULL,
...
}

and teach the iterator to ignore NULL entries (I don't remember if we
use a NULL terminator or use ARRAY_SIZE; if the former one should switch
to the latter). It will still cost sizeof(void*) for the NULL entries,
but the function bodies (and on powerpc the .fixups) should be
eliminated, and there's not an #ifdef in sight.

If one also wants to get rid of those NULL entries, I did
https://lore.kernel.org/lkml/1444165543-2209-1-git-send-email-li...@rasmusvillemoes.dk/
a long time ago (see the COND_INITIALIZER()), but whether that can be
tweaked to still automatically avoid a "defined but not used" warning I
don't know.

> And then a little harder thinking about negative-case (OF_EMBED) ?  Or
> just have those be the few ifndef's?

That can be done in the same manner by just switching second and third
operand.

The problem is the function bodies which rely on symbols (for example
CONFIG_* values) that only exist if CONFIG_FOO.

Rasmus

Re: [PATCH] common/board_f.c: use #ifdefs a little more consistently

[Tom Rini]

On Fri, Feb 28, 2020 at 08:42:21AM +, Rasmus Villemoes wrote:
> On 28/02/2020 00.40, Simon Glass wrote:
> > Hi Rasmus,
> > 
> > On Thu, 27 Feb 2020 at 00:18, Rasmus Villemoes
> >  wrote:
> >>
> >> Some init functions, e.g. print_resetinfo(), are conditionally defined
> >> depending on some config options, and are correspondingly
> >> conditionally included in the init_sequence_f[] array.
> >>
> >> Others are unconditionally defined and included in init_sequence_f[],
> >> but have their entire body, sans a mandatory "return 0", conditionally
> >> compiled.
> >>
> >> For the simple cases, switch to the former model, making it a bit more
> >> consistent. This also makes the U-Boot image very slightly smaller and
> >> avoids a few useless calls to no-op functions during board_init_f.
> > 
> > Can you check if it definitely does change the size? 
> 
> It does, I did build to see how much. On ppc, it's 8 bytes per no-op
> function (one "put 0 in r3", one blr instruction), plus 4 bytes for the
> array entry, plus 4 bytes for a .fixup entry - in my case ending up with
> 7*16=112, because all but the #ifndef CONFIG_OF_EMBED applied.
> 
> The reason I ask
> > is that it inlines those function calls in the normal case, at least
> > from my inspection.
> 
> The compiler can't inline and thus eliminate these as they are not
> called directly, but their addresses are used to populate the
> init_sequence_f[] array and called through that.
> 
> > Using if() is preferable to #if if there is no cost.
> 
> Completely agree, and I also prefer to have the linker eliminate unused
> functions rather than cluttering the C code with #ifdefs. But that can't
> be used in this case.
> 
> Anyway, this wasn't primarily to save 112 bytes or whatnot from the
> U-Boot image, just to use one style a little more consistently.

Perhaps we could come up with a little more macro-magic?  In
psuedo-code:
#define RESERVE_INIT_SEQ_F_ENTRY(fn) \
#if CONFIG_IS_ENABLED(toupper(fn))
reserve_##fn
#endif
#endif

And then a little harder thinking about negative-case (OF_EMBED) ?  Or
just have those be the few ifndef's?

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH 1/1] vexpress_ca9x4: Enable use of correct DTB file and restore EFI loader.

[Tom Rini]

On Tue, Feb 25, 2020 at 06:22:16PM +0100, Kristian Amlie wrote:

> EFI was disabled in f95b8a4b5f64f because of the missing DTB file,
> and indeed, the DTB file is required to load recent versions of GRUB
> (2.04) correctly.
> 
> Signed-off-by: Kristian Amlie 
> ---
>  configs/vexpress_ca9x4_defconfig  | 2 +-
>  include/configs/vexpress_common.h | 3 ++-
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/configs/vexpress_ca9x4_defconfig 
> b/configs/vexpress_ca9x4_defconfig
> index 2119df6b10..6bd1f253b6 100644
> --- a/configs/vexpress_ca9x4_defconfig
> +++ b/configs/vexpress_ca9x4_defconfig
> @@ -34,4 +34,4 @@ CONFIG_SMC911X_32_BIT=y
>  CONFIG_BAUDRATE=38400
>  CONFIG_CONS_INDEX=0
>  CONFIG_OF_LIBFDT=y
> -# CONFIG_EFI_LOADER is not set
> +CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
> diff --git a/include/configs/vexpress_common.h 
> b/include/configs/vexpress_common.h
> index 7f215a6707..e73658a9e6 100644
> --- a/include/configs/vexpress_common.h
> +++ b/include/configs/vexpress_common.h
> @@ -207,7 +207,8 @@
>   "devtmpfs.mount=0  vmalloc=256M\0" \
>   "bootflash=run flashargs; " \
>   "cp ${ramdisk_addr} ${ramdisk_addr_r} ${maxramdisk}; " \
> - "bootm ${kernel_addr} ${ramdisk_addr_r}\0"
> + "bootm ${kernel_addr} ${ramdisk_addr_r}\0" \
> + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
>  
>  /* FLASH and environment organization */
>  #define PHYS_FLASH_SIZE  0x0400  /* 64MB */

Did you test build all of the vexpress platforms?  There's a common file
for the 5 different ones.  Thanks!

-- 
Tom


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Description: PGP signature

Re: [PATCH v3][ 4/6] board: tbs2910: enable CONFIG_DISTRO_DEFAULTS

[Tom Rini]

On Thu, Feb 27, 2020 at 01:48:23AM +0100, Denis 'GNUtoo' Carikli wrote:
> On Mon, 10 Feb 2020 09:40:50 -0500
> Tom Rini  wrote:
> > That said, the "bring in PXE" part of DISTRO_DEFAULTS predates sysboot
> > being pulled out of the PXE code, where it was historically
> > introduced. I would like to see a patch to change this part,
> > stand-alone and CC'ing the distribution folks that might have
> > something to say about this.  I know there are use-cases for it, but
> > I don't know how critical they are to be everywhere by default vs
> > opt-in.  Thanks all!
> I've done the patch, but I've not sent it yet.
> 
> With it, if board are using things like func(PXE, pxe, na) in
> BOOT_TARGET_DEVICES, it will breaks the compilation, and we would have
> an error that looks like that:
> > In file included from include/configs/tbs2910.h:19,
> >  from include/config.h:5,
> >  from include/common.h:16,
> >  from env/common.c:10:
> > include/config_distro_bootcmd.h:398:2: error: expected '}' before
> > 'BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE'
> > 398 |
> > BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE
> 
> Should I still send the patch as-is by mentioning that issue somehow,
> in order to start a discussion on the topic?

Sounds like some of the logic needs updating.  If a board is saying
func(PXE,...) then it should be enabling CMD_PXE.  So yes, I'd like to
see things get a bit farther if you can, thanks!

-- 
Tom


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Description: PGP signature

RE: [PATCH 1/1] doc: fix references to driver-model

[Patrick DELAUNAY]

Hi,

> From: U-Boot  On Behalf Of Patrick DELAUNAY
> Sent: vendredi 28 février 2020 14:49
> 
> Hi Heinrich
> 
> > From: U-Boot  On Behalf Of Heinrich
> > Schuchardt
> > Sent: mardi 25 février 2020 21:36
> >
> > Fix some errors pointed out by 'make refcheckdocs'.
> >
> > Signed-off-by: Heinrich Schuchardt 
> > ---
> 
> I found also the same issue in
> 
>  doc/README.SPL 
>  index
> 4e3478a13a..929b9672b0 100644 @@ -81,7 +81,7 @@ fdtgrep is also used to
> remove:
>('u-boot,dm-pre-reloc', 'u-boot,dm-spl' and 'u-boot,dm-tpl')
> 
>  All the nodes remaining in the SPL devicetree are bound -(see driver-
> model/README.txt).
> +(see driver-model/design.rst).

Edit: need to add "doc/"

+( see doc/driver-model/design.rst)

Regards
Patrick

[PATCH 0/7] doc: Fix some errors pointed out by 'make refcheckdocs'

[Patrick Delaunay]

Fix some errors pointed out by 'make refcheckdocs'.

This target is available after Heinrich patch
"scripts: add documentation-file-ref-check"
http://patchwork.ozlabs.org/patch/1244498/

see also patches
1/ "doc: fix references to driver-model"
  http://patchwork.ozlabs.org/patch/1244504/

2/ "Kconfig: fix typos in CMD_BEDBUG description"
  http://patchwork.ozlabs.org/patch/1244507/

3/ "include/ata.h: remove invalid links"
  http://patchwork.ozlabs.org/patch/1244637/

After this serie the only remaining errors are:

$> make refcheckdocs

doc/sphinx/parse-headers.pl: doc/doc-guide/parse-headers.rst
doc/sphinx/rstFlatTable.py: doc/books/kernel-doc-HOWTO
drivers/rtc/ds1374.c: Watchdoc/Alarm
include/fsl_qe.h: doc/README.qe_firmware
lib/zlib/trees.c: ftp.uu.net:/pub/archiving/zip/doc/deflate-1.1.doc



Patrick Delaunay (7):
  README: update reference to *.README
  Kconfig: update reference to README.x86
  doc: update reference to README.imximage
  doc: update reference to README.imx8image
  doc: update reference to README.board
  doc: device-tree-bindings: update reference to binding directory
  arm: imx: update reference to README.mxc_hab

 Kconfig  | 2 +-
 README   | 2 +-
 arch/arm/mach-imx/Kconfig| 4 ++--
 board/advantech/dms-ba16/dms-ba16_1g.cfg | 2 +-
 board/advantech/dms-ba16/dms-ba16_2g.cfg | 2 +-
 board/aristainetos/aristainetos2.cfg | 2 +-
 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg   | 2 +-
 board/barco/titanium/imximage.cfg| 2 +-
 board/boundary/nitrogen6x/nitrogen6dl.cfg| 2 +-
 board/boundary/nitrogen6x/nitrogen6dl2g.cfg  | 2 +-
 board/boundary/nitrogen6x/nitrogen6q.cfg | 2 +-
 board/boundary/nitrogen6x/nitrogen6q2g.cfg   | 2 +-
 board/boundary/nitrogen6x/nitrogen6s.cfg | 2 +-
 board/boundary/nitrogen6x/nitrogen6s1g.cfg   | 2 +-
 board/ccv/xpress/imximage.cfg| 2 +-
 board/cobra5272/README   | 2 +-
 board/freescale/imx8qxp_mek/imximage.cfg | 2 +-
 board/freescale/m52277evb/README | 2 +-
 board/freescale/m53017evb/README | 2 +-
 board/freescale/m5373evb/README  | 2 +-
 board/freescale/m54455evb/README | 2 +-
 board/freescale/m547xevb/README  | 2 +-
 board/freescale/mx25pdk/imximage.cfg | 2 +-
 board/freescale/mx51evk/imximage.cfg | 2 +-
 board/freescale/mx53ard/imximage_dd3.cfg | 2 +-
 board/freescale/mx53evk/imximage.cfg | 2 +-
 board/freescale/mx53loco/imximage.cfg| 2 +-
 board/freescale/mx53smd/imximage.cfg | 2 +-
 board/freescale/mx6qarm2/imximage.cfg| 2 +-
 board/freescale/mx6qarm2/imximage_mx6dl.cfg  | 2 +-
 board/freescale/mx6slevk/imximage.cfg| 2 +-
 board/freescale/mx6ullevk/imximage.cfg   | 2 +-
 board/freescale/mx7dsabresd/imximage.cfg | 2 +-
 board/freescale/s32v234evb/s32v234evb.cfg| 2 +-
 board/freescale/vf610twr/imximage.cfg| 2 +-
 board/ge/bx50v3/bx50v3.cfg   | 2 +-
 board/ge/mx53ppd/imximage.cfg| 2 +-
 board/menlo/m53menlo/imximage.cfg| 2 +-
 board/phytec/pcm052/imximage.cfg | 2 +-
 board/seco/mx6quq7/mx6quq7-2g.cfg| 2 +-
 board/siemens/capricorn/imximage.cfg | 2 +-
 board/technexion/pico-imx6ul/imximage.cfg| 2 +-
 board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg | 2 +-
 board/toradex/colibri-imx6ull/imximage.cfg   | 2 +-
 board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg | 2 +-
 board/toradex/colibri_imx7/imximage.cfg  | 2 +-
 board/toradex/colibri_vf/imximage.cfg| 2 +-
 board/tqc/tqma6/clocks.cfg   | 2 +-
 board/tqc/tqma6/tqma6dl.cfg  | 2 +-
 board/tqc/tqma6/tqma6q.cfg   | 2 +-
 board/tqc/tqma6/tqma6s.cfg   | 2 +-
 board/warp/imximage.cfg  | 2 +-
 board/warp7/imximage.cfg | 2 +-
 doc/device-tree-bindings/net/ti,dp83867.txt  | 2 +-
 doc/device-tree-bindings/video/rockchip-lvds.txt | 2 +-
 doc/imx/misc/sdp.txt | 2 +-
 include/configs/sbc8548.h| 2 +-
 57 files changed, 58 insertions(+), 58 deletions(-)

-- 
2.17.1

Re: [cmd]:"env edit" vs "env set", do we need both options for "env" command ??

[Wolfgang Denk]

Dear Adarsh Babu Kalepalli,

In message  
you wrote:
>
> Are'nt "env edit" vs "env set" redundant ??.

No, they are not.

> "env edit" allows modification of the environment variable value in the
> next line,whereas "env set" requires the mention of the environment
> variable value in the same line.

"env edit" is an _interactive_ command. You cannot use it in
scripts, for example.

> Can we have only one of these commands ??.

No, they serve very different purposes.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
A good aphorism is too hard for the tooth of time, and  is  not  worn
away  by  all  the  centuries,  although  it serves as food for every
epoch.  - Friedrich Wilhelm Nietzsche
  _Miscellaneous Maxims and Opinions_ no. 168

Re: [cmd] "env import" command behaviour observation

[Wolfgang Denk]

Dear Adarsh Babu Kalepalli,

In message  
you wrote:
>
> Exporting environment variables to a memory location and trying to import
> them back.
> On certain occasions,the import command is displaying errors.
...

> ## Error: Can't overwrite "ethaddr"
> himport_r: can't insert "ethaddr=b8:27:eb:bb:2d:e6" into hash table
> ## Error: Can't overwrite "serial#"
> himport_r: can't insert "serial#=ebbb2de6" into hash table
> U-Boot>
> 
> Is this expected?? or should it be raised as a BUG.

Yes, this is expected behaviour.  These variables are read-only
(resp.write-once), so you cannot modify them if they are already
set.  [At least not without additional measures.]

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Mandrell: "You know what I think?"
Doctor:   "Ah, ah that's a catch question. With a brain your size you
  don't think, right?"
- Dr. Who

Re: [PATCH 1/7] README: update reference to *.README

[Heinrich Schuchardt]

On 2/28/20 3:18 PM, Patrick Delaunay wrote:

Update some reference in README file detected by
scripts/documentation-file-ref-check

*.README => README.*

Signed-off-by: Patrick Delaunay 


Reviewed-by: Heinrich Schuchardt 


---

  README | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README b/README
index 8cfa92fac9..4a0f8cbeef 100644
--- a/README
+++ b/README
@@ -4639,7 +4639,7 @@ int main(int argc, char *argv[])
while (learning) {
Read the README file in the top level directory;
Read http://www.denx.de/twiki/bin/view/DULG/Manual;
-   Read applicable doc/*.README;
+   Read applicable doc/README.*;
Read the source, Luke;
/* find . -name "*.[chS]" | xargs grep -i  */
}

Re: [PATCH 1/1] scripts: add documentation-file-ref-check

[Heinrich Schuchardt]

On 2/28/20 2:24 PM, Patrick DELAUNAY wrote:

Hi Heinrich,


From: Heinrich Schuchardt 
Sent: mardi 25 février 2020 20:52

'make refcheckdocs' requires scripts/documentation-file-ref-check.
Adopt script from Linux v5.6-rc3.

Signed-off-by: Heinrich Schuchardt 
---


Reviewed-by: Patrick Delaunay 

It is just a copy of kernel script with
+ "/Documentation" =>  "/doc"
+ remove kernel specific rules

Just 2 remarks on ftp and binding directory (for --fix option)


  scripts/documentation-file-ref-check | 226 +++
  1 file changed, 226 insertions(+)
  create mode 100755 scripts/documentation-file-ref-check

diff --git a/scripts/documentation-file-ref-check 
b/scripts/documentation-file-ref-
check
new file mode 100755
index 00..9978fc9a91
--- /dev/null
+++ b/scripts/documentation-file-ref-check
@@ -0,0 +1,226 @@
+#!/usr/bin/env perl
+# SPDX-License-Identifier: GPL-2.0
+#
+# Treewide grep for references to files under doc, and report #
+non-existing files in stderr.
+
+use warnings;
+use strict;
+use Getopt::Long qw(:config no_auto_abbrev);
+
+# NOTE: only add things here when the file was gone, but the text wants
+# to mention a past documentation file, for example, to give credits
+for # the original work.
+my %false_positives = (
+);
+
+my $scriptname = $0;
+$scriptname =~ s,.*/([^/]+/),$1,;
+
+# Parse arguments
+my $help = 0;
+my $fix = 0;
+my $warn = 0;
+
+if (! -d ".git") {
+   printf "Warning: can't check if file exists, as this is not a git tree";
+   exit 0;
+}
+
+GetOptions(
+   'fix' => \$fix,
+   'warn' => \$warn,
+   'h|help|usage' => \$help,
+);
+
+if ($help != 0) {
+print "$scriptname [--help] [--fix]\n";
+exit -1;
+}
+
+# Step 1: find broken references
+print "Finding broken references. This may take a while...  " if
+($fix);
+
+my %broken_ref;
+
+my $doc_fix = 0;
+
+open IN, "git grep ':doc:\`' doc/|"
+ or die "Failed to run git grep";
+while () {
+   next if (!m,^([^:]+):.*\:doc\:\`([^\`]+)\`,);
+
+   my $d = $1;
+   my $doc_ref = $2;
+
+   my $f = $doc_ref;
+
+   $d =~ s,(.*/).*,$1,;
+   $f =~ s,.*\<([^\>]+)\>,$1,;
+
+   $f ="$d$f.rst";
+
+   next if (grep -e, glob("$f"));
+
+   if ($fix && !$doc_fix) {
+   print STDERR "\nWARNING: Currently, can't fix broken :doc:``
fields\n";
+   }
+   $doc_fix++;
+
+   print STDERR "$f: :doc:`$doc_ref`\n";
+}
+close IN;
+
+open IN, "git grep 'doc/'|"
+ or die "Failed to run git grep";
+while () {
+   next if (!m/^([^:]+):(.*)/);
+
+   my $f = $1;
+   my $ln = $2;
+
+   # On linux-next, discard the Next/ directory
+   next if ($f =~ m,^Next/,);
+
+   # Makefiles and scripts contain nasty expressions to parse docs
+   next if ($f =~ m/Makefile/ || $f =~ m/\.sh$/);
+
+   # Skip this script
+   next if ($f eq $scriptname);
+
+   # Ignore the dir where documentation will be built
+   next if ($ln =~ m,\b(\S*)doc/output,);
+
+   if ($ln =~ m,\b(\S*)(doc/[A-Za-z0-9\_\.\,\~/\*\[\]\?+-]*)(.*),) {
+   my $prefix = $1;
+   my $ref = $2;
+   my $base = $2;
+   my $extra = $3;
+
+   # some file references are like:
+   # /usr/src/linux/doc/DMA-{API,mapping}.txt
+   # For now, ignore them
+   next if ($extra =~ m/^{/);
+
+   # Remove footnotes at the end like:
+   # doc/devicetree/dt-object-internal.txt[1]
+   $ref =~ s/(txt|rst)\[\d+]$/$1/;
+
+   # Remove ending ']' without any '['
+   $ref =~ s/\].*// if (!($ref =~ m/\[/));
+
+   # Remove puntuation marks at the end
+   $ref =~ s/[\,\.]+$//;
+
+   my $fulref = "$prefix$ref";
+
+   $fulref =~ s/^(\

next if ($fulref =~ m/^ftp/);

To avoid issue on ftp URL =

include/ata.h: ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
lib/zlib/trees.c: ftp.uu.net:/pub/archiving/zip/doc/deflate-1.1.do


The servers have no DNS entry. Anyway the FTP protocol is at end of life:

Cf."Intent to Deprecate: FTP Support"
https://docs.google.com/document/d/1JUra5HnsbR_xmtQctkb2iVxRPuhPWhMB5M_zpbuGxTY/edit#heading=h.a4pkgy626xf3

Cf.
[PATCH v2 1/1] include/ata.h: remove invalid links
https://lists.denx.de/pipermail/u-boot/2020-February/401324.html




+   # Check if exists, evaluating wildcards
+   next if (grep -e, glob("$ref $fulref"));
+
+   # Accept relative doc patches for tools/
+   if ($f =~ m/tools/) {
+   my $path = $f;
+   $path =~ s,(.*)/.*,$1,;
+   next if (grep -e, glob("$path/$ref $path/../$ref
$path/$fulref"));
+   }
+
+   # Discard known false-positives
+   if (defined($false_positives{$f})) {
+   next if ($false_positives{$f} eq $fulref);
+   }
+
+ 

[PATCH 3/7] doc: update reference to README.imximage

[Patrick Delaunay]

Update reference in many files detected by
scripts/documentation-file-ref-check

README.imximage => imx/mkimage/imximage.txt

Signed-off-by: Patrick Delaunay 
---

 board/advantech/dms-ba16/dms-ba16_1g.cfg| 2 +-
 board/advantech/dms-ba16/dms-ba16_2g.cfg| 2 +-
 board/aristainetos/aristainetos2.cfg| 2 +-
 board/bachmann/ot1200/mx6q_4x_mt41j128.cfg  | 2 +-
 board/barco/titanium/imximage.cfg   | 2 +-
 board/boundary/nitrogen6x/nitrogen6dl.cfg   | 2 +-
 board/boundary/nitrogen6x/nitrogen6dl2g.cfg | 2 +-
 board/boundary/nitrogen6x/nitrogen6q.cfg| 2 +-
 board/boundary/nitrogen6x/nitrogen6q2g.cfg  | 2 +-
 board/boundary/nitrogen6x/nitrogen6s.cfg| 2 +-
 board/boundary/nitrogen6x/nitrogen6s1g.cfg  | 2 +-
 board/ccv/xpress/imximage.cfg   | 2 +-
 board/freescale/mx25pdk/imximage.cfg| 2 +-
 board/freescale/mx51evk/imximage.cfg| 2 +-
 board/freescale/mx53ard/imximage_dd3.cfg| 2 +-
 board/freescale/mx53evk/imximage.cfg| 2 +-
 board/freescale/mx53loco/imximage.cfg   | 2 +-
 board/freescale/mx53smd/imximage.cfg| 2 +-
 board/freescale/mx6qarm2/imximage.cfg   | 2 +-
 board/freescale/mx6qarm2/imximage_mx6dl.cfg | 2 +-
 board/freescale/mx6slevk/imximage.cfg   | 2 +-
 board/freescale/mx6ullevk/imximage.cfg  | 2 +-
 board/freescale/mx7dsabresd/imximage.cfg| 2 +-
 board/freescale/s32v234evb/s32v234evb.cfg   | 2 +-
 board/freescale/vf610twr/imximage.cfg   | 2 +-
 board/ge/bx50v3/bx50v3.cfg  | 2 +-
 board/ge/mx53ppd/imximage.cfg   | 2 +-
 board/menlo/m53menlo/imximage.cfg   | 2 +-
 board/phytec/pcm052/imximage.cfg| 2 +-
 board/seco/mx6quq7/mx6quq7-2g.cfg   | 2 +-
 board/technexion/pico-imx6ul/imximage.cfg   | 2 +-
 board/toradex/colibri-imx6ull/imximage.cfg  | 2 +-
 board/toradex/colibri_imx7/imximage.cfg | 2 +-
 board/toradex/colibri_vf/imximage.cfg   | 2 +-
 board/tqc/tqma6/clocks.cfg  | 2 +-
 board/tqc/tqma6/tqma6dl.cfg | 2 +-
 board/tqc/tqma6/tqma6q.cfg  | 2 +-
 board/tqc/tqma6/tqma6s.cfg  | 2 +-
 board/warp/imximage.cfg | 2 +-
 board/warp7/imximage.cfg| 2 +-
 doc/imx/misc/sdp.txt| 2 +-
 41 files changed, 41 insertions(+), 41 deletions(-)

diff --git a/board/advantech/dms-ba16/dms-ba16_1g.cfg 
b/board/advantech/dms-ba16/dms-ba16_1g.cfg
index c2624ddc3e..1c737baaf2 100644
--- a/board/advantech/dms-ba16/dms-ba16_1g.cfg
+++ b/board/advantech/dms-ba16/dms-ba16_1g.cfg
@@ -4,7 +4,7 @@
  * Copyright 2015 Timesys Corporation.
  * Copyright 2015 General Electric Company
  *
- * Refer doc/README.imximage for more details about how-to configure
+ * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/advantech/dms-ba16/dms-ba16_2g.cfg 
b/board/advantech/dms-ba16/dms-ba16_2g.cfg
index 4ce93ff74b..371a84eb7e 100644
--- a/board/advantech/dms-ba16/dms-ba16_2g.cfg
+++ b/board/advantech/dms-ba16/dms-ba16_2g.cfg
@@ -4,7 +4,7 @@
  * Copyright 2015 Timesys Corporation.
  * Copyright 2015 General Electric Company
  *
- * Refer doc/README.imximage for more details about how-to configure
+ * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/aristainetos/aristainetos2.cfg 
b/board/aristainetos/aristainetos2.cfg
index 965ad64b49..d088cc83ad 100644
--- a/board/aristainetos/aristainetos2.cfg
+++ b/board/aristainetos/aristainetos2.cfg
@@ -6,7 +6,7 @@
  * Based on:
  * Copyright (C) 2013 Boundary Devices
  *
- * Refer doc/README.imximage for more details about how-to configure
+ * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg 
b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
index ba5c074797..f4f605fc8d 100644
--- a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
+++ b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
@@ -3,7 +3,7 @@
  * Copyright (C) 2011 Freescale Semiconductor, Inc.
  * Jason Liu 
  *
- * Refer doc/README.imximage for more details about how-to configure
+ * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
  * and create imximage boot image
  *
  * The syntax is taken as close as possible with the kwbimage
diff --git a/board/barco/titanium/imximage.cfg 
b/board/barco/titanium/imximage.cfg
index 101fc76de4..1fc26ed2c9 100644
--- a/board/barco/titanium/imximage.cfg
+++ b/board/barco/titanium/imximage.cfg
@@ -6,7 +6,7 @@
  * Copyright (C) 2011 Freescale Semiconductor, Inc.
  * Jason Liu 
  *
- * Refer doc/README.imximage for more details about how-to configure
+ * Refer 

[PATCH 2/7] Kconfig: update reference to README.x86

[Patrick Delaunay]

Update reference in Kconfig detected by
scripts/documentation-file-ref-check

README.x86 => doc/arch/x86.rst

Signed-off-by: Patrick Delaunay 
---

 Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Kconfig b/Kconfig
index 66148ce477..6bb6a1e415 100644
--- a/Kconfig
+++ b/Kconfig
@@ -236,7 +236,7 @@ config BUILD_ROM
  This option allows to build a ROM version of U-Boot.
  The build process generally requires several binary blobs
  which are not shipped in the U-Boot source tree.
- Please, see doc/README.x86 for details.
+ Please, see doc/arch/x86.rst for details.
 
 config SPL_IMAGE
string "SPL image used in the combined SPL+U-Boot image"
-- 
2.17.1

[PATCH 5/7] doc: update reference to README.board

[Patrick Delaunay]

Update reference in files detected by
scripts/documentation-file-ref-check

doc/README.  => board//README

Files moved in board directory in
commit 702e6014f15b ("doc: cleanup - move board
READMEs into respective board directories")'

Signed-off-by: Patrick Delaunay 
---

 board/cobra5272/README   | 2 +-
 board/freescale/m52277evb/README | 2 +-
 board/freescale/m53017evb/README | 2 +-
 board/freescale/m5373evb/README  | 2 +-
 board/freescale/m54455evb/README | 2 +-
 board/freescale/m547xevb/README  | 2 +-
 include/configs/sbc8548.h| 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/board/cobra5272/README b/board/cobra5272/README
index ae0f148258..1dad7e3eaf 100644
--- a/board/cobra5272/README
+++ b/board/cobra5272/README
@@ -28,7 +28,7 @@ CONFIGURING
 
 
 Please refer to u-boot README (general info, u-boot-x-x-x/README),
-to u-boot-x-x-x/doc/README.COBRA5272 and
+to u-boot-x-x-x/board/cobra5272/README and
 to the comments in u-boot-x-x-x/include/configs/cobra5272.h
 
 Configuring u-boot is done by commenting/uncommenting preprocessor defines.
diff --git a/board/freescale/m52277evb/README b/board/freescale/m52277evb/README
index 76f4789335..8bfd8122dd 100644
--- a/board/freescale/m52277evb/README
+++ b/board/freescale/m52277evb/README
@@ -22,7 +22,7 @@ Changed files:
 - arch/m68k/cpu/mcf5227x/config.mk config make
 - arch/m68k/cpu/mcf5227x/start.S   start up assembly code
 
-- doc/README.m52277evb This readme file
+- board/freescale/m52277evb/README This readme file
 
 - drivers/serial/mcfuart.c ColdFire common UART driver
 - drivers/rtc/mcfrtc.c Realtime clock Driver
diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README
index a7074c9b71..c4b019e2a9 100644
--- a/board/freescale/m53017evb/README
+++ b/board/freescale/m53017evb/README
@@ -23,7 +23,7 @@ Changed files:
 - arch/m68k/cpu/mcf532x/config.mk  config make
 - arch/m68k/cpu/mcf532x/start.Sstart up assembly code
 
-- doc/README.m53017evb This readme file
+- board/freescale/m53017evb/README his readme file
 
 - drivers/net/mcffec.c ColdFire common FEC driver
 - drivers/net/mcfmii.c ColdFire common Mii driver
diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README
index f0a0631c94..bba5420215 100644
--- a/board/freescale/m5373evb/README
+++ b/board/freescale/m5373evb/README
@@ -23,7 +23,7 @@ Changed files:
 - arch/m68k/cpu/mcf532x/config.mk  config make
 - arch/m68k/cpu/mcf532x/start.Sstart up assembly code
 
-- doc/README.m5373evb  This readme file
+- board/freescale/m5373evb/README  This readme file
 
 - drivers/net/mcffec.c ColdFire common FEC driver
 - drivers/serial/mcfuart.c ColdFire common UART driver
diff --git a/board/freescale/m54455evb/README b/board/freescale/m54455evb/README
index 260aec9f1b..26d3cc81fd 100644
--- a/board/freescale/m54455evb/README
+++ b/board/freescale/m54455evb/README
@@ -26,7 +26,7 @@ Changed files:
 - arch/m68k/cpu/mcf5445x/config.mk config make
 - arch/m68k/cpu/mcf5445x/start.S   start up assembly code
 
-- doc/README.m54455evb This readme file
+- board/freescale/m54455evb/README This readme file
 
 - drivers/net/mcffec.c ColdFire common FEC driver
 - drivers/serial/mcfuart.c ColdFire common UART driver
diff --git a/board/freescale/m547xevb/README b/board/freescale/m547xevb/README
index ce7b27b8b2..6b4fbe5c25 100644
--- a/board/freescale/m547xevb/README
+++ b/board/freescale/m547xevb/README
@@ -24,7 +24,7 @@ Changed files:
 - arch/m68k/cpu/mcf547x_8x/config.mk   config make
 - arch/m68k/cpu/mcf547x_8x/start.S start up assembly code
 
-- doc/README.m5475evb  This readme file
+- board/freescale/m547xevb/README  This readme file
 
 - drivers/dma/MCD_dmaApi.c DMA API functions
 - drivers/dma/MCD_tasks.c  DMA Tasks
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index f4113e03c4..ae2c0033d0 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -7,7 +7,7 @@
 
 /*
  * sbc8548 board configuration file
- * Please refer to doc/README.sbc8548 for more info.
+ * Please refer to board/sbc8548/README for more info.
  */
 #ifndef __CONFIG_H
 #define __CONFIG_H
-- 
2.17.1

[PATCH 6/7] doc: device-tree-bindings: update reference to binding directory

[Patrick Delaunay]

Update reference in files detected by
scripts/documentation-file-ref-check

doc/devicetree/device-tree-bindings/  => doc/device-tree-bindings/

Signed-off-by: Patrick Delaunay 
---

 doc/device-tree-bindings/net/ti,dp83867.txt  | 2 +-
 doc/device-tree-bindings/video/rockchip-lvds.txt | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt 
b/doc/device-tree-bindings/net/ti,dp83867.txt
index 268220964a..d3c3046499 100644
--- a/doc/device-tree-bindings/net/ti,dp83867.txt
+++ b/doc/device-tree-bindings/net/ti,dp83867.txt
@@ -18,7 +18,7 @@ Required properties:
  PHY's default will be left as is.
 
 Default child nodes are standard Ethernet PHY device
-nodes as described in doc/devicetree/bindings/net/ethernet.txt
+nodes as described in doc/device-tree-bindings/net/ethernet.txt
 
 Example:
 
diff --git a/doc/device-tree-bindings/video/rockchip-lvds.txt 
b/doc/device-tree-bindings/video/rockchip-lvds.txt
index 07e3d3f9de..7432e22166 100644
--- a/doc/device-tree-bindings/video/rockchip-lvds.txt
+++ b/doc/device-tree-bindings/video/rockchip-lvds.txt
@@ -20,7 +20,7 @@ Required properties:
, This describes the output face.
 
 - display-timings : described by
-   doc/devicetree/device-tree-bindings/video/display-timing.txt.
+   doc/device-tree-bindings/video/display-timing.txt.
 
 Example:
lvds: lvds@ff96c000 {
-- 
2.17.1

[PATCH 1/7] README: update reference to *.README

[Patrick Delaunay]

Update some reference in README file detected by
scripts/documentation-file-ref-check

*.README => README.*

Signed-off-by: Patrick Delaunay 
---

 README | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README b/README
index 8cfa92fac9..4a0f8cbeef 100644
--- a/README
+++ b/README
@@ -4639,7 +4639,7 @@ int main(int argc, char *argv[])
while (learning) {
Read the README file in the top level directory;
Read http://www.denx.de/twiki/bin/view/DULG/Manual;
-   Read applicable doc/*.README;
+   Read applicable doc/README.*;
Read the source, Luke;
/* find . -name "*.[chS]" | xargs grep -i  */
}
-- 
2.17.1

[PATCH 7/7] arm: imx: update reference to README.mxc_hab

[Patrick Delaunay]

Update reference in files detected by
scripts/documentation-file-ref-check

doc/README.mxc_hab  => doc/imx/habv4/*

Signed-off-by: Patrick Delaunay 
---

 arch/arm/mach-imx/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index aa140c4798..329149900a 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -41,7 +41,7 @@ config IMX_HAB
imply CMD_DEKBLOB
help
  This option enables the support for secure boot (HAB).
- See doc/README.mxc_hab for more details.
+ See doc/imx/habv4/* for more details.
 
 config CSF_SIZE
hex "Maximum size for Command Sequence File (CSF) binary"
@@ -69,7 +69,7 @@ config CMD_DEKBLOB
help
  This enables the 'dek_blob' command which is used with the
  Freescale secure boot mechanism. This command encapsulates and
- creates a blob of data. See also CMD_BLOB and doc/README.mxc_hab for
+ creates a blob of data. See also CMD_BLOB and doc/imx/habv4/* for
  more information.
 
 config CMD_HDMIDETECT
-- 
2.17.1

[PATCH 4/7] doc: update reference to README.imx8image

[Patrick Delaunay]

Update reference in many files detected by
scripts/documentation-file-ref-check

README.imx8image  => imx/mkimage/imx8image.txt

Signed-off-by: Patrick Delaunay 
---

 board/freescale/imx8qxp_mek/imximage.cfg | 2 +-
 board/siemens/capricorn/imximage.cfg | 2 +-
 board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg | 2 +-
 board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/freescale/imx8qxp_mek/imximage.cfg 
b/board/freescale/imx8qxp_mek/imximage.cfg
index 259a1646bf..cd747d2eee 100644
--- a/board/freescale/imx8qxp_mek/imximage.cfg
+++ b/board/freescale/imx8qxp_mek/imximage.cfg
@@ -2,7 +2,7 @@
 /*
  * Copyright 2018 NXP
  *
- * Refer doc/README.imx8image for more details about how-to configure
+ * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure
  * and create imx8image boot image
  */
 
diff --git a/board/siemens/capricorn/imximage.cfg 
b/board/siemens/capricorn/imximage.cfg
index 8660e50cbd..9f9df68e64 100644
--- a/board/siemens/capricorn/imximage.cfg
+++ b/board/siemens/capricorn/imximage.cfg
@@ -2,7 +2,7 @@
 /*
  * Copyright 2018 NXP
  *
- * Refer doc/README.imx8image for more details about how-to configure
+ * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure
  * and create imx8image boot image
  */
 
diff --git a/board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg 
b/board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg
index 71981f8c55..b8f0f3dc10 100644
--- a/board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg
+++ b/board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg
@@ -2,7 +2,7 @@
 /*
  * Copyright 2019 Toradex
  *
- * Refer doc/README.imx8image for more details about how-to configure
+ * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure
  * and create imx8image boot image
  */
 
diff --git a/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg 
b/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg
index 1dcd13271d..44f6c0c455 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg
+++ b/board/toradex/colibri-imx8x/colibri-imx8qxp-imximage.cfg
@@ -2,7 +2,7 @@
 /*
  * Copyright 2019 Toradex
  *
- * Refer doc/README.imx8image for more details about how-to configure
+ * Refer doc/imx/mkimage/imx8image.txt for more details about how-to configure
  * and create imx8image boot image
  */
 
-- 
2.17.1

Antwort: Re: [RFC PATCH] serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()

[Wolfgang Wallner]

Hi Bin,

-"Bin Meng"  schrieb: -
> Hi Wolfgang,
> 
> [snip]
> 
> Unfortunately this patch breaks several ARM board:
> 
> +drivers/built-in.o: In function `ofnode_get_parent':
> +drivers/core/ofnode.c:235: undefined reference to `fdt_parent_offset'
> +drivers/built-in.o: In function `ofnode_read_simple_addr_cells':
> +drivers/core/ofnode.c:717: undefined reference to `fdt_address_cells'
> +drivers/built-in.o: In function `ofnode_read_simple_size_cells':
> +drivers/core/ofnode.c:725: undefined reference to `fdt_size_cells'
> +drivers/built-in.o: In function `ofnode_get_addr_size_index':
> +drivers/core/ofnode.c:294: undefined reference to 
> `fdtdec_get_addr_size_fixed'
> 
> See 
> https://dev.azure.com/bmeng/GitHub/_build/results?buildId=158=logs=25fc9316-c681-5af2-a03f-b888fd665e84=3af932b6-18ad-575e-b0ea-0b31bb7c6c26

Thanks for pointing this out.

I have missed that the code was guarded with
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
before, and is not guarded anymore now.

> Would you please send a v2 to address this? thanks!

Yes, I will follow up with a v2.

regards, Wolfgang

RE: [PATCH 1/1] doc: fix references to driver-model

[Patrick DELAUNAY]

Hi Heinrich

> From: U-Boot  On Behalf Of Heinrich Schuchardt
> Sent: mardi 25 février 2020 21:36
> 
> Fix some errors pointed out by 'make refcheckdocs'.
> 
> Signed-off-by: Heinrich Schuchardt 
> ---

I found also the same issue in 

 doc/README.SPL 
index 4e3478a13a..929b9672b0 100644
@@ -81,7 +81,7 @@ fdtgrep is also used to remove:
   ('u-boot,dm-pre-reloc', 'u-boot,dm-spl' and 'u-boot,dm-tpl')
 
 All the nodes remaining in the SPL devicetree are bound
-(see driver-model/README.txt).
+(see driver-model/design.rst).
 
 Debugging
 -

>  doc/README.drivers.eth | 2 +-
>  doc/README.fdt-control | 2 +-
>  drivers/i2c/davinci_i2c.c  | 2 +-
>  drivers/i2c/kona_i2c.c | 2 +-
>  drivers/i2c/sh_i2c.c   | 2 +-
>  drivers/i2c/soft_i2c.c | 2 +-
>  tools/dtoc/dtb_platdata.py | 4 ++--
>  tools/dtoc/dtoc.py | 2 +-
>  8 files changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/doc/README.drivers.eth b/doc/README.drivers.eth index
> 1a9a23b51b..acaf11fea3 100644
> --- a/doc/README.drivers.eth
> +++ b/doc/README.drivers.eth
> @@ -2,7 +2,7 @@
> 
>  This guide describes to the old way of doing things. No new Ethernet drivers
> should be implemented this way. All new drivers should be written against the 
> -U-
> Boot core driver model. See doc/driver-model/README.txt
> +U-Boot core driver model. See doc/driver-model/index.rst.

index.rst or design.rst  as in the next file ?

doc/driver-model/README.txt is replaced by design.rst  in commit ed205e677b6f
('doc: driver-model: Convert README.txt to rest')

>  ---
>   Ethernet Driver Guide
> diff --git a/doc/README.fdt-control b/doc/README.fdt-control index
> e53cf51875..424d13fc5b 100644
> --- a/doc/README.fdt-control
> +++ b/doc/README.fdt-control
> @@ -182,7 +182,7 @@ U-Boot can be divided into three phases: TPL, SPL and U-
> Boot proper.
> 
>  The full device tree is available to U-Boot proper, but normally only a 
> subset  (or
> none at all) is available to TPL and SPL. See 'Pre-Relocation Support' and 
> -'SPL
> Support' in doc/driver-model/README.txt for more details.
> +'SPL Support' in doc/driver-model/design.rst for more details.
> 
> 
>  Using several DTBs in the SPL (CONFIG_SPL_MULTI_DTB) diff --git
> a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c index
> 2c77234c60..edc40f706c 100644
> --- a/drivers/i2c/davinci_i2c.c
> +++ b/drivers/i2c/davinci_i2c.c
> @@ -8,7 +8,7 @@
>   * 
>   *
>   * NOTE: This driver should be converted to driver model before June 2017.
> - * Please see doc/driver-model/i2c-howto.txt for instructions.
> + * Please see doc/driver-model/i2c-howto.rst for instructions.
>   */
> 
>  #include 
> diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c index
> 0726b4c956..8e31481c0f 100644
> --- a/drivers/i2c/kona_i2c.c
> +++ b/drivers/i2c/kona_i2c.c
> @@ -3,7 +3,7 @@
>   * Copyright 2013 Broadcom Corporation.
>   *
>   * NOTE: This driver should be converted to driver model before June 2017.
> - * Please see doc/driver-model/i2c-howto.txt for instructions.
> + * Please see doc/driver-model/i2c-howto.rst for instructions.
>   */
> 
>  #include 
> diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c index 
> b69d213593..834f1f2179
> 100644
> --- a/drivers/i2c/sh_i2c.c
> +++ b/drivers/i2c/sh_i2c.c
> @@ -4,7 +4,7 @@
>   * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu
> 
>   *
>   * NOTE: This driver should be converted to driver model before June 2017.
> - * Please see doc/driver-model/i2c-howto.txt for instructions.
> + * Please see doc/driver-model/i2c-howto.rst for instructions.
>   */
> 
>  #include 
> diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index
> 7f0303cc05..9ad1c281ff 100644
> --- a/drivers/i2c/soft_i2c.c
> +++ b/drivers/i2c/soft_i2c.c
> @@ -12,7 +12,7 @@
>   * Neil Russell.
>   *
>   * NOTE: This driver should be converted to driver model before June 2017.
> - * Please see doc/driver-model/i2c-howto.txt for instructions.
> + * Please see doc/driver-model/i2c-howto.rst for instructions.
>   */
> 
>  #include 
> diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index
> 037e82c8bb..90a9e1a626 100644
> --- a/tools/dtoc/dtb_platdata.py
> +++ b/tools/dtoc/dtb_platdata.py
> @@ -423,7 +423,7 @@ class DtbPlatdata(object):
> 
>  This writes out the body of a header file consisting of structure
>  definitions for node in self._valid_nodes. See the documentation in
> -README.of-plat for more information.
> +doc/driver-model/of-plat.rst for more information.
>  """
>  self.out_header()
>  self.out('#include \n') @@ -527,7 +527,7 @@ class
> DtbPlatdata(object):
>  U_BOOT_DEVICE() declarations for each valid node. Where a node has
>  multiple compatible strings, a #define is used to make them 
> equivalent.
> 
> -See the documentation in 

Re: [PATCH] configs: am335x_evm: Use default log level

[Tom Rini]

On Fri, Feb 28, 2020 at 07:08:15PM +0530, Lokesh Vutla wrote:
> 
> 
> On 26/02/20 10:48 PM, Sam Protsenko wrote:
> > Commit 920e3343 ("configs: am335x_evm: Reduce size of SPL") reduces
> > log level from 4 (default) to 3 in order to reduce SPL size. Arguably
> > the disadvantages of such a decision outweigh the benefits:
> > 
> >   (+) reducing SPL footprint by 1 KiB, but even with loglevel=4 we still
> >   have 2 KiB of SRAM left
> >   (-) we are missing error messages printed with pr_err() in U-Boot
> >   proper
> > 
> > One can argue that loglevel can be increased locally for debugging
> > purposes, which is true. But this way users are missing helpful messages
> > when something goes wrong, which is really confusing. E.g. when trying
> > to do "dfu tftp" without "dfu_alt_info" variable set, the only message
> > we can see is:
> > 
> > exit not allowed from main input shell.
> > 
> > while whith loglevel=4 user can see what is actually missing:
> > 
> > "dfu_alt_info" env variable not defined!
> > 
> > Bottom line: U-Boot proper shouldn't suffer of shortcomings because of
> > premature optimizations in SPL.
> > 
> > Let's use default loglevel, as we are not running out of SRAM yet. When
> > (and if) we run out of SRAM, we'll see the error message during the
> > build, as RAM size value in SPL linker script will be violated. Then we
> > can think about reducing loglevel only in SPL (e.g. by separating
> > CONFIG_SPL_LOGLEVEL option from CONFIG_LOGLEVEL).
> 
> There is SPL_LOGLEVEL already available, can you use it and disable SPL part 
> for
> am335x?

We don't (today) allow different LOGLEVEL values between main, SPL and
TPL.  I don't object to making them visible but also perhaps the problem
is that some messages should be moved up in priority?

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH] configs: am335x_evm: Use default log level

[Lokesh Vutla]

On 26/02/20 10:48 PM, Sam Protsenko wrote:
> Commit 920e3343 ("configs: am335x_evm: Reduce size of SPL") reduces
> log level from 4 (default) to 3 in order to reduce SPL size. Arguably
> the disadvantages of such a decision outweigh the benefits:
> 
>   (+) reducing SPL footprint by 1 KiB, but even with loglevel=4 we still
>   have 2 KiB of SRAM left
>   (-) we are missing error messages printed with pr_err() in U-Boot
>   proper
> 
> One can argue that loglevel can be increased locally for debugging
> purposes, which is true. But this way users are missing helpful messages
> when something goes wrong, which is really confusing. E.g. when trying
> to do "dfu tftp" without "dfu_alt_info" variable set, the only message
> we can see is:
> 
> exit not allowed from main input shell.
> 
> while whith loglevel=4 user can see what is actually missing:
> 
> "dfu_alt_info" env variable not defined!
> 
> Bottom line: U-Boot proper shouldn't suffer of shortcomings because of
> premature optimizations in SPL.
> 
> Let's use default loglevel, as we are not running out of SRAM yet. When
> (and if) we run out of SRAM, we'll see the error message during the
> build, as RAM size value in SPL linker script will be violated. Then we
> can think about reducing loglevel only in SPL (e.g. by separating
> CONFIG_SPL_LOGLEVEL option from CONFIG_LOGLEVEL).

There is SPL_LOGLEVEL already available, can you use it and disable SPL part for
am335x?

Thanks and regards,
Lokesh

RE: [PATCH 1/1] Kconfig: fix typos in CMD_BEDBUG description

[Patrick DELAUNAY]

Hi Heinrich

> From: U-Boot  On Behalf Of Heinrich Schuchardt
> Sent: mardi 25 février 2020 21:44
> 
> Fix documentation bug reported by 'make refcheckdocs'.
> 
> Signed-off-by: Heinrich Schuchardt 
> ---

Reviewed-by: Patrick Delaunay 

Regards
Patrick

RE: [PATCH 1/1] scripts: add documentation-file-ref-check

[Patrick DELAUNAY]

Hi Heinrich,

> From: Heinrich Schuchardt 
> Sent: mardi 25 février 2020 20:52
> 
> 'make refcheckdocs' requires scripts/documentation-file-ref-check.
> Adopt script from Linux v5.6-rc3.
> 
> Signed-off-by: Heinrich Schuchardt 
> ---

Reviewed-by: Patrick Delaunay 

It is just a copy of kernel script with 
+ "/Documentation" =>  "/doc"
+ remove kernel specific rules

Just 2 remarks on ftp and binding directory (for --fix option)

>  scripts/documentation-file-ref-check | 226 +++
>  1 file changed, 226 insertions(+)
>  create mode 100755 scripts/documentation-file-ref-check
> 
> diff --git a/scripts/documentation-file-ref-check 
> b/scripts/documentation-file-ref-
> check
> new file mode 100755
> index 00..9978fc9a91
> --- /dev/null
> +++ b/scripts/documentation-file-ref-check
> @@ -0,0 +1,226 @@
> +#!/usr/bin/env perl
> +# SPDX-License-Identifier: GPL-2.0
> +#
> +# Treewide grep for references to files under doc, and report #
> +non-existing files in stderr.
> +
> +use warnings;
> +use strict;
> +use Getopt::Long qw(:config no_auto_abbrev);
> +
> +# NOTE: only add things here when the file was gone, but the text wants
> +# to mention a past documentation file, for example, to give credits
> +for # the original work.
> +my %false_positives = (
> +);
> +
> +my $scriptname = $0;
> +$scriptname =~ s,.*/([^/]+/),$1,;
> +
> +# Parse arguments
> +my $help = 0;
> +my $fix = 0;
> +my $warn = 0;
> +
> +if (! -d ".git") {
> + printf "Warning: can't check if file exists, as this is not a git tree";
> + exit 0;
> +}
> +
> +GetOptions(
> + 'fix' => \$fix,
> + 'warn' => \$warn,
> + 'h|help|usage' => \$help,
> +);
> +
> +if ($help != 0) {
> +print "$scriptname [--help] [--fix]\n";
> +exit -1;
> +}
> +
> +# Step 1: find broken references
> +print "Finding broken references. This may take a while...  " if
> +($fix);
> +
> +my %broken_ref;
> +
> +my $doc_fix = 0;
> +
> +open IN, "git grep ':doc:\`' doc/|"
> + or die "Failed to run git grep";
> +while () {
> + next if (!m,^([^:]+):.*\:doc\:\`([^\`]+)\`,);
> +
> + my $d = $1;
> + my $doc_ref = $2;
> +
> + my $f = $doc_ref;
> +
> + $d =~ s,(.*/).*,$1,;
> + $f =~ s,.*\<([^\>]+)\>,$1,;
> +
> + $f ="$d$f.rst";
> +
> + next if (grep -e, glob("$f"));
> +
> + if ($fix && !$doc_fix) {
> + print STDERR "\nWARNING: Currently, can't fix broken :doc:``
> fields\n";
> + }
> + $doc_fix++;
> +
> + print STDERR "$f: :doc:`$doc_ref`\n";
> +}
> +close IN;
> +
> +open IN, "git grep 'doc/'|"
> + or die "Failed to run git grep";
> +while () {
> + next if (!m/^([^:]+):(.*)/);
> +
> + my $f = $1;
> + my $ln = $2;
> +
> + # On linux-next, discard the Next/ directory
> + next if ($f =~ m,^Next/,);
> +
> + # Makefiles and scripts contain nasty expressions to parse docs
> + next if ($f =~ m/Makefile/ || $f =~ m/\.sh$/);
> +
> + # Skip this script
> + next if ($f eq $scriptname);
> +
> + # Ignore the dir where documentation will be built
> + next if ($ln =~ m,\b(\S*)doc/output,);
> +
> + if ($ln =~ m,\b(\S*)(doc/[A-Za-z0-9\_\.\,\~/\*\[\]\?+-]*)(.*),) {
> + my $prefix = $1;
> + my $ref = $2;
> + my $base = $2;
> + my $extra = $3;
> +
> + # some file references are like:
> + # /usr/src/linux/doc/DMA-{API,mapping}.txt
> + # For now, ignore them
> + next if ($extra =~ m/^{/);
> +
> + # Remove footnotes at the end like:
> + # doc/devicetree/dt-object-internal.txt[1]
> + $ref =~ s/(txt|rst)\[\d+]$/$1/;
> +
> + # Remove ending ']' without any '['
> + $ref =~ s/\].*// if (!($ref =~ m/\[/));
> +
> + # Remove puntuation marks at the end
> + $ref =~ s/[\,\.]+$//;
> +
> + my $fulref = "$prefix$ref";
> +
> + $fulref =~ s/^(\ + $fulref =~ s/^[\'\`]+//;
> + $fulref =~ s,^\$\(.*\)/,,;
> + $base =~ s,.*/,,;
> +
> + # Remove URL false-positives
> + next if ($fulref =~ m/^http/);

next if ($fulref =~ m/^ftp/);

To avoid issue on ftp URL = 

include/ata.h: ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
lib/zlib/trees.c: ftp.uu.net:/pub/archiving/zip/doc/deflate-1.1.do

> + # Check if exists, evaluating wildcards
> + next if (grep -e, glob("$ref $fulref"));
> +
> + # Accept relative doc patches for tools/
> + if ($f =~ m/tools/) {
> + my $path = $f;
> + $path =~ s,(.*)/.*,$1,;
> + next if (grep -e, glob("$path/$ref $path/../$ref
> $path/$fulref"));
> + }
> +
> + # Discard known false-positives
> + if (defined($false_positives{$f})) {
> + next if ($false_positives{$f} eq $fulref);
> + }
> +
> +   

[PATCH 2/2] misc: i2c_eeprom: store pagesize instead of pagewidth in i2c_eeprom_drv_data

[Masahiro Yamada]

Associate the pagesize with compatible strings, and copy it to
priv->pagesize. This is more straight-forward.

Signed-off-by: Masahiro Yamada 
---

 drivers/misc/i2c_eeprom.c | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 728e0fd79abd..ef5f103c98ef 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -14,7 +14,7 @@
 
 struct i2c_eeprom_drv_data {
u32 size; /* size in bytes */
-   u32 pagewidth; /* pagesize = 2^pagewidth */
+   u32 pagesize; /* page size in bytes */
u32 addr_offset_mask; /* bits in addr used for offset overflow */
u32 offset_len; /* size in bytes of offset */
 };
@@ -103,7 +103,7 @@ static int i2c_eeprom_std_ofdata_to_platdata(struct udevice 
*dev)
priv->pagesize = pagesize;
else
/* 6 bit -> page size of up to 2^63 (should be sufficient) */
-   priv->pagesize = 1 << data->pagewidth;
+   priv->pagesize = data->pagesize;
 
if (dev_read_u32(dev, "size", ) == 0)
priv->size = size;
@@ -156,98 +156,98 @@ static int i2c_eeprom_std_probe(struct udevice *dev)
 
 static const struct i2c_eeprom_drv_data eeprom_data = {
.size = 0,
-   .pagewidth = 0,
+   .pagesize = 1,
.addr_offset_mask = 0,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data mc24aa02e48_data = {
.size = 256,
-   .pagewidth = 3,
+   .pagesize = 8,
.addr_offset_mask = 0,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c01a_data = {
.size = 128,
-   .pagewidth = 3,
+   .pagesize = 8,
.addr_offset_mask = 0,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c02_data = {
.size = 256,
-   .pagewidth = 3,
+   .pagesize = 8,
.addr_offset_mask = 0,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c04_data = {
.size = 512,
-   .pagewidth = 4,
+   .pagesize = 16,
.addr_offset_mask = 0x1,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c08_data = {
.size = 1024,
-   .pagewidth = 4,
+   .pagesize = 16,
.addr_offset_mask = 0x3,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c08a_data = {
.size = 1024,
-   .pagewidth = 4,
+   .pagesize = 16,
.addr_offset_mask = 0x3,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c16a_data = {
.size = 2048,
-   .pagewidth = 4,
+   .pagesize = 16,
.addr_offset_mask = 0x7,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24mac402_data = {
.size = 256,
-   .pagewidth = 4,
+   .pagesize = 16,
.addr_offset_mask = 0,
.offset_len = 1,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c32_data = {
.size = 4096,
-   .pagewidth = 5,
+   .pagesize = 32,
.addr_offset_mask = 0,
.offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c64_data = {
.size = 8192,
-   .pagewidth = 5,
+   .pagesize = 32,
.addr_offset_mask = 0,
.offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c128_data = {
.size = 16384,
-   .pagewidth = 6,
+   .pagesize = 64,
.addr_offset_mask = 0,
.offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c256_data = {
.size = 32768,
-   .pagewidth = 6,
+   .pagesize = 64,
.addr_offset_mask = 0,
.offset_len = 2,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c512_data = {
.size = 65536,
-   .pagewidth = 6,
+   .pagesize = 64,
.addr_offset_mask = 0,
.offset_len = 2,
 };
-- 
2.17.1

[PATCH 1/2] misc: i2c_eeprom: remove pagewidth field from i2c_eeprom

[Masahiro Yamada]

This struct member is not used in any effective way. Remove it.

Signed-off-by: Masahiro Yamada 
---

 drivers/misc/i2c_eeprom.c | 8 +++-
 include/i2c_eeprom.h  | 2 --
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 6c0459dc555b..728e0fd79abd 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -99,13 +99,11 @@ static int i2c_eeprom_std_ofdata_to_platdata(struct udevice 
*dev)
u32 pagesize;
u32 size;
 
-   if (dev_read_u32(dev, "pagesize", ) == 0) {
+   if (dev_read_u32(dev, "pagesize", ) == 0)
priv->pagesize = pagesize;
-   } else {
+   else
/* 6 bit -> page size of up to 2^63 (should be sufficient) */
-   priv->pagewidth = data->pagewidth;
-   priv->pagesize = (1 << priv->pagewidth);
-   }
+   priv->pagesize = 1 << data->pagewidth;
 
if (dev_read_u32(dev, "size", ) == 0)
priv->size = size;
diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h
index b96254ae79f5..cd620d519fca 100644
--- a/include/i2c_eeprom.h
+++ b/include/i2c_eeprom.h
@@ -16,8 +16,6 @@ struct i2c_eeprom_ops {
 struct i2c_eeprom {
/* The EEPROM's page size in byte */
unsigned long pagesize;
-   /* The EEPROM's page width in bits (pagesize = 2^pagewidth) */
-   unsigned pagewidth;
/* The EEPROM's capacity in bytes */
unsigned long size;
 };
-- 
2.17.1

[PATCH 3/3] ARM: dts: uniphier: remove U-Boot own EEPROM compatible and property

[Masahiro Yamada]

The compatible string "i2c-eeprom" is U-Boot own compatible, which
has never been approved by the DT community. "u-boot,i2c-offset-len"
is also a U-Boot own hack.

Linux adds "atmel,*" as generic compatibles, and U-Boot also followed
it by commit d7e28918aa3f ("i2c_eeprom: Add reading support").

The U-Boot own hack is no longer needed. Just sync with Linux.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/dts/uniphier-ld11-global.dts   | 2 +-
 arch/arm/dts/uniphier-pro4-ace.dts  | 3 +--
 arch/arm/dts/uniphier-pro4-sanji.dts| 3 +--
 arch/arm/dts/uniphier-pxs2-gentil.dts   | 3 +--
 arch/arm/dts/uniphier-ref-daughter.dtsi | 3 +--
 5 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/uniphier-ld11-global.dts 
b/arch/arm/dts/uniphier-ld11-global.dts
index 744b36e28a33..7968d524351b 100644
--- a/arch/arm/dts/uniphier-ld11-global.dts
+++ b/arch/arm/dts/uniphier-ld11-global.dts
@@ -132,7 +132,7 @@
};
 
eeprom@50 {
-   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+   compatible = "st,24c64", "atmel,24c64";
reg = <0x50>;
pagesize = <32>;
};
diff --git a/arch/arm/dts/uniphier-pro4-ace.dts 
b/arch/arm/dts/uniphier-pro4-ace.dts
index ce8ea7b79bbf..92cc48dd86d0 100644
--- a/arch/arm/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/dts/uniphier-pro4-ace.dts
@@ -50,10 +50,9 @@
status = "okay";
 
eeprom@54 {
-   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+   compatible = "st,24c64", "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
-   u-boot,i2c-offset-len = <2>;
};
 };
 
diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts 
b/arch/arm/dts/uniphier-pro4-sanji.dts
index 686dd3af7e95..3b68a7c605c2 100644
--- a/arch/arm/dts/uniphier-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-pro4-sanji.dts
@@ -45,10 +45,9 @@
status = "okay";
 
eeprom@54 {
-   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+   compatible = "st,24c64", "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
-   u-boot,i2c-offset-len = <2>;
};
 };
 
diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts 
b/arch/arm/dts/uniphier-pxs2-gentil.dts
index b13d6277bf13..e27fd4f2a569 100644
--- a/arch/arm/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/dts/uniphier-pxs2-gentil.dts
@@ -48,10 +48,9 @@
status = "okay";
 
eeprom@54 {
-   compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
+   compatible = "st,24c64", "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
-   u-boot,i2c-offset-len = <2>;
};
 };
 
diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi 
b/arch/arm/dts/uniphier-ref-daughter.dtsi
index 9240a313b933..a11897669c26 100644
--- a/arch/arm/dts/uniphier-ref-daughter.dtsi
+++ b/arch/arm/dts/uniphier-ref-daughter.dtsi
@@ -7,9 +7,8 @@
 
  {
eeprom@50 {
-   compatible = "microchip,24lc128", "i2c-eeprom";
+   compatible = "microchip,24lc128", "atmel,24c128";
reg = <0x50>;
pagesize = <64>;
-   u-boot,i2c-offset-len = <2>;
};
 };
-- 
2.17.1

[PATCH 2/3] ARM: dts: uniphier: add reset-names to NAND controller node

[Masahiro Yamada]

Import Linux commits:

37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node")
e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node")

Signed-off-by: Masahiro Yamada 
---

 arch/arm/dts/uniphier-ld11.dtsi | 3 ++-
 arch/arm/dts/uniphier-ld20.dtsi | 3 ++-
 arch/arm/dts/uniphier-ld4.dtsi  | 3 ++-
 arch/arm/dts/uniphier-pro4.dtsi | 3 ++-
 arch/arm/dts/uniphier-pro5.dtsi | 3 ++-
 arch/arm/dts/uniphier-pxs2.dtsi | 3 ++-
 arch/arm/dts/uniphier-pxs3.dtsi | 3 ++-
 arch/arm/dts/uniphier-sld8.dtsi | 3 ++-
 8 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index b3d44e868956..e0737ac7f06c 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -631,7 +631,8 @@
pinctrl-0 = <_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;
-   resets = <_rst 2>;
+   reset-names = "nand", "reg";
+   resets = <_rst 2>, <_rst 2>;
};
};
 };
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 5a7bd3301dd7..59e4191dfc39 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -954,7 +954,8 @@
pinctrl-0 = <_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;
-   resets = <_rst 2>;
+   reset-names = "nand", "reg";
+   resets = <_rst 2>, <_rst 2>;
};
};
 };
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index e40407a0dfa5..1eebc7fa3bee 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -408,7 +408,8 @@
pinctrl-0 = <_nand2cs>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;
-   resets = <_rst 2>;
+   reset-names = "nand", "reg";
+   resets = <_rst 2>, <_rst 2>;
};
};
 };
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 7e81260d33d3..d006b45f7a3d 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -636,7 +636,8 @@
pinctrl-0 = <_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;
-   resets = <_rst 2>;
+   reset-names = "nand", "reg";
+   resets = <_rst 2>, <_rst 2>;
};
};
 };
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 05828d785cec..ba7e224b38e6 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -499,7 +499,8 @@
pinctrl-0 = <_nand2cs>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;
-   resets = <_rst 2>;
+   reset-names = "nand", "reg";
+   resets = <_rst 2>, <_rst 2>;
};
 
emmc: mmc@6840 {
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index bf852c28005a..8d968d368102 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -809,7 +809,8 @@
pinctrl-0 = <_nand2cs>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;
-   resets = <_rst 2>;
+   reset-names = "nand", "reg";
+   resets = <_rst 2>, <_rst 2>;
};
};
 };
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index f830cef8941e..ed079c171137 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -831,7 +831,8 @@
pinctrl-0 = <_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;
-   resets = <_rst 2>;
+   reset-names = "nand", "reg";
+   resets = <_rst 2>, <_rst 2>;
};
};
 };
diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi
index 332a4da9d659..393157eb14ed 100644
--- a/arch/arm/dts/uniphier-sld8.dtsi
+++ b/arch/arm/dts/uniphier-sld8.dtsi
@@ -412,7 +412,8 @@
pinctrl-0 = <_nand2cs>;
clock-names = "nand", "nand_x", "ecc";
clocks = <_clk 2>, <_clk 3>, <_clk 3>;

[PATCH 1/3] ARM: dts: uniphier: rename DT nodes to follow json-schema

[Masahiro Yamada]

Import the nodename changes I made in Linux for avoiding dt-schama
warnings. This follows the $nodename patterns in the dt-schema.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/dts/uniphier-ld11.dtsi |  6 +++---
 arch/arm/dts/uniphier-ld20.dtsi |  8 
 arch/arm/dts/uniphier-ld4.dtsi  | 10 +-
 arch/arm/dts/uniphier-pro4.dtsi | 12 ++--
 arch/arm/dts/uniphier-pro5.dtsi | 12 ++--
 arch/arm/dts/uniphier-pxs2.dtsi | 10 +-
 arch/arm/dts/uniphier-pxs3.dtsi |  8 
 arch/arm/dts/uniphier-sld8.dtsi | 10 +-
 8 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 337a3537ed28..b3d44e868956 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -433,7 +433,7 @@
};
};
 
-   emmc: sdhc@5a00 {
+   emmc: mmc@5a00 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a00 0x400>;
interrupts = <0 78 4>;
@@ -566,7 +566,7 @@
};
};
 
-   aidet: aidet@5fc2 {
+   aidet: interrupt-controller@5fc2 {
compatible = "socionext,uniphier-ld11-aidet";
reg = <0x5fc2 0x200>;
interrupt-controller;
@@ -621,7 +621,7 @@
};
};
 
-   nand: nand@6800 {
+   nand: nand-controller@6800 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 3721110b17a7..5a7bd3301dd7 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -559,7 +559,7 @@
};
};
 
-   emmc: sdhc@5a00 {
+   emmc: mmc@5a00 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a00 0x400>;
interrupts = <0 78 4>;
@@ -578,7 +578,7 @@
cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
 
-   sd: sdhc@5a40 {
+   sd: mmc@5a40 {
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a40 0x800>;
@@ -664,7 +664,7 @@
};
};
 
-   aidet: aidet@5fc2 {
+   aidet: interrupt-controller@5fc2 {
compatible = "socionext,uniphier-ld20-aidet";
reg = <0x5fc2 0x200>;
interrupt-controller;
@@ -944,7 +944,7 @@
socionext,syscon = <_glue>;
};
 
-   nand: nand@6800 {
+   nand: nand-controller@6800 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index c2706cef0b8a..e40407a0dfa5 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -51,7 +51,7 @@
ranges;
interrupt-parent = <>;
 
-   l2: l2-cache@500c {
+   l2: cache-controller@500c {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c 0x2000>, <0x503c0100 0x4>,
  <0x506c 0x400>;
@@ -245,7 +245,7 @@
#dma-cells = <1>;
};
 
-   sd: sdhc@5a40 {
+   sd: mmc@5a40 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a40 0x200>;
@@ -265,7 +265,7 @@
sd-uhs-sdr50;
};
 
-   emmc: sdhc@5a50 {
+   emmc: mmc@5a50 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a50 0x200>;
@@ -375,7 +375,7 @@
interrupt-controller;
};
 
-   aidet: aidet@6183 {
+   aidet: interrupt-controller@6183 {
compatible = "socionext,uniphier-ld4-aidet";
reg = <0x6183 0x200>;
interrupt-controller;
@@ -398,7 +398,7 @@
};
};
 
-   nand: nand@6800 {
+   nand: 

Re: [RFC PATCH] serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()

[Bin Meng]

Hi Wolfgang,

On Fri, Feb 28, 2020 at 3:50 PM Bin Meng  wrote:
>
> On Thu, Feb 27, 2020 at 5:36 PM Bin Meng  wrote:
> >
> > On Tue, Feb 18, 2020 at 8:36 PM Wolfgang Wallner
> >  wrote:
> > >
> > > Currently the ofdata_to_platdata() method calls dev_read_addr_pci(),
> > > which potentially accesses the parent PCI bus. If this happens before
> > > the parent PCI bus is probed the resulting address will be wrong.
> > >
> > > This behavior was triggered by commit 82de42fa1468 ("dm: core:
> > > Allocate parent data separate from probing parent").
> > >
> > > According to a comment in drivers/pci/pci-uclass.c [1] accessing
> > > the PCI parent bus in ofdata_to_platdata() is not allowed, and the
> > > access should be moved to the probe() function.
> > >
> > > Move the call to dev_read_addr_pci() and the related handling of the
> > > 'addr' value from the ofdata_to_platdata() to the probe() method.
> > >
> > > While moving the code, the comment /* try Processor Local Bus device
> > > first */ was dropped. It was initially added with commit 3db886a5bf38
> > > ("serial: ns16550: Support ns16550 compatible pci uart devices") and
> > > later made obsolete with commit 33c215af4b9d ("dm: pci: Add a function
> > > to read a PCI BAR").
> > >
> > > [1] Comment in drivers/pci/pci-uclass.c:
> > > "A common cause of this problem is that this function is called in the
> > > ofdata_to_platdata() method of @dev. Accessing the PCI bus in that
> > > method is not allowed, since it has not yet been probed. To fix this,
> > > move that access to the probe() method of @dev instead."
> > >
> > > Signed-off-by: Wolfgang Wallner 
> > >
> > > Fixes: 82de42fa1468 ("dm: core: Allocate parent data separate from
> > > probing parent")
> > >
> > > ---
> > > The discussion leading to this patch is located at
> > > https://lists.denx.de/pipermail/u-boot/2020-February/399811.html
> > >
> > >  drivers/serial/ns16550.c | 26 +-
> > >  1 file changed, 13 insertions(+), 13 deletions(-)
> > >
> >
> > Reviewed-by: Bin Meng 
> >
> > This fixed the boot failure of Intel Galileo
> >
> > Tested on Intel Galileo
> > Tested-by: Bin Meng 
>
> applied to u-boot-x86, thanks!

Unfortunately this patch breaks several ARM board:

+drivers/built-in.o: In function `ofnode_get_parent':
+drivers/core/ofnode.c:235: undefined reference to `fdt_parent_offset'
+drivers/built-in.o: In function `ofnode_read_simple_addr_cells':
+drivers/core/ofnode.c:717: undefined reference to `fdt_address_cells'
+drivers/built-in.o: In function `ofnode_read_simple_size_cells':
+drivers/core/ofnode.c:725: undefined reference to `fdt_size_cells'
+drivers/built-in.o: In function `ofnode_get_addr_size_index':
+drivers/core/ofnode.c:294: undefined reference to `fdtdec_get_addr_size_fixed'

See 
https://dev.azure.com/bmeng/GitHub/_build/results?buildId=158=logs=25fc9316-c681-5af2-a03f-b888fd665e84=3af932b6-18ad-575e-b0ea-0b31bb7c6c26

Would you please send a v2 to address this? thanks!

Regards,
Bin

[PATCH] dma: ti: k3-udma: Mark flow id as valid parameter for RX channel config

[Lokesh Vutla]

When flow id is not marked as valid, sysfw reads the register value to
get the range of flow ids that are supported. Then compares the flow range
with the U-Boot's host id. This will definitely fail as board
configuration doesn't assign the full range to U-Boot's host id. In order
to work around this, mark the flow id as valid and pass range as 0.

Signed-off-by: Lokesh Vutla 
---
 drivers/dma/ti/k3-udma.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index e587f1fcb2..a0e536ae5e 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -938,7 +938,9 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
 
req.valid_params = TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID |
TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID |
-   TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID;
+   TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID |
+   TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID |
+   TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID;
req.nav_id = tisci_rm->tisci_dev_id;
req.index = uc->rchan->id;
req.rx_chan_type = mode;
@@ -954,9 +956,6 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
if (uc->rflow->id != uc->rchan->id && uc->dir != DMA_MEM_TO_MEM) {
req.flowid_start = uc->rflow->id;
req.flowid_cnt = 1;
-   req.valid_params |=
-   TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID |
-   TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID;
}
 
ret = tisci_rm->tisci_udmap_ops->rx_ch_cfg(tisci_rm->tisci, );
-- 
2.23.0

[PATCH] firmware: tisci: Drop all deprecated messages

[Lokesh Vutla]

SYSFW v2020.01 and later versions no longer supports the below messages:
- TI_SCI_MSG_RM_RING_GET_CFG
- TISCI_MSG_RM_UDMAP_TX_CH_GET_CFG   0x1206
- TISCI_MSG_RM_UDMAP_RX_CH_GET_CFG   0x1216
- TISCI_MSG_RM_UDMAP_FLOW_GET_CFG0x1232
- TISCI_MSG_RM_UDMAP_FLOW_SIZE_THRESH_GET_CFG0x1233

There are no users in U-Boot for any of the above messages, So drop the
support for all the corresponding messages.

Signed-off-by: Lokesh Vutla 
---
 drivers/firmware/ti_sci.c  | 77 --
 drivers/firmware/ti_sci.h  |  5 --
 include/linux/soc/ti/ti_sci_protocol.h |  6 --
 3 files changed, 88 deletions(-)

diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index 99b2e5dfed..c3f95b252f 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -2364,82 +2364,6 @@ fail:
return ret;
 }
 
-/**
- * ti_sci_cmd_ring_get_config() - get RA ring configuration
- * @handle:pointer to TI SCI handle
- * @nav_id: Device ID of Navigator Subsystem from which the ring is allocated
- * @index: Ring index.
- * @addr_lo: returns ring's base address lo 32 bits
- * @addr_hi: returns ring's base address hi 32 bits
- * @count: returns number of ring elements.
- * @mode: returns mode of the ring
- * @size: returns ring element size.
- * @order_id: returns ring's bus order ID.
- *
- * Return: 0 if all went well, else returns appropriate error value.
- *
- * See @ti_sci_msg_rm_ring_get_cfg_req for more info.
- */
-static int ti_sci_cmd_ring_get_config(const struct ti_sci_handle *handle,
- u32 nav_id, u32 index, u8 *mode,
- u32 *addr_lo, u32 *addr_hi,
- u32 *count, u8 *size, u8 *order_id)
-{
-   struct ti_sci_msg_rm_ring_get_cfg_resp *resp;
-   struct ti_sci_msg_rm_ring_get_cfg_req req;
-   struct ti_sci_xfer *xfer;
-   struct ti_sci_info *info;
-   int ret = 0;
-
-   if (IS_ERR(handle))
-   return PTR_ERR(handle);
-   if (!handle)
-   return -EINVAL;
-
-   info = handle_to_ti_sci_info(handle);
-
-   xfer = ti_sci_setup_one_xfer(info, TI_SCI_MSG_RM_RING_GET_CFG,
-TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
-(u32 *), sizeof(req), sizeof(*resp));
-   if (IS_ERR(xfer)) {
-   ret = PTR_ERR(xfer);
-   dev_err(info->dev,
-   "RM_RA:Message get config failed(%d)\n", ret);
-   return ret;
-   }
-   req.nav_id = nav_id;
-   req.index = index;
-
-   ret = ti_sci_do_xfer(info, xfer);
-   if (ret) {
-   dev_err(info->dev, "RM_RA:Mbox get config send fail %d\n", ret);
-   goto fail;
-   }
-
-   resp = (struct ti_sci_msg_rm_ring_get_cfg_resp *)xfer->tx_message.buf;
-
-   if (!ti_sci_is_response_ack(resp)) {
-   ret = -ENODEV;
-   } else {
-   if (mode)
-   *mode = resp->mode;
-   if (addr_lo)
-   *addr_lo = resp->addr_lo;
-   if (addr_hi)
-   *addr_hi = resp->addr_hi;
-   if (count)
-   *count = resp->count;
-   if (size)
-   *size = resp->size;
-   if (order_id)
-   *order_id = resp->order_id;
-   };
-
-fail:
-   dev_dbg(info->dev, "RM_RA:get config ring %u ret:%d\n", index, ret);
-   return ret;
-}
-
 static int ti_sci_cmd_rm_psil_pair(const struct ti_sci_handle *handle,
   u32 nav_id, u32 src_thread, u32 dst_thread)
 {
@@ -2948,7 +2872,6 @@ static void ti_sci_setup_ops(struct ti_sci_info *info)
pops->proc_shutdown_no_wait = ti_sci_cmd_proc_shutdown_no_wait;
 
rops->config = ti_sci_cmd_ring_config;
-   rops->get_config = ti_sci_cmd_ring_get_config;
 
psilops->pair = ti_sci_cmd_rm_psil_pair;
psilops->unpair = ti_sci_cmd_rm_psil_unpair;
diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
index 69ff74d6a9..24b4d1c794 100644
--- a/drivers/firmware/ti_sci.h
+++ b/drivers/firmware/ti_sci.h
@@ -58,7 +58,6 @@
 /* NAVSS resource management */
 /* Ringacc requests */
 #define TI_SCI_MSG_RM_RING_CFG 0x1110
-#define TI_SCI_MSG_RM_RING_GET_CFG 0x
 
 /* PSI-L requests */
 #define TI_SCI_MSG_RM_PSIL_PAIR0x1280
@@ -72,13 +71,9 @@
 #define TI_SCI_MSG_RM_UDMAP_OPT_FLOW_CFG   0x1221
 
 #define TISCI_MSG_RM_UDMAP_TX_CH_CFG   0x1205
-#define TISCI_MSG_RM_UDMAP_TX_CH_GET_CFG   0x1206
 #define TISCI_MSG_RM_UDMAP_RX_CH_CFG   0x1215
-#define TISCI_MSG_RM_UDMAP_RX_CH_GET_CFG   0x1216
 #define TISCI_MSG_RM_UDMAP_FLOW_CFG0x1230
 #define TISCI_MSG_RM_UDMAP_FLOW_SIZE_THRESH_CFG0x1231
-#define TISCI_MSG_RM_UDMAP_FLOW_GET_CFG0x1232
-#define 

[PATCH] board: ti: k3: Update the sysfw image gen repository

[Lokesh Vutla]

Now k3-image-gen[0] is the official repository for generating sysfw.itb
Update the same in AM65x and J721e README.

[0] https://git.ti.com/cgit/k3-image-gen/k3-image-gen/

Signed-off-by: Lokesh Vutla 
---
 board/ti/am65x/README | 2 +-
 board/ti/j721e/README | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/ti/am65x/README b/board/ti/am65x/README
index 2e3fd9c4a8..86d8c8a1bc 100644
--- a/board/ti/am65x/README
+++ b/board/ti/am65x/README
@@ -104,7 +104,7 @@ requests DMSC to get these services done as shown in the 
above diagram.
 Sources:
 
 1. SYSFW:
-   Tree: git://git.ti.com/processor-firmware/system-firmware-image-gen.git
+   Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
Branch: master
 
 2. ATF:
diff --git a/board/ti/j721e/README b/board/ti/j721e/README
index 5be7d099db..ba0f320778 100644
--- a/board/ti/j721e/README
+++ b/board/ti/j721e/README
@@ -120,7 +120,7 @@ requests DMSC to get these services done as shown in the 
above diagram.
 Sources:
 
 1. SYSFW:
-   Tree: git://git.ti.com/processor-firmware/system-firmware-image-gen.git
+   Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
Branch: master
 
 2. ATF:
-- 
2.23.0

Re: [PATCH] ARM: zynq: Remove single comment about QSPI

[Michal Simek]

út 25. 2. 2020 v 15:32 odesílatel Michal Simek  napsal:
>
> Very likely configs have been moved to Kconfig by scripts and this just
> remains there that's why remove it.
>
> Signed-off-by: Michal Simek 
> ---
>
>  include/configs/zynq-common.h | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
> index 2d53237df433..b1cef4d4695f 100644
> --- a/include/configs/zynq-common.h
> +++ b/include/configs/zynq-common.h
> @@ -41,8 +41,6 @@
>  # define CONFIG_BOOTP_MAY_FAIL
>  #endif
>
> -/* QSPI */
> -
>  /* NOR */
>  #ifdef CONFIG_MTD_NOR_FLASH
>  # define CONFIG_SYS_FLASH_BASE 0xE200
> --
> 2.25.1
>

Applied.
M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH v2] ARM: zynq: Rename defconfig to be align with ZynqMP and Versal

[Michal Simek]

út 18. 2. 2020 v 17:04 odesílatel Michal Simek  napsal:
>
> Just cosmetic change before real switch.
>
> Signed-off-by: Michal Simek 
> ---
>
> Changes in v2:
> - Cover this new file by MAINTAINERS fragment
>
>  board/xilinx/zynq/MAINTAINERS   | 1 +
>  configs/{zynq_virt_defconfig => xilinx_zynq_virt_defconfig} | 0
>  2 files changed, 1 insertion(+)
>  rename configs/{zynq_virt_defconfig => xilinx_zynq_virt_defconfig} (100%)
>
> diff --git a/board/xilinx/zynq/MAINTAINERS b/board/xilinx/zynq/MAINTAINERS
> index fc6463a8c617..78bcd84d30e5 100644
> --- a/board/xilinx/zynq/MAINTAINERS
> +++ b/board/xilinx/zynq/MAINTAINERS
> @@ -5,3 +5,4 @@ F:  arch/arm/dts/zynq-*
>  F: board/xilinx/zynq/
>  F: include/configs/zynq*.h
>  F: configs/zynq_*_defconfig
> +F: configs/xilinx_zynq_*
> diff --git a/configs/zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
> similarity index 100%
> rename from configs/zynq_virt_defconfig
> rename to configs/xilinx_zynq_virt_defconfig
> --
> 2.25.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH] arm: xilinx: Fill DEVICE_TREE directly in Makefiles

[Michal Simek]

čt 13. 2. 2020 v 14:53 odesílatel Michal Simek  napsal:
>
> DEVICE_TREE variable is not exported from dts/Makefile that's why it is
> necessary to setup directly before use.
>
> Fixes: 312f2c5b14fa ("arm: xilinx: Use device tree which can be passed on cmd 
> line")
> Signed-off-by: Michal Simek 
> ---
>
> It was found by more intensive testing.
>
> Another option would be to move DEVICE_TREE setup from dts/Makefile to
> Makefile but I didn't find the right place for it.
>
> ---
>  board/xilinx/zynq/Makefile   | 5 +
>  board/xilinx/zynqmp/Makefile | 5 +
>  2 files changed, 10 insertions(+)
>
> diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
> index 6a2acee108fa..096a7aceb939 100644
> --- a/board/xilinx/zynq/Makefile
> +++ b/board/xilinx/zynq/Makefile
> @@ -13,6 +13,11 @@ spl/board/xilinx/zynq/ps_init_gpl.o 
> board/xilinx/zynq/ps_init_gpl.o: $(PS_INIT_F
> $(CC) $(c_flags) -I $(srctree)/$(src) -c -o $@ $^
>  endif
>
> +DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%)
> +ifeq ($(DEVICE_TREE),)
> +DEVICE_TREE := unset
> +endif
> +
>  ifeq ($(init-objs),)
>  hw-platform-y :=$(shell echo $(DEVICE_TREE))
>  init-objs := $(if $(wildcard 
> $(srctree)/$(src)/$(hw-platform-y)/ps7_init_gpl.c),\
> diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
> index 174f4ed24be3..398c6aaa452a 100644
> --- a/board/xilinx/zynqmp/Makefile
> +++ b/board/xilinx/zynqmp/Makefile
> @@ -13,6 +13,11 @@ spl/board/xilinx/zynqmp/ps_init_gpl.o 
> board/xilinx/zynqmp/ps_init_gpl.o: $(PS_IN
> $(CC) $(c_flags) -I $(srctree)/$(src) -c -o $@ $^
>  endif
>
> +DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%)
> +ifeq ($(DEVICE_TREE),)
> +DEVICE_TREE := unset
> +endif
> +
>  ifeq ($(init-objs),)
>  hw-platform-y :=$(shell echo $(DEVICE_TREE))
>  init-objs := $(if $(wildcard 
> $(srctree)/$(src)/$(hw-platform-y)/psu_init_gpl.c),\
> --
> 2.25.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH] net: zynq: Free allocated buffers in case of error

[Michal Simek]

čt 6. 2. 2020 v 16:04 odesílatel Michal Simek  napsal:
>
> Driver probe function is called again and again in case of error.
> Malloc space is getting full which is is reported by:
>  Insufficient RAM for page table: 0x15000 > 0x14000.
>  Please increase the size in get_page_table_size()
>  ### ERROR ### Please RESET the board ###
>
> The patch is freeing allocated buffers on error path to avoid panic.
>
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/net/zynq_gem.c | 22 +-
>  1 file changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index 879129653df3..745c65cf471c 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -659,8 +659,10 @@ static int zynq_gem_probe(struct udevice *dev)
>
> /* Align bd_space to MMU_SECTION_SHIFT */
> bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
> -   if (!bd_space)
> -   return -ENOMEM;
> +   if (!bd_space) {
> +   ret = -ENOMEM;
> +   goto err1;
> +   }
>
> mmu_set_region_dcache_behaviour((phys_addr_t)bd_space,
> BD_SPACE, DCACHE_OFF);
> @@ -672,7 +674,7 @@ static int zynq_gem_probe(struct udevice *dev)
> ret = clk_get_by_name(dev, "tx_clk", >clk);
> if (ret < 0) {
> dev_err(dev, "failed to get clock\n");
> -   return -EINVAL;
> +   goto err1;
> }
>
> priv->bus = mdio_alloc();
> @@ -682,9 +684,19 @@ static int zynq_gem_probe(struct udevice *dev)
>
> ret = mdio_register_seq(priv->bus, dev->seq);
> if (ret)
> -   return ret;
> +   goto err2;
>
> -   return zynq_phy_init(dev);
> +   ret = zynq_phy_init(dev);
> +   if (ret)
> +   goto err2;
> +
> +   return ret;
> +
> +err2:
> +   free(priv->rxbuffers);
> +err1:
> +   free(priv->tx_bd);
> +   return ret;
>  }
>
>  static int zynq_gem_remove(struct udevice *dev)
> --
> 2.25.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH] net: phy: dp83867: Clean force link good bit

[Michal Simek]

čt 6. 2. 2020 v 16:03 odesílatel Michal Simek  napsal:
>
> On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which
> means FORCE_LINK_GOOD is already setup. Origin code was doing write but the
> new code is doing read/modify/write and keep this bit untouched. That's why
> ethernet stop to work.
> The patch is cleaning this bit when PHYCR value is composed.
>
> Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards.
>
> Fixes: 37d6265f2bfa ("net: phy: dp83867: refactor rgmii configuration")
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/net/phy/dp83867.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
> index a43793cd4274..4d796e289c45 100644
> --- a/drivers/net/phy/dp83867.c
> +++ b/drivers/net/phy/dp83867.c
> @@ -64,6 +64,7 @@
>  #define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
>  #define DP83867_PHYCR_FIFO_DEPTH_MASK  GENMASK(15, 14)
>  #define DP83867_PHYCR_RESERVED_MASKBIT(11)
> +#define DP83867_PHYCR_FORCE_LINK_GOOD  BIT(10)
>  #define DP83867_MDI_CROSSOVER  5
>  #define DP83867_MDI_CROSSOVER_MDIX 2
>  #define DP83867_PHYCTRL_SGMIIEN0x0800
> @@ -283,6 +284,9 @@ static int dp83867_config(struct phy_device *phydev)
> val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
> val |= (dp83867->fifo_depth << 
> DP83867_PHYCR_FIFO_DEPTH_SHIFT);
>
> +   /* Do not force link good */
> +   val &= ~DP83867_PHYCR_FORCE_LINK_GOOD;
> +
> /* The code below checks if "port mirroring" N/A MODE4 has 
> been
>  * enabled during power on bootstrap.
>  *
> --
> 2.25.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH] mtd: nand: Fix on-die ecc issues in arasan_nfc driver

[Michal Simek]

po 20. 1. 2020 v 9:48 odesílatel Michal Simek  napsal:
>
> From: T Karthik Reddy 
>
> Fixed wrong enumeration of nand_config structure. Added chip select
> function before reading the nand chip for maf/dev id's, without this
> unable to access id's from some of the micron chips. Also added a
> print statement to identify if a nand flash is using on-die ecc.
>
> Signed-off-by: T Karthik Reddy 
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/mtd/nand/raw/arasan_nfc.c | 11 ---
>  1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/arasan_nfc.c 
> b/drivers/mtd/nand/raw/arasan_nfc.c
> index d1b1a4263a2e..110c32b39616 100644
> --- a/drivers/mtd/nand/raw/arasan_nfc.c
> +++ b/drivers/mtd/nand/raw/arasan_nfc.c
> @@ -1120,12 +1120,15 @@ static void arasan_nand_cmd_function(struct mtd_info 
> *mtd, unsigned int command,
>  static void arasan_check_ondie(struct mtd_info *mtd)
>  {
> struct nand_chip *nand_chip = mtd_to_nand(mtd);
> -   struct nand_config *nand = nand_get_controller_data(nand_chip);
> +   struct nand_drv *info = nand_get_controller_data(nand_chip);
> +   struct nand_config *nand = >config;
> u8 maf_id, dev_id;
> u8 get_feature[4];
> u8 set_feature[4] = {ENABLE_ONDIE_ECC, 0x00, 0x00, 0x00};
> u32 i;
>
> +   nand_chip->select_chip(mtd, 0);
> +
> /* Send the command for reading device ID */
> nand_chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
> nand_chip->cmdfunc(mtd, NAND_CMD_READID, 0, -1);
> @@ -1150,10 +1153,12 @@ static void arasan_check_ondie(struct mtd_info *mtd)
> for (i = 0; i < 4; i++)
> get_feature[i] = nand_chip->read_byte(mtd);
>
> -   if (get_feature[0] & ENABLE_ONDIE_ECC)
> +   if (get_feature[0] & ENABLE_ONDIE_ECC) {
> nand->on_die_ecc_enabled = true;
> -   else
> +   printf("On-DIE ECC Enabled\n");
> +   } else {
> printf("%s: Unable to enable OnDie ECC\n", __func__);
> +   }
>
> /* Use the BBT pattern descriptors */
> nand_chip->bbt_td = _main_descr;
> --
> 2.25.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH] versal: drivers: clk: Fix invalid clock name queries

[Michal Simek]

pá 17. 1. 2020 v 8:31 odesílatel Michal Simek  napsal:
>
> From: Rajan Vaja 
>
> The clock driver makes EEMI call to get the name of invalid clk
> when executing versal_get_clock_info() function. This results in
> error messages.
> Added check for validating clock before saving clock attribute and
> calling versal_pm_clock_get_name() in versal_get_clock_info() function.
>
> Signed-off-by: Rajan Vaja 
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/clk/clk_versal.c | 6 ++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
> index 7e97b0c4bf3a..6ca46c612df8 100644
> --- a/drivers/clk/clk_versal.c
> +++ b/drivers/clk/clk_versal.c
> @@ -569,6 +569,12 @@ static void versal_get_clock_info(void)
> continue;
>
> clock[i].valid = attr & CLK_VALID_MASK;
> +
> +   /* skip query for Invalid clock */
> +   ret = versal_is_valid_clock(i);
> +   if (ret != CLK_VALID_MASK)
> +   continue;
> +
> clock[i].type = ((attr >> CLK_TYPE_SHIFT) & 0x1) ?
> CLK_TYPE_EXTERNAL : CLK_TYPE_OUTPUT;
> nodetype = (attr >> NODE_TYPE_SHIFT) & NODE_CLASS_MASK;
> --
> 2.25.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH] net: zynq_gem: Use ulong instead of u32 data type

[Michal Simek]

čt 16. 1. 2020 v 8:54 odesílatel Michal Simek  napsal:
>
> From: T Karthik Reddy 
>
> flush_dcache_range() expects unsigned long in the arguments. Here u32
> variable is unable to hold the higher address value when ddr mapped
> to higher addresses & flushing lower address dchache range instead
> which is unmapped causing to crash.
>
> Signed-off-by: T Karthik Reddy 
> Signed-off-by: Michal Simek 
> ---
>
>  drivers/net/zynq_gem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index c3fe8e3c563f..879129653df3 100644
> --- a/drivers/net/zynq_gem.c
> +++ b/drivers/net/zynq_gem.c
> @@ -653,7 +653,7 @@ static int zynq_gem_probe(struct udevice *dev)
> return -ENOMEM;
>
> memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN);
> -   u32 addr = (ulong)priv->rxbuffers;
> +   ulong addr = (ulong)priv->rxbuffers;
> flush_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, 
> ARCH_DMA_MINALIGN));
> barrier();
>
> --
> 2.25.0
>

Applied.
M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH 1/2] Makefile: Add environment variable DEVICE_TREE to header

[Michal Simek]

On 26. 02. 20 16:33, Simon Glass wrote:
> Hi Michal,
> 
> On Tue, 18 Feb 2020 at 09:02, Michal Simek  wrote:
>>
>> Users have option to overwrite default device tree
>> (CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE.
>>
>> Feature has been added long time ago by commit 74de8c9a1672
>> ("dts/Makefile: Build the user specified dts") for a little bit different
>> reason.
>>
>> But this variable can be also used for different purpose like choosing
>> proper configuration from FIT image in SPL.
>> And this is the functionality I would like to use on Xilinx Zynq devices
>> that current u-boot.img can be composed in the same way based on OF_LIST
>> and different configuration is taken based on platform specific SPL.
>> SPL requires low level ps7_init_gpl configuration that's why different
>> boards require different SPL with fixed board_fit_config_name_match().
>>
>> Signed-off-by: Michal Simek 
>> ---
>>
>> I have done it in this way but maybe there is any smarter way how this can
>> be done. Also macro name can change if you want.
> 
> Can you please add a bit of documentation to doc/README.fdt-control ?

This feature is cover by documentation in this file already. What
exactly do you think that should be added?

Thanks,
Michal

169 Build:
170
171 After board configuration is done, fdt supported u-boot can be build
in two ways:
172 1)  build the default dts which is defined from
CONFIG_DEFAULT_DEVICE_TREE
173 $ make
174 2)  build the user specified dts file
175 $ make DEVICE_TREE=
176
177