Re: [PATCH v2 2/4] mx6cuboxi: customize board_boot_order to access eMMC

2020-04-18 Thread Walter Lozano

Hi Stefano,

I noticed that this series has state = Changes Requested, but not sure 
what are the changes need.


Could you please clarify? There is a silly hunk but Baruch suggested 
that this no requires a v3. However if you prefer a v3, I can prepare it


Please confirm.

On 16/3/20 15:56, Walter Lozano wrote:

Hi Baruch,

On 16/3/20 15:11, Baruch Siach wrote:

Hi Walter,

On Mon, Mar 16, 2020 at 02:53:58PM -0300, Walter Lozano wrote:

On 16/3/20 14:25, Baruch Siach wrote:

On Mon, Mar 16, 2020 at 02:05:57PM -0300, Walter Lozano wrote:

On 16/3/20 13:28, Baruch Siach wrote:

On Thu, Mar 12, 2020 at 01:52:13PM -0300, Walter Lozano wrote:

Thanks for sharing.

On 12/3/20 02:02, Baruch Siach wrote:

Hi Walter,

On Wed, Mar 11 2020, Walter Lozano wrote:
In SPL legacy code only one MMC device is created, based on 
BOOT_CFG

register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are 
created

based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.

This patch customizes board_boot_order taking into account 
BOOT_CFG
register to point to correct MMC1 / MMC2 device. Additionally, 
handle

IO mux for the desired boot device.

Signed-off-by: Walter Lozano 
---
 board/solidrun/mx6cuboxi/mx6cuboxi.c | 49 


 1 file changed, 49 insertions(+)

diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c 
b/board/solidrun/mx6cuboxi/mx6cuboxi.c

index 6a96f9ecdb..9bf3645f72 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -435,6 +435,7 @@ int board_early_init_f(void)
 #ifdef CONFIG_CMD_SATA
 setup_sata();
 #endif
+

This hunk should not be part of this commit.

Thanks for pointing to this silly hunk. I will prepare a V3.


Looks good to me, otherwise.

I can't test at the moment. Have you tested boot from both SD 
card and eMMC?
Most of the work was done booting from SD. In order to test 
booting from
eMMC, as I have some specific eFUSE configs, I tweaked 
board_boot_order to

force booting from eMMC.

But that does not cover SPL boot from eMMC, right?
Basically I think this approach should cover the necessary steps. 
To be more

clear about my tweak

1- BootROM loads SPL from SD

2- SPL is tweaked to load U-Boot from eMMC, and in this way test 
its support

on SPL
This is not exactly the same as SPL boot from eMMC. For example, 
your scenario
would work even without 'u-boot,dm-pre-reloc' property in the eMMC 
device

node.
I agree, it is not exactly the same and I really appreciate the time 
you
spent testing it. However I still don't understand your comments 
regarding
'u-boot,dm-pre-reloc', as without this property there wouldn't be a 
usdhc3

node in the DTB for SPL. Could you please clarify?

You are right. Bad example.


Thanks for clarifying.



Anyway I tested your patches here on real hardware with unfused 
SOM and

SD/eMMC boot select jumpers.
Thank you much for taking the time to test these patches in you 
board. I

really appreciate your help


Tested-by: Baruch Siach 

Thanks. I'll add the tag to the v3.
I think this series ready as is. No need to post v3 just for the 
test tag.
Patchwork collects patch tags automatically. See under the 
'A/F/R/T' column

here:

http://patchwork.ozlabs.org/project/uboot/list/?series=163738
I see, thanks for clarifying the issue related to "Tested-by" tag. 
Sorry for
asking but, is it not necessary to send a v3 to avoid the "silly 
hunk" you

pointed me?
I forgot about that. Maybe Stefano can make this trivial change when 
applying.

I would not respin the series just for that.


Thanks again for clarifying, you have been very helpful. 


Regards,

Walter



[PATCH 09/11] net: dc2114x: Clean up INL/OUTL functions

2020-04-18 Thread Marek Vasut
Rename these functions to dc2114x_{inl,outl}(), use u32 values in
them instead of plain signed integers as all those values are in
fact register values and the driver code does bitwise operations
on them. No functional change intended.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 48 +--
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index a85fb76d53..2bbe4e5d60 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -79,29 +79,29 @@
 #define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
 #endif
 
-static int INL(struct eth_device *dev, u_long addr)
+static u32 dc2114x_inl(struct eth_device *dev, u32 addr)
 {
-   return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
+   return le32_to_cpu(*(volatile u32 *)(addr + dev->iobase));
 }
 
-static void OUTL(struct eth_device *dev, int command, u_long addr)
+static void dc2114x_outl(struct eth_device *dev, u32 command, u32 addr)
 {
-   *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
+   *(volatile u32 *)(addr + dev->iobase) = cpu_to_le32(command);
 }
 
 static void reset_de4x5(struct eth_device *dev)
 {
-   int i;
+   u32 i;
 
-   i = INL(dev, DE4X5_BMR);
+   i = dc2114x_inl(dev, DE4X5_BMR);
mdelay(1);
-   OUTL(dev, i | BMR_SWR, DE4X5_BMR);
+   dc2114x_outl(dev, i | BMR_SWR, DE4X5_BMR);
mdelay(1);
-   OUTL(dev, i, DE4X5_BMR);
+   dc2114x_outl(dev, i, DE4X5_BMR);
mdelay(1);
 
for (i = 0; i < 5; i++) {
-   INL(dev, DE4X5_BMR);
+   dc2114x_inl(dev, DE4X5_BMR);
mdelay(10);
}
 
@@ -110,20 +110,20 @@ static void reset_de4x5(struct eth_device *dev)
 
 static void start_de4x5(struct eth_device *dev)
 {
-   s32 omr;
+   u32 omr;
 
-   omr = INL(dev, DE4X5_OMR);
+   omr = dc2114x_inl(dev, DE4X5_OMR);
omr |= OMR_ST | OMR_SR;
-   OUTL(dev, omr, DE4X5_OMR);  /* Enable the TX and/or RX */
+   dc2114x_outl(dev, omr, DE4X5_OMR);  /* Enable the TX and/or RX */
 }
 
 static void stop_de4x5(struct eth_device *dev)
 {
-   s32 omr;
+   u32 omr;
 
-   omr = INL(dev, DE4X5_OMR);
+   omr = dc2114x_inl(dev, DE4X5_OMR);
omr &= ~(OMR_ST | OMR_SR);
-   OUTL(dev, omr, DE4X5_OMR);  /* Disable the TX and/or RX */
+   dc2114x_outl(dev, omr, DE4X5_OMR);  /* Disable the TX and/or RX */
 }
 
 #define NUM_RX_DESC PKTBUFSRX
@@ -270,12 +270,12 @@ static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
 
reset_de4x5(dev);
 
-   if ((INL(dev, DE4X5_STS) & (STS_TS | STS_RS)) != 0) {
+   if (dc2114x_inl(dev, DE4X5_STS) & (STS_TS | STS_RS)) {
printf("Error: Cannot reset ethernet controller.\n");
return -1;
}
 
-   OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR);
+   dc2114x_outl(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR);
 
for (i = 0; i < NUM_RX_DESC; i++) {
rx_ring[i].status = cpu_to_le32(R_OWN);
@@ -300,8 +300,8 @@ static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
tx_ring[tx_ring_size - 1].des1 |= cpu_to_le32(TD_TER);
 
/* Tell the adapter where the TX/RX rings are located. */
-   OUTL(dev, phys_to_bus((u32)_ring), DE4X5_RRBA);
-   OUTL(dev, phys_to_bus((u32)_ring), DE4X5_TRBA);
+   dc2114x_outl(dev, phys_to_bus((u32)_ring), DE4X5_RRBA);
+   dc2114x_outl(dev, phys_to_bus((u32)_ring), DE4X5_TRBA);
 
start_de4x5(dev);
 
@@ -335,7 +335,7 @@ static int dc21x4x_send(struct eth_device *dev, void 
*packet, int length)
tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_LS | TD_FS | length);
tx_ring[tx_new].status = cpu_to_le32(T_OWN);
 
-   OUTL(dev, POLL_DEMAND, DE4X5_TPD);
+   dc2114x_outl(dev, POLL_DEMAND, DE4X5_TPD);
 
for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
if (i < TOUT_LOOP)
@@ -402,7 +402,7 @@ static void dc21x4x_halt(struct eth_device *dev)
int devbusfn = (int)dev->priv;
 
stop_de4x5(dev);
-   OUTL(dev, 0, DE4X5_SICR);
+   dc2114x_outl(dev, 0, DE4X5_SICR);
 
pci_write_config_byte(devbusfn, PCI_CFDA_PSM, SLEEP);
 }
@@ -433,7 +433,7 @@ static void send_setup_frame(struct eth_device *dev, bd_t 
*bis)
tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_SET | SETUP_FRAME_LEN);
tx_ring[tx_new].status = cpu_to_le32(T_OWN);
 
-   OUTL(dev, POLL_DEMAND, DE4X5_TPD);
+   dc2114x_outl(dev, POLL_DEMAND, DE4X5_TPD);
 
for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
if (i < TOUT_LOOP)
@@ -454,13 +454,13 @@ static void send_setup_frame(struct eth_device *dev, bd_t 
*bis)
 /* SROM Read and write routines. */
 static void sendto_srom(struct eth_device *dev, u_int command, u_long addr)
 {
-   OUTL(dev, command, addr);
+   

[PATCH 06/11] net: dc2114x: Clean up SROM operations

2020-04-18 Thread Marek Vasut
Clean up the SROM accessors to bring them up to standards with
U-Boot coding style. Sort variable into reverse xmas tree. No
functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 117 +++---
 1 file changed, 63 insertions(+), 54 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index bd64c75af4..b375906e27 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -441,30 +441,27 @@ static void send_setup_frame(struct eth_device *dev, bd_t 
*bis)
 }
 
 /* SROM Read and write routines. */
-static void
-sendto_srom(struct eth_device* dev, u_int command, u_long addr)
+static void sendto_srom(struct eth_device *dev, u_int command, u_long addr)
 {
OUTL(dev, command, addr);
udelay(1);
 }
 
-static int
-getfrom_srom(struct eth_device* dev, u_long addr)
+static int getfrom_srom(struct eth_device *dev, u_long addr)
 {
-   s32 tmp;
+   s32 tmp = INL(dev, addr);
 
-   tmp = INL(dev, addr);
udelay(1);
-
return tmp;
 }
 
 /* Note: this routine returns extra data bits for size detection. */
-static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location, 
int addr_len)
+static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location,
+ int addr_len)
 {
-   int i;
-   unsigned retval = 0;
int read_cmd = location | (SROM_READ_CMD << addr_len);
+   unsigned int retval = 0;
+   int i;
 
sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
@@ -476,14 +473,18 @@ static int do_read_eeprom(struct eth_device *dev, u_long 
ioaddr, int location, i
/* Shift the read command bits out. */
for (i = 4 + addr_len; i >= 0; i--) {
short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
-   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval, ioaddr);
+
+   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval,
+   ioaddr);
udelay(10);
-   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK, 
ioaddr);
+   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK,
+   ioaddr);
udelay(10);
 #ifdef DEBUG_SROM2
printf("%X", getfrom_srom(dev, ioaddr) & 15);
 #endif
-   retval = (retval << 1) | ((getfrom_srom(dev, ioaddr) & 
EE_DATA_READ) ? 1 : 0);
+   retval = (retval << 1) |
+!!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
}
 
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
@@ -498,7 +499,8 @@ static int do_read_eeprom(struct eth_device *dev, u_long 
ioaddr, int location, i
 #ifdef DEBUG_SROM2
printf("%X", getfrom_srom(dev, ioaddr) & 15);
 #endif
-   retval = (retval << 1) | ((getfrom_srom(dev, ioaddr) & 
EE_DATA_READ) ? 1 : 0);
+   retval = (retval << 1) |
+!!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
udelay(10);
}
@@ -518,34 +520,38 @@ static int do_read_eeprom(struct eth_device *dev, u_long 
ioaddr, int location, i
  * enable. It returns the data output from the EEPROM, and thus may
  * also be used for reads.
  */
-static int do_eeprom_cmd(struct eth_device *dev, u_long ioaddr, int cmd, int 
cmd_len)
+static int do_eeprom_cmd(struct eth_device *dev, u_long ioaddr, int cmd,
+int cmd_len)
 {
-   unsigned retval = 0;
+   unsigned int retval = 0;
 
 #ifdef DEBUG_SROM
printf(" EEPROM op 0x%x: ", cmd);
 #endif
 
-   sendto_srom(dev,SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
+   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
 
/* Shift the command bits out. */
do {
-   short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : 
EE_WRITE_0;
-   sendto_srom(dev,dataval, ioaddr);
+   short dataval = (cmd & BIT(cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
+
+   sendto_srom(dev, dataval, ioaddr);
udelay(10);
 
 #ifdef DEBUG_SROM2
-   printf("%X", getfrom_srom(dev,ioaddr) & 15);
+   printf("%X", getfrom_srom(dev, ioaddr) & 15);
 #endif
 
-   sendto_srom(dev,dataval | DT_CLK, ioaddr);
+   sendto_srom(dev, dataval | DT_CLK, ioaddr);
udelay(10);
-   retval = (retval << 1) | ((getfrom_srom(dev,ioaddr) & 
EE_DATA_READ) ? 1 : 0);
+   retval = (retval << 1) |
+!!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
} while (--cmd_len >= 0);
-   sendto_srom(dev,SROM_RD | SROM_SR | DT_CS, ioaddr);
+
+   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 
/* Terminate the EEPROM access. */
-   

[PATCH 07/11] net: dc2114x: Clean up remaining driver code

2020-04-18 Thread Marek Vasut
Clean up the remaining driver code, macro space alignment, function
declaration indent, replace __attribute__((aligned(32))) with plain
__aligned(32). No functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 86 +--
 1 file changed, 43 insertions(+), 43 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index b375906e27..007e4cecb6 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -12,19 +12,17 @@
 
 #undef UPDATE_SROM
 
-/* PCI Registers.
- */
-#define PCI_CFDA_PSM   0x43
+/* PCI Registers. */
+#define PCI_CFDA_PSM   0x43
 
 #define CFRV_RN0x00f0  /* Revision Number */
 
 #define WAKEUP 0x00/* Power Saving Wakeup */
 #define SLEEP  0x80/* Power Saving Sleep Mode */
 
-#define DC2114x_BRK0x0020  /* CFRV break between DC21142 & DC21143 
*/
+#define DC2114x_BRK0x0020  /* CFRV break between DC21142 & DC21143 */
 
-/* Ethernet chip registers.
- */
+/* Ethernet chip registers. */
 #define DE4X5_BMR  0x000   /* Bus Mode Register */
 #define DE4X5_TPD  0x008   /* Transmit Poll Demand Reg */
 #define DE4X5_RRBA 0x018   /* RX Ring Base Address Reg */
@@ -34,8 +32,7 @@
 #define DE4X5_SICR 0x068   /* SIA Connectivity Register */
 #define DE4X5_APROM0x048   /* Ethernet Address PROM */
 
-/* Register bits.
- */
+/* Register bits. */
 #define BMR_SWR0x0001  /* Software Reset */
 #define STS_TS 0x0070  /* Transmit Process State */
 #define STS_RS 0x000e  /* Receive Process State */
@@ -45,8 +42,7 @@
 #define OMR_SDP0x0200  /* SD Polarity - MUST BE 
ASSERTED */
 #define OMR_PM 0x0080  /* Pass All Multicast */
 
-/* Descriptor bits.
- */
+/* Descriptor bits. */
 #define R_OWN  0x8000  /* Own Bit */
 #define RD_RER 0x0200  /* Receive End Of Ring */
 #define RD_LS  0x0100  /* Last Descriptor */
@@ -63,12 +59,12 @@
 #define SROM_READ_CMD  6
 #define SROM_ERASE_CMD 7
 
-#define SROM_HWADD 0x0014  /* Hardware Address offset in SROM */
+#define SROM_HWADD 0x0014  /* Hardware Address offset in SROM */
 #define SROM_RD0x4000  /* Read from Boot ROM */
-#define EE_DATA_WRITE0x04  /* EEPROM chip data in. */
-#define EE_WRITE_0 0x4801
-#define EE_WRITE_1 0x4805
-#define EE_DATA_READ 0x08  /* EEPROM chip data out. */
+#define EE_DATA_WRITE  0x04/* EEPROM chip data in. */
+#define EE_WRITE_0 0x4801
+#define EE_WRITE_1 0x4805
+#define EE_DATA_READ   0x08/* EEPROM chip data out. */
 #define SROM_SR0x0800  /* Select Serial ROM when set */
 
 #define DT_IN  0x0004  /* Serial Data In */
@@ -79,13 +75,13 @@
 
 #define RESET_DE4X5(dev) {\
 int i;\
-i=INL(dev, DE4X5_BMR);\
+i = INL(dev, DE4X5_BMR);\
 udelay(1000);\
 OUTL(dev, i | BMR_SWR, DE4X5_BMR);\
 udelay(1000);\
 OUTL(dev, i, DE4X5_BMR);\
 udelay(1000);\
-for (i=0;i<5;i++) {INL(dev, DE4X5_BMR); udelay(1);}\
+for (i = 0; i < 5; i++) {INL(dev, DE4X5_BMR); udelay(1); } \
 udelay(1000);\
 }
 
@@ -99,7 +95,7 @@
 #define STOP_DE4X5(dev) {\
 s32 omr; \
 omr = INL(dev, DE4X5_OMR);\
-omr &= ~(OMR_ST|OMR_SR);\
+omr &= ~(OMR_ST | OMR_SR);\
 OUTL(dev, omr, DE4X5_OMR); /* Disable the TX and/or RX */ \
 }
 
@@ -118,30 +114,34 @@ struct de4x5_desc {
u32 next;
 };
 
-static struct de4x5_desc rx_ring[NUM_RX_DESC] __attribute__ ((aligned(32))); 
/* RX descriptor ring */
-static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); 
/* TX descriptor ring */
-static int rx_new; /* RX descriptor ring pointer */
-static int tx_new; /* TX descriptor ring pointer */
-
-static char rxRingSize;
-static char txRingSize;
-
-static void  sendto_srom(struct eth_device* dev, u_int command, u_long addr);
-static int   getfrom_srom(struct eth_device* dev, u_long addr);
-static int   do_eeprom_cmd(struct eth_device *dev, u_long ioaddr,int cmd,int 
cmd_len);
-static int   do_read_eeprom(struct eth_device *dev,u_long ioaddr,int 
location,int addr_len);
+/* RX and TX descriptor ring */
+static struct de4x5_desc rx_ring[NUM_RX_DESC] __aligned(32);
+static struct de4x5_desc tx_ring[NUM_TX_DESC] __aligned(32);
+static int rx_new; /* RX descriptor ring pointer */
+static int tx_new; /* TX descriptor ring pointer */
+
+static char rx_ring_size;
+static char tx_ring_size;
+
+static void  sendto_srom(struct eth_device *dev, u_int command, u_long addr);
+static int   getfrom_srom(struct eth_device *dev, u_long addr);
+static int   do_eeprom_cmd(struct eth_device *dev, u_long ioaddr,
+   

[PATCH 10/11] net: dc2114x: Reorganize driver

2020-04-18 Thread Marek Vasut
Move the functions in the driver around to better fit future DM
conversion, drop function forward declarations. No functional
change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 736 --
 1 file changed, 357 insertions(+), 379 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 2bbe4e5d60..9de9634cd5 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -79,6 +79,30 @@
 #define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
 #endif
 
+#define NUM_RX_DESC PKTBUFSRX
+#define NUM_TX_DESC 1  /* Number of TX descriptors   */
+#define RX_BUFF_SZ  PKTSIZE_ALIGN
+
+#define TOUT_LOOP   100
+
+#define SETUP_FRAME_LEN 192
+
+struct de4x5_desc {
+   volatile s32 status;
+   u32 des1;
+   u32 buf;
+   u32 next;
+};
+
+/* RX and TX descriptor ring */
+static struct de4x5_desc rx_ring[NUM_RX_DESC] __aligned(32);
+static struct de4x5_desc tx_ring[NUM_TX_DESC] __aligned(32);
+static int rx_new; /* RX descriptor ring pointer */
+static int tx_new; /* TX descriptor ring pointer */
+
+static char rx_ring_size;
+static char tx_ring_size;
+
 static u32 dc2114x_inl(struct eth_device *dev, u32 addr)
 {
return le32_to_cpu(*(volatile u32 *)(addr + dev->iobase));
@@ -126,191 +150,267 @@ static void stop_de4x5(struct eth_device *dev)
dc2114x_outl(dev, omr, DE4X5_OMR);  /* Disable the TX and/or RX */
 }
 
-#define NUM_RX_DESC PKTBUFSRX
-#define NUM_TX_DESC 1  /* Number of TX descriptors   */
-#define RX_BUFF_SZ  PKTSIZE_ALIGN
-
-#define TOUT_LOOP   100
+/* SROM Read and write routines. */
+static void sendto_srom(struct eth_device *dev, u_int command, u_long addr)
+{
+   dc2114x_outl(dev, command, addr);
+   udelay(1);
+}
 
-#define SETUP_FRAME_LEN 192
+static int getfrom_srom(struct eth_device *dev, u_long addr)
+{
+   u32 tmp = dc2114x_inl(dev, addr);
 
-struct de4x5_desc {
-   volatile s32 status;
-   u32 des1;
-   u32 buf;
-   u32 next;
-};
+   udelay(1);
+   return tmp;
+}
 
-/* RX and TX descriptor ring */
-static struct de4x5_desc rx_ring[NUM_RX_DESC] __aligned(32);
-static struct de4x5_desc tx_ring[NUM_TX_DESC] __aligned(32);
-static int rx_new; /* RX descriptor ring pointer */
-static int tx_new; /* TX descriptor ring pointer */
+/* Note: this routine returns extra data bits for size detection. */
+static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location,
+ int addr_len)
+{
+   int read_cmd = location | (SROM_READ_CMD << addr_len);
+   unsigned int retval = 0;
+   int i;
 
-static char rx_ring_size;
-static char tx_ring_size;
+   sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
+   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 
-static void  sendto_srom(struct eth_device *dev, u_int command, u_long addr);
-static int   getfrom_srom(struct eth_device *dev, u_long addr);
-static int   do_eeprom_cmd(struct eth_device *dev, u_long ioaddr,
-  int cmd, int cmd_len);
-static int   do_read_eeprom(struct eth_device *dev, u_long ioaddr,
-   int location, int addr_len);
-#ifdef UPDATE_SROM
-static int   write_srom(struct eth_device *dev, u_long ioaddr,
-   int index, int new_value);
-static void  update_srom(struct eth_device *dev, bd_t *bis);
+#ifdef DEBUG_SROM
+   printf(" EEPROM read at %d ", location);
 #endif
-static int   read_srom(struct eth_device *dev, u_long ioaddr, int index);
-static void  read_hw_addr(struct eth_device *dev, bd_t *bis);
-static void  send_setup_frame(struct eth_device *dev, bd_t *bis);
 
-static int   dc21x4x_init(struct eth_device *dev, bd_t *bis);
-static int   dc21x4x_send(struct eth_device *dev, void *packet, int length);
-static int   dc21x4x_recv(struct eth_device *dev);
-static void  dc21x4x_halt(struct eth_device *dev);
+   /* Shift the read command bits out. */
+   for (i = 4 + addr_len; i >= 0; i--) {
+   short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
 
-static struct pci_device_id supported[] = {
-   { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST },
-   { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142 },
-   { }
-};
+   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval,
+   ioaddr);
+   udelay(10);
+   sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK,
+   ioaddr);
+   udelay(10);
+#ifdef DEBUG_SROM2
+   printf("%X", getfrom_srom(dev, ioaddr) & 15);
+#endif
+   retval = (retval << 1) |
+!!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
+   }
 
-int dc21x4x_initialize(bd_t *bis)
-{
-   struct eth_device *dev;
-   unsigned short status;
-   unsigned char timer;
-   unsigned int iobase;
-   int 

[PATCH 08/11] net: dc2114x: Clean up DE4X5 macros

2020-04-18 Thread Marek Vasut
Replace these macros with static functions to permit the compiler to
do type checking on the functions. The INL()/OUTL() functions have to
be moved in this patch as well, as those DE4X5 macros are using them.
No functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 89 ---
 1 file changed, 50 insertions(+), 39 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 007e4cecb6..a85fb76d53 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -73,30 +73,57 @@
 
 #define POLL_DEMAND1
 
-#define RESET_DE4X5(dev) {\
-int i;\
-i = INL(dev, DE4X5_BMR);\
-udelay(1000);\
-OUTL(dev, i | BMR_SWR, DE4X5_BMR);\
-udelay(1000);\
-OUTL(dev, i, DE4X5_BMR);\
-udelay(1000);\
-for (i = 0; i < 5; i++) {INL(dev, DE4X5_BMR); udelay(1); } \
-udelay(1000);\
+#if defined(CONFIG_E500)
+#define phys_to_bus(a) (a)
+#else
+#define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
+#endif
+
+static int INL(struct eth_device *dev, u_long addr)
+{
+   return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
+}
+
+static void OUTL(struct eth_device *dev, int command, u_long addr)
+{
+   *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
+}
+
+static void reset_de4x5(struct eth_device *dev)
+{
+   int i;
+
+   i = INL(dev, DE4X5_BMR);
+   mdelay(1);
+   OUTL(dev, i | BMR_SWR, DE4X5_BMR);
+   mdelay(1);
+   OUTL(dev, i, DE4X5_BMR);
+   mdelay(1);
+
+   for (i = 0; i < 5; i++) {
+   INL(dev, DE4X5_BMR);
+   mdelay(10);
+   }
+
+   mdelay(1);
 }
 
-#define START_DE4X5(dev) {\
-s32 omr; \
-omr = INL(dev, DE4X5_OMR);\
-omr |= OMR_ST | OMR_SR;\
-OUTL(dev, omr, DE4X5_OMR); /* Enable the TX and/or RX */\
+static void start_de4x5(struct eth_device *dev)
+{
+   s32 omr;
+
+   omr = INL(dev, DE4X5_OMR);
+   omr |= OMR_ST | OMR_SR;
+   OUTL(dev, omr, DE4X5_OMR);  /* Enable the TX and/or RX */
 }
 
-#define STOP_DE4X5(dev) {\
-s32 omr; \
-omr = INL(dev, DE4X5_OMR);\
-omr &= ~(OMR_ST | OMR_SR);\
-OUTL(dev, omr, DE4X5_OMR); /* Disable the TX and/or RX */ \
+static void stop_de4x5(struct eth_device *dev)
+{
+   s32 omr;
+
+   omr = INL(dev, DE4X5_OMR);
+   omr &= ~(OMR_ST | OMR_SR);
+   OUTL(dev, omr, DE4X5_OMR);  /* Disable the TX and/or RX */
 }
 
 #define NUM_RX_DESC PKTBUFSRX
@@ -143,22 +170,6 @@ static int   dc21x4x_send(struct eth_device *dev, void 
*packet, int length);
 static int   dc21x4x_recv(struct eth_device *dev);
 static void  dc21x4x_halt(struct eth_device *dev);
 
-#if defined(CONFIG_E500)
-#define phys_to_bus(a) (a)
-#else
-#define phys_to_bus(a) pci_phys_to_mem((pci_dev_t)dev->priv, a)
-#endif
-
-static int INL(struct eth_device *dev, u_long addr)
-{
-   return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
-}
-
-static void OUTL(struct eth_device *dev, int command, u_long addr)
-{
-   *(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
-}
-
 static struct pci_device_id supported[] = {
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST },
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142 },
@@ -257,7 +268,7 @@ static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
/* Ensure we're not sleeping. */
pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
 
-   RESET_DE4X5(dev);
+   reset_de4x5(dev);
 
if ((INL(dev, DE4X5_STS) & (STS_TS | STS_RS)) != 0) {
printf("Error: Cannot reset ethernet controller.\n");
@@ -292,7 +303,7 @@ static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
OUTL(dev, phys_to_bus((u32)_ring), DE4X5_RRBA);
OUTL(dev, phys_to_bus((u32)_ring), DE4X5_TRBA);
 
-   START_DE4X5(dev);
+   start_de4x5(dev);
 
tx_new = 0;
rx_new = 0;
@@ -390,7 +401,7 @@ static void dc21x4x_halt(struct eth_device *dev)
 {
int devbusfn = (int)dev->priv;
 
-   STOP_DE4X5(dev);
+   stop_de4x5(dev);
OUTL(dev, 0, DE4X5_SICR);
 
pci_write_config_byte(devbusfn, PCI_CFDA_PSM, SLEEP);
-- 
2.25.1



[PATCH 05/11] net: dc2114x: Clean up send_setup_frame()

2020-04-18 Thread Marek Vasut
Clean up the send_setup_frame() to bring it up to standards with
U-Boot coding style, invert the loops where applicable to cut
down the level of indent. No functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 44 +--
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 6fe05113ca..bd64c75af4 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -396,48 +396,48 @@ static void dc21x4x_halt(struct eth_device *dev)
pci_write_config_byte(devbusfn, PCI_CFDA_PSM, SLEEP);
 }
 
-static void send_setup_frame(struct eth_device* dev, bd_t *bis)
+static void send_setup_frame(struct eth_device *dev, bd_t *bis)
 {
-   int i;
-   charsetup_frame[SETUP_FRAME_LEN];
-   char*pa = _frame[0];
+   char setup_frame[SETUP_FRAME_LEN];
+   char *pa = _frame[0];
+   int i;
 
memset(pa, 0xff, SETUP_FRAME_LEN);
 
for (i = 0; i < ETH_ALEN; i++) {
*(pa + (i & 1)) = dev->enetaddr[i];
-   if (i & 0x01) {
+   if (i & 0x01)
pa += 4;
-   }
}
 
-   for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-   if (i >= TOUT_LOOP) {
-   printf("%s: tx error buffer not ready\n", dev->name);
-   goto Done;
-   }
+   for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+   if (i < TOUT_LOOP)
+   continue;
+
+   printf("%s: tx error buffer not ready\n", dev->name);
+   return;
}
 
-   tx_ring[tx_new].buf = cpu_to_le32(phys_to_bus((u32) _frame[0]));
-   tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_SET| SETUP_FRAME_LEN);
+   tx_ring[tx_new].buf = cpu_to_le32(phys_to_bus((u32)_frame[0]));
+   tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_SET | SETUP_FRAME_LEN);
tx_ring[tx_new].status = cpu_to_le32(T_OWN);
 
OUTL(dev, POLL_DEMAND, DE4X5_TPD);
 
-   for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-   if (i >= TOUT_LOOP) {
-   printf("%s: tx buffer not ready\n", dev->name);
-   goto Done;
-   }
+   for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+   if (i < TOUT_LOOP)
+   continue;
+
+   printf("%s: tx buffer not ready\n", dev->name);
+   return;
}
 
if (le32_to_cpu(tx_ring[tx_new].status) != 0x7FFF) {
-   printf("TX error status2 = 0x%08X\n", 
le32_to_cpu(tx_ring[tx_new].status));
+   printf("TX error status2 = 0x%08X\n",
+  le32_to_cpu(tx_ring[tx_new].status));
}
-   tx_new = (tx_new+1) % NUM_TX_DESC;
 
-Done:
-   return;
+   tx_new = (tx_new + 1) % NUM_TX_DESC;
 }
 
 /* SROM Read and write routines. */
-- 
2.25.1



[PATCH 11/11] net: dc2114x: Switch DEBUG_SROM{,2} to debug_cond()

2020-04-18 Thread Marek Vasut
Replace the adhoc debugging ifdeffery with debug_cond() and an
internal SROM_DEBUG macro to select the debug level.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 57 ---
 1 file changed, 21 insertions(+), 36 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 9de9634cd5..d008696b0f 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -7,8 +7,7 @@
 #include 
 #include 
 
-#undef DEBUG_SROM
-#undef DEBUG_SROM2
+#define SROM_DLEVEL0
 
 #undef UPDATE_SROM
 
@@ -176,9 +175,7 @@ static int do_read_eeprom(struct eth_device *dev, u_long 
ioaddr, int location,
sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 
-#ifdef DEBUG_SROM
-   printf(" EEPROM read at %d ", location);
-#endif
+   debug_cond(SROM_DLEVEL >= 1, " EEPROM read at %d ", location);
 
/* Shift the read command bits out. */
for (i = 4 + addr_len; i >= 0; i--) {
@@ -190,25 +187,21 @@ static int do_read_eeprom(struct eth_device *dev, u_long 
ioaddr, int location,
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK,
ioaddr);
udelay(10);
-#ifdef DEBUG_SROM2
-   printf("%X", getfrom_srom(dev, ioaddr) & 15);
-#endif
+   debug_cond(SROM_DLEVEL >= 2, "%X",
+  getfrom_srom(dev, ioaddr) & 15);
retval = (retval << 1) |
 !!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
}
 
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 
-#ifdef DEBUG_SROM2
-   printf(" :%X:", getfrom_srom(dev, ioaddr) & 15);
-#endif
+   debug_cond(SROM_DLEVEL >= 2, " :%X:", getfrom_srom(dev, ioaddr) & 15);
 
for (i = 16; i > 0; i--) {
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
udelay(10);
-#ifdef DEBUG_SROM2
-   printf("%X", getfrom_srom(dev, ioaddr) & 15);
-#endif
+   debug_cond(SROM_DLEVEL >= 2, "%X",
+  getfrom_srom(dev, ioaddr) & 15);
retval = (retval << 1) |
 !!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
@@ -218,9 +211,8 @@ static int do_read_eeprom(struct eth_device *dev, u_long 
ioaddr, int location,
/* Terminate the EEPROM access. */
sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
 
-#ifdef DEBUG_SROM2
-   printf(" EEPROM value at %d is %5.5x.\n", location, retval);
-#endif
+   debug_cond(SROM_DLEVEL >= 2, " EEPROM value at %d is %5.5x.\n",
+  location, retval);
 
return retval;
 }
@@ -235,9 +227,7 @@ static int do_eeprom_cmd(struct eth_device *dev, u_long 
ioaddr, int cmd,
 {
unsigned int retval = 0;
 
-#ifdef DEBUG_SROM
-   printf(" EEPROM op 0x%x: ", cmd);
-#endif
+   debug_cond(SROM_DLEVEL >= 1, " EEPROM op 0x%x: ", cmd);
 
sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
 
@@ -248,9 +238,8 @@ static int do_eeprom_cmd(struct eth_device *dev, u_long 
ioaddr, int cmd,
sendto_srom(dev, dataval, ioaddr);
udelay(10);
 
-#ifdef DEBUG_SROM2
-   printf("%X", getfrom_srom(dev, ioaddr) & 15);
-#endif
+   debug_cond(SROM_DLEVEL >= 2, "%X",
+  getfrom_srom(dev, ioaddr) & 15);
 
sendto_srom(dev, dataval | DT_CLK, ioaddr);
udelay(10);
@@ -263,9 +252,7 @@ static int do_eeprom_cmd(struct eth_device *dev, u_long 
ioaddr, int cmd,
/* Terminate the EEPROM access. */
sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
 
-#ifdef DEBUG_SROM
-   printf(" EEPROM result is 0x%5.5x.\n", retval);
-#endif
+   debug_cond(SROM_DLEVEL >= 1, " EEPROM result is 0x%5.5x.\n", retval);
 
return retval;
 }
@@ -293,10 +280,10 @@ static int write_srom(struct eth_device *dev, u_long 
ioaddr, int index,
 
udelay(10 * 1000); /* test-only */
 
-#ifdef DEBUG_SROM
-   printf("ee_addr_size=%d.\n", ee_addr_size);
-   printf("Writing new entry 0x%4.4x to offset %d.\n", new_value, index);
-#endif
+   debug_cond(SROM_DLEVEL >= 1, "ee_addr_size=%d.\n", ee_addr_size);
+   debug_cond(SROM_DLEVEL >= 1,
+  "Writing new entry 0x%4.4x to offset %d.\n",
+  new_value, index);
 
/* Enable programming modes. */
do_eeprom_cmd(dev, ioaddr, 0x4f << (ee_addr_size - 4),
@@ -314,9 +301,7 @@ static int write_srom(struct eth_device *dev, u_long 
ioaddr, int index,
break;
}
 
-#ifdef DEBUG_SROM
-   printf(" Write finished after %d ticks.\n", i);
-#endif
+   debug_cond(SROM_DLEVEL >= 1, " Write finished after %d ticks.\n", i);
 
/* Disable programming. */
do_eeprom_cmd(dev, ioaddr, (0x40 << (ee_addr_size - 4)),
@@ 

[PATCH 01/11] net: dc2114x: Clean up init code

2020-04-18 Thread Marek Vasut
Clean up the driver init code to bring it up to standards with
U-Boot coding style, no functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 66 +--
 1 file changed, 32 insertions(+), 34 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 40bfc5281b..d302d0362a 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -167,33 +167,30 @@ static struct pci_device_id supported[] = {
 
 int dc21x4x_initialize(bd_t *bis)
 {
-   int idx=0;
-   int card_number = 0;
-   unsigned intcfrv;
-   unsigned char   timer;
-   pci_dev_t   devbusfn;
-   unsigned intiobase;
-   unsigned short  status;
-   struct eth_device*  dev;
-
-   while(1) {
-   devbusfn =  pci_find_devices(supported, idx++);
-   if (devbusfn == -1) {
+   struct eth_device *dev;
+   unsigned short status;
+   unsigned char timer;
+   unsigned int iobase;
+   int card_number = 0;
+   pci_dev_t devbusfn;
+   unsigned int cfrv;
+   int idx = 0;
+
+   while (1) {
+   devbusfn = pci_find_devices(supported, idx++);
+   if (devbusfn == -1)
break;
-   }
 
/* Get the chip configuration revision register. */
pci_read_config_dword(devbusfn, PCI_REVISION_ID, );
 
-   if ((cfrv & CFRV_RN) < DC2114x_BRK ) {
+   if ((cfrv & CFRV_RN) < DC2114x_BRK) {
printf("Error: The chip is not DC21143.\n");
continue;
}
 
pci_read_config_word(devbusfn, PCI_COMMAND, );
-   status |=
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER;
+   status |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
pci_write_config_word(devbusfn, PCI_COMMAND, status);
 
pci_read_config_word(devbusfn, PCI_COMMAND, );
@@ -211,30 +208,31 @@ int dc21x4x_initialize(bd_t *bis)
pci_read_config_byte(devbusfn, PCI_LATENCY_TIMER, );
 
if (timer < 0x60) {
-   pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 
0x60);
+   pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER,
+ 0x60);
}
 
/* read BAR for memory space access */
pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, );
iobase &= PCI_BASE_ADDRESS_MEM_MASK;
-   debug ("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase);
-
-   dev = (struct eth_device*) malloc(sizeof *dev);
+   debug("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase);
 
+   dev = (struct eth_device *)malloc(sizeof(*dev));
if (!dev) {
printf("Can not allocalte memory of dc21x4x\n");
break;
}
+
memset(dev, 0, sizeof(*dev));
 
sprintf(dev->name, "dc21x4x#%d", card_number);
 
dev->iobase = pci_mem_to_phys(devbusfn, iobase);
-   dev->priv   = (void*) devbusfn;
-   dev->init   = dc21x4x_init;
-   dev->halt   = dc21x4x_halt;
-   dev->send   = dc21x4x_send;
-   dev->recv   = dc21x4x_recv;
+   dev->priv = (void *)devbusfn;
+   dev->init = dc21x4x_init;
+   dev->halt = dc21x4x_halt;
+   dev->send = dc21x4x_send;
+   dev->recv = dc21x4x_recv;
 
/* Ensure we're not sleeping. */
pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
@@ -251,10 +249,10 @@ int dc21x4x_initialize(bd_t *bis)
return card_number;
 }
 
-static int dc21x4x_init(struct eth_device* dev, bd_t* bis)
+static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
 {
-   int i;
-   int devbusfn = (int) dev->priv;
+   int i;
+   int devbusfn = (int)dev->priv;
 
/* Ensure we're not sleeping. */
pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
@@ -271,12 +269,12 @@ static int dc21x4x_init(struct eth_device* dev, bd_t* bis)
for (i = 0; i < NUM_RX_DESC; i++) {
rx_ring[i].status = cpu_to_le32(R_OWN);
rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ);
-   rx_ring[i].buf = cpu_to_le32(
-   phys_to_bus((u32)net_rx_packets[i]));
+   rx_ring[i].buf =
+   cpu_to_le32(phys_to_bus((u32)net_rx_packets[i]));
rx_ring[i].next = 0;
}
 
-   for (i=0; i < NUM_TX_DESC; i++) {
+   for (i = 0; i < NUM_TX_DESC; i++) {
tx_ring[i].status = 0;
tx_ring[i].des1 = 0;

[PATCH 04/11] net: dc2114x: Clean up dc21x4x_halt()

2020-04-18 Thread Marek Vasut
Clean up the driver halt code to bring it up to standards with
U-Boot coding style. No functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 4d2e11672e..6fe05113ca 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -386,9 +386,9 @@ static int dc21x4x_recv(struct eth_device *dev)
return length;
 }
 
-static void dc21x4x_halt(struct eth_device* dev)
+static void dc21x4x_halt(struct eth_device *dev)
 {
-   int devbusfn = (int) dev->priv;
+   int devbusfn = (int)dev->priv;
 
STOP_DE4X5(dev);
OUTL(dev, 0, DE4X5_SICR);
-- 
2.25.1



[PATCH 03/11] net: dc2114x: Clean up dc21x4x_recv()

2020-04-18 Thread Marek Vasut
Clean up the driver recv code to bring it up to standards with
U-Boot coding style. No functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 44 +++
 1 file changed, 19 insertions(+), 25 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 11ebea9c1a..4d2e11672e 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -346,46 +346,40 @@ done:
return status;
 }
 
-static int dc21x4x_recv(struct eth_device* dev)
+static int dc21x4x_recv(struct eth_device *dev)
 {
-   s32 status;
-   int length= 0;
+   int length = 0;
+   u32 status;
 
-   for ( ; ; ) {
-   status = (s32)le32_to_cpu(rx_ring[rx_new].status);
+   while (true) {
+   status = le32_to_cpu(rx_ring[rx_new].status);
 
-   if (status & R_OWN) {
+   if (status & R_OWN)
break;
-   }
 
if (status & RD_LS) {
-   /* Valid frame status.
-*/
+   /* Valid frame status. */
if (status & RD_ES) {
-
-   /* There was an error.
-*/
+   /* There was an error. */
printf("RX error status = 0x%08X\n", status);
} else {
-   /* A valid frame received.
-*/
-   length = (le32_to_cpu(rx_ring[rx_new].status) 
>> 16);
-
-   /* Pass the packet up to the protocol
-* layers.
-*/
-   net_process_received_packet(
-   net_rx_packets[rx_new], length - 4);
+   /* A valid frame received. */
+   length = (le32_to_cpu(rx_ring[rx_new].status)
+ >> 16);
+
+   /* Pass the packet up to the protocol layers */
+   net_process_received_packet
+   (net_rx_packets[rx_new], length - 4);
}
 
-   /* Change buffer ownership for this frame, back
-* to the adapter.
+   /*
+* Change buffer ownership for this frame,
+* back to the adapter.
 */
rx_ring[rx_new].status = cpu_to_le32(R_OWN);
}
 
-   /* Update entry information.
-*/
+   /* Update entry information. */
rx_new = (rx_new + 1) % rxRingSize;
}
 
-- 
2.25.1



[PATCH 02/11] net: dc2114x: Clean up dc21x4x_send()

2020-04-18 Thread Marek Vasut
Clean up the driver send code to bring it up to standards with
U-Boot coding style, invert the loops where applicable to cut
down the level of indent. No functional change.

Signed-off-by: Marek Vasut 
Cc: Joe Hershberger 
---
 drivers/net/dc2114x.c | 42 --
 1 file changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index d302d0362a..11ebea9c1a 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -304,47 +304,45 @@ static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
 
 static int dc21x4x_send(struct eth_device *dev, void *packet, int length)
 {
-   int status = -1;
-   int i;
+   int status = -1;
+   int i;
 
if (length <= 0) {
printf("%s: bad packet size: %d\n", dev->name, length);
-   goto Done;
+   goto done;
}
 
-   for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-   if (i >= TOUT_LOOP) {
-   printf("%s: tx error buffer not ready\n", dev->name);
-   goto Done;
-   }
+   for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+   if (i < TOUT_LOOP)
+   continue;
+
+   printf("%s: tx error buffer not ready\n", dev->name);
+   goto done;
}
 
-   tx_ring[tx_new].buf= cpu_to_le32(phys_to_bus((u32) packet));
-   tx_ring[tx_new].des1   = cpu_to_le32(TD_TER | TD_LS | TD_FS | length);
+   tx_ring[tx_new].buf = cpu_to_le32(phys_to_bus((u32)packet));
+   tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_LS | TD_FS | length);
tx_ring[tx_new].status = cpu_to_le32(T_OWN);
 
OUTL(dev, POLL_DEMAND, DE4X5_TPD);
 
-   for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-   if (i >= TOUT_LOOP) {
-   printf(".%s: tx buffer not ready\n", dev->name);
-   goto Done;
-   }
+   for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+   if (i < TOUT_LOOP)
+   continue;
+
+   printf(".%s: tx buffer not ready\n", dev->name);
+   goto done;
}
 
if (le32_to_cpu(tx_ring[tx_new].status) & TD_ES) {
-#if 0 /* test-only */
-   printf("TX error status = 0x%08X\n",
-   le32_to_cpu(tx_ring[tx_new].status));
-#endif
tx_ring[tx_new].status = 0x0;
-   goto Done;
+   goto done;
}
 
status = length;
 
- Done:
-tx_new = (tx_new+1) % NUM_TX_DESC;
+done:
+   tx_new = (tx_new + 1) % NUM_TX_DESC;
return status;
 }
 
-- 
2.25.1



Re: [PATCH v1 1/2] arm: mvebu: correct SPL boot configs for SPI/MMC

2020-04-18 Thread Joel Johnson

On 2020-04-18 08:23, Dennis Gilmore wrote:

On Sat, Apr 18, 2020 at 9:18 AM Dennis Gilmore
 wrote:


On Fri, Apr 17, 2020 at 2:19 AM Joel Johnson  wrote:
>
> Update mvebu SPL boot selection mechanism for the move to driver model
> usage by ensuring that the required driver support for SPI and MMC
> booting is available in SPL when the respective boot method is
> selected.
>
> Previously, all mvebu boards selected a boot method (implicitly
> MVEBU_SPL_BOOT_DEVICE_SPI for many) even if SPL booting wasn't used.
> This changes mvebu boot method selection to depend on SPL usage which
> resolves the issue with aarch64 boards which don't use SPL getting an
> implicit boot device selection resulting in unmet dependencies. The
> 32-bit arm boards do use SPL, but I'm led to conclude that most aren't
> intentionally using the MVEBU_SPL_BOOT_DEVICE selection since none have
> SPL_DM_SPI enabled in their defconfig even though they still implicitly
> select the SPI boot method.
>
> This also results in the new addition of SPL_GPIO_SUPPORT to helios4.
> The mainline dts for helios4 includes the cd-gpios entry for sdhci with
> identical addresses as the clearfog dts. I don't have a helios4 board
> to confirm, but based on the current source conclude that the board
> itself is either wired to pull the signal low for eMMC, or the default
> MMC boot isn't fully functional in mainline. In either case, as far as
> I can tell, including the GPIO support will at least cause no
> regression.

Currently, SPL does not find u-boot.bin on the helios4, I am working
on syncing all of the changes done to clearfog to the helios4,
generally speaking, any change made to clearfog needs to also, be made
for the helios4 as they have the same SOM. the differences being in
changes for the carrier board.

Dennis


Great, thanks for the update and confirmation!

Stefan - in this case, I'd encourage that only the first commit of this 
series be merged and drop the second patch entirely.


Joel


[PATCH v6 5/6] riscv: Copy the reserved-memory nodes to final DT

2020-04-18 Thread Atish Patra
The DT used by U-Boot may be different from the DT being passed to
the OS if the DT is loaded from external media such as network or
mmc. In that case, the reserved-memory node needs to be copied to
the DT passed to the OS.

Signed-off-by: Atish Patra 
Reviewed-by: Bin Meng 
---
 arch/riscv/lib/bootm.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 87cadad5016d..8ff8db6bf533 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -28,8 +28,8 @@ __weak void board_quiesce_devices(void)
 
 int arch_fixup_fdt(void *blob)
 {
-#ifdef CONFIG_EFI_LOADER
int err;
+#ifdef CONFIG_EFI_LOADER
u32 size;
int chosen_offset;
 
@@ -50,6 +50,12 @@ int arch_fixup_fdt(void *blob)
/* Overwrite the boot-hartid as U-Boot is the last stage BL */
fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
 #endif
+
+   /* Copy the reserved-memory node to the DT used by OS */
+   err = riscv_fdt_copy_resv_mem_node(gd->fdt_blob, blob);
+   if (err < 0)
+   return err;
+
return 0;
 }
 
-- 
2.25.1



[PATCH v6 3/6] riscv: Provide a mechanism to fix DT for reserved memory

2020-04-18 Thread Atish Patra
In RISC-V, M-mode software can reserve physical memory regions
by setting appropriate physical memory protection (PMP) csr. As the
PMP csr are accessible only in M-mode, S-mode U-Boot can not read
this configuration directly. However, M-mode software can pass this
information via reserved-memory node in device tree so that S-mode
software can access this information.

This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.

Signed-off-by: Atish Patra 
Reviewed-by: Bin Meng 
---
 arch/riscv/cpu/start.S|   1 +
 arch/riscv/include/asm/global_data.h  |   1 +
 arch/riscv/include/asm/u-boot-riscv.h |   2 +
 arch/riscv/lib/Makefile   |   1 +
 arch/riscv/lib/asm-offsets.c  |   1 +
 arch/riscv/lib/fdt_fixup.c| 102 ++
 6 files changed, 108 insertions(+)
 create mode 100644 arch/riscv/lib/fdt_fixup.c

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 6b3ff99c3882..0282685c2906 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -121,6 +121,7 @@ call_board_init_f_0:
 
jal board_init_f_init_reserve
 
+   SREGs1, GD_FIRMWARE_FDT_ADDR(gp)
/* save the boot hart id to global_data */
SREGtp, GD_BOOT_HART(gp)
 
diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index b74bd7e738bb..51ac8d1c98e2 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -15,6 +15,7 @@
 /* Architecture-specific global data */
 struct arch_global_data {
long boot_hart; /* boot hart id */
+   phys_addr_t firmware_fdt_addr;
 #ifdef CONFIG_SIFIVE_CLINT
void __iomem *clint;/* clint base address */
 #endif
diff --git a/arch/riscv/include/asm/u-boot-riscv.h 
b/arch/riscv/include/asm/u-boot-riscv.h
index 49febd588102..543a1688db8f 100644
--- a/arch/riscv/include/asm/u-boot-riscv.h
+++ b/arch/riscv/include/asm/u-boot-riscv.h
@@ -17,5 +17,7 @@ int cleanup_before_linux(void);
 /* board/.../... */
 int board_init(void);
 void board_quiesce_devices(void);
+int riscv_board_reserved_mem_fixup(void *fdt);
+int riscv_fdt_copy_resv_mem_node(const void *src_fdt, void *dest_fdt);
 
 #endif /* _U_BOOT_RISCV_H_ */
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index adadbf4bcbef..d132b59ce32c 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -24,6 +24,7 @@ obj-y += reset.o
 obj-y   += setjmp.o
 obj-$(CONFIG_SMP) += smp.o
 obj-$(CONFIG_SPL_BUILD)+= spl.o
+obj-y   += fdt_fixup.o
 
 # For building EFI apps
 CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI)
diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
index 4fa4fd371473..7301c1b98e23 100644
--- a/arch/riscv/lib/asm-offsets.c
+++ b/arch/riscv/lib/asm-offsets.c
@@ -14,6 +14,7 @@
 int main(void)
 {
DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
+   DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, arch.firmware_fdt_addr));
 #ifndef CONFIG_XIP
DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
 #endif
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
new file mode 100644
index ..1fce41490973
--- /dev/null
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates
+ *
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * riscv_fdt_copy_resv_mem_node() - Copy reserve memory node entry
+ * @src: Pointer to the source device tree from which reserved memory node
+ *  needs to be copied.
+ * @dst: Pointer to the destination device tree to which reserved memory node
+ *  needs to be copied.
+ *
+ * Return: 0 on success or if source doesn't have reserved memory node.
+ *Error if copy process failed.
+ */
+int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
+{
+   u32 phandle;
+   struct fdt_memory pmp_mem;
+   fdt_addr_t addr;
+   fdt_size_t size;
+   int offset, node, err, rmem_offset;
+   bool nomap = true;
+   char basename[32] = {0};
+   int bname_len;
+   int max_len = sizeof(basename);
+   const char *name;
+   char *temp;
+
+   offset = fdt_path_offset(src, "/reserved-memory");
+   if (offset < 0) {
+   printf("No reserved memory region found in source FDT\n");
+   return 0;
+   }
+
+   fdt_for_each_subnode(node, src, offset) {
+   name = fdt_get_name(src, node, NULL);
+
+   addr = fdtdec_get_addr_size_auto_noparent(src, node,
+ "reg", 0, ,
+ false);
+   if (addr == FDT_ADDR_T_NONE) {
+   debug("failed to read address/size for 

[PATCH v6 6/6] riscv: Move all fdt fixups together

2020-04-18 Thread Atish Patra
Keep all the fdt fixups together for better code management.

Signed-off-by: Atish Patra 
Reviewed-by: Bin Meng 
---
 arch/riscv/lib/bootm.c | 33 -
 arch/riscv/lib/fdt_fixup.c | 33 +
 2 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 8ff8db6bf533..0d06095da11a 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -26,39 +26,6 @@ __weak void board_quiesce_devices(void)
 {
 }
 
-int arch_fixup_fdt(void *blob)
-{
-   int err;
-#ifdef CONFIG_EFI_LOADER
-   u32 size;
-   int chosen_offset;
-
-   size = fdt_totalsize(blob);
-   err  = fdt_open_into(blob, blob, size + 32);
-   if (err < 0) {
-   printf("Device Tree can't be expanded to accommodate new node");
-   return err;
-   }
-   chosen_offset = fdt_path_offset(blob, "/chosen");
-   if (chosen_offset < 0) {
-   err = fdt_add_subnode(blob, 0, "chosen");
-   if (err < 0) {
-   printf("chosen node can not be added\n");
-   return err;
-   }
-   }
-   /* Overwrite the boot-hartid as U-Boot is the last stage BL */
-   fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
-#endif
-
-   /* Copy the reserved-memory node to the DT used by OS */
-   err = riscv_fdt_copy_resv_mem_node(gd->fdt_blob, blob);
-   if (err < 0)
-   return err;
-
-   return 0;
-}
-
 /**
  * announce_and_cleanup() - Print message and prepare for kernel boot
  *
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index af12e484db9b..20e0759f135b 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -115,3 +115,36 @@ int board_fix_fdt(void *fdt)
return 0;
 }
 #endif
+
+int arch_fixup_fdt(void *blob)
+{
+   int err;
+#ifdef CONFIG_EFI_LOADER
+   u32 size;
+   int chosen_offset;
+
+   size = fdt_totalsize(blob);
+   err  = fdt_open_into(blob, blob, size + 32);
+   if (err < 0) {
+   printf("Device Tree can't be expanded to accommodate new node");
+   return err;
+   }
+   chosen_offset = fdt_path_offset(blob, "/chosen");
+   if (chosen_offset < 0) {
+   err = fdt_add_subnode(blob, 0, "chosen");
+   if (err < 0) {
+   printf("chosen node can not be added\n");
+   return err;
+   }
+   }
+   /* Overwrite the boot-hartid as U-Boot is the last stage BL */
+   fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
+#endif
+
+   /* Copy the reserved-memory node to the DT used by OS */
+   err = riscv_fdt_copy_resv_mem_node(gd->fdt_blob, blob);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
-- 
2.25.1



[PATCH v6 0/6] RISC-V DT related fixes for reserved memory & UEFI

2020-04-18 Thread Atish Patra
This series adds few DT related fixes required for Linux EFI stub to work
on RISC-V.

Patch 1 adds the boot hartid property under /chosen node. The related
discussion can be found here.

https://patchwork.ozlabs.org/patch/1233664/
https://lists.denx.de/pipermail/u-boot/2020-March/402085.html

Patch 2 fixes a generic issue in fdtdec related to reserved memory node.

Patch 3,4,5 provide one of the option to update reserved-memory node for next
stage. It depends on master OpenSBI branch.

The other options are SBI extension and trap/emulate on PMP csr access.
The detaild discussion can be found here.
https://github.com/riscv/riscv-sbi-doc/pull/37

Patch 1 & 2 can be applied independently from 3 and 4. I want to keep all
the patches together to provide a holistic view of changes required for
RISC-V UEFI.

Changes from v5->v6:
1. Fixed typos in commit message and added reviewed-by tags.

Changes from v4->v5:
1. Added comments for new functions.

Changes from v3->v4:
1. Dropped generic efi fix patch as it is already merged.
2. Moved all the fdt fixups to a common file.
3. Addressed few nit comments.

Changes from v2->v3:
1. Update the DT meant for OS if it is different from the one used by U-Boot
2. Use different FDT api to obtain "reg" address & size to honor the cell count.

Changes from v1->v2:
1. Fix the issue if chosen node is not present.

Changes from previous version:
1. Renamed the DT node property to "boot-hartid" from "efi-boot-hartid".
2. Changed the property type to u32 instead of u64 for RV32 compatibility.

Atish Patra (6):
riscv: Add boot hartid to device tree
fdtdec: Fix boundary check
riscv: Provide a mechanism to fix DT for reserved memory
riscv: Setup reserved-memory node for FU540
riscv: Copy the reserved-memory nodes to final DT
riscv: Move all fdt fixups together

arch/riscv/cpu/start.S|   1 +
arch/riscv/include/asm/global_data.h  |   1 +
arch/riscv/include/asm/u-boot-riscv.h |   2 +
arch/riscv/lib/Makefile   |   1 +
arch/riscv/lib/asm-offsets.c  |   1 +
arch/riscv/lib/bootm.c|   5 -
arch/riscv/lib/fdt_fixup.c| 150 ++
configs/sifive_fu540_defconfig|   1 +
lib/fdtdec.c  |   3 +-
9 files changed, 159 insertions(+), 6 deletions(-)
create mode 100644 arch/riscv/lib/fdt_fixup.c

--
2.25.1



[PATCH v6 2/6] fdtdec: Fix boundary check

2020-04-18 Thread Atish Patra
In U-Boot, the reserved memory end address is considered as a inclusive
address. This notion is followed while adding a reserved memory node to
the DT.

For example:
end_address = start_address + size - 1

Follow the same notion and fix the end address computation while checking
for existing nodes.

Signed-off-by: Atish Patra 
Reviewed-by: Bin Meng 
---
 lib/fdtdec.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index eb11fc898e30..07ba9f5c97e9 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1311,7 +1311,8 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
continue;
}
 
-   if (addr == carveout->start && (addr + size) == carveout->end) {
+   if (addr == carveout->start && (addr + size - 1) ==
+   carveout->end) {
if (phandlep)
*phandlep = fdt_get_phandle(blob, node);
return 0;
-- 
2.25.1



[PATCH v6 4/6] riscv: Setup reserved-memory node for FU540

2020-04-18 Thread Atish Patra
FU540 uses OF_SEPARATE instead of OF_PRIOR_STAGE.

Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.

Signed-off-by: Atish Patra 
Reviewed-by: Bin Meng 
---
 arch/riscv/lib/fdt_fixup.c | 15 +++
 configs/sifive_fu540_defconfig |  1 +
 2 files changed, 16 insertions(+)

diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index 1fce41490973..af12e484db9b 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -100,3 +100,18 @@ int riscv_board_reserved_mem_fixup(void *fdt)
 
return 0;
 }
+
+#ifdef CONFIG_OF_BOARD_FIXUP
+int board_fix_fdt(void *fdt)
+{
+   int err;
+
+   err = riscv_board_reserved_mem_fixup(fdt);
+   if (err < 0) {
+   printf("failed to fixup DT for reserved memory: %d\n", err);
+   return err;
+   }
+
+   return 0;
+}
+#endif
diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
index 6d61e6c960ee..f805aacc7afd 100644
--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
@@ -9,6 +9,7 @@ CONFIG_FIT=y
 CONFIG_MISC_INIT_R=y
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_OF_BOARD_FIXUP=y
 CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
-- 
2.25.1



[PATCH v6 1/6] riscv: Add boot hartid to device tree

2020-04-18 Thread Atish Patra
Linux booting protocol mandates that register "a0" contains the hartid.
However, U-Boot can not pass the hartid via a0 during via standard UEFI
protocol. DT nodes are commonly used to pass such information to the OS.

Add a DT node under chosen node to indicate the boot hartid. EFI stub
in Linux kernel will parse this node and pass it to the real kernel
in "a0" before jumping to it.

Signed-off-by: Atish Patra 
Reviewed-by: Rick Chen 
Reviewed-by: Bin Meng 
Tested-by: Heinrich Schuchardt 
---
 arch/riscv/lib/bootm.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index fad16901c5f2..87cadad5016d 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -28,6 +28,28 @@ __weak void board_quiesce_devices(void)
 
 int arch_fixup_fdt(void *blob)
 {
+#ifdef CONFIG_EFI_LOADER
+   int err;
+   u32 size;
+   int chosen_offset;
+
+   size = fdt_totalsize(blob);
+   err  = fdt_open_into(blob, blob, size + 32);
+   if (err < 0) {
+   printf("Device Tree can't be expanded to accommodate new node");
+   return err;
+   }
+   chosen_offset = fdt_path_offset(blob, "/chosen");
+   if (chosen_offset < 0) {
+   err = fdt_add_subnode(blob, 0, "chosen");
+   if (err < 0) {
+   printf("chosen node can not be added\n");
+   return err;
+   }
+   }
+   /* Overwrite the boot-hartid as U-Boot is the last stage BL */
+   fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
+#endif
return 0;
 }
 
-- 
2.25.1



Re: [PATCH 0/5] i.MXRT1020 add basic support

2020-04-18 Thread Giulio Benetti

On 4/18/20 2:57 PM, Stefano Babic wrote:

Hi Giulio,

On 18/04/20 14:32, Giulio Benetti wrote:

Hi Stefano,

I ping you for reviewing this patchset, Lukasz already reviewed his
patches, so it should be ready to be committed.



Yes, I have already merge the big series after Anatolji's ACK, this
series was not yet in. I merged into -next and I restart my Travis' job.


Ok, thank you very much

Best regards
--
Giulio Benetti
Benetti Engineering sas


RE: [PATCH v2] riscv: ax25: cache: Remove SPL_RISCV_MMODE config check

2020-04-18 Thread Pragnesh Patel
Any comments on this patch ?

>-Original Message-
>From: Pragnesh Patel 
>Sent: 14 March 2020 19:13
>To: u-boot@lists.denx.de
>Cc: atish.pa...@wdc.com; palmerdabb...@google.com;
>bmeng...@gmail.com; Paul Walmsley ;
>r...@andestech.com; Pragnesh Patel ; Simon
>Glass ; Trevor Woerner 
>Subject: [PATCH v2] riscv: ax25: cache: Remove SPL_RISCV_MMODE config
>check
>
>CONFIG_IS_ENABLED(FOO) will check FOO config option for U-Boot, SPL and
>TPL, so remove unnecessary CONFIG_IS_ENABLED()
>
>Signed-off-by: Pragnesh Patel 
>Reviewed-by: Bin Meng 
>---
> arch/riscv/cpu/ax25/cache.c | 16 
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
>diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/ax25/cache.c index
>9f424198b4..9df629d23c 100644
>--- a/arch/riscv/cpu/ax25/cache.c
>+++ b/arch/riscv/cpu/ax25/cache.c
>@@ -12,7 +12,7 @@
> #include 
>
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
> /* mcctlcommand */
> #define CCTL_REG_MCCTLCOMMAND_NUM 0x7cc
>
>@@ -47,7 +47,7 @@ void flush_dcache_all(void)  {  #if
>!CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
>   csr_write(CCTL_REG_MCCTLCOMMAND_NUM,
>CCTL_L1D_WBINVAL_ALL);  #endif  #endif @@ -68,7 +68,7 @@ void
>icache_enable(void)  {  #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
>   asm volatile (
>   "csrr t1, mcache_ctl\n\t"
>   "ori t0, t1, 0x1\n\t"
>@@ -83,7 +83,7 @@ void icache_disable(void)  {  #if
>!CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
>   asm volatile (
>   "fence.i\n\t"
>   "csrr t1, mcache_ctl\n\t"
>@@ -99,7 +99,7 @@ void dcache_enable(void)  {  #if
>!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
>   asm volatile (
>   "csrr t1, mcache_ctl\n\t"
>   "ori t0, t1, 0x2\n\t"
>@@ -117,7 +117,7 @@ void dcache_disable(void)  {  #if
>!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
>   csr_write(CCTL_REG_MCCTLCOMMAND_NUM,
>CCTL_L1D_WBINVAL_ALL);
>   asm volatile (
>   "csrr t1, mcache_ctl\n\t"
>@@ -137,7 +137,7 @@ int icache_status(void)
>   int ret = 0;
>
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
>   asm volatile (
>   "csrr t1, mcache_ctl\n\t"
>   "andi   %0, t1, 0x01\n\t"
>@@ -156,7 +156,7 @@ int dcache_status(void)
>   int ret = 0;
>
> #ifdef CONFIG_RISCV_NDS_CACHE
>-#if CONFIG_IS_ENABLED(RISCV_MMODE) ||
>CONFIG_IS_ENABLED(SPL_RISCV_MMODE)
>+#if CONFIG_IS_ENABLED(RISCV_MMODE)
>   asm volatile (
>   "csrr t1, mcache_ctl\n\t"
>   "andi   %0, t1, 0x02\n\t"
>--
>2.17.1



Re: [PATCH v1 1/2] arm: mvebu: correct SPL boot configs for SPI/MMC

2020-04-18 Thread Dennis Gilmore
resending from a different email address as Gmail rejected my first
attempt to send

On Sat, Apr 18, 2020 at 9:18 AM Dennis Gilmore
 wrote:
>
> On Fri, Apr 17, 2020 at 2:19 AM Joel Johnson  wrote:
> >
> > Update mvebu SPL boot selection mechanism for the move to driver model
> > usage by ensuring that the required driver support for SPI and MMC
> > booting is available in SPL when the respective boot method is
> > selected.
> >
> > Previously, all mvebu boards selected a boot method (implicitly
> > MVEBU_SPL_BOOT_DEVICE_SPI for many) even if SPL booting wasn't used.
> > This changes mvebu boot method selection to depend on SPL usage which
> > resolves the issue with aarch64 boards which don't use SPL getting an
> > implicit boot device selection resulting in unmet dependencies. The
> > 32-bit arm boards do use SPL, but I'm led to conclude that most aren't
> > intentionally using the MVEBU_SPL_BOOT_DEVICE selection since none have
> > SPL_DM_SPI enabled in their defconfig even though they still implicitly
> > select the SPI boot method.
> >
> > This also results in the new addition of SPL_GPIO_SUPPORT to helios4.
> > The mainline dts for helios4 includes the cd-gpios entry for sdhci with
> > identical addresses as the clearfog dts. I don't have a helios4 board
> > to confirm, but based on the current source conclude that the board
> > itself is either wired to pull the signal low for eMMC, or the default
> > MMC boot isn't fully functional in mainline. In either case, as far as
> > I can tell, including the GPIO support will at least cause no
> > regression.
>
> Currently, SPL does not find u-boot.bin on the helios4, I am working
> on syncing all of the changes done to clearfog to the helios4,
> generally speaking, any change made to clearfog needs to also, be made
> for the helios4 as they have the same SOM. the differences being in
> changes for the carrier board.
>
> Dennis
>
> > Tested on SolidRun ClearFog devices.
> >
> > Signed-off-by: Joel Johnson 
> >
> > ---
> >
> > This patch unifies two patches from a prior ClearFog specific series
> > which caused issues when building for most other mvebu boards. Now
> > build and config diff tested for all arm and aarch64 mvebu boards!
> >
> > The only substantive changes end up being the SPL dependency for boot
> > selection, along with defconfig cleanups with Kconfig consolidated
> > boot dependent values.
> >
> > The superfluous addition of SPL_MTD_SUPPORT present in the prior patch
> > for SPI booting was also removed.
> >
> > ---
> >  arch/arm/mach-mvebu/Kconfig | 12 
> >  configs/clearfog_defconfig  |  3 ---
> >  configs/controlcenterdc_defconfig   |  4 
> >  configs/db-88f6720_defconfig|  4 
> >  configs/db-88f6820-amc_defconfig|  4 
> >  configs/db-88f6820-gp_defconfig |  4 
> >  configs/db-mv784mp-gp_defconfig |  3 ---
> >  configs/ds414_defconfig |  3 ---
> >  configs/helios4_defconfig   |  1 -
> >  configs/maxbcm_defconfig|  3 ---
> >  configs/theadorable_debug_defconfig |  3 ---
> >  configs/turris_omnia_defconfig  |  4 
> >  configs/x530_defconfig  |  4 
> >  include/configs/helios4.h   |  5 -
> >  14 files changed, 12 insertions(+), 45 deletions(-)
> >
> > diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
> > index 161dee937f..645990b3ef 100644
> > --- a/arch/arm/mach-mvebu/Kconfig
> > +++ b/arch/arm/mach-mvebu/Kconfig
> > @@ -232,13 +232,25 @@ config SYS_SOC
> >
> >  choice
> > prompt "Boot method"
> > +   depends on SPL
> >
> >  config MVEBU_SPL_BOOT_DEVICE_SPI
> > bool "SPI NOR flash"
> > +   imply ENV_IS_IN_SPI_FLASH
> > +   select SPL_DM_SPI
> > +   select SPL_SPI_FLASH_SUPPORT
> > +   select SPL_SPI_LOAD
> > +   select SPL_SPI_SUPPORT
> >
> >  config MVEBU_SPL_BOOT_DEVICE_MMC
> > bool "SDIO/MMC card"
> > +   imply ENV_IS_IN_MMC
> > +   # GPIO needed for eMMC/SD card presence detection
> > +   select SPL_DM_GPIO
> > +   select SPL_DM_MMC
> > +   select SPL_GPIO_SUPPORT
> > select SPL_LIBDISK_SUPPORT
> > +   select SPL_MMC_SUPPORT
> >
> >  config MVEBU_SPL_BOOT_DEVICE_SATA
> > bool "SATA"
> > diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
> > index 6db8b8acf6..ada35cb53b 100644
> > --- a/configs/clearfog_defconfig
> > +++ b/configs/clearfog_defconfig
> > @@ -3,14 +3,12 @@ CONFIG_ARCH_CPU_INIT=y
> >  CONFIG_SYS_THUMB_BUILD=y
> >  CONFIG_ARCH_MVEBU=y
> >  CONFIG_SYS_TEXT_BASE=0x0080
> > -CONFIG_SPL_GPIO_SUPPORT=y
> >  CONFIG_SPL_LIBCOMMON_SUPPORT=y
> >  CONFIG_SPL_LIBGENERIC_SUPPORT=y
> >  CONFIG_SYS_MALLOC_F_LEN=0x2000
> >  CONFIG_TARGET_CLEARFOG=y
> >  CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
> >  CONFIG_DM_GPIO=y
> > -CONFIG_SPL_MMC_SUPPORT=y
> >  CONFIG_SPL_SERIAL_SUPPORT=y
> >  CONFIG_NR_DRAM_BANKS=2
> >  CONFIG_SPL=y
> > @@ -42,7 +40,6 @@ CONFIG_CMD_CACHE=y
> >  CONFIG_CMD_TIME=y
> 

Re: [PATCH 0/5] i.MXRT1020 add basic support

2020-04-18 Thread Stefano Babic
Hi Giulio,

On 18/04/20 14:32, Giulio Benetti wrote:
> Hi Stefano,
> 
> I ping you for reviewing this patchset, Lukasz already reviewed his
> patches, so it should be ready to be committed.
> 

Yes, I have already merge the big series after Anatolji's ACK, this
series was not yet in. I merged into -next and I restart my Travis' job.

Best regards,
Stefano

> Thank you

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


Re: [PATCH v2 3/3] kbuild: SPL/TPL: generate separate asm-offsets.h for SPL and TPL

2020-04-18 Thread Bin Meng
On Fri, Apr 17, 2020 at 3:22 PM Masahiro Yamada  wrote:
>
> Currently generic-asm-offsets.h and asm-offsets.h are generated based
> on U-Boot proper config options. The same asm-offsets headers are used
> for building U-Boot SPL/TPL, which causes potential offset mismatch if
> U-Boot proper has different config options from U-Boot SPL/TPL.
>
> This commit adds:
>   spl/include/generated/(generic-)asm-offsets.h
>   tpl/include/generated/(generic-)asm-offsets.h
>
> spl/include/generated/(generic-)asm-offsets.h is generated if
> CONFIG_SPL=y, and included when building SPL.
>
> tpl/include/generated/(generic-)asm-offsets.h is generated if
> CONFIG_TPL=y, and included when building TPL.
>
> They are created before Kbuild descends into SPL/TPL object directories
> and builds $(obj)/dts/dt-platdata.o because $(obj)/dts/dt-platdata.c
> includes a bunch of headers.
>
> Prepend -I$(obj)/include to $(UBOOTINCLUDE) so (generic-)asm-offsets.h
> is searched in {spl,tpl}/include/generated/.
>
> Requested-by: Bin Meng 
> Signed-off-by: Masahiro Yamada 
> ---
>
> Changes in v2: None
>
>  Kbuild   |  4 ++--
>  scripts/Makefile.spl | 10 --
>  2 files changed, 10 insertions(+), 4 deletions(-)
>

It works like a charm. Thanks!

Tested-by: Bin Meng 


Re: [PATCH 0/5] i.MXRT1020 add basic support

2020-04-18 Thread Giulio Benetti

Hi Stefano,

I ping you for reviewing this patchset, Lukasz already reviewed his
patches, so it should be ready to be committed.

Thank you
--
Giulio Benetti
Benetti Engineering sas

On 2/18/20 8:02 PM, Giulio Benetti wrote:

Add Soc i.MXRT1020 to i.MXRT family and its evk support.
This Soc has many in common with i.MXRT1050 except clock init and pins
listing.

Giulio Benetti (5):
   clk: imx: add i.IMXRT1020 clk driver
   Add i.MXRT1020 support
   ARM: dts: imxrt1020: add dtsi file
   dt-bindings: pinctrl: add i.MXRT1020 pins definition
   Add support for i.MXRT1020-EVK board

  arch/arm/dts/Makefile |   3 +-
  arch/arm/dts/imxrt1020-evk-u-boot.dtsi|  44 +
  arch/arm/dts/imxrt1020-evk.dts| 198 +
  arch/arm/dts/imxrt1020.dtsi   | 133 +++
  arch/arm/mach-imx/imxrt/Kconfig   |   9 +
  board/freescale/imxrt1020-evk/Kconfig |  22 +
  board/freescale/imxrt1020-evk/MAINTAINERS |   6 +
  board/freescale/imxrt1020-evk/Makefile|   6 +
  board/freescale/imxrt1020-evk/README  |  31 +
  board/freescale/imxrt1020-evk/imximage.cfg|  36 +
  board/freescale/imxrt1020-evk/imxrt1020-evk.c |  81 ++
  configs/imxrt1020-evk_defconfig   |  67 ++
  drivers/clk/imx/Kconfig   |  16 +
  drivers/clk/imx/Makefile  |   1 +
  drivers/clk/imx/clk-imxrt1020.c   | 227 ++
  include/configs/imxrt1020-evk.h   |  46 ++
  include/dt-bindings/clock/imxrt1020-clock.h   |  52 ++
  include/dt-bindings/pinctrl/pins-imxrt1020.h  | 763 ++
  18 files changed, 1740 insertions(+), 1 deletion(-)
  create mode 100644 arch/arm/dts/imxrt1020-evk-u-boot.dtsi
  create mode 100644 arch/arm/dts/imxrt1020-evk.dts
  create mode 100644 arch/arm/dts/imxrt1020.dtsi
  create mode 100644 board/freescale/imxrt1020-evk/Kconfig
  create mode 100644 board/freescale/imxrt1020-evk/MAINTAINERS
  create mode 100644 board/freescale/imxrt1020-evk/Makefile
  create mode 100644 board/freescale/imxrt1020-evk/README
  create mode 100644 board/freescale/imxrt1020-evk/imximage.cfg
  create mode 100644 board/freescale/imxrt1020-evk/imxrt1020-evk.c
  create mode 100644 configs/imxrt1020-evk_defconfig
  create mode 100644 drivers/clk/imx/clk-imxrt1020.c
  create mode 100644 include/configs/imxrt1020-evk.h
  create mode 100644 include/dt-bindings/clock/imxrt1020-clock.h
  create mode 100644 include/dt-bindings/pinctrl/pins-imxrt1020.h





Re: [RESEND PATCH v5 3/6] riscv: Provide a mechanism to fix DT for reserved memory

2020-04-18 Thread Bin Meng
On Sat, Apr 18, 2020 at 2:10 PM Atish Patra  wrote:
>
> In RISC-V, M-mode software can reserve physical memory regions
> by setting appropriate physical memory protection (PMP) csr. As the
> PMP csr are accessible only in M-mode, S-mode U-Boot can not read
> this configuration directly. However, M-mode software can pass this
> information via reserved-memory node in device tree so that S-mode
> software can access this information.
>
> This patch provides a framework to copy to the reserved-memory node
> from one DT to another. This will be used to update the DT used by
> U-Boot and the DT passed to the next stage OS.
>
> Signed-off-by: Atish Patra 
> ---
>  arch/riscv/cpu/start.S|   1 +
>  arch/riscv/include/asm/global_data.h  |   1 +
>  arch/riscv/include/asm/u-boot-riscv.h |   2 +
>  arch/riscv/lib/Makefile   |   1 +
>  arch/riscv/lib/asm-offsets.c  |   1 +
>  arch/riscv/lib/fdt_fixup.c| 102 ++
>  6 files changed, 108 insertions(+)
>  create mode 100644 arch/riscv/lib/fdt_fixup.c
>

Reviewed-by: Bin Meng 


Re: [RESEND PATCH v5 1/6] riscv: Add boot hartid to Device tree

2020-04-18 Thread Bin Meng
On Sat, Apr 18, 2020 at 2:10 PM Atish Patra  wrote:
>

nits: Device => device in the commit title

> Linux booting protocol mandates that register "a0" contains the hartid.
> However, U-boot can not pass the hartid via a0 during via standard UEFI

nits: U-boot => U-Boot

> protocol. DT nodes are commonly used to pass such information to the OS.
>
> Add a DT node under chosen node to indicate the boot hartid. EFI stub
> in Linux kernel will parse this node and pass it to the real kernel
> in "a0" before jumping to it.
>
> Signed-off-by: Atish Patra 
> Reviewed-by: Rick Chen 
> Tested-by: Heinrich Schuchardt 
> ---
>  arch/riscv/lib/bootm.c | 22 ++
>  1 file changed, 22 insertions(+)
>

Reviewed-by: Bin Meng 


Re: [RESEND PATCH v5 4/6] riscv: Setup reserved-memory node for FU540

2020-04-18 Thread Bin Meng
On Sat, Apr 18, 2020 at 2:10 PM Atish Patra  wrote:
>
> FU540 uses OF_SEPARATE instead of OF_PRIOR.

Should be OF_PRIOR_STAGE

>
> Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.
>
> Signed-off-by: Atish Patra 
> ---
>  arch/riscv/lib/fdt_fixup.c | 15 +++
>  configs/sifive_fu540_defconfig |  1 +
>  2 files changed, 16 insertions(+)
>
> diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
> index 1fce41490973..af12e484db9b 100644
> --- a/arch/riscv/lib/fdt_fixup.c
> +++ b/arch/riscv/lib/fdt_fixup.c
> @@ -100,3 +100,18 @@ int riscv_board_reserved_mem_fixup(void *fdt)
>
> return 0;
>  }
> +
> +#ifdef CONFIG_OF_BOARD_FIXUP
> +int board_fix_fdt(void *fdt)
> +{
> +   int err;
> +
> +   err = riscv_board_reserved_mem_fixup(fdt);
> +   if (err < 0) {
> +   printf("failed to fixup DT for reserved memory: %d\n", err);
> +   return err;
> +   }
> +
> +   return 0;
> +}
> +#endif
> diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
> index 6d61e6c960ee..8fb3794cd578 100644
> --- a/configs/sifive_fu540_defconfig
> +++ b/configs/sifive_fu540_defconfig
> @@ -12,3 +12,4 @@ CONFIG_DISPLAY_BOARDINFO=y
>  CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_DM_MTD=y
> +CONFIG_OF_BOARD_FIXUP=y

This should be inserted before CONFIG_DEFAULT_DEVICE_TREE

> --

Other than above:
Reviewed-by: Bin Meng 

Regards,
Bin


Re: [RESEND PATCH v5 2/6] fdtdec: Fix boundary check

2020-04-18 Thread Bin Meng
On Sat, Apr 18, 2020 at 2:10 PM Atish Patra  wrote:
>
> In U-Boot, the reserved memory end address is considered as a inclusive
> address. This notion is followed while adding a reserved memory node to
> the DT.
>
> For example:
> end_address = start_address + size - 1
>
> Follow the same notion and fix the end address computation while checking
> for existing nodes.
>
> Signed-off-by: Atish Patra 
> ---
>  lib/fdtdec.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 


[PATCH] test: make tests should use pytest -ra

2020-04-18 Thread Heinrich Schuchardt
By passing -ra to pytest we get a summary indicating which tests failed
and why tests were skipped.

Here is an example output:

 short test summary info =
SKIPPED [1] test/py/tests/test_efi_loader.py:81: No DHCP server available
SKIPPED [1] test/py/tests/test_efi_loader.py:100: No static network
configuration is defined
SKIPPED [2] test/py/tests/test_efi_loader.py:115: Network not initialized

Signed-off-by: Heinrich Schuchardt 
---
 test/run | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/test/run b/test/run
index d635622c10..67d51d75f7 100755
--- a/test/run
+++ b/test/run
@@ -19,17 +19,17 @@ run_test() {
 failures=0

 # Run all tests that the standard sandbox build can support
-run_test "sandbox" ./test/py/test.py --bd sandbox --build -m "${mark_expr}"
+run_test "sandbox" ./test/py/test.py -ra --bd sandbox --build -m "${mark_expr}"

 # Run tests which require sandbox_spl
-run_test "sandbox_spl" ./test/py/test.py --bd sandbox_spl --build \
+run_test "sandbox_spl" ./test/py/test.py -ra --bd sandbox_spl --build \
-k 'test_ofplatdata or test_handoff'

 # Run tests for the flat-device-tree version of sandbox. This is a special
 # build which does not enable CONFIG_OF_LIVE for the live device tree, so we 
can
 # check that functionality is the same. The standard sandbox build (above) uses
 # CONFIG_OF_LIVE.
-run_test "sandbox_flattree" ./test/py/test.py --bd sandbox_flattree --build \
+run_test "sandbox_flattree" ./test/py/test.py -ra --bd sandbox_flattree 
--build \
-k test_ut

 # Set up a path to dtc (device-tree compiler) and libfdt.py, a library it
--
2.25.1



Re: [PATCH v7 12/17] efi_loader, pytest: set up secure boot environment

2020-04-18 Thread Heinrich Schuchardt
On 4/14/20 4:51 AM, AKASHI Takahiro wrote:
> A fixture for UEFI secure boot tests (image authentication and variable
> authentication) is defined. A small file system with test data in a single
> partition formatted in fat is created.
>
> This test requires efitools v1.5.2 or later. If the system's efitools
> is older, you have to build it on your own and define EFITOOLS_PATH.
>
> Signed-off-by: AKASHI Takahiro 
> ---
>  test/py/README.md  |   8 ++
>  test/py/tests/test_efi_secboot/conftest.py | 151 +
>  test/py/tests/test_efi_secboot/defs.py |  21 +++
>  3 files changed, 180 insertions(+)
>  create mode 100644 test/py/tests/test_efi_secboot/conftest.py
>  create mode 100644 test/py/tests/test_efi_secboot/defs.py
>
> diff --git a/test/py/README.md b/test/py/README.md
> index 3cbe01b73e28..aa8a5607b064 100644
> --- a/test/py/README.md
> +++ b/test/py/README.md
> @@ -37,7 +37,15 @@ will be required.  The following is an incomplete list:
>  | openssl|
>  | sudo OR guestmount |
>  | e2fsprogs  |
> +| util-linux |
> +| coreutils  |
>  | dosfstools |
> +| efitools   |
> +| mount  |
> +| mtools |
> +| sbsigntool |
> +| udisks2|
> +
>
>  Please use the apporirate commands for your distribution to match these tools
>  up with the package that provides them.
> diff --git a/test/py/tests/test_efi_secboot/conftest.py 
> b/test/py/tests/test_efi_secboot/conftest.py
> new file mode 100644
> index ..e542fef6e819
> --- /dev/null
> +++ b/test/py/tests/test_efi_secboot/conftest.py
> @@ -0,0 +1,151 @@
> +# SPDX-License-Identifier:  GPL-2.0+
> +# Copyright (c) 2019, Linaro Limited
> +# Author: AKASHI Takahiro 
> +
> +import os
> +import os.path
> +import pytest
> +import re
> +from subprocess import call, check_call, check_output, CalledProcessError
> +from defs import *
> +
> +# from test/py/conftest.py
> +def tool_is_in_path(tool):
> +for path in os.environ["PATH"].split(os.pathsep):
> +fn = os.path.join(path, tool)
> +if os.path.isfile(fn) and os.access(fn, os.X_OK):
> +return True
> +return False
> +
> +#
> +# Fixture for UEFI secure boot test
> +#
> +@pytest.fixture(scope='session')
> +def efi_boot_env(request, u_boot_config):
> +"""Set up a file system to be used in UEFI secure boot test.
> +
> +Args:
> +request: Pytest request object.
> + u_boot_config: U-boot configuration.
> +
> +Return:
> +A path to disk image to be used for testing
> +"""
> +global HELLO_PATH
> +
> +image_path = u_boot_config.persistent_data_dir
> +image_path = image_path + '/' + EFI_SECBOOT_IMAGE_NAME
> +image_size = EFI_SECBOOT_IMAGE_SIZE
> +part_size = EFI_SECBOOT_PART_SIZE
> +fs_type = EFI_SECBOOT_FS_TYPE
> +
> +if HELLO_PATH == '':
> +HELLO_PATH = u_boot_config.build_dir + 
> '/lib/efi_loader/helloworld.efi'
> +
> +try:
> +non_root = tool_is_in_path('udisksctl')
> +
> +# create a disk/partition
> +check_call('dd if=/dev/zero of=%s bs=1MiB count=%d'
> +% (image_path, image_size), shell=True)
> +check_call('sgdisk %s -n 1:0:+%dMiB'
> +% (image_path, part_size), shell=True)
> +# create a file system
> +check_call('dd if=/dev/zero of=%s.tmp bs=1MiB count=%d'
> +% (image_path, part_size), shell=True)
> +check_call('mkfs -t %s %s.tmp' % (fs_type, image_path), shell=True)
> +check_call('dd if=%s.tmp of=%s bs=1MiB seek=1 count=%d conv=notrunc'
> +% (image_path, image_path, 1), shell=True)
> +check_call('rm %s.tmp' % image_path, shell=True)
> +if non_root:
> +out_data = check_output('udisksctl loop-setup -f %s -o %d'
> +% (image_path, 1048576), shell=True).decode()
> +m = re.search('(?<= as )(.*)\.', out_data)
> +loop_dev = m.group(1)
> +# print 'loop device is: %s' % loop_dev
> +out_data = check_output('udisksctl info -b %s'
> +% loop_dev, shell=True).decode()
> +m = re.search('MountPoints:[ \t]+(.*)', out_data)
> +mnt_point = m.group(1)
> +else:
> +loop_dev = check_output('sudo losetup -o 1MiB --sizelimit %dMiB 
> --show -f %s | tr -d "\n"'
> +% (part_size, image_path), 
> shell=True).decode()
> +mnt_point = '/mnt'

This is not a good idea. On my systems I have a mount /mnt/iscsi and
this is where I checked out the u-boot repository where I run 'make
tests'. Other people may also have mounted something of importance in /mnt.

Please, supply a followi up patch creating a directory in the build path
for mounting.

Best regards

Heinrich

> +check_output('sudo mount -t %s -o umask=000 %s %s'
> +   

RE: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash support

2020-04-18 Thread Sagar Kadam
Hi Jagan,

> -Original Message-
> From: Jagan Teki 
> Sent: Saturday, April 18, 2020 4:12 PM
> To: Sagar Kadam 
> Cc: Bin Meng ; U-Boot Mailing List  b...@lists.denx.de>; linux-amarula  amar...@amarulasolutions.com>; pal...@dabbelt.com
> Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash
> support
> 
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
> 
> Hi Sagar,
> 
> On Sat, Apr 18, 2020 at 4:05 PM Sagar Kadam 
> wrote:
> >
> > Hello Jagan,
> >
> > > -Original Message-
> > > From: Jagan Teki 
> > > Sent: Saturday, April 18, 2020 1:11 AM
> > > To: Sagar Kadam 
> > > Cc: Bin Meng ; U-Boot Mailing List  > > b...@lists.denx.de>; linux-amarula  > > amar...@amarulasolutions.com>; pal...@dabbelt.com
> > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash
> > > support
> > >
> > > [External Email] Do not click links or attachments unless you recognize
> the
> > > sender and know the content is safe
> > >
> > > Hi Sagar,
> > >
> > > On Fri, Apr 17, 2020 at 11:50 PM Sagar Kadam
> 
> > > wrote:
> > > >
> > > > Hello Jagan,
> > > >
> > > > > -Original Message-
> > > > > From: Jagan Teki 
> > > > > Sent: Friday, April 17, 2020 1:30 PM
> > > > > To: Sagar Kadam 
> > > > > Cc: Bin Meng ; U-Boot Mailing List  > > > > b...@lists.denx.de>; linux-amarula  > > > > amar...@amarulasolutions.com>; pal...@dabbelt.com
> > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor
> flash
> > > > > support
> > > > >
> > > > > [External Email] Do not click links or attachments unless you
> recognize
> > > the
> > > > > sender and know the content is safe
> > > > >
> > > > > Hi Sagar,
> > > > >
> > > > > On Tue, Apr 7, 2020 at 9:48 PM Sagar Kadam
> 
> > > > > wrote:
> > > > > >
> > > > > > Hello Jagan,
> > > > > >
> > > > > > > -Original Message-
> > > > > > > From: Jagan Teki 
> > > > > > > Sent: Monday, April 6, 2020 9:30 PM
> > > > > > > To: Sagar Kadam 
> > > > > > > Cc: Bin Meng ; Palmer Dabbelt
> > > > > > > ; U-Boot Mailing List  b...@lists.denx.de>;
> > > > > > > linux- amarula 
> > > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor
> > > > > > > flash support
> > > > > > >
> > > > > > > [External Email] Do not click links or attachments unless you
> > > > > > > recognize the sender and know the content is safe
> > > > > > >
> > > > > > > Hi Sagar,
> > > > > > >
> > > > > > > On Sun, Apr 5, 2020 at 12:29 AM Sagar Kadam
> > > > > 
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > Hello Jagan,
> > > > > > > >
> > > > > > > > > -Original Message-
> > > > > > > > > From: Jagan Teki 
> > > > > > > > > Sent: Saturday, April 4, 2020 11:45 PM
> > > > > > > > > To: Sagar Kadam 
> > > > > > > > > Cc: Bin Meng ; Palmer Dabbelt
> > > > > > > > > ; U-Boot Mailing List  > > b...@lists.denx.de>;
> > > > > > > linux-
> > > > > > > > > amarula 
> > > > > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable
> > > > > > > > > spi-nor flash support
> > > > > > > > >
> > > > > > > > > [External Email] Do not click links or attachments unless you
> > > > > > > > > recognize
> > > > > > > the
> > > > > > > > > sender and know the content is safe
> > > > > > > > >
> > > > > > > > > Hi Sagar,
> > > > > > > > >
> > > > > > > > > On Mon, Nov 18, 2019 at 2:29 AM Sagar Kadam
> > > > > > > 
> > > > > > > > > wrote:
> > > > > > > > > >
> > > > > > > > > >
> > > > > > > > > > Hello Jagan/Bin,
> > > > > > > > > >
> > > > > > > > > > > -Original Message-
> > > > > > > > > > > From: U-Boot  On Behalf
> Of
> > > Bin
> > > > > > > Meng
> > > > > > > > > > > Sent: Monday, November 11, 2019 8:02 PM
> > > > > > > > > > > To: Jagan Teki 
> > > > > > > > > > > Cc: Palmer Dabbelt ( Sifive) ; U-Boot
> > > > > > > > > > > Mailing
> > > > > > > List
> > > > > > > > >  > > > > > > > > > > b...@lists.denx.de>; linux-amarula  > > > > > > > > amar...@amarulasolutions.com>
> > > > > > > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable
> > > > > > > > > > > spi-nor
> > > > > > > flash
> > > > > > > > > > > support
> > > > > > > > > > >
> > > > > > > > > > > Hi Jagan,
> > > > > > > > > > >
> > > > > > > > > > > On Sat, Nov 9, 2019 at 7:57 PM Jagan Teki
> > > > > > > > > 
> > > > > > > > > > > wrote:
> > > > > > > > > > > >
> > > > > > > > > > > > Hi Bin,
> > > > > > > > > > > >
> > > > > > > > > > > > On Tue, Oct 29, 2019 at 3:50 PM Bin Meng
> > > > > > > > > > > > 
> > > > > > > > > wrote:
> > > > > > > > > > > > >
> > > > > > > > > > > > > Hi Jagan,
> > > > > > > > > > > > >
> > > > > > > > > > > > > On Tue, Oct 29, 2019 at 5:38 PM Bin Meng
> > > > > > > 
> > > > > > > > > > > wrote:
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > Hi Jagan,
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > On Wed, Oct 16, 2019 at 10:58 PM Jagan Teki
> > > > > > > > > > >  wrote:
> > > > > > > > > > > > > > >
> > > > > > > > > > > > > > > HiFive 

RE: Network functionality in v2020.04 on Raspberry Pi 4

2020-04-18 Thread Jevtic, Sasha
Matthias,

I would be happy to do this, but unfortunately will not be able to until I can 
return to the laboratory where my setup resides.  This is likely still some 
weeks out due to significant COVID-19 activity in my region.  I am remote right 
now and only have power control and UART/Ethernet access to my RPi4s which have 
no cards installed.  If you or anyone else are able to support sooner, I would 
be very grateful.

Thanks.

Sasha

-Original Message-
From: Matthias Brugger  
Sent: Friday, April 17, 2020 2:19 PM
To: Jevtic, Sasha ; Harald Seiler 
; u-boot@lists.denx.de; Andre Przywara 
Subject: Re: Network functionality in v2020.04 on Raspberry Pi 4

Hi Sasha,

On 4/17/20 9:15 PM, Jevtic, Sasha wrote:
> [Previous message to list canceled; resending with added detail]
> 
> Harald,
> 
> To be clear, the language I used was to imply *only* that I observed this 
> problem as recently as the latest release; none over the earlier builds I 
> have prepared for RPi4 worked better.  The reference to other hardware and 
> older U-Boot was simply intended to suggest that the network infrastructure, 
> notably including the DHCP and TFTP servers, have been proven to work with 
> U-Boot.
> 
> Moreover, I would like to point out that I am chain loading U-Boot from the 
> RPi4 firmware via TFTP.  This could be a significant point since the RPi4 
> firmware will have clearly already have initialized the Ethernet hardware 
> previously.
> 

Could you try this with a u-boot booted from the SD card, so that we can see if 
the problem happens there as well?

Regards,
Matthias

> Thanks.
> 
> Sasha
> 
> -Original Message-
> From: Harald Seiler 
> Sent: Friday, April 17, 2020 4:12 AM
> To: Jevtic, Sasha ; 
> u-boot@lists.denx.de
> Cc: Matthias Brugger 
> Subject: Re: Network functionality in v2020.04 on Raspberry Pi 4
> 
> Hello Sasha,
> 
> adding Matthias Brugger on Cc as he is the maintainer for Raspberry Pi.
> 
> On Thu, 2020-04-16 at 20:25 +, Jevtic, Sasha wrote:
>> Hello all,
>>
>> I am encountering considerable difficulty with the networking 
>> functionality on Raspberry Pi 4 on the latest release (2020.04).  In 
>> particular, I have observed:
>>
>> * any network operation that fails renders networking functionality
>>   inoperable until reboot.
>> * ping always fails.
>> * TFTP download attempt of non-existent file fails (resulting in
>>   subsequent network operations failing).
>> * TFTP download of an existing file usually works, but occasionally
>>   experiences timeouts during transfers; some are timeouts are
>>   intermittent (the transfer ultimately resumes), and some are
>>   permanent.
>> * TFTP download of a script usually works (as above). The script
>>   will run, but any additional TFTP downloads performed by a script
>>   all fail.
>>
>> It is not entirely clear right now whether this is a problem in 
>> U-Boot (i.e., instead of in the execution environment set up by the 
>> Raspberry Pi firmware), but the TFTP infrastructure I am using is 
>> known to work well with other hardware running an older version of 
>> U-Boot.  Also, there are also no network issues in the Linux 
>> environment that I ultimately boot, so hardware also seems unlikely.  
>> Thus, suggestions for things to check would be appreciated; I am of 
>> course also happy to provide any supporting data required to investigate.
> 
> If you have know which older version still worked, you can use git-bisect [1] 
> to find out where the regression was introduced.  Ideally, if you can 
> automate installation of a newly built U-Boot version, this can run entirely 
> unattended to find out where the bug was introduced.
> 
> [1]: https://git-scm.com/docs/git-bisect
> 
>> Please also be aware that I initially posted a very similar inquiry 
>> to the Raspberry Pi Forum:
>>
>> https://www.raspberrypi.org/forums/viewtopic.php?f=29=271068
>>
>> Thanks.
>>
>> Sasha
> --
> Harald
> 


Re: [PATCH 1/5] wandboard: Fix detection for mx6q/mx6dl revD1 revariants

2020-04-18 Thread Derek Atkins

Hi,
Let me know if you want me to test this on my imx6q d1

-derek
Sent using my mobile device. Please excuse any typos.
On April 17, 2020 7:41:03 AM Fabio Estevam  wrote:


Hi Heiko,

On Fri, Apr 17, 2020 at 8:33 AM Fabio Estevam  wrote:


Ok, I have a mx6dl wandboad here and I managed to reproduce the issue
you reported.

Let me investigate this issue.


Ok, I managed to fix it.

I will submit a new series soon.

Thanks






RE: Network functionality in v2020.04 on Raspberry Pi 4

2020-04-18 Thread Jevtic, Sasha
[Previous message to list canceled; resending with added detail]

Harald,

To be clear, the language I used was to imply *only* that I observed this 
problem as recently as the latest release; none over the earlier builds I have 
prepared for RPi4 worked better.  The reference to other hardware and older 
U-Boot was simply intended to suggest that the network infrastructure, notably 
including the DHCP and TFTP servers, have been proven to work with U-Boot.

Moreover, I would like to point out that I am chain loading U-Boot from the 
RPi4 firmware via TFTP.  This could be a significant point since the RPi4 
firmware will have clearly already have initialized the Ethernet hardware 
previously.

Thanks.

Sasha

-Original Message-
From: Harald Seiler  
Sent: Friday, April 17, 2020 4:12 AM
To: Jevtic, Sasha ; 
u-boot@lists.denx.de
Cc: Matthias Brugger 
Subject: Re: Network functionality in v2020.04 on Raspberry Pi 4

Hello Sasha,

adding Matthias Brugger on Cc as he is the maintainer for Raspberry Pi.

On Thu, 2020-04-16 at 20:25 +, Jevtic, Sasha wrote:
> Hello all,
> 
> I am encountering considerable difficulty with the networking 
> functionality on Raspberry Pi 4 on the latest release (2020.04).  In 
> particular, I have observed:
> 
> * any network operation that fails renders networking functionality
>   inoperable until reboot.
> * ping always fails.
> * TFTP download attempt of non-existent file fails (resulting in
>   subsequent network operations failing).
> * TFTP download of an existing file usually works, but occasionally
>   experiences timeouts during transfers; some are timeouts are
>   intermittent (the transfer ultimately resumes), and some are
>   permanent.
> * TFTP download of a script usually works (as above). The script
>   will run, but any additional TFTP downloads performed by a script
>   all fail.
> 
> It is not entirely clear right now whether this is a problem in U-Boot 
> (i.e., instead of in the execution environment set up by the Raspberry 
> Pi firmware), but the TFTP infrastructure I am using is known to work 
> well with other hardware running an older version of U-Boot.  Also, 
> there are also no network issues in the Linux environment that I 
> ultimately boot, so hardware also seems unlikely.  Thus, suggestions 
> for things to check would be appreciated; I am of course also happy to 
> provide any supporting data required to investigate.

If you have know which older version still worked, you can use git-bisect [1] 
to find out where the regression was introduced.  Ideally, if you can automate 
installation of a newly built U-Boot version, this can run entirely unattended 
to find out where the bug was introduced.

[1]: https://git-scm.com/docs/git-bisect

> Please also be aware that I initially posted a very similar inquiry to 
> the Raspberry Pi Forum:
> 
> https://www.raspberrypi.org/forums/viewtopic.php?f=29=271068
> 
> Thanks.
> 
> Sasha
--
Harald



A64-Olinuxino-eMMC no USB

2020-04-18 Thread Philip Rinn
Hi,

USB is not working on my Olimex A64-Olinuxino-1Ge4GW Rev. D, no matter if I use
the u-boot variant with or without eMMC (but that's no surprise). I use the
version provided by Debian, 2020.04+dfsg-1 withe image provided by Armbian it
didn't work either.

I attached boot logs with and without attached USB key.

In both cases one gets an "EHCI failed to shut down host controller." while
loading the kernels fdt.

The error message with attached USB key is:

scanning bus usb@1c1b400 for devices... ERROR:  USB-error: DEVICENOTRESPONDING:
Device did not respond to token (IN) or did
not provide a handshake (OUT) (5)
ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or
did
not provide a handshake (OUT) (5)

  USB device not accepting new address (error=20)


After booting Linux there is still no USB available, but that's a different bug 
I
guess ;-). I attached the dmesg log anyway.


I also filed a Debian bug report about the issue:
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=956923.


Best,
Philip
U-Boot SPL 2020.04+dfsg-1 (Apr 15 2020 - 00:24:39 +)
DRAM: 1024 MiB
Trying to boot from MMC1
NOTICE:  BL31: v2.2(debug):
NOTICE:  BL31: Built : 15:34:34, Apr 10 2020
NOTICE:  BL31: Detected Allwinner A64/H64/R18 SoC (1689)
NOTICE:  BL31: Found U-Boot DTB at 0x4090fd0, model: Olimex A64-Olinuxino-eMMC
INFO:ARM GICv2 driver initialized
INFO:Configuring SPC Controller
NOTICE:  BL31: PMIC: Detected AXP803 on RSB.
INFO:PMIC: AXP803: Enabling DRIVEVBUS
INFO:PMIC: AXP803: dcdc1 voltage: 3.300V
INFO:PMIC: AXP803: dcdc5 voltage: 1.360V
INFO:PMIC: AXP803: dcdc6 voltage: 1.100V
INFO:PMIC: AXP803: dldo1 voltage: 3.300V
INFO:BL31: Platform setup done
INFO:BL31: Initializing runtime services
INFO:BL31: cortex_a53: CPU workaround for 843419 was applied
INFO:BL31: cortex_a53: CPU workaround for 855873 was applied
INFO:BL31: Preparing for EL3 exit to normal world
INFO:Entry point address = 0x4a00
INFO:SPSR = 0x3c9


U-Boot 2020.04+dfsg-1 (Apr 15 2020 - 00:24:39 +) Allwinner Technology

CPU:   Allwinner A64 (SUN50I)
Model: Olimex A64-Olinuxino-eMMC
DRAM:  1 GiB
MMC:   Device 'mmc@1c11000': seq 1 is in use by 'mmc@1c1'
mmc@1c0f000: 0, mmc@1c1: 2, mmc@1c11000: 1
Loading Environment from FAT... Unable to use mmc 1:1... In:serial
Out:   serial
Err:   serial
Net:   phy interface7
eth0: ethernet@1c3
starting USB...
Bus usb@1c1a000: USB EHCI 1.00
Bus usb@1c1a400: USB OHCI 1.0
Bus usb@1c1b000: USB EHCI 1.00
Bus usb@1c1b400: USB OHCI 1.0
scanning bus usb@1c1a000 for devices... 1 USB Device(s) found
scanning bus usb@1c1a400 for devices... 1 USB Device(s) found
scanning bus usb@1c1b000 for devices... 1 USB Device(s) found
scanning bus usb@1c1b400 for devices... ERROR:  USB-error: DEVICENOTRESPONDING: 
Device did not respond to token (IN) or did
not provide a handshake (OUT) (5)
ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or 
did
not provide a handshake (OUT) (5)

  USB device not accepting new address (error=20)
1 USB Device(s) found
   scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot:  0 
switch to partitions #0, OK
mmc0 is current device
Scanning mmc 0:1...
Found U-Boot script /boot/boot.scr
3012 bytes read in 3 ms (980.5 KiB/s)
## Executing script at 4fc0
U-boot loaded from SD
Boot script loaded from mmc
175 bytes read in 2 ms (85 KiB/s)
24201 bytes read in 8 ms (2.9 MiB/s)
29057066 bytes read in 1247 ms (22.2 MiB/s)
21069680 bytes read in 905 ms (22.2 MiB/s)
## Loading init Ramdisk from Legacy Image at 4fe0 ...
   Image Name:   uInitrd
   Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
   Data Size:29057002 Bytes = 27.7 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
## Flattened Device Tree blob at 4fa0
   Booting using the fdt blob at 0x4fa0
EHCI failed to shut down host controller.
   Loading Ramdisk to 4844a000, end 49ea ... OK
   Loading Device Tree to 483db000, end 48449fff ... OK

Starting kernel ...

U-Boot SPL 2020.04+dfsg-1 (Apr 15 2020 - 00:24:39 +)
DRAM: 1024 MiB
Trying to boot from MMC1
NOTICE:  BL31: v2.2(debug):
NOTICE:  BL31: Built : 15:34:34, Apr 10 2020
NOTICE:  BL31: Detected Allwinner A64/H64/R18 SoC (1689)
NOTICE:  BL31: Found U-Boot DTB at 0x4090fd0, model: Olimex A64-Olinuxino-eMMC
INFO:ARM GICv2 driver initialized
INFO:Configuring SPC Controller
NOTICE:  BL31: PMIC: Detected AXP803 on RSB.
INFO:PMIC: AXP803: Enabling DRIVEVBUS
INFO:PMIC: AXP803: dcdc1 voltage: 3.300V
INFO:PMIC: AXP803: dcdc5 voltage: 1.360V
INFO:PMIC: AXP803: dcdc6 voltage: 1.100V
INFO:PMIC: AXP803: dldo1 voltage: 3.300V
INFO:BL31: Platform setup done
INFO:BL31: Initializing runtime services
INFO:BL31: cortex_a53: CPU workaround for 843419 was applied
INFO:BL31: cortex_a53: CPU workaround for 855873 was applied
INFO:  

Re: [PATCH 1/5] wandboard: Fix detection for mx6q/mx6dl revD1 revariants

2020-04-18 Thread Derek Atkins
For the record, I also tested this on a Wandboard Dual RevC1 and it worked
there, too.

-derek

On Fri, April 17, 2020 10:50 am, Heiko Schocher wrote:
> Hello Fabio,
>
> Am 17.04.2020 um 14:30 schrieb Fabio Estevam:
>> Hi Heiko,
>>
>> On Fri, Apr 17, 2020 at 9:00 AM Derek Atkins  wrote:
>>>
>>> Hi,
>>> Let me know if you want me to test this on my imx6q d1
>>
>> Derek confirmed that v2 worked on his imx6q wandboard revD1 and I have
>> just submitted v2 to the list.
>>
>> Hopefully it will also work on your imx6dl wandboard revD1.
>
> Yes, can confirm this, see log attached.
>
> Thanks for your efforts!
>
> bye,
> Heiko
>
> hs@lab-1:tbot-tbot2go  [wandboard-devel-messe] $ tbot @argswandboardlab1
> wandboard_ub_check_version
> tbot starting ...
> ├─Flags:
> │ 'lab-1-build'
> ├─Calling wandboard_ub_check_version ...
> │   ├─[local] ssh -o BatchMode=yes -i /home/hs/.ssh/id_rsa -p 22
> hs@192.168.1.109
> │   ├─[lab1] strings /var/lib/tftpboot/wandboard/tbot/u-boot.bin | grep
> --color=never "U-Boot 2"
> │   │## U-Boot 2020.04-tbot-00375-g946d9a0974 (Apr 17 2020 - 16:20:27
> +0200)
> │   ├─found in image U-Boot version U-Boot 2020.04-tbot-00375-g946d9a0974
> (Apr 17 2020 - 16:20:27 +0200)
> │   ├─[lab1] strings /var/lib/tftpboot/wandboard/tbot/SPL | grep
> --color=never "U-Boot SPL"
> │   │## U-Boot SPL 2020.04-tbot-00375-g946d9a0974 (Apr 17 2020 -
> 16:20:27 +0200)
> │   ├─found in image U-Boot SPL version U-Boot SPL
> 2020.04-tbot-00375-g946d9a0974 (Apr 17 2020 -
> 16:20:27 +0200)
> │   ├─[local] ssh -o BatchMode=yes -i /home/hs/.ssh/id_rsa -p 22
> hs@192.168.1.109
> │   ├─[lab1] kermit /home/hs/kermrc_wandboard
> │   ├─POWERON (wandboard)
> │   ├─[lab1] sudo sispmctl -D 01:01:56:a2:f1 -o 3
> │   │## Accessing Gembird #0 USB device 021
> │   │## Switched outlet 3 on
> │   ├─UBOOT (wandboard-uboot)
> │   │<> Connecting to
> /dev/serial/by-id/usb-Prolific_Technology_Inc._USB-Serial_Controller_D-if00-port0,
> speed 115200
> │   │<>  Escape character: Ctrl-\ (ASCII 28, FS): enabled
> │   │<> Type the escape character followed by C to get back,
> │   │<> or followed by ? to see other options.
> │   │<> 
> │   │<>
> │   │<> U-Boot SPL 2020.04-tbot-00375-g946d9a0974 (Apr 17 2020 -
> 16:20:27 +0200)
> │   │<> Trying to boot from MMC1
> │   │<>
> │   │<>
> │   │<> U-Boot 2020.04-tbot-00375-g946d9a0974 (Apr 17 2020 - 16:20:27
> +0200)
> │   │<>
> │   │<> CPU:   Freescale i.MX6DL rev1.3 at 792 MHz
> │   │<> Reset cause: POR
> │   │<> DRAM:  1 GiB
> │   │<> PMIC:  PFUZE100 ID=0x10
> │   │<> MMC:   FSL_SDHC: 2, FSL_SDHC: 1, FSL_SDHC: 0
> │   │<> Loading Environment from MMC... *** Warning - bad CRC, using
> default environment
> │   │<>
> │   │<> No panel detected: default to HDMI
> │   │<> Display: HDMI (1024x768)
> │   │<> In:serial
> │   │<> Out:   serial
> │   │<> Err:   serial
> │   │<> Board: Wandboard rev D1
> │   │<> Net:
> │   │<> Warning: ethernet@2188000 using MAC address from ROM
> │   │<> eth0: ethernet@2188000
> │   │<> Hit any key to stop autoboot:  0
> │   │<> =>
> │   ├─found U-Boot SPL version U-Boot SPL 2020.04-tbot-00375-g946d9a0974
> (Apr 17 2020 - 16:20:27
> +0200) installed
> │   ├─found U-Boot version U-Boot 2020.04-tbot-00375-g946d9a0974 (Apr 17
> 2020 - 16:20:27 +0200)
> installed
> │   ├─POWEROFF (wandboard)
> │   ├─[lab1] sudo sispmctl -D 01:01:56:a2:f1 -f 3
> │   │## Accessing Gembird #0 USB device 021
> │   │## Switched outlet 3 off
> │   └─Done. (14.212s)
> ├─
> ├─Log written to
> '/home/hs/data/Entwicklung/wandboard/tbot-tbot2go/log/lab1-wandboard-0040.json'
> └─SUCCESS (14.340s)
> hs@lab-1:tbot-tbot2go  [wandboard-devel-messe] $
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de
>


-- 
   Derek Atkins 617-623-3745
   de...@ihtfp.com www.ihtfp.com
   Computer and Internet Security Consultant



[PATCH v2 1/2] mx7ulp: Remove duplicated definitions

2020-04-18 Thread sbabic
> These PMC0 definitions are already defined in the beginning
> of the file, so remove the duplication.
> Reported-by: Stefano Babic 
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Peng Fan 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH] imx8qxp_mek: Start with USDHC2 unpowered

2020-04-18 Thread sbabic
> After triggering a "reboot" command in Linux the following
> hang in SPL is observed:
> U-Boot SPL 2020.04 (Apr 15 2020 - 10:49:29 -0300)
> Normal Boot
> WDT:   Not found!
> Trying to boot from MMC2_2
> spl: mmc init failed with error: -70
> SPL: failed to boot from all boot devices
> ### ERROR ### Please RESET the board ###
> This error happens because the CMD_ERR bit is set in the IRQ status
> register after booting from Linux.
> To ensure a fresh start, force the VMMC supply to get unpowered first.
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Peng Fan 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH] mx6ulz_14x14_evk: Disable CONFIG_NET

2020-04-18 Thread sbabic
> Currently the following build warning is seen:
> 
> = WARNING ==
> This board does not use CONFIG_DM_ETH (Driver Model
> for Ethernet drivers). Please update the board to use
> CONFIG_DM_ETH before the v2020.07 release. Failure to
> update by the deadline may result in board removal.
> See doc/driver-model/migration.rst for more info.
> ===
> Since the mx6ulz-evk board does not have networking support, explicitly
> disable networking to avoid the board removal.
> Signed-off-by: Fabio Estevam 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 08/13] verdin-imx8mm: add nfsboot wrapper to env

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Add nfsboot wrapper to env to boot Linux kernel from TFTP/NFS.
> Signed-off-by: Igor Opaniuk 
> Reviewed-by: Oleksandr Suvorov 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 5/7] configs: tqma6x_mba6x: update default configs for device model

2020-04-18 Thread sbabic
> Fixes compilation for WRU4 board.
> Signed-off-by: Michael Krummsdorf 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 1/2] mx6ul_evk: Move CONFIG_FEC_MXC to defconfig

2020-04-18 Thread sbabic
> CONFIG_FEC_MXC is supported in Kconfig, so it is preferred to
> move it to defconfig file.
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Peng Fan 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH] mx6ullevk: Enable Ethernet support

2020-04-18 Thread sbabic
> Add Ethernet support using DM_ETH.
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Peng Fan 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 2/2] mx7ulp: Only enable LDO if it is not already enabled

2020-04-18 Thread sbabic
> LDO mode may be already enabled by the ROM and enabling it again
> can cause U-Boot to hang.
> Avoid this problem by only enabling LDO mode if it is initially disabled.
> Reported-by: Jorge Ramirez-Ortiz 
> Signed-off-by: Fabio Estevam 
> Tested-by: Jorge Ramirez-Ortiz 
> Reviewed-by: Peng Fan 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 3/7] arch: arm: tqma6: apply default Kconfig for device model

2020-04-18 Thread sbabic
> Signed-off-by: Michael Krummsdorf 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 6/7] board: tqc: tqma6: hw init code disabled for device model

2020-04-18 Thread sbabic
> Keep code for non-dm configuration of baseboard WRU4.
> It cannot be upgraded to device model as
> we have no suitable device tree for it.
> These changes were not run-tested on WRU4,
> only compile-tested.
> Signed-off-by: Michael Krummsdorf 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 10/13] colibri_imx7: enable relocation of fdt and initrd

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
> from default environment which prevents relocation of FDT and initrd.
> Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
> initrd.
> Signed-off-by: Igor Opaniuk 
> Reviewed-by: Oleksandr Suvorov 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v3] arm: imx6: configure NoC on i.MX6DQP

2020-04-18 Thread sbabic
> The i.MX6DP and i.MX6QP incorporate NoC interconnect logic
> which needs to be configured in order to use external DDR memory.
> This patch enables the SPL to configure the necessary registers
> in accordance with the NXP engineering bulletin EB828.
> Co-developed-by: Filip Brozović 
> Signed-off-by: Bernhard Messerklinger 
> 
> Signed-off-by: Filip Brozovic 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 2/7] arm: dt: imx6qdl: add tqma6[qdl] som on mba6 mainboard

2020-04-18 Thread sbabic
> The device trees for TQMa6x SOM support variations in
> - CPU type: imx6dl- or imx6q-
> - MBa6 I2C bus access: -mba6a (i2c1) or -mba6b (i2c3)
>   (plus the respective common/module include trees)
> - USBH1 is directly connected to a hub
> - USBOTG is connected to a separate connector
>   and can act as host/device or full OTG port.
> Signed-off-by: Michael Krummsdorf 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 09/13] colibri_vf: enable relocation of fdt and initrd

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
> from default environment which prevents relocation of FDT and initrd.
> Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
> initrd.
> Signed-off-by: Igor Opaniuk 
> Reviewed-by: Oleksandr Suvorov 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 11/13] apalis_imx6: enable relocation of fdt and initrd

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
> from default environment which prevents relocation of FDT and initrd.
> Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
> initrd.
> Signed-off-by: Igor Opaniuk 
> Reviewed-by: Oleksandr Suvorov 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 7/7] board: tqc: tqma6_mba6: switch to device model

2020-04-18 Thread sbabic
> Ethernet, usdhc2 and i2c1 interfaces are probed by dm drivers.
> Therefor init functions in board file are not necessary.
> Signed-off-by: Michael Krummsdorf 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 4/7] board: tqc: tqma6: mba6: apply default Kconfig for device model

2020-04-18 Thread sbabic
> Signed-off-by: Michael Krummsdorf 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 2/2] mx6ul_evk: Remove FEC related board code

2020-04-18 Thread sbabic
> mx6ul_evk uses DM_ETH, so there is no need to have board code
> to setup the FEC IOMUX and to register the network ports via the
> old board_eth_init() method. 
> Remove these FEC related pieces of code.
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Peng Fan 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 13/13] colibri_imx6: enable relocation of fdt and initrd

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
> from default environment which prevents relocation of FDT and initrd.
> Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
> initrd.
> Signed-off-by: Igor Opaniuk 
> Reviewed-by: Oleksandr Suvorov 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH 1/7] tqma6: resurrect support by supplying correct SYS_TEXT_BASE

2020-04-18 Thread sbabic
> From: Markus Niebel 
> reason: SYS_TEXT_BASE was moved to Kconfig. Give reasonable defaults
> in board specific Kconfig.
> Signed-off-by: Markus Niebel 
> Signed-off-by: Michael Krummsdorf 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 12/13] colibri-imx6ull: enable relocation of fdt and initrd

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Remove 'fdt_high' and 'initrd_high' environment variables (set to 0x)
> from default environment which prevents relocation of FDT and initrd.
> Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
> initrd.
> Signed-off-by: Igor Opaniuk 
> Reviewed-by: Oleksandr Suvorov 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 06/13] verdin-imx8mm: adjust dram size in case bl32 is used

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
> so during MMU initialization U-Boot won't touch this mem area.
> BL32 is loaded to the end of DRAM, bl32 payload size is read from
> rom_pointer[1]. This relates to the issue described in
> 59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").
> Signed-off-by: Igor Opaniuk 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


[PATCH v2 07/13] imx8mm_evk: adjust dram size in case bl32 is used

2020-04-18 Thread sbabic
> From: Igor Opaniuk 
> Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
> so during MMU initialization U-Boot won't touch this mem area.
> BL32 is loaded to the end of DRAM, bl32 payload size is read from
> rom_pointer[1]. This relates to the issue described in
> 59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").
> Signed-off-by: Igor Opaniuk 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=


Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash support

2020-04-18 Thread Jagan Teki
Hi Sagar,

On Sat, Apr 18, 2020 at 4:05 PM Sagar Kadam  wrote:
>
> Hello Jagan,
>
> > -Original Message-
> > From: Jagan Teki 
> > Sent: Saturday, April 18, 2020 1:11 AM
> > To: Sagar Kadam 
> > Cc: Bin Meng ; U-Boot Mailing List  > b...@lists.denx.de>; linux-amarula  > amar...@amarulasolutions.com>; pal...@dabbelt.com
> > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash
> > support
> >
> > [External Email] Do not click links or attachments unless you recognize the
> > sender and know the content is safe
> >
> > Hi Sagar,
> >
> > On Fri, Apr 17, 2020 at 11:50 PM Sagar Kadam 
> > wrote:
> > >
> > > Hello Jagan,
> > >
> > > > -Original Message-
> > > > From: Jagan Teki 
> > > > Sent: Friday, April 17, 2020 1:30 PM
> > > > To: Sagar Kadam 
> > > > Cc: Bin Meng ; U-Boot Mailing List  > > > b...@lists.denx.de>; linux-amarula  > > > amar...@amarulasolutions.com>; pal...@dabbelt.com
> > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash
> > > > support
> > > >
> > > > [External Email] Do not click links or attachments unless you recognize
> > the
> > > > sender and know the content is safe
> > > >
> > > > Hi Sagar,
> > > >
> > > > On Tue, Apr 7, 2020 at 9:48 PM Sagar Kadam 
> > > > wrote:
> > > > >
> > > > > Hello Jagan,
> > > > >
> > > > > > -Original Message-
> > > > > > From: Jagan Teki 
> > > > > > Sent: Monday, April 6, 2020 9:30 PM
> > > > > > To: Sagar Kadam 
> > > > > > Cc: Bin Meng ; Palmer Dabbelt
> > > > > > ; U-Boot Mailing List ;
> > > > > > linux- amarula 
> > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor
> > > > > > flash support
> > > > > >
> > > > > > [External Email] Do not click links or attachments unless you
> > > > > > recognize the sender and know the content is safe
> > > > > >
> > > > > > Hi Sagar,
> > > > > >
> > > > > > On Sun, Apr 5, 2020 at 12:29 AM Sagar Kadam
> > > > 
> > > > > > wrote:
> > > > > > >
> > > > > > > Hello Jagan,
> > > > > > >
> > > > > > > > -Original Message-
> > > > > > > > From: Jagan Teki 
> > > > > > > > Sent: Saturday, April 4, 2020 11:45 PM
> > > > > > > > To: Sagar Kadam 
> > > > > > > > Cc: Bin Meng ; Palmer Dabbelt
> > > > > > > > ; U-Boot Mailing List  > b...@lists.denx.de>;
> > > > > > linux-
> > > > > > > > amarula 
> > > > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable
> > > > > > > > spi-nor flash support
> > > > > > > >
> > > > > > > > [External Email] Do not click links or attachments unless you
> > > > > > > > recognize
> > > > > > the
> > > > > > > > sender and know the content is safe
> > > > > > > >
> > > > > > > > Hi Sagar,
> > > > > > > >
> > > > > > > > On Mon, Nov 18, 2019 at 2:29 AM Sagar Kadam
> > > > > > 
> > > > > > > > wrote:
> > > > > > > > >
> > > > > > > > >
> > > > > > > > > Hello Jagan/Bin,
> > > > > > > > >
> > > > > > > > > > -Original Message-
> > > > > > > > > > From: U-Boot  On Behalf Of
> > Bin
> > > > > > Meng
> > > > > > > > > > Sent: Monday, November 11, 2019 8:02 PM
> > > > > > > > > > To: Jagan Teki 
> > > > > > > > > > Cc: Palmer Dabbelt ( Sifive) ; U-Boot
> > > > > > > > > > Mailing
> > > > > > List
> > > > > > > >  > > > > > > > > > b...@lists.denx.de>; linux-amarula  > > > > > > > amar...@amarulasolutions.com>
> > > > > > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable
> > > > > > > > > > spi-nor
> > > > > > flash
> > > > > > > > > > support
> > > > > > > > > >
> > > > > > > > > > Hi Jagan,
> > > > > > > > > >
> > > > > > > > > > On Sat, Nov 9, 2019 at 7:57 PM Jagan Teki
> > > > > > > > 
> > > > > > > > > > wrote:
> > > > > > > > > > >
> > > > > > > > > > > Hi Bin,
> > > > > > > > > > >
> > > > > > > > > > > On Tue, Oct 29, 2019 at 3:50 PM Bin Meng
> > > > > > > > > > > 
> > > > > > > > wrote:
> > > > > > > > > > > >
> > > > > > > > > > > > Hi Jagan,
> > > > > > > > > > > >
> > > > > > > > > > > > On Tue, Oct 29, 2019 at 5:38 PM Bin Meng
> > > > > > 
> > > > > > > > > > wrote:
> > > > > > > > > > > > >
> > > > > > > > > > > > > Hi Jagan,
> > > > > > > > > > > > >
> > > > > > > > > > > > > On Wed, Oct 16, 2019 at 10:58 PM Jagan Teki
> > > > > > > > > >  wrote:
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > HiFive Unleashed A00 support is25wp256 spi-nor
> > > > > > > > > > > > > > flash, So enable the same and add test result log
> > > > > > > > > > > > > > for future reference.
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > Tested on SiFive FU540 board.
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > Signed-off-by: Jagan Teki
> > > > > > > > > > > > > > 
> > > > > > > > > > > > > > Reviewed-by: Bin Meng 
> > > > > > > > > > > > > > Tested-by: Bin Meng 
> > > > > > > > > > > > > > ---
> > > > > > > > > > > > > >  .../dts/hifive-unleashed-a00-u-boot.dtsi  |  1 
> > > > > > > > > > > > > > +
> > > > > > > > > > > > > >  board/sifive/fu540/Kconfig|  3 
> > > > > > > > > > > > > > +++
> > > > > > > > > > > > > >  

RE: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash support

2020-04-18 Thread Sagar Kadam
Hello Jagan,

> -Original Message-
> From: Jagan Teki 
> Sent: Saturday, April 18, 2020 1:11 AM
> To: Sagar Kadam 
> Cc: Bin Meng ; U-Boot Mailing List  b...@lists.denx.de>; linux-amarula  amar...@amarulasolutions.com>; pal...@dabbelt.com
> Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash
> support
> 
> [External Email] Do not click links or attachments unless you recognize the
> sender and know the content is safe
> 
> Hi Sagar,
> 
> On Fri, Apr 17, 2020 at 11:50 PM Sagar Kadam 
> wrote:
> >
> > Hello Jagan,
> >
> > > -Original Message-
> > > From: Jagan Teki 
> > > Sent: Friday, April 17, 2020 1:30 PM
> > > To: Sagar Kadam 
> > > Cc: Bin Meng ; U-Boot Mailing List  > > b...@lists.denx.de>; linux-amarula  > > amar...@amarulasolutions.com>; pal...@dabbelt.com
> > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor flash
> > > support
> > >
> > > [External Email] Do not click links or attachments unless you recognize
> the
> > > sender and know the content is safe
> > >
> > > Hi Sagar,
> > >
> > > On Tue, Apr 7, 2020 at 9:48 PM Sagar Kadam 
> > > wrote:
> > > >
> > > > Hello Jagan,
> > > >
> > > > > -Original Message-
> > > > > From: Jagan Teki 
> > > > > Sent: Monday, April 6, 2020 9:30 PM
> > > > > To: Sagar Kadam 
> > > > > Cc: Bin Meng ; Palmer Dabbelt
> > > > > ; U-Boot Mailing List ;
> > > > > linux- amarula 
> > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable spi-nor
> > > > > flash support
> > > > >
> > > > > [External Email] Do not click links or attachments unless you
> > > > > recognize the sender and know the content is safe
> > > > >
> > > > > Hi Sagar,
> > > > >
> > > > > On Sun, Apr 5, 2020 at 12:29 AM Sagar Kadam
> > > 
> > > > > wrote:
> > > > > >
> > > > > > Hello Jagan,
> > > > > >
> > > > > > > -Original Message-
> > > > > > > From: Jagan Teki 
> > > > > > > Sent: Saturday, April 4, 2020 11:45 PM
> > > > > > > To: Sagar Kadam 
> > > > > > > Cc: Bin Meng ; Palmer Dabbelt
> > > > > > > ; U-Boot Mailing List  b...@lists.denx.de>;
> > > > > linux-
> > > > > > > amarula 
> > > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable
> > > > > > > spi-nor flash support
> > > > > > >
> > > > > > > [External Email] Do not click links or attachments unless you
> > > > > > > recognize
> > > > > the
> > > > > > > sender and know the content is safe
> > > > > > >
> > > > > > > Hi Sagar,
> > > > > > >
> > > > > > > On Mon, Nov 18, 2019 at 2:29 AM Sagar Kadam
> > > > > 
> > > > > > > wrote:
> > > > > > > >
> > > > > > > >
> > > > > > > > Hello Jagan/Bin,
> > > > > > > >
> > > > > > > > > -Original Message-
> > > > > > > > > From: U-Boot  On Behalf Of
> Bin
> > > > > Meng
> > > > > > > > > Sent: Monday, November 11, 2019 8:02 PM
> > > > > > > > > To: Jagan Teki 
> > > > > > > > > Cc: Palmer Dabbelt ( Sifive) ; U-Boot
> > > > > > > > > Mailing
> > > > > List
> > > > > > >  > > > > > > > > b...@lists.denx.de>; linux-amarula  > > > > > > amar...@amarulasolutions.com>
> > > > > > > > > Subject: Re: [U-Boot] [PATCH v2 5/5] sifive: fu540: Enable
> > > > > > > > > spi-nor
> > > > > flash
> > > > > > > > > support
> > > > > > > > >
> > > > > > > > > Hi Jagan,
> > > > > > > > >
> > > > > > > > > On Sat, Nov 9, 2019 at 7:57 PM Jagan Teki
> > > > > > > 
> > > > > > > > > wrote:
> > > > > > > > > >
> > > > > > > > > > Hi Bin,
> > > > > > > > > >
> > > > > > > > > > On Tue, Oct 29, 2019 at 3:50 PM Bin Meng
> > > > > > > > > > 
> > > > > > > wrote:
> > > > > > > > > > >
> > > > > > > > > > > Hi Jagan,
> > > > > > > > > > >
> > > > > > > > > > > On Tue, Oct 29, 2019 at 5:38 PM Bin Meng
> > > > > 
> > > > > > > > > wrote:
> > > > > > > > > > > >
> > > > > > > > > > > > Hi Jagan,
> > > > > > > > > > > >
> > > > > > > > > > > > On Wed, Oct 16, 2019 at 10:58 PM Jagan Teki
> > > > > > > > >  wrote:
> > > > > > > > > > > > >
> > > > > > > > > > > > > HiFive Unleashed A00 support is25wp256 spi-nor
> > > > > > > > > > > > > flash, So enable the same and add test result log
> > > > > > > > > > > > > for future reference.
> > > > > > > > > > > > >
> > > > > > > > > > > > > Tested on SiFive FU540 board.
> > > > > > > > > > > > >
> > > > > > > > > > > > > Signed-off-by: Jagan Teki
> > > > > > > > > > > > > 
> > > > > > > > > > > > > Reviewed-by: Bin Meng 
> > > > > > > > > > > > > Tested-by: Bin Meng 
> > > > > > > > > > > > > ---
> > > > > > > > > > > > >  .../dts/hifive-unleashed-a00-u-boot.dtsi  |  1 +
> > > > > > > > > > > > >  board/sifive/fu540/Kconfig|  3 
> > > > > > > > > > > > > +++
> > > > > > > > > > > > >  doc/board/sifive/fu540.rst| 19
> > > > > > > +++
> > > > > > > > > > > > >  3 files changed, 23 insertions(+)
> > > > > > > > > > > > >
> > > > > > > > > > > > > diff --git
> > > > > > > > > > > > > a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > > > > > > > > b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > > > > > > > > > > > > index 

[PATCH 3/3] mkimage: fit: Free buf directly in fit_extract_data()

2020-04-18 Thread Bin Meng
From: Bin Meng 

If given ptr to free() is NULL, no operation is performed.
Hence we can just free buf directly in fit_extract_data().

Signed-off-by: Bin Meng 
---

 tools/fit_image.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 05c1f00..965061d 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -527,8 +527,7 @@ static int fit_extract_data(struct image_tool_params 
*params, const char *fname)
 err_munmap:
munmap(fdt, sbuf.st_size);
 err:
-   if (buf)
-   free(buf);
+   free(buf);
close(fd);
return ret;
 }
-- 
2.7.4



[PATCH 2/3] mkimage: fit: Unmmap the memory before closing fd in fit_import_data()

2020-04-18 Thread Bin Meng
From: Lihua Zhao 

Without calling munmap(), the follow-up call to open() the same file
with a flag O_TRUNC seems not to cause any issue on Linux, but it fails
on Windows with error like below:

Can't open kernel_fdt.itb.tmp: Permission denied

Fix this by unmapping the memory before closing fd in fit_import_data().

Signed-off-by: Lihua Zhao 
Signed-off-by: Bin Meng 
---

 tools/fit_image.c | 24 ++--
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index dd61a81..05c1f00 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -556,21 +556,21 @@ static int fit_import_data(struct image_tool_params 
*params, const char *fname)
fprintf(stderr, "%s: Failed to allocate memory (%d bytes)\n",
__func__, size);
ret = -ENOMEM;
-   goto err_has_fd;
+   goto err_munmap;
}
ret = fdt_open_into(old_fdt, fdt, size);
if (ret) {
debug("%s: Failed to expand FIT: %s\n", __func__,
  fdt_strerror(errno));
ret = -EINVAL;
-   goto err_has_fd;
+   goto err_munmap;
}
 
images = fdt_path_offset(fdt, FIT_IMAGES_PATH);
if (images < 0) {
debug("%s: Cannot find /images node: %d\n", __func__, images);
ret = -EINVAL;
-   goto err_has_fd;
+   goto err_munmap;
}
 
for (node = fdt_first_subnode(fdt, images);
@@ -591,10 +591,12 @@ static int fit_import_data(struct image_tool_params 
*params, const char *fname)
debug("%s: Failed to write property: %s\n", __func__,
  fdt_strerror(ret));
ret = -EINVAL;
-   goto err_has_fd;
+   goto err_munmap;
}
}
 
+   munmap(old_fdt, sbuf.st_size);
+
/* Close the old fd so we can re-use it. */
close(fd);
 
@@ -609,22 +611,24 @@ static int fit_import_data(struct image_tool_params 
*params, const char *fname)
fprintf(stderr, "%s: Can't open %s: %s\n",
params->cmdname, fname, strerror(errno));
ret = -EIO;
-   goto err_no_fd;
+   goto err;
}
if (write(fd, fdt, new_size) != new_size) {
debug("%s: Failed to write external data to file %s\n",
  __func__, strerror(errno));
ret = -EIO;
-   goto err_has_fd;
+   goto err;
}
 
-   ret = 0;
-
-err_has_fd:
+   free(fdt);
close(fd);
-err_no_fd:
+   return 0;
+
+err_munmap:
munmap(old_fdt, sbuf.st_size);
+err:
free(fdt);
+   close(fd);
return ret;
 }
 
-- 
2.7.4



[PATCH 1/3] tools: Remove the out-of-date MinGW support codes

2020-04-18 Thread Bin Meng
From: Bin Meng 

MinGW build for U-Boot tools has been broken for years. The official
support of Windows build is now MSYS2. Remove the MinGW support codes.

Signed-off-by: Bin Meng 
---

 README|  10 -
 tools/mingw_support.c | 113 --
 tools/mingw_support.h |  45 
 tools/os_support.c|   7 ++--
 tools/os_support.h|   3 --
 5 files changed, 3 insertions(+), 175 deletions(-)
 delete mode 100644 tools/mingw_support.c
 delete mode 100644 tools/mingw_support.h

diff --git a/README b/README
index 19dae14..d0af6c6 100644
--- a/README
+++ b/README
@@ -3186,16 +3186,6 @@ necessary. For example using the ELDK on a 4xx CPU, 
please enter:
$ CROSS_COMPILE=ppc_4xx-
$ export CROSS_COMPILE
 
-Note: If you wish to generate Windows versions of the utilities in
-  the tools directory you can use the MinGW toolchain
-  (http://www.mingw.org).  Set your HOST tools to the MinGW
-  toolchain and execute 'make tools'.  For example:
-
-   $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip 
tools
-
-  Binaries such as tools/mkimage.exe will be created which can
-  be executed on computers running Windows.
-
 U-Boot is intended to be simple to build. After installing the
 sources you must configure U-Boot for one specific board type. This
 is done by typing:
diff --git a/tools/mingw_support.c b/tools/mingw_support.c
deleted file mode 100644
index 2b17bf7..000
--- a/tools/mingw_support.c
+++ /dev/null
@@ -1,113 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2008 Extreme Engineering Solutions, Inc.
- *
- * mmap/munmap implementation derived from:
- * Clamav Native Windows Port : mmap win32 compatibility layer
- * Copyright (c) 2005-2006 Gianluigi Tiesi 
- * Parts by Kees Zeelenberg  (LibGW32C)
- */
-
-#include "mingw_support.h"
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-int fsync(int fd)
-{
-   return _commit(fd);
-}
-
-void *mmap(void *addr, size_t len, int prot, int flags, int fd, int offset)
-{
-   void *map = NULL;
-   HANDLE handle = INVALID_HANDLE_VALUE;
-   DWORD cfm_flags = 0, mvf_flags = 0;
-
-   switch (prot) {
-   case PROT_READ | PROT_WRITE:
-   cfm_flags = PAGE_READWRITE;
-   mvf_flags = FILE_MAP_ALL_ACCESS;
-   break;
-   case PROT_WRITE:
-   cfm_flags = PAGE_READWRITE;
-   mvf_flags = FILE_MAP_WRITE;
-   break;
-   case PROT_READ:
-   cfm_flags = PAGE_READONLY;
-   mvf_flags = FILE_MAP_READ;
-   break;
-   default:
-   return MAP_FAILED;
-   }
-
-   handle = CreateFileMappingA((HANDLE) _get_osfhandle(fd), NULL,
-   cfm_flags, HIDWORD(len), LODWORD(len), NULL);
-   if (!handle)
-   return MAP_FAILED;
-
-   map = MapViewOfFile(handle, mvf_flags, HIDWORD(offset),
-   LODWORD(offset), len);
-   CloseHandle(handle);
-
-   if (!map)
-   return MAP_FAILED;
-
-   return map;
-}
-
-int munmap(void *addr, size_t len)
-{
-   if (!UnmapViewOfFile(addr))
-   return -1;
-
-   return 0;
-}
-
-/* Reentrant string tokenizer.  Generic version.
-   Copyright (C) 1991,1996-1999,2001,2004,2007 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
- */
-
-/* Parse S into tokens separated by characters in DELIM.
-   If S is NULL, the saved pointer in SAVE_PTR is used as
-   the next starting point.  For example:
-   char s[] = "-abc-=-def";
-   char *sp;
-   x = strtok_r(s, "-", );  // x = "abc", sp = "=-def"
-   x = strtok_r(NULL, "-=", );  // x = "def", sp = NULL
-   x = strtok_r(NULL, "=", );   // x = NULL
-   // s = "abc\0-def\0"
-*/
-char *strtok_r(char *s, const char *delim, char **save_ptr)
-{
-   char *token;
-
-   if (s == NULL)
-   s = *save_ptr;
-
-   /* Scan leading delimiters.  */
-   s += strspn(s, delim);
-   if (*s == '\0') {
-   *save_ptr = s;
-   return NULL;
-   }
-
-   /* Find the end of the token.  */
-   token = s;
-   s = strpbrk (token, delim);
-   if (s == NULL) {
-   /* This token finishes the string.  */
-   *save_ptr = memchr(token, '\0', strlen(token));
-   } else {
-   /* Terminate the token and make *SAVE_PTR point past it.  */
-   *s = '\0';
-   *save_ptr = s + 1;
-   }
-   return token;
-}
-
-#include "getline.c"
diff --git a/tools/mingw_support.h b/tools/mingw_support.h
deleted file mode 100644
index e0b8ac3..000
--- a/tools/mingw_support.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/* SPDX-License-Identifier: LGPL-2.0+ */
-/*
- * Copyright 2008 Extreme Engineering Solutions, Inc.
- */
-
-#ifndef __MINGW_SUPPORT_H_
-#define __WINGW_SUPPORT_H_ 

Re: [PATCH v5 0/6] RISC-V DT related fixes for reserved memory & UEFI

2020-04-18 Thread Atish Patra
On Thu, Apr 16, 2020 at 7:27 PM Bin Meng  wrote:
>
> Hi Atish,
>
> On Fri, Apr 17, 2020 at 10:14 AM Bin Meng  wrote:
> >
> > Correct Palmer's email address
> >
> > On Fri, Apr 17, 2020 at 10:12 AM Bin Meng  wrote:
> > >
> > > Hi Rick,
> > >
> > > On Fri, Apr 17, 2020 at 9:12 AM Rick Chen  wrote:
> > > >
> > > > Hi Bin
> > > >
> > > > > Hi Rick,
> > > > >
> > > > > On Fri, Apr 17, 2020 at 8:51 AM Rick Chen  
> > > > > wrote:
> > > > > >
> > > > > >  於 2020年4月17日 週五 上午8:39寫道:
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > -Original Message-
> > > > > > > From: Atish Patra [mailto:ati...@atishpatra.org]
> > > > > > > Sent: Wednesday, April 15, 2020 7:18 AM
> > > > > > > To: Bin Meng
> > > > > > > Cc: Ard Biesheuvel; Heinrich Schuchardt; U-Boot Mailing List; 
> > > > > > > Anup Patel; Lukas Auer; Alexander Graf; Rick Jian-Zhi Chen(陳建志); 
> > > > > > > Palmer Dabbelt
> > > > > > > Subject: Re: [PATCH v5 0/6] RISC-V DT related fixes for reserved 
> > > > > > > memory & UEFI
> > > > > > >
> > > > > > > On Mon, Apr 13, 2020 at 3:42 PM Bin Meng  
> > > > > > > wrote:
> > > > > > > >
> > > > > > > > Hi Atish,
> > > > > > > >
> > > > > > > > On Tue, Apr 14, 2020 at 6:02 AM Atish Patra 
> > > > > > > >  wrote:
> > > > > > > > >
> > > > > > > > > On Tue, Apr 7, 2020 at 10:35 AM Atish Patra 
> > > > > > > > >  wrote:
> > > > > > > > > >
> > > > > > > > > > On Mon, Apr 6, 2020 at 11:51 PM Ard Biesheuvel
> > > > > > > > > >  wrote:
> > > > > > > > > > >
> > > > > > > > > > > On Tue, 7 Apr 2020 at 08:46, Heinrich Schuchardt 
> > > > > > > > > > >  wrote:
> > > > > > > > > > > >
> > > > > > > > > > > > On 4/6/20 11:01 PM, Ard Biesheuvel wrote:
> > > > > > > > > > > > > On Mon, 6 Apr 2020 at 22:45, Atish Patra 
> > > > > > > > > > > > >  wrote:
> > > > > > > > > > > > >>
> > > > > > > > > > > > >> This series adds few DT related fixes required for 
> > > > > > > > > > > > >> Linux
> > > > > > > > > > > > >> EFI stub to work on RISC-V.
> > > > > > > > > > > > >>
> > > > > > > > > > > > >
> > > > > > > > > > > > > I'm not sure how this is supposed to work, since DT 
> > > > > > > > > > > > > reserved
> > > > > > > > > > > > > memory regions are not used by EFI. If you want to 
> > > > > > > > > > > > > reserve
> > > > > > > > > > > > > memory on a UEFI system, you have to reserve it in 
> > > > > > > > > > > > > the UEFI memory map from firmware.
> > > > > > > > > > > > > The DT reserved-memory node is taken into account too 
> > > > > > > > > > > > > late,
> > > > > > > > > > > > > the /memreserve/ entries are ignored entirely.
> > > > > > > > > > > >
> > > > > > > > > > > > Hello Ard,
> > > > > > > > > > > >
> > > > > > > > > > > > thanks for reviewing.
> > > > > > > > > > > >
> > > > > > > > > > > > What do you mean by "The DT reserved-memory node is 
> > > > > > > > > > > > taken into
> > > > > > > > > > > > account too late"?
> > > > > > > > > > > >
> > > > > > > > > > > > Cf. commit 7be64b885a36 ("cmd: bootefi: Parse 
> > > > > > > > > > > > reserved-memory
> > > > > > > > > > > > node from DT")
> > > > > > > > > > > >
> > > > > > > > > > >
> > > > > > > > > > > What I mean is that the EFI stub in Linux uses memory 
> > > > > > > > > > > allocation
> > > > > > > > > > > functions, expecting the firmware to ensure that those
> > > > > > > > > > > allocations do not conflict with memory descriptions and
> > > > > > > > > > > reservations in DT. So if the firmware wants to express 
> > > > > > > > > > > this
> > > > > > > > > > > redundantly, by passing reservations in both 
> > > > > > > > > > > reserved-memory and
> > > > > > > > > > > in the EFI memory map, that is probably fine.
> > > > > > > > > > >
> > > > > > > > > > > Also, I must sheepishly admit that I only realize now 
> > > > > > > > > > > that this
> > > > > > > > > > > patch set is against u-boot not Linux :-)
> > > > > > > > > > >
> > > > > > > > > > :)
> > > > > > > > > >
> > > > > > > > > > > So if fixed reserved-memory regions are only being used 
> > > > > > > > > > > to seed
> > > > > > > > > > > the reserved regions in the EFI memory map, you can 
> > > > > > > > > > > safely ignore me.
> > > > > > > > > >
> > > > > > > > > > Yeah. That's the purpose. Having reserved memory nodes in 
> > > > > > > > > > the
> > > > > > > > > > final DT used by linux also ensures that proper Linux adds a
> > > > > > > > > > reserved memory block or removes it from memblock entries
> > > > > > > > > > depending on "no-map" property.
> > > > > > > > > >
> > > > > > > > > > > Apologies for the noise.
> > > > > > > > > >
> > > > > > > > > >
> > > > > > > > > >
> > > > > > > > > > --
> > > > > > > > > > Regards,
> > > > > > > > > > Atish
> > > > > > > > >
> > > > > > > > > Any other comments on the series ? It would be great if this 
> > > > > > > > > series
> > > > > > > > > could be merged before
> > > > > > > > > v2020.07 release.
> > > > > > > >
> > > > > > > > I hope so if no one objects the proposed solution here in 
> > > > > > > > U-Boot vs.
> > > > 

[RESEND PATCH v5 6/6] riscv: Move all fdt fixups together

2020-04-18 Thread Atish Patra
Keep all the fdt fixups together for better code management.

Signed-off-by: Atish Patra 
Reviewed-by: Bin Meng 
---
 arch/riscv/lib/bootm.c | 33 -
 arch/riscv/lib/fdt_fixup.c | 33 +
 2 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 8ff8db6bf533..0d06095da11a 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -26,39 +26,6 @@ __weak void board_quiesce_devices(void)
 {
 }
 
-int arch_fixup_fdt(void *blob)
-{
-   int err;
-#ifdef CONFIG_EFI_LOADER
-   u32 size;
-   int chosen_offset;
-
-   size = fdt_totalsize(blob);
-   err  = fdt_open_into(blob, blob, size + 32);
-   if (err < 0) {
-   printf("Device Tree can't be expanded to accommodate new node");
-   return err;
-   }
-   chosen_offset = fdt_path_offset(blob, "/chosen");
-   if (chosen_offset < 0) {
-   err = fdt_add_subnode(blob, 0, "chosen");
-   if (err < 0) {
-   printf("chosen node can not be added\n");
-   return err;
-   }
-   }
-   /* Overwrite the boot-hartid as U-Boot is the last stage BL */
-   fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
-#endif
-
-   /* Copy the reserved-memory node to the DT used by OS */
-   err = riscv_fdt_copy_resv_mem_node(gd->fdt_blob, blob);
-   if (err < 0)
-   return err;
-
-   return 0;
-}
-
 /**
  * announce_and_cleanup() - Print message and prepare for kernel boot
  *
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index af12e484db9b..20e0759f135b 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -115,3 +115,36 @@ int board_fix_fdt(void *fdt)
return 0;
 }
 #endif
+
+int arch_fixup_fdt(void *blob)
+{
+   int err;
+#ifdef CONFIG_EFI_LOADER
+   u32 size;
+   int chosen_offset;
+
+   size = fdt_totalsize(blob);
+   err  = fdt_open_into(blob, blob, size + 32);
+   if (err < 0) {
+   printf("Device Tree can't be expanded to accommodate new node");
+   return err;
+   }
+   chosen_offset = fdt_path_offset(blob, "/chosen");
+   if (chosen_offset < 0) {
+   err = fdt_add_subnode(blob, 0, "chosen");
+   if (err < 0) {
+   printf("chosen node can not be added\n");
+   return err;
+   }
+   }
+   /* Overwrite the boot-hartid as U-Boot is the last stage BL */
+   fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
+#endif
+
+   /* Copy the reserved-memory node to the DT used by OS */
+   err = riscv_fdt_copy_resv_mem_node(gd->fdt_blob, blob);
+   if (err < 0)
+   return err;
+
+   return 0;
+}
-- 
2.25.1



[RESEND PATCH v5 5/6] riscv: Copy the reserved-memory nodes to final DT

2020-04-18 Thread Atish Patra
The DT used by U-Boot may be different from the DT being passed to
the OS if the DT is loaded from external media such as network or
mmc. In that case, the reserved-memory node needs to be copied to
the DT passed to the OS.

Signed-off-by: Atish Patra 
Reviewed-by: Bin Meng 
---
 arch/riscv/lib/bootm.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 87cadad5016d..8ff8db6bf533 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -28,8 +28,8 @@ __weak void board_quiesce_devices(void)
 
 int arch_fixup_fdt(void *blob)
 {
-#ifdef CONFIG_EFI_LOADER
int err;
+#ifdef CONFIG_EFI_LOADER
u32 size;
int chosen_offset;
 
@@ -50,6 +50,12 @@ int arch_fixup_fdt(void *blob)
/* Overwrite the boot-hartid as U-Boot is the last stage BL */
fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
 #endif
+
+   /* Copy the reserved-memory node to the DT used by OS */
+   err = riscv_fdt_copy_resv_mem_node(gd->fdt_blob, blob);
+   if (err < 0)
+   return err;
+
return 0;
 }
 
-- 
2.25.1



[RESEND PATCH v5 3/6] riscv: Provide a mechanism to fix DT for reserved memory

2020-04-18 Thread Atish Patra
In RISC-V, M-mode software can reserve physical memory regions
by setting appropriate physical memory protection (PMP) csr. As the
PMP csr are accessible only in M-mode, S-mode U-Boot can not read
this configuration directly. However, M-mode software can pass this
information via reserved-memory node in device tree so that S-mode
software can access this information.

This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.

Signed-off-by: Atish Patra 
---
 arch/riscv/cpu/start.S|   1 +
 arch/riscv/include/asm/global_data.h  |   1 +
 arch/riscv/include/asm/u-boot-riscv.h |   2 +
 arch/riscv/lib/Makefile   |   1 +
 arch/riscv/lib/asm-offsets.c  |   1 +
 arch/riscv/lib/fdt_fixup.c| 102 ++
 6 files changed, 108 insertions(+)
 create mode 100644 arch/riscv/lib/fdt_fixup.c

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 6b3ff99c3882..0282685c2906 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -121,6 +121,7 @@ call_board_init_f_0:
 
jal board_init_f_init_reserve
 
+   SREGs1, GD_FIRMWARE_FDT_ADDR(gp)
/* save the boot hart id to global_data */
SREGtp, GD_BOOT_HART(gp)
 
diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index b74bd7e738bb..51ac8d1c98e2 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -15,6 +15,7 @@
 /* Architecture-specific global data */
 struct arch_global_data {
long boot_hart; /* boot hart id */
+   phys_addr_t firmware_fdt_addr;
 #ifdef CONFIG_SIFIVE_CLINT
void __iomem *clint;/* clint base address */
 #endif
diff --git a/arch/riscv/include/asm/u-boot-riscv.h 
b/arch/riscv/include/asm/u-boot-riscv.h
index 49febd588102..543a1688db8f 100644
--- a/arch/riscv/include/asm/u-boot-riscv.h
+++ b/arch/riscv/include/asm/u-boot-riscv.h
@@ -17,5 +17,7 @@ int cleanup_before_linux(void);
 /* board/.../... */
 int board_init(void);
 void board_quiesce_devices(void);
+int riscv_board_reserved_mem_fixup(void *fdt);
+int riscv_fdt_copy_resv_mem_node(const void *src_fdt, void *dest_fdt);
 
 #endif /* _U_BOOT_RISCV_H_ */
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index adadbf4bcbef..d132b59ce32c 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -24,6 +24,7 @@ obj-y += reset.o
 obj-y   += setjmp.o
 obj-$(CONFIG_SMP) += smp.o
 obj-$(CONFIG_SPL_BUILD)+= spl.o
+obj-y   += fdt_fixup.o
 
 # For building EFI apps
 CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI)
diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
index 4fa4fd371473..7301c1b98e23 100644
--- a/arch/riscv/lib/asm-offsets.c
+++ b/arch/riscv/lib/asm-offsets.c
@@ -14,6 +14,7 @@
 int main(void)
 {
DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
+   DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, arch.firmware_fdt_addr));
 #ifndef CONFIG_XIP
DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
 #endif
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
new file mode 100644
index ..1fce41490973
--- /dev/null
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates
+ *
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * riscv_fdt_copy_resv_mem_node() - Copy reserve memory node entry
+ * @src: Pointer to the source device tree from which reserved memory node
+ *  needs to be copied.
+ * @dst: Pointer to the destination device tree to which reserved memory node
+ *  needs to be copied.
+ *
+ * Return: 0 on success or if source doesn't have reserved memory node.
+ *Error if copy process failed.
+ */
+int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
+{
+   u32 phandle;
+   struct fdt_memory pmp_mem;
+   fdt_addr_t addr;
+   fdt_size_t size;
+   int offset, node, err, rmem_offset;
+   bool nomap = true;
+   char basename[32] = {0};
+   int bname_len;
+   int max_len = sizeof(basename);
+   const char *name;
+   char *temp;
+
+   offset = fdt_path_offset(src, "/reserved-memory");
+   if (offset < 0) {
+   printf("No reserved memory region found in source FDT\n");
+   return 0;
+   }
+
+   fdt_for_each_subnode(node, src, offset) {
+   name = fdt_get_name(src, node, NULL);
+
+   addr = fdtdec_get_addr_size_auto_noparent(src, node,
+ "reg", 0, ,
+ false);
+   if (addr == FDT_ADDR_T_NONE) {
+   debug("failed to read address/size for %s\n", name);
+  

[RESEND PATCH v5 1/6] riscv: Add boot hartid to Device tree

2020-04-18 Thread Atish Patra
Linux booting protocol mandates that register "a0" contains the hartid.
However, U-boot can not pass the hartid via a0 during via standard UEFI
protocol. DT nodes are commonly used to pass such information to the OS.

Add a DT node under chosen node to indicate the boot hartid. EFI stub
in Linux kernel will parse this node and pass it to the real kernel
in "a0" before jumping to it.

Signed-off-by: Atish Patra 
Reviewed-by: Rick Chen 
Tested-by: Heinrich Schuchardt 
---
 arch/riscv/lib/bootm.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index fad16901c5f2..87cadad5016d 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -28,6 +28,28 @@ __weak void board_quiesce_devices(void)
 
 int arch_fixup_fdt(void *blob)
 {
+#ifdef CONFIG_EFI_LOADER
+   int err;
+   u32 size;
+   int chosen_offset;
+
+   size = fdt_totalsize(blob);
+   err  = fdt_open_into(blob, blob, size + 32);
+   if (err < 0) {
+   printf("Device Tree can't be expanded to accommodate new node");
+   return err;
+   }
+   chosen_offset = fdt_path_offset(blob, "/chosen");
+   if (chosen_offset < 0) {
+   err = fdt_add_subnode(blob, 0, "chosen");
+   if (err < 0) {
+   printf("chosen node can not be added\n");
+   return err;
+   }
+   }
+   /* Overwrite the boot-hartid as U-Boot is the last stage BL */
+   fdt_setprop_u32(blob, chosen_offset, "boot-hartid", gd->arch.boot_hart);
+#endif
return 0;
 }
 
-- 
2.25.1



[RESEND PATCH v5 0/6] RISC-V DT related fixes for reserved memory & UEFI

2020-04-18 Thread Atish Patra
This series adds few DT related fixes required for Linux EFI stub to work
on RISC-V.

Patch 1 adds the boot hartid property under /chosen node. The related
discussion can be found here.

https://patchwork.ozlabs.org/patch/1233664/
https://lists.denx.de/pipermail/u-boot/2020-March/402085.html

Patch 2 fixes a generic issue in fdtdec related to reserved memory node.

Patch 3,4,5 provide one of the option to update reserved-memory node for next
stage. It depends on master OpenSBI branch.

The other options are SBI extension and trap/emulate on PMP csr access.
The detaild discussion can be found here.
https://github.com/riscv/riscv-sbi-doc/pull/37

Patch 1 & 2 can be applied independently from 3 and 4. I want to keep all
the patches together to provide a holistic view of changes required for
RISC-V UEFI.

Changes v4->v5:
1. Added comments for new functions.

Changes v3->v4:
1. Dropped generic efi fix patch as it is already merged.
2. Moved all the fdt fixups to a common file.
3. Addressed few nit comments.

Changes from v2->v3:
1. Update the DT meant for OS if it is different from the one used by U-Boot
2. Use different FDT api to obtain "reg" address & size to honor the cell count.

Changes from v1->v2:
1. Fix the issue if chosen node is not present.

Changes from previous version:
1. Renamed the DT node property to "boot-hartid" from "efi-boot-hartid".
2. Changed the property type to u32 instead of u64 for RV32 compatibility.

Atish Patra (6):
riscv: Add boot hartid to Device tree
fdtdec: Fix boundary check
riscv: Provide a mechanism to fix DT for reserved memory
riscv: Setup reserved-memory node for FU540
riscv: Copy the reserved-memory nodes to final DT
riscv: Move all fdt fixups together

arch/riscv/cpu/start.S|   1 +
arch/riscv/include/asm/global_data.h  |   1 +
arch/riscv/include/asm/u-boot-riscv.h |   2 +
arch/riscv/lib/Makefile   |   1 +
arch/riscv/lib/asm-offsets.c  |   1 +
arch/riscv/lib/bootm.c|   5 -
arch/riscv/lib/fdt_fixup.c| 150 ++
configs/sifive_fu540_defconfig|   1 +
lib/fdtdec.c  |   3 +-
9 files changed, 159 insertions(+), 6 deletions(-)
create mode 100644 arch/riscv/lib/fdt_fixup.c

--
2.25.1



[RESEND PATCH v5 4/6] riscv: Setup reserved-memory node for FU540

2020-04-18 Thread Atish Patra
FU540 uses OF_SEPARATE instead of OF_PRIOR.

Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.

Signed-off-by: Atish Patra 
---
 arch/riscv/lib/fdt_fixup.c | 15 +++
 configs/sifive_fu540_defconfig |  1 +
 2 files changed, 16 insertions(+)

diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index 1fce41490973..af12e484db9b 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -100,3 +100,18 @@ int riscv_board_reserved_mem_fixup(void *fdt)
 
return 0;
 }
+
+#ifdef CONFIG_OF_BOARD_FIXUP
+int board_fix_fdt(void *fdt)
+{
+   int err;
+
+   err = riscv_board_reserved_mem_fixup(fdt);
+   if (err < 0) {
+   printf("failed to fixup DT for reserved memory: %d\n", err);
+   return err;
+   }
+
+   return 0;
+}
+#endif
diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
index 6d61e6c960ee..8fb3794cd578 100644
--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
@@ -12,3 +12,4 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
+CONFIG_OF_BOARD_FIXUP=y
-- 
2.25.1



[RESEND PATCH v5 2/6] fdtdec: Fix boundary check

2020-04-18 Thread Atish Patra
In U-Boot, the reserved memory end address is considered as a inclusive
address. This notion is followed while adding a reserved memory node to
the DT.

For example:
end_address = start_address + size - 1

Follow the same notion and fix the end address computation while checking
for existing nodes.

Signed-off-by: Atish Patra 
---
 lib/fdtdec.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index eb11fc898e30..07ba9f5c97e9 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1311,7 +1311,8 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
continue;
}
 
-   if (addr == carveout->start && (addr + size) == carveout->end) {
+   if (addr == carveout->start && (addr + size - 1) ==
+   carveout->end) {
if (phandlep)
*phandlep = fdt_get_phandle(blob, node);
return 0;
-- 
2.25.1



[PATCH 3/3] common/board_r: Drop initr_bedbug wrapper

2020-04-18 Thread Ovidiu Panait
Drop initr_bedbug wrapper and call bedbug_init directly during the init
sequence.

Signed-off-by: Ovidiu Panait 
---
 common/board_r.c | 11 +--
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index bdb0389e31..d9015cd057 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -637,15 +637,6 @@ int initr_mem(void)
 }
 #endif
 
-#ifdef CONFIG_CMD_BEDBUG
-static int initr_bedbug(void)
-{
-   bedbug_init();
-
-   return 0;
-}
-#endif
-
 static int run_main_loop(void)
 {
 #ifdef CONFIG_SANDBOX
@@ -848,7 +839,7 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 #ifdef CONFIG_CMD_BEDBUG
INIT_FUNC_WATCHDOG_RESET
-   initr_bedbug,
+   bedbug_init,
 #endif
 #if defined(CONFIG_PRAM)
initr_mem,
-- 
2.17.1



[PATCH 2/3] cmd/bedbug.c: Make bedbug_init have a return value

2020-04-18 Thread Ovidiu Panait
Do this as a preparation for removing initr_bedbug wrapper from
common/board_r.c.

Signed-off-by: Ovidiu Panait 
---
 cmd/bedbug.c  | 4 ++--
 include/bedbug/type.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/cmd/bedbug.c b/cmd/bedbug.c
index 9fee528830..7cb6378352 100644
--- a/cmd/bedbug.c
+++ b/cmd/bedbug.c
@@ -44,10 +44,10 @@ int bedbug_puts (const char *str)
  * settings.
  * == */
 
-void bedbug_init (void)
+int bedbug_init (void)
 {
/* -- */
-   return;
+   return 0;
 }  /* bedbug_init */
 
 
diff --git a/include/bedbug/type.h b/include/bedbug/type.h
index b7b447b1fe..5008b40ca8 100644
--- a/include/bedbug/type.h
+++ b/include/bedbug/type.h
@@ -3,7 +3,7 @@
 
 /* Supporting routines */
 int bedbug_puts (const char *);
-void bedbug_init (void);
+int bedbug_init (void);
 void bedbug860_init (void);
 void do_bedbug_breakpoint (struct pt_regs *);
 void bedbug_main_loop (unsigned long, struct pt_regs *);
-- 
2.17.1



[PATCH 1/3] common/board_r: arm: Merge initr_enable_interrupts into interrupts_init

2020-04-18 Thread Ovidiu Panait
initr_enable_interrupts() is an ARM-specific wrapper over enable_interrupts(),
which is run during the common init sequence. It can be eliminated by moving
the enable_interrupts() call to the end of interrupt_init() function, in
arch/arm/lib/interrupts*.c.

Signed-off-by: Ovidiu Panait 
---
 arch/arm/lib/interrupts.c|  2 ++
 arch/arm/lib/interrupts_64.c |  2 ++
 arch/arm/lib/interrupts_m.c  |  2 ++
 common/board_r.c | 12 
 4 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 6dbf03b00c..36299d6e54 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -34,6 +34,8 @@ int interrupt_init(void)
 */
IRQ_STACK_START_IN = gd->irq_sp + 8;
 
+   enable_interrupts();
+
return 0;
 }
 
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index dffdf57aa2..a2df7cf193 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -13,6 +13,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int interrupt_init(void)
 {
+   enable_interrupts();
+
return 0;
 }
 
diff --git a/arch/arm/lib/interrupts_m.c b/arch/arm/lib/interrupts_m.c
index 1f6fdf2995..2ae1c5ba76 100644
--- a/arch/arm/lib/interrupts_m.c
+++ b/arch/arm/lib/interrupts_m.c
@@ -31,6 +31,8 @@ struct autosave_regs {
 
 int interrupt_init(void)
 {
+   enable_interrupts();
+
return 0;
 }
 
diff --git a/common/board_r.c b/common/board_r.c
index 0bbeaa7594..bdb0389e31 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -518,15 +518,6 @@ static int initr_api(void)
 }
 #endif
 
-/* enable exceptions */
-#ifdef CONFIG_ARM
-static int initr_enable_interrupts(void)
-{
-   enable_interrupts();
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_CMD_NET
 static int initr_ethaddr(void)
 {
@@ -813,9 +804,6 @@ static init_fnc_t init_sequence_r[] = {
initr_kgdb,
 #endif
interrupt_init,
-#ifdef CONFIG_ARM
-   initr_enable_interrupts,
-#endif
 #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
timer_init, /* initialize timer */
 #endif
-- 
2.17.1