Re: 32bit GRUB on RISC-V
On Fri, Jul 02, 2021 at 03:53:28AM +0200, Heinrich Schuchardt wrote: > Hello Tom, > > the RISC-V platform specification has a profile OS-A for running rich > operating systems like Linux and BSD. This profile requires 64bit and UEFI > conforming to the EBBR. Only the 'embedded' profile may use 32bit. This > obsoletes 32bit GRUB on RISC-V. OK, thanks, I'll v4 and non-RFC updating the toolchains and dropping grub for riscv32 with it. -- Tom signature.asc Description: PGP signature
32bit GRUB on RISC-V
Hello Tom, the RISC-V platform specification has a profile OS-A for running rich operating systems like Linux and BSD. This profile requires 64bit and UEFI conforming to the EBBR. Only the 'embedded' profile may use 32bit. This obsoletes 32bit GRUB on RISC-V. Best regards Heinrich
Re: iMX8MM USB support?
Tim,
On Thu, Jul 1, 2021 at 10:13 PM Fabio Estevam wrote:
>
> On Thu, Jul 1, 2021 at 9:49 PM Tim Harvey wrote:
>
> > By the way, I took a quick stab at enabling SDP on
> > imx8mm-venice-gw73xx-0x and found compile issues so I configured for
> > an imx8mm_evk using your diffs and hit the same issues.
> >
> > drivers/usb/host/ehci-mx6.c: In function ‘ehci_hcd_init’:
> > drivers/usb/host/ehci-mx6.c:360:46: error: ‘USB_BASE_ADDR’ undeclared
>
> Ah, now that I try to enable SDP I see these errors too. To fix this
> error we need:
> https://git.kontron-electronics.de/linux/u-boot/-/commit/975e36c71164483a7c690e81126f77f6de482378.patch
>
> This one is also needed:
> https://git.kontron-electronics.de/linux/u-boot/-/commit/344c83522650ef8d8ea6c12c6a8209e54f0f31e6.patch
>
>
> > (first use in this function); did you mean ‘SRC_BASE_ADDR’?
> > struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR +
> > ^
> > SRC_BASE_ADDR
> > drivers/usb/host/ehci-mx6.c:360:46: note: each undeclared identifier
> > is reported only once for each function it appears in
> > drivers/usb/host/ehci-mx6.c:361:4: error: ‘controller_spacing’
>
> I need to check on this one.
Attached is a diff with all the changes that allow building SDP
support for imx8mm_evk.
But I still get:
U-Boot SPL 2021.07-rc5-2-g5f269bf8bd14-dirty (Jul 01 2021 - 22:28:29 -0300)
WDT: Not starting
SPL: Unsupported Boot Device!
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Please let me know if you get any progress with SDP.
Thanks
From e7cc6989bd69eb0d346ae06023bb4525d4fc6858 Mon Sep 17 00:00:00 2001
From: Fabio Estevam
Date: Thu, 1 Jul 2021 22:33:12 -0300
Subject: [PATCH] imx8mmgadgetsdp
Signed-off-by: Fabio Estevam
---
arch/arm/include/asm/arch-imx8m/clock.h| 1 +
arch/arm/include/asm/arch-imx8m/imx-regs.h | 11 +
arch/arm/mach-imx/imx8m/clock_imx8mm.c | 16 +++
configs/imx8mm_evk_defconfig | 27 +++
drivers/usb/host/ehci-mx6.c| 54 +-
5 files changed, 78 insertions(+), 31 deletions(-)
diff --git a/arch/arm/include/asm/arch-imx8m/clock.h b/arch/arm/include/asm/arch-imx8m/clock.h
index 77d9428a188a..fcd111c918fd 100644
--- a/arch/arm/include/asm/arch-imx8m/clock.h
+++ b/arch/arm/include/asm/arch-imx8m/clock.h
@@ -276,3 +276,4 @@ int enable_i2c_clk(unsigned char enable, unsigned int i2c_num);
int set_clk_enet(enum enet_freq type);
int set_clk_eqos(enum enet_freq type);
void hab_caam_clock_enable(unsigned char enable);
+void enable_usboh3_clk(unsigned char enable);
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index b800da13a1e4..de01e9969626 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -51,6 +51,17 @@
#define TZASC_BASE_ADDR 0x32F8
+#ifdef CONFIG_IMX8MM
+#define USB1_BASE_ADDR 0x32E4
+#define USB2_BASE_ADDR 0x32E5
+#else
+#define USB1_BASE_ADDR 0x3810
+#define USB2_BASE_ADDR 0x3820
+#endif
+#define USB_BASE_ADDR USB1_BASE_ADDR
+#define USB1_PHY_BASE_ADDR 0x381F
+#define USB2_PHY_BASE_ADDR 0x382F
+
#define MXS_LCDIF_BASE IS_ENABLED(CONFIG_IMX8MQ) ? \
0x3032 : 0x32e0
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index f8e4ec0d9052..dd40e2f1e772 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -277,6 +277,22 @@ int intpll_configure(enum pll_clocks pll, ulong freq)
return 0;
}
+void enable_usboh3_clk(unsigned char enable)
+{
+ if (enable) {
+ clock_enable(CCGR_USB_MSCALE_PL301, 0);
+ /* 500M */
+ clock_set_target_val(USB_BUS_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1));
+ /* 100M */
+ clock_set_target_val(USB_CORE_REF_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1));
+ /* 100M */
+ clock_set_target_val(USB_PHY_REF_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1));
+ clock_enable(CCGR_USB_MSCALE_PL301, 1);
+ } else {
+ clock_enable(CCGR_USB_MSCALE_PL301, 0);
+ }
+}
+
void init_uart_clk(u32 index)
{
/*
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index a06c6f9794ac..88a95a4fe5b5 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -85,3 +85,30 @@ CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_WATCHDOG=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_LAN75XX=y
+CONFIG_USB_ETHER_LAN78XX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_GADGET=y
Re: iMX8MM USB support?
On Thu, Jul 1, 2021 at 9:49 PM Tim Harvey wrote: > By the way, I took a quick stab at enabling SDP on > imx8mm-venice-gw73xx-0x and found compile issues so I configured for > an imx8mm_evk using your diffs and hit the same issues. > > drivers/usb/host/ehci-mx6.c: In function ‘ehci_hcd_init’: > drivers/usb/host/ehci-mx6.c:360:46: error: ‘USB_BASE_ADDR’ undeclared Ah, now that I try to enable SDP I see these errors too. To fix this error we need: https://git.kontron-electronics.de/linux/u-boot/-/commit/975e36c71164483a7c690e81126f77f6de482378.patch This one is also needed: https://git.kontron-electronics.de/linux/u-boot/-/commit/344c83522650ef8d8ea6c12c6a8209e54f0f31e6.patch > (first use in this function); did you mean ‘SRC_BASE_ADDR’? > struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR + > ^ > SRC_BASE_ADDR > drivers/usb/host/ehci-mx6.c:360:46: note: each undeclared identifier > is reported only once for each function it appears in > drivers/usb/host/ehci-mx6.c:361:4: error: ‘controller_spacing’ I need to check on this one. Thanks
Re: [PATCH 2/3] usb: ehci-mx6: add IMX8MM OTG support
Hi Tim, On Tue, Apr 27, 2021 at 10:55 PM Tim Harvey wrote: > I will re-submit and add is_imx8mn() that's what the NXP > downstream u-boot does as well. When you re-submit this, please add: Tested-by: Fabio Estevam USB gadget works now on imx8mm-evk. Thanks
Re: iMX8MM USB support?
Hi Tim, On Thu, Jul 1, 2021 at 9:49 PM Tim Harvey wrote: > Yes, this works on my board. I just sent a v2 of these patches (cc'd you). I have just tried "ums 0 mmc 1" and it works on a imx8mm-evk now after applying your patches, thanks! > By the way, I took a quick stab at enabling SDP on > imx8mm-venice-gw73xx-0x and found compile issues so I configured for > an imx8mm_evk using your diffs and hit the same issues. > > drivers/usb/host/ehci-mx6.c: In function ‘ehci_hcd_init’: > drivers/usb/host/ehci-mx6.c:360:46: error: ‘USB_BASE_ADDR’ undeclared > (first use in this function); did you mean ‘SRC_BASE_ADDR’? > struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR + > ^ > SRC_BASE_ADDR > drivers/usb/host/ehci-mx6.c:360:46: note: each undeclared identifier > is reported only once for each function it appears in > drivers/usb/host/ehci-mx6.c:361:4: error: ‘controller_spacing’ > undeclared (first use in this function); did you mean ‘console_start’? >(controller_spacing * index)); > ^~ > ... > > The above is resolved with CONFIG_DM_USB=y and CONFIG_SPL_DM_USB=y > > After enabling those I just run into other issues with things such as: > WARNING 'mkimage.flash.mkimage' not found, resulting binary is not-functional > ... > aarch64-linux-ld.bfd: cmd/nvedit.o: in function `env_match': > /usr/src/venice/uboot-master/cmd/nvedit.c:824: undefined reference to > `env_get_char' > aarch64-linux-ld.bfd: /usr/src/venice/uboot-master/cmd/nvedit.c:828: > undefined reference to `env_get_char' > ... > > What branch were you working with here? I tried the above with v2021.07-rc5 I am also testing against 2021.07-rc5. Please see the complete diff (your patches + imx8mm_evk defconfig changes against 2021.07-rc5): https://pastebin.com/raw/BtCD0xat Now the missing part is SDP. Hopefully we can get SDK working too. Thanks!
Re: [PATCH 1/3] usb: ehci-mx6: move mode set/detect to probe
On Thu, Jul 1, 2021 at 5:41 PM Fabio Estevam wrote: > > Hi Tim. > > On Thu, Jun 3, 2021 at 12:50 PM Tim Harvey wrote: > > > Marek, > > > > Is there something you want me to change here? > > > > I am happy to test gadget support as my board has an OTG connector. > > Could you give me some pointers on how to configure a gadget in U-Boot > > in order to test? > > One quick way to test gadget support is via the "ums 0 mmc 0" command. > > This will mount the eMMC content via USB mass storage device on the PC. > > You can check configs/warp7_defconfig for an example on how to select > the USB gadget options. > > I applied this one and tested on a imx7s-warp board via "ums 0 mmc 0". > > Tested-by: Fabio Estevam > > I am interested in getting USB gadget support in imx8mm too. > Fabio, Right - I finally remembered that earlier today and just sent a v2 of this series showing that I indeed tested that on both imx6q and imx8mm. When you get a chance please show your Tested-by on that thread. Tim
Re: iMX8MM USB support?
On Thu, Jul 1, 2021 at 5:36 PM Fabio Estevam wrote: > > Hi Tim, > > On Thu, Jul 1, 2021 at 8:58 PM Tim Harvey wrote: > > > Fabio, > > > > I no longer have the patches/config around and am not sure I even have > > a working imx8mm-evk anymore. > > > > Do you have the patches I submitted to enable USB OTG in general on IMX8MM? > > usb: ehci-mx6: add IMX8MM and IMX8MN OTG support > > usb: ehci-mx6: move mode set/detect to probe > > Thanks for pointing out these patches. Does "ums 0 mmc 0" work for you? > Yes, this works on my board. I just sent a v2 of these patches (cc'd you). By the way, I took a quick stab at enabling SDP on imx8mm-venice-gw73xx-0x and found compile issues so I configured for an imx8mm_evk using your diffs and hit the same issues. drivers/usb/host/ehci-mx6.c: In function ‘ehci_hcd_init’: drivers/usb/host/ehci-mx6.c:360:46: error: ‘USB_BASE_ADDR’ undeclared (first use in this function); did you mean ‘SRC_BASE_ADDR’? struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR + ^ SRC_BASE_ADDR drivers/usb/host/ehci-mx6.c:360:46: note: each undeclared identifier is reported only once for each function it appears in drivers/usb/host/ehci-mx6.c:361:4: error: ‘controller_spacing’ undeclared (first use in this function); did you mean ‘console_start’? (controller_spacing * index)); ^~ ... The above is resolved with CONFIG_DM_USB=y and CONFIG_SPL_DM_USB=y After enabling those I just run into other issues with things such as: WARNING 'mkimage.flash.mkimage' not found, resulting binary is not-functional ... aarch64-linux-ld.bfd: cmd/nvedit.o: in function `env_match': /usr/src/venice/uboot-master/cmd/nvedit.c:824: undefined reference to `env_get_char' aarch64-linux-ld.bfd: /usr/src/venice/uboot-master/cmd/nvedit.c:828: undefined reference to `env_get_char' ... What branch were you working with here? I tried the above with v2021.07-rc5 Tim
Re: [PATCH 1/3] usb: ehci-mx6: move mode set/detect to probe
Hi Tim. On Thu, Jun 3, 2021 at 12:50 PM Tim Harvey wrote: > Marek, > > Is there something you want me to change here? > > I am happy to test gadget support as my board has an OTG connector. > Could you give me some pointers on how to configure a gadget in U-Boot > in order to test? One quick way to test gadget support is via the "ums 0 mmc 0" command. This will mount the eMMC content via USB mass storage device on the PC. You can check configs/warp7_defconfig for an example on how to select the USB gadget options. I applied this one and tested on a imx7s-warp board via "ums 0 mmc 0". Tested-by: Fabio Estevam I am interested in getting USB gadget support in imx8mm too. Thanks
Re: iMX8MM USB support?
Hi Tim, On Thu, Jul 1, 2021 at 8:58 PM Tim Harvey wrote: > Fabio, > > I no longer have the patches/config around and am not sure I even have > a working imx8mm-evk anymore. > > Do you have the patches I submitted to enable USB OTG in general on IMX8MM? > usb: ehci-mx6: add IMX8MM and IMX8MN OTG support > usb: ehci-mx6: move mode set/detect to probe Thanks for pointing out these patches. Does "ums 0 mmc 0" work for you? I will have a try. > I would like to get those patches accepted and I think there was some > concern that 'usb: ehci-mx6: move mode set/detect to probe' may break > gadget support. I have applied this one and tested on warp7 board via "ums 0 mmc 0" and it still works. > I haven't needed to use SDP in some time (we have JTAG programming > support for eMMC now). Let me see if I can get SDP working on > imx8mm-venice. Thanks, appreciate it. Regards, Fabio Estevam
Re: iMX8MM USB support?
On Thu, Jul 1, 2021 at 4:15 PM Fabio Estevam wrote: > > Hi Tim and Schrempf, > > On Fri, Apr 10, 2020 at 3:37 PM Tim Harvey wrote: > > > Frieder, > > > > My issue was that I forgot to set ATF_LOAD_ADDR=0x92! > > > > So I'm running now, booting imx8mm-evk via SDP using your USB patches > > and imx_usb configuration. > > Sorry for resurrecting such an old thread. > > I am trying to accomplish the same here: boot imx8mm-evk via SDP. > > I tried building Schremp's U-Boot from > https://git.kontron-electronics.de/linux/u-boot/-/commits/v2020.01-ktn > with the additional changes: > > --- a/configs/imx8mm_evk_defconfig > +++ b/configs/imx8mm_evk_defconfig > @@ -85,3 +85,14 @@ CONFIG_MXC_UART=y > CONFIG_SYSRESET=y > CONFIG_SYSRESET_PSCI=y > CONFIG_DM_THERMAL=y > +CONFIG_SPL_USB_HOST_SUPPORT=y > +CONFIG_SPL_USB_GADGET=y > +CONFIG_SPL_USB_SDP_SUPPORT=y > +CONFIG_SPL_WATCHDOG_SUPPORT=y > +CONFIG_USB=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_GADGET=y > +CONFIG_USB_GADGET_MANUFACTURER="FSL" > +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > +CONFIG_CI_UDC=y > diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h > index 991fe0056c4a..d41704d60754 100644 > --- a/include/configs/imx8mm_evk.h > +++ b/include/configs/imx8mm_evk.h > @@ -35,6 +35,11 @@ > > #endif > > +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET > +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) > +#define CONFIG_MXC_USB_FLAGS 0 > +#define CONFIG_USB_MAX_CONTROLLER_COUNT2 > + > /* Initial environment variables */ > #define CONFIG_EXTRA_ENV_SETTINGS \ > "script=boot.scr\0" \ > > > but I get the following error: > > U-Boot SPL 2020.01-01059-geb5a1eb17cea-dirty (Jul 01 2021 - 19:45:58 -0300) > Normal Boot > WDT: Not found! > SPL: Unsupported Boot Device! > SPL: failed to boot from all boot devices > ### ERROR ### Please RESET the board ### > > Tim, > > Do you still have the imx8mm-evk patches and mx8mm_usb_sdp_spl.conf > that you used? > > This version of U-Boot does not generate u-boot.itb by default, so I > passed the following > line in mx8mm_usb_sdp_spl.conf: > > .../u-boot/flash.bin:dcd,clear_dcd,plug,jump header > > Any help is appreciated. > > I plan to upstream this support once I get it resolved. > Fabio, I no longer have the patches/config around and am not sure I even have a working imx8mm-evk anymore. Do you have the patches I submitted to enable USB OTG in general on IMX8MM? usb: ehci-mx6: add IMX8MM and IMX8MN OTG support usb: ehci-mx6: move mode set/detect to probe I would like to get those patches accepted and I think there was some concern that 'usb: ehci-mx6: move mode set/detect to probe' may break gadget support. I haven't needed to use SDP in some time (we have JTAG programming support for eMMC now). Let me see if I can get SDP working on imx8mm-venice. Best regards, Tim
Re: iMX8MM USB support?
Hi Tim and Schrempf, On Fri, Apr 10, 2020 at 3:37 PM Tim Harvey wrote: > Frieder, > > My issue was that I forgot to set ATF_LOAD_ADDR=0x92! > > So I'm running now, booting imx8mm-evk via SDP using your USB patches > and imx_usb configuration. Sorry for resurrecting such an old thread. I am trying to accomplish the same here: boot imx8mm-evk via SDP. I tried building Schremp's U-Boot from https://git.kontron-electronics.de/linux/u-boot/-/commits/v2020.01-ktn with the additional changes: --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -85,3 +85,14 @@ CONFIG_MXC_UART=y CONFIG_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_DM_THERMAL=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 991fe0056c4a..d41704d60754 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -35,6 +35,11 @@ #endif +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT2 + /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ but I get the following error: U-Boot SPL 2020.01-01059-geb5a1eb17cea-dirty (Jul 01 2021 - 19:45:58 -0300) Normal Boot WDT: Not found! SPL: Unsupported Boot Device! SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Tim, Do you still have the imx8mm-evk patches and mx8mm_usb_sdp_spl.conf that you used? This version of U-Boot does not generate u-boot.itb by default, so I passed the following line in mx8mm_usb_sdp_spl.conf: .../u-boot/flash.bin:dcd,clear_dcd,plug,jump header Any help is appreciated. I plan to upstream this support once I get it resolved. Thanks, Fabio Estevam
Re: [RFC PATCH 2/2] global-data.h: add build-time sanity check of sizeof(struct global_data)
On Tue, May 18, 2021 at 11:19:47AM +0200, Rasmus Villemoes wrote: > The layout and contents of struct global_data depends on a lot of > CONFIG_* preprocessor macros, not all of which are entirely converted > to Kconfig - not to mention weird games played here and there. This > can result in one translation unit using one definition of struct > global_data while the actual layout is another. > > That can be very hard to debug. But we already have a mechanism that > can help catch such bugs at build time, namely the asm-offsets > machinery which is necessary anyway to provide assembly code with the > necessary constants. So make sure that every C translation unit that > include global_data.h actually sees the same size of struct > global_data as that which was seen by the asm-offsets.c TU. > > It is likely that this patch will break the build of some boards. For > example, without the patch from Matt Merhar > (https://lists.denx.de/pipermail/u-boot/2021-May/450135.html) or some > other fix, this breaks P2041RDB_defconfig: > > CC arch/powerpc/lib/traps.o > AS arch/powerpc/cpu/mpc85xx/start.o > In file included from include/asm-generic/global_data.h:26, > from ./arch/powerpc/include/asm/global_data.h:109, > from include/init.h:21, > from arch/powerpc/lib/traps.c:7: > include/linux/build_bug.h:99:41: error: static assertion failed: > "sizeof(struct global_data) == GD_SIZE" >99 | #define __static_assert(expr, msg, ...) _Static_assert(expr, msg) > | ^~ > include/linux/build_bug.h:98:34: note: in expansion of macro ‘__static_assert’ >98 | #define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, > #expr) > | ^~~ > include/asm-generic/global_data.h:470:1: note: in expansion of macro > ‘static_assert’ > 470 | static_assert(sizeof(struct global_data) == GD_SIZE); > | ^ > make[1]: *** [scripts/Makefile.build:266: arch/powerpc/lib/traps.o] Error 1 > make: *** [Makefile:1753: arch/powerpc/lib] Error 2 > make: *** Waiting for unfinished jobs > > Signed-off-by: Rasmus Villemoes > Reviewed-by: Simon Glass Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [RFC PATCH 1/2] build_bug.h: add wrapper for _Static_assert
On Tue, May 18, 2021 at 11:19:46AM +0200, Rasmus Villemoes wrote: > [Linux commit 6bab69c65013bed5fce9f101a64a84d0385b3946] > > BUILD_BUG_ON() is a little annoying, since it cannot be used outside > function scope. So one cannot put assertions about the sizeof() a > struct next to the struct definition, but has to hide that in some more > or less arbitrary function. > > Since gcc 4.6 (which is now also the required minimum), there is support > for the C11 _Static_assert in all C modes, including gnu89. So add a > simple wrapper for that. > > _Static_assert() requires a message argument, which is usually quite > redundant (and I believe that bug got fixed at least in newer C++ > standards), but we can easily work around that with a little macro > magic, making it optional. > > For example, adding > > static_assert(sizeof(struct printf_spec) == 8); > > in vsprintf.c and modifying that struct to violate it, one gets > > ./include/linux/build_bug.h:78:41: error: static assertion failed: > "sizeof(struct printf_spec) == 8" > #define __static_assert(expr, msg, ...) _Static_assert(expr, "" msg "") > > godbolt.org suggests that _Static_assert() has been support by clang > since at least 3.0.0. > > Signed-off-by: Rasmus Villemoes > Reviewed-by: Simon Glass Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
U-Boot contributor call 20th July
Hi, Next week's call is cancelled due to the US holiday. The next one is two weeks later (20th July) and I propose we discuss of-platdata, i.e. how to avoid the overhead of devicetree in SPL. As always these calls are open to anyone interested. Regards, Simon [1] https://bit.ly/3bFvwA1 or https://docs.google.com/document/d/1YBOMsbM19uSFyoJWnt7-PsOLBaevzQUgV-hiR88a5-o/edit#heading=h.flytinyefvov
Re: Building U-Boot for Compulab's imx8mm-cl-iot-gate board
Hi Fabio,
We have dfu_alt_info set. So that we can capsule update from UEFI.
First, "setenv -e -nv -bs -rt -v OsIndications =0x04"
And then we can "efidebug capsule update -v ${loadaddr}".
To make the capsule binary, we need to create a capsule1.itb with the
following content:
/dts-v1/;
/ {
description = "Automatic U-Boot environment update";
#address-cells = <2>;
images {
flash-bin {
description = "U-Boot binary on SPI Flash";
data = /incbin/("flash.bin");
compression = "none";
type = "firmware";
arch = "arm64";
load = <0>;
hash-1 {
algo = "sha1";
};
};
u-boot-itb {
description = "U-Boot binary";
data = /incbin/("u-boot.itb");
compression = "none";
type = "firmware";
arch = "arm64";
load = <0>;
hash-1 {
algo = "sha1";
};
};
};
};
And then "./tools/mkimage -f capsule1.its capsule1.itb"
"./tools/mkeficapsule --fit capsule1.itb --index 1 capsule1.bin"
And we can tftp the capsule1.bin to ${loadaddr} and then use the capsule
update.
Yours,
Paul
On Fri, 2 Jul 2021 at 00:39, Fabio Estevam wrote:
> Hi Paul,
>
> On Thu, Jul 1, 2021 at 12:45 PM Paul Liu wrote:
>
> > Hi Fabio,
> >
> > Yes. It is able to not provide the fip,bin.
> > If you use bl31.bin as bl31.bin then fip.bin can be empty.
> > If you use bl2.bin as bl31.bin then you have to have the fip.
> >
> > This depends on how TF-A are being built.
> > If you build TF-A without NEED_BL2=yes. Then you don't need the fip.bin.
> > If you build TF-A with NEED_BL2=yes. Then FIP is needed. And you have to
> use bl2.bin generated by TF-A and rename it to bl31.bin. I think maybe I
> can fix the README. If you can do that then that's perfect because my
> English is always not very good. So that means I sometimes need more review
> on my English sentences.
>
> Thanks for the clarification.
>
> I can work on creating a README file for this board after I manage to boot
> it.
>
> What is the process of flashing the flash.bin and u-boot.itb binaries
> to the eMMC?
>
> Do you use the uuu tool? If so, what is the uuu_script script that you
> use?
>
> Thanks,
>
> Fabio Estevam
>
Setting serverip from DHCP server
(Re-sending now that I'm subscribed to the list)
Hi all,
I am running U-Boot on an embedded device that is connected via Ethernet
to my workstation. The workstation is running dhcpd and U-Boot is able
to successfully obtain an IP address via DHCP from the server. However,
the `serverip` environment variable is not being set which prevents
U-Boot from continuing to boot over the network. I have to manually
enter `setenv serverip 10.0.10.1` each time.
How do I get the DHCP server to set the serverip variable? My dhcpd.conf
file is quite simple:
subnet 10.0.10.0 netmask 255.255.255.0 {
option routers 10.0.10.1;
range 10.0.10.2;
}
I would have thought the 'option routers' line would do the trick, but
apparently not. I've done a bit of searching online but haven't yet
found anything helpful.
Thanks,
Greg
Re: Building U-Boot for Compulab's imx8mm-cl-iot-gate board
Hi Fabio,
Yes. It is able to not provide the fip,bin.
If you use bl31.bin as bl31.bin then fip.bin can be empty.
If you use bl2.bin as bl31.bin then you have to have the fip.
This depends on how TF-A are being built.
If you build TF-A without NEED_BL2=yes. Then you don't need the fip.bin.
If you build TF-A with NEED_BL2=yes. Then FIP is needed. And you have to
use bl2.bin generated by TF-A and rename it to bl31.bin. I think maybe I
can fix the README. If you can do that then that's perfect because my
English is always not very good. So that means I sometimes need more review
on my English sentences.
Yours,
Paul
On Thu, 1 Jul 2021 at 05:43, Fabio Estevam wrote:
> Hi Paul,
>
> I am trying to build U-Boot 2021.07-rc5 for the
> imx8mm-cl-iot-gate_defconfig target and I am following the imx8mm-evk
> readme: doc/board/freescale/imx8mm_evk.rst for the build instructions
> and this is the output:
>
> make[1]: Nothing to be done for 'SPL'.
> BINMAN all
> Image 'main-section' is missing external blobs and is non-functional:
> blob-ext
>
> Some images are invalid
>
> This happens because I did not provide the fip.bin binary.
>
> Is it OK if I remove the fip.bin entry like this? Would the board still
> boot?
>
> --- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
> @@ -217,18 +217,6 @@
> };
> };
>
> - fip {
> - description = "Trusted Firmware
> FIP";
> - type = "firmware";
> - arch = "arm64";
> - compression = "none";
> - load = <0x4031>;
> -
> - fip_blob: blob-ext{
> - filename = "fip.bin";
> - };
> - };
> -
> fdt {
> description = "NAME";
> type = "flat_dt";
>
> Could you please let me know the process for generating fip.bin?
>
> It would be nice to have a doc/board/compulab/imx8mm-iot-gate.rst
> README file with these details. I can help with that but need your
> help to clarify the generation of fip.bin.
>
> Also, is it OK if I use the ATF firmware and LPDDR binaries version as
> specified in doc/board/freescale/imx8mm_evk.rst ?
>
> Thanks,
>
> Fabio Estevam
>
Re: [RFC PATCH 00/28] cli: Add a new shell
On Thu, Jul 01, 2021 at 02:15:43AM -0400, Sean Anderson wrote:
> Well, this has been sitting on my hard drive for too long without feedback
> ("Release early, release often"), so here's the first RFC. This is not ready
> to
> merge (see the "Future work" section below), but the shell is functional and
> at
> least partially tested.
>
> The goal is to have 0 bytes gained over Hush. Currently we are around 800
> bytes
> over on sandbox.
A good goal, but perhaps slightly too strict?
>
> add/remove: 90/54 grow/shrink: 3/7 up/down: 12834/-12042 (792)
>
> = Getting started
>
> Enable CONFIG_LIL. If you would like to run tests, enable CONFIG_LIL_FULL.
> Note
> that dm_test_acpi_cmd_dump and setexpr_test_str_oper will fail.
> CONFIG_LIL_POOLS
> is currently broken (with what appears to be a double free).
>
> For an overview of the language as a whole, refer to the original readme [1].
>
> [1] http://runtimeterror.com/tech/lil/readme.txt
>
> == Key patches
>
> The following patches are particularly significant for reviewing and
> understanding this series:
>
> cli: Add LIL shell
> This contains the LIL shell as originally written by Kostas with some
> major deletions and some minor additions.
> cli: lil: Wire up LIL to the rest of U-Boot
> This allows you to use LIL as a shell just like Hush.
> cli: lil: Document structures
> This adds documentation for the major structures of LIL. It is a good
> place to start looking at the internals.
> test: Add tests for LIL
> This adds some basic integration tests and provides some examples of
> LIL code.
> cli: lil: Add a distinct parsing step
> This adds a parser separate from the interpreter. This patch is the
> largest original work in this series.
> cli: lil: Load procs from the environment
> This allows procedures to be saved and loaded like variables.
>
> = A new shell
>
> This series adds a new shell for U-Boot. The aim is to eventually replace Hush
> as the primary shell for all boards which currently use it. Hush should be
> replaced because it has several major problems:
>
> - It has not had a major update in two decades, resulting in duplication of
> effort in finding bugs. Regarding a bug in variable setting, Wolfgang
> remarks
>
> So the specific problem has (long) been fixed in upstream, and
> instead of adding a patch to our old version, thus cementing the
> broken behaviour, we should upgrade hush to recent upstream code.
>
> -- Wolfgang Denk [2]
>
> These lack of updates are further compounded by a significant amount of
> ifdef-ing in the Hush code. This makes the shell hard to read and debug.
> Further, the original purpose of such ifdef-ing (upgrading to a newer Hush)
> has never happened.
>
> - It was designed for a preempting OS which supports pipes and processes. This
> fundamentally does not match the computing model of U-Boot where there is
> exactly one thread (and every other CPU is spinning or sleeping). Working
> around these design differences is a significant cause of the aformentioned
> ifdef-ing.
>
> - It lacks many major features expected of even the most basic shells, such
> as functions and command substitution ($() syntax). This makes it difficult
> to script with Hush. While it is desirable to write some code in C, much
> code
> *must* be written in C because there is no way to express the logic in Hush.
>
> I believe that U-Boot should have a shell which is more featureful, has
> cleaner
> code, and which is the same size as Hush (or less). The ergonomic advantages
> afforded by a new shell will make U-Boot easier to use and customize.
>
> [2] https://lore.kernel.org/u-boot/872080.1614764...@gemini.denx.de/
First, great! Thanks for doing this. A new shell really is the only
viable path forward here, and I appreciate you taking the time to
evaluate several and implement one.
> = Open questions
>
> While the primary purpose of this series is of course to get feedback on the
> code I have already written, there are several decisions where I am not sure
> what the best course of action is.
>
> - What should be done about 'expr'? The 'expr' command is a significant
> portion
> of the final code size. It cannot be removed outright, because it is used by
> several builtin functions like 'if', 'while', 'for', etc. The way I see it,
> there are two general approaches to take
>
> - Rewrite expr to parse expressions and then evaluate them. The parsing
> could
> re-use several of the existing parse functions like how parse_list does.
> This could reduce code, as instead of many functions each with their own
> while/switch statements, we could have two while/switch statements (one to
> parse, and one to evaluate). However, this may end up increasing code size
> (such as when the main language had evaluation split from parsing).
>
> - Don't parse infix expressions, and just make
Re: [RFC PATCH 22/28] env: Add a priv pointer to hwalk_r
On Thu, Jul 01, 2021 at 02:16:05AM -0400, Sean Anderson wrote: > This allows callers of hwalk_r to pass data to their callback. This mirrors > e.g. env_attr_walk. > > Signed-off-by: Sean Anderson Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [GIT PULL] xilinx patches for v2021.10
On Thu, Jul 01, 2021 at 11:25:22AM +0200, Michal Simek wrote: > Hi, > > please pull these patches to your tree (next). There are a lot of DT > syncup changes which are also going to Linux kernel. > CI loop doesn't show any problem. > > BTW: Isn't there any option in CI not to run builds against the same > sha1? Because I see build for the branch itself and then for the tag > which is kind of wasting of resources. I don't know of one for GitLab, but I've not checked. Azure is smarter about this and doesn't. > > Thanks, > Michal > > > The following changes since commit 1ce892cb1ce970d8ee6ffcecc22351c84e67fca4: > > azure: Use msys2 20210604 installer for Windows build (2021-06-22 > 09:06:03 -0400) > > are available in the Git repository at: > > g...@source.denx.de:u-boot/custodians/u-boot-microblaze.git > tags/xilinx-for-v2021.10 > > for you to fetch changes up to 45576273e9209309238f332c85a6fef955c49b59: > > xilinx: zynqmp: Add support for 67dr silicon (2021-07-01 09:25:06 +0200) > Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
[PATCH] configs: am65x_evm: Switch envboot out for distro_bootcmd
Swap out the TI-centric "envboot" logic for the generic distro_bootcmd
logic for the bootcmd we run before trying to do something more complex
involving additional firmware, etc.
Cc: Lokesh Vutla
Signed-off-by: Tom Rini
---
configs/am65x_evm_a53_defconfig | 2 +-
include/configs/am65x_evm.h | 10 --
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 6f9309e17147..eefcdfa36571 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -29,7 +29,7 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
-CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run
get_overlay_${boot}; run run_kern"
+CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run
boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run
get_overlay_${boot}; run run_kern"
CONFIG_LOGLEVEL=7
CONFIG_CONSOLE_MUX=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index 8c50fe9d11ff..749689ca3610 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -10,7 +10,6 @@
#define __CONFIG_AM654_EVM_H
#include
-#include
#include
#include
#include
@@ -126,6 +125,12 @@
DFU_ALT_INFO_EMMC \
DFU_ALT_INFO_OSPI
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 0)
+
+#include
+
/* Incorporate settings into the U-Boot environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
@@ -136,7 +141,8 @@
EXTRA_ENV_AM65X_BOARD_SETTINGS_MTD \
EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \
EXTRA_ENV_RPROC_SETTINGS\
- EXTRA_ENV_DFUARGS
+ EXTRA_ENV_DFUARGS \
+ BOOTENV
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
--
2.17.1
[PATCH] image: android: Automatically detect more compression types
At the moment android_image_get_kcomp() can automatically detect LZ4 compressed kernels and the compression specified in uImages. However, especially on ARM64 Linux is often compressed with GZIP. Attempting to boot an Android image with a GZIP compressed kernel image currently results in a very strange crash, e.g. Starting kernel ... "Synchronous Abort" handler, esr 0x0200 ... Code: d555 5d55 555f 5d555d55 (00088b1f) Note the 1f8b, which are the "magic" bytes for GZIP images. U-Boot already has the image_decomp_type() function that checks for the magic bytes of bzip2, gzip, lzma and lzo. It's easy to make use of it here to increase the chance that we do the right thing and the user does not become confused with strange crashes. This allows booting Android boot images that contain GZIP-compressed kernel images. Signed-off-by: Stephan Gerhold --- common/image-android.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/image-android.c b/common/image-android.c index d07b0e0f09..1fa1eb 100644 --- a/common/image-android.c +++ b/common/image-android.c @@ -164,7 +164,7 @@ ulong android_image_get_kcomp(const struct andr_img_hdr *hdr) else if (get_unaligned_le32(p) == LZ4F_MAGIC) return IH_COMP_LZ4; else - return IH_COMP_NONE; + return image_decomp_type(p, sizeof(u32)); } int android_image_get_ramdisk(const struct andr_img_hdr *hdr, -- 2.32.0
Re: [PATCH] MAINTAINERS, git-mailrc: socfpga: Change co-maintainer to Tien Fong Chee
On 7/1/21 12:01 PM, Ley Foon Tan wrote: I'm no longer work in Intel, change Intel SoCFPGA co-maintainer to Tien Fong Chee. Signed-off-by: Ley Foon Tan --- MAINTAINERS| 2 +- doc/git-mailrc | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 86ff5e04a6..4997ac97a8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -118,7 +118,7 @@ F: cmd/arm/ ARM ALTERA SOCFPGA M:Marek Vasut M:Simon Goldschmidt -M: Ley Foon Tan +M: Tien Fong Chee S:Maintainted Can you fix this typo while you're at it? --Sean T:git https://source.denx.de/u-boot/custodians/u-boot-socfpga.git F:arch/arm/mach-socfpga/ diff --git a/doc/git-mailrc b/doc/git-mailrc index 34f936f4d8..0a78594eb9 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -46,6 +46,7 @@ alias simongoldschmidt Simon Goldschmidt alias sjgSimon Glass alias smcnuttScott McNutt alias stroeseStefan Roese +alias tienfong Tien Fong Chee alias trini Tom Rini alias wd Wolfgang Denk alias priyankajain Priyanka Jain @@ -69,7 +70,7 @@ alias s3csamsung alias s5pc samsung alias samsunguboot, prom alias snapdragon uboot, mateusz -alias socfpgauboot, marex, dinh, simongoldschmidt, leyfoon +alias socfpgauboot, marex, dinh, simongoldschmidt, tienfong alias sunxi uboot, jagan, apritzel alias tegra uboot, sjg, Tom Warren , Stephen Warren alias tegra2 tegra
[PATCH] pci: imx: use reset-gpios if defined by device-tree
If reset-gpio is defined by device-tree use that instead of a
board-specific function to toggle PCI reset.
The presense of 'reset-gpio' in the device-tree will override calling
the weak imx6_pcie_toggle_reset function therefore I've Cc'd all the
board maintainers who rely on that function here as I would like to
remove that function completely. The only user of a board-specific weak
imx6_pcie_toggle_reset is gwventana which I am the maintainer for and
once this patch is accepted I will be able to remove that use case and
would then like to remove the use of CONFIG_PCIE_IMX_PERST_GPIO
completely.
I would have preferred implementing this without changing the codepath
for the users of CONFIG_PCIE_IMX_PERST_GPIO but that would require
passing in the imx_pcie_priv struct to imx6_pcie_toggle_reset which
creates a chicken-and-egg scenario as that's currently a weak function
for boards to override.
Cc: Ian Ray (maintainer:GE BX50V3 BOARD)
Cc: Sebastian Reichel (maintainer:GE BX50V3
BOARD)
Cc: Fabio Estevam (maintainer:MX6SABRESD BOARD)
Cc: Marek Vasut (maintainer:NOVENA BOARD)
Cc: Soeren Moch (maintainer:TBS2910 BOARD)
Cc: Silvio Fricke (maintainer:VINING_2000 BOARD)
Signed-off-by: Tim Harvey
---
drivers/pci/pcie_imx.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index 73875e00db..c28951655d 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -100,6 +100,8 @@
struct imx_pcie_priv {
void __iomem*dbi_base;
void __iomem*cfg_base;
+ struct gpio_descreset_gpio;
+ boolgpio_active_high;
};
/*
@@ -584,7 +586,7 @@ __weak int imx6_pcie_toggle_reset(void)
return 0;
}
-static int imx6_pcie_deassert_core_reset(void)
+static int imx6_pcie_deassert_core_reset(struct imx_pcie_priv *priv)
{
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
@@ -612,7 +614,14 @@ static int imx6_pcie_deassert_core_reset(void)
setbits_le32(_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
#endif
- imx6_pcie_toggle_reset();
+ if (dm_gpio_is_valid(>reset_gpio)) {
+ /* Assert PERST# for 50ms then de-assert */
+ dm_gpio_set_value(>reset_gpio, priv->gpio_active_high ? 0
: 1);
+ mdelay(50);
+ dm_gpio_set_value(>reset_gpio, priv->gpio_active_high ? 1
: 0);
+ } else {
+ imx6_pcie_toggle_reset();
+ }
return 0;
}
@@ -625,7 +634,7 @@ static int imx_pcie_link_up(struct imx_pcie_priv *priv)
imx6_pcie_assert_core_reset(priv, false);
imx6_pcie_init_phy();
- imx6_pcie_deassert_core_reset();
+ imx6_pcie_deassert_core_reset(priv);
imx_pcie_regions_setup(priv);
@@ -787,6 +796,15 @@ static int imx_pcie_dm_probe(struct udevice *dev)
{
struct imx_pcie_priv *priv = dev_get_priv(dev);
+ /* if PERST# valid from dt then assert it */
+ gpio_request_by_name(dev, "reset-gpio", 0, >reset_gpio,
+GPIOD_IS_OUT);
+ priv->gpio_active_high = dev_read_bool(dev, "reset-gpio-active-high");
+ if (dm_gpio_is_valid(>reset_gpio)) {
+ dm_gpio_set_value(>reset_gpio,
+ priv->gpio_active_high ? 0 : 1);
+ }
+
return imx_pcie_link_up(priv);
}
--
2.17.1
Re: Building U-Boot for Compulab's imx8mm-cl-iot-gate board
Hi Paul, On Thu, Jul 1, 2021 at 12:45 PM Paul Liu wrote: > Hi Fabio, > > Yes. It is able to not provide the fip,bin. > If you use bl31.bin as bl31.bin then fip.bin can be empty. > If you use bl2.bin as bl31.bin then you have to have the fip. > > This depends on how TF-A are being built. > If you build TF-A without NEED_BL2=yes. Then you don't need the fip.bin. > If you build TF-A with NEED_BL2=yes. Then FIP is needed. And you have to use > bl2.bin generated by TF-A and rename it to bl31.bin. I think maybe I can fix > the README. If you can do that then that's perfect because my English is > always not very good. So that means I sometimes need more review on my > English sentences. Thanks for the clarification. I can work on creating a README file for this board after I manage to boot it. What is the process of flashing the flash.bin and u-boot.itb binaries to the eMMC? Do you use the uuu tool? If so, what is the uuu_script script that you use? Thanks, Fabio Estevam
[PATCH] MAINTAINERS, git-mailrc: socfpga: Change co-maintainer to Tien Fong Chee
I'm no longer work in Intel, change Intel SoCFPGA co-maintainer to Tien Fong Chee. Signed-off-by: Ley Foon Tan --- MAINTAINERS| 2 +- doc/git-mailrc | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 86ff5e04a6..4997ac97a8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -118,7 +118,7 @@ F: cmd/arm/ ARM ALTERA SOCFPGA M: Marek Vasut M: Simon Goldschmidt -M: Ley Foon Tan +M: Tien Fong Chee S: Maintainted T: git https://source.denx.de/u-boot/custodians/u-boot-socfpga.git F: arch/arm/mach-socfpga/ diff --git a/doc/git-mailrc b/doc/git-mailrc index 34f936f4d8..0a78594eb9 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -46,6 +46,7 @@ alias simongoldschmidt Simon Goldschmidt alias sjgSimon Glass alias smcnuttScott McNutt alias stroeseStefan Roese +alias tienfong Tien Fong Chee alias trini Tom Rini alias wd Wolfgang Denk alias priyankajain Priyanka Jain @@ -69,7 +70,7 @@ alias s3csamsung alias s5pc samsung alias samsunguboot, prom alias snapdragon uboot, mateusz -alias socfpgauboot, marex, dinh, simongoldschmidt, leyfoon +alias socfpgauboot, marex, dinh, simongoldschmidt, tienfong alias sunxi uboot, jagan, apritzel alias tegra uboot, sjg, Tom Warren , Stephen Warren alias tegra2 tegra -- 2.25.1
[PATCH 5/7] stm32mp: cmd_stm32key: add get_misc_dev function
This message could not be delivered immediately due to an internal mail routing
issue.
The mail routing error has been resolved in the meantime.
We apologize for the delay in delivery and any inconvenience this may have
caused.
In case of any questions please contact us via i...@hexagon.com.
Original sender: patrick.delau...@foss.st.com
Original delivery time: 28-Jun-2021 01:34 PM (UTC)
---
This email is not from Hexagon’s Office 365 instance. Please be careful while
clicking links, opening attachments, or replying to this email. Add a helper
function to access to BSEC misc driver. Signed-off-by: Patrick Delaunay ---
arch/arm/mach-stm32mp/cmd_stm32key.c | 19 +-- 1 file changed,
13 insertions(+), 6 deletions(-) diff --git
a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c
index c4cb6342fa..886c52794f 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -14,6 +14,17 @@ #define
STM32_OTP_HASH_KEY_START 24 #define STM32_OTP_HASH_KEY_SIZE 8 +static int
get_misc_dev(struct udevice **dev) +{ + int ret; + + ret =
uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), dev); +
if (ret) + log_err("Can't find stm32mp_bsec driver\n"); + + return ret; +} +
static void read_hash_value(u32 addr) { int i; @@ -31,13 +42,9 @@ static int
fuse_hash_value(u32 addr, bool print) u32 word, val; int i, ret; - ret =
uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(stm32mp_bsec), -
); - if (ret) { - log_err("Can't find stm32mp_bsec driver\n"); + ret =
get_misc_dev(); + if (ret) return ret; - } for (i = 0, word =
STM32_OTP_HASH_KEY_START; i < STM32_OTP_HASH_KEY_SIZE; -- 2.25.1
[PATCH 0/7] stm32mp: cmd_stm32key: updates
This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via i...@hexagon.com. Original sender: patrick.delau...@foss.st.com Original delivery time: 28-Jun-2021 01:28 PM (UTC) --- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. Several improvements and protection on the command stm32key. This command is used to experiment the secure boot on STM32MP15x; the expected sequence to manually activate it with this U-Boot command is: - Key generation with STM32 KeyGen tool - Key registration: update and lock PKH in OTP (stm32key fuse) - Perform image authentication of an image signed with STM32 Signing tool and check that the ROM code accepted them - Close the device, only signed binary will be accepted (stm32key close) Warning: Make sure that a device with Secure boot enabled is used, check the security field of the chip part number. Otherwise the chip will be bricked and could not be used anymore. This command is activated by default on STMicroelectronics evaluation boards but these OTP can also be updated directly by customer application or with Secure Secret Provisioning (SSP). Patrick Delaunay (7): stm32mp: configs: activate the command stm32key only for ST boards stm32mp: cmd_stm32key: use sub command stm32mp: cmd_stm32key: handle error in fuse_hash_value stm32mp: cmd_stm32key: lock of PKH OTP after fuse stm32mp: cmd_stm32key: add get_misc_dev function stm32mp: cmd_stm32key: add read OTP subcommand stm32mp: cmd_stm32key: add subcommand close arch/arm/mach-stm32mp/Kconfig | 4 +- arch/arm/mach-stm32mp/cmd_stm32key.c | 239 +++ configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 4 files changed, 208 insertions(+), 37 deletions(-) -- 2.25.1
[PATCH 1/7] stm32mp: configs: activate the command stm32key only for ST boards
This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via i...@hexagon.com. Original sender: patrick.delau...@foss.st.com Original delivery time: 28-Jun-2021 01:18 PM (UTC) --- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. This command is used to evaluate the secure boot on stm32mp SOC, it is deactivated by default in real products. We activate this command only in STMicroelectronics defconfig used with the evaluation boards. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 4 +++- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 7c25266f33..0e59931679 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -174,10 +174,12 @@ config STM32_ETZPC config CMD_STM32KEY bool "command stm32key to fuse public key hash" - default y + default n help fuse public key hash in corresponding fuse used to authenticate binary. + This command is used to evaluate the secure boot on stm32mp SOC, + it is deactivated by default in real products. config PRE_CON_BUF_ADDR default 0xC02FF000 diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 3ff46f7048..4e66472825 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_DM_SPI=y CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y +CONFIG_CMD_STM32KEY=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index afbf721299..d68bdf9eea 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MEMTEST_START=0xc000 CONFIG_SYS_MEMTEST_END=0xc400 CONFIG_ENV_OFFSET=0x28 CONFIG_ENV_SECT_SIZE=0x4 +CONFIG_CMD_STM32KEY=y CONFIG_TARGET_ST_STM32MP15x=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C -- 2.25.1
Re: [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
Hi Alex,
Thanks for reporting!
With rockchip,dw-hdmi.yaml all kind notifications rk3328/rk3399 but not
for ddc-i2c-scl-*
Submitted by Laurent, but not reviewed/fixed nodes together with the
Rockchip mail group. Someone has to look at/fix it...
dt-bindings: display: rockchip: dw-hdmi: Convert binding to YAML
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210114064437.5793-6-laurent.pinchart+rene...@ideasonboard.com/
Will change that for A95X-Z2. Waiting for some more comments... ;)
Johan
On 7/1/21 1:46 PM, Alex Bee wrote:
> Hi Johan,
>
> Am 30.06.21 um 18:22 schrieb Johan Jonker:
>> With a new board from a recent Linux DT the U-boot rk3328.dtsi
>> is in need for an update.
>>
>> Please advise what to do with usb3 regulators, aliases and
>> other stuff that has to change.
>>
>> Also some of the U-boot board files could use some
>> dtbs_check for bogus properties and restyling... ;)
>
> While at bogus properties:
> The ddc-i2c-scl-* properties you are defining in the hdmi node of
> rk3318-a95x-z2.dts look like an leftover from vendor kernel: they do not
> exist for the upstream dw-hdmi driver in neither u-boot nor kernel.
> (Not sure this would pop up with dtbs_check currently)
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c:
interrupts: [[0, 35, 4], [0, 71, 4]] is too long
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c:
pinctrl-names: ['default'] is too short
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c:
ports:port: 'endpoint@0' is a required property
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dt.yaml: hdmi@ff3c:
ports:port: 'endpoint@1' is a required property
From schema:
/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml
>
> Alex.
>>
>> rk3328 USB2 and USB3 only roughly tested.
>>
>> ===
>>
>> Howto use:
>>
>> Compile bl31.elf:
>>
>> git clone --depth 1
>> https://github.com/ARM-software/arm-trusted-firmware.git
>> cd arm-trusted-firmware
>> make realclean
>> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
>>
>> export
>> BL31=//arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
>> cd ..
>>
>> Compile U-boot:
>>
>> git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
>> cd uboot
>> make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
>>
>> ===
>>
>> Use U-boot to create a GPT on a SD card,
>> because of partition GUID and sizes.
>>
>> mmc dev 0
>> mmc info
>> gpt write mmc 0 $partitions
>> mmc part
>>
>> ===
>>
>> Write to SD card:
>>
>> export DISK=/dev/mmcblk0
>> sudo dd if=./idbloader.img of=${DISK} seek=64
>> sudo dd if=./u-boot.itb of=${DISK} seek=16384
>> sync
>>
>> ===
>>
>> Format boot partition with fat16.
>> Add /Image and /rk3318-a95x-z2.dtb
>> Add extlinux dir with extlinux.conf
>>
>> label kernel
>> kernel /Image
>> fdt /rk3318-a95x-z2.dtb
>> append root=/dev/mmcblk0p5 rw console=tty0
>> console=ttyS2,150n8 earlycon=uart8250,mmio32,0xff13,keep $
>>
>> ===
>>
>> Use fastboot:
>>
>> Hit any key to stop autoboot:
>> usb start
>> usb dev 1
>> fastboot usb 1
>> =
>> sudo fastboot devices -l
>> sudo fastboot erase loader1
>> sudo fastboot erase loader2
>> sudo fastboot flash loader1 idbloader.img
>> sudo fastboot flash loader2 u-boot.itb
>> =
>> ctrl-c
>> reset
>>
>> ===
>>
>> Johan Jonker (6):
>> arm: dts: rockchip: update rk3328.dtsi
>> arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
>> arm: dts: rockchip: move mmc aliases to board files
>> arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
>> board files
>> rockchip: rk3318: add a95x-z2-rk3318_defconfig file
>> arm: dts: rockchip: add rk3318 A95X Z2 board
>>
>> arch/arm/dts/Makefile | 1 +
>> arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi | 59 +
>> arch/arm/dts/rk3318-a95x-z2.dts | 384
>> +
>> arch/arm/dts/rk3328-evb-u-boot.dtsi | 2 +-
>> arch/arm/dts/rk3328-evb.dts | 8 +-
>> arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
>> arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
>> arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
>> arch/arm/dts/rk3328-roc-cc.dts | 7 +-
>> arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
>> arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
>> arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
>> arch/arm/dts/rk3328-rock64.dts | 7 +-
>> arch/arm/dts/rk3328-u-boot.dtsi | 21 --
>> arch/arm/dts/rk3328.dtsi
[PATCH] configs: stm32mp1: remove splashimage and add fdtoverlay_addr_r
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issue.
The mail routing error has been resolved in the meantime.
We apologize for the delay in delivery and any inconvenience this may have
caused.
In case of any questions please contact us via i...@hexagon.com.
Original sender: patrick.delau...@foss.st.com
Original delivery time: 28-Jun-2021 01:09 PM (UTC)
---
This email is not from Hexagon’s Office 365 instance. Please be careful while
clicking links, opening attachments, or replying to this email. Add the
variable used by PXE command for fdtoverlays support since the commit
69076dff2284 ("cmd: pxe: add support for FDT overlays"). Reused the unused
"splashimage" address as CONFIG_SPLASH_SOURCE and CONFIG_VIDEO_LOGO are not
activated and U-Boot display the "BACKGROUND" image found in extlinux.conf to
manage splashscreen on stm32mp1 boards. Signed-off-by: Patrick Delaunay ---
include/configs/stm32mp1.h | 4 ++-- 1 file changed, 2 insertions(+), 2
deletions(-) diff --git a/include/configs/stm32mp1.h
b/include/configs/stm32mp1.h index 440efa1a55..2e7f49e7bb 100644 ---
a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -155,7 +155,7
@@ /* * memory layout for 32M uncompressed/compressed kernel, - * 1M fdt, 1M
script, 1M pxe and 1M for splashimage + * 1M fdt, 1M script, 1M pxe and 1M for
overlay * and the ramdisk at the end. */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@
-163,7 +163,7 @@ "fdt_addr_r=0xc400\0" \ "scriptaddr=0xc410\0" \
"pxefile_addr_r=0xc420\0" \ - "splashimage=0xc430\0" \ +
"fdtoverlay_addr_r=0xc430\0" \ "ramdisk_addr_r=0xc440\0" \
"altbootcmd=run bootcmd\0" \ "env_check=if env info -p -d -q; then env save;
fi\0" \ -- 2.25.1
[PATCH] configs: j721e_evm: Switch envboot out for distro_bootcmd
Swap out the TI-centric "envboot" logic for the generic distro_bootcmd
logic for the bootcmd we run before trying to do something more complex
involving additional firmware, etc.
Cc: Lokesh Vutla (maintainer:J721E BOARD)
Signed-off-by: Tom Rini
---
configs/j721e_evm_a72_defconfig | 2 +-
include/configs/j721e_evm.h | 24 ++--
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 365d66269003..2e890cdfe60a 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -29,7 +29,7 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run
get_overlay_${boot}; run run_kern"
+CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run
boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run
get_overlay_${boot}; run run_kern"
CONFIG_LOGLEVEL=7
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index b707fc4e899f..62da8ff956f7 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -10,7 +10,6 @@
#define __CONFIG_J721E_EVM_H
#include
-#include
#include
#include
#include
@@ -160,6 +159,26 @@
#define EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
#endif
+#if CONFIG_IS_ENABLED(CMD_PXE)
+# define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
+#else
+# define BOOT_TARGET_PXE(func)
+#endif
+
+#if CONFIG_IS_ENABLED(CMD_DHCP)
+# define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
+#else
+# define BOOT_TARGET_DHCP(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 0) \
+ BOOT_TARGET_PXE(func) \
+ BOOT_TARGET_DHCP(func)
+
+#include
+
/* Incorporate settings into the U-Boot environment */
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
@@ -170,7 +189,8 @@
EXTRA_ENV_RPROC_SETTINGS\
EXTRA_ENV_DFUARGS \
DEFAULT_UFS_TI_ARGS \
- EXTRA_ENV_J721E_BOARD_SETTINGS_MTD
+ EXTRA_ENV_J721E_BOARD_SETTINGS_MTD \
+ BOOTENV
/* Now for the remaining common defines */
#include
--
2.17.1
[PATCH 3/7] stm32mp: cmd_stm32key: handle error in fuse_hash_value
This message could not be delivered immediately due to an internal mail routing
issue.
The mail routing error has been resolved in the meantime.
We apologize for the delay in delivery and any inconvenience this may have
caused.
In case of any questions please contact us via i...@hexagon.com.
Original sender: patrick.delau...@foss.st.com
Original delivery time: 28-Jun-2021 01:03 PM (UTC)
---
This email is not from Hexagon’s Office 365 instance. Please be careful while
clicking links, opening attachments, or replying to this email. Handle errors
in fuse_hash_value function. Signed-off-by: Patrick Delaunay ---
arch/arm/mach-stm32mp/cmd_stm32key.c | 24 +++- 1 file
changed, 15 insertions(+), 9 deletions(-) diff --git
a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c
index d2045a5983..2529139ebc 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -25,7 +25,7 @@ static void
read_hash_value(u32 addr) } } -static void fuse_hash_value(u32 addr, bool
print) +static int fuse_hash_value(u32 addr, bool print) { struct udevice *dev;
u32 word, val; @@ -36,21 +36,25 @@ static void fuse_hash_value(u32 addr, bool
print) ); if (ret) { log_err("Can't find stm32mp_bsec driver\n"); - return;
+ return ret; } for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) { - if (print) -
printf("Fuse OTP %i : %x\n", - STM32_OTP_HASH_KEY_START + i, -
__be32_to_cpu(*(u32 *)addr)); - word = STM32_OTP_HASH_KEY_START + i; val =
__be32_to_cpu(*(u32 *)addr); - misc_write(dev, STM32_BSEC_OTP(word), , 4);
+ if (print) + printf("Fuse OTP %i : %x\n", word, val); + + ret =
misc_write(dev, STM32_BSEC_OTP(word), , 4); + if (ret != 4) { +
log_err("Fuse OTP %i failed\n", word); + return ret; + } addr += 4; } + +
return 0; } static int confirm_prog(void) @@ -104,7 +108,9 @@ static int
do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con if (!yes
&& !confirm_prog()) return CMD_RET_FAILURE; - fuse_hash_value(addr, !yes); + if
(fuse_hash_value(addr, !yes)) + return CMD_RET_FAILURE; + printf("Hash key
updated !\n"); return CMD_RET_SUCCESS; -- 2.25.1
[PATCH 3/3] ti: omap5: Switch to generic distro boot for non-Android cases
Remove the environment support for various legacy boot methods. With this, we will now default to booting any distribution that follows the generic distro boot framework and no longer attempt to boot various legacy (to this SoC) scripts/etc. Note that if we do not find anything here we will continue to try and Android methods and will start by trying fastboot. Cc: Lokesh Vutla Signed-off-by: Tom Rini --- include/configs/ti_omap5_common.h | 23 +++ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index dfe69a821ed8..055d108ddefe 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -177,21 +177,13 @@ #define DEFAULT_COMMON_BOOT_TI_ARGS \ "console=" CONSOLEDEV ",115200n8\0" \ "fdtfile=undefined\0" \ - "bootpart=0:2\0" \ - "bootdir=/boot\0" \ - "bootfile=zImage\0" \ + "finduuid=part uuid mmc 0:2 uuid\0" \ "usbtty=cdc_acm\0" \ "vram=16M\0" \ AVB_VERIFY_CMD \ "partitions=" PARTS_DEFAULT "\0" \ "optargs=\0" \ "dofastboot=0\0" \ - "emmc_linux_boot=" \ - "echo Trying to boot Linux from eMMC ...; " \ - "setenv mmcdev 1; " \ - "setenv bootpart 1:2; " \ - "setenv mmcroot /dev/mmcblk0p2 rw; " \ - "run mmcboot;\0" \ "emmc_android_boot=" \ "setenv mmcdev 1; " \ "mmc dev $mmcdev; " \ @@ -278,12 +270,18 @@ "run update_to_fit;"\ "fi;" \ "run findfdt; " \ - "run envboot; " \ - "run mmcboot;" \ - "run emmc_linux_boot; " \ + "run finduuid; " \ + "run distro_bootcmd;" \ "run emmc_android_boot; " \ "" +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ @@ -294,6 +292,7 @@ DFUARGS \ NETARGS \ NANDARGS \ + BOOTENV /* * SPL related defines. The Public RAM memory map the ROM defines the -- 2.17.1
[PATCH 2/3] arm: ti: environment: Move in to
This include file is only used by ti_omap5_common.h. Further, the move
is towards using the generic distro boot framework and not this set of
macros. Start by moving all of the contents in directly to where they
are used.
Signed-off-by: Tom Rini
---
include/configs/ti_omap5_common.h | 229 +++-
include/environment/ti/boot.h | 243 --
2 files changed, 228 insertions(+), 244 deletions(-)
delete mode 100644 include/environment/ti/boot.h
diff --git a/include/configs/ti_omap5_common.h
b/include/configs/ti_omap5_common.h
index de0a6af2fdc9..dfe69a821ed8 100644
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -32,6 +32,8 @@
#define CONFIG_PALMAS_POWER
+#include
+
#include
#include
@@ -54,10 +56,235 @@
#define DFUARGS
#endif
-#include
#include
#include
+#ifndef CONSOLEDEV
+#define CONSOLEDEV "ttyS2"
+#endif
+
+#ifndef PARTS_DEFAULT
+/*
+ * Default GPT tables for eMMC (Linux and Android). Notes:
+ * 1. Keep partitions aligned to erase group size (512 KiB) when possible
+ * 2. Keep partitions in sync with DFU_ALT_INFO_EMMC (see dfu.h)
+ * 3. Keep 'bootloader' partition (U-Boot proper) start address in sync with
+ * CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (see common/spl/Kconfig)
+ */
+#define PARTS_DEFAULT \
+ /* Linux partitions */ \
+ "uuid_disk=${uuid_gpt_disk};" \
+ "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
+ "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
+ /* Android partitions */ \
+ "partitions_android=" \
+ "uuid_disk=${uuid_gpt_disk};" \
+ "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
+ "name=bootloader,size=2048K,uuid=${uuid_gpt_bootloader};" \
+ "name=uboot-env,start=2432K,size=256K,uuid=${uuid_gpt_reserved};" \
+ "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
+ "name=boot_a,size=20M,uuid=${uuid_gpt_boot_a};" \
+ "name=boot_b,size=20M,uuid=${uuid_gpt_boot_b};" \
+ "name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a};" \
+ "name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b};" \
+ "name=vbmeta_a,size=64K,uuid=${uuid_gpt_vbmeta_a};" \
+ "name=vbmeta_b,size=64K,uuid=${uuid_gpt_vbmeta_b};" \
+ "name=recovery,size=64M,uuid=${uuid_gpt_recovery};" \
+ "name=super,size=2560M,uuid=${uuid_gpt_super};" \
+ "name=metadata,size=16M,uuid=${uuid_gpt_metadata};" \
+ "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
+#endif /* PARTS_DEFAULT */
+
+#if defined(CONFIG_CMD_AVB)
+#define AVB_VERIFY_CHECK "if run avb_verify; then " \
+ "echo AVB verification OK.;" \
+ "set bootargs $bootargs $avb_bootargs;" \
+ "else " \
+ "echo AVB verification failed.;" \
+ "exit; fi;"
+#define AVB_VERIFY_CMD "avb_verify=avb init 1; avb verify $slot_suffix;\0"
+#else
+#define AVB_VERIFY_CHECK ""
+#define AVB_VERIFY_CMD ""
+#endif
+
+#define CONTROL_PARTITION "misc"
+
+#if defined(CONFIG_CMD_AB_SELECT)
+#define AB_SELECT_SLOT \
+ "if part number mmc 1 " CONTROL_PARTITION " control_part_number; " \
+ "then " \
+ "echo " CONTROL_PARTITION \
+ " partition number:${control_part_number};" \
+ "ab_select slot_name mmc ${mmcdev}:${control_part_number};" \
+ "else " \
+ "echo " CONTROL_PARTITION " partition not found;" \
+ "exit;" \
+ "fi;" \
+ "setenv slot_suffix _${slot_name};"
+#define AB_SELECT_ARGS \
+ "setenv bootargs_ab androidboot.slot_suffix=${slot_suffix}; " \
+ "echo A/B cmdline addition: ${bootargs_ab};" \
+ "setenv bootargs ${bootargs} ${bootargs_ab};"
+#else
+#define AB_SELECT_SLOT ""
+#define AB_SELECT_ARGS ""
+#endif
+
+/*
+ * Prepares complete device tree blob for current board (for Android boot).
+ *
+ * Boot image or recovery image should be loaded into $loadaddr prior to
running
+ * these commands. The logic of these commnads is next:
+ *
+ * 1. Read correct DTB for current SoC/board from boot image in $loadaddr
+ * to $fdtaddr
+ * 2. Merge all needed DTBO for current board from 'dtbo' partition into read
+ * DTB
+ * 3. User should provide $fdtaddr as 3rd argument to 'bootm'
+ */
+#define PREPARE_FDT \
+ "echo Preparing FDT...; " \
+ "if test $board_name = am57xx_evm_reva3; then " \
+ "echo \" Reading DTBO partition...\"; " \
+ "part start mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_start; " \
+ "part size mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_size; " \
+ "mmc read ${dtboaddr} ${p_dtbo_start} ${p_dtbo_size}; " \
+ "echo \" Reading DTB for AM57x EVM RevA3...\"; " \
+ "abootimg get dtb --index=0 dtb_start dtb_size; " \
+ "cp.b $dtb_start $fdtaddr $dtb_size;
[PATCH 1/3] ti: am43xx_evm: Switch to DISTRO_BOOT only
Remove the environment support for various legacy boot methods. With
this, we will now default to booting any distribution that follows the
generic distro boot framework and no longer attempt to boot various
legacy (to this SoC) scripts/etc.
Signed-off-by: Tom Rini
---
configs/am43xx_evm_defconfig | 2 +-
configs/am43xx_evm_qspiboot_defconfig | 2 +-
configs/am43xx_evm_rtconly_defconfig | 2 +-
configs/am43xx_evm_usbhost_boot_defconfig | 2 +-
configs/am43xx_hs_evm_defconfig | 2 +-
include/configs/am43xx_evm.h | 63 +++
6 files changed, 23 insertions(+), 50 deletions(-)
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 6782695689ff..0dedd7812a0d 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_ETH_SUPPORT=y
diff --git a/configs/am43xx_evm_qspiboot_defconfig
b/configs/am43xx_evm_qspiboot_defconfig
index fb8c78d11f5a..5cf4908330e2 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -13,7 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI,QSPI_BOOT"
CONFIG_QSPI_BOOT=y
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_MISC_INIT_R is not set
diff --git a/configs/am43xx_evm_rtconly_defconfig
b/configs/am43xx_evm_rtconly_defconfig
index 7b2cb8e8d991..7287025238f7 100644
--- a/configs/am43xx_evm_rtconly_defconfig
+++ b/configs/am43xx_evm_rtconly_defconfig
@@ -12,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MTD_SUPPORT=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig
b/configs/am43xx_evm_usbhost_boot_defconfig
index a8827e667852..fd6a4ce543ae 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -11,7 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_LOAD_FIT=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_MTD_SUPPORT=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 8c9ba774b834..0a5411b4f248 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -21,7 +21,7 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_MISC_INIT_R is not set
CONFIG_SPL_ETH_SUPPORT=y
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 6df6b49c8008..a9ec1aacf3ce 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -108,59 +108,41 @@
#define DFUARGS
#endif
+#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
+ "bootcmd_" #devtypel "=" \
+ "run nandboot\0"
+
+#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
+ #devtypel #instance " "
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(USB, usb, 0) \
+ func(NAND, nand, 0) \
+ func(PXE, pxe, na) \
+ func(DHCP, dhcp, na)
+
+#include
+
#ifndef CONFIG_SPL_BUILD
#include
-#include
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
- DEFAULT_MMC_TI_ARGS \
- DEFAULT_FIT_TI_ARGS \
"fdtfile=undefined\0" \
- "bootpart=0:2\0" \
- "bootdir=/boot\0" \
- "bootfile=zImage\0" \
+ "finduuid=part uuid mmc 0:2 uuid\0" \
"console=ttyO0,115200n8\0" \
"partitions=" \
"uuid_disk=${uuid_gpt_disk};" \
"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
"optargs=\0" \
- "usbroot=/dev/sda2 rw\0" \
- "usbrootfstype=ext4 rootwait\0" \
- "usbdev=0\0" \
"ramroot=/dev/ram0 rw\0" \
"ramrootfstype=ext2\0" \
- "usbargs=setenv bootargs console=${console} " \
- "${optargs} " \
- "root=${usbroot} " \
- "rootfstype=${usbrootfstype}\0" \
Re: [RFC] Load U-Boot without LK on DragonBoard 410c (+ DB820c?)
Hi Nicolas, On Thu, Jul 01, 2021 at 01:27:30PM +0200, Nicolas Dechesne wrote: > On Thu, Jul 1, 2021 at 11:07 AM Stephan Gerhold wrote: > > > > Hi! > > > > at the moment the U-Boot ports for both DragonBoard 410c and 820c are > > designed to be loaded as an Android boot image after Qualcomm's LK > > bootloader. This is simple to set up but LK is redundant in this case, > > since everything done by LK can be also done directly by U-Boot. > > > > Dropping LK entirely would have at least the following advantages: > > - Easier installation/board code (no need for Android boot images) > > - (Slightly) faster boot > > - Boot directly in 64-bit without a round trip to 32-bit for LK > > > > This was not possible so far because of some unsolved problems. > > For clarity I try to describe them together with some background here, > > but I want to apologize for the long text. It's all quite complicated. :) > > > > 1. "Signing" 64-bit U-Boot > > == > > > > Ramon already tried to eliminate LK for DB410c 3 years ago [1]. > > One of the open problems back then was to have a proper "signing" > > tool with 64-bit support. The firmware expects an ELF image with a few > > Qualcomm-specific ELF headers. Normally this is used for secure boot > > setups. This is not used on DragonBoards, but the firmware still insists > > on having a dummy (self-signed) certificate chain in the ELF images. > > Yeah, the signing was the last step we missed. We were able to sign > using internal / non open source tools.. but never finalized the boot > process completely.. I am very happy you persisted with that! > > > > > Linaro uses signlk [2] to sign their builds of LK. It looks like Nicolas > > extended it with ELF64 support after Ramon's mail [3]. However, for some > > reason signlk literally works only for LK for me. I tried to "sign" > > U-Boot and some other firmware, but everything except LK is always > > rejected with the following message on boot: > > > > B - 1031113 - Error code 302e at boot_config.c Line 296 > > > > I tried to track down the issue in the source code for quite some time > > but did not manage to find the problem. Perhaps it's some subtle mistake > > with some of the ELF modifications, I'm not sure. (For some reason, > > signlk makes subtle changes to all of the existing ELF headers...) > > > > After reading about the image format myself I decided to try to make my > > own "signing" tool, qtestsign: https://github.com/msm8916-mainline/qtestsign > > It's based on a mixture of the specification [4] and some missing bits > > taken from signlk, put in a simple and clean Python tool. I still don't > > know what exactly qtestsign does different, but unlike signlk it can > > successfully "sign" U-Boot and all other firmware from DragonBoard 410c. > > There is no specific reason to restrict ourselves to using signlk.. if > you have something better, which works, that's perfect! > > > > > [1]: > > https://lore.kernel.org/u-boot/CA+Kvs9kS=dbjknaixk_3tz+3iwnrasp0gjdz8ekrzaskor6...@mail.gmail.com/ > > [2]: https://git.linaro.org/landing-teams/working/qualcomm/signlk.git/ > > [3]: > > https://git.linaro.org/landing-teams/working/qualcomm/signlk.git/commit/?id=1f61c03322c3728f35b3f0cd4ff04f73522f1e67 > > [4]: > > https://www.qualcomm.com/media/documents/files/secure-boot-and-image-authentication-technical-overview-v1-0.pdf > > > > My solution > > --- > > > > Now we have all we need to install U-Boot without LK. For DragonBoard 410c > > the following steps end up in the U-Boot prompt without going through LK: > > > > 1. Change dragonboard410c_defconfig as follows: > > > >-CONFIG_SYS_TEXT_BASE=0x8008 > >+CONFIG_SYS_TEXT_BASE=0x8F60 > >+CONFIG_OF_EMBED=y (I discuss this at the end of the mail) > > > > 2. $ make > > 3. Sign the ELF image: $ qtestsign.py aboot /u-boot [5] > > 4. Flash "/u-boot-test-signed.mbn" to the "aboot" partition > > > > [5]: https://github.com/msm8916-mainline/qtestsign > > > > 2. Linux gets stuck when loaded by 64-bit U-Boot without LK > > === > > > > This should work well enough to get the U-Boot prompt on serial. > > However, once you load Linux you will likely notice a problem: > > > > [0.059043] smp: Bringing up secondary CPUs ... > > [5.120691] CPU1: failed to come online > > [ 10.246760] CPU2: failed to come online > > [ 15.372848] CPU3: failed to come online > > [ 15.406275] CPU: All CPU(s) started at EL1 > > ... > > [ 16.185527] genirq: irq_chip msmgpio did not update eff. affinity > > mask of irq 79 > > Board freezes forever. :( > > > > My investigations have shown this is a bug in the PSCI implementation on > > DB410c (part of the TrustZone/"tz" firmware). Shortly said, since we > > have never done the 32-bit -> 64-bit switch in LK, the PSCI implementation > > seems to believe we are still running in
[PATCH 7/7] stm32mp: cmd_stm32key: add subcommand close
This message could not be delivered immediately due to an internal mail routing
issue.
The mail routing error has been resolved in the meantime.
We apologize for the delay in delivery and any inconvenience this may have
caused.
In case of any questions please contact us via i...@hexagon.com.
Original sender: patrick.delau...@foss.st.com
Original delivery time: 28-Jun-2021 01:04 PM (UTC)
---
This email is not from Hexagon’s Office 365 instance. Please be careful while
clicking links, opening attachments, or replying to this email. The expected
sequence to close the device 1/ Load key in DDR with any supported load command
2/ Update OTP with key: STM32MP> stm32key read At this point the device is able
to perform image authentication but non-authenticated images can still be used
and executed. So it is the last moment to test boot with signed binary and
check that the ROM code accepts them. 3/ Close the device: only signed binary
will be accepted !! STM32MP> stm32key close Warning: Programming these OTP is
an irreversible operation! This may brick your system if the HASH of key is
invalid This command should be deactivated by default in real product.
Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/cmd_stm32key.c | 54
++-- 1 file changed, 52 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
b/arch/arm/mach-stm32mp/cmd_stm32key.c index 8c8d476b65..50840b0f38 100644 ---
a/arch/arm/mach-stm32mp/cmd_stm32key.c +++
b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -210,10 +210,60 @@ static int
do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con return
CMD_RET_SUCCESS; } +static int do_stm32key_close(struct cmd_tbl *cmdtp, int
flag, int argc, char *const argv[]) +{ + bool yes, lock, closed; + struct
udevice *dev; + u32 val; + int ret; + + yes = false; + if (argc == 2) { + if
(strcmp(argv[1], "-y")) + return CMD_RET_USAGE; + yes = true; + } + + ret =
read_hash_otp(!yes, , ); + if (ret) { + if (ret == -ENOENT) +
printf("Error: OTP not programmed!\n"); + return CMD_RET_FAILURE; + } + + if
(closed) { + printf("Error: already closed!\n"); + return CMD_RET_FAILURE; + }
+ + if (!lock) + printf("Warning: OTP not locked!\n"); + + if (!yes &&
!confirm_prog()) + return CMD_RET_FAILURE; + + ret = get_misc_dev(); + if
(ret) + return CMD_RET_FAILURE; + + val = STM32_OTP_CLOSE_MASK; + ret =
misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), , 4); + if (ret != 4) {
+ printf("Error: can't update OTP\n"); + return CMD_RET_FAILURE; + } + +
printf("Device is closed !\n"); + + return CMD_RET_SUCCESS; +} + static char
stm32key_help_text[] = "read []: Read the hash stored at addr in memory or in
OTP\n" - "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n"; + "stm32key
fuse [-y] : Fuse hash stored at addr in OTP\n" + "stm32key close [-y] : Close
the device, the hash stored in OTP\n"; U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse
ST Hash key", stm32key_help_text, U_BOOT_SUBCMD_MKENT(read, 2, 0,
do_stm32key_read), - U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse)); +
U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse), + U_BOOT_SUBCMD_MKENT(close,
2, 0, do_stm32key_close)); -- 2.25.1
[PATCH 6/7] stm32mp: cmd_stm32key: add read OTP subcommand
This message could not be delivered immediately due to an internal mail routing
issue.
The mail routing error has been resolved in the meantime.
We apologize for the delay in delivery and any inconvenience this may have
caused.
In case of any questions please contact us via i...@hexagon.com.
Original sender: patrick.delau...@foss.st.com
Original delivery time: 28-Jun-2021 01:00 PM (UTC)
---
This email is not from Hexagon’s Office 365 instance. Please be careful while
clicking links, opening attachments, or replying to this email. Allow to read
the OTP value and lock status with the command $> stm32key read. This patch
also protects the stm32key fuse command. Signed-off-by: Patrick Delaunay ---
arch/arm/mach-stm32mp/cmd_stm32key.c | 93 ++-- 1 file
changed, 87 insertions(+), 6 deletions(-) diff --git
a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c
index 886c52794f..8c8d476b65 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -11,8 +11,13 @@ #include #include
-#define STM32_OTP_HASH_KEY_START 24 -#define STM32_OTP_HASH_KEY_SIZE 8 +/*
Closed device : bit 6 of OPT0*/ +#define STM32_OTP_CLOSE_ID 0 +#define
STM32_OTP_CLOSE_MASK BIT(6) + +/* HASH of key: 8 OTPs, starting with OTP24) */
+#define STM32_OTP_HASH_KEY_START 24 +#define STM32_OTP_HASH_KEY_SIZE 8 static
int get_misc_dev(struct udevice **dev) { @@ -29,6 +34,7 @@ static void
read_hash_value(u32 addr) { int i; + printf("Read KEY at 0x%x\n", addr); for (i
= 0; i < STM32_OTP_HASH_KEY_SIZE; i++) { printf("OTP value %i: %x\n",
STM32_OTP_HASH_KEY_START + i, __be32_to_cpu(*(u32 *)addr)); @@ -36,6 +42,69 @@
static void read_hash_value(u32 addr) } } +static int read_hash_otp(bool print,
bool *locked, bool *closed) +{ + struct udevice *dev; + int i, word, ret; + int
nb_invalid = 0, nb_zero = 0, nb_lock = 0; + u32 val, lock; + bool status; + +
ret = get_misc_dev(); + if (ret) + return ret; + + for (i = 0, word =
STM32_OTP_HASH_KEY_START; i < STM32_OTP_HASH_KEY_SIZE; i++, word++) { + ret =
misc_read(dev, STM32_BSEC_OTP(word), , 4); + if (ret != 4) + val = ~0x0; +
ret = misc_read(dev, STM32_BSEC_LOCK(word), , 4); + if (ret != 4) + lock =
-1; + if (print) + printf("OTP HASH %i: %x lock : %d\n", word, val, lock); + if
(val == ~0x0) + nb_invalid++; + else if (val == 0x0) + nb_zero++; + if (lock ==
1) + nb_lock++; + } + + word = STM32_OTP_CLOSE_ID; + ret = misc_read(dev,
STM32_BSEC_OTP(word), , 4); + if (ret != 4) + val = 0x0; + ret =
misc_read(dev, STM32_BSEC_LOCK(word), , 4); + if (ret != 4) + lock = -1; +
+ status = (val & STM32_OTP_CLOSE_MASK) == STM32_OTP_CLOSE_MASK; + if (closed)
+ *closed = status; + if (print) + printf("OTP %d: closed status: %d lock :
%d\n", word, status, lock); + + status = (nb_lock == STM32_OTP_HASH_KEY_SIZE);
+ if (locked) + *locked = status; + if (!status && print) + printf("Hash of key
is not locked!\n"); + + if (nb_invalid == STM32_OTP_HASH_KEY_SIZE) { + if
(print) + printf("Hash of key is invalid!\n"); + return -EINVAL; + } + if
(nb_zero == STM32_OTP_HASH_KEY_SIZE) { + if (print) + printf("Hash of key is
free!\n"); + return -ENOENT; + } + + return 0; +} + static int
fuse_hash_value(u32 addr, bool print) { struct udevice *dev; @@ -88,8 +157,10
@@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char
*con { u32 addr; - if (argc == 1) - return CMD_RET_USAGE; + if (argc == 1) { +
read_hash_otp(true, NULL, NULL); + return CMD_RET_SUCCESS; + } addr =
simple_strtoul(argv[1], NULL, 16); if (!addr) @@ -103,7 +174,7 @@ static int
do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char *con static
int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[]) { u32 addr; - bool yes = false; + bool yes = false, lock, closed; if
(argc < 2) return CMD_RET_USAGE; @@ -118,6 +189,16 @@ static int
do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *con if
(!addr) return CMD_RET_USAGE; + if (read_hash_otp(!yes, , ) !=
-ENOENT) { + printf("Error: can't fuse again the OTP\n"); + return
CMD_RET_FAILURE; + } + + if (lock || closed) { + printf("Error: invalid OTP
configuration (lock=%d, closed=%d)\n", lock, closed); + return CMD_RET_FAILURE;
+ } + if (!yes && !confirm_prog()) return CMD_RET_FAILURE; @@ -130,7 +211,7 @@
static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char
*con } static char stm32key_help_text[] = - "read : Read the hash stored at
addr in memory\n" + "read []: Read the hash stored at addr in memory or in
OTP\n" "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n";
U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse ST Hash key", stm32key_help_text, --
2.25.1
[PATCH] stm32mp: stm32prog: fix the content of short help message
This message could not be delivered immediately due to an internal mail routing
issue.
The mail routing error has been resolved in the meantime.
We apologize for the delay in delivery and any inconvenience this may have
caused.
In case of any questions please contact us via i...@hexagon.com.
Original sender: patrick.delau...@foss.st.com
Original delivery time: 28-Jun-2021 01:06 PM (UTC)
---
This email is not from Hexagon’s Office 365 instance. Please be careful while
clicking links, opening attachments, or replying to this email. Reduce the
content of short help message for stm32prog command and removed the carriage
return to fix the display of 'help' command when this command is activated.
Fixes: 954bd1a923a6 ("stm32mp: add the command stm32prog") Signed-off-by:
Patrick Delaunay --- arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c | 10
+- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git
a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index
feff73c79e..064f51b2c7 100644 ---
a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++
b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -177,12 +177,12 @@
cleanup: } U_BOOT_CMD(stm32prog, 5, 0, do_stm32prog, + "start communication
with tools STM32Cubeprogrammer", " [] []\n" - "start communication with tools
STM32Cubeprogrammer on with Flashlayout at ", - " = serial|usb\n" - " = device
instance\n" - " = address of flashlayout\n" - " = size of flashlayout\n" + " =
serial|usb\n" + " = device instance\n" + " = address of flashlayout\n" + " =
size of flashlayout (optional for image with STM32 header)\n" ); bool
stm32prog_get_tee_partitions(void) -- 2.25.1
Re: [RFC PATCH v1 0/6] add rk3318 A95X Z2 board
Hi Johan,
Am 30.06.21 um 18:22 schrieb Johan Jonker:
With a new board from a recent Linux DT the U-boot rk3328.dtsi
is in need for an update.
Please advise what to do with usb3 regulators, aliases and
other stuff that has to change.
Also some of the U-boot board files could use some
dtbs_check for bogus properties and restyling... ;)
While at bogus properties:
The ddc-i2c-scl-* properties you are defining in the hdmi node of
rk3318-a95x-z2.dts look like an leftover from vendor kernel: they do not
exist for the upstream dw-hdmi driver in neither u-boot nor kernel.
(Not sure this would pop up with dtbs_check currently)
Alex.
rk3328 USB2 and USB3 only roughly tested.
===
Howto use:
Compile bl31.elf:
git clone --depth 1 https://github.com/ARM-software/arm-trusted-firmware.git
cd arm-trusted-firmware
make realclean
make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328
export BL31=//arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
cd ..
Compile U-boot:
git clone --depth 1 https://github.com/u-boot/u-boot.git uboot
cd uboot
make CROSS_COMPILE=aarch64-linux-gnu- a95x-z2-rk3318_defconfig all
===
Use U-boot to create a GPT on a SD card,
because of partition GUID and sizes.
mmc dev 0
mmc info
gpt write mmc 0 $partitions
mmc part
===
Write to SD card:
export DISK=/dev/mmcblk0
sudo dd if=./idbloader.img of=${DISK} seek=64
sudo dd if=./u-boot.itb of=${DISK} seek=16384
sync
===
Format boot partition with fat16.
Add /Image and /rk3318-a95x-z2.dtb
Add extlinux dir with extlinux.conf
label kernel
kernel /Image
fdt /rk3318-a95x-z2.dtb
append root=/dev/mmcblk0p5 rw console=tty0 console=ttyS2,150n8
earlycon=uart8250,mmio32,0xff13,keep $
===
Use fastboot:
Hit any key to stop autoboot:
usb start
usb dev 1
fastboot usb 1
=
sudo fastboot devices -l
sudo fastboot erase loader1
sudo fastboot erase loader2
sudo fastboot flash loader1 idbloader.img
sudo fastboot flash loader2 u-boot.itb
=
ctrl-c
reset
===
Johan Jonker (6):
arm: dts: rockchip: update rk3328.dtsi
arm: dts: rockchip: remove usb_host0_xhci node from rk3328-u-boot.dtsi
arm: dts: rockchip: move mmc aliases to board files
arm: dts: rockchip: move spi0 u-boot,dm-pre-reloc and alias to rk3328
board files
rockchip: rk3318: add a95x-z2-rk3318_defconfig file
arm: dts: rockchip: add rk3318 A95X Z2 board
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi| 59 +
arch/arm/dts/rk3318-a95x-z2.dts| 384 +
arch/arm/dts/rk3328-evb-u-boot.dtsi| 2 +-
arch/arm/dts/rk3328-evb.dts| 8 +-
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +-
arch/arm/dts/rk3328-nanopi-r2s.dts | 6 +-
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 4 +-
arch/arm/dts/rk3328-roc-cc.dts | 7 +-
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 4 +-
arch/arm/dts/rk3328-rock-pi-e.dts | 7 +-
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 10 +-
arch/arm/dts/rk3328-rock64.dts | 7 +-
arch/arm/dts/rk3328-u-boot.dtsi| 21 --
arch/arm/dts/rk3328.dtsi | 109
board/rockchip/evb_rk3328/MAINTAINERS | 6 +
configs/a95x-z2-rk3318_defconfig | 102
doc/board/rockchip/rockchip.rst| 2 +
18 files changed, 661 insertions(+), 80 deletions(-)
create mode 100644 arch/arm/dts/rk3318-a95x-z2-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3318-a95x-z2.dts
create mode 100644 configs/a95x-z2-rk3318_defconfig
Re: [RFC] Load U-Boot without LK on DragonBoard 410c (+ DB820c?)
hey Stephan, Thanks for such a great email! the outcome is excellent! On Thu, Jul 1, 2021 at 11:07 AM Stephan Gerhold wrote: > > Hi! > > at the moment the U-Boot ports for both DragonBoard 410c and 820c are > designed to be loaded as an Android boot image after Qualcomm's LK > bootloader. This is simple to set up but LK is redundant in this case, > since everything done by LK can be also done directly by U-Boot. > > Dropping LK entirely would have at least the following advantages: > - Easier installation/board code (no need for Android boot images) > - (Slightly) faster boot > - Boot directly in 64-bit without a round trip to 32-bit for LK > > This was not possible so far because of some unsolved problems. > For clarity I try to describe them together with some background here, > but I want to apologize for the long text. It's all quite complicated. :) > > 1. "Signing" 64-bit U-Boot > == > > Ramon already tried to eliminate LK for DB410c 3 years ago [1]. > One of the open problems back then was to have a proper "signing" > tool with 64-bit support. The firmware expects an ELF image with a few > Qualcomm-specific ELF headers. Normally this is used for secure boot > setups. This is not used on DragonBoards, but the firmware still insists > on having a dummy (self-signed) certificate chain in the ELF images. Yeah, the signing was the last step we missed. We were able to sign using internal / non open source tools.. but never finalized the boot process completely.. I am very happy you persisted with that! > > Linaro uses signlk [2] to sign their builds of LK. It looks like Nicolas > extended it with ELF64 support after Ramon's mail [3]. However, for some > reason signlk literally works only for LK for me. I tried to "sign" > U-Boot and some other firmware, but everything except LK is always > rejected with the following message on boot: > > B - 1031113 - Error code 302e at boot_config.c Line 296 > > I tried to track down the issue in the source code for quite some time > but did not manage to find the problem. Perhaps it's some subtle mistake > with some of the ELF modifications, I'm not sure. (For some reason, > signlk makes subtle changes to all of the existing ELF headers...) > > After reading about the image format myself I decided to try to make my > own "signing" tool, qtestsign: https://github.com/msm8916-mainline/qtestsign > It's based on a mixture of the specification [4] and some missing bits > taken from signlk, put in a simple and clean Python tool. I still don't > know what exactly qtestsign does different, but unlike signlk it can > successfully "sign" U-Boot and all other firmware from DragonBoard 410c. There is no specific reason to restrict ourselves to using signlk.. if you have something better, which works, that's perfect! > > [1]: > https://lore.kernel.org/u-boot/CA+Kvs9kS=dbjknaixk_3tz+3iwnrasp0gjdz8ekrzaskor6...@mail.gmail.com/ > [2]: https://git.linaro.org/landing-teams/working/qualcomm/signlk.git/ > [3]: > https://git.linaro.org/landing-teams/working/qualcomm/signlk.git/commit/?id=1f61c03322c3728f35b3f0cd4ff04f73522f1e67 > [4]: > https://www.qualcomm.com/media/documents/files/secure-boot-and-image-authentication-technical-overview-v1-0.pdf > > My solution > --- > > Now we have all we need to install U-Boot without LK. For DragonBoard 410c > the following steps end up in the U-Boot prompt without going through LK: > > 1. Change dragonboard410c_defconfig as follows: > >-CONFIG_SYS_TEXT_BASE=0x8008 >+CONFIG_SYS_TEXT_BASE=0x8F60 >+CONFIG_OF_EMBED=y (I discuss this at the end of the mail) > > 2. $ make > 3. Sign the ELF image: $ qtestsign.py aboot /u-boot [5] > 4. Flash "/u-boot-test-signed.mbn" to the "aboot" partition > > [5]: https://github.com/msm8916-mainline/qtestsign > > 2. Linux gets stuck when loaded by 64-bit U-Boot without LK > === > > This should work well enough to get the U-Boot prompt on serial. > However, once you load Linux you will likely notice a problem: > > [0.059043] smp: Bringing up secondary CPUs ... > [5.120691] CPU1: failed to come online > [ 10.246760] CPU2: failed to come online > [ 15.372848] CPU3: failed to come online > [ 15.406275] CPU: All CPU(s) started at EL1 > ... > [ 16.185527] genirq: irq_chip msmgpio did not update eff. affinity mask > of irq 79 > Board freezes forever. :( > > My investigations have shown this is a bug in the PSCI implementation on > DB410c (part of the TrustZone/"tz" firmware). Shortly said, since we > have never done the 32-bit -> 64-bit switch in LK, the PSCI implementation > seems to believe we are still running in 32-bit mode and starts all > further CPUs in 32-bit mode. The other CPU cores crash immediately when > coming up and CPU 0 hangs once CPU idle suspends it for the first time. > > I have described this problem
Re: [PATCH 5/9] board: phytec: phycore_imx8mp: Add fec support
Hi Teresa, Your series looks great. Just a few comments on this patch. On Thu, Jul 1, 2021 at 6:47 AM Teresa Remmet wrote: > --- a/include/configs/phycore_imx8mp.h > +++ b/include/configs/phycore_imx8mp.h > @@ -42,6 +42,8 @@ > "console=ttymxc0,115200\0" \ > "fdt_addr=0x4800\0" \ > "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ > + "ip_dyn=yes\0" \ > + "serverip=192.168.3.10\0" \ Please do not hardcode the "serverip" variable. > +/* ENET1 */ > +#define CONFIG_ETHPRIME "FEC" > +#define CONFIG_FEC_XCV_TYPE RGMII > +#define CONFIG_FEC_MXC_PHYADDR 0 > +#define FEC_QUIRK_ENET_MAC > +#define IMX_FEC_BASE0x30BE As DM is being used these definitions can be removed. Please test without them.
Re: [PATCH 2/2] ARM: imx: Pick correct eMMC boot partition from ROM log
Hi,
On Thu, 2021-07-01 at 01:08 +0200, Marek Vasut wrote:
> In case the iMX8M boot from eMMC boot partition and the primary image
> is corrupted, the BootROM is capable of starting a secondary image in
> the other eMMC boot partition as a fallback.
>
> However, the BootROM leaves the eMMC BOOT_PARTITION_ENABLE setting as
> it was, i.e. pointing to the boot partition containing the corrupted
> image, and the BootROM does not provide any indication that this sort
> of fallback occured.
>
> According to AN12853 i.MX ROMs Log Events, Rev. 0, May 2020, it is
> possible to determine whether fallback event occurred by parsing the
> ROM event log. In case ROM event ID 0x51 is present, fallback event
> did occur.
>
> This patch implements ROM event log parsing and search for event ID
> 0x51 for all iMX8M SoCs, and based on that corrects the eMMC boot
> partition selection. This way, the SPL loads the remaining boot
> components from the same eMMC boot partition from which it was
> started, even in case of the fallback.
>
> Signed-off-by: Marek Vasut
> Cc: Faiz Abbas
> Cc: Harald Seiler
> Cc: Lokesh Vutla
> Cc: Simon Glass
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
> Cc: Ye Li
> ---
> arch/arm/mach-imx/imx8m/soc.c | 61 +++
> 1 file changed, 61 insertions(+)
>
> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
> index 0c44022a6dc..92a71b6ba29 100644
> --- a/arch/arm/mach-imx/imx8m/soc.c
> +++ b/arch/arm/mach-imx/imx8m/soc.c
> @@ -571,6 +571,67 @@ enum boot_device get_boot_device(void)
> }
> #endif
>
>
> +#if defined(CONFIG_IMX8M)
> +#include
> +int spl_mmc_emmc_boot_partition(struct mmc *mmc)
> +{
> + u32 *rom_log_addr = (u32 *)0x9e0;
> + u32 *rom_log;
> + u8 event_id;
> + int i, part;
> +
> + part = default_spl_mmc_emmc_boot_partition(mmc);
> +
> + /* If the ROM event log pointer is not valid. */
> + if (*rom_log_addr < 0x90 || *rom_log_addr >= 0xb0 ||
> + *rom_log_addr & 0x3)
> + return part;
> +
> + /* Parse the ROM event ID version 2 log */
> + rom_log = (u32 *)(uintptr_t)(*rom_log_addr);
> + for (i = 0; i < 128; i++) {
> + event_id = rom_log[i] >> 24;
> + switch (event_id) {
> + case 0x00: /* End of list */
> + break;
I assume your intention here is to break from the for loop? This `break`
will only exit the switch statement, so the loop will continue running on
the data following the "End of list". Or is this behavior intentional?
In that case I'd find the use of `continue` in the other branches a bit
odd, as `continue` and `break` do the same thing in this situation.
--
Harald
> + /* Log entries with 1 parameter, skip 1 */
> + case 0x80: /* Start to perform the device initialization */
> + case 0x81: /* The boot device initialization completes */
> + case 0x8f: /* The boot device initialization fails */
> + case 0x90: /* Start to read data from boot device */
> + case 0x91: /* Reading data from boot device completes */
> + case 0x9f: /* Reading data from boot device fails */
> + i += 1;
> + continue;
> + /* Log entries with 2 parameters, skip 2 */
> + case 0xa0: /* Image authentication result */
> + case 0xc0: /* Jump to the boot image soon */
> + i += 2;
> + continue;
> + /* Boot from the secondary boot image */
> + case 0x51:
> + /*
> + * Swap the eMMC boot partitions in case there was a
> + * fallback event (i.e. primary image was corrupted
> + * and that corruption was recognized by the BootROM),
> + * so the SPL loads the rest of the U-Boot from the
> + * correct eMMC boot partition, since the BootROM
> + * leaves the boot partition set to the corrupted one.
> + */
> + if (part == 1)
> + part = 2;
> + else if (part == 2)
> + part = 1;
> + continue;
> + default:
> + continue;
> + }
> + }
> +
> + return part;
> +}
> +#endif
> +
> bool is_usb_boot(void)
> {
> return get_boot_device() == USB_BOOT;
[PATCH 3/3] board: freescale: LX2162AQDS: Add MAINTAINER
This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via i...@hexagon.com. Original sender: wasim.k...@oss.nxp.com Original delivery time: 28-Jun-2021 12:41 PM (UTC) --- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2162AQDS board Signed-off-by: Wasim Khan --- Change in v2: Fix typo board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index fca828148e..c60b2af6e4 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -31,6 +31,7 @@ F: configs/lx2160aqds_tfa_SECURE_BOOT_defconfig LX2162AQDS BOARD M: Meenakshi Aggarwal +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/eth_lx2162aqds.h F: include/configs/lx2162aqds.h -- 2.25.1
[v2 PATCH 1/3] board: freescale: LX2160ARDB: Add MAINTAINER
This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via i...@hexagon.com. Original sender: wasim.k...@oss.nxp.com Original delivery time: 28-Jun-2021 12:35 PM (UTC) --- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2160ARDB board Signed-off-by: Wasim Khan --- Change in v2: Fix typo board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index cc69de2970..fd33c51ac7 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -1,6 +1,7 @@ LX2160ARDB BOARD M: Meenakshi Aggarwal M: Priyanka Jain +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/ F: include/configs/lx2160a_common.h -- 2.25.1
Re: [PATCH 3/4] NSA310S : Use Ethernet PHY name from device tree
Hi Stefan, On Thu, Jul 1, 2021 at 1:22 AM Stefan Roese wrote: > > Hi Tony, > > On 01.07.21 10:19, Stefan Roese wrote: > > On 01.07.21 06:26, Tony Dinh wrote: > >> In DM Ethernet, the old "egiga0" name is no longer valid, so replace it > >> with Ethernet PHY name from device tree. > >> > >> Signed-off-by: Tony Dinh > >> --- > >> > >> board/zyxel/nsa310s/nsa310s.c | 15 +++ > >> 1 file changed, 7 insertions(+), 8 deletions(-) > >> > >> diff --git a/board/zyxel/nsa310s/nsa310s.c > >> b/board/zyxel/nsa310s/nsa310s.c > >> index cd4a7723b1..29aded1910 100644 > >> --- a/board/zyxel/nsa310s/nsa310s.c > >> +++ b/board/zyxel/nsa310s/nsa310s.c > >> @@ -1,5 +1,6 @@ > >> // SPDX-License-Identifier: GPL-2.0+ > >> /* > >> + * Copyright (C) 2021 Tony Dinh > > > > AFAIU, just changing a few lines, as this patch does, does not justify > > to add a copyright notice to this file. > > I just noticed that you already are present in the copyright notice > below. I suggest to change this in a way, so that your name only > occurs once, like: > > * Copyright (C) 2015, 2021 Tony Dinh > > Does this make sense? Definitely! I will correct the copyright for this patch and also the copyright in patch 4/4 using this convention. > > Thanks, > Stefan > > >>* Copyright (C) 2015 > >>* Gerald Kerma > >>* Tony Dinh > >> @@ -81,22 +82,18 @@ int board_init(void) > >> return 0; > >> } > >> +#define PHY_ADR1 > > > > You should be able to read this PHY address from the device-tree now. > > No need to define this here again. I don't know yet how to extract this info from the device tree nodes (I am familiar with this in Linux kernel, but at first glance it seems like u-boot fdt library is different). So if it is OK, perhaps I could send in another patch for this correction after this DM conversion is done. Thanks, Tony
Re: [PATCH 2/2] ARM: imx: Pick correct eMMC boot partition from ROM log
Hello Marek,
Am Donnerstag, den 01.07.2021, 01:08 +0200 schrieb Marek Vasut:
> In case the iMX8M boot from eMMC boot partition and the primary image
> is corrupted, the BootROM is capable of starting a secondary image in
> the other eMMC boot partition as a fallback.
I would like to ask a more general question. As I could not find
information about that. What are the criteria for the BootROM to
consider a image as corrupted?
I remember on other platforms with NAND where it was a erased page or
too many bitflips. What is it here with eMMC?
Thanks,
Teresa
>
> However, the BootROM leaves the eMMC BOOT_PARTITION_ENABLE setting as
> it was, i.e. pointing to the boot partition containing the corrupted
> image, and the BootROM does not provide any indication that this sort
> of fallback occured.
>
> According to AN12853 i.MX ROMs Log Events, Rev. 0, May 2020, it is
> possible to determine whether fallback event occurred by parsing the
> ROM event log. In case ROM event ID 0x51 is present, fallback event
> did occur.
>
> This patch implements ROM event log parsing and search for event ID
> 0x51 for all iMX8M SoCs, and based on that corrects the eMMC boot
> partition selection. This way, the SPL loads the remaining boot
> components from the same eMMC boot partition from which it was
> started, even in case of the fallback.
>
> Signed-off-by: Marek Vasut
> Cc: Faiz Abbas
> Cc: Harald Seiler
> Cc: Lokesh Vutla
> Cc: Simon Glass
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
> Cc: Ye Li
> ---
> arch/arm/mach-imx/imx8m/soc.c | 61
> +++
> 1 file changed, 61 insertions(+)
>
> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-
> imx/imx8m/soc.c
> index 0c44022a6dc..92a71b6ba29 100644
> --- a/arch/arm/mach-imx/imx8m/soc.c
> +++ b/arch/arm/mach-imx/imx8m/soc.c
> @@ -571,6 +571,67 @@ enum boot_device get_boot_device(void)
> }
> #endif
>
> +#if defined(CONFIG_IMX8M)
> +#include
> +int spl_mmc_emmc_boot_partition(struct mmc *mmc)
> +{
> + u32 *rom_log_addr = (u32 *)0x9e0;
> + u32 *rom_log;
> + u8 event_id;
> + int i, part;
> +
> + part = default_spl_mmc_emmc_boot_partition(mmc);
> +
> + /* If the ROM event log pointer is not valid. */
> + if (*rom_log_addr < 0x90 || *rom_log_addr >= 0xb0 ||
> + *rom_log_addr & 0x3)
> + return part;
> +
> + /* Parse the ROM event ID version 2 log */
> + rom_log = (u32 *)(uintptr_t)(*rom_log_addr);
> + for (i = 0; i < 128; i++) {
> + event_id = rom_log[i] >> 24;
> + switch (event_id) {
> + case 0x00: /* End of list */
> + break;
> + /* Log entries with 1 parameter, skip 1 */
> + case 0x80: /* Start to perform the device
> initialization */
> + case 0x81: /* The boot device initialization completes
> */
> + case 0x8f: /* The boot device initialization fails */
> + case 0x90: /* Start to read data from boot device */
> + case 0x91: /* Reading data from boot device completes
> */
> + case 0x9f: /* Reading data from boot device fails */
> + i += 1;
> + continue;
> + /* Log entries with 2 parameters, skip 2 */
> + case 0xa0: /* Image authentication result */
> + case 0xc0: /* Jump to the boot image soon */
> + i += 2;
> + continue;
> + /* Boot from the secondary boot image */
> + case 0x51:
> + /*
> + * Swap the eMMC boot partitions in case there
> was a
> + * fallback event (i.e. primary image was
> corrupted
> + * and that corruption was recognized by the
> BootROM),
> + * so the SPL loads the rest of the U-Boot from
> the
> + * correct eMMC boot partition, since the
> BootROM
> + * leaves the boot partition set to the
> corrupted one.
> + */
> + if (part == 1)
> + part = 2;
> + else if (part == 2)
> + part = 1;
> + continue;
> + default:
> + continue;
> + }
> + }
> +
> + return part;
> +}
> +#endif
> +
> bool is_usb_boot(void)
> {
> return get_boot_device() == USB_BOOT;
[v2 PATCH 2/3] board: freescale: LX2160AQDS: Add MAINTAINER
This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via i...@hexagon.com. Original sender: wasim.k...@oss.nxp.com Original delivery time: 28-Jun-2021 12:15 PM (UTC) --- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2160AQDS board Signed-off-by: Wasim Khan --- Change in v2: Fix typo board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index fd33c51ac7..fca828148e 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -17,6 +17,7 @@ F: configs/lx2160ardb_tfa_SECURE_BOOT_defconfig LX2160AQDS BOARD M: Meenakshi Aggarwal +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/eth_lx2160aqds.h F: include/configs/lx2160aqds.h -- 2.25.1
[PATCH 9/9] board: phytec: imx8mp-phycore: Switch to binman
Use now binman for image creation.
Signed-off-by: Teresa Remmet
---
.../imx8mp-phyboard-pollux-rdk-u-boot.dtsi| 105 ++
arch/arm/mach-imx/imx8m/Kconfig | 1 +
.../phytec/phycore_imx8mp/imximage-8mp-sd.cfg | 10 ++
configs/phycore-imx8mp_defconfig | 4 +-
4 files changed, 118 insertions(+), 2 deletions(-)
create mode 100644 board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
index dbc48dfb4841..2b8e77cb27c5 100644
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
@@ -7,6 +7,10 @@
#include "imx8mp-u-boot.dtsi"
/ {
+ binman: binman {
+ multiple-images;
+ };
+
wdt-reboot {
compatible = "wdt-reboot";
wdt = <>;
@@ -81,3 +85,104 @@
{
u-boot,dm-spl;
};
+
+ {
+u-boot-spl-ddr {
+ filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+ align-size = <4>;
+ align = <4>;
+
+ u-boot-spl {
+ align-end = <4>;
+ };
+
+ blob_1: blob-ext@1 {
+ filename = "lpddr4_pmu_train_1d_imem_202006.bin";
+ size = <0x8000>;
+ };
+
+ blob_2: blob-ext@2 {
+ filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
+ size = <0x4000>;
+ };
+
+ blob_3: blob-ext@3 {
+ filename = "lpddr4_pmu_train_2d_imem_202006.bin";
+ size = <0x8000>;
+ };
+
+ blob_4: blob-ext@4 {
+ filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
+ size = <0x4000>;
+ };
+ };
+
+ flash {
+ mkimage {
+ args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x92";
+
+ blob {
+ filename = "u-boot-spl-ddr.bin";
+ };
+ };
+ };
+
+ itb {
+ filename = "u-boot.itb";
+
+ fit {
+ description = "Configuration to load ATF before U-Boot";
+ #address-cells = <1>;
+ fit,external-offset = ;
+
+ images {
+ uboot {
+ description = "U-Boot (64-bit)";
+ type = "standalone";
+ arch = "arm64";
+ compression = "none";
+ load = ;
+
+ uboot_blob: blob-ext {
+ filename = "u-boot-nodtb.bin";
+ };
+ };
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ load = <0x97>;
+ entry = <0x97>;
+
+ atf_blob: blob-ext {
+ filename = "bl31.bin";
+ };
+ };
+
+ fdt {
+ description = "NAME";
+ type = "flat_dt";
+ compression = "none";
+
+ uboot_fdt_blob: blob-ext {
+ filename = "u-boot.dtb";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf";
+
+ conf {
+ description = "NAME";
+ firmware = "uboot";
+ loadables = "atf";
+ fdt = "fdt";
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 0669363c0f51..ccaf106be5d8 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -127,6 +127,7 @@ config TARGET_PHYCORE_IMX8MM
config TARGET_PHYCORE_IMX8MP
bool "PHYTEC PHYCORE i.MX8MP"
+ select BINMAN
select
[PATCH 7/9] board: phytec: phycore-imx8mp: Enable DVS1 control
Enable DVS1 control through PMIC_STBY_REQ. Signed-off-by: Teresa Remmet --- board/phytec/phycore_imx8mp/spl.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c index 815ca9badcba..19c486e55174 100644 --- a/board/phytec/phycore_imx8mp/spl.c +++ b/board/phytec/phycore_imx8mp/spl.c @@ -66,7 +66,11 @@ int power_init_board(void) pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C); pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C); - /* set WDOG_B_CFG to cold reset */ + /* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */ + pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14); + pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59); + + /* Set WDOG_B_CFG to cold reset */ pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1); return 0; -- 2.25.1
[PATCH 8/9] arm: dts: imx8mp-phyboard-pollux-rdk-u-boot: Add wdog pinctrl entry
Add missing pinctrl entry in spl.
Signed-off-by: Teresa Remmet
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
index 32ed037e3721..dbc48dfb4841 100644
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
@@ -34,6 +34,10 @@
u-boot,dm-spl;
};
+_wdog {
+ u-boot,dm-spl;
+};
+
{
u-boot,dm-spl;
};
--
2.25.1
[PATCH 6/9] board: phytec: phycore_imx8mp: Set VDD_ARM to 0,95V
Increase VDD_ARM to prevent timing issues as VDD_SOC is
used in OD mode. Also increase GIC clock.
Signed-off-by: Teresa Remmet
---
board/phytec/phycore_imx8mp/spl.c | 11 ++-
configs/phycore-imx8mp_defconfig | 1 +
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/board/phytec/phycore_imx8mp/spl.c
b/board/phytec/phycore_imx8mp/spl.c
index 0bc4c7693b06..815ca9badcba 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -62,7 +62,8 @@ int power_init_board(void)
/* BUCKxOUT_DVS0/1 control BUCK123 output */
pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
- /* increase VDD_SOC to typical value 0.95V */
+ /* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
+ pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
/* set WDOG_B_CFG to cold reset */
@@ -71,6 +72,14 @@ int power_init_board(void)
return 0;
}
+void spl_board_init(void)
+{
+ /* Set GIC clock to 500Mhz for OD VDD_SOC. */
+ clock_enable(CCGR_GIC, 0);
+ clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON |
CLK_ROOT_SOURCE_SEL(5));
+ clock_enable(CCGR_GIC, 1);
+}
+
int board_fit_config_name_match(const char *name)
{
return 0;
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index a22f5e089d97..89c2ac977f47 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -25,6 +25,7 @@ CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg"
CONFIG_DEFAULT_FDT_FILE="oftree"
CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
--
2.25.1
[PATCH 5/9] board: phytec: phycore_imx8mp: Add fec support
Enable support for the fec ethernet on phyCORE-i.MX8MP.
Signed-off-by: Teresa Remmet
---
board/phytec/phycore_imx8mp/phycore-imx8mp.c | 14 +++
configs/phycore-imx8mp_defconfig | 7 ++
include/configs/phycore_imx8mp.h | 25
3 files changed, 46 insertions(+)
diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
index 67649078c201..a8f082143762 100644
--- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
+++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
@@ -10,11 +10,25 @@
#include
#include
#include
+#include
DECLARE_GLOBAL_DATA_PTR;
+static int setup_fec(void)
+{
+ struct iomuxc_gpr_base_regs *gpr =
+ (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+ /* Use 125M anatop REF_CLK1 for ENET1, not from external */
+ clrsetbits_le32(>gpr[1], 0x2000, 0);
+
+ return 0;
+}
+
int board_init(void)
{
+ setup_fec();
+
return 0;
}
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 7f21ee0e..a22f5e089d97 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -58,6 +58,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
@@ -79,7 +80,13 @@ CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_TI_DP83867=y
CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_FEC_MXC=y
+CONFIG_RGMII=y
+CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index e24f223c21d3..9de89c58289b 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -42,6 +42,8 @@
"console=ttymxc0,115200\0" \
"fdt_addr=0x4800\0" \
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "ip_dyn=yes\0" \
+ "serverip=192.168.3.10\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcroot=2\0" \
@@ -57,6 +59,22 @@
"else " \
"echo WARN: Cannot load the DT; " \
"fi;\0 " \
+ "nfsroot=/nfs\0" \
+ "netargs=setenv bootargs console=${console} root=/dev/nfs ip=dhcp " \
+ "nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${loadaddr} ${image}; " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "booti ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi;\0" \
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
@@ -103,4 +121,11 @@
/* I2C */
#define CONFIG_SYS_I2C_SPEED 10
+/* ENET1 */
+#define CONFIG_ETHPRIME "FEC"
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_FEC_MXC_PHYADDR 0
+#define FEC_QUIRK_ENET_MAC
+#define IMX_FEC_BASE0x30BE
+
#endif /* __PHYCORE_IMX8MP_H */
--
2.25.1
[PATCH 4/9] board: phytec: phycore_imx8mp: Change debug UART
With the first redesign the debug UART had changed from
UART2 to UART1.
As the first hardware revision is considered as alpha and
will not be supported in future. The old setup will not
be preserved.
Signed-off-by: Teresa Remmet
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 4 ++--
board/phytec/phycore_imx8mp/spl.c | 6 +++---
include/configs/phycore_imx8mp.h| 4 ++--
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
index 6c1528934a98..32ed037e3721 100644
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
@@ -18,7 +18,7 @@
u-boot,dm-spl;
};
-_uart2 {
+_uart1 {
u-boot,dm-spl;
};
@@ -54,7 +54,7 @@
u-boot,dm-spl;
};
- {
+ {
u-boot,dm-spl;
};
diff --git a/board/phytec/phycore_imx8mp/spl.c
b/board/phytec/phycore_imx8mp/spl.c
index f9fa8d1e1281..0bc4c7693b06 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -80,8 +80,8 @@ int board_fit_config_name_match(const char *name)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
static iomux_v3_cfg_t const uart_pads[] = {
- MX8MP_PAD_UART2_RXD__UART2_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX8MP_PAD_UART2_TXD__UART2_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX8MP_PAD_UART1_RXD__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX8MP_PAD_UART1_TXD__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
};
static iomux_v3_cfg_t const wdog_pads[] = {
@@ -107,7 +107,7 @@ void board_init_f(ulong dummy)
arch_cpu_init();
- init_uart_clk(1);
+ init_uart_clk(0);
board_early_init_f();
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 04900498507a..e24f223c21d3 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -39,7 +39,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"image=Image\0" \
- "console=ttymxc1,115200\0" \
+ "console=ttymxc0,115200\0" \
"fdt_addr=0x4800\0" \
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
@@ -87,7 +87,7 @@
#define PHYS_SDRAM_SIZE0x8000
/* UART */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
--
2.25.1
[PATCH 3/9] arm: dts: imx8mp-phyboard-pollux: Sync dts files with kernel
This update includes eqos support and debug uart changes.
Synced with kernel commit
846f752866bd ("arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART")
Signed-off-by: Teresa Remmet
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 58 ++---
arch/arm/dts/imx8mp-phycore-som.dtsi| 2 +-
2 files changed, 52 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
index 0e1a6d953389..984a6b9ded8d 100644
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
@@ -16,7 +16,7 @@
"phytec,imx8mp-phycore-som", "fsl,imx8mp";
chosen {
- stdout-path =
+ stdout-path =
};
reg_usdhc2_vmmc: regulator-usdhc2 {
@@ -33,9 +33,33 @@
};
};
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_eqos>;
+ phy-mode = "rgmii-id";
+ phy-handle = <>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ ti,rx-internal-delay = ;
+ ti,tx-internal-delay = ;
+ ti,fifo-depth = ;
+ ti,clk-output-sel = ;
+ enet-phy-lane-no-swap;
+ };
+ };
+};
+
{
clock-frequency = <40>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <_i2c2>;
pinctrl-1 = <_i2c2_gpio>;
sda-gpios = < 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@@ -71,9 +95,9 @@
};
/* debug console */
- {
+ {
pinctrl-names = "default";
- pinctrl-0 = <_uart2>;
+ pinctrl-0 = <_uart1>;
status = "okay";
};
@@ -90,6 +114,26 @@
};
{
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC
0x3
+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO
0x3
+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0
0x91
+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1
0x91
+ MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2
0x91
+ MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3
0x91
+
MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
+ MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL
0x91
+ MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0
0x1f
+ MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1
0x1f
+ MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2
0x1f
+ MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3
0x1f
+ MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL
0x1f
+
MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f
+ MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20
0x10
+ >;
+ };
+
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x41c3
@@ -110,10 +154,10 @@
>;
};
- pinctrl_uart2: uart2grp {
+ pinctrl_uart1: uart1grp {
fsl,pins = <
- MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX0x49
- MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX0x49
+ MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX0x49
+ MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX0x49
>;
};
diff --git a/arch/arm/dts/imx8mp-phycore-som.dtsi
b/arch/arm/dts/imx8mp-phycore-som.dtsi
index 44a8c2337cee..f3965ec5b31d 100644
--- a/arch/arm/dts/imx8mp-phycore-som.dtsi
+++ b/arch/arm/dts/imx8mp-phycore-som.dtsi
@@ -67,7 +67,7 @@
{
clock-frequency = <40>;
- pinctrl-names = "default";
+ pinctrl-names = "default", "gpio";
pinctrl-0 = <_i2c1>;
pinctrl-1 = <_i2c1_gpio>;
sda-gpios = < 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
--
2.25.1
[PATCH 1/9] arm: dts: imx8mp: Resync imx8mp device tree include
Sync imx8mp include with kernel commit:
d1689cd3c0f4 ("arm64: dts: imx8mp: Use the correct name for child node "snps,
dwc3"")
Signed-off-by: Teresa Remmet
---
arch/arm/dts/imx8mp.dtsi | 146 +--
1 file changed, 141 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
index ecccfbb4f5ad..c2d51a46cb3c 100644
--- a/arch/arm/dts/imx8mp.dtsi
+++ b/arch/arm/dts/imx8mp.dtsi
@@ -18,6 +18,7 @@
aliases {
ethernet0 =
+ ethernet1 =
gpio0 =
gpio1 =
gpio2 =
@@ -218,10 +219,12 @@
};
soc@0 {
- compatible = "simple-bus";
+ compatible = "fsl,imx8mp-soc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x3e00>;
+ nvmem-cells = <_uid>;
+ nvmem-cell-names = "soc_unique_id";
aips1: bus@3000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -266,7 +269,7 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = < 0 56 26>, < 0 144
4>;
+ gpio-ranges = < 0 56 26>, < 26
144 4>;
};
gpio4: gpio@3023 {
@@ -310,6 +313,22 @@
status = "disabled";
};
+ wdog2: watchdog@3029 {
+ compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
+ reg = <0x3029 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_WDOG2_ROOT>;
+ status = "disabled";
+ };
+
+ wdog3: watchdog@302a {
+ compatible = "fsl,imx8mp-wdt", "fsl,imx21-wdt";
+ reg = <0x302a 0x1>;
+ interrupts = ;
+ clocks = < IMX8MP_CLK_WDOG3_ROOT>;
+ status = "disabled";
+ };
+
iomuxc: pinctrl@3033 {
compatible = "fsl,imx8mp-iomuxc";
reg = <0x3033 0x1>;
@@ -328,9 +347,17 @@
#address-cells = <1>;
#size-cells = <1>;
+ imx8mp_uid: unique-id@420 {
+ reg = <0x8 0x8>;
+ };
+
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
+
+ eth_mac1: mac-address@90 {
+ reg = <0x90 6>;
+ };
};
anatop: anatop@3036 {
@@ -762,13 +789,40 @@
assigned-clocks = < IMX8MP_CLK_ENET_AXI>,
< IMX8MP_CLK_ENET_TIMER>,
< IMX8MP_CLK_ENET_REF>,
- < IMX8MP_CLK_ENET_TIMER>;
+ <
IMX8MP_CLK_ENET_PHY_REF>;
assigned-clock-parents = <
IMX8MP_SYS_PLL1_266M>,
<
IMX8MP_SYS_PLL2_100M>,
-<
IMX8MP_SYS_PLL2_125M>;
- assigned-clock-rates = <0>, <0>, <12500>,
<1>;
+<
IMX8MP_SYS_PLL2_125M>,
+<
IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <1>,
<12500>, <0>;
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
+ nvmem-cells = <_mac1>;
+ nvmem-cell-names = "mac-address";
+ fsl,stop-mode = < 0x10 3>;
+ nvmem_macaddr_swap;
+ status = "disabled";
+ };
+
+ eqos: ethernet@30bf {
+ compatible = "nxp,imx8mp-dwmac-eqos",
"snps,dwmac-5.10a";
+ reg = <0x30bf 0x1>;
+ interrupts = ,
+;
+ interrupt-names =
[PATCH 2/9] arm: dts: imx8mp: Add common u-boot dtsi
Factor out the common node settings for dm-spl and dm-pre-reloc
and move them to imx8mp-u-boot.dtsi
Signed-off-by: Teresa Remmet
---
arch/arm/dts/imx8mp-evk-u-boot.dtsi | 39 +
.../imx8mp-phyboard-pollux-rdk-u-boot.dtsi| 39 +
arch/arm/dts/imx8mp-u-boot.dtsi | 42 +++
3 files changed, 46 insertions(+), 74 deletions(-)
create mode 100644 arch/arm/dts/imx8mp-u-boot.dtsi
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 4162f41cffb6..cf10194fe4ab 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright 2019 NXP
*/
+#include "imx8mp-u-boot.dtsi"
+
/ {
binman: binman {
multiple-images;
@@ -21,43 +23,6 @@
};
};
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-_32k {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
_usdhc2_vmmc {
u-boot,off-on-delay-us = <2>;
};
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
index 20e7f63ff91f..6c1528934a98 100644
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
@@ -4,6 +4,8 @@
* Author: Teresa Remmet
*/
+#include "imx8mp-u-boot.dtsi"
+
/ {
wdt-reboot {
compatible = "wdt-reboot";
@@ -12,43 +14,6 @@
};
};
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-_32k {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
_usdhc2_vmmc {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
new file mode 100644
index ..92f586f6dfed
--- /dev/null
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2021 PHYTEC Messtechnik GmbH
+ * Author: Teresa Remmet
+ */
+
+&{/soc@0} {
+ u-boot,dm-pre-reloc;
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+_32k {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+_24m {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
--
2.25.1
[PATCH 0/9] phyCORE-i.MX8MP Update
Hello, this patchstack includes phyCORE-i.MX8MP updates and the switch to binman. But also resynced the imx8mp.dtsi from kernel add introduced a common imx8mp-u-boot.dtsi Teresa Teresa Remmet (9): arm: dts: imx8mp: Resync imx8mp device tree include arm: dts: imx8mp: Add common u-boot dtsi arm: dts: imx8mp-phyboard-pollux: Sync dts files with kernel board: phytec: phycore_imx8mp: Change debug UART board: phytec: phycore_imx8mp: Add fec support board: phytec: phycore_imx8mp: Set VDD_ARM to 0,95V board: phytec: phycore-imx8mp: Enable DVS1 control arm: dts: imx8mp-phyboard-pollux-rdk-u-boot: Add wdog pinctrl entry board: phytec: imx8mp-phycore: Switch to binman arch/arm/dts/imx8mp-evk-u-boot.dtsi | 39 + .../imx8mp-phyboard-pollux-rdk-u-boot.dtsi| 152 +- arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 58 ++- arch/arm/dts/imx8mp-phycore-som.dtsi | 2 +- arch/arm/dts/imx8mp-u-boot.dtsi | 42 + arch/arm/dts/imx8mp.dtsi | 146 - arch/arm/mach-imx/imx8m/Kconfig | 1 + .../phytec/phycore_imx8mp/imximage-8mp-sd.cfg | 10 ++ board/phytec/phycore_imx8mp/phycore-imx8mp.c | 14 ++ board/phytec/phycore_imx8mp/spl.c | 23 ++- configs/phycore-imx8mp_defconfig | 12 +- include/configs/phycore_imx8mp.h | 29 +++- 12 files changed, 430 insertions(+), 98 deletions(-) create mode 100644 arch/arm/dts/imx8mp-u-boot.dtsi create mode 100644 board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg -- 2.25.1
[GIT PULL] xilinx patches for v2021.10
Hi, please pull these patches to your tree (next). There are a lot of DT syncup changes which are also going to Linux kernel. CI loop doesn't show any problem. BTW: Isn't there any option in CI not to run builds against the same sha1? Because I see build for the branch itself and then for the tag which is kind of wasting of resources. Thanks, Michal The following changes since commit 1ce892cb1ce970d8ee6ffcecc22351c84e67fca4: azure: Use msys2 20210604 installer for Windows build (2021-06-22 09:06:03 -0400) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2021.10 for you to fetch changes up to 45576273e9209309238f332c85a6fef955c49b59: xilinx: zynqmp: Add support for 67dr silicon (2021-07-01 09:25:06 +0200) Xilinx changes for v2021.10 clk: - Add driver for Xilinx Clocking Wizard IP fdt: - Also record architecture in /fit-images net: - Fix plat/priv data handling in axi emac - Add support for 10G/25G speeds pca953x: - Add missing dependency on i2c serial: - Fix dependencies for DEBUG uart for pl010/pl011 - Add setconfig option for cadence serial driver watchdog: - Add cadence wdt expire now function zynq: - Update DT bindings to reflect the latest state and descriptions zynqmp: - Update DT bindings to reflect the latest state and descriptions - SPL: Add support for ECC DRAM initialization - Fix R5 core 1 handling logic - Enable firmware driver for mini configurations - Enable secure boot, regulators, wdt - Add support xck devices and 67dr - Add psu init for sm/smk-k26 SOMs - Add handling for MMC seq number via mmc_get_env_dev() - Handle reserved memory locations - Add support for u-boot.itb generation for secure OS - Handle BL32 handoffs for secure OS - Add support for 64bit addresses for u-boot.its generation - Change eeprom handling via nvmem aliases Ashok Reddy Soma (3): arm64: zynqmp: Fix application loading on R5 core1 net: xilinx: axi_emac: Cleanup of of_to_plat() net: xilinx: axi_emac: Add support for 10G/25G AXI ethernet Jorge Ramirez-Ortiz (1): zynqmp: spl: support DRAM ECC initialization Kunihiko Hayashi (1): serial: zynq: Add support for serial parameters Michal Simek (44): gpio: pca953x: Add missing i2c dependency ARM: zynq: Convert at25 binding to new description on zc770-xm013 ARM: zynq: Fix OCM mapping to be aligned with binding on zc702 arm64: zynqmp: Enable EFI secure boot arm64: zynqmp: Add support for SVD devices arm64: zynqmp: Enable gpio driver for zcu1275/zcu1285 ARM: zynq: Rename bus to be align with simple-bus yaml arm64: zynqmp: Add psu_init_gpl for k26 boards arm64: zynqmp: Handle MMC seq number based on boot device arm64: zynqmp: Update psgtr clocks index for boards arm64: zynqmp: Disable CCI by default arm64: zynqmp: Add reset description for sata arm64: zynqmp: Move DP nodes to the end of file (zcu106) arm64: zynqmp: Add label for zynqmp_ipi arm64: zynqmp: Update Copyright years to 2021 zynqmp: Enable regulators zynqmp: Do not place u-boot to reserved memory location zynqmp: Generate u-boot.its also with TEE dynamically zynqmp: Pass bl32 entry to TF-A via xilinx handoff structure zynqmp: Remove u-boot,dm-pre-reloc for uart instances arm64: zynqmp: Remove additional header from zc1232 DT arm64: zynqmp: Add maximum-speed property for dwc3 nodes arm64: zynqmp: Remove addition newline from zc1751 dc1 arm64: zynqmp: Remove unused dp_aclk clock arm64: zynqmp: Sync dp port location on zc1751 dc4 arm64: zynqmp: Sync psgtr location on zcu100/zcu106 xilinx: Convert xlnx,eeprom property to nvmem alias arm64: zynqmp: Remove si5328 and si5382 nodes arm64: zynqmp: Remove can aliases from zc1751 arm64: zynqmp: Remove unused property from SD/USB arm64: zynqmp: Remove information about dma clock on zcu106 arm64: zynqmp: Sync psgtr location on zcu104/zcu111/zc1751-dc1 arm64: zynqmp: Add support for 64bit addresses in its arm64: zynqmp: Remove revA compatibility string from kv260 revB/1 arm64: zynqmp: Use overlay sugar syntax for Kria SOM arm64: zynqmp: Update usb dwc3 DT description arm64: zynqmp: Enable USB3.0 for dc2/dc3 arm64: zynqmp: Remove gpio from aliases list arm64: zynqmp: Add psgtr description to zc1751 dc1 board arm64: zynqmp: Add missing year in Kria dts files spl: fit: Also record architecture in /fit-images serial: Add additional depencies for PL010 and PL011 drivers arm64: zynqmp: Enable WDT command watchdog: cadence: Add expire_now method Piyush Mehta (1): arm64: dts: zynqmp: Add psgtr and phy entry for USB and SATA node Srinivas Neeli (1): arm64: zynqmp:
[RFC] Load U-Boot without LK on DragonBoard 410c (+ DB820c?)
Hi! at the moment the U-Boot ports for both DragonBoard 410c and 820c are designed to be loaded as an Android boot image after Qualcomm's LK bootloader. This is simple to set up but LK is redundant in this case, since everything done by LK can be also done directly by U-Boot. Dropping LK entirely would have at least the following advantages: - Easier installation/board code (no need for Android boot images) - (Slightly) faster boot - Boot directly in 64-bit without a round trip to 32-bit for LK This was not possible so far because of some unsolved problems. For clarity I try to describe them together with some background here, but I want to apologize for the long text. It's all quite complicated. :) 1. "Signing" 64-bit U-Boot == Ramon already tried to eliminate LK for DB410c 3 years ago [1]. One of the open problems back then was to have a proper "signing" tool with 64-bit support. The firmware expects an ELF image with a few Qualcomm-specific ELF headers. Normally this is used for secure boot setups. This is not used on DragonBoards, but the firmware still insists on having a dummy (self-signed) certificate chain in the ELF images. Linaro uses signlk [2] to sign their builds of LK. It looks like Nicolas extended it with ELF64 support after Ramon's mail [3]. However, for some reason signlk literally works only for LK for me. I tried to "sign" U-Boot and some other firmware, but everything except LK is always rejected with the following message on boot: B - 1031113 - Error code 302e at boot_config.c Line 296 I tried to track down the issue in the source code for quite some time but did not manage to find the problem. Perhaps it's some subtle mistake with some of the ELF modifications, I'm not sure. (For some reason, signlk makes subtle changes to all of the existing ELF headers...) After reading about the image format myself I decided to try to make my own "signing" tool, qtestsign: https://github.com/msm8916-mainline/qtestsign It's based on a mixture of the specification [4] and some missing bits taken from signlk, put in a simple and clean Python tool. I still don't know what exactly qtestsign does different, but unlike signlk it can successfully "sign" U-Boot and all other firmware from DragonBoard 410c. [1]: https://lore.kernel.org/u-boot/CA+Kvs9kS=dbjknaixk_3tz+3iwnrasp0gjdz8ekrzaskor6...@mail.gmail.com/ [2]: https://git.linaro.org/landing-teams/working/qualcomm/signlk.git/ [3]: https://git.linaro.org/landing-teams/working/qualcomm/signlk.git/commit/?id=1f61c03322c3728f35b3f0cd4ff04f73522f1e67 [4]: https://www.qualcomm.com/media/documents/files/secure-boot-and-image-authentication-technical-overview-v1-0.pdf My solution --- Now we have all we need to install U-Boot without LK. For DragonBoard 410c the following steps end up in the U-Boot prompt without going through LK: 1. Change dragonboard410c_defconfig as follows: -CONFIG_SYS_TEXT_BASE=0x8008 +CONFIG_SYS_TEXT_BASE=0x8F60 +CONFIG_OF_EMBED=y (I discuss this at the end of the mail) 2. $ make 3. Sign the ELF image: $ qtestsign.py aboot /u-boot [5] 4. Flash "/u-boot-test-signed.mbn" to the "aboot" partition [5]: https://github.com/msm8916-mainline/qtestsign 2. Linux gets stuck when loaded by 64-bit U-Boot without LK === This should work well enough to get the U-Boot prompt on serial. However, once you load Linux you will likely notice a problem: [0.059043] smp: Bringing up secondary CPUs ... [5.120691] CPU1: failed to come online [ 10.246760] CPU2: failed to come online [ 15.372848] CPU3: failed to come online [ 15.406275] CPU: All CPU(s) started at EL1 ... [ 16.185527] genirq: irq_chip msmgpio did not update eff. affinity mask of irq 79 Board freezes forever. :( My investigations have shown this is a bug in the PSCI implementation on DB410c (part of the TrustZone/"tz" firmware). Shortly said, since we have never done the 32-bit -> 64-bit switch in LK, the PSCI implementation seems to believe we are still running in 32-bit mode and starts all further CPUs in 32-bit mode. The other CPU cores crash immediately when coming up and CPU 0 hangs once CPU idle suspends it for the first time. I have described this problem together with a workaround in detail here: https://github.com/msm8916-mainline/qhypstub#boot-flow The idea is to execute the TZ syscall to switch from 32-bit -> 64-bit even though we are already running in 64-bit mode. This will make the PSCI implementation aware that we want all further CPU cores booted in 64-bit mode as well. My solution --- The workaround is applied automatically when using my open-source "hyp" firmware replacement qhypstub: https://github.com/msm8916-mainline/qhypstub As a bonus, both U-Boot and Linux start in EL2, making it possible to use virtualization (e.g. KVM in Linux). $ git clone
[PATCH 2/3] board: freescale: LX2160AQDS: Add MAINTAINER
This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via i...@hexagon.com. Original sender: wasim.k...@oss.nxp.com Original delivery time: 28-Jun-2021 12:02 PM (UTC) --- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2160AQDS board Signed-off-by: Wasim Khan --- board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index fd33c51ac7..fca828148e 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -17,6 +17,7 @@ F: configs/lx2160ardb_tfa_SECURE_BOOT_defconfig LX2160AQDS BOARD M: Meenakshi Aggarwal +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/eth_lx2160aqds.h F: include/configs/lx2160aqds.h -- 2.25.1
[PATCH 1/3] board: freescale: LX2160ARDB: Add MAINTAINER
This message could not be delivered immediately due to an internal mail routing issue. The mail routing error has been resolved in the meantime. We apologize for the delay in delivery and any inconvenience this may have caused. In case of any questions please contact us via i...@hexagon.com. Original sender: wasim.k...@oss.nxp.com Original delivery time: 28-Jun-2021 12:03 PM (UTC) --- This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email. From: Wasim Khan Add "Wasim Khan " as MAINTAINER for LX2160ARDB board Signed-off-by: Wasim Khan --- board/freescale/lx2160a/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index cc69de2970..fd33c51ac7 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -1,6 +1,7 @@ LX2160ARDB BOARD M: Meenakshi Aggarwal M: Priyanka Jain +M: Wasim Khan S: Maintained F: board/freescale/lx2160a/ F: include/configs/lx2160a_common.h -- 2.25.1
Re: [PATCH v3 1/2] efi_loader: fix set_capsule_result()
NAK again with the same reason that I gave on v1/v2.
Please follow your own rules that you imposed on me.
-Takahiro Akashi
On Thu, Jul 01, 2021 at 10:20:48AM +0200, Heinrich Schuchardt wrote:
> The log category must be LOG_CATEGORY LOGC_EFI.
>
> efi_set_variable() should be called with EFI_CALL(). Use
> efi_set_variable_int() instead.
>
> A log text "Updating ..." if SetVariable() fails does not make sense for a
> variable that is not required to be preexisting.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v3:
> no change
> ---
> lib/efi_loader/efi_capsule.c | 39 +++-
> 1 file changed, 21 insertions(+), 18 deletions(-)
>
> diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
> index 2c37a0d97b..f87ef2a514 100644
> --- a/lib/efi_loader/efi_capsule.c
> +++ b/lib/efi_loader/efi_capsule.c
> @@ -6,6 +6,8 @@
> * Author: AKASHI Takahiro
> */
>
> +#define LOG_CATEGORY LOGC_EFI
> +
> #include
> #include
> #include
> @@ -95,13 +97,25 @@ void set_capsule_result(int index, struct
> efi_capsule_header *capsule,
> else
> memset(_processed, 0, sizeof(time));
> result.capsule_status = return_status;
> - ret = efi_set_variable(variable_name16, _guid_capsule_report,
> -EFI_VARIABLE_NON_VOLATILE |
> -EFI_VARIABLE_BOOTSERVICE_ACCESS |
> -EFI_VARIABLE_RUNTIME_ACCESS,
> -sizeof(result), );
> - if (ret)
> - log_err("EFI: creating %ls failed\n", variable_name16);
> + ret = efi_set_variable_int(variable_name16, _guid_capsule_report,
> +EFI_VARIABLE_NON_VOLATILE |
> +EFI_VARIABLE_BOOTSERVICE_ACCESS |
> +EFI_VARIABLE_RUNTIME_ACCESS,
> +sizeof(result), , false);
> + if (ret != EFI_SUCCESS) {
> + log_err("Setting %ls failed\n", variable_name16);
> + return;
> + }
> +
> + /* Variable CapsuleLast must not include terminating 0x */
> + ret = efi_set_variable_int(L"CapsuleLast", _guid_capsule_report,
> +EFI_VARIABLE_READ_ONLY |
> +EFI_VARIABLE_NON_VOLATILE |
> +EFI_VARIABLE_BOOTSERVICE_ACCESS |
> +EFI_VARIABLE_RUNTIME_ACCESS,
> +22, variable_name16, false);
> + if (ret != EFI_SUCCESS)
> + log_err("Setting %ls failed\n", L"CapsuleLast");
> }
>
> #ifdef CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT
> @@ -988,7 +1002,6 @@ efi_status_t efi_launch_capsules(void)
> struct efi_capsule_header *capsule = NULL;
> u16 **files;
> unsigned int nfiles, index, i;
> - u16 variable_name16[12];
> efi_status_t ret;
>
> if (!check_run_capsules())
> @@ -1045,16 +1058,6 @@ efi_status_t efi_launch_capsules(void)
> free(files[i]);
> free(files);
>
> - /* CapsuleLast */
> - efi_create_indexed_name(variable_name16, sizeof(variable_name16),
> - "Capsule", index - 1);
> - efi_set_variable_int(L"CapsuleLast", _guid_capsule_report,
> - EFI_VARIABLE_READ_ONLY |
> - EFI_VARIABLE_NON_VOLATILE |
> - EFI_VARIABLE_BOOTSERVICE_ACCESS |
> - EFI_VARIABLE_RUNTIME_ACCESS,
> - 22, variable_name16, false);
> -
> return ret;
> }
> #endif /* CONFIG_EFI_CAPSULE_ON_DISK */
> --
> 2.30.2
>
Re: [PATCH 3/4] NSA310S : Use Ethernet PHY name from device tree
Hi Tony,
On 01.07.21 10:19, Stefan Roese wrote:
On 01.07.21 06:26, Tony Dinh wrote:
In DM Ethernet, the old "egiga0" name is no longer valid, so replace it
with Ethernet PHY name from device tree.
Signed-off-by: Tony Dinh
---
board/zyxel/nsa310s/nsa310s.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/board/zyxel/nsa310s/nsa310s.c
b/board/zyxel/nsa310s/nsa310s.c
index cd4a7723b1..29aded1910 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
+ * Copyright (C) 2021 Tony Dinh
AFAIU, just changing a few lines, as this patch does, does not justify
to add a copyright notice to this file.
I just noticed that you already are present in the copyright notice
below. I suggest to change this in a way, so that your name only
occurs once, like:
* Copyright (C) 2015, 2021 Tony Dinh
Does this make sense?
Thanks,
Stefan
* Copyright (C) 2015
* Gerald Kerma
* Tony Dinh
@@ -81,22 +82,18 @@ int board_init(void)
return 0;
}
+#define PHY_ADR 1
You should be able to read this PHY address from the device-tree now.
No need to define this here again.
Thanks,
Stefan
+
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
u16 reg;
- u16 phyaddr;
- char *name = "egiga0";
+ u16 phyaddr = PHY_ADR;
+ char *name = "ethernet-controller@72000";
if (miiphy_set_current_dev(name))
return;
- /* read PHY dev address */
- if (miiphy_read(name, 0xee, 0xee, (u16 *) )) {
- printf("could not read PHY dev address\n");
- return;
- }
-
/* set RGMII delay */
miiphy_write(name, phyaddr, MV88E1318_PGADR_REG,
MV88E1318_MAC_CTRL_PG);
miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, );
@@ -131,5 +128,7 @@ void reset_phy(void)
/* downshift */
miiphy_write(name, phyaddr, 0x10, 0x3860);
miiphy_write(name, phyaddr, 0x0, 0x9140);
+
+ printf("MV88E1318 PHY initialized on %s\n", name);
}
#endif /* CONFIG_RESET_PHY_R */
Viele Grüße,
Stefan
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH v3 2/2] efi_loader: clear OsIndications
After each reboot we must clear flag
EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED in variable
OsIndications.
Signed-off-by: Heinrich Schuchardt
---
v3:
always reset EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED
---
lib/efi_loader/efi_setup.c | 40 +-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
index 3c5cf9a435..cf6e768812 100644
--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
@@ -5,9 +5,12 @@
* Copyright (c) 2016-2018 Alexander Graf et al.
*/
+#define LOG_CATEGORY LOGC_EFI
+
#include
#include
#include
+#include
#define OBJ_LIST_NOT_INITIALIZED 1
@@ -171,6 +174,37 @@ static efi_status_t efi_init_os_indications(void)
_indications_supported, false);
}
+
+/**
+ * efi_clear_os_indications() - clear OsIndications
+ *
+ * Clear EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED
+ */
+static efi_status_t efi_clear_os_indications(void)
+{
+ efi_uintn_t size;
+ u64 os_indications;
+ efi_status_t ret;
+
+ size = sizeof(os_indications);
+ ret = efi_get_variable_int(L"OsIndications", _global_variable_guid,
+ NULL, , _indications, NULL);
+ if (ret != EFI_SUCCESS)
+ os_indications = 0;
+ else
+ os_indications &=
+ ~EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED;
+ ret = efi_set_variable_int(L"OsIndications", _global_variable_guid,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS,
+ sizeof(os_indications), _indications,
+ false);
+ if (ret != EFI_SUCCESS)
+ log_err("Setting %ls failed\n", L"OsIndications");
+ return ret;
+}
+
/**
* efi_init_obj_list() - Initialize and populate EFI object list
*
@@ -178,7 +212,7 @@ static efi_status_t efi_init_os_indications(void)
*/
efi_status_t efi_init_obj_list(void)
{
- efi_status_t ret = EFI_SUCCESS;
+ efi_status_t r, ret = EFI_SUCCESS;
/* Initialize once only */
if (efi_obj_list_initialized != OBJ_LIST_NOT_INITIALIZED)
@@ -291,7 +325,11 @@ efi_status_t efi_init_obj_list(void)
if (IS_ENABLED(CONFIG_EFI_CAPSULE_ON_DISK) &&
!IS_ENABLED(CONFIG_EFI_CAPSULE_ON_DISK_EARLY))
ret = efi_launch_capsules();
+
out:
+ r = efi_clear_os_indications();
+ if (ret == EFI_SUCCESS)
+ ret = r;
efi_obj_list_initialized = ret;
return ret;
}
--
2.30.2
[PATCH v3 1/2] efi_loader: fix set_capsule_result()
The log category must be LOG_CATEGORY LOGC_EFI.
efi_set_variable() should be called with EFI_CALL(). Use
efi_set_variable_int() instead.
A log text "Updating ..." if SetVariable() fails does not make sense for a
variable that is not required to be preexisting.
Signed-off-by: Heinrich Schuchardt
---
v3:
no change
---
lib/efi_loader/efi_capsule.c | 39 +++-
1 file changed, 21 insertions(+), 18 deletions(-)
diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index 2c37a0d97b..f87ef2a514 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -6,6 +6,8 @@
* Author: AKASHI Takahiro
*/
+#define LOG_CATEGORY LOGC_EFI
+
#include
#include
#include
@@ -95,13 +97,25 @@ void set_capsule_result(int index, struct
efi_capsule_header *capsule,
else
memset(_processed, 0, sizeof(time));
result.capsule_status = return_status;
- ret = efi_set_variable(variable_name16, _guid_capsule_report,
- EFI_VARIABLE_NON_VOLATILE |
- EFI_VARIABLE_BOOTSERVICE_ACCESS |
- EFI_VARIABLE_RUNTIME_ACCESS,
- sizeof(result), );
- if (ret)
- log_err("EFI: creating %ls failed\n", variable_name16);
+ ret = efi_set_variable_int(variable_name16, _guid_capsule_report,
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS,
+ sizeof(result), , false);
+ if (ret != EFI_SUCCESS) {
+ log_err("Setting %ls failed\n", variable_name16);
+ return;
+ }
+
+ /* Variable CapsuleLast must not include terminating 0x */
+ ret = efi_set_variable_int(L"CapsuleLast", _guid_capsule_report,
+ EFI_VARIABLE_READ_ONLY |
+ EFI_VARIABLE_NON_VOLATILE |
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS,
+ 22, variable_name16, false);
+ if (ret != EFI_SUCCESS)
+ log_err("Setting %ls failed\n", L"CapsuleLast");
}
#ifdef CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT
@@ -988,7 +1002,6 @@ efi_status_t efi_launch_capsules(void)
struct efi_capsule_header *capsule = NULL;
u16 **files;
unsigned int nfiles, index, i;
- u16 variable_name16[12];
efi_status_t ret;
if (!check_run_capsules())
@@ -1045,16 +1058,6 @@ efi_status_t efi_launch_capsules(void)
free(files[i]);
free(files);
- /* CapsuleLast */
- efi_create_indexed_name(variable_name16, sizeof(variable_name16),
- "Capsule", index - 1);
- efi_set_variable_int(L"CapsuleLast", _guid_capsule_report,
-EFI_VARIABLE_READ_ONLY |
-EFI_VARIABLE_NON_VOLATILE |
-EFI_VARIABLE_BOOTSERVICE_ACCESS |
-EFI_VARIABLE_RUNTIME_ACCESS,
-22, variable_name16, false);
-
return ret;
}
#endif /* CONFIG_EFI_CAPSULE_ON_DISK */
--
2.30.2
[PATCH v3 0/2] efi_loader: indicating capsule update results
When creating the Capsule variable we should immediately update CapsuleLast. After each reboot we must clear flag EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED in variable OsIndications. v3: clear EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED even after capsule update failure Heinrich Schuchardt (2): efi_loader: fix set_capsule_result() efi_loader: clear OsIndications lib/efi_loader/efi_capsule.c | 39 +++ lib/efi_loader/efi_setup.c | 40 +++- 2 files changed, 60 insertions(+), 19 deletions(-) -- 2.30.2
Re: [PATCH 4/4] NSA310S : Add DM SATA configs
On 01.07.21 06:26, Tony Dinh wrote: Enable DM SATA, removed IDE driver, and add SATA MV driver. Signed-off-by: Tony Dinh --- include/configs/nsa310s.h | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index e38c65a485..94f293de90 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * Copyright (C) 2021 Tony Dinh * Copyright (C) 2015 * Gerald Kerma * Tony Dinh Please change this copyright line instead of adding yourself a 2nd time. Other than this: Reviewed-by: Stefan Roese Thanks, Stefan @@ -46,10 +47,10 @@ #endif /* CONFIG_CMD_NET */ /* SATA driver configuration */ -#ifdef CONFIG_IDE -#define __io -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET -#endif /* CONFIG_IDE */ +#ifdef CONFIG_SATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_LBA48 +#endif /* CONFIG_SATA */ /* RTC driver configuration */ #ifdef CONFIG_CMD_DATE Viele Grüße, Stefan -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 3/4] NSA310S : Use Ethernet PHY name from device tree
On 01.07.21 06:26, Tony Dinh wrote:
In DM Ethernet, the old "egiga0" name is no longer valid, so replace it
with Ethernet PHY name from device tree.
Signed-off-by: Tony Dinh
---
board/zyxel/nsa310s/nsa310s.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c
index cd4a7723b1..29aded1910 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
+ * Copyright (C) 2021 Tony Dinh
AFAIU, just changing a few lines, as this patch does, does not justify
to add a copyright notice to this file.
* Copyright (C) 2015
* Gerald Kerma
* Tony Dinh
@@ -81,22 +82,18 @@ int board_init(void)
return 0;
}
+#define PHY_ADR 1
You should be able to read this PHY address from the device-tree now.
No need to define this here again.
Thanks,
Stefan
+
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
u16 reg;
- u16 phyaddr;
- char *name = "egiga0";
+ u16 phyaddr = PHY_ADR;
+ char *name = "ethernet-controller@72000";
if (miiphy_set_current_dev(name))
return;
- /* read PHY dev address */
- if (miiphy_read(name, 0xee, 0xee, (u16 *) )) {
- printf("could not read PHY dev address\n");
- return;
- }
-
/* set RGMII delay */
miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, );
@@ -131,5 +128,7 @@ void reset_phy(void)
/* downshift */
miiphy_write(name, phyaddr, 0x10, 0x3860);
miiphy_write(name, phyaddr, 0x0, 0x9140);
+
+ printf("MV88E1318 PHY initialized on %s\n", name);
}
#endif /* CONFIG_RESET_PHY_R */
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 2/4] NSA310S : Add DM USB, DM Ethernet, and DM SATA configs
On 01.07.21 06:26, Tony Dinh wrote: Convert to Driver Model. - Add DM USB, DM Ethernet, and DM SATA configs to nsa310s_defconfig - Add CONFIG_DEFAULT_DEVICE_TREE to nsa310s_defconfig - Move CONFIG_ENV_SECT_SIZE from board file to nsa310s_defconfig - Add CONFIG_IDENT_STRING, and CONFIG_NET_RANDOM_ETHADDR to nsa310s_defconfig Signed-off-by: Tony Dinh Reviewed-by: Stefan Roese Thanks, Stefan --- configs/nsa310s_defconfig | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index e4cf1c470e..fac0322e2b 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -7,14 +7,16 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_NSA310S=y CONFIG_ENV_SIZE=0x2 CONFIG_ENV_OFFSET=0xE +CONFIG_ENV_SECT_SIZE=0x2 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nsa310s => " +CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server" CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set -CONFIG_CMD_IDE=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -44,3 +46,11 @@ CONFIG_USB_STORAGE=y CONFIG_LZMA=y CONFIG_BZIP2=y CONFIG_OF_LIBFDT=y +CONFIG_DM=y +CONFIG_BLK=y +CONFIG_OF_CONTROL=y +CONFIG_DM_USB=y +CONFIG_DM_ETH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CMD_SATA=y +CONFIG_SATA_MV=y Viele Grüße, Stefan -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 1/4] NSA310S : Add device tree DTS for Zyxel NSA310S board
On 01.07.21 06:26, Tony Dinh wrote:
Add device tree kirkwood-nsa310s.dts for Zyxel NSA310S board to
convert to Driver Model.
Signed-off-by: Tony Dinh
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/kirkwood-nsa310s.dts | 318 ++
2 files changed, 319 insertions(+)
create mode 100644 arch/arm/dts/kirkwood-nsa310s.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 096068261d..0ff77c8b3d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
kirkwood-ns2lite.dtb \
kirkwood-ns2max.dtb \
kirkwood-ns2mini.dtb \
+ kirkwood-nsa310s.dtb \
kirkwood-openrd-base.dtb \
kirkwood-openrd-client.dtb \
kirkwood-openrd-ultimate.dtb \
diff --git a/arch/arm/dts/kirkwood-nsa310s.dts
b/arch/arm/dts/kirkwood-nsa310s.dts
new file mode 100644
index 00..e1c9c9080c
--- /dev/null
+++ b/arch/arm/dts/kirkwood-nsa310s.dts
@@ -0,0 +1,318 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device tree file for the Zyxel NSA 310S NAS box.
+ *
+ * Copyright (c) 2015-2021, Tony Dinh
+ *
+ * Based on
+ * Copyright (c) 2014, Adam Baker
+ * Based upon the board setup file created by Peter Schildmann
+ */
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6281.dtsi"
+
+/ {
+ model = "Zyxel NSA310S";
+ compatible = "zyxel,nsa320s", "marvell,kirkwood-88f6702",
"marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x 0x1000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ stdout-path =
+ };
+
+ ocp@f100 {
+ pinctrl: pin-controller@1 {
+ pinctrl-names = "default";
+
+ pmx_sata0: pmx-sata0 {
+ marvell,pins ;
+ marvell,function = "sata0";
+ };
+
+ pmx_sata1: pmx-sata1 {
+ marvell,pins ;
+ marvell,function = "sata1";
+ };
+
+ pmx_usb_power: pmx-usb-power {
+ marvell,pins = "mpp21";
+ marvell,function = "gpio";
+ };
+
+ pmx_pwr_off: pmx-pwr-off {
+ marvell,pins = "mpp27";
+ marvell,function = "gpio";
+ };
+
+ pmx_btn_reset: pmx-btn-reset {
+ marvell,pins = "mpp24";
+ marvell,function = "gpio";
+ };
+
+ pmx_btn_copy: pmx-btn-copy {
+ marvell,pins = "mpp25";
+ marvell,function = "gpio";
+ };
+
+ pmx_btn_power: pmx-btn-power {
+ marvell,pins = "mpp26";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_hdd2_green: pmx-led-hdd2-green {
+ marvell,pins = "mpp34";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_hdd2_red: pmx-led-hdd2-red {
+ marvell,pins = "mpp12";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_usb_green: pmx-led-usb-green {
+ marvell,pins = "mpp15";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_copy_green: pmx-led-copy-green {
+ marvell,pins = "mpp22";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_copy_red: pmx-led-copy-red {
+ marvell,pins = "mpp23";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_sys_green: pmx-led-sys-green {
+ marvell,pins = "mpp28";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_sys_orange: pmx-led-sys-orange {
+ marvell,pins = "mpp29";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_hdd1_green: pmx-led-hdd1-green {
+ marvell,pins = "mpp16";
+ marvell,function = "gpio";
+ };
+
+ pmx_led_hdd1_red: pmx-led-hdd1-red {
+ marvell,pins =
Re: [PATCH] configs: stm32mp1: remove splashimage and add fdtoverlay_addr_r
Hi Patrick
On 6/28/21 2:42 PM, Patrick Delaunay wrote:
> Add the variable used by PXE command for fdtoverlays support
> since the commit 69076dff2284 ("cmd: pxe: add support for FDT overlays").
>
> Reused the unused "splashimage" address as CONFIG_SPLASH_SOURCE and
> CONFIG_VIDEO_LOGO are not activated and U-Boot display the "BACKGROUND"
> image found in extlinux.conf to manage splashscreen on stm32mp1 boards.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> include/configs/stm32mp1.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
> index 440efa1a55..2e7f49e7bb 100644
> --- a/include/configs/stm32mp1.h
> +++ b/include/configs/stm32mp1.h
> @@ -155,7 +155,7 @@
>
> /*
> * memory layout for 32M uncompressed/compressed kernel,
> - * 1M fdt, 1M script, 1M pxe and 1M for splashimage
> + * 1M fdt, 1M script, 1M pxe and 1M for overlay
> * and the ramdisk at the end.
> */
> #define CONFIG_EXTRA_ENV_SETTINGS \
> @@ -163,7 +163,7 @@
> "fdt_addr_r=0xc400\0" \
> "scriptaddr=0xc410\0" \
> "pxefile_addr_r=0xc420\0" \
> - "splashimage=0xc430\0" \
> + "fdtoverlay_addr_r=0xc430\0" \
> "ramdisk_addr_r=0xc440\0" \
> "altbootcmd=run bootcmd\0" \
> "env_check=if env info -p -d -q; then env save; fi\0" \
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 7/7] stm32mp: cmd_stm32key: add subcommand close
Hi Patrick
On 6/28/21 2:56 PM, Patrick Delaunay wrote:
> The expected sequence to close the device
>
> 1/ Load key in DDR with any supported load command
> 2/ Update OTP with key: STM32MP> stm32key read
>
> At this point the device is able to perform image authentication but
> non-authenticated images can still be used and executed.
> So it is the last moment to test boot with signed binary and
> check that the ROM code accepts them.
>
> 3/ Close the device: only signed binary will be accepted !!
>STM32MP> stm32key close
>
> Warning: Programming these OTP is an irreversible operation!
> This may brick your system if the HASH of key is invalid
>
> This command should be deactivated by default in real product.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cmd_stm32key.c | 54 ++--
> 1 file changed, 52 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
> b/arch/arm/mach-stm32mp/cmd_stm32key.c
> index 8c8d476b65..50840b0f38 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
> +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
> @@ -210,10 +210,60 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int
> flag, int argc, char *con
> return CMD_RET_SUCCESS;
> }
>
> +static int do_stm32key_close(struct cmd_tbl *cmdtp, int flag, int argc, char
> *const argv[])
> +{
> + bool yes, lock, closed;
> + struct udevice *dev;
> + u32 val;
> + int ret;
> +
> + yes = false;
> + if (argc == 2) {
> + if (strcmp(argv[1], "-y"))
> + return CMD_RET_USAGE;
> + yes = true;
> + }
> +
> + ret = read_hash_otp(!yes, , );
> + if (ret) {
> + if (ret == -ENOENT)
> + printf("Error: OTP not programmed!\n");
> + return CMD_RET_FAILURE;
> + }
> +
> + if (closed) {
> + printf("Error: already closed!\n");
> + return CMD_RET_FAILURE;
> + }
> +
> + if (!lock)
> + printf("Warning: OTP not locked!\n");
> +
> + if (!yes && !confirm_prog())
> + return CMD_RET_FAILURE;
> +
> + ret = get_misc_dev();
> + if (ret)
> + return CMD_RET_FAILURE;
> +
> + val = STM32_OTP_CLOSE_MASK;
> + ret = misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), , 4);
> + if (ret != 4) {
> + printf("Error: can't update OTP\n");
> + return CMD_RET_FAILURE;
> + }
> +
> + printf("Device is closed !\n");
> +
> + return CMD_RET_SUCCESS;
> +}
> +
> static char stm32key_help_text[] =
> "read []: Read the hash stored at addr in memory or in OTP\n"
> - "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n";
> + "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n"
> + "stm32key close [-y] : Close the device, the hash stored in OTP\n";
>
> U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse ST Hash key", stm32key_help_text,
> U_BOOT_SUBCMD_MKENT(read, 2, 0, do_stm32key_read),
> - U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse));
> + U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse),
> + U_BOOT_SUBCMD_MKENT(close, 2, 0, do_stm32key_close));
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 6/7] stm32mp: cmd_stm32key: add read OTP subcommand
Hi Patrick
On 6/28/21 2:56 PM, Patrick Delaunay wrote:
> Allow to read the OTP value and lock status with the command
> $> stm32key read.
>
> This patch also protects the stm32key fuse command.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cmd_stm32key.c | 93 ++--
> 1 file changed, 87 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
> b/arch/arm/mach-stm32mp/cmd_stm32key.c
> index 886c52794f..8c8d476b65 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
> +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
> @@ -11,8 +11,13 @@
> #include
> #include
>
> -#define STM32_OTP_HASH_KEY_START 24
> -#define STM32_OTP_HASH_KEY_SIZE 8
> +/* Closed device : bit 6 of OPT0*/
> +#define STM32_OTP_CLOSE_ID 0
> +#define STM32_OTP_CLOSE_MASK BIT(6)
> +
> +/* HASH of key: 8 OTPs, starting with OTP24) */
> +#define STM32_OTP_HASH_KEY_START 24
> +#define STM32_OTP_HASH_KEY_SIZE 8
>
> static int get_misc_dev(struct udevice **dev)
> {
> @@ -29,6 +34,7 @@ static void read_hash_value(u32 addr)
> {
> int i;
>
> + printf("Read KEY at 0x%x\n", addr);
> for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) {
> printf("OTP value %i: %x\n", STM32_OTP_HASH_KEY_START + i,
> __be32_to_cpu(*(u32 *)addr));
> @@ -36,6 +42,69 @@ static void read_hash_value(u32 addr)
> }
> }
>
> +static int read_hash_otp(bool print, bool *locked, bool *closed)
> +{
> + struct udevice *dev;
> + int i, word, ret;
> + int nb_invalid = 0, nb_zero = 0, nb_lock = 0;
> + u32 val, lock;
> + bool status;
> +
> + ret = get_misc_dev();
> + if (ret)
> + return ret;
> +
> + for (i = 0, word = STM32_OTP_HASH_KEY_START; i <
> STM32_OTP_HASH_KEY_SIZE; i++, word++) {
> + ret = misc_read(dev, STM32_BSEC_OTP(word), , 4);
> + if (ret != 4)
> + val = ~0x0;
> + ret = misc_read(dev, STM32_BSEC_LOCK(word), , 4);
> + if (ret != 4)
> + lock = -1;
> + if (print)
> + printf("OTP HASH %i: %x lock : %d\n", word, val, lock);
> + if (val == ~0x0)
> + nb_invalid++;
> + else if (val == 0x0)
> + nb_zero++;
> + if (lock == 1)
> + nb_lock++;
> + }
> +
> + word = STM32_OTP_CLOSE_ID;
> + ret = misc_read(dev, STM32_BSEC_OTP(word), , 4);
> + if (ret != 4)
> + val = 0x0;
> + ret = misc_read(dev, STM32_BSEC_LOCK(word), , 4);
> + if (ret != 4)
> + lock = -1;
> +
> + status = (val & STM32_OTP_CLOSE_MASK) == STM32_OTP_CLOSE_MASK;
> + if (closed)
> + *closed = status;
> + if (print)
> + printf("OTP %d: closed status: %d lock : %d\n", word, status,
> lock);
> +
> + status = (nb_lock == STM32_OTP_HASH_KEY_SIZE);
> + if (locked)
> + *locked = status;
> + if (!status && print)
> + printf("Hash of key is not locked!\n");
> +
> + if (nb_invalid == STM32_OTP_HASH_KEY_SIZE) {
> + if (print)
> + printf("Hash of key is invalid!\n");
> + return -EINVAL;
> + }
> + if (nb_zero == STM32_OTP_HASH_KEY_SIZE) {
> + if (print)
> + printf("Hash of key is free!\n");
> + return -ENOENT;
> + }
> +
> + return 0;
> +}
> +
> static int fuse_hash_value(u32 addr, bool print)
> {
> struct udevice *dev;
> @@ -88,8 +157,10 @@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int
> flag, int argc, char *con
> {
> u32 addr;
>
> - if (argc == 1)
> - return CMD_RET_USAGE;
> + if (argc == 1) {
> + read_hash_otp(true, NULL, NULL);
> + return CMD_RET_SUCCESS;
> + }
>
> addr = simple_strtoul(argv[1], NULL, 16);
> if (!addr)
> @@ -103,7 +174,7 @@ static int do_stm32key_read(struct cmd_tbl *cmdtp, int
> flag, int argc, char *con
> static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char
> *const argv[])
> {
> u32 addr;
> - bool yes = false;
> + bool yes = false, lock, closed;
>
> if (argc < 2)
> return CMD_RET_USAGE;
> @@ -118,6 +189,16 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int
> flag, int argc, char *con
> if (!addr)
> return CMD_RET_USAGE;
>
> + if (read_hash_otp(!yes, , ) != -ENOENT) {
> + printf("Error: can't fuse again the OTP\n");
> + return CMD_RET_FAILURE;
> + }
> +
> + if (lock || closed) {
> + printf("Error: invalid OTP configuration (lock=%d,
> closed=%d)\n", lock, closed);
> + return CMD_RET_FAILURE;
> + }
> +
> if (!yes && !confirm_prog())
> return CMD_RET_FAILURE;
>
> @@ -130,7 +211,7 @@ static int
Re: [PATCH 5/7] stm32mp: cmd_stm32key: add get_misc_dev function
Hi Patrick
On 6/28/21 2:56 PM, Patrick Delaunay wrote:
> Add a helper function to access to BSEC misc driver.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cmd_stm32key.c | 19 +--
> 1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
> b/arch/arm/mach-stm32mp/cmd_stm32key.c
> index c4cb6342fa..886c52794f 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
> +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
> @@ -14,6 +14,17 @@
> #define STM32_OTP_HASH_KEY_START 24
> #define STM32_OTP_HASH_KEY_SIZE 8
>
> +static int get_misc_dev(struct udevice **dev)
> +{
> + int ret;
> +
> + ret = uclass_get_device_by_driver(UCLASS_MISC,
> DM_DRIVER_GET(stm32mp_bsec), dev);
> + if (ret)
> + log_err("Can't find stm32mp_bsec driver\n");
> +
> + return ret;
> +}
> +
> static void read_hash_value(u32 addr)
> {
> int i;
> @@ -31,13 +42,9 @@ static int fuse_hash_value(u32 addr, bool print)
> u32 word, val;
> int i, ret;
>
> - ret = uclass_get_device_by_driver(UCLASS_MISC,
> - DM_DRIVER_GET(stm32mp_bsec),
> - );
> - if (ret) {
> - log_err("Can't find stm32mp_bsec driver\n");
> + ret = get_misc_dev();
> + if (ret)
> return ret;
> - }
>
> for (i = 0, word = STM32_OTP_HASH_KEY_START;
>i < STM32_OTP_HASH_KEY_SIZE;
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 4/7] stm32mp: cmd_stm32key: lock of PKH OTP after fuse
Hi Patrick
On 6/28/21 2:56 PM, Patrick Delaunay wrote:
> Lock the OTP value of key's hash after the command
> $> stm32key fuse
>
> This operation forbids a second update of these OTP as they are
> ECC protected in BSEC: any update of these OTP with a different value
> causes a BSEC disturb error and the closed chip will be bricked.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cmd_stm32key.c | 14 ++
> 1 file changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
> b/arch/arm/mach-stm32mp/cmd_stm32key.c
> index 2529139ebc..c4cb6342fa 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
> +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
> @@ -39,8 +39,9 @@ static int fuse_hash_value(u32 addr, bool print)
> return ret;
> }
>
> - for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) {
> - word = STM32_OTP_HASH_KEY_START + i;
> + for (i = 0, word = STM32_OTP_HASH_KEY_START;
> + i < STM32_OTP_HASH_KEY_SIZE;
> + i++, word++, addr += 4) {
> val = __be32_to_cpu(*(u32 *)addr);
> if (print)
> printf("Fuse OTP %i : %x\n", word, val);
> @@ -50,8 +51,13 @@ static int fuse_hash_value(u32 addr, bool print)
> log_err("Fuse OTP %i failed\n", word);
> return ret;
> }
> -
> - addr += 4;
> + /* on success, lock the OTP for HASH key */
> + val = 1;
> + ret = misc_write(dev, STM32_BSEC_LOCK(word), , 4);
> + if (ret != 4) {
> + log_err("Lock OTP %i failed\n", word);
> + return ret;
> + }
> }
>
> return 0;
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 3/7] stm32mp: cmd_stm32key: handle error in fuse_hash_value
Hi Patrick
On 6/28/21 2:55 PM, Patrick Delaunay wrote:
> Handle errors in fuse_hash_value function.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cmd_stm32key.c | 24 +++-
> 1 file changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
> b/arch/arm/mach-stm32mp/cmd_stm32key.c
> index d2045a5983..2529139ebc 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
> +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
> @@ -25,7 +25,7 @@ static void read_hash_value(u32 addr)
> }
> }
>
> -static void fuse_hash_value(u32 addr, bool print)
> +static int fuse_hash_value(u32 addr, bool print)
> {
> struct udevice *dev;
> u32 word, val;
> @@ -36,21 +36,25 @@ static void fuse_hash_value(u32 addr, bool print)
> );
> if (ret) {
> log_err("Can't find stm32mp_bsec driver\n");
> - return;
> + return ret;
> }
>
> for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) {
> - if (print)
> - printf("Fuse OTP %i : %x\n",
> -STM32_OTP_HASH_KEY_START + i,
> -__be32_to_cpu(*(u32 *)addr));
> -
> word = STM32_OTP_HASH_KEY_START + i;
> val = __be32_to_cpu(*(u32 *)addr);
> - misc_write(dev, STM32_BSEC_OTP(word), , 4);
> + if (print)
> + printf("Fuse OTP %i : %x\n", word, val);
> +
> + ret = misc_write(dev, STM32_BSEC_OTP(word), , 4);
> + if (ret != 4) {
> + log_err("Fuse OTP %i failed\n", word);
> + return ret;
> + }
>
> addr += 4;
> }
> +
> + return 0;
> }
>
> static int confirm_prog(void)
> @@ -104,7 +108,9 @@ static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int
> flag, int argc, char *con
> if (!yes && !confirm_prog())
> return CMD_RET_FAILURE;
>
> - fuse_hash_value(addr, !yes);
> + if (fuse_hash_value(addr, !yes))
> + return CMD_RET_FAILURE;
> +
> printf("Hash key updated !\n");
>
> return CMD_RET_SUCCESS;
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 2/7] stm32mp: cmd_stm32key: use sub command
Hi Patrick
On 6/28/21 2:55 PM, Patrick Delaunay wrote:
> Simplify parsing the command argument by using
> the macro U_BOOT_CMD_WITH_SUBCMDS.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cmd_stm32key.c | 55 ++--
> 1 file changed, 36 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c
> b/arch/arm/mach-stm32mp/cmd_stm32key.c
> index 42fdc11238..d2045a5983 100644
> --- a/arch/arm/mach-stm32mp/cmd_stm32key.c
> +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
> @@ -67,36 +67,53 @@ static int confirm_prog(void)
> return 0;
> }
>
> -static int do_stm32key(struct cmd_tbl *cmdtp, int flag, int argc,
> -char *const argv[])
> +static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char
> *const argv[])
> {
> u32 addr;
> - const char *op = argc >= 2 ? argv[1] : NULL;
> - int confirmed = argc > 3 && !strcmp(argv[2], "-y");
>
> - argc -= 2 + confirmed;
> - argv += 2 + confirmed;
> -
> - if (argc < 1)
> + if (argc == 1)
> return CMD_RET_USAGE;
>
> - addr = simple_strtoul(argv[0], NULL, 16);
> + addr = simple_strtoul(argv[1], NULL, 16);
> if (!addr)
> return CMD_RET_USAGE;
>
> - if (!strcmp(op, "read"))
> - read_hash_value(addr);
> + read_hash_value(addr);
> +
> + return CMD_RET_SUCCESS;
> +}
> +
> +static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char
> *const argv[])
> +{
> + u32 addr;
> + bool yes = false;
>
> - if (!strcmp(op, "fuse")) {
> - if (!confirmed && !confirm_prog())
> - return CMD_RET_FAILURE;
> - fuse_hash_value(addr, !confirmed);
> + if (argc < 2)
> + return CMD_RET_USAGE;
> +
> + if (argc == 3) {
> + if (strcmp(argv[1], "-y"))
> + return CMD_RET_USAGE;
> + yes = true;
> }
>
> + addr = simple_strtoul(argv[argc - 1], NULL, 16);
> + if (!addr)
> + return CMD_RET_USAGE;
> +
> + if (!yes && !confirm_prog())
> + return CMD_RET_FAILURE;
> +
> + fuse_hash_value(addr, !yes);
> + printf("Hash key updated !\n");
> +
> return CMD_RET_SUCCESS;
> }
>
> -U_BOOT_CMD(stm32key, 4, 1, do_stm32key,
> -"Fuse ST Hash key",
> -"read : Read the hash store at addr in memory\n"
> -"stm32key fuse [-y] : Fuse hash store at addr in otp\n");
> +static char stm32key_help_text[] =
> + "read : Read the hash stored at addr in memory\n"
> + "stm32key fuse [-y] : Fuse hash stored at addr in OTP\n";
> +
> +U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse ST Hash key", stm32key_help_text,
> + U_BOOT_SUBCMD_MKENT(read, 2, 0, do_stm32key_read),
> + U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse));
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 1/7] stm32mp: configs: activate the command stm32key only for ST boards
Hi Patrick On 6/28/21 2:55 PM, Patrick Delaunay wrote: > This command is used to evaluate the secure boot on stm32mp SOC, > it is deactivated by default in real products. > > We activate this command only in STMicroelectronics defconfig > used with the evaluation boards. > > Signed-off-by: Patrick Delaunay > --- > > arch/arm/mach-stm32mp/Kconfig | 4 +++- > configs/stm32mp15_basic_defconfig | 1 + > configs/stm32mp15_trusted_defconfig | 1 + > 3 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig > index 7c25266f33..0e59931679 100644 > --- a/arch/arm/mach-stm32mp/Kconfig > +++ b/arch/arm/mach-stm32mp/Kconfig > @@ -174,10 +174,12 @@ config STM32_ETZPC > > config CMD_STM32KEY > bool "command stm32key to fuse public key hash" > - default y > + default n > help > fuse public key hash in corresponding fuse used to authenticate > binary. > + This command is used to evaluate the secure boot on stm32mp SOC, > + it is deactivated by default in real products. > > config PRE_CON_BUF_ADDR > default 0xC02FF000 > diff --git a/configs/stm32mp15_basic_defconfig > b/configs/stm32mp15_basic_defconfig > index 3ff46f7048..4e66472825 100644 > --- a/configs/stm32mp15_basic_defconfig > +++ b/configs/stm32mp15_basic_defconfig > @@ -10,6 +10,7 @@ CONFIG_SPL_DM_SPI=y > CONFIG_SPL_TEXT_BASE=0x2FFC2500 > CONFIG_SPL_MMC_SUPPORT=y > CONFIG_SPL=y > +CONFIG_CMD_STM32KEY=y > CONFIG_TARGET_ST_STM32MP15x=y > CONFIG_CMD_STM32PROG=y > CONFIG_ENV_OFFSET_REDUND=0x2C > diff --git a/configs/stm32mp15_trusted_defconfig > b/configs/stm32mp15_trusted_defconfig > index afbf721299..d68bdf9eea 100644 > --- a/configs/stm32mp15_trusted_defconfig > +++ b/configs/stm32mp15_trusted_defconfig > @@ -6,6 +6,7 @@ CONFIG_SYS_MEMTEST_START=0xc000 > CONFIG_SYS_MEMTEST_END=0xc400 > CONFIG_ENV_OFFSET=0x28 > CONFIG_ENV_SECT_SIZE=0x4 > +CONFIG_CMD_STM32KEY=y > CONFIG_TARGET_ST_STM32MP15x=y > CONFIG_CMD_STM32PROG=y > CONFIG_ENV_OFFSET_REDUND=0x2C > Reviewed-by: Patrice Chotard Thanks Patrice
Re: [PATCH] arm: dts: stm32mp15: alignment with v5.13
Hi Patrick
On 6/29/21 12:01 PM, Patrick Delaunay wrote:
> Device tree alignment with Linux kernel v5.13
> - ARM: dts: stm32: Add PTP clock to Ethernet controller
> - ARM: dts: stm32: enable the analog filter for all I2C nodes in
> stm32mp151
> - ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow control
> - ARM: dts: stm32: Add wakeup management on stm32mp15x UART nodes
> - ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
> - ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
> - ARM: dts: stm32: Rename mmc controller nodes to mmc@
> - ARM: dts: stm32: Add additional init state for SDMMC1 pins
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/dts/stm32mp15-pinctrl.dtsi | 61 +++--
> arch/arm/dts/stm32mp151.dtsi| 39 --
> 2 files changed, 86 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi
> b/arch/arm/dts/stm32mp15-pinctrl.dtsi
> index 20a59e8f7a..060baa8b7e 100644
> --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi
> +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi
> @@ -1273,6 +1273,18 @@
> };
> };
>
> + sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
> + pins1 {
> + pinmux = , /* SDMMC1_D0 */
> + , /* SDMMC1_D1 */
> + , /* SDMMC1_D2 */
> + ; /* SDMMC1_D3 */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-disable;
> + };
> + };
> +
> sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
> pins {
> pinmux = , /* SDMMC1_D0 */
> @@ -1299,6 +1311,17 @@
> };
> };
>
> + sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
> + pins1 {
> + pinmux = , /* SDMMC1_D0DIR
> */
> + , /* SDMMC1_D123DIR
> */
> + ; /* SDMMC1_CDIR */
> + slew-rate = <1>;
> + drive-push-pull;
> + bias-pull-up;
> + };
> + };
> +
> sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
> pins {
> pinmux = , /*
> SDMMC1_D0DIR */
> @@ -1868,10 +1891,15 @@
> usart2_idle_pins_c: usart2-idle-2 {
> pins1 {
> pinmux = , /* USART2_TX */
> - , /* USART2_RTS
> */
>; /*
> USART2_CTS_NSS */
> };
> pins2 {
> + pinmux = ; /* USART2_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <3>;
> + };
> + pins3 {
> pinmux = ; /* USART2_RX */
> bias-disable;
> };
> @@ -1917,10 +1945,15 @@
> usart3_idle_pins_b: usart3-idle-1 {
> pins1 {
> pinmux = , /* USART3_TX
> */
> - , /* USART3_RTS
> */
>; /*
> USART3_CTS_NSS */
> };
> pins2 {
> + pinmux = ; /* USART3_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins3 {
> pinmux = ; /* USART3_RX */
> bias-disable;
> };
> @@ -1953,10 +1986,15 @@
> usart3_idle_pins_c: usart3-idle-2 {
> pins1 {
> pinmux = , /* USART3_TX
> */
> - , /* USART3_RTS
> */
>; /*
> USART3_CTS_NSS */
> };
> pins2 {
> + pinmux = ; /* USART3_RTS */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <0>;
> + };
> + pins3 {
> pinmux = ; /* USART3_RX */
> bias-disable;
> };
> @@ -2018,6 +2056,23 @@
> };
> };
>
> + i2c6_pins_a: i2c6-0 {
> + pins {
> + pinmux = , /* I2C6_SCL */
> + ; /* I2C6_SDA */
> + bias-disable;
> + drive-open-drain;
> + slew-rate = <0>;
> + };
> + };
> +
> + i2c6_sleep_pins_a: i2c6-sleep-0 {
> + pins {
> + pinmux = , /* I2C6_SCL */
> + ; /* I2C6_SDA */
> + };
> + };
> +
> spi1_pins_a: spi1-0 {
> pins1 {
> pinmux = , /* SPI1_SCK */
> diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
> index b564fc6269..177927d14e 100644
> ---
Re: [PATCH 2/2] stm32mp: syscon: manage clock when present in device tree
Hi Patrick
On 6/29/21 12:04 PM, Patrick Delaunay wrote:
> Enable the clocks during syscon probe when they are present in device tree.
>
> This patch avoids a freeze when the SYSCFG clock is not enabled by
> TF-A / OP-TEE.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/syscon.c | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/mach-stm32mp/syscon.c b/arch/arm/mach-stm32mp/syscon.c
> index 3e61ce4097..a0e8e1dfdc 100644
> --- a/arch/arm/mach-stm32mp/syscon.c
> +++ b/arch/arm/mach-stm32mp/syscon.c
> @@ -4,6 +4,7 @@
> */
>
> #include
> +#include
> #include
> #include
> #include
> @@ -14,9 +15,22 @@ static const struct udevice_id stm32mp_syscon_ids[] = {
> { }
> };
>
> +static int stm32mp_syscon_probe(struct udevice *dev)
> +{
> + struct clk_bulk clk_bulk;
> + int ret;
> +
> + ret = clk_get_bulk(dev, _bulk);
> + if (!ret)
> + clk_enable_bulk(_bulk);
> +
> + return 0;
> +}
> +
> U_BOOT_DRIVER(syscon_stm32mp) = {
> .name = "stmp32mp_syscon",
> .id = UCLASS_SYSCON,
> .of_match = stm32mp_syscon_ids,
> .bind = dm_scan_fdt_dev,
> + .probe = stm32mp_syscon_probe,
> };
>
Reviewed-by: Patrice Chotard
Thanks
Re: [PATCH 1/2] clk: stm32mp1: add support of SYSCFG clock
Hi Patrick
On 6/29/21 12:04 PM, Patrick Delaunay wrote:
> Add the support of SYSCFG clock used by syscon driver
> to prepare the clock management of STM32MP_SYSCON_SYSCFG.
>
> This clock is already defined in kernel device tree,
> stm32mp151.dtsi but not yet supported in the syscon driver:
>
> syscfg: syscon@5002 {
> compatible = "st,stm32mp157-syscfg", "syscon";
> reg = <0x5002 0x400>;
> clocks = < SYSCFG>;
> };
>
> It is safe to support this clock in U-Boot driver with
> RCC_MC_APB3ENSETR, Bit 11 SYSCFGEN: SYSCFG peripheral clocks
> enable.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/clk/clk_stm32mp1.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
> index 0c0ef366a1..48c9514ba0 100644
> --- a/drivers/clk/clk_stm32mp1.c
> +++ b/drivers/clk/clk_stm32mp1.c
> @@ -540,6 +540,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[]
> = {
> STM32MP1_CLK_SET_CLR(RCC_MP_APB2ENSETR, 13, USART6_K, _UART6_SEL),
>
> STM32MP1_CLK_SET_CLR_F(RCC_MP_APB3ENSETR, 13, VREF, _PCLK3),
> + STM32MP1_CLK_SET_CLR_F(RCC_MP_APB3ENSETR, 11, SYSCFG, _UNKNOWN_SEL),
>
> STM32MP1_CLK_SET_CLR_F(RCC_MP_APB4ENSETR, 0, LTDC_PX, _PLL4_Q),
> STM32MP1_CLK_SET_CLR_F(RCC_MP_APB4ENSETR, 4, DSI_PX, _PLL4_Q),
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH] configs: stm32mp1: activate command rng
Hi Patrick On 6/29/21 12:08 PM, Patrick Delaunay wrote: > Activate the command rng with CONFIG_CMD_RNG, used to test > the rng driver > > Signed-off-by: Patrick Delaunay > --- > > configs/stm32mp15_basic_defconfig | 2 +- > configs/stm32mp15_trusted_defconfig | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/configs/stm32mp15_basic_defconfig > b/configs/stm32mp15_basic_defconfig > index 3ff46f7048..9239658aee 100644 > --- a/configs/stm32mp15_basic_defconfig > +++ b/configs/stm32mp15_basic_defconfig > @@ -54,6 +54,7 @@ CONFIG_CMD_BMP=y > CONFIG_CMD_CACHE=y > CONFIG_CMD_EFIDEBUG=y > CONFIG_CMD_TIME=y > +CONFIG_CMD_RNG=y > CONFIG_CMD_TIMER=y > CONFIG_CMD_PMIC=y > CONFIG_CMD_REGULATOR=y > @@ -168,7 +169,6 @@ CONFIG_BMP_32BPP=y > CONFIG_WDT=y > CONFIG_WDT_STM32MP=y > CONFIG_ERRNO_STR=y > -# CONFIG_HEXDUMP is not set > CONFIG_FDT_FIXUP_PARTITIONS=y > # CONFIG_LMB_USE_MAX_REGIONS is not set > CONFIG_LMB_MEMORY_REGIONS=2 > diff --git a/configs/stm32mp15_trusted_defconfig > b/configs/stm32mp15_trusted_defconfig > index afbf721299..6122fd28b8 100644 > --- a/configs/stm32mp15_trusted_defconfig > +++ b/configs/stm32mp15_trusted_defconfig > @@ -37,6 +37,7 @@ CONFIG_CMD_BMP=y > CONFIG_CMD_CACHE=y > CONFIG_CMD_EFIDEBUG=y > CONFIG_CMD_TIME=y > +CONFIG_CMD_RNG=y > CONFIG_CMD_TIMER=y > CONFIG_CMD_PMIC=y > CONFIG_CMD_REGULATOR=y > @@ -150,7 +151,6 @@ CONFIG_BMP_32BPP=y > CONFIG_WDT=y > CONFIG_WDT_STM32MP=y > CONFIG_ERRNO_STR=y > -# CONFIG_HEXDUMP is not set > CONFIG_FDT_FIXUP_PARTITIONS=y > # CONFIG_LMB_USE_MAX_REGIONS is not set > CONFIG_LMB_MEMORY_REGIONS=2 > Reviewed-by: Patrice Chotard Thanks
Re: [PATCH] xilinx: zynqmp: Add support for 67dr silicon
st 30. 6. 2021 v 11:40 odesílatel Michal Simek napsal:
>
> From: T Karthik Reddy
>
> Add zynqmp 67dr silicon to zynqmp device id table.
>
> Signed-off-by: T Karthik Reddy
> Signed-off-by: Michal Simek
> ---
>
> board/xilinx/zynqmp/zynqmp.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
> index 7177c5a5a89f..1748fec2e4d9 100644
> --- a/board/xilinx/zynqmp/zynqmp.c
> +++ b/board/xilinx/zynqmp/zynqmp.c
> @@ -185,6 +185,11 @@ static const struct {
> .device = 49,
> .variants = ZYNQMP_VARIANT_DR,
> },
> + {
> + .id = 0x046d0093,
> + .device = 67,
> + .variants = ZYNQMP_VARIANT_DR,
> + },
> };
>
> static const struct {
> --
> 2.32.0
>
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
Re: [PATCH] watchdog: cadence: Add expire_now method
po 28. 6. 2021 v 15:45 odesílatel Michal Simek napsal:
>
> It is working in a way that only minimal timeout is setup to reach
> expiration just right after it is setup.
> Please make sure that PMUFW is compiled with ENABLE_EM flag.
>
> On U-Boot prompt you can test it like:
> ZynqMP> wdt dev watchdog@fd4d
> ZynqMP> wdt list
> watchdog@fd4d (cdns_wdt)
> ZynqMP> wdt dev
> dev: watchdog@fd4d
> ZynqMP> wdt expire
> (And reset should happen here)
>
> Signed-off-by: Michal Simek
> ---
>
> drivers/watchdog/cdns_wdt.c | 41 -
> 1 file changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c
> index 966d010e40d9..6dfdd31c8b8f 100644
> --- a/drivers/watchdog/cdns_wdt.c
> +++ b/drivers/watchdog/cdns_wdt.c
> @@ -214,6 +214,45 @@ static int cdns_wdt_stop(struct udevice *dev)
> return 0;
> }
>
> +/**
> + * cdns_wdt_expire_now - Expire the watchdog.
> + *
> + * @dev: Watchdog device
> + * @flags: Driver flags
> + *
> + * Access WDT and configure with minimal counter value to expire ASAP.
> + * Expiration issues system reset. When DEBUG is enabled count should be
> + * bigger to at least see debug message.
> + *
> + * Return: Always 0
> + */
> +static int cdns_wdt_expire_now(struct udevice *dev, ulong flags)
> +{
> + struct cdns_wdt_priv *priv = dev_get_priv(dev);
> + u32 data, count = 0;
> +
> +#if defined(DEBUG)
> + count = 0x40; /* Increase the value if you need more time */
> + debug("%s: Expire wdt%u\n", __func__, dev_seq(dev));
> +#endif
> +
> + cdns_wdt_writereg(>regs->zmr, CDNS_WDT_ZMR_ZKEY_VAL);
> +
> + count = (count << 2) & CDNS_WDT_CCR_CRV_MASK;
> +
> + /* Write counter access key first to be able write to register */
> + data = count | CDNS_WDT_REGISTER_ACCESS_KEY;
> + cdns_wdt_writereg(>regs->ccr, data);
> +
> + data = CDNS_WDT_ZMR_WDEN_MASK | CDNS_WDT_ZMR_RSTEN_MASK |
> + CDNS_WDT_ZMR_ZKEY_VAL;
> +
> + cdns_wdt_writereg(>regs->zmr, data);
> + cdns_wdt_writereg(>regs->restart, CDNS_WDT_RESTART_KEY);
> +
> + return 0;
> +}
> +
> /**
> * cdns_wdt_probe - Probe call for the device.
> *
> @@ -247,7 +286,7 @@ static const struct wdt_ops cdns_wdt_ops = {
> .start = cdns_wdt_start,
> .reset = cdns_wdt_reset,
> .stop = cdns_wdt_stop,
> - /* There is no bit/reg/support in IP for expire_now functionality */
> + .expire_now = cdns_wdt_expire_now,
> };
>
> static const struct udevice_id cdns_wdt_ids[] = {
> --
> 2.32.0
>
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
Re: [PATCH] arm64: zynqmp: Enable WDT command
po 28. 6. 2021 v 15:51 odesílatel Michal Simek napsal: > > Enable watchdog command to be able to work with watchdogs. > > Signed-off-by: Michal Simek > --- > > configs/xilinx_zynqmp_virt_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/configs/xilinx_zynqmp_virt_defconfig > b/configs/xilinx_zynqmp_virt_defconfig > index dc057f427e90..a7f0501fc77e 100644 > --- a/configs/xilinx_zynqmp_virt_defconfig > +++ b/configs/xilinx_zynqmp_virt_defconfig > @@ -54,6 +54,7 @@ CONFIG_CMD_SF_TEST=y > CONFIG_CMD_SPI=y > CONFIG_CMD_USB=y > CONFIG_CMD_USB_MASS_STORAGE=y > +CONFIG_CMD_WDT=y > CONFIG_CMD_TFTPPUT=y > CONFIG_CMD_BMP=y > CONFIG_CMD_CACHE=y > -- > 2.32.0 > Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
[PATCH] arm64: rk3399: adjust vdd power layout
1. R4S passive silent heat dissipation based on metal housing,
no active heat dissipation by fan, so PWM-Fan and CPU_Thermal are removed
2. Modify Ethernet1 interface of PCIE0
3. Modify the VCC VDD power layout
Signed-off-by: xiaobo
---
arch/arm/dts/rk3399-nanopi-r4s.dts | 79 +-
1 file changed, 23 insertions(+), 56 deletions(-)
diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts
b/arch/arm/dts/rk3399-nanopi-r4s.dts
index 6f2cf17bf1..e341e498cd 100644
--- a/arch/arm/dts/rk3399-nanopi-r4s.dts
+++ b/arch/arm/dts/rk3399-nanopi-r4s.dts
@@ -17,51 +17,23 @@
model = "FriendlyElec NanoPi R4S";
compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
- aliases {
- ethernet1 =
+ chosen {
+ stdout-path = "serial2:150n8";
};
- vdd_5v: vdd-5v {
+ vcc5v0_core: vcc5v0-core {
compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
regulator-always-on;
regulator-boot-on;
+ regulator-name = "vcc5v0_core";
+ vin-supply = <_5v>;
};
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 12 18 255>;
- #cooling-cells = <2>;
- fan-supply = <_5v>;
- pwms = < 0 5 0>;
- };
-};
-
-_thermal {
- trips {
- cpu_warm: cpu_warm {
- temperature = <55000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- cpu_hot: cpu_hot {
- temperature = <65000>;
- hysteresis = <2000>;
- type = "active";
- };
- };
-
- cooling-maps {
- map2 {
- trip = <_warm>;
- cooling-device = < THERMAL_NO_LIMIT 1>;
- };
-
- map3 {
- trip = <_hot>;
- cooling-device = < 2 THERMAL_NO_LIMIT>;
- };
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd_5v";
};
};
@@ -76,37 +48,32 @@
{
lan_led: led-1 {
gpios = < RK_PA1 GPIO_ACTIVE_HIGH>;
- label = "nanopi-r4s:green:lan";
+ label = "green:lan";
+ };
+
+ sys_led: led-sys {
+ default-state = "on";
+ gpios = < RK_PB5 GPIO_ACTIVE_HIGH>;
+ label = "red:sys";
};
wan_led: led-2 {
gpios = < RK_PA0 GPIO_ACTIVE_HIGH>;
- label = "nanopi-r4s:green:wan";
+ label = "green:wan";
};
};
_gpio {
rockchip,pins =
- <0 RK_PB5 RK_FUNC_GPIO _pull_none>,
<1 RK_PA0 RK_FUNC_GPIO _pull_none>,
- <1 RK_PA1 RK_FUNC_GPIO _pull_none>;
+ <1 RK_PA1 RK_FUNC_GPIO _pull_none>,
+ <0 RK_PB5 RK_FUNC_GPIO _pull_none>;
};
{
max-link-speed = <1>;
num-lanes = <1>;
vpcie3v3-supply = <_sys>;
-
- pcie@0 {
- reg = <0x 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
-
- r8169: pcie@0,0 {
- reg = <0x00 0 0 0 0>;
- local-mac-address = [ 00 00 00 00 00 00 ];
- };
- };
};
{
@@ -122,11 +89,11 @@
};
_host {
- phy-supply = <_5v>;
+ phy-supply = <_core>;
};
_host {
- status = "disabled";
+ phy-supply = <_core>;
};
_dwc3_0 {
@@ -134,5 +101,5 @@
};
_sys {
- vin-supply = <_sys>;
+ vin-supply = <_core>;
};
--
2.32.0
[PATCH] arm64: rk3399: adjust vdd power layout
1. R4S passive silent heat dissipation based on metal housing,
no active heat dissipation by fan, so PWM-Fan and CPU_Thermal are removed
2. Modify Ethernet1 interface of PCIE0
3. Modify the VCC VDD power layout
Signed-off-by: xiaobo
---
arch/arm/dts/rk3399-nanopi-r4s.dts | 79 +-
1 file changed, 23 insertions(+), 56 deletions(-)
diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts
b/arch/arm/dts/rk3399-nanopi-r4s.dts
index 6f2cf17bf1..e341e498cd 100644
--- a/arch/arm/dts/rk3399-nanopi-r4s.dts
+++ b/arch/arm/dts/rk3399-nanopi-r4s.dts
@@ -17,51 +17,23 @@
model = "FriendlyElec NanoPi R4S";
compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399";
- aliases {
- ethernet1 =
+ chosen {
+ stdout-path = "serial2:150n8";
};
- vdd_5v: vdd-5v {
+ vcc5v0_core: vcc5v0-core {
compatible = "regulator-fixed";
- regulator-name = "vdd_5v";
regulator-always-on;
regulator-boot-on;
+ regulator-name = "vcc5v0_core";
+ vin-supply = <_5v>;
};
- fan: pwm-fan {
- compatible = "pwm-fan";
- cooling-levels = <0 12 18 255>;
- #cooling-cells = <2>;
- fan-supply = <_5v>;
- pwms = < 0 5 0>;
- };
-};
-
-_thermal {
- trips {
- cpu_warm: cpu_warm {
- temperature = <55000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- cpu_hot: cpu_hot {
- temperature = <65000>;
- hysteresis = <2000>;
- type = "active";
- };
- };
-
- cooling-maps {
- map2 {
- trip = <_warm>;
- cooling-device = < THERMAL_NO_LIMIT 1>;
- };
-
- map3 {
- trip = <_hot>;
- cooling-device = < 2 THERMAL_NO_LIMIT>;
- };
+ vdd_5v: vdd-5v {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd_5v";
};
};
@@ -76,37 +48,32 @@
{
lan_led: led-1 {
gpios = < RK_PA1 GPIO_ACTIVE_HIGH>;
- label = "nanopi-r4s:green:lan";
+ label = "green:lan";
+ };
+
+ sys_led: led-sys {
+ default-state = "on";
+ gpios = < RK_PB5 GPIO_ACTIVE_HIGH>;
+ label = "red:sys";
};
wan_led: led-2 {
gpios = < RK_PA0 GPIO_ACTIVE_HIGH>;
- label = "nanopi-r4s:green:wan";
+ label = "green:wan";
};
};
_gpio {
rockchip,pins =
- <0 RK_PB5 RK_FUNC_GPIO _pull_none>,
<1 RK_PA0 RK_FUNC_GPIO _pull_none>,
- <1 RK_PA1 RK_FUNC_GPIO _pull_none>;
+ <1 RK_PA1 RK_FUNC_GPIO _pull_none>,
+ <0 RK_PB5 RK_FUNC_GPIO _pull_none>;
};
{
max-link-speed = <1>;
num-lanes = <1>;
vpcie3v3-supply = <_sys>;
-
- pcie@0 {
- reg = <0x 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
-
- r8169: pcie@0,0 {
- reg = <0x00 0 0 0 0>;
- local-mac-address = [ 00 00 00 00 00 00 ];
- };
- };
};
{
@@ -122,11 +89,11 @@
};
_host {
- phy-supply = <_5v>;
+ phy-supply = <_core>;
};
_host {
- status = "disabled";
+ phy-supply = <_core>;
};
_dwc3_0 {
@@ -134,5 +101,5 @@
};
_sys {
- vin-supply = <_sys>;
+ vin-supply = <_core>;
};
--
2.32.0
[RFC PATCH 27/28] cli: lil: Add a function to quote values
This allows us to convert lil_values into a form which can be re-parsed. We
were already doing this for lists, so we just have to expose the inner
loop.
Signed-off-by: Sean Anderson
---
common/cli_lil.c | 89
1 file changed, 52 insertions(+), 37 deletions(-)
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 42659920b5..2a8600ffb6 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -2387,49 +2387,64 @@ braces:
return needs;
}
+static enum lil_error do_quote(struct lil_value *val, struct lil_value *item)
+{
+ char q;
+ size_t i;
+
+ switch (item_needs(lil_to_string(item), item->l)) {
+ case NEEDS_NOTHING:
+ return lil_append_val(val, item);
+ case NEEDS_BRACES:
+ return lil_append_char(val, '{') ?:
+ lil_append_val(val, item) ?:
+ lil_append_char(val, '}');
+ case NEEDS_DOUBLE:
+ q = '"';
+ goto quote;
+ case NEEDS_SINGLE:
+ q = '\'';
+quote:
+ if (lil_append_char(val, q))
+ return LIL_ERR_OOM;
+
+ for (i = 0; i < item->l; i++) {
+ char c = item->d[i];
+
+ if (c == '\\' || c == q)
+ if (lil_append_char(val, '\\'))
+ return LIL_ERR_OOM;
+ if (lil_append_char(val, c))
+ return LIL_ERR_OOM;
+ }
+ if (lil_append_char(val, q))
+ return LIL_ERR_OOM;
+ }
+ return LIL_ERR_NONE;
+}
+
+static struct lil_value *lil_quote_value(struct lil_value *val)
+{
+ struct lil_value *r = alloc_value(NULL);
+
+ if (do_quote(r, val)) {
+ lil_free_value(r);
+ return NULL;
+ }
+ return r;
+}
+
struct lil_value *lil_list_to_value(struct lil_list *list)
{
struct lil_value *val = alloc_value(NULL);
- size_t i, j;
+ size_t i;
for (i = 0; i < list->c; i++) {
- char q;
- struct lil_value *item = lil_list_get(list, i);
+ if (i && lil_append_char(val, ' '))
+ goto err;
- if (i)
- lil_append_char(val, ' ');
-
- switch (item_needs(lil_to_string(item), item->l)) {
- case NEEDS_NOTHING:
- if (lil_append_val(val, item))
- goto err;
- continue;
- case NEEDS_BRACES:
- if (lil_append_char(val, '{') ||
- lil_append_val(val, item) ||
- lil_append_char(val, '}'))
- goto err;
- continue;
- case NEEDS_DOUBLE:
- q = '"';
- goto quote;
- case NEEDS_SINGLE:
- q = '\'';
-quote:
- if (lil_append_char(val, q))
- goto err;
- for (j = 0; j < item->l; j++) {
- char c = item->d[j];
-
- if (c == '\\' || c == q)
- if (lil_append_char(val, '\\'))
- goto err;
- if (lil_append_char(val, c))
- goto err;
- }
- if (lil_append_char(val, q))
- goto err;
- }
+ if (do_quote(val, lil_list_get(list, i)))
+ goto err;
}
return val;
--
2.32.0
[RFC PATCH 26/28] cli: lil: Allocate len even when str is NULL in alloc_value_len
This allows us to reserve some space ahead of time, avoiding another
alloc/copy/free.
Signed-off-by: Sean Anderson
---
common/cli_lil.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 153c34791b..42659920b5 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -459,21 +459,19 @@ static struct lil_value *alloc_value_len(const char *str,
size_t len)
if (!val)
return NULL;
value_to_symbol(val)->type = LIL_SYMBOL_VALUE;
+ ensure_capacity(val, len + 1);
+ if (!val->d) {
+ release_to_pool(val);
+ return NULL;
+ }
if (str) {
val->l = len;
- ensure_capacity(val, len + 1);
- if (!val->d) {
- release_to_pool(val);
- return NULL;
- }
memcpy(val->d, str, len);
val->d[len] = 0;
} else {
val->l = 0;
- ensure_capacity(val, 1);
- if (val->d)
- val->d[0] = '\0';
+ val->d[0] = '\0';
}
return val;
}
--
2.32.0
[RFC PATCH 28/28] cli: lil: Load procs from the environment
When we start up the LIL interpreter, go through every variable and see if
it looks like a new procedure. If it does, try and parse it. For the return
trip, every time that we create a new procedure, create a new global
variable containing that procedure.
The end result of this is that procedures should now be saved to the
environment in the same way that variables are. So you can do
=> proc foo {args} { ... }
=> env save
and foo will be there after you reboot.
Signed-off-by: Sean Anderson
---
common/cli.c | 54 ---
common/cli_lil.c | 71 ++-
include/cli_lil.h | 17
3 files changed, 113 insertions(+), 29 deletions(-)
diff --git a/common/cli.c b/common/cli.c
index 391fee0ec7..c71f75e684 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -16,9 +16,11 @@
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
DECLARE_GLOBAL_DATA_PTR;
@@ -26,6 +28,21 @@ DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_LIL
static struct lil *lil;
+static enum lil_error print_lil_err(struct lil *lil)
+{
+ enum lil_error ret;
+ const char *err_msg;
+
+ ret = lil_error(lil, _msg);
+ if (ret) {
+ if (err_msg)
+ printf("error: %s\n", err_msg);
+ else
+ printf("error: %d\n", ret);
+ }
+ return ret;
+}
+
static int env_setvar(struct lil *lil, const char *name,
struct lil_value **value)
{
@@ -41,16 +58,40 @@ static int env_getvar(struct lil *lil, const char *name,
return 1;
}
+static int env_register_proc(struct env_entry *entry, void *priv)
+{
+ struct lil *lil = priv;
+ struct lil_value *name;
+ const char *name_str, prefix[] = "proc";
+
+ /* Skip variables which are obviously not procedures */
+ if (strncmp(entry->data, prefix, sizeof(prefix) - 1))
+ return 0;
+
+ name = lil_parse_eval(lil, entry->data, 0, true);
+ name_str = lil_to_string(name);
+ if (strcmp(entry->key, name_str))
+ log_debug("proc %s created by variable %s\n",
+ name_str, entry->key);
+ lil_free_value(name);
+ return print_lil_err(lil);
+}
+
+static int env_initprocs(struct lil *lil)
+{
+ return hwalk_r(_htab, env_register_proc, lil);
+}
+
static const struct lil_callbacks env_callbacks = {
.setvar = env_setvar,
.getvar = env_getvar,
+ .initprocs = env_initprocs,
};
static int lil_run(const char *cmd)
{
- int err;
struct lil_value *result = lil_parse_eval(lil, cmd, 0, true);
- const char *err_msg, *strres = lil_to_string(result);
+ const char *strres = lil_to_string(result);
/* The result may be very big, so use puts */
if (strres && strres[0]) {
@@ -59,14 +100,7 @@ static int lil_run(const char *cmd)
}
lil_free_value(result);
- err = lil_error(lil, _msg);
- if (err) {
- if (err_msg)
- printf("error: %s\n", err_msg);
- else
- printf("error: %d\n", err);
- }
- return !!err;
+ return !!print_lil_err(lil);
}
#endif
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 2a8600ffb6..7b4a56dbd0 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -3218,9 +3218,11 @@ static struct lil_value *fnc_reflect(struct lil *lil,
size_t argc,
static struct lil_value *fnc_proc(struct lil *lil, size_t argc,
struct lil_value **argv)
{
+ static const char fmt[] = "proc %s {%s} %s";
+ size_t n;
struct lil_func *cmd;
- struct lil_list *args;
- struct lil_value *name, *code;
+ struct lil_list *fargs;
+ struct lil_value *name, *args, *code, *val;
if (argc != 3) {
lil_set_error_argc(lil, 3);
@@ -3228,34 +3230,62 @@ static struct lil_value *fnc_proc(struct lil *lil,
size_t argc,
}
name = lil_clone_value(argv[0]);
- if (!name) {
- lil_set_error_oom(lil);
- return NULL;
- }
-
- args = lil_subst_to_list(lil, argv[1]);
- if (!args)
- goto err_args;
-
code = lil_clone_value(argv[2]);
- if (!code) {
+ if (!name || !code) {
lil_set_error_oom(lil);
- goto err_code;
+ goto err_name_fargs_code;
}
+ fargs = lil_subst_to_list(lil, argv[1]);
+ if (!fargs)
+ goto err_name_fargs_code;
+
cmd = add_func(lil, lil_to_string(name));
if (!cmd)
goto err_func;
- cmd->argnames = args;
+ cmd->argnames = fargs;
cmd->code = code;
+ args = lil_list_to_value(fargs);
+ code = lil_quote_value(code);
+ if (!args || !code) {
+
[RFC PATCH 25/28] cli: lil: Always quote items in lil_list_to_value
This function took an argument do_quote which determined whether or not to
quote an item. All callers set it to true, so remove it and always quote.
Signed-off-by: Sean Anderson
---
common/cli_lil.c | 34 ++
include/cli_lil.h | 2 +-
2 files changed, 15 insertions(+), 21 deletions(-)
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 1c7c340bda..153c34791b 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -2092,7 +2092,7 @@ static struct lil_value *run_cmd(struct lil *lil, struct
lil_func *cmd,
if (cmd->argnames->c == 1 &&
!strcmp(lil_to_string(lil_list_get(cmd->argnames, 0)),
"args")) {
- struct lil_value *args = lil_list_to_value(words, 1);
+ struct lil_value *args = lil_list_to_value(words);
lil_set_var(lil, "args", args, LIL_SETVAR_LOCAL_NEW);
lil_free_value(args);
@@ -2389,7 +2389,7 @@ braces:
return needs;
}
-struct lil_value *lil_list_to_value(struct lil_list *list, bool do_escape)
+struct lil_value *lil_list_to_value(struct lil_list *list)
{
struct lil_value *val = alloc_value(NULL);
size_t i, j;
@@ -2397,17 +2397,11 @@ struct lil_value *lil_list_to_value(struct lil_list
*list, bool do_escape)
for (i = 0; i < list->c; i++) {
char q;
struct lil_value *item = lil_list_get(list, i);
- enum needs needs;
-
- if (do_escape)
- needs = item_needs(lil_to_string(item), item->l);
- else
- needs = NEEDS_NOTHING;
if (i)
lil_append_char(val, ' ');
- switch (needs) {
+ switch (item_needs(lil_to_string(item), item->l)) {
case NEEDS_NOTHING:
if (lil_append_val(val, item))
goto err;
@@ -3087,7 +3081,7 @@ static struct lil_value *fnc_reflect(struct lil *lil,
size_t argc,
func = lil_find_cmd(lil, lil_to_string(argv[1]));
if (!func || !func->argnames)
return NULL;
- return lil_list_to_value(func->argnames, 1);
+ return lil_list_to_value(func->argnames);
}
if (!strcmp(type, "body")) {
@@ -3111,7 +3105,7 @@ static struct lil_value *fnc_reflect(struct lil *lil,
size_t argc,
lil_list_append(funcs,
lil_alloc_string(lil->cmd[i]->name));
- r = lil_list_to_value(funcs, 1);
+ r = lil_list_to_value(funcs);
lil_free_list(funcs);
return r;
}
@@ -3130,7 +3124,7 @@ static struct lil_value *fnc_reflect(struct lil *lil,
size_t argc,
env = env->parent;
}
- r = lil_list_to_value(vars, 1);
+ r = lil_list_to_value(vars);
lil_free_list(vars);
return r;
}
@@ -3145,7 +3139,7 @@ static struct lil_value *fnc_reflect(struct lil *lil,
size_t argc,
lil_list_append(vars, var);
}
- r = lil_list_to_value(vars, 1);
+ r = lil_list_to_value(vars);
lil_free_list(vars);
return r;
}
@@ -3513,7 +3507,7 @@ static struct lil_value *fnc_append(struct lil *lil,
size_t argc,
for (i = base; i < argc; i++)
lil_list_append(list, lil_clone_value(argv[i]));
- r = lil_list_to_value(list, 1);
+ r = lil_list_to_value(list);
lil_free_list(list);
lil_set_var(lil, varname, r, access);
return r;
@@ -3548,7 +3542,7 @@ static struct lil_value *fnc_slice(struct lil *lil,
size_t argc,
lil_list_append(slice, lil_clone_value(lil_list_get(list, i)));
lil_free_list(list);
- r = lil_list_to_value(slice, 1);
+ r = lil_list_to_value(slice);
lil_free_list(slice);
return r;
}
@@ -3586,7 +3580,7 @@ static struct lil_value *fnc_filter(struct lil *lil,
size_t argc,
}
lil_free_list(list);
- r = lil_list_to_value(filtered, 1);
+ r = lil_list_to_value(filtered);
lil_free_list(filtered);
return r;
}
@@ -3601,7 +3595,7 @@ static struct lil_value *fnc_list(struct lil *lil, size_t
argc,
for (i = 0; i < argc; i++)
lil_list_append(list, lil_clone_value(argv[i]));
- r = lil_list_to_value(list, 1);
+ r = lil_list_to_value(list);
lil_free_list(list);
return r;
}
@@ -3628,7 +3622,7 @@ static struct lil_value *fnc_concat(struct lil *lil,
size_t argc,
r = lil_alloc_string("");
for (i = 0; i < argc; i++) {
list = lil_subst_to_list(lil, argv[i]);
- tmp =
[RFC PATCH 24/28] cli: lil: Make proc always take 3 arguments
This rewrites proc to always take 3 arguments. It also adds proper error
handling. TCL does not allow for anonymous functions to be created with
proc. Allowing for a variable number of arguments makes the code much more
complex when adding error handling.
Since fnc_proc was the last user of lil_unused_name (other than
fnc_unusedname), remove it.
Signed-off-by: Sean Anderson
---
common/cli_lil.c | 103 ---
test/cmd/lil.c | 6 ++-
2 files changed, 38 insertions(+), 71 deletions(-)
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 7ec73675f3..1c7c340bda 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -2985,32 +2985,6 @@ struct lil_value *lil_eval_expr(struct lil *lil, struct
lil_value *code)
return lil_alloc_integer(ee.ival);
}
-struct lil_value *lil_unused_name(struct lil *lil, const char *part)
-{
- char *name = malloc(strlen(part) + 64);
- struct lil_value *val;
- size_t i;
-
- for (i = 0; i < (size_t)-1; i++) {
- sprintf(name, "!!un!%s!%09u!nu!!", part, (unsigned int)i);
- if (lil_find_cmd(lil, name))
- continue;
-
- if (lil_find_var(lil, lil->env, name))
- continue;
-
- val = lil_alloc_string(name);
- free(name);
- return val;
- }
- return NULL;
-}
-
-struct lil_value *lil_arg(struct lil_value **argv, size_t index)
-{
- return argv ? argv[index] : NULL;
-}
-
const char *lil_to_string(struct lil_value *val)
{
return (val && val->l) ? val->d : "";
@@ -3237,47 +3211,46 @@ static struct lil_value *fnc_reflect(struct lil *lil,
size_t argc,
static struct lil_value *fnc_proc(struct lil *lil, size_t argc,
struct lil_value **argv)
{
- struct lil_value *name;
struct lil_func *cmd;
- struct lil_list *fargs;
+ struct lil_list *args;
+ struct lil_value *name, *code;
- if (argc < 1)
+ if (argc != 3) {
+ lil_set_error_argc(lil, 3);
return NULL;
-
- if (argc >= 3) {
- name = lil_clone_value(argv[0]);
- fargs = lil_subst_to_list(lil, argv[1]);
- cmd = add_func(lil, lil_to_string(argv[0]));
- if (!cmd)
- return NULL;
-
- cmd->argnames = fargs;
- cmd->code = lil_clone_value(argv[2]);
- } else {
- name = lil_unused_name(lil, "anonymous-function");
- if (argc < 2) {
- struct lil_value *tmp = lil_alloc_string("args");
-
- fargs = lil_subst_to_list(lil, tmp);
- lil_free_value(tmp);
- cmd = add_func(lil, lil_to_string(name));
- if (!cmd)
- return NULL;
-
- cmd->argnames = fargs;
- cmd->code = lil_clone_value(argv[0]);
- } else {
- fargs = lil_subst_to_list(lil, argv[0]);
- cmd = add_func(lil, lil_to_string(name));
- if (!cmd)
- return NULL;
-
- cmd->argnames = fargs;
- cmd->code = lil_clone_value(argv[1]);
- }
}
+ name = lil_clone_value(argv[0]);
+ if (!name) {
+ lil_set_error_oom(lil);
+ return NULL;
+ }
+
+ args = lil_subst_to_list(lil, argv[1]);
+ if (!args)
+ goto err_args;
+
+ code = lil_clone_value(argv[2]);
+ if (!code) {
+ lil_set_error_oom(lil);
+ goto err_code;
+ }
+
+ cmd = add_func(lil, lil_to_string(name));
+ if (!cmd)
+ goto err_func;
+ cmd->argnames = args;
+ cmd->code = code;
+
return name;
+
+err_func:
+ lil_free_value(code);
+err_code:
+ lil_free_list(args);
+err_args:
+ lil_free_value(name);
+ return NULL;
}
static struct lil_value *fnc_rename(struct lil *lil, size_t argc,
@@ -3312,13 +3285,6 @@ static struct lil_value *fnc_rename(struct lil *lil,
size_t argc,
return r;
}
-static struct lil_value *fnc_unusedname(struct lil *lil, size_t argc,
- struct lil_value **argv)
-{
- return lil_unused_name(lil, argc > 0 ? lil_to_string(argv[0]) :
-"unusedname");
-}
-
static struct lil_value *fnc_quote(struct lil *lil, size_t argc,
struct lil_value **argv)
{
@@ -4310,7 +4276,6 @@ static void register_stdcmds(struct lil *lil)
lil_register(lil, "substr", fnc_substr);
lil_register(lil, "topeval", fnc_topeval);
lil_register(lil, "trim", fnc_trim);
- lil_register(lil,
[RFC PATCH 23/28] cli: lil: Handle OOM for hm_put
hm_put allocates memory, and this can fail. Instead of failing silently,
return an error code. This also fixes up callers to handle this error.
Signed-off-by: Sean Anderson
---
common/cli_lil.c | 47 ---
1 file changed, 32 insertions(+), 15 deletions(-)
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 2ed96ebc2d..7ec73675f3 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -326,22 +326,30 @@ static void hm_destroy(struct hashmap *hm)
}
}
-static void hm_put(struct hashmap *hm, const char *key, void *value)
+static enum lil_error hm_put(struct hashmap *hm, const char *key, void *value)
{
struct hashcell *cell = hm->cell + (hm_hash(key) & HASHMAP_CELLMASK);
+ struct hashentry *newe;
size_t i;
for (i = 0; i < cell->c; i++) {
if (!strcmp(key, cell->e[i].k)) {
cell->e[i].v = value;
- return;
+ return LIL_ERR_NONE;
}
}
- cell->e = realloc(cell->e, sizeof(struct hashentry) * (cell->c + 1));
- cell->e[cell->c].k = strdup(key);
- cell->e[cell->c].v = value;
+ newe = realloc(cell->e, sizeof(struct hashentry) * (cell->c + 1));
+ if (!newe)
+ return LIL_ERR_OOM;
+ cell->e = newe;
+
+ newe[cell->c].k = strdup(key);
+ if (!newe[cell->c].k)
+ return LIL_ERR_OOM;
+ newe[cell->c].v = value;
cell->c++;
+ return LIL_ERR_NONE;
}
static void *hm_get(struct hashmap *hm, const char *key)
@@ -738,19 +746,24 @@ static struct lil_func *add_func(struct lil *lil, const
char *name)
cmd = calloc(1, sizeof(struct lil_func));
if (!cmd)
- return NULL;
+ goto oom;
cmd->name = strdup(name);
ncmd = realloc(lil->cmd, sizeof(struct lil_func *) * (lil->cmds + 1));
- if (!ncmd) {
- free(cmd);
- return NULL;
- }
-
+ if (!ncmd)
+ goto oom;
lil->cmd = ncmd;
+
ncmd[lil->cmds++] = cmd;
- hm_put(>cmdmap, name, cmd);
+ if (hm_put(>cmdmap, name, cmd))
+ goto oom;
+
return cmd;
+
+oom:
+ free(cmd);
+ lil_set_error_oom(lil);
+ return NULL;
}
static void del_func(struct lil *lil, struct lil_func *cmd)
@@ -766,7 +779,11 @@ static void del_func(struct lil *lil, struct lil_func *cmd)
if (index == lil->cmds)
return;
- hm_put(>cmdmap, cmd->name, 0);
+ /*
+* The only way this fails is if we don't find the command; this
+* means our caller wants to delete a command which doesn't exist
+*/
+ assert(!hm_put(>cmdmap, cmd->name, NULL));
if (cmd->argnames)
lil_free_list(cmd->argnames);
@@ -783,9 +800,9 @@ int lil_register(struct lil *lil, const char *name,
lil_func_proc_t proc)
struct lil_func *cmd = add_func(lil, name);
if (!cmd)
- return 0;
+ return LIL_ERR_OOM;
cmd->proc = proc;
- return 1;
+ return LIL_ERR_NONE;
}
struct lil_var *lil_set_var(struct lil *lil, const char *name,
--
2.32.0
[RFC PATCH 21/28] cli: lil: Add a distinct parsing step
This adds a parser to LIL (as separate from the interpreter). This is
necessary to detect syntax errors before evaluating anything. Before this,
running a script like
echo some message; echo syntax error}
would result in "some message" being printed before the error was
discovered. This is not only rather surprising, but also makes things like
Hush's secondary prompt impossible to implement. In addition, the original
parser would accept almost any input, and silently return NULL if it
encountered problems. This made it difficult to determine if a command had
been mis-parsed, since an empty command would just evaluate to "".
The grammar is not the same as LIL originally. Several ideas have been
taken from TCL proper as well. In order to simplify the parser, it has been
rewritten to be LL(1), except for line continuations which are LL(2). In
particular, multi-line comments and command/variable subtitutions partially
through unquoted words (e.g. a$b) have been removed. Some other characters
such as unescaped, unmatched }s are now syntax errors. On the other hand,
some things such as escaped characters in unquoted words have been added
back (as seen in TCL). Unlike TCL, comments may be placed almost anywhere.
The exact grammar is subject to change, but I have tried to make it as sane
as I can get it.
The grammar has been documented in (extended) EBNF. The names of the
nonterminals are the same as are used in the dodekalogue [1]. Each
nonterminal foo has a function parse_foo() which recognizes it.
[1] https://www.tcl.tk/man/tcl8.6/TclCmd/Tcl.htm
Signed-off-by: Sean Anderson
---
cmd/Kconfig |4 +-
common/cli.c |2 +-
common/cli_lil.c | 1880 -
include/cli_lil.h | 11 +-
test/cmd/lil.c| 73 +-
5 files changed, 1527 insertions(+), 443 deletions(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index bba72bbdc2..7ff8e4a7e5 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -43,8 +43,8 @@ if LIL
config LIL_FULL
bool "Enable all LIL features"
help
- This enables all LIL builtin functions, as well as expression support
- for arithmetic and bitwise operations.
+ This enables all LIL builtin functions, expression support for
+ arithmetic and bitwise operations, and expanded error messages.
config LIL_POOLS
bool "Use memory pools for LIL structures"
diff --git a/common/cli.c b/common/cli.c
index ad5d76d563..391fee0ec7 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -49,7 +49,7 @@ static const struct lil_callbacks env_callbacks = {
static int lil_run(const char *cmd)
{
int err;
- struct lil_value *result = lil_parse(lil, cmd, 0, 0);
+ struct lil_value *result = lil_parse_eval(lil, cmd, 0, true);
const char *err_msg, *strres = lil_to_string(result);
/* The result may be very big, so use puts */
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 06fd37c383..2ed96ebc2d 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -16,6 +16,7 @@
#include
#include
#include
+#include
#define HASHMAP_CELLS 256
#define HASHMAP_CELLMASK 0xFF
@@ -121,14 +122,27 @@ struct lil_list {
};
/**
- * struct lil_symbol - A symbol parsed by the parser
+ * enum lil_symbol_type - The type of data in a symbol
* @LIL_SYMBOL_VALUE: A plain old string and length
* @LIL_SYMBOL_VARIABLE: A name of a variable to be substituted
* @LIL_SYMBOL_LIST: A list of symbols
- * @value: A literal value or name of variable
- * @list: A list of commands in the script
- * @word: Another word to be evaluated
- * @type: The type of word
+ * @LIL_SYMBOL_COMMAND: A command to be ran
+ * @LIL_SYMBOL_SCRIPT: A script to be run
+ */
+enum lil_symbol_type {
+ LIL_SYMBOL_VALUE = 0,
+ LIL_SYMBOL_LIST,
+ LIL_SYMBOL_VARIABLE,
+ LIL_SYMBOL_COMMAND,
+ LIL_SYMBOL_SCRIPT,
+};
+
+/**
+ * struct lil_symbol - A symbol parsed by the parser
+ * @value: A literal value
+ * @list: A list of commands, words, or symbols
+ * @symbol: Another symbol to be evaluated
+ * @type: The type of symbol
*/
struct lil_symbol {
union {
@@ -136,13 +150,7 @@ struct lil_symbol {
struct lil_symbol *symbol;
struct lil_list list;
};
- enum {
- LIL_SYMBOL_VALUE = 0,
- LIL_SYMBOL_LIST,
- LIL_SYMBOL_VARIABLE,
- LIL_SYMBOL_COMMAND,
- LIL_SYMBOL_SCRIPT,
- } type;
+ enum lil_symbol_type type;
};
/**
@@ -162,14 +170,64 @@ struct lil_func {
lil_func_proc_t proc;
};
+/**
+ * struct lil_position - A position within a script
+ * @head: The absolute offset
+ * @line: The current line (as delineated by newlines)
+ * @column: The column within the current line
+ */
+struct lil_position {
+ size_t head;
+ size_t line;
+ size_t column;
+};
+
+/**
+ * struct lil_parser_error - Errors encountered while parsing a script
+ *
[RFC PATCH 22/28] env: Add a priv pointer to hwalk_r
This allows callers of hwalk_r to pass data to their callback. This mirrors
e.g. env_attr_walk.
Signed-off-by: Sean Anderson
---
cmd/nvedit.c | 8
env/callback.c | 4 ++--
env/flags.c | 4 ++--
include/search.h | 2 +-
lib/hashtable.c | 5 +++--
5 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index d14ba10cef..b855e502c0 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -481,7 +481,7 @@ static int print_static_binding(const char *var_name, const
char *callback_name,
return 0;
}
-static int print_active_callback(struct env_entry *entry)
+static int print_active_callback(struct env_entry *entry, void *priv)
{
struct env_clbk_tbl *clbkp;
int i;
@@ -544,7 +544,7 @@ int do_env_callback(struct cmd_tbl *cmdtp, int flag, int
argc,
puts("Active callback bindings:\n");
printf("\t%-20s %-20s\n", "Variable Name", "Callback Name");
printf("\t%-20s %-20s\n", "-", "-");
- hwalk_r(_htab, print_active_callback);
+ hwalk_r(_htab, print_active_callback, NULL);
return 0;
}
#endif
@@ -563,7 +563,7 @@ static int print_static_flags(const char *var_name, const
char *flags,
return 0;
}
-static int print_active_flags(struct env_entry *entry)
+static int print_active_flags(struct env_entry *entry, void *priv)
{
enum env_flags_vartype type;
enum env_flags_varaccess access;
@@ -617,7 +617,7 @@ int do_env_flags(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
"Variable Access");
printf("\t%-20s %-20s %-20s\n", "-", "-",
"---");
- hwalk_r(_htab, print_active_flags);
+ hwalk_r(_htab, print_active_flags, NULL);
return 0;
}
#endif
diff --git a/env/callback.c b/env/callback.c
index 638a02b28f..47075acb92 100644
--- a/env/callback.c
+++ b/env/callback.c
@@ -83,7 +83,7 @@ void env_callback_init(struct env_entry *var_entry)
* Called on each existing env var prior to the blanket update since removing
* a callback association should remove its callback.
*/
-static int clear_callback(struct env_entry *entry)
+static int clear_callback(struct env_entry *entry, void *priv)
{
entry->callback = NULL;
@@ -127,7 +127,7 @@ static int on_callbacks(const char *name, const char
*value, enum env_op op,
int flags)
{
/* remove all callbacks */
- hwalk_r(_htab, clear_callback);
+ hwalk_r(_htab, clear_callback, NULL);
/* configure any static callback bindings */
env_attr_walk(ENV_CALLBACK_LIST_STATIC, set_callback, NULL);
diff --git a/env/flags.c b/env/flags.c
index e3e833c433..f2e36e3dd3 100644
--- a/env/flags.c
+++ b/env/flags.c
@@ -468,7 +468,7 @@ void env_flags_init(struct env_entry *var_entry)
* Called on each existing env var prior to the blanket update since removing
* a flag in the flag list should remove its flags.
*/
-static int clear_flags(struct env_entry *entry)
+static int clear_flags(struct env_entry *entry, void *priv)
{
entry->flags = 0;
@@ -503,7 +503,7 @@ static int on_flags(const char *name, const char *value,
enum env_op op,
int flags)
{
/* remove all flags */
- hwalk_r(_htab, clear_flags);
+ hwalk_r(_htab, clear_flags, NULL);
/* configure any static flags */
env_attr_walk(ENV_FLAGS_LIST_STATIC, set_flags, NULL);
diff --git a/include/search.h b/include/search.h
index d0bb44388e..4a0828fb8d 100644
--- a/include/search.h
+++ b/include/search.h
@@ -105,7 +105,7 @@ int himport_r(struct hsearch_data *htab, const char *env,
size_t size,
/* Walk the whole table calling the callback on each element */
int hwalk_r(struct hsearch_data *htab,
- int (*callback)(struct env_entry *entry));
+ int (*callback)(struct env_entry *entry, void *priv), void *priv);
/* Flags for himport_r(), hexport_r(), hdelete_r(), and hsearch_r() */
#define H_NOCLEAR (1 << 0) /* do not clear hash table before importing */
diff --git a/lib/hashtable.c b/lib/hashtable.c
index ff5ff72639..425a880222 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -998,14 +998,15 @@ end:
* Walk all of the entries in the hash, calling the callback for each one.
* this allows some generic operation to be performed on each element.
*/
-int hwalk_r(struct hsearch_data *htab, int (*callback)(struct env_entry
*entry))
+int hwalk_r(struct hsearch_data *htab,
+ int (*callback)(struct env_entry *entry, void *priv), void *priv)
{
int i;
int retval;
for (i = 1; i <= htab->size; ++i) {
if (htab->table[i].used > 0) {
- retval = callback(>table[i].entry);
+ retval = callback(>table[i].entry, priv);
if (retval)
return retval;
}
--
2.32.0
[RFC PATCH 19/28] cli: lil: Add "symbol" structure
We need a generic structure to hold symbols parsed by the parser. We would
also like to re-use existing code as much as possible without rewriting
everything. To do this, we hijack the allocators for lil_list and lil_value
and have them allocate enough space for a lil_symbol.
While we're at it, we can make lil_list hold lil_symbols instead of
lil_values. To keep all the old users sane, we just cast back to lil_value
before retrieving the value (with an assert to make sure we're not sending
back something else). Unfortunately, many functions were accessing the
list vector directly, so convert them.
This commit also fixes pools not behaving properly when running out of
memory. This should likely be refactored in the future so everything uses
one set of allocator/free routines to avoid code duplication.
Signed-off-by: Sean Anderson
---
common/cli_lil.c | 317 +-
include/cli_lil.h | 8 +-
2 files changed, 206 insertions(+), 119 deletions(-)
diff --git a/common/cli_lil.c b/common/cli_lil.c
index 5875fbd46b..06fd37c383 100644
--- a/common/cli_lil.c
+++ b/common/cli_lil.c
@@ -106,18 +106,45 @@ struct lil_env {
int breakrun;
};
+struct lil_symbol;
+
/**
- * struct list - A list of values
- * @v: A list of pointers to lil_value
- * @c: The number of values in this list
+ * struct list - A list of symbols
+ * @v: A list of pointers to symbols
+ * @c: The number of symbols in this list
* @cap: The space allocated for @v
*/
struct lil_list {
- struct lil_value **v;
+ struct lil_symbol **v;
size_t c;
size_t cap;
};
+/**
+ * struct lil_symbol - A symbol parsed by the parser
+ * @LIL_SYMBOL_VALUE: A plain old string and length
+ * @LIL_SYMBOL_VARIABLE: A name of a variable to be substituted
+ * @LIL_SYMBOL_LIST: A list of symbols
+ * @value: A literal value or name of variable
+ * @list: A list of commands in the script
+ * @word: Another word to be evaluated
+ * @type: The type of word
+ */
+struct lil_symbol {
+ union {
+ struct lil_value value;
+ struct lil_symbol *symbol;
+ struct lil_list list;
+ };
+ enum {
+ LIL_SYMBOL_VALUE = 0,
+ LIL_SYMBOL_LIST,
+ LIL_SYMBOL_VARIABLE,
+ LIL_SYMBOL_COMMAND,
+ LIL_SYMBOL_SCRIPT,
+ } type;
+};
+
/**
* struct lil_func - A function which may be evaluated with a list of arguments
* @name: The name of the function
@@ -287,24 +314,50 @@ static int hm_has(struct hashmap *hm, const char *key)
return 0;
}
-#ifdef CONFIG_LIL_POOLS
+static void lil_free_symbol(struct lil_symbol *sym)
+{
+ switch (sym->type) {
+ case LIL_SYMBOL_VALUE:
+ lil_free_value(>value);
+ return;
+ case LIL_SYMBOL_VARIABLE:
+ lil_free_symbol(sym->symbol);
+ free(sym);
+ return;
+ case LIL_SYMBOL_LIST:
+ case LIL_SYMBOL_COMMAND:
+ case LIL_SYMBOL_SCRIPT:
+ lil_free_list(>list);
+ return;
+ }
+ log_debug("unknown type %d\n", sym->type);
+ assert(0);
+}
+
+#if IS_ENABLED(CONFIG_LIL_POOLS)
static struct lil_value *alloc_from_pool(void)
{
- if (poolsize > 0) {
- poolsize--;
- return pool[poolsize];
- } else {
- struct lil_value *val = calloc(1, sizeof(struct lil_value));
-
- return val;
- }
+ if (poolsize > 0)
+ return pool[--poolsize];
+ else
+ return calloc(1, sizeof(struct lil_symbol));
}
static void release_to_pool(struct lil_value *val)
{
if (poolsize == poolcap) {
- poolcap = poolcap ? (poolcap + poolcap / 2) : 64;
- pool = realloc(pool, sizeof(struct lil_value *) * poolcap);
+ size_t npoolcap = poolcap ? (poolcap + poolcap / 2) : 64;
+ struct lil_value **npool =
+ realloc(pool, sizeof(struct lil_symbol *) * npoolcap);
+
+ if (!npool) {
+ free(val->d);
+ free(val);
+ return;
+ }
+
+ poolcap = npoolcap;
+ pool = npool;
}
pool[poolsize++] = val;
}
@@ -319,45 +372,48 @@ static void ensure_capacity(struct lil_value *val, size_t
cap)
#else
static struct lil_value *alloc_from_pool(void)
{
- return NULL;
+ return calloc(1, sizeof(struct lil_symbol));
}
-static void release_to_pool(struct lil_value *val) { }
-static void ensure_capacity(struct lil_value *val, size_t cap) { }
+static void release_to_pool(struct lil_value *val)
+{
+ free(val->d);
+ free(val);
+}
+static void ensure_capacity(struct lil_value *val, size_t cap)
+{
+ val->d = realloc(val->d, cap);
+}
#endif
+static struct lil_symbol *value_to_symbol(struct lil_value *val)
+{
+
[RFC PATCH 20/28] cli: lil: Add config to enable debug output
This provides an easy way to enable assertions and debug messages. It will also be used to enable tracing features in future patches. Signed-off-by: Sean Anderson --- cmd/Kconfig | 6 ++ common/Makefile | 3 +++ 2 files changed, 9 insertions(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index 7c8962cfc2..bba72bbdc2 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -61,6 +61,12 @@ config LIL_RECLIMIT avoid call stack overflows and is also useful when running through an automated fuzzer like AFL. Set to 0 to disable the recursion limit. +config LIL_DEBUG + bool "Enable LIL debugging" + help + This enables debug prints, assertions, and other tracing features in + LIL. If you are not working on LIL, say 'n' here. + endif endif diff --git a/common/Makefile b/common/Makefile index dce04b305e..558e1932fe 100644 --- a/common/Makefile +++ b/common/Makefile @@ -11,6 +11,9 @@ obj-y += exports.o obj-$(CONFIG_HASH) += hash.o obj-$(CONFIG_HUSH_PARSER) += cli_hush.o obj-$(CONFIG_LIL) += cli_lil.o +ifneq ($(CONFIG_LIL_DEBUG),) +CFLAGS_cli_lil.o += -DDEBUG +endif obj-$(CONFIG_AUTOBOOT) += autoboot.o # This option is not just y/n - it can have a numeric value -- 2.32.0
