Re: [PATCH v3 3/3] mtd: nand: raw: atmel: Fix pulse read timing for certain NAND flashes
Hei hei,
Am Mon, Apr 15, 2024 at 09:57:55AM +0200 schrieb Alexander Dahl:
> From reading the S34ML02G1 and the SAM9X60 datasheets again, it seems
> like we have to wait tREA after rising RE# before sampling the data.
> Thus pulse time must be at least tREA.
>
> Without this fix we got PMECC errors when reading, after switching to
> ONFI timing mode 3 on SAM9X60 SoC with S34ML02G1 raw NAND flash chip.
>
> The approach to set timings used before worked on sam9g20 and sama5d2
> with the same flash (S34ML02G1), probably because those have a slower
> mck clock rate and thus the resolution of the timings setup is not as
> tight as with sam9x60.
>
> The approach to fix the issue was carried over from at91bootstrap, and
> has been successfully tested in at91bootstrap, U-Boot and Linux.
>
> Link: https://github.com/linux4sam/at91bootstrap/issues/174
> Cc: Li Bin
> Signed-off-by: Alexander Dahl
> ---
>
> Notes:
> v3:
> - initial patch version (not present in v1 and v2)
This patch was send as part of a series, which you wanted to have some
more time to test. Besides that, has anyone looked into this
particular fix? Maybe it can be applied separately?
Greets
Alex
>
> drivers/mtd/nand/raw/atmel/nand-controller.c | 13 +
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
> b/drivers/mtd/nand/raw/atmel/nand-controller.c
> index bbafc88e44c..00ffeadd113 100644
> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c
> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
> @@ -1133,7 +1133,7 @@ static int atmel_smc_nand_prepare_smcconf(struct
> atmel_nand *nand,
> const struct nand_data_interface
> *conf,
> struct atmel_smc_cs_conf *smcconf)
> {
> - u32 ncycles, totalcycles, timeps, mckperiodps;
> + u32 ncycles, totalcycles, timeps, mckperiodps, pulse;
> struct atmel_nand_controller *nc;
> int ret;
>
> @@ -1259,11 +1259,16 @@ static int atmel_smc_nand_prepare_smcconf(struct
> atmel_nand *nand,
>ATMEL_SMC_MODE_TDFMODE_OPTIMIZED;
>
> /*
> - * Read pulse timing directly matches tRP:
> + * Read pulse timing would directly match tRP,
> + * but some NAND flash chips (S34ML01G2 and W29N02KVxxAF)
> + * do not work properly in timing mode 3.
> + * The workaround is to extend the SMC NRD pulse to meet tREA
> + * timing.
>*
> - * NRD_PULSE = tRP
> + * NRD_PULSE = max(tRP, tREA)
>*/
> - ncycles = DIV_ROUND_UP(conf->timings.sdr.tRP_min, mckperiodps);
> + pulse = max(conf->timings.sdr.tRP_min, conf->timings.sdr.tREA_max);
> + ncycles = DIV_ROUND_UP(pulse, mckperiodps);
> totalcycles += ncycles;
> ret = atmel_smc_cs_conf_set_pulse(smcconf, ATMEL_SMC_NRD_SHIFT,
> ncycles);
> --
> 2.39.2
>
--
Alexander Dahl Thorsis Technologies GmbH T +49 391 544 563 1000
Industrieautomation Oststr. 18 F +49 391 544 563 9099
T +49 391 544 563 3036 39114 Magdeburg https://www.thorsis.com/
Sitz der Gesellschaft: Magdeburg
Amtsgericht Stendal HRB 30646
Geschäftsführer: Dipl.-Inf. Michael Huschke
[PATCH v2] clk: Revise help text for clk_get_parent_rate()
The function returns the rate of the parent clock, the previous text
made no sense at all.
Fixes: 4aa78300a025 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Alexander Dahl
Reviewed-by: Sean Anderson
---
Notes:
v2:
- Collected tags
include/clk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/clk.h b/include/clk.h
index af23e4f3475..045e923a529 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -444,7 +444,7 @@ ulong clk_get_rate(struct clk *clk);
struct clk *clk_get_parent(struct clk *clk);
/**
- * clk_get_parent_rate() - Get parent of current clock rate.
+ * clk_get_parent_rate() - Get rate of current clock's parent.
* @clk: A clock struct that was previously successfully requested by
* clk_request/get_by_*().
*
base-commit: c92d48f8b2909d08584f17612a23d959467f14b8
--
2.39.2
[PATCH v3 3/3] mtd: nand: raw: atmel: Fix pulse read timing for certain NAND flashes
>From reading the S34ML02G1 and the SAM9X60 datasheets again, it seems
like we have to wait tREA after rising RE# before sampling the data.
Thus pulse time must be at least tREA.
Without this fix we got PMECC errors when reading, after switching to
ONFI timing mode 3 on SAM9X60 SoC with S34ML02G1 raw NAND flash chip.
The approach to set timings used before worked on sam9g20 and sama5d2
with the same flash (S34ML02G1), probably because those have a slower
mck clock rate and thus the resolution of the timings setup is not as
tight as with sam9x60.
The approach to fix the issue was carried over from at91bootstrap, and
has been successfully tested in at91bootstrap, U-Boot and Linux.
Link: https://github.com/linux4sam/at91bootstrap/issues/174
Cc: Li Bin
Signed-off-by: Alexander Dahl
---
Notes:
v3:
- initial patch version (not present in v1 and v2)
drivers/mtd/nand/raw/atmel/nand-controller.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index bbafc88e44c..00ffeadd113 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1133,7 +1133,7 @@ static int atmel_smc_nand_prepare_smcconf(struct
atmel_nand *nand,
const struct nand_data_interface
*conf,
struct atmel_smc_cs_conf *smcconf)
{
- u32 ncycles, totalcycles, timeps, mckperiodps;
+ u32 ncycles, totalcycles, timeps, mckperiodps, pulse;
struct atmel_nand_controller *nc;
int ret;
@@ -1259,11 +1259,16 @@ static int atmel_smc_nand_prepare_smcconf(struct
atmel_nand *nand,
ATMEL_SMC_MODE_TDFMODE_OPTIMIZED;
/*
-* Read pulse timing directly matches tRP:
+* Read pulse timing would directly match tRP,
+* but some NAND flash chips (S34ML01G2 and W29N02KVxxAF)
+* do not work properly in timing mode 3.
+* The workaround is to extend the SMC NRD pulse to meet tREA
+* timing.
*
-* NRD_PULSE = tRP
+* NRD_PULSE = max(tRP, tREA)
*/
- ncycles = DIV_ROUND_UP(conf->timings.sdr.tRP_min, mckperiodps);
+ pulse = max(conf->timings.sdr.tRP_min, conf->timings.sdr.tREA_max);
+ ncycles = DIV_ROUND_UP(pulse, mckperiodps);
totalcycles += ncycles;
ret = atmel_smc_cs_conf_set_pulse(smcconf, ATMEL_SMC_NRD_SHIFT,
ncycles);
--
2.39.2
[PATCH v3 2/3] cmd: nand: Add new optional sub-command 'onfi'
Override the ONFI timing mode at runtime.
Signed-off-by: Alexander Dahl
---
Notes:
v3:
- no changes to this patch
v2:
- initial patch version (not present in v1)
cmd/Kconfig | 10 ++
cmd/nand.c | 61
drivers/mtd/nand/raw/nand_base.c | 2 +-
include/linux/mtd/rawnand.h | 1 +
4 files changed, 73 insertions(+), 1 deletion(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8eeb99eea5e..5dc47bd3f51 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1382,6 +1382,7 @@ config CMD_NAND
NAND support.
if CMD_NAND
+
config CMD_NAND_TRIMFFS
bool "nand write.trimffs"
default y if ARCH_SUNXI
@@ -1398,6 +1399,15 @@ config CMD_NAND_TORTURE
help
NAND torture support.
+config CMD_NAND_ONFI
+ bool "nand onfi"
+ help
+ Set ONFI timing modes explicitly.
+ This is a debugging command to switch to slower ONFI timing
+ modes for testing.
+ In normal operation determining the timing mode automatically
+ should work fine, and you don't need this.
+
endif # CMD_NAND
config CMD_NVME
diff --git a/cmd/nand.c b/cmd/nand.c
index fe834c4ac5c..2b83a5ad1b8 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -494,6 +494,48 @@ static void adjust_size_for_badblocks(loff_t *size, loff_t
offset, int dev)
}
}
+#ifdef CONFIG_CMD_NAND_ONFI
+static int do_nand_onfi(struct mtd_info *mtd, int mode)
+{
+ struct nand_chip *chip;
+ int ret;
+ int i;
+
+ if (mtd->type != MTD_NANDFLASH) {
+ printf("MTD device is no NAND flash!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ chip = mtd_to_nand(mtd);
+
+ if (mode < 0) {
+ printf("Reporting current ONFI settings not yet supported!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = onfi_init_data_interface(chip, chip->data_interface,
+ NAND_SDR_IFACE, mode);
+ if (ret) {
+ printf("onfi_init_data_interface() for mode %d failed with
error %d\n",
+ mode, ret);
+ return CMD_RET_FAILURE;
+ }
+
+ for (i = 0; i < chip->numchips; i++) {
+ chip->select_chip(mtd, i);
+ ret = nand_setup_data_interface(chip, i);
+ chip->select_chip(mtd, -1);
+ if (ret) {
+ printf("nand_setup_data_interface() for mode %d failed
with error %d\n",
+ mode, ret);
+ return CMD_RET_FAILURE;
+ }
+ }
+
+ return CMD_RET_SUCCESS;
+}
+#endif
+
static int do_nand(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -919,6 +961,21 @@ static int do_nand(struct cmd_tbl *cmdtp, int flag, int
argc,
}
#endif
+#ifdef CONFIG_CMD_NAND_ONFI
+ /*
+* Syntax is:
+* 01 2
+* nand onfi [mode]
+*/
+ if (strcmp(cmd, "onfi") == 0) {
+ int mode = -1;
+
+ if (argc > 2)
+ mode = dectoul(argv[2], NULL);
+ return do_nand_onfi(mtd, mode);
+ }
+#endif
+
usage:
return CMD_RET_USAGE;
}
@@ -961,6 +1018,10 @@ U_BOOT_LONGHELP(nand,
"bring nand to lock state or display locked pages\n"
"nand unlock[.allexcept] [offset] [size] - unlock section"
#endif
+#ifdef CONFIG_CMD_NAND_ONFI
+ "\n"
+ "nand onfi [mode] - set ONFI mode\n"
+#endif
#ifdef CONFIG_ENV_OFFSET_OOB
"\n"
"nand env.oob - environment offset in OOB of block 0 of"
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 688d17ba3c2..2384425a746 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -983,7 +983,7 @@ static int nand_onfi_set_timings(struct mtd_info *mtd,
struct nand_chip *chip)
*
* Returns 0 for success or negative error code otherwise.
*/
-static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
+int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
{
struct mtd_info *mtd = nand_to_mtd(chip);
int ret;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 4abaf4734cf..07bc4cc9051 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1315,6 +1315,7 @@ void nand_write_buf16(struct mtd_info *mtd, const uint8_t
*buf, int len);
void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
uint8_t nand_read_byte(struct mtd_info *mtd);
+int nand_setup_data_interface(struct nand_chip *chip, int chipnr);
/* get timing characteristics from ONFI timing mode. */
const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode);
--
2.39.2
[PATCH v3 1/3] mtd: nand: raw: atmel: Introduce optional debug commands
For now adds one new command 'hsmc' with a single subcommand 'decode' to
read and display the content of the registers of the Static Memory
Controllers (SMC/HSMC) found in different at91 SoCs. Needed to get a
better picture on what raw nand core and atmel nand controller driver
try to set as timings based on ONFI parameters of the connected NAND
chip.
Tested on SAMA5D2 and SAM9X60 based boards. Example output:
U-Boot> hsmc decode
MCK rate: 200 MHz
SMC_SETUP3: 0x0002
SMC_PULSE3: 0x06030703
SMC_CYCLE3: 0x00060007
SMC_MODE3: 0x001f0003
NCS_RD: setup: 0 (0 ns), pulse: 6 (30 ns), hold: 0 (0 ns), cycle: 6 (30 ns)
NRD: setup: 0 (0 ns), pulse: 3 (15 ns), hold: 3 (15 ns), cycle: 6 (30 ns)
NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns)
NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 (35
ns)
Standard read applied
TDF optimization enabled
TDF cycles: 15 (75 ns)
Data Bus Width: 8-bit bus
NWAIT Mode: 0
Write operation controlled by NWE signal
Read operation controlled by NRD signal
Signed-off-by: Alexander Dahl
Tested-by: Mihai Sain
---
Notes:
v3:
- no changes to this patch
v2:
- Use SMC register definitions
- Implement atmel_hsmc_print_timings()
- Improve hsmc command output
- Collected tags
v1:
- initial patch version
drivers/mtd/nand/raw/Kconfig | 9 +
drivers/mtd/nand/raw/atmel/nand-controller.c | 295 +++
2 files changed, 304 insertions(+)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 9f3f1267cbd..1c0084fd521 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -50,12 +50,21 @@ config SYS_NAND_NO_SUBPAGE_WRITE
config DM_NAND_ATMEL
bool "Support Atmel NAND controller with DM support"
+ select MFD_ATMEL_SMC
select SYS_NAND_SELF_INIT
imply SYS_NAND_USE_FLASH_BBT
help
Enable this driver for NAND flash platforms using an Atmel NAND
controller.
+config CMD_NAND_ATMEL_DEBUG
+ bool "Optional debug commands for Atmel NAND controller"
+ depends on DM_NAND_ATMEL
+ help
+ Add commands for debugging internals of the Atmel NAND flash
+ controller, for example:
+ - Decode Static Memory Controller (SMC) registers
+
config NAND_ATMEL
bool "Support Atmel NAND controller"
select SYS_NAND_SELF_INIT
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index ee4ec6da587..bbafc88e44c 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -51,11 +51,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -69,6 +71,7 @@
#include
#include
#include
+#include
#include "pmecc.h"
@@ -216,6 +219,7 @@ struct atmel_nand_controller_ops {
int (*ecc_init)(struct nand_chip *chip);
int (*setup_data_interface)(struct atmel_nand *nand, int csline,
const struct nand_data_interface *conf);
+ void (*print_info)(struct atmel_nand *nand, int csline);
};
struct atmel_nand_controller_caps {
@@ -2041,12 +2045,260 @@ err:
return ret;
}
+#ifdef CONFIG_CMD_NAND_ATMEL_DEBUG
+u32 atmel_smc_decode_ncycles(u32 reg, u32 shift, u32 msbpos, u32 msbwidth, u32
msbfactor)
+{
+ /*
+* Examples:
+*
+* NRD setup length = (128 * NRD_SETUP[5] + NRD_SETUP[4:0]) clock
cycles.
+* NRD pulse length = (256 * NRD_PULSE[6] + NRD_PULSE[5:0]) clock
cycles.
+* Read cycle length = (NRD_CYCLE[8:7] * 256) + NRD_CYCLE[6:0]
clock cycles.
+*/
+
+ reg >>= shift;
+
+ u32 lsbmask = GENMASK(msbpos - 1, 0);
+ u32 msbmask = GENMASK(msbwidth - 1, 0) << msbpos;
+ u32 msb = (reg & msbmask) >> msbpos;
+ u32 lsb = (reg & lsbmask);
+
+ return msb * msbfactor + lsb;
+}
+
+static void atmel_smc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int cs)
+{
+ printf("SMC_SETUP%d: 0x%08x\n", cs, conf->setup);
+ printf("SMC_PULSE%d: 0x%08x\n", cs, conf->pulse);
+ printf("SMC_CYCLE%d: 0x%08x\n", cs, conf->cycle);
+ printf("SMC_MODE%d: 0x%08x\n", cs, conf->mode);
+}
+
+static void atmel_hsmc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int
cs)
+{
+ printf("HSMC_SETUP%d:0x%08x\n", cs, conf->setup);
+ printf("HSMC_PULSE%d:0x%08x\n", cs, conf->pulse);
+ printf("HSMC_CYCLE%d:0x%08x\n", cs, conf->cycle);
+ printf("HSMC_TIMINGS%d: 0x%08x\n", cs, conf->timings);
+
[PATCH v3 0/3] mtd: nand: raw: Collected improvements
Hello everyone, while working on NAND flash support for a custom board based on the at91 SAM9X60 SoC I stumbled over some issues in the raw nand subsystem. Some trivial patches of previous iterations of this series were already applied. Patch 1 introduces a new subcommand for the new atmel nand controller driver. Patch 2 introduces a new subcommand for the nand command to override ONFI timing mode. Both are are for debugging purposes only and thus optional, and need to be enabled through menu. Both helped me a lot when investigating issues. Patch 3 is a fix carried over from at91bootstrap for faster at91 SoCs with certain raw NAND chips. Series is based on post v2024.04 master now. Greets Alex v3: - 4 patches removed, applied to master - other 2 patches from v2 unchanged, still under test - added new third patch with a fix for atmel nand timings (forgot to send that with v2) v2: Link: https://lore.kernel.org/u-boot/20240320090214.40465-1-...@thorsis.com/ - rebased on recent next - collected tags - improved patch 4 after feedback from Mihai - added new patch 5 with another help text fix - added new patch 6 with a new debug command - reworded cover letter v1: Link: https://lore.kernel.org/u-boot/20240307091014.39796-1-...@thorsis.com/ See per patch changes in patches for more detailed changes. Alexander Dahl (3): mtd: nand: raw: atmel: Introduce optional debug commands cmd: nand: Add new optional sub-command 'onfi' mtd: nand: raw: atmel: Fix pulse read timing for certain NAND flashes cmd/Kconfig | 10 + cmd/nand.c | 61 drivers/mtd/nand/raw/Kconfig | 9 + drivers/mtd/nand/raw/atmel/nand-controller.c | 308 ++- drivers/mtd/nand/raw/nand_base.c | 2 +- include/linux/mtd/rawnand.h | 1 + 6 files changed, 386 insertions(+), 5 deletions(-) base-commit: b03b49046af5dfca599d2ce8f0aafed89b97aa91 -- 2.39.2
Re: [PATCH v2 0/6] mtd: nand: raw: Collected improvements
Hello Dario, Am Sun, Apr 14, 2024 at 03:41:38PM +0200 schrieb Dario Binacchi: > Hi Alexander, > > On Wed, Mar 20, 2024 at 10:02 AM Alexander Dahl wrote: > > > > Hello everyone, > > > > while working on NAND flash support for a custom board based on the at91 > > SAM9X60 SoC I stumbled over some issues in the raw nand subsystem. > > > > Four of six patches are minor fixes. > > > > Patch 4 introduces a new subcommand for the new atmel nand controller > > driver. Patch 6 introduces a new subcommand for the nand command to > > override ONFI timing mode. Both are are for debugging purposes only and > > thus optional, and need to be enabled through menu. Both helped me a > > lot when investigating issues. > > > > Series is based on upstream next branch, but should also apply to master > > cleanly. > > > > Greets > > Alex > > > > v1: > > > > Link: > > https://lore.kernel.org/u-boot/20240307091014.39796-1-...@thorsis.com/T/#t > > > > v2: > > > > - rebased on recent next > > - collected tags > > - improved patch 4 after feedback from Mihai > > - added new patch 5 with another help text fix > > - added new patch 6 with a new debug command > > - reworded cover letter > > > > See per patch changes in patches for more detailed changes. > > > > Alexander Dahl (6): > > mtd: nand: raw: Use macro nand_to_mtd() where appropriate > > mtd: nand: raw: Port another option flag from Linux > > mtd: nand: raw: Fix (most) Kconfig indentation > > mtd: nand: raw: atmel: Introduce optional debug commands > > mtd: nand: raw: atmel: Fix comment in timings preparation > > cmd: nand: Add new optional sub-command 'onfi' > > > > cmd/Kconfig | 10 + > > cmd/nand.c | 61 > > drivers/mtd/nand/raw/Kconfig | 115 +++ > > drivers/mtd/nand/raw/atmel/nand-controller.c | 299 ++- > > drivers/mtd/nand/raw/nand_base.c | 8 +- > > include/linux/mtd/rawnand.h | 8 + > > 6 files changed, 441 insertions(+), 60 deletions(-) > > > > > > base-commit: f048104999db28d49362201eaebfc91adb14f47c > > -- > > 2.39.2 > > > Applied to nand-next the first 4 patches. > For the others, we will conduct further testing before applying them. Thanks so far. :-) I have another fix for the atmel raw nand driver, which I forgot to send with this series. I could add it to v3. Or should I send it separately? Greets Alex
Re: [PATCH 1/1] fs: fat: convert change month correctly
Hello Heinrich,
Am Tue, Apr 09, 2024 at 08:04:56PM +0200 schrieb Heinrich Schuchardt:
> The month is stored in 5 - 8. We need to shift it by 5 bits.
>
> Cf. Microsoft FAT Specification, 2005-08-30
>
> Fixes: 13c11c665320 ("fs: fat: add file attributes to struct fs_dirent")
> Signed-off-by: Heinrich Schuchardt
> ---
> fs/fat/fat.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> index 14e53cf2d5a..2dd9d4e72dc 100644
> --- a/fs/fat/fat.c
> +++ b/fs/fat/fat.c
> @@ -1254,7 +1254,7 @@ out:
> static void __maybe_unused fat2rtc(u16 date, u16 time, struct rtc_time *tm)
> {
> tm->tm_mday = date & 0x1f;
> - tm->tm_mon = (date & 0x1e0) >> 4;
> + tm->tm_mon = (date & 0x1e0) >> 5;
> tm->tm_year = (date >> 9) + 1980;
>
> tm->tm_sec = (time & 0x1f) << 1;
Reviewed-by: Alexander Dahl
Greets
Alex
Re: [PATCH v2 6/6] cmd: nand: Add new optional sub-command 'onfi'
Hello Michael, Am Fri, Mar 22, 2024 at 12:54:27PM +0100 schrieb Michael Nazzareno Trimarchi: > HI > > On Fri, Mar 22, 2024 at 12:46 PM Alexander Dahl wrote: > > > > Hello Mihai, > > > > Am Fri, Mar 22, 2024 at 10:02:29AM + schrieb mihai.s...@microchip.com: > > > Hi Michael, > > > > > > --- > > > > > > I think this command can be really useful. > > > Let try to have more testing on more boards > > > > > > - > > > > > > I managed to test the command on sama7g54-curiosity board. > > > > Thanks for that. Nice to see it works on other variants of the SoC > > family. > > > > > I also forced timing mode 5 from controller driver > > > (conf->timings.sdr.tRC_min < 2). > > > > You did a similar thing for the sam9x75. These boards/socs seem to > > have a newer SMC / HSMC controller than sama5d2 or sam9x60? The > > driver claims all the (H)SMC incarnations do _not_ support these EDO > > modes 4 and 5. Maybe someone could have a deeper look at the > > datasheets of the newer SoCs and propose a patch to support those > > newer controllers in the atmel nand-controller driver? I guess the > > problem is the same in Linux, right? > > > > Greets > > Alex > > > > > > > > => nand onfi 0 > > > => hsmc decode > > > > > > MCK rate: 200 MHz > > > > > > HSMC_SETUP3:0x0004 > > > HSMC_PULSE3:0x140a140a > > > HSMC_CYCLE3:0x00140014 > > > HSMC_TIMINGS3: 0x880805f4 > > > HSMC_MODE3: 0x001f0003 > > > NCS_RD: setup: 0 (0 ns), pulse: 20 (100 ns), hold: 0 (0 ns), cycle: 20 > > > (100 ns) > > >NRD: setup: 0 (0 ns), pulse: 10 (50 ns), hold: 10 (50 ns), cycle: 20 > > > (100 ns) > > > NCS_WR: setup: 0 (0 ns), pulse: 20 (100 ns), hold: 0 (0 ns), cycle: 20 > > > (100 ns) > > >NWE: setup: 4 (20 ns), pulse: 10 (50 ns), hold: 6 (30 ns), cycle: 20 > > > (100 ns) > > > TDF optimization enabled > > > TDF cycles: 15 (75 ns) > > > Data Bus Width: 8-bit bus > > > NWAIT Mode: 0 > > > Write operation controlled by NWE signal > > > Read operation controlled by NRD signal > > > NFSEL (NAND Flash Selection) is set > > > OCMS (Off Chip Memory Scrambling) is disabled > > > TWB (WEN High to REN to Busy): 64 (320 ns) > > > TRR (Ready to REN Low Delay): 64 (320 ns) > > > TAR (ALE to REN Low Delay):5 (25 ns) > > > TADL (ALE to Data Start): 71 (355 ns) > > > TCLR (CLE to REN Low Delay): 4 (20 ns) > > > > > > => time nand torture 0x100 0x100 > > > > > > NAND torture: device 0 offset 0x100 size 0x100 (block size > > > 0x4) > > > Passed: 64, failed: 0 > > > > > > time: 22.638 seconds > > > > > > => nand onfi 5 > > > => hsmc decode > > > > > > MCK rate: 200 MHz > > > > > > HSMC_SETUP3:0x0001 > > > HSMC_PULSE3:0x07040502 > > > HSMC_CYCLE3:0x00070005 > > > HSMC_TIMINGS3: 0x880402f2 > > > HSMC_MODE3: 0x001f0003 > > > NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 > > > ns) > > >NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 (35 > > > ns) > > > NCS_WR: setup: 0 (0 ns), pulse: 5 (25 ns), hold: 0 (0 ns), cycle: 5 (25 > > > ns) > > >NWE: setup: 1 (5 ns), pulse: 2 (10 ns), hold: 2 (10 ns), cycle: 5 (25 > > > ns) > > > TDF optimization enabled > > > TDF cycles: 15 (75 ns) > > > Data Bus Width: 8-bit bus > > > NWAIT Mode: 0 > > > Write operation controlled by NWE signal > > > Read operation controlled by NRD signal > > > NFSEL (NAND Flash Selection) is set > > > OCMS (Off Chip Memory Scrambling) is disabled > > > TWB (WEN High to REN to Busy): 64 (320 ns) > > > TRR (Ready to REN Low Delay): 4 (20 ns) > > > TAR (ALE to REN Low Delay):2 (10 ns) > > > TADL (ALE to Data Start): 71 (355 ns) > > > TCLR (CLE to REN Low Delay): 2 (10 ns) > > > > > > => time nand torture 0x100 0x100 > > > > > > NAND torture: device 0 offset 0x100 size 0x100 (block size > > > 0x4) > > > Passed: 64, failed: 0 > > > > > > time: 11.661 seconds >
Re: [PATCH v2 6/6] cmd: nand: Add new optional sub-command 'onfi'
Hello Mihai, Am Fri, Mar 22, 2024 at 10:02:29AM + schrieb mihai.s...@microchip.com: > Hi Michael, > > --- > > I think this command can be really useful. > Let try to have more testing on more boards > > - > > I managed to test the command on sama7g54-curiosity board. Thanks for that. Nice to see it works on other variants of the SoC family. > I also forced timing mode 5 from controller driver (conf->timings.sdr.tRC_min > < 2). You did a similar thing for the sam9x75. These boards/socs seem to have a newer SMC / HSMC controller than sama5d2 or sam9x60? The driver claims all the (H)SMC incarnations do _not_ support these EDO modes 4 and 5. Maybe someone could have a deeper look at the datasheets of the newer SoCs and propose a patch to support those newer controllers in the atmel nand-controller driver? I guess the problem is the same in Linux, right? Greets Alex > > => nand onfi 0 > => hsmc decode > > MCK rate: 200 MHz > > HSMC_SETUP3:0x0004 > HSMC_PULSE3:0x140a140a > HSMC_CYCLE3:0x00140014 > HSMC_TIMINGS3: 0x880805f4 > HSMC_MODE3: 0x001f0003 > NCS_RD: setup: 0 (0 ns), pulse: 20 (100 ns), hold: 0 (0 ns), cycle: 20 (100 > ns) >NRD: setup: 0 (0 ns), pulse: 10 (50 ns), hold: 10 (50 ns), cycle: 20 (100 > ns) > NCS_WR: setup: 0 (0 ns), pulse: 20 (100 ns), hold: 0 (0 ns), cycle: 20 (100 > ns) >NWE: setup: 4 (20 ns), pulse: 10 (50 ns), hold: 6 (30 ns), cycle: 20 (100 > ns) > TDF optimization enabled > TDF cycles: 15 (75 ns) > Data Bus Width: 8-bit bus > NWAIT Mode: 0 > Write operation controlled by NWE signal > Read operation controlled by NRD signal > NFSEL (NAND Flash Selection) is set > OCMS (Off Chip Memory Scrambling) is disabled > TWB (WEN High to REN to Busy): 64 (320 ns) > TRR (Ready to REN Low Delay): 64 (320 ns) > TAR (ALE to REN Low Delay):5 (25 ns) > TADL (ALE to Data Start): 71 (355 ns) > TCLR (CLE to REN Low Delay): 4 (20 ns) > > => time nand torture 0x100 0x100 > > NAND torture: device 0 offset 0x100 size 0x100 (block size 0x4) > Passed: 64, failed: 0 > > time: 22.638 seconds > > => nand onfi 5 > => hsmc decode > > MCK rate: 200 MHz > > HSMC_SETUP3:0x0001 > HSMC_PULSE3:0x07040502 > HSMC_CYCLE3:0x00070005 > HSMC_TIMINGS3: 0x880402f2 > HSMC_MODE3: 0x001f0003 > NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns) >NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 (35 ns) > NCS_WR: setup: 0 (0 ns), pulse: 5 (25 ns), hold: 0 (0 ns), cycle: 5 (25 ns) >NWE: setup: 1 (5 ns), pulse: 2 (10 ns), hold: 2 (10 ns), cycle: 5 (25 ns) > TDF optimization enabled > TDF cycles: 15 (75 ns) > Data Bus Width: 8-bit bus > NWAIT Mode: 0 > Write operation controlled by NWE signal > Read operation controlled by NRD signal > NFSEL (NAND Flash Selection) is set > OCMS (Off Chip Memory Scrambling) is disabled > TWB (WEN High to REN to Busy): 64 (320 ns) > TRR (Ready to REN Low Delay): 4 (20 ns) > TAR (ALE to REN Low Delay):2 (10 ns) > TADL (ALE to Data Start): 71 (355 ns) > TCLR (CLE to REN Low Delay): 2 (10 ns) > > => time nand torture 0x100 0x100 > > NAND torture: device 0 offset 0x100 size 0x100 (block size 0x4) > Passed: 64, failed: 0 > > time: 11.661 seconds > > => nand info > > Device 0: nand0, sector size 256 KiB > Manufacturer MACRONIX > Model MX30LF4G28AD > Device size512 MiB > Page size 4096 b > OOB size 256 b > Erase size 262144 b > ecc strength 8 bits > ecc step size 512 b > subpagesize 4096 b > options 0x40004200 > bbt options 0x00028000 > > Best regards, > Mihai Sain
[PATCH v2 5/6] mtd: nand: raw: atmel: Fix comment in timings preparation
Introduced with commit 6a8dfd57220d ("nand: atmel: Add DM based NAND
driver") when driver was initially ported from Linux. The context
around this and especially the code itself suggests 'read' is meant
instead of write.
The fix is the same as accepted in Linux already with mainline Linux
kernel commit 1c60e027ffde ("mtd: nand: raw: atmel: Fix comment in
timings preparation").
Link:
https://lore.kernel.org/linux-mtd/20240307172835.3453880-1-miquel.ray...@bootlin.com/T/#t
Signed-off-by: Alexander Dahl
---
Notes:
v2:
- initial patch version (not present in v1)
drivers/mtd/nand/raw/atmel/nand-controller.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 75da15c157b..bbafc88e44c 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1271,7 +1271,7 @@ static int atmel_smc_nand_prepare_smcconf(struct
atmel_nand *nand,
return ret;
/*
-* The write cycle timing is directly matching tWC, but is also
+* The read cycle timing is directly matching tRC, but is also
* dependent on the setup and hold timings we calculated earlier,
* which gives:
*
--
2.39.2
[PATCH v2 4/6] mtd: nand: raw: atmel: Introduce optional debug commands
For now adds one new command 'hsmc' with a single subcommand 'decode' to
read and display the content of the registers of the Static Memory
Controllers (SMC/HSMC) found in different at91 SoCs. Needed to get a
better picture on what raw nand core and atmel nand controller driver
try to set as timings based on ONFI parameters of the connected NAND
chip.
Tested on SAMA5D2 and SAM9X60 based boards. Example output:
U-Boot> hsmc decode
MCK rate: 200 MHz
SMC_SETUP3: 0x0002
SMC_PULSE3: 0x06030703
SMC_CYCLE3: 0x00060007
SMC_MODE3: 0x001f0003
NCS_RD: setup: 0 (0 ns), pulse: 6 (30 ns), hold: 0 (0 ns), cycle: 6 (30 ns)
NRD: setup: 0 (0 ns), pulse: 3 (15 ns), hold: 3 (15 ns), cycle: 6 (30 ns)
NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns)
NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 (35
ns)
Standard read applied
TDF optimization enabled
TDF cycles: 15 (75 ns)
Data Bus Width: 8-bit bus
NWAIT Mode: 0
Write operation controlled by NWE signal
Read operation controlled by NRD signal
Signed-off-by: Alexander Dahl
Tested-by: Mihai Sain
---
Notes:
v1:
- initial patch version
v2:
- Use SMC register definitions
- Implement atmel_hsmc_print_timings()
- Improve hsmc command output
- Collected tags
drivers/mtd/nand/raw/Kconfig | 9 +
drivers/mtd/nand/raw/atmel/nand-controller.c | 295 +++
2 files changed, 304 insertions(+)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index f6644899b0a..43057aa6c5b 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -50,12 +50,21 @@ config SYS_NAND_NO_SUBPAGE_WRITE
config DM_NAND_ATMEL
bool "Support Atmel NAND controller with DM support"
+ select MFD_ATMEL_SMC
select SYS_NAND_SELF_INIT
imply SYS_NAND_USE_FLASH_BBT
help
Enable this driver for NAND flash platforms using an Atmel NAND
controller.
+config CMD_NAND_ATMEL_DEBUG
+ bool "Optional debug commands for Atmel NAND controller"
+ depends on DM_NAND_ATMEL
+ help
+ Add commands for debugging internals of the Atmel NAND flash
+ controller, for example:
+ - Decode Static Memory Controller (SMC) registers
+
config NAND_ATMEL
bool "Support Atmel NAND controller"
select SYS_NAND_SELF_INIT
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index e06523f3298..75da15c157b 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -51,11 +51,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -69,6 +71,7 @@
#include
#include
#include
+#include
#include "pmecc.h"
@@ -216,6 +219,7 @@ struct atmel_nand_controller_ops {
int (*ecc_init)(struct nand_chip *chip);
int (*setup_data_interface)(struct atmel_nand *nand, int csline,
const struct nand_data_interface *conf);
+ void (*print_info)(struct atmel_nand *nand, int csline);
};
struct atmel_nand_controller_caps {
@@ -2041,12 +2045,260 @@ err:
return ret;
}
+#ifdef CONFIG_CMD_NAND_ATMEL_DEBUG
+u32 atmel_smc_decode_ncycles(u32 reg, u32 shift, u32 msbpos, u32 msbwidth, u32
msbfactor)
+{
+ /*
+* Examples:
+*
+* NRD setup length = (128 * NRD_SETUP[5] + NRD_SETUP[4:0]) clock
cycles.
+* NRD pulse length = (256 * NRD_PULSE[6] + NRD_PULSE[5:0]) clock
cycles.
+* Read cycle length = (NRD_CYCLE[8:7] * 256) + NRD_CYCLE[6:0]
clock cycles.
+*/
+
+ reg >>= shift;
+
+ u32 lsbmask = GENMASK(msbpos - 1, 0);
+ u32 msbmask = GENMASK(msbwidth - 1, 0) << msbpos;
+ u32 msb = (reg & msbmask) >> msbpos;
+ u32 lsb = (reg & lsbmask);
+
+ return msb * msbfactor + lsb;
+}
+
+static void atmel_smc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int cs)
+{
+ printf("SMC_SETUP%d: 0x%08x\n", cs, conf->setup);
+ printf("SMC_PULSE%d: 0x%08x\n", cs, conf->pulse);
+ printf("SMC_CYCLE%d: 0x%08x\n", cs, conf->cycle);
+ printf("SMC_MODE%d: 0x%08x\n", cs, conf->mode);
+}
+
+static void atmel_hsmc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int
cs)
+{
+ printf("HSMC_SETUP%d:0x%08x\n", cs, conf->setup);
+ printf("HSMC_PULSE%d:0x%08x\n", cs, conf->pulse);
+ printf("HSMC_CYCLE%d:0x%08x\n", cs, conf->cycle);
+ printf("HSMC_TIMINGS%d: 0x%08x\n", cs, conf->timings);
+ printf("HSMC_MODE%d: 0x%08x\n&
[PATCH v2 6/6] cmd: nand: Add new optional sub-command 'onfi'
Override the ONFI timing mode at runtime.
Signed-off-by: Alexander Dahl
---
Notes:
v2:
- initial patch version (not present in v1)
cmd/Kconfig | 10 ++
cmd/nand.c | 61
drivers/mtd/nand/raw/nand_base.c | 2 +-
include/linux/mtd/rawnand.h | 1 +
4 files changed, 73 insertions(+), 1 deletion(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 61e280fb1a4..c39cc297306 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1421,6 +1421,7 @@ config CMD_NAND
NAND support.
if CMD_NAND
+
config CMD_NAND_TRIMFFS
bool "nand write.trimffs"
default y if ARCH_SUNXI
@@ -1437,6 +1438,15 @@ config CMD_NAND_TORTURE
help
NAND torture support.
+config CMD_NAND_ONFI
+ bool "nand onfi"
+ help
+ Set ONFI timing modes explicitly.
+ This is a debugging command to switch to slower ONFI timing
+ modes for testing.
+ In normal operation determining the timing mode automatically
+ should work fine, and you don't need this.
+
endif # CMD_NAND
config CMD_NVME
diff --git a/cmd/nand.c b/cmd/nand.c
index fe834c4ac5c..2b83a5ad1b8 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -494,6 +494,48 @@ static void adjust_size_for_badblocks(loff_t *size, loff_t
offset, int dev)
}
}
+#ifdef CONFIG_CMD_NAND_ONFI
+static int do_nand_onfi(struct mtd_info *mtd, int mode)
+{
+ struct nand_chip *chip;
+ int ret;
+ int i;
+
+ if (mtd->type != MTD_NANDFLASH) {
+ printf("MTD device is no NAND flash!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ chip = mtd_to_nand(mtd);
+
+ if (mode < 0) {
+ printf("Reporting current ONFI settings not yet supported!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = onfi_init_data_interface(chip, chip->data_interface,
+ NAND_SDR_IFACE, mode);
+ if (ret) {
+ printf("onfi_init_data_interface() for mode %d failed with
error %d\n",
+ mode, ret);
+ return CMD_RET_FAILURE;
+ }
+
+ for (i = 0; i < chip->numchips; i++) {
+ chip->select_chip(mtd, i);
+ ret = nand_setup_data_interface(chip, i);
+ chip->select_chip(mtd, -1);
+ if (ret) {
+ printf("nand_setup_data_interface() for mode %d failed
with error %d\n",
+ mode, ret);
+ return CMD_RET_FAILURE;
+ }
+ }
+
+ return CMD_RET_SUCCESS;
+}
+#endif
+
static int do_nand(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -919,6 +961,21 @@ static int do_nand(struct cmd_tbl *cmdtp, int flag, int
argc,
}
#endif
+#ifdef CONFIG_CMD_NAND_ONFI
+ /*
+* Syntax is:
+* 01 2
+* nand onfi [mode]
+*/
+ if (strcmp(cmd, "onfi") == 0) {
+ int mode = -1;
+
+ if (argc > 2)
+ mode = dectoul(argv[2], NULL);
+ return do_nand_onfi(mtd, mode);
+ }
+#endif
+
usage:
return CMD_RET_USAGE;
}
@@ -961,6 +1018,10 @@ U_BOOT_LONGHELP(nand,
"bring nand to lock state or display locked pages\n"
"nand unlock[.allexcept] [offset] [size] - unlock section"
#endif
+#ifdef CONFIG_CMD_NAND_ONFI
+ "\n"
+ "nand onfi [mode] - set ONFI mode\n"
+#endif
#ifdef CONFIG_ENV_OFFSET_OOB
"\n"
"nand env.oob - environment offset in OOB of block 0 of"
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 688d17ba3c2..2384425a746 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -983,7 +983,7 @@ static int nand_onfi_set_timings(struct mtd_info *mtd,
struct nand_chip *chip)
*
* Returns 0 for success or negative error code otherwise.
*/
-static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
+int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
{
struct mtd_info *mtd = nand_to_mtd(chip);
int ret;
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 4abaf4734cf..07bc4cc9051 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -1315,6 +1315,7 @@ void nand_write_buf16(struct mtd_info *mtd, const uint8_t
*buf, int len);
void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
uint8_t nand_read_byte(struct mtd_info *mtd);
+int nand_setup_data_interface(struct nand_chip *chip, int chipnr);
/* get timing characteristics from ONFI timing mode. */
const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode);
--
2.39.2
[PATCH v2 2/6] mtd: nand: raw: Port another option flag from Linux
Introduced in upstream Linux with commit 7a08dbaedd365 for release v5.0.
When the new atmel nand driver was backported to U-Boot with commit
6a8dfd57220d ("nand: atmel: Add DM based NAND driver") that definition
was added to the driver instead of the header file. Move it over to the
other definitions with the same help text it has in Linux.
Code actually using this has not been ported over to raw nand base yet.
Signed-off-by: Alexander Dahl
Reviewed-by: Michael Trimarchi
---
Notes:
v1:
- initial patch version
v2:
- collected tags
drivers/mtd/nand/raw/atmel/nand-controller.c | 2 --
include/linux/mtd/rawnand.h | 7 +++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 0e0441472b8..e06523f3298 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1429,8 +1429,6 @@ static int atmel_nand_setup_data_interface(struct
mtd_info *mtd, int csline,
return nc->caps->ops->setup_data_interface(nand, csline, conf);
}
-#define NAND_KEEP_TIMINGS 0x0080
-
static void atmel_nand_init(struct atmel_nand_controller *nc,
struct atmel_nand *nand)
{
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index fb002ae6411..4abaf4734cf 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -249,6 +249,13 @@ enum nand_ecc_algo {
*/
#define NAND_USE_BOUNCE_BUFFER 0x0010
+/*
+ * Do not try to tweak the timings at runtime. This is needed when the
+ * controller initializes the timings on itself or when it relies on
+ * configuration done by the bootloader.
+ */
+#define NAND_KEEP_TIMINGS 0x0080
+
/* Options set by nand scan */
/* bbt has already been read */
#define NAND_BBT_SCANNED 0x4000
--
2.39.2
[PATCH v2 1/6] mtd: nand: raw: Use macro nand_to_mtd() where appropriate
In every other place in this file the macro is used, make it consistent.
Fixes: 9d1806fadc24 ("mtd: nand: Get rid of mtd variable in function calls")
Signed-off-by: Alexander Dahl
Reviewed-by: Michael Trimarchi
---
Notes:
v1:
- initial patch version
v2:
- collected tags
drivers/mtd/nand/raw/nand_base.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index c40a0f23d7b..688d17ba3c2 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4118,7 +4118,7 @@ static int nand_get_bits_per_cell(u8 cellinfo)
*/
void nand_decode_ext_id(struct nand_chip *chip)
{
- struct mtd_info *mtd = >mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
int extid;
/* The 3rd id byte holds MLC / multichip data */
chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
@@ -4185,7 +4185,7 @@ static int nand_manufacturer_init(struct nand_chip *chip)
*/
static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
{
- struct mtd_info *mtd = >mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
mtd->erasesize = type->erasesize;
mtd->writesize = type->pagesize;
@@ -4265,7 +4265,7 @@ static const struct nand_manufacturer
*nand_get_manufacturer_desc(u8 id)
int nand_detect(struct nand_chip *chip, int *maf_id,
int *dev_id, struct nand_flash_dev *type)
{
- struct mtd_info *mtd = >mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
const struct nand_manufacturer *manufacturer_desc;
int busw, ret;
u8 *id_data = chip->id.data;
--
2.39.2
[PATCH v2 0/6] mtd: nand: raw: Collected improvements
Hello everyone, while working on NAND flash support for a custom board based on the at91 SAM9X60 SoC I stumbled over some issues in the raw nand subsystem. Four of six patches are minor fixes. Patch 4 introduces a new subcommand for the new atmel nand controller driver. Patch 6 introduces a new subcommand for the nand command to override ONFI timing mode. Both are are for debugging purposes only and thus optional, and need to be enabled through menu. Both helped me a lot when investigating issues. Series is based on upstream next branch, but should also apply to master cleanly. Greets Alex v1: Link: https://lore.kernel.org/u-boot/20240307091014.39796-1-...@thorsis.com/T/#t v2: - rebased on recent next - collected tags - improved patch 4 after feedback from Mihai - added new patch 5 with another help text fix - added new patch 6 with a new debug command - reworded cover letter See per patch changes in patches for more detailed changes. Alexander Dahl (6): mtd: nand: raw: Use macro nand_to_mtd() where appropriate mtd: nand: raw: Port another option flag from Linux mtd: nand: raw: Fix (most) Kconfig indentation mtd: nand: raw: atmel: Introduce optional debug commands mtd: nand: raw: atmel: Fix comment in timings preparation cmd: nand: Add new optional sub-command 'onfi' cmd/Kconfig | 10 + cmd/nand.c | 61 drivers/mtd/nand/raw/Kconfig | 115 +++ drivers/mtd/nand/raw/atmel/nand-controller.c | 299 ++- drivers/mtd/nand/raw/nand_base.c | 8 +- include/linux/mtd/rawnand.h | 8 + 6 files changed, 441 insertions(+), 60 deletions(-) base-commit: f048104999db28d49362201eaebfc91adb14f47c -- 2.39.2
[PATCH v2 3/6] mtd: nand: raw: Fix (most) Kconfig indentation
One tab in general. One tab plus two spaces for help text. Signed-off-by: Alexander Dahl Reviewed-by: Michael Trimarchi --- Notes: v1: - initial patch version v2: - collected tags drivers/mtd/nand/raw/Kconfig | 106 +-- 1 file changed, 53 insertions(+), 53 deletions(-) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index bb9994b8626..f6644899b0a 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -1,6 +1,6 @@ - menuconfig MTD_RAW_NAND bool "Raw NAND Device Support" + if MTD_RAW_NAND config SYS_NAND_SELF_INIT @@ -49,12 +49,12 @@ config SYS_NAND_NO_SUBPAGE_WRITE depends on NAND_ARASAN || NAND_DAVINCI || NAND_KIRKWOOD config DM_NAND_ATMEL - bool "Support Atmel NAND controller with DM support" - select SYS_NAND_SELF_INIT - imply SYS_NAND_USE_FLASH_BBT - help - Enable this driver for NAND flash platforms using an Atmel NAND - controller. + bool "Support Atmel NAND controller with DM support" + select SYS_NAND_SELF_INIT + imply SYS_NAND_USE_FLASH_BBT + help + Enable this driver for NAND flash platforms using an Atmel NAND + controller. config NAND_ATMEL bool "Support Atmel NAND controller" @@ -133,35 +133,35 @@ config NAND_BRCMNAND_6753 Enable support for broadcom nand driver on bcm6753. config NAND_BRCMNAND_68360 - bool "Support Broadcom NAND controller on bcm68360" - depends on NAND_BRCMNAND && BCM6856 - help - Enable support for broadcom nand driver on bcm68360. + bool "Support Broadcom NAND controller on bcm68360" + depends on NAND_BRCMNAND && BCM6856 + help + Enable support for broadcom nand driver on bcm68360. config NAND_BRCMNAND_6838 - bool "Support Broadcom NAND controller on bcm6838" - depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 - help - Enable support for broadcom nand driver on bcm6838. + bool "Support Broadcom NAND controller on bcm6838" + depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 + help + Enable support for broadcom nand driver on bcm6838. config NAND_BRCMNAND_6858 - bool "Support Broadcom NAND controller on bcm6858" - depends on NAND_BRCMNAND && BCM6858 - help - Enable support for broadcom nand driver on bcm6858. + bool "Support Broadcom NAND controller on bcm6858" + depends on NAND_BRCMNAND && BCM6858 + help + Enable support for broadcom nand driver on bcm6858. config NAND_BRCMNAND_63158 - bool "Support Broadcom NAND controller on bcm63158" - depends on NAND_BRCMNAND && BCM63158 - help - Enable support for broadcom nand driver on bcm63158. + bool "Support Broadcom NAND controller on bcm63158" + depends on NAND_BRCMNAND && BCM63158 + help + Enable support for broadcom nand driver on bcm63158. config NAND_BRCMNAND_IPROC - bool "Support Broadcom NAND controller on the iproc family" - depends on NAND_BRCMNAND - help - Enable support for broadcom nand driver on the Broadcom - iproc family such as Northstar (BCM5301x, BCM4708...) + bool "Support Broadcom NAND controller on the iproc family" + depends on NAND_BRCMNAND + help + Enable support for broadcom nand driver on the Broadcom + iproc family such as Northstar (BCM5301x, BCM4708...) config NAND_DAVINCI bool "Support TI Davinci NAND controller" @@ -413,10 +413,10 @@ config NAND_VF610_NFC if NAND_VF610_NFC config NAND_VF610_NFC_DT -bool "Support Vybrid's vf610 NAND controller as a DT device" -depends on OF_CONTROL && DM_MTD -help - Enable the driver for Vybrid's vf610 NAND flash on platforms + bool "Support Vybrid's vf610 NAND controller as a DT device" + depends on OF_CONTROL && DM_MTD + help + Enable the driver for Vybrid's vf610 NAND flash on platforms using device tree. choice @@ -472,11 +472,11 @@ config NAND_SUNXI select SPL_NAND_SUPPORT select SPL_SYS_NAND_SELF_INIT imply CMD_NAND - ---help--- - Enable support for NAND. This option enables the standard and - SPL drivers. - The SPL driver only supports reading from the NAND using DMA - transfers. + help + Enable support for NAND. This option enables the standard and + SPL drivers. + The SPL driver only supports reading from the NAND using DMA + transfers. if NAND_SUNXI @@ -577,16 +577,16
Re: [PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
Hello everyone,
Am Mon, Mar 18, 2024 at 11:15:18AM + schrieb mihai.s...@microchip.com:
>
> > The command is very useful.
> > I would like to have also the ONFI timing mode printed for nand-flash
> >
>
> As far as I can see the actually set mode is not stored anywhere. One could
> print it after it was successfully set, but that would be in nand base, not
> in the atmel driver.
>
> OK. Understood.
> Thanks.
>
> > Also I recommend to print the master clock in MHz, and to print the master
> > clock name/label from ccf driver:
> > https://github.com/u-boot/u-boot/blob/master/drivers/clk/at91/sama7g5.
> > c#L410
>
> Should be possible. I could do this and send a v2?
>
> Yes Please
> Also please note that older SAM9/SAMA5 series have no ccf drivers ☹
> Only SAM9X6+ and SAMA7 series have ccf
Okay I thought this would be easy, but it seems not. This is what I
came up with:
-printf("mck clock rate: %lu\n", clk_get_rate(nc->mck));
+printf("%s rate: %lu MHz\n",
+ nc->mck->dev->name ? nc->mck->dev->name : "mck clock",
+ clk_get_rate(nc->mck) / 100);
And this is the output on sam9x60 with CONFIG_CLK_CCF enabled:
pmc@fc00 rate: 200 MHz
The corresponding line from `clk dump` is:
25| | | `-- mck_div
That name, I don't get it where to get that one.
Greets
Alex
> Thanks.
>
>
> Greets
> Alex
>
> >
> > Tested-by: Mihai Sain
> >
> > Best regards,
> > Mihai Sain
Re: [PATCH] cmd: nand: Add support to print the manufacturer, model and size
Hello Mihai,
adding the raw nand maintainers to Cc, maybe cmd/nand.c should be
added to MAINTAINERS file section raw nand? See my comments below.
Am Mon, Mar 18, 2024 at 02:26:47PM +0200 schrieb Mihai Sain:
> Add support to nand info for printing the manufacturer,model and size.
>
> U-Boot> nand info
>
> Device 0: nand0, sector size 256 KiB
> Manufacturer MACRONIX
> Model MX30LF4G28AD
> Device size512 MiB
> Page size 4096 b
> OOB size 256 b
> Erase size 262144 b
> ecc strength 8 bits
> ecc step size 512 b
> subpagesize 4096 b
> options 0x4200
> bbt options 0x00028000
Tested here:
Device 0: nand0, sector size 128 KiB
Manufacturer SPANSION
Model S34ML02G1
Device size256 MiB
Page size 2048 b
OOB size64 b
Erase size 131072 b
ecc strength 8 bits
ecc step size 512 b
subpagesize 2048 b
options 0x40004200
bbt options 0x00028000
> Signed-off-by: Mihai Sain
> ---
> cmd/nand.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/cmd/nand.c b/cmd/nand.c
> index fe834c4ac5..f5cfaab37c 100644
> --- a/cmd/nand.c
> +++ b/cmd/nand.c
> @@ -418,6 +418,9 @@ static void nand_print_and_set_info(int idx)
> printf("%dx ", chip->numchips);
> printf("%s, sector size %u KiB\n",
> mtd->name, mtd->erasesize >> 10);
> + printf(" Manufacturer %s \n", chip->onfi_params.manufacturer);
> + printf(" Model %s \n", chip->onfi_params.model);
This probably only works for ONFI flash and might fail otherwise. See
this code in nand_base.c:
https://elixir.bootlin.com/u-boot/v2024.01/source/drivers/mtd/nand/raw/nand_base.c#L4455
The manufacturer could always be printed from struct nand_chip
->manufacturer.desc.name here.
Don't know if the third fallback for model ("type->name") is somehow
accessible after nand_detect() but I would at least test on
chip->onfi_version or chip->jedec_version here, and maybe just drop
the model line if none is set.
> + printf(" Device size %8d MiB\n", (int)(chip->chipsize >> 20));
Fine.
Greets
Alex
> printf(" Page size %8d b\n", mtd->writesize);
> printf(" OOB size %8d b\n", mtd->oobsize);
> printf(" Erase size%8d b\n", mtd->erasesize);
> --
> 2.44.0
>
Re: [PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
'm very interested !
Okay, I'll add it to v2 of the series then.
> Maybe we should add an automatic fallback for timing mode in
> nand-controller.c
> As of now the driver is forcing tRC_min to 30ns (mode 3), which is not
> reliable for sama7 nfc controller ☹
>
> https://github.com/u-boot/u-boot/blob/master/drivers/mtd/nand/raw/nand_timings.c#L167
> The nand torture command helped me to manually force tRC_min to 35ns
> (mode 2).
This sounds like the same problem encountered in
https://github.com/linux4sam/at91bootstrap/issues/174 and the fix
proposed there works in Linux and U-Boot as well. I consider the
original commit message of the patch attached to that ticket not easy
to understand however, so I wrote what I think is the problem. Could
you please test the patch attached to this mail which does the same
thing and should apply to U-Boot cleanly? I tested that on sam9x60
and sama5, but have no other boards/socs to test with. If that works
on sama7, I will propose it on U-Boot, too.
(I hope it is okay to attach it as an attachment for now, it's not
ready for submission anyways.)
Greets
Alex
> Thanks.
>
> Greets
> Alex
>
> >
> > Note: I'm currently testing a patch changing the computation of the read
> > pulse cycles based on a patch for at91bootstrap [1], but that is not
> > applied here for the output quoted above.
> >
> > Greets
> > Alex
> >
> > [1]
> > https://github.com/linux4sam/at91bootstrap/issues/174#issuecomment-197
> > 0698527
> >
> > >
> > > Best regards,
> > > Mihai Sain
>From 3ab90ab8a817c79013c6d57d5ac4e52d5242295e Mon Sep 17 00:00:00 2001
From: Alexander Dahl
Date: Tue, 12 Mar 2024 13:41:04 +0100
Subject: [PATCH] mtd: nand: raw: atmel: Port timing fix from at91bootstrap
>From reading the S34ML02G1 and the SAM9X60 datasheets again, it seems
like we have to wait tREA after rising RE# before sampling the data.
Thus pulse must be at least tREA. The fix works in bootstrap, u-boot,
and Linux, but the explanation might be improved. It probably worked on
sam9g20 and sama5d2 before, because those have a slower mck clock rate
and thus the resolution of the timings setup is not as tight as with
sam9x60.
Without the fix we got PMECC errors when reading after switching to ONFI
timing mode 3.
Link: https://github.com/linux4sam/at91bootstrap/issues/174
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 4b6c9a79306..405987acd51 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1168,7 +1168,7 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
const struct nand_data_interface *conf,
struct atmel_smc_cs_conf *smcconf)
{
- u32 ncycles, totalcycles, timeps, mckperiodps;
+ u32 ncycles, totalcycles, timeps, mckperiodps, pulse;
struct atmel_nand_controller *nc;
int ret;
@@ -1294,11 +1294,16 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
ATMEL_SMC_MODE_TDFMODE_OPTIMIZED;
/*
- * Read pulse timing directly matches tRP:
+ * Read pulse timing would directly match tRP,
+ * but some NAND flash chips (S34ML01G2 and W29N02KVxxAF)
+ * do not work properly in timing mode 3.
+ * The workaround is to extend the SMC NRD pulse to meet tREA
+ * timing.
*
- * NRD_PULSE = tRP
+ * NRD_PULSE = max(tRP, tREA)
*/
- ncycles = DIV_ROUND_UP(conf->timings.sdr.tRP_min, mckperiodps);
+ pulse = max(conf->timings.sdr.tRP_min, conf->timings.sdr.tREA_max);
+ ncycles = DIV_ROUND_UP(pulse, mckperiodps);
totalcycles += ncycles;
ret = atmel_smc_cs_conf_set_pulse(smcconf, ATMEL_SMC_NRD_SHIFT,
ncycles);
--
2.39.2
Re: [PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
Hello Mihai,
Am Mon, Mar 18, 2024 at 09:07:09AM + schrieb mihai.s...@microchip.com:
> > U-Boot> nand info
> >
> > Device 0: nand0, sector size 256 KiB
> > Manufacturer MACRONIX
> > Model MX30LF4G28AD
> > Device size512 MiB
> > Page size 4096 b
> > OOB size 256 b
> > Erase size 262144 b
> > ecc strength 8 bits
> > ecc step size 512 b
> > subpagesize 4096 b
> > options 0x4200
> > bbt options 0x00028000
>
> This seems to be the same NAND chip as on the sam9x60 curiosity, but your
> output has three additional lines, see mine:
> Do you have some additional patches printing manufacturer, model, and device
> size? I can't see those lines printed in
> nand_print_and_set_info() here.
>
> Yes. I have
> + printf(" Manufacturer %s \n", chip->onfi_params.manufacturer);
> + printf(" Model %s \n", chip->onfi_params.model);
> + printf(" Device size %8d MiB\n", (int)(chip->chipsize >> 20));
This is nice, and I think it would be valuable to have upstream.
Maybe you could send a patch for that?
> > U-Boot> hsmc decode
> >
> > mck clock rate: 2
> >
> > HSMC_SETUP3:0x0001
> > HSMC_PULSE3:0x07040804
> > HSMC_CYCLE3:0x00070008
> > HSMC_TIMINGS3: 0x880402f2
> > HSMC_MODE3: 0x001f0003
> > NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns)
> >NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7
> > (35 ns)
> > NCS_WR: setup: 0 (0 ns), pulse: 8 (40 ns), hold: 0 (0 ns), cycle: 8 (40 ns)
> >NWE: setup: 1 (5 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 8
> > (40 ns) TDF optimization enabled TDF cycles: 15 (75 ns) Data Bus
> > Width: 8-bit bus NWAIT Mode: 0 Write operation controlled by NWE
> > signal Read operation controlled by NRD signal
>
> This is also interesting. Given the mck clock rate is the same as on
> sam9x60, I would have guessed the timings set by
> atmel_smc_nand_prepare_smcconf() should give the same results, both for ONFI
> timiming mode 3, which is the fastest mode the (H)SMC supports according to
> comments in the driver. This is the output with the patch in question
> applied on next for sam9x60:
>
> U-Boot> hsmc decode
>
> mck clock rate: 2
>
> SMC_SETUP3: 0x0002
> SMC_PULSE3: 0x06030703
> SMC_CYCLE3: 0x00060007
> SMC_MODE3: 0x001f0003
> NCS_RD: setup: 0 (0 ns), pulse: 6 (30 ns), hold: 0 (0 ns), cycle: 6 (30
> ns)
>NRD: setup: 0 (0 ns), pulse: 3 (15 ns), hold: 3 (15 ns), cycle: 6 (30
> ns)
> NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35
> ns)
>NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 (35
> ns)
> Standard read is applied.
> TDF optimization enabled
> TDF cycles: 15 (75 ns)
> Data Bus Width: 8-bit bus
> NWAIT Mode: 0
> Write operation controlled by NWE signal
> Read operation controlled by NRD signal
>
> Notice the pulse times for read are one clock cycle smaller than in your
> output, and the timings for write are also different. Do you have changes
> for atmel_smc_nand_prepare_smcconf() applied which are not upstream yet? Or
> is the HSMC on sama7g54 somehow different than on older SoCs?
>
> Yes. I force timing mode 2 in nand-controller.c:
> + if (conf->timings.sdr.tRC_min < 30001) // force timing mode 2, 35ns for
> read/write cycle
>
> This will pass the nand torture test
>
> U-Boot> nand torture 0x80 0x100
>
> NAND torture: device 0 offset 0x80 size 0x100 (block size 0x4)
> Passed: 64, failed: 0
Ah okay. I have another patch here for manually setting the ONFI
timing mode from commandline. This is probably too late for some
scenarios, but it helped me when testing. If you're interested I
could send it to the public.
Greets
Alex
>
> Note: I'm currently testing a patch changing the computation of the read
> pulse cycles based on a patch for at91bootstrap [1], but that is not applied
> here for the output quoted above.
>
> Greets
> Alex
>
> [1]
> https://github.com/linux4sam/at91bootstrap/issues/174#issuecomment-1970698527
>
> >
> > Best regards,
> > Mihai Sain
Re: [PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
Hello Mihai, Am Mon, Mar 18, 2024 at 09:15:29AM + schrieb mihai.s...@microchip.com: > > Hi Alexander, > > > > I tested your work on sama7g54-curiosity board: > > > > U-Boot> nand info > > > > Device 0: nand0, sector size 256 KiB > > Manufacturer MACRONIX > > Model MX30LF4G28AD > > Device size512 MiB > > Page size 4096 b > > OOB size 256 b > > Erase size 262144 b > > ecc strength 8 bits > > ecc step size 512 b > > subpagesize 4096 b > > options 0x4200 > > bbt options 0x00028000 > > > > U-Boot> hsmc decode > > > > mck clock rate: 2 > > > > HSMC_SETUP3:0x0001 > > HSMC_PULSE3:0x07040804 > > HSMC_CYCLE3:0x00070008 > > HSMC_TIMINGS3: 0x880402f2 > > HSMC_MODE3: 0x001f0003 > > NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns) > >NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 > > (35 ns) > > NCS_WR: setup: 0 (0 ns), pulse: 8 (40 ns), hold: 0 (0 ns), cycle: 8 (40 ns) > >NWE: setup: 1 (5 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 8 > > (40 ns) TDF optimization enabled TDF cycles: 15 (75 ns) Data Bus > > Width: 8-bit bus NWAIT Mode: 0 Write operation controlled by NWE > > signal Read operation controlled by NRD signal > > > > Best regards, > > Mihai Sain > > Hello Mihai, > > If you have any suggestions for improvement, changes, or you are happy with > this command, is it useful ? > You can provide your Tested-by then if you consider this is useful > > Eugen > > -- > > Hello Eugen, > > Yes. > The command is very useful. > I would like to have also the ONFI timing mode printed for nand-flash As far as I can see the actually set mode is not stored anywhere. One could print it after it was successfully set, but that would be in nand base, not in the atmel driver. > Also I recommend to print the master clock in MHz, and to print the master > clock name/label from ccf driver: > https://github.com/u-boot/u-boot/blob/master/drivers/clk/at91/sama7g5.c#L410 Should be possible. I could do this and send a v2? Greets Alex > > Tested-by: Mihai Sain > > Best regards, > Mihai Sain
Re: [PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
Hello Mihai, Am Mon, Mar 18, 2024 at 08:09:00AM + schrieb mihai.s...@microchip.com: > On 3/7/24 11:10, Alexander Dahl wrote: > > For now adds one new command 'hsmc' with a single subcommand 'decode' > > to read and display the content of the registers of the Static Memory > > Controllers (SMC/HSMC) found in different at91 SoCs. Needed to get a > > better picture on what raw nand core and atmel nand controller driver > > try to set as timings based on ONFI parameters of the connected NAND > > chip. > > > > Tested on SAMA5D2 and SAM9X60 based boards. Example output: > > > > U-Boot> hsmc decode > > > > mck clock rate: 2 > > > > SMC_SETUP3: 0x0002 > > SMC_PULSE3: 0x07040703 > > SMC_CYCLE3: 0x00070007 > > SMC_MODE3: 0x001f0003 > > NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 > > ns) > >NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 > > (35 ns) > > NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 > > ns) > >NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 > > (35 ns) > > Standard read is applied. > > TDF optimization enabled > > TDF cycles: 15 (75 ns) > > Data Bus Width: 8-bit bus > > NWAIT Mode: 0 > > Write operation controlled by NWE signal > > Read operation controlled by NRD signal > > Adding Mihai as he is usually very interested in such debug information and > methods. > > - > > Hi Alexander, > > I tested your work on sama7g54-curiosity board: nice, thanks for that. > U-Boot> nand info > > Device 0: nand0, sector size 256 KiB > Manufacturer MACRONIX > Model MX30LF4G28AD > Device size512 MiB > Page size 4096 b > OOB size 256 b > Erase size 262144 b > ecc strength 8 bits > ecc step size 512 b > subpagesize 4096 b > options 0x4200 > bbt options 0x00028000 This seems to be the same NAND chip as on the sam9x60 curiosity, but your output has three additional lines, see mine: U-Boot> nand info Device 0: nand0, sector size 256 KiB Page size 4096 b OOB size 256 b Erase size 262144 b ecc strength 8 bits ecc step size 512 b subpagesize 4096 b options 0x40004200 bbt options 0x00028000 Do you have some additional patches printing manufacturer, model, and device size? I can't see those lines printed in nand_print_and_set_info() here. > U-Boot> hsmc decode > > mck clock rate: 2 > > HSMC_SETUP3:0x0001 > HSMC_PULSE3:0x07040804 > HSMC_CYCLE3:0x00070008 > HSMC_TIMINGS3: 0x880402f2 > HSMC_MODE3: 0x001f0003 > NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns) >NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 (35 ns) > NCS_WR: setup: 0 (0 ns), pulse: 8 (40 ns), hold: 0 (0 ns), cycle: 8 (40 ns) >NWE: setup: 1 (5 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 8 (40 ns) > TDF optimization enabled > TDF cycles: 15 (75 ns) > Data Bus Width: 8-bit bus > NWAIT Mode: 0 > Write operation controlled by NWE signal > Read operation controlled by NRD signal This is also interesting. Given the mck clock rate is the same as on sam9x60, I would have guessed the timings set by atmel_smc_nand_prepare_smcconf() should give the same results, both for ONFI timiming mode 3, which is the fastest mode the (H)SMC supports according to comments in the driver. This is the output with the patch in question applied on next for sam9x60: U-Boot> hsmc decode mck clock rate: 2 SMC_SETUP3: 0x0002 SMC_PULSE3: 0x06030703 SMC_CYCLE3: 0x00060007 SMC_MODE3: 0x001f0003 NCS_RD: setup: 0 (0 ns), pulse: 6 (30 ns), hold: 0 (0 ns), cycle: 6 (30 ns) NRD: setup: 0 (0 ns), pulse: 3 (15 ns), hold: 3 (15 ns), cycle: 6 (30 ns) NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns) NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 (35 ns) Standard read is applied. TDF optimization enabled TDF cycles: 15 (75 ns) Data Bus Width: 8-bit bus NWAIT Mode: 0 Write operation controlled by NWE signal Read operation controlled by NRD signal Notice the pulse times for read are one clock cycle smaller than in your output, and the timings for write are also different. Do you have changes for atmel_smc_nand_prepare_smcconf(
[RFC PATCH 1/3] ARM: dts: at91sam9260: Add modern NAND controller nodes
Required for using the new dm enabled nand-controller driver on sam9260
family based boards. Ported from Linux v6.8. Node for old NAND driver
binding kept in place for now, so we can change nan controller driver
board by board.
Signed-off-by: Alexander Dahl
---
arch/arm/dts/at91sam9260.dtsi | 47 +++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi
index 4ea4202737c..c320c82c6dd 100644
--- a/arch/arm/dts/at91sam9260.dtsi
+++ b/arch/arm/dts/at91sam9260.dtsi
@@ -99,6 +99,16 @@
reg = <0xea00 0x200>;
};
+ smc: smc@ec00 {
+ compatible = "atmel,at91sam9260-smc", "syscon";
+ reg = <0xec00 0x200>;
+ };
+
+ matrix: matrix@ee00 {
+ compatible = "atmel,at91sam9260-matrix",
"syscon";
+ reg = <0xee00 0x200>;
+ };
+
pmc: pmc@fc00 {
compatible = "atmel,at91sam9260-pmc", "syscon";
reg = <0xfc00 0x100>;
@@ -575,6 +585,16 @@
; /* PC14 gpio enable pin pull_up */
};
+
+ pinctrl_nand_rb: nand-rb-0 {
+ atmel,pins =
+ ;
+ };
+
+ pinctrl_nand_cs: nand-cs-0 {
+ atmel,pins =
+;
+ };
};
macb {
@@ -1030,6 +1050,33 @@
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
+
+ ebi: ebi@1000 {
+ compatible = "atmel,at91sam9260-ebi";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ atmel,smc = <>;
+ atmel,matrix = <>;
+ reg = <0x1000 0x8000>;
+ ranges = <0x0 0x0 0x1000 0x1000
+ 0x1 0x0 0x2000 0x1000
+ 0x2 0x0 0x3000 0x1000
+ 0x3 0x0 0x4000 0x1000
+ 0x4 0x0 0x5000 0x1000
+ 0x5 0x0 0x6000 0x1000
+ 0x6 0x0 0x7000 0x1000
+ 0x7 0x0 0x8000 0x1000>;
+ clocks = <>;
+ status = "disabled";
+
+ nand_controller: nand-controller {
+ compatible =
"atmel,at91sam9260-nand-controller";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ status = "disabled";
+ };
+ };
};
i2c@0 {
--
2.39.2
[RFC PATCH 0/3] mtd: nand: raw: atmel: Using dm driver for older sam9 SoCs
Hello raw NAND fans, today I thought it would be interesting to have all that automatic NAND flash timings setting usable with an old board featuring a at91sam9g20 SoC, which would pave the way to get rid of the old atmel raw nand driver eventually. My "let's try this quickly" ended up in "damn this took hours and now I'm stuck". Those older SoCs have no hardware ecc engine like the sama5d2 or sam9x60 have, which the Linux driver can work with. (The U-Boot driver was ported from Linux back then.) The problem is NAND flash detection fails because the atmel nand controller drivers fails on probing. In fact `atmel_nand_controller_init()` tries to set the pointer `nc->pmecc` by calling `devm_atmel_pmecc_get()`. That one probably gets a -EPROBE_DEFER returned by `atmel_pmecc_get_by_node()` and then `atmel_nand_controller_init()` returns -EPROBE_DEFER too and probing the driver fails. I suspect it should work fine if `nc->pmecc` would be NULL, but I have no idea what would be the right place to implement this. I also suspect that -EPROBE_DEFER contradicts the U-Boot driver model somehow? The raw/atmel/nand-controller driver was adapted (quite a bit) to work with U-Boot, but maybe some aspects of U-Boot driver model where not considered correctly? The attached patches are what I have so far, marked them as RFC because my actual goal of using the new dm based driver for the old SoC was not completed. Greets Alex P.S.: Patch stack based on next. Alexander Dahl (3): ARM: dts: at91sam9260: Add modern NAND controller nodes memory: atmel-ebi: Add compatible for older 9260 cores mtd: nand: raw: atmel: Remove redundant PMECC probe arch/arm/dts/at91sam9260.dtsi| 47 drivers/memory/atmel_ebi.c | 1 + drivers/mtd/nand/raw/atmel/nand-controller.c | 7 --- drivers/mtd/nand/raw/atmel/pmecc.c | 1 + 4 files changed, 49 insertions(+), 7 deletions(-) base-commit: beedf675b36841ce1e09157a87a6505317e6 -- 2.39.2
[RFC PATCH 3/3] mtd: nand: raw: atmel: Remove redundant PMECC probe
Always probing pmecc in the generic nand controller probe function and
bailing out if pmecc is missing, prevents the driver to be usable for
SoCs which do not have a pmecc hardware ecc engine like older sam9 SoCs,
for example at91sam9g20. Tested on sam9x60 that the call, which the
comment was moved to, is sufficient to probe the pmecc.
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 7 ---
drivers/mtd/nand/raw/atmel/pmecc.c | 1 +
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 0e0441472b8..b36f3a3ccac 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -2203,7 +2203,6 @@ static const struct udevice_id
atmel_nand_controller_of_ids[] = {
static int atmel_nand_controller_probe(struct udevice *dev)
{
const struct atmel_nand_controller_caps *caps;
- struct udevice *pmecc_dev;
caps = (struct atmel_nand_controller_caps *)dev_get_driver_data(dev);
if (!caps) {
@@ -2211,12 +2210,6 @@ static int atmel_nand_controller_probe(struct udevice
*dev)
return -EINVAL;
}
- /* Probe pmecc driver */
- if (uclass_get_device(UCLASS_MTD, 1, _dev)) {
- printf("%s: get device fail\n", __func__);
- return -EINVAL;
- }
-
return caps->ops->probe(dev, caps);
}
diff --git a/drivers/mtd/nand/raw/atmel/pmecc.c
b/drivers/mtd/nand/raw/atmel/pmecc.c
index 51f6bd2e65b..e500a0fe3f8 100644
--- a/drivers/mtd/nand/raw/atmel/pmecc.c
+++ b/drivers/mtd/nand/raw/atmel/pmecc.c
@@ -913,6 +913,7 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct udevice
*userdev)
ret = ofnode_parse_phandle_with_args(userdev->node_,
"ecc-engine",
NULL, 0, 0, );
+ /* Probe pmecc driver */
ret = uclass_get_device_by_ofnode(UCLASS_MTD, args.node, );
if (ret)
return NULL;
--
2.39.2
[RFC PATCH 2/3] memory: atmel-ebi: Add compatible for older 9260 cores
Required for using the new dm enabled nand controller driver on old
boards like the at91sam9g20-ek.
Signed-off-by: Alexander Dahl
---
drivers/memory/atmel_ebi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/memory/atmel_ebi.c b/drivers/memory/atmel_ebi.c
index 4739eef1b75..503e2ea707b 100644
--- a/drivers/memory/atmel_ebi.c
+++ b/drivers/memory/atmel_ebi.c
@@ -23,6 +23,7 @@ static int atmel_ebi_probe(struct udevice *dev)
}
static const struct udevice_id atmel_ebi_match[] = {
+ {.compatible = "atmel,at91sam9260-ebi"},
{.compatible = "microchip,sam9x60-ebi"},
{.compatible = "atmel,sama5d3-ebi"},
{ /* Sentinel */ }
--
2.39.2
Re: Can U-Boot create mtdparts from device tree partition info?
Hello Chuck, Am Wed, Mar 06, 2024 at 11:48:39AM -0500 schrieb Chuck Meade: > Hello, > > In looking through the source, I'm not yet seeing logic that allows U-Boot > to actually use MTD partition information found in the device tree. Does > this logic exist and I'm just missing it? Or do I need to parse the device > tree partitions manually and create the mtdparts env variable? U-Boot can use the partition information from device tree, but not with mtdparts. Try enabling CMD_MTD and run `mtd list` and you will see those partitions. > Sorry if this is obvious, I'm just not seeing it yet. Also, if the answer > is just to manually enter the mtdparts env variable, and keep it in line > with the partition information in the device tree as a manual operation, > please let me know that too. I'm just hoping there is a way to have U-Boot > get the info from the device tree automatically. You could do that, but it is probably not necessary. The 'nand' command has some nice ways to enter commands using those mtdparts labels, but the 'mtd' covers the basic features like read, write, erase too, also with names, but with a different calling syntax for the commands. Unfortunately the 'nand' command uses mtdparts only and does not work with partitions defined in DT. The 'mtd' command is organized differently and you might not find all features the 'nand' command has. Greets Alex > > Thanks very much, > Chuck
[PATCH 1/4] mtd: nand: raw: Use macro nand_to_mtd() where appropriate
In every other place in this file the macro is used, make it consistent.
Fixes: 9d1806fadc24 ("mtd: nand: Get rid of mtd variable in function calls")
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/nand_base.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index c40a0f23d7b..688d17ba3c2 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4118,7 +4118,7 @@ static int nand_get_bits_per_cell(u8 cellinfo)
*/
void nand_decode_ext_id(struct nand_chip *chip)
{
- struct mtd_info *mtd = >mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
int extid;
/* The 3rd id byte holds MLC / multichip data */
chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
@@ -4185,7 +4185,7 @@ static int nand_manufacturer_init(struct nand_chip *chip)
*/
static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
{
- struct mtd_info *mtd = >mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
mtd->erasesize = type->erasesize;
mtd->writesize = type->pagesize;
@@ -4265,7 +4265,7 @@ static const struct nand_manufacturer
*nand_get_manufacturer_desc(u8 id)
int nand_detect(struct nand_chip *chip, int *maf_id,
int *dev_id, struct nand_flash_dev *type)
{
- struct mtd_info *mtd = >mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
const struct nand_manufacturer *manufacturer_desc;
int busw, ret;
u8 *id_data = chip->id.data;
--
2.39.2
[PATCH 0/4] mtd: nand: raw: Collected improvements
Hello everyone, while working on NAND flash support for a custom board based on the at91 SAM9X60 SoC I stumbled over some issues in the raw nand subsystem. First three patches are minor fixes. Fourth patch is introducing a new subcommand for the new atmel nand controller driver, which helped me a lot when investigating issues. Series is based on upstream next branch, but should also apply to master cleanly. Greets Alex Alexander Dahl (4): mtd: nand: raw: Use macro nand_to_mtd() where appropriate mtd: nand: raw: Port another option flag from Linux mtd: nand: raw: Fix (most) Kconfig indentation mtd: nand: raw: atmel: Introduce optional debug commands drivers/mtd/nand/raw/Kconfig | 115 + drivers/mtd/nand/raw/atmel/nand-controller.c | 251 ++- drivers/mtd/nand/raw/nand_base.c | 6 +- include/linux/mtd/rawnand.h | 7 + 4 files changed, 321 insertions(+), 58 deletions(-) base-commit: 6eb682bc7ea398fad4aadb612c690884e73edc03 -- 2.39.2
[PATCH 2/4] mtd: nand: raw: Port another option flag from Linux
Introduced in upstream Linux with commit 7a08dbaedd365 for release v5.0.
When the new atmel nand driver was backported to U-Boot with commit
6a8dfd57220d ("nand: atmel: Add DM based NAND driver") that definition
was added to the driver instead of the header file. Move it over to the
other definitions with the same help text it has in Linux.
Code actually using this has not been ported over to raw nand base yet.
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 2 --
include/linux/mtd/rawnand.h | 7 +++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 0e0441472b8..e06523f3298 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1429,8 +1429,6 @@ static int atmel_nand_setup_data_interface(struct
mtd_info *mtd, int csline,
return nc->caps->ops->setup_data_interface(nand, csline, conf);
}
-#define NAND_KEEP_TIMINGS 0x0080
-
static void atmel_nand_init(struct atmel_nand_controller *nc,
struct atmel_nand *nand)
{
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index fb002ae6411..4abaf4734cf 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -249,6 +249,13 @@ enum nand_ecc_algo {
*/
#define NAND_USE_BOUNCE_BUFFER 0x0010
+/*
+ * Do not try to tweak the timings at runtime. This is needed when the
+ * controller initializes the timings on itself or when it relies on
+ * configuration done by the bootloader.
+ */
+#define NAND_KEEP_TIMINGS 0x0080
+
/* Options set by nand scan */
/* bbt has already been read */
#define NAND_BBT_SCANNED 0x4000
--
2.39.2
[PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
For now adds one new command 'hsmc' with a single subcommand 'decode' to
read and display the content of the registers of the Static Memory
Controllers (SMC/HSMC) found in different at91 SoCs. Needed to get a
better picture on what raw nand core and atmel nand controller driver
try to set as timings based on ONFI parameters of the connected NAND
chip.
Tested on SAMA5D2 and SAM9X60 based boards. Example output:
U-Boot> hsmc decode
mck clock rate: 2
SMC_SETUP3: 0x0002
SMC_PULSE3: 0x07040703
SMC_CYCLE3: 0x00070007
SMC_MODE3: 0x001f0003
NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns)
NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 (35 ns)
NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns)
NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 (35
ns)
Standard read is applied.
TDF optimization enabled
TDF cycles: 15 (75 ns)
Data Bus Width: 8-bit bus
NWAIT Mode: 0
Write operation controlled by NWE signal
Read operation controlled by NRD signal
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/Kconfig | 9 +
drivers/mtd/nand/raw/atmel/nand-controller.c | 249 +++
2 files changed, 258 insertions(+)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index f6644899b0a..43057aa6c5b 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -50,12 +50,21 @@ config SYS_NAND_NO_SUBPAGE_WRITE
config DM_NAND_ATMEL
bool "Support Atmel NAND controller with DM support"
+ select MFD_ATMEL_SMC
select SYS_NAND_SELF_INIT
imply SYS_NAND_USE_FLASH_BBT
help
Enable this driver for NAND flash platforms using an Atmel NAND
controller.
+config CMD_NAND_ATMEL_DEBUG
+ bool "Optional debug commands for Atmel NAND controller"
+ depends on DM_NAND_ATMEL
+ help
+ Add commands for debugging internals of the Atmel NAND flash
+ controller, for example:
+ - Decode Static Memory Controller (SMC) registers
+
config NAND_ATMEL
bool "Support Atmel NAND controller"
select SYS_NAND_SELF_INIT
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index e06523f3298..052d9c7b82a 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -51,11 +51,13 @@
#include
#include
+#include
#include
#include
#include
#include
#include
+#include
#include
#include
#include
@@ -69,6 +71,7 @@
#include
#include
#include
+#include
#include "pmecc.h"
@@ -216,6 +219,7 @@ struct atmel_nand_controller_ops {
int (*ecc_init)(struct nand_chip *chip);
int (*setup_data_interface)(struct atmel_nand *nand, int csline,
const struct nand_data_interface *conf);
+ void (*print_info)(struct atmel_nand *nand, int csline);
};
struct atmel_nand_controller_caps {
@@ -2041,12 +2045,214 @@ err:
return ret;
}
+#ifdef CONFIG_CMD_NAND_ATMEL_DEBUG
+u32 atmel_smc_decode_ncycles(u32 reg, u32 shift, u32 msbpos, u32 msbwidth, u32
msbfactor)
+{
+ /*
+* Examples:
+*
+* NRD setup length = (128 * NRD_SETUP[5] + NRD_SETUP[4:0]) clock
cycles.
+* NRD pulse length = (256 * NRD_PULSE[6] + NRD_PULSE[5:0]) clock
cycles.
+* Read cycle length = (NRD_CYCLE[8:7] * 256) + NRD_CYCLE[6:0]
clock cycles.
+*/
+
+ reg >>= shift;
+
+ u32 lsbmask = GENMASK(msbpos - 1, 0);
+ u32 msbmask = GENMASK(msbwidth - 1, 0) << msbpos;
+ u32 msb = (reg & msbmask) >> msbpos;
+ u32 lsb = (reg & lsbmask);
+
+ return msb * msbfactor + lsb;
+}
+
+static void atmel_smc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int cs)
+{
+ printf("SMC_SETUP%d: 0x%08x\n", cs, conf->setup);
+ printf("SMC_PULSE%d: 0x%08x\n", cs, conf->pulse);
+ printf("SMC_CYCLE%d: 0x%08x\n", cs, conf->cycle);
+ printf("SMC_MODE%d: 0x%08x\n", cs, conf->mode);
+}
+
+static void atmel_hsmc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int
cs)
+{
+ printf("HSMC_SETUP%d:0x%08x\n", cs, conf->setup);
+ printf("HSMC_PULSE%d:0x%08x\n", cs, conf->pulse);
+ printf("HSMC_CYCLE%d:0x%08x\n", cs, conf->cycle);
+ printf("HSMC_TIMINGS%d: 0x%08x\n", cs, conf->timings);
+ printf("HSMC_MODE%d: 0x%08x\n", cs, conf->mode);
+}
+
+static void atmel_smc_print_reg(const char *name, u32 setup, u32 pulse,
+ u32 cycle, u32 clk_period_ns)
+{
+ u32 hold = cycle - pulse - se
[PATCH 3/4] mtd: nand: raw: Fix (most) Kconfig indentation
One tab in general. One tab plus two spaces for help text. Signed-off-by: Alexander Dahl --- drivers/mtd/nand/raw/Kconfig | 106 +-- 1 file changed, 53 insertions(+), 53 deletions(-) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index bb9994b8626..f6644899b0a 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -1,6 +1,6 @@ - menuconfig MTD_RAW_NAND bool "Raw NAND Device Support" + if MTD_RAW_NAND config SYS_NAND_SELF_INIT @@ -49,12 +49,12 @@ config SYS_NAND_NO_SUBPAGE_WRITE depends on NAND_ARASAN || NAND_DAVINCI || NAND_KIRKWOOD config DM_NAND_ATMEL - bool "Support Atmel NAND controller with DM support" - select SYS_NAND_SELF_INIT - imply SYS_NAND_USE_FLASH_BBT - help - Enable this driver for NAND flash platforms using an Atmel NAND - controller. + bool "Support Atmel NAND controller with DM support" + select SYS_NAND_SELF_INIT + imply SYS_NAND_USE_FLASH_BBT + help + Enable this driver for NAND flash platforms using an Atmel NAND + controller. config NAND_ATMEL bool "Support Atmel NAND controller" @@ -133,35 +133,35 @@ config NAND_BRCMNAND_6753 Enable support for broadcom nand driver on bcm6753. config NAND_BRCMNAND_68360 - bool "Support Broadcom NAND controller on bcm68360" - depends on NAND_BRCMNAND && BCM6856 - help - Enable support for broadcom nand driver on bcm68360. + bool "Support Broadcom NAND controller on bcm68360" + depends on NAND_BRCMNAND && BCM6856 + help + Enable support for broadcom nand driver on bcm68360. config NAND_BRCMNAND_6838 - bool "Support Broadcom NAND controller on bcm6838" - depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 - help - Enable support for broadcom nand driver on bcm6838. + bool "Support Broadcom NAND controller on bcm6838" + depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838 + help + Enable support for broadcom nand driver on bcm6838. config NAND_BRCMNAND_6858 - bool "Support Broadcom NAND controller on bcm6858" - depends on NAND_BRCMNAND && BCM6858 - help - Enable support for broadcom nand driver on bcm6858. + bool "Support Broadcom NAND controller on bcm6858" + depends on NAND_BRCMNAND && BCM6858 + help + Enable support for broadcom nand driver on bcm6858. config NAND_BRCMNAND_63158 - bool "Support Broadcom NAND controller on bcm63158" - depends on NAND_BRCMNAND && BCM63158 - help - Enable support for broadcom nand driver on bcm63158. + bool "Support Broadcom NAND controller on bcm63158" + depends on NAND_BRCMNAND && BCM63158 + help + Enable support for broadcom nand driver on bcm63158. config NAND_BRCMNAND_IPROC - bool "Support Broadcom NAND controller on the iproc family" - depends on NAND_BRCMNAND - help - Enable support for broadcom nand driver on the Broadcom - iproc family such as Northstar (BCM5301x, BCM4708...) + bool "Support Broadcom NAND controller on the iproc family" + depends on NAND_BRCMNAND + help + Enable support for broadcom nand driver on the Broadcom + iproc family such as Northstar (BCM5301x, BCM4708...) config NAND_DAVINCI bool "Support TI Davinci NAND controller" @@ -413,10 +413,10 @@ config NAND_VF610_NFC if NAND_VF610_NFC config NAND_VF610_NFC_DT -bool "Support Vybrid's vf610 NAND controller as a DT device" -depends on OF_CONTROL && DM_MTD -help - Enable the driver for Vybrid's vf610 NAND flash on platforms + bool "Support Vybrid's vf610 NAND controller as a DT device" + depends on OF_CONTROL && DM_MTD + help + Enable the driver for Vybrid's vf610 NAND flash on platforms using device tree. choice @@ -472,11 +472,11 @@ config NAND_SUNXI select SPL_NAND_SUPPORT select SPL_SYS_NAND_SELF_INIT imply CMD_NAND - ---help--- - Enable support for NAND. This option enables the standard and - SPL drivers. - The SPL driver only supports reading from the NAND using DMA - transfers. + help + Enable support for NAND. This option enables the standard and + SPL drivers. + The SPL driver only supports reading from the NAND using DMA + transfers. if NAND_SUNXI @@ -577,16 +577,16 @@ config NAND_OCTEONTX select SYS_NAND_SELF_INIT imply CMD_NAND help -This enables
[PATCH] doc: develop: commands: Fix function prototype
When using the previous prototype you got a compiler warning like this:
warning: initialization of 'int (*)(struct cmd_tbl *, int, int, char *
const*)' from incompatible pointer type 'int (*)(struct cmd_tbl *, int, int,
const char **)' [-Wincompatible-pointer-types]
Fixes: 3d9640f55cb2 ("doc: expand README.commands")
Signed-off-by: Alexander Dahl
---
doc/develop/commands.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/develop/commands.rst b/doc/develop/commands.rst
index ede880d248c..5ad4e59c838 100644
--- a/doc/develop/commands.rst
+++ b/doc/develop/commands.rst
@@ -88,7 +88,7 @@ The command function pointer has to be of type
.. code-block:: c
-int (*cmd)(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[]);
+int (*cmd)(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
cmdtp
Table entry describing the command (see above).
base-commit: 1a66a7768af7e8106c2cd93a19f4013877fb85ae
--
2.39.2
[PATCH] clk: Revise help text for clk_get_parent_rate()
The function returns the rate of the parent clock, the previous text
made no sense at all.
Fixes: 4aa78300a025 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Alexander Dahl
---
include/clk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/clk.h b/include/clk.h
index af23e4f3475..045e923a529 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -444,7 +444,7 @@ ulong clk_get_rate(struct clk *clk);
struct clk *clk_get_parent(struct clk *clk);
/**
- * clk_get_parent_rate() - Get parent of current clock rate.
+ * clk_get_parent_rate() - Get rate of current clock's parent.
* @clk: A clock struct that was previously successfully requested by
* clk_request/get_by_*().
*
base-commit: 7bb761c42d75b2ebacc7190a76cc5385cbba1045
--
2.39.2
[PATCH] doc: dm: Fix typo
That's most probably a typo, because driver model design documents seem
to be from 2012 and there is no 2010.01 release.
Fixes: 282ed24fb3ca ("dm: MIGRATION: Add migration plan for CONFIG_DM")
Signed-off-by: Alexander Dahl
---
Notes:
This was still in an old local branch of my working copy, but it applies
cleanly to master so I guess it is still valid?! ;-)
doc/develop/driver-model/migration.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/develop/driver-model/migration.rst
b/doc/develop/driver-model/migration.rst
index 03fea943b29..b40a6af9d11 100644
--- a/doc/develop/driver-model/migration.rst
+++ b/doc/develop/driver-model/migration.rst
@@ -13,7 +13,7 @@ CONFIG_DM
* Status: In progress
* Deadline: 2020.01
-Starting with the 2010.01 release CONFIG_DM will be enabled for all boards.
+Starting with the 2020.01 release CONFIG_DM will be enabled for all boards.
This does not concern CONFIG_DM_SPL and CONFIG_DM_TPL. The conversion date for
these configuration items still needs to be defined.
base-commit: 15e7927b5a2d33666af19879577bf0c30ab088fe
--
2.39.2
Re: [PATCH v3 0/2] tools: Fix build without host OpenSSL
Hello, Am Thu, Dec 21, 2023 at 08:26:09AM +0100 schrieb Alexander Dahl: > Hei hei, > > both patches of the series got a review and this is my last work day of > the year, so I just incorporated the feedback, collected the tags, and > send this out before returning to office in January. > > Link to v2 with whole motivation text: > https://lore.kernel.org/u-boot/20231214121136.3286703-1-...@thorsis.com/ > > Have some peaceful days everyone. > > Greets > Alex > > v2 -> v3: > * Rebased on v2024.01-rc5 > * Removed a superflous new newline introduced in v1 This change was in v2 of course. I made the same mistake in the changelogs of the patches, where it should have been v2 -> v3 instead. Sorry for the confusion. Greets Alex > * Collected tags > > Cc: Marek Vasut > Cc: Paul-Erwan Rio > Cc: Simon Glass > Cc: Stefan Roese > Cc: Tom Rini > Link: https://lore.kernel.org/u-boot/20211021093304.25399-1-p...@kernel.org/ > Link: https://lore.kernel.org/u-boot/2022053120.1276641-1-ma...@denx.de/ > Link: https://lore.kernel.org/u-boot/1884029.XjOfZupGQm@ada/ > Link: > https://lore.kernel.org/u-boot/20230121154743.667253-1-paulerwan@gmail.com/ > Link: > https://lore.kernel.org/u-boot/am6pr04mb61521b84f78571b282fe1d828f...@am6pr04mb6152.eurprd04.prod.outlook.com/ > > > Alexander Dahl (1): > tools: kwbimage: Allow disabling build on non-mvebu platforms > > Paul-Erwan Rio (1): > tools: fix build without LIBCRYPTO support > > arch/arm/mach-mvebu/Kconfig | 1 + > include/image.h | 2 +- > tools/Kconfig | 6 ++ > tools/Makefile | 4 +++- > tools/fit_image.c | 2 +- > tools/image-host.c | 4 > tools/mkimage.c | 5 +++-- > 7 files changed, 19 insertions(+), 5 deletions(-) > > > base-commit: 97a897444235921ce19b4f8a3b27de6f5a9ab367 > -- > 2.39.2 >
[PATCH v3 2/2] tools: fix build without LIBCRYPTO support
From: Paul-Erwan Rio
Commit cb9faa6f98ae ("tools: Use a single target-independent config to
enable OpenSSL") introduced a target-independent configuration to build
crypto features in host tools.
But since commit 2c21256b27d7 ("hash: Use Kconfig to enable hashing in
host tools and SPL") the build without OpenSSL is broken, due to FIT
signature/encryption features. Add missing conditional compilation
tokens to fix this.
Signed-off-by: Paul-Erwan Rio
Tested-by: Alexander Dahl
Cc: Simon Glass
Reviewed-by: Tom Rini
---
Notes:
Added another guard around the header includes and slightly reworded the
commit message. Otherwise it's the same patch as before, so I kept the
author as is and only added my Tested-by:
I removed the Reviewed-by: from Simon from this patch, because of the
changes mentioned and because the patch was based on an U-Boot three or
four releases ago.
v1 -> v2:
* collected tags
include/image.h| 2 +-
tools/Kconfig | 1 +
tools/fit_image.c | 2 +-
tools/image-host.c | 4
tools/mkimage.c| 5 +++--
5 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/include/image.h b/include/image.h
index 2e3cf839ee3..48b8a8995a4 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1391,7 +1391,7 @@ int calculate_hash(const void *data, int data_len, const
char *algo,
* device
*/
#if defined(USE_HOSTCC)
-# if defined(CONFIG_FIT_SIGNATURE)
+# if CONFIG_IS_ENABLED(FIT_SIGNATURE)
# define IMAGE_ENABLE_SIGN1
# define FIT_IMAGE_ENABLE_VERIFY 1
# include
diff --git a/tools/Kconfig b/tools/Kconfig
index f8632cd59d0..f01ed783e6f 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -51,6 +51,7 @@ config TOOLS_FIT_RSASSA_PSS
Support the rsassa-pss signature scheme in the tools builds
config TOOLS_FIT_SIGNATURE
+ depends on TOOLS_LIBCRYPTO
def_bool y
help
Enable signature verification of FIT uImages in the tools builds
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 71e031c8550..beef1fa86e2 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -61,7 +61,7 @@ static int fit_add_file_data(struct image_tool_params
*params, size_t size_inc,
ret = fit_set_timestamp(ptr, 0, time);
}
- if (!ret)
+ if (CONFIG_IS_ENABLED(FIT_SIGNATURE) && !ret)
ret = fit_pre_load_data(params->keydir, dest_blob, ptr);
if (!ret) {
diff --git a/tools/image-host.c b/tools/image-host.c
index ca4950312f9..90bc9f905f3 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -14,8 +14,10 @@
#include
#include
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
#include
#include
+#endif
/**
* fit_set_hash_value - set hash value in requested has node
@@ -1131,6 +1133,7 @@ static int fit_config_add_verification_data(const char
*keydir,
return 0;
}
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
/*
* 0) open file (open)
* 1) read certificate (PEM_read_X509)
@@ -1239,6 +1242,7 @@ int fit_pre_load_data(const char *keydir, void *keydest,
void *fit)
out:
return ret;
}
+#endif
int fit_cipher_data(const char *keydir, void *keydest, void *fit,
const char *comment, int require_keys,
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 6dfe3e1d42d..ac62ebbde9b 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -115,7 +115,7 @@ static void usage(const char *msg)
" -B => align size in hex for FIT structure and
header\n"
" -b => append the device tree binary to the FIT\n"
" -t => update the timestamp in the FIT\n");
-#ifdef CONFIG_FIT_SIGNATURE
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
fprintf(stderr,
"Signing / verified boot options: [-k keydir] [-K dtb] [ -c
] [-p addr] [-r] [-N engine]\n"
" -k => set directory containing private keys\n"
@@ -130,8 +130,9 @@ static void usage(const char *msg)
" -o => algorithm to use for signing\n");
#else
fprintf(stderr,
- "Signing / verified boot not supported (CONFIG_FIT_SIGNATURE
undefined)\n");
+ "Signing / verified boot not supported
(CONFIG_TOOLS_FIT_SIGNATURE undefined)\n");
#endif
+
fprintf(stderr, " %s -V ==> print version information and exit\n",
params.cmdname);
fprintf(stderr, "Use '-T list' to see a list of available image
types\n");
--
2.39.2
[PATCH v3 0/2] tools: Fix build without host OpenSSL
Hei hei, both patches of the series got a review and this is my last work day of the year, so I just incorporated the feedback, collected the tags, and send this out before returning to office in January. Link to v2 with whole motivation text: https://lore.kernel.org/u-boot/20231214121136.3286703-1-...@thorsis.com/ Have some peaceful days everyone. Greets Alex v2 -> v3: * Rebased on v2024.01-rc5 * Removed a superflous new newline introduced in v1 * Collected tags Cc: Marek Vasut Cc: Paul-Erwan Rio Cc: Simon Glass Cc: Stefan Roese Cc: Tom Rini Link: https://lore.kernel.org/u-boot/20211021093304.25399-1-p...@kernel.org/ Link: https://lore.kernel.org/u-boot/2022053120.1276641-1-ma...@denx.de/ Link: https://lore.kernel.org/u-boot/1884029.XjOfZupGQm@ada/ Link: https://lore.kernel.org/u-boot/20230121154743.667253-1-paulerwan@gmail.com/ Link: https://lore.kernel.org/u-boot/am6pr04mb61521b84f78571b282fe1d828f...@am6pr04mb6152.eurprd04.prod.outlook.com/ Alexander Dahl (1): tools: kwbimage: Allow disabling build on non-mvebu platforms Paul-Erwan Rio (1): tools: fix build without LIBCRYPTO support arch/arm/mach-mvebu/Kconfig | 1 + include/image.h | 2 +- tools/Kconfig | 6 ++ tools/Makefile | 4 +++- tools/fit_image.c | 2 +- tools/image-host.c | 4 tools/mkimage.c | 5 +++-- 7 files changed, 19 insertions(+), 5 deletions(-) base-commit: 97a897444235921ce19b4f8a3b27de6f5a9ab367 -- 2.39.2
[PATCH v3 1/2] tools: kwbimage: Allow disabling build on non-mvebu platforms
Some users want to build with CONFIG_TOOLS_LIBCRYPTO disabled, which in general is possible for at least some boards. 32-bit mvebu however requires kwbimage for building SPL, and kwbimage has a hard dependency to host OpenSSL. The new symbol CONFIG_TOOLS_KWBIMAGE allows disabling kwbimage build on non-mvebu platforms, and thus building without host libcrypto from OpenSSL. Based on previous work and discussions, see links below. Link: https://lore.kernel.org/u-boot/20211021093304.25399-1-p...@kernel.org/ Link: https://lore.kernel.org/u-boot/2022053120.1276641-1-ma...@denx.de/ Link: https://lore.kernel.org/u-boot/20230121154743.667253-2-paulerwan@gmail.com/ Cc: Marek Vasut Cc: Paul-Erwan Rio Signed-off-by: Alexander Dahl Reviewed-by: Simon Glass --- Notes: This is more or less a mashup of the patches of Pali and Marek, but considering the feedback given by Samuel on Pali's patch and considering what I thought was the preferred style in other parts of the Makefile. Link: https://lore.kernel.org/u-boot/f4660467-9d25-dc46-9e60-b2f7f0923...@sholland.org/ v1 -> v2: * removed a useless new newline added in v1 * collected tags arch/arm/mach-mvebu/Kconfig | 1 + tools/Kconfig | 5 + tools/Makefile | 4 +++- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index c80d8587b14..2058c95ca2d 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -15,6 +15,7 @@ config ARMADA_32BIT select SUPPORT_SPL select SYS_L2_PL310 if !SYS_L2CACHE_OFF select TRANSLATION_OFFSET + select TOOLS_KWBIMAGE if SPL select SPL_SYS_NO_VECTOR_TABLE if SPL select ARCH_VERY_EARLY_INIT diff --git a/tools/Kconfig b/tools/Kconfig index 6e23f44d550..f8632cd59d0 100644 --- a/tools/Kconfig +++ b/tools/Kconfig @@ -25,6 +25,11 @@ config TOOLS_LIBCRYPTO This selection does not affect target features, such as runtime FIT signature verification. +config TOOLS_KWBIMAGE + bool "Enable kwbimage support in host tools" + default y + select TOOLS_LIBCRYPTO + config TOOLS_FIT def_bool y help diff --git a/tools/Makefile b/tools/Makefile index 1aa1e36137b..6a4280e3668 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -94,6 +94,8 @@ LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := \ generated/lib/fdt-libcrypto.o \ sunxi_toc0.o +KWB_IMAGE_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := kwbimage.o + ROCKCHIP_OBS = generated/lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o # common objs for dumpimage and mkimage @@ -114,7 +116,7 @@ dumpimage-mkimage-objs := aisimage.o \ imximage.o \ imx8image.o \ imx8mimage.o \ - kwbimage.o \ + $(KWB_IMAGE_OBJS-y) \ generated/lib/md5.o \ lpc32xximage.o \ mxsimage.o \ -- 2.39.2
Re: Problem with CROSS_COMPILE
Hei hei, Am Tue, Dec 19, 2023 at 11:03:12PM -0300 schrieb Kledson Silva: > Hi, > I need help, if possible with for compile and install VxWorks in my > Raspbery 4 > > I follow the steps in page of WindRiver, but this step > (CROSS_COMPILE=aarch64-linux-gnu- > make), i have the problem below: > > > include/image.h:1397:12: fatal error: openssl/evp.h: No such file or > directory > 1397 | # include > |^~~ > compilation terminated. > make[1]: *** [scripts/Makefile.host:112: tools/aisimage.o] Error 1 > make: *** [Makefile:1858: tools] Error 2 > > Please, any idea? its for a my project of university Your build host needs OpenSSL development library/headers installed. Depending on your Linux distribution this package might be named 'libssl-dev' or similar. Greets Alex > > Thank you very much! > Best regards
Re: [PATCH 4/4] mtd: nand: raw: atmel: Remove duplicate definitions
Hello Eugen,
Am Tue, Dec 19, 2023 at 04:32:07PM +0200 schrieb Eugen Hristev:
> On 12/12/23 18:04, Alexander Dahl wrote:
> > These removed definitions were specific to some sam9 SoCs, but not
> > generic over all at91 SoCs. The correct SoC specific definitions for
> > ATMEL_BASE_PMECC are spread over different header files in
> > arch/arm/mach-at91/include/mach directory.
> >
> > Fixes a build error on a custon board based on SAMA5D2:
> >
> > Building current source for 73 boards (16 threads, 1 job per thread)
> >arm: + vera2
> > +drivers/mtd/nand/raw/atmel/pmecc.c:819: warning: "ATMEL_BASE_PMECC"
> > redefined
> > + 819 | #define ATMEL_BASE_PMECC0xe000
> > + |
> > +In file included from include/configs/vera2.h:11,
> > + from include/config.h:3,
> > + from include/linux/mtd/rawnand.h:16,
> > + from drivers/mtd/nand/raw/atmel/pmecc.c:44:
> > +include/asm/arch/sama5d2.h:171: note: this is the location of the
> > previous definition
> > + 171 | #define ATMEL_BASE_PMECC(ATMEL_BASE_HSMC + 0x70)
> > +drivers/mtd/nand/raw/atmel/pmecc.c:820: warning: "ATMEL_BASE_PMERRLOC"
> > redefined
> > + 820 | #define ATMEL_BASE_PMERRLOC 0xe600
> > +include/asm/arch/sama5d2.h:172: note: this is the location of the
> > previous definition
> > + 172 | #define ATMEL_BASE_PMERRLOC (ATMEL_BASE_HSMC + 0x500)
> >
> > Fixes: a490e1b7c017 ("nand: atmel: Add pmecc driver")
> > Signed-off-by: Alexander Dahl
> > ---
> > drivers/mtd/nand/raw/atmel/pmecc.c | 3 ---
> > 1 file changed, 3 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/raw/atmel/pmecc.c
> > b/drivers/mtd/nand/raw/atmel/pmecc.c
> > index e2e3f1ee6b5..51f6bd2e65b 100644
> > --- a/drivers/mtd/nand/raw/atmel/pmecc.c
> > +++ b/drivers/mtd/nand/raw/atmel/pmecc.c
> > @@ -816,9 +816,6 @@ int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user)
> > }
> > EXPORT_SYMBOL_GPL(atmel_pmecc_wait_rdy);
> >
> > -#define ATMEL_BASE_PMECC 0xe000
> > -#define ATMEL_BASE_PMERRLOC0xe600
> > -
> > static struct atmel_pmecc *
> > atmel_pmecc_create(struct udevice *dev,
> >const struct atmel_pmecc_caps *caps,
>
>
> Hi Alexander,
>
> What happens if we try to select and build this driver without
> sama5d2/sama5d3/sama5d4/sam9x5/sam9x60 ?
> Is it even possible ?
It is not possible on non-at91 boards because is
included so you need to select arch at91. But it is possible on older
sam9 boards like sam9260, sam9g20 and the like. Tried that by using
at91sam9g20ek_nandflash_defconfig as a base, then disabling
CONFIG_NAND_ATMEL, then enabling CONFIG_DM_NAND_ATMEL (which activates
build of drivers/mtd/nand/raw/atmel/pmecc.c), then enabling some more
missing dependencies (CONFIG_MFD_ATMEL_SMC, CONFIG_REGMAP,
CONFIG_SYSCON) and then it builds just fine.
(btw: should those be selected or implied by CONFIG_DM_NAND_ATMEL in
'drivers/mtd/nand/raw/Kconfig' then in another patch or is this stuff
rather loose coupled?)
> Because it appears these defines are done for those SoCs in their
> mach header, but the driver uses them in any situation.
I don't think so. There are two drivers, the old one is
'drivers/mtd/nand/raw/atmel_nand.c' selected by CONFIG_NAND_ATMEL
while the new one is 'drivers/mtd/nand/raw/atmel/nand-controller.c'
selected by CONFIG_DM_NAND_ATMEL (note the extra sub-directory). Only
the new one leads to building the file in question. The symbols
removed from pmecc.c are not used in pmecc.c but only in the old
driver. The scope of those removed symbols would have been in pmecc.c
only however, they are pointless at the place where they are currently
defined. (Unless someone would #include that .c file, but that
seems rather unusual.)
And the part where the symbols of the same name are used is
conditionally built only if CONFIG_ATMEL_NAND_HW_PMECC is set. From a
quick glance I would say that one is set only for newer boards, those
families you mentioned below. But as said, all this is for the old
driver.
> And currently, these warnings are being ignored if the driver is
> built with sama5d2/sama5d3/sama5d4/sam9x5/sam9x60 ?
The warning only popped up for a custom board build, where I include
in file 'include/configs/myboard.h' and keep some
old definitions for the old driver and then switching from the old to
the new driver. I did not see it for any mainline at91 defconfig.
Nevertheless I consider those defines wrong in that place.
> or the
> driver actually isn't even built with these platforms at all ?
It depends o
Re: [PATHv11 00/43] net/lwip: add lwip library for the network stack
Hello Maxim, Am Mon, Nov 27, 2023 at 06:56:43PM +0600 schrieb Maxim Uvarov: > Hello, > > Please find updated version of lwip patches. Changes are in the > changelog bellow. > > Thank you, > Maxim. > > changelog: > v11: - v11 is mosly respin of v10 patches with CI error fixes. > Gitlab CI: > > https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/18368 > Azure CI: > > https://dev.azure.com/u-boot/u-boot/_build/results?buildId=7366=results > (Azure CI, which is connected to github. Sometime I can see > tftp timeout after some part of download there, but that can > not be > reproduced locally. While Gitblab CI is stable. Because of > num tries in > CI I suspect this CI was not always reliable.) > Azure and Gitlab also have different toolchains and I > would say Gitlab generates bigger code then Azure CI. > > Also many boards have a binary limit size of 800k (even > qemu has limits). And increased limits to fit all the code. > Specially did it > patch by board config to show which boards are failing to > build. There I have > a question if we really want to support new functionality for > old boards (mips, > arm32 and etc...). I hope board owners can help me if > it's valid to increase these limits. In general one can not simply increase that limit without knowing details on where U-Boot binary is supposed to be stored on a particular board. For example there are boards where U-Boot is stored on NAND flash with fixed sized (mtd) partitions. Changing the partition layout on a running board is quite risky from my point of view, so you can assume that partition sizes fixed at all times. Those sizes determine the limit however. That said: it has to be checked board by board if such a limit can be increased at all. Greets Alex > > In this version I used git submodules and friend CI with > submodules. But I don't mind if you decide to maintain it in a > different > way. > > > v10: - fix ping with following tftp command issue with incorrect > ping timeout clear. >- Makefile on make will init submodules and if needed will > do git clone. >- wget - some minor code style changes. > v9: - added first patch describing git submodule for lwip. So > the build procedure is: > git submodule init > git submodule update > make > - reworked a little bit dhcp cmd state polling > - fixed review comments for v8 > v8: - comments for previous review > - removed lwip timeout callback pointer > - made lwip timeouts works, that also allowed to remove > static vars. > - setenv for filesize tftp and wget has to be in hex. > - Makefile changes always compile it tftp,dns,wget,ping due > to it can be used not only by CONFIG_CMD_. > - Kconfig changes - simplify lwIP settings and support only > one configuration. > - tested with mini debian.iso load over http or tftp, mount > and boot it (qemu, arm64). > v7: - more review fixes. > - support of multiply eth devices, were "ethact" selects the > active device. > v6: - fixed review comments for v5 (thanks Ilias and Simon). > v5: - fixed Iliases comments and split big patch on the small > ones. > v4: - tested with tests/py/ did some minor fixes (out of tree > build, variables set after downloads). > - accounted review comments for documentation. > - implemented dns command > - corrected wget command to not use serverip variable and use just > url string. > v3: - use lwip commands for ping,tftp,wget,dhcp if this patch > applied. Drop CONFIG_LIB_LWIP_REPLACE_ option. > - docs: use rst variant and drop references to RFC. > > Maxim Uvarov (43): > submodule: add lwIP as git submodule > net/lwip: add doc/develop/net_lwip.rst > net/lwip: integrate lwIP library > net/lwip: implement dns cmd > net/lwip: implement dhcp cmd > net/lwip: implement tftp cmd > net/lwip: implement wget cmd > net/lwip: implement ping cmd > net/lwip: add lwIP configuration > net/lwip: implement lwIP port to U-Boot > net/lwip: update .gitignore with lwIP > net/lwip: connection between cmd and lwip apps > net/lwip: replace original net commands with lwip > net/lwip: split net.h to net.h, arp.h and eth.h > test_efi_loader.py: use $filesize var > test_net: print out net list > net: sandbox: fix NULL pointer derefences > net/smc911x: fix return from
[PATCH v2 2/2] tools: fix build without LIBCRYPTO support
From: Paul-Erwan Rio
Commit cb9faa6f98ae ("tools: Use a single target-independent config to
enable OpenSSL") introduced a target-independent configuration to build
crypto features in host tools.
But since commit 2c21256b27d7 ("hash: Use Kconfig to enable hashing in
host tools and SPL") the build without OpenSSL is broken, due to FIT
signature/encryption features. Add missing conditional compilation
tokens to fix this.
Signed-off-by: Paul-Erwan Rio
Tested-by: Alexander Dahl
Cc: Simon Glass
---
Notes:
Added another guard around the header includes and slightly reworded the
commit message. Otherwise it's the same patch as before, so I kept the
author as is and only added my Tested-by:
I removed the Reviewed-by: from Simon from this patch, because of the
changes mentioned and because the patch was based on an U-Boot three or
four releases ago.
include/image.h| 2 +-
tools/Kconfig | 1 +
tools/fit_image.c | 2 +-
tools/image-host.c | 4
tools/mkimage.c| 5 +++--
5 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/include/image.h b/include/image.h
index 2e3cf839ee3..48b8a8995a4 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1391,7 +1391,7 @@ int calculate_hash(const void *data, int data_len, const
char *algo,
* device
*/
#if defined(USE_HOSTCC)
-# if defined(CONFIG_FIT_SIGNATURE)
+# if CONFIG_IS_ENABLED(FIT_SIGNATURE)
# define IMAGE_ENABLE_SIGN1
# define FIT_IMAGE_ENABLE_VERIFY 1
# include
diff --git a/tools/Kconfig b/tools/Kconfig
index f8632cd59d0..f01ed783e6f 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -51,6 +51,7 @@ config TOOLS_FIT_RSASSA_PSS
Support the rsassa-pss signature scheme in the tools builds
config TOOLS_FIT_SIGNATURE
+ depends on TOOLS_LIBCRYPTO
def_bool y
help
Enable signature verification of FIT uImages in the tools builds
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 71e031c8550..beef1fa86e2 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -61,7 +61,7 @@ static int fit_add_file_data(struct image_tool_params
*params, size_t size_inc,
ret = fit_set_timestamp(ptr, 0, time);
}
- if (!ret)
+ if (CONFIG_IS_ENABLED(FIT_SIGNATURE) && !ret)
ret = fit_pre_load_data(params->keydir, dest_blob, ptr);
if (!ret) {
diff --git a/tools/image-host.c b/tools/image-host.c
index ca4950312f9..90bc9f905f3 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -14,8 +14,10 @@
#include
#include
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
#include
#include
+#endif
/**
* fit_set_hash_value - set hash value in requested has node
@@ -1131,6 +1133,7 @@ static int fit_config_add_verification_data(const char
*keydir,
return 0;
}
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
/*
* 0) open file (open)
* 1) read certificate (PEM_read_X509)
@@ -1239,6 +1242,7 @@ int fit_pre_load_data(const char *keydir, void *keydest,
void *fit)
out:
return ret;
}
+#endif
int fit_cipher_data(const char *keydir, void *keydest, void *fit,
const char *comment, int require_keys,
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 6dfe3e1d42d..ac62ebbde9b 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -115,7 +115,7 @@ static void usage(const char *msg)
" -B => align size in hex for FIT structure and
header\n"
" -b => append the device tree binary to the FIT\n"
" -t => update the timestamp in the FIT\n");
-#ifdef CONFIG_FIT_SIGNATURE
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
fprintf(stderr,
"Signing / verified boot options: [-k keydir] [-K dtb] [ -c
] [-p addr] [-r] [-N engine]\n"
" -k => set directory containing private keys\n"
@@ -130,8 +130,9 @@ static void usage(const char *msg)
" -o => algorithm to use for signing\n");
#else
fprintf(stderr,
- "Signing / verified boot not supported (CONFIG_FIT_SIGNATURE
undefined)\n");
+ "Signing / verified boot not supported
(CONFIG_TOOLS_FIT_SIGNATURE undefined)\n");
#endif
+
fprintf(stderr, " %s -V ==> print version information and exit\n",
params.cmdname);
fprintf(stderr, "Use '-T list' to see a list of available image
types\n");
--
2.39.2
[PATCH v2 1/2] tools: kwbimage: Allow disabling build on non-mvebu platforms
Some users want to build with CONFIG_TOOLS_LIBCRYPTO disabled, which in general is possible for at least some boards. 32-bit mvebu however requires kwbimage for building SPL, and kwbimage has a hard dependency to host OpenSSL. The new symbol CONFIG_TOOLS_KWBIMAGE allows disabling kwbimage build on non-mvebu platforms, and thus building without host libcrypto from OpenSSL. Based on previous work and discussions, see links below. Link: https://lore.kernel.org/u-boot/20211021093304.25399-1-p...@kernel.org/ Link: https://lore.kernel.org/u-boot/2022053120.1276641-1-ma...@denx.de/ Link: https://lore.kernel.org/u-boot/20230121154743.667253-2-paulerwan@gmail.com/ Cc: Marek Vasut Cc: Paul-Erwan Rio Signed-off-by: Alexander Dahl --- Notes: This is more or less a mashup of the patches of Pali and Marek, but considering the feedback given by Samuel on Pali's patch and considering what I thought was the preferred style in other parts of the Makefile. Link: https://lore.kernel.org/u-boot/f4660467-9d25-dc46-9e60-b2f7f0923...@sholland.org/ arch/arm/mach-mvebu/Kconfig | 1 + tools/Kconfig | 5 + tools/Makefile | 5 - 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index c80d8587b14..2058c95ca2d 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -15,6 +15,7 @@ config ARMADA_32BIT select SUPPORT_SPL select SYS_L2_PL310 if !SYS_L2CACHE_OFF select TRANSLATION_OFFSET + select TOOLS_KWBIMAGE if SPL select SPL_SYS_NO_VECTOR_TABLE if SPL select ARCH_VERY_EARLY_INIT diff --git a/tools/Kconfig b/tools/Kconfig index 6e23f44d550..f8632cd59d0 100644 --- a/tools/Kconfig +++ b/tools/Kconfig @@ -25,6 +25,11 @@ config TOOLS_LIBCRYPTO This selection does not affect target features, such as runtime FIT signature verification. +config TOOLS_KWBIMAGE + bool "Enable kwbimage support in host tools" + default y + select TOOLS_LIBCRYPTO + config TOOLS_FIT def_bool y help diff --git a/tools/Makefile b/tools/Makefile index 1aa1e36137b..fd3b207eb96 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -94,8 +94,11 @@ LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := \ generated/lib/fdt-libcrypto.o \ sunxi_toc0.o +KWB_IMAGE_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := kwbimage.o + ROCKCHIP_OBS = generated/lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o + # common objs for dumpimage and mkimage dumpimage-mkimage-objs := aisimage.o \ atmelimage.o \ @@ -114,7 +117,7 @@ dumpimage-mkimage-objs := aisimage.o \ imximage.o \ imx8image.o \ imx8mimage.o \ - kwbimage.o \ + $(KWB_IMAGE_OBJS-y) \ generated/lib/md5.o \ lpc32xximage.o \ mxsimage.o \ -- 2.39.2
[PATCH v2 0/2] tools: Fix build without host OpenSSL
Hei hei, every now and then some user wants to build without having to install OpenSSL development libraries on the build host for different reasons. This is not possible for all boards supported by U-Boot and not for all configurations, but at least for some. And U-Boot has an option for that, which currently does not work. The topic was discussed multiple times and multiple patches were proposed to fix things, but to my knowledge none got applied. I'm aware of at least the discussions listed below. This series is based on the work done by Paul-Erwan Rio earlier this year, but replacing the first of two patches by a new patch based on two older approaches from 2021 and 2022 and the feedback they got. Because of that, I gave it the v2 right away. I added some notes to both patches for further explanations on my decisions. I tested this with and without libssl-dev installed on a Debian GNU/Linux 12 (bookworm) host (amd64 arch), with buildman and the following options: buildman -b master..mybranch -a '~CONFIG_TOOLS_KWBIMAGE' -a '~CONFIG_TOOLS_LIBCRYPTO' atmel And with libssl-dev installed this: buildman -b master..mybranch atmel buildman -b master..mybranch turris Building 'turris' without libssl-dev installed fails as expected. The series solves _my_ immediate problem (building a recent U-Boot for an at91 based board _without_ FIT images and/or signing, in a BSP from 2018 which we can not update, and which does not handle host openssl correctly), but I did not investigate other combinations, except those listed above. Test on real hardware was only on our at91 based boards. Please test and let me know what you think. I can imagine having CI testing builds with and without CONFIG_TOOLS_LIBCRYPTO set might be difficult, because building without won't work for every board. It can not, because some boards require it while others don't. Greets Alex Cc: Marek Vasut Cc: Paul-Erwan Rio Cc: Simon Glass Cc: Stefan Roese Link: https://lore.kernel.org/u-boot/20211021093304.25399-1-p...@kernel.org/ Link: https://lore.kernel.org/u-boot/2022053120.1276641-1-ma...@denx.de/ Link: https://lore.kernel.org/u-boot/1884029.XjOfZupGQm@ada/ Link: https://lore.kernel.org/u-boot/20230121154743.667253-1-paulerwan@gmail.com/ Link: https://lore.kernel.org/u-boot/am6pr04mb61521b84f78571b282fe1d828f...@am6pr04mb6152.eurprd04.prod.outlook.com/ Alexander Dahl (1): tools: kwbimage: Allow disabling build on non-mvebu platforms Paul-Erwan Rio (1): tools: fix build without LIBCRYPTO support arch/arm/mach-mvebu/Kconfig | 1 + include/image.h | 2 +- tools/Kconfig | 6 ++ tools/Makefile | 5 - tools/fit_image.c | 2 +- tools/image-host.c | 4 tools/mkimage.c | 5 +++-- 7 files changed, 20 insertions(+), 5 deletions(-) base-commit: 27089f1e4d11fd7e0619097b59258d0428cde2ac -- 2.39.2
Re: [PATCH v1 2/2] tools: fix build without LIBCRYPTO support
Hello,
Am Samstag, 21. Januar 2023, 16:47:42 CET schrieb Paul-Erwan Rio:
> Commit introduced a
> target-independent configuration to build crypto features in host tools.
>
> But since commit <2c21256b27d70b5950bd059330cdab027fb6ab7e>, the build
> without OpenSSL is broken, due to FIT signature/encryption features. Add
> missing conditional compilation tokens to fix this.
>
> Signed-off-by: Paul-Erwan Rio
I applied your patch to my v2023.10 based tree and it fails to build
(just using one board as example here, it is not the only one
failing).
% buildman -o ~/build/u-boot/buildman -Pr -a '~CONFIG_TOOLS_LIBCRYPTO'
sama5d27_som1_ek_mmc
Building current source for 2 boards (2 threads, 8 jobs per thread)
arm: + sama5d27_som1_ek_mmc1
+tools/image-host.c:17:10: fatal error: openssl/pem.h: Datei oder
Verzeichnis nicht gefunden
+ 17 | #include
+ | ^~~
+compilation terminated.
+make[2]: *** [scripts/Makefile.host:112: tools/image-host.o] Fehler 1
+make[1]: *** [Makefile:1857: tools] Fehler 2
+make: *** [Makefile:177: sub-make] Error 2
arm: + sama5d27_som1_ek_mmc
+tools/image-host.c:17:10: fatal error: openssl/pem.h: Datei oder
Verzeichnis nicht gefunden
+ 17 | #include
+ | ^~~
+compilation terminated.
+make[2]: *** [scripts/Makefile.host:112: tools/image-host.o] Fehler 1
+make[1]: *** [Makefile:1857: tools] Fehler 2
+make: *** [Makefile:177: sub-make] Error 2
002 /2 sama5d27_som1_ek_mmc
Completed: 2 total built, 2 newly), duration 0:00:01, rate 2.00
Same if I apply the whole series to master (this time with english
locale):
% buildman -o ~/build/u-boot/buildman -Pr -a '~CONFIG_TOOLS_LIBCRYPTO'
sama5d27_som1_ek_mmc
Building current source for 2 boards (2 threads, 8 jobs per thread)
arm: + sama5d27_som1_ek_mmc
+tools/image-host.c:17:10: fatal error: openssl/pem.h: No such file or
directory
+ 17 | #include
+ | ^~~
+compilation terminated.
+make[2]: *** [scripts/Makefile.host:112: tools/image-host.o] Error 1
+make[1]: *** [Makefile:1858: tools] Error 2
+make: *** [Makefile:177: sub-make] Error 2
arm: + sama5d27_som1_ek_mmc1
+tools/image-host.c:17:10: fatal error: openssl/pem.h: No such file or
directory
+ 17 | #include
+ | ^~~
+compilation terminated.
+make[2]: *** [scripts/Makefile.host:112: tools/image-host.o] Error 1
+make[1]: *** [Makefile:1858: tools] Error 2
+make: *** [Makefile:177: sub-make] Error 2
002 /2 sama5d27_som1_ek_mmc1
Completed: 2 total built, 2 newly), duration 0:00:01, rate 2.00
Did you have time to look into this again? Or maybe did you sent an
updated series I overlooked?
Greets
Alex
> ---
>
> include/image.h| 2 +-
> tools/Kconfig | 1 +
> tools/fit_image.c | 2 +-
> tools/image-host.c | 2 ++
> tools/mkimage.c| 5 +++--
> 5 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/include/image.h b/include/image.h
> index 7717a4c13d..6a616d15fb 100644
> --- a/include/image.h
> +++ b/include/image.h
> @@ -1388,7 +1388,7 @@ int calculate_hash(const void *data, int data_len,
> const char *algo, * device
> */
> #if defined(USE_HOSTCC)
> -# if defined(CONFIG_FIT_SIGNATURE)
> +# if CONFIG_IS_ENABLED(FIT_SIGNATURE)
> # define IMAGE_ENABLE_SIGN 1
> # define FIT_IMAGE_ENABLE_VERIFY1
> # include
> diff --git a/tools/Kconfig b/tools/Kconfig
> index 539708f277..cfad26302c 100644
> --- a/tools/Kconfig
> +++ b/tools/Kconfig
> @@ -46,6 +46,7 @@ config TOOLS_FIT_RSASSA_PSS
> Support the rsassa-pss signature scheme in the tools builds
>
> config TOOLS_FIT_SIGNATURE
> + depends on TOOLS_LIBCRYPTO
> def_bool y
> help
> Enable signature verification of FIT uImages in the tools builds
> diff --git a/tools/fit_image.c b/tools/fit_image.c
> index 8a18b1b0ba..148dc5df40 100644
> --- a/tools/fit_image.c
> +++ b/tools/fit_image.c
> @@ -61,7 +61,7 @@ static int fit_add_file_data(struct image_tool_params
> *params, size_t size_inc, ret = fit_set_timestamp(ptr, 0, time);
> }
>
> - if (!ret)
> + if (CONFIG_IS_ENABLED(FIT_SIGNATURE) && !ret)
> ret = fit_pre_load_data(params->keydir, dest_blob, ptr);
>
> if (!ret) {
> diff --git a/tools/image-host.c b/tools/image-host.c
> index 4a24dee815..d09a03bd76 100644
> --- a/tools/image-host.c
> +++ b/tools/image-host.c
> @@ -1119,6 +1119,7 @@ static int fit_config_add_verification_data(const char
> *keydir, return 0;
> }
>
> +#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
> /*
> * 0) open file (open)
> * 1) read certificate (PEM_read_X509)
> @@ -1227,6 +1228,7 @@ int fit_pre_load_data(const char *keydir, void
> *keydest, void *fit) out:
> return ret;
>
Re: 回复: Build failed when CONFIG_TOOLS_LIBCRYPTO is disabled on latest u-boot
Hello, Am Montag, 27. November 2023, 03:53:49 CET schrieb Terry Lv: > Hi Experts, > > Any feedback on this? Bitten by the same problem again, I did a quick search on lore and found these: 1. Patch from 2021: https://lore.kernel.org/u-boot/20211021093304.25399-1-p...@kernel.org/ I carried that patch up to 2022.04, but it does not solve the whole problem in recent U-Boot anymore. 2. Another patch tackling the same issue from early 2022: https://lore.kernel.org/u-boot/2022053120.1276641-1-ma...@denx.de/ 3. Discussion from mid 2022: https://lore.kernel.org/u-boot/1884029.XjOfZupGQm@ada/ 4. Patch series from earlier this year: https://lore.kernel.org/u-boot/20230121154743.667253-1-paulerwan@gmail.com/ As far as I can tell none of the proposed patches got applied. I'm going to test those now which I was not aware of yet. Greets Alex > > Thanks! > > Regards > Terry > > 发件人: Terry Lv > 发送时间: 2023年10月18日 12:03 > 收件人: u-boot@lists.denx.de > 主题: Build failed when CONFIG_TOOLS_LIBCRYPTO is disabled on latest u-boot > > Hi Experts, > > We need to disable CONFIG_TOOLS_LIBCRYPTO in our u-boot. > > But when I disable CONFIG_TOOLS_LIBCRYPTO from menuconfig, my u-boot build > fails. > Logs: > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-lin > ux/usr/bin/ld: tools/image-host.o: in function `read_pub_key': > image-host.c:(.text+0x8f): undefined reference to `PEM_read_X509' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: image-host.c:(.text+0x9e): undefined reference to > `X509_get_pubkey' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: image-host.c:(.text+0xae): undefined reference to > `i2d_PublicKey' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: image-host.c:(.text+0xc1): undefined reference to > `X509_free' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: tools/kwbimage.o: in function `openssl_err': > kwbimage.c:(.text+0xbb): undefined reference to `ERR_get_error' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-lin > ux/usr/bin/ld: kwbimage.c:(.text+0xd7): undefined reference to > `ERR_error_string' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: tools/kwbimage.o: in function `kwb_load_rsa_key': > kwbimage.c:(.text+0x19d): undefined reference to `PEM_read_RSAPrivateKey' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: tools/kwbimage.o: in function `kwb_compute_pubkey_hash': > kwbimage.c:(.text+0x278): undefined reference to `EVP_MD_CTX_new' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x28c): undefined reference to > `EVP_MD_CTX_reset' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x291): undefined reference to > `EVP_sha256' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x29c): undefined reference to > `EVP_DigestInit' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x2b6): undefined reference to > `EVP_DigestUpdate' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x2ca): undefined reference to > `EVP_DigestFinal' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x2d9): undefined reference to > `EVP_MD_CTX_reset' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x2e1): undefined reference to > `EVP_MD_CTX_free' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: tools/kwbimage.o: in function `kwb_export_pubkey': > kwbimage.c:(.text+0x3b2): undefined reference to `RSA_get0_key' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-lin > ux/usr/bin/ld: kwbimage.c:(.text+0x3c3): undefined reference to > `RSA_get0_key' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x3f5): undefined reference to > `BN_num_bits' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x408): undefined reference to > `BN_num_bits' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x47e): undefined reference to `BN_bn2bin' > /opt/samba/nxa08304/gcc_cross_toolchain/5.4-zeus/sysroots/x86_64-pokysdk-li > nux/usr/bin/ld: kwbimage.c:(.text+0x49f): undefined reference to `BN_bn2bin' >
[PATCH 2/4] ARM: dts: at91: sama5d2: Port ebi/nand nodes from linux
Required for using the new DM based atmel nand driver.
Ported from Linux v6.7-rc4.
Signed-off-by: Alexander Dahl
---
arch/arm/dts/sama5d2.dtsi | 56 +++
1 file changed, 56 insertions(+)
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index c28a544da6f..0dbacade3b6 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -34,6 +34,15 @@
#size-cells = <1>;
bootph-all;
+ nfc_sram: sram@10 {
+ compatible = "mmio-sram";
+ no-memory-wc;
+ reg = <0x0010 0x2400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0010 0x2400>;
+ };
+
usb1: ohci@40 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x0040 0x10>;
@@ -50,6 +59,32 @@
status = "disabled";
};
+ ebi: ebi@1000 {
+ compatible = "atmel,sama5d3-ebi";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ atmel,smc = <>;
+ reg = <0x1000 0x1000
+ 0x6000 0x3000>;
+ ranges = <0x0 0x0 0x1000 0x1000
+ 0x1 0x0 0x6000 0x1000
+ 0x2 0x0 0x7000 0x1000
+ 0x3 0x0 0x8000 0x1000>;
+ clocks = <>;
+ status = "disabled";
+
+ nand_controller: nand-controller {
+ compatible = "atmel,sama5d3-nand-controller";
+ atmel,nfc-sram = <_sram>;
+ atmel,nfc-io = <_io>;
+ ecc-engine = <>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ status = "disabled";
+ };
+ };
+
sdmmc0: sdio-host@a000 {
compatible = "atmel,sama5d2-sdhci";
reg = <0xa000 0x300>;
@@ -66,6 +101,11 @@
status = "disabled";
};
+ nfc_io: nfc-io@c000 {
+ compatible = "atmel,sama5d3-nfc-io", "syscon";
+ reg = <0xc000 0x800>;
+ };
+
apb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -657,6 +697,22 @@
};
};
+ hsmc: hsmc@f8014000 {
+ compatible = "atmel,sama5d2-smc", "syscon",
"simple-mfd";
+ reg = <0xf8014000 0x1000>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
+ clocks = <_clk>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pmecc: ecc-engine@f8014070 {
+ compatible = "atmel,sama5d2-pmecc";
+ reg = <0xf8014070 0x490>,
+ <0xf8014500 0x200>;
+ };
+ };
+
uart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x100>;
--
2.39.2
[PATCH 1/4] ARM: dts: at91: sama5d2: Move sfr node
Nodes are ordered by register offset.
Fixes: 56246d1e8705 ("ARM: dts: at91: sama5: Add the sfr node")
Signed-off-by: Alexander Dahl
---
arch/arm/dts/sama5d2.dtsi | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 819564fdd5b..c28a544da6f 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -698,6 +698,11 @@
status = "disabled";
};
+ sfr: sfr@f803 {
+ compatible = "atmel,sama5d2-sfr", "syscon";
+ reg = <0xf803 0x98>;
+ };
+
rstc@f8048000 {
compatible = "atmel,sama5d3-rstc";
reg = <0xf8048000 0x10>;
@@ -726,11 +731,6 @@
status = "disabled";
};
- sfr: sfr@f803 {
- compatible = "atmel,sama5d2-sfr", "syscon";
- reg = <0xf803 0x98>;
- };
-
sckc@f8048050 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xf8048050 0x4>;
--
2.39.2
[PATCH 3/4] ARM: dts: at91: sama5d2: Align more node names with Linux
Port from Linux v6.7-rc4. Should not hurt U-Boot but makes diffing
easier and allows referencing node names in board dts.
Signed-off-by: Alexander Dahl
---
arch/arm/dts/sama5d2.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 0dbacade3b6..7b62fffb4ff 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -119,7 +119,7 @@
status = "disabled";
};
- pmc: pmc@f0014000 {
+ pmc: clock-controller@f0014000 {
compatible = "atmel,sama5d2-pmc", "syscon";
reg = <0xf0014000 0x160>;
#address-cells = <1>;
@@ -759,13 +759,13 @@
reg = <0xf803 0x98>;
};
- rstc@f8048000 {
+ reset_controller: reset-controller@f8048000 {
compatible = "atmel,sama5d3-rstc";
reg = <0xf8048000 0x10>;
clocks = <>;
};
- shdwc@f8048010 {
+ shutdown_controller: poweroff@f8048010 {
compatible = "atmel,sama5d2-shdwc";
reg = <0xf8048010 0x10>;
clocks = <>;
@@ -780,7 +780,7 @@
clocks = <>;
};
- watchdog@f8048040 {
+ watchdog: watchdog@f8048040 {
compatible = "atmel,sama5d4-wdt";
reg = <0xf8048040 0x10>;
clocks = <>;
--
2.39.2
[PATCH 4/4] mtd: nand: raw: atmel: Remove duplicate definitions
These removed definitions were specific to some sam9 SoCs, but not
generic over all at91 SoCs. The correct SoC specific definitions for
ATMEL_BASE_PMECC are spread over different header files in
arch/arm/mach-at91/include/mach directory.
Fixes a build error on a custon board based on SAMA5D2:
Building current source for 73 boards (16 threads, 1 job per thread)
arm: + vera2
+drivers/mtd/nand/raw/atmel/pmecc.c:819: warning: "ATMEL_BASE_PMECC"
redefined
+ 819 | #define ATMEL_BASE_PMECC0xe000
+ |
+In file included from include/configs/vera2.h:11,
+ from include/config.h:3,
+ from include/linux/mtd/rawnand.h:16,
+ from drivers/mtd/nand/raw/atmel/pmecc.c:44:
+include/asm/arch/sama5d2.h:171: note: this is the location of the previous
definition
+ 171 | #define ATMEL_BASE_PMECC(ATMEL_BASE_HSMC + 0x70)
+drivers/mtd/nand/raw/atmel/pmecc.c:820: warning: "ATMEL_BASE_PMERRLOC"
redefined
+ 820 | #define ATMEL_BASE_PMERRLOC 0xe600
+include/asm/arch/sama5d2.h:172: note: this is the location of the previous
definition
+ 172 | #define ATMEL_BASE_PMERRLOC (ATMEL_BASE_HSMC + 0x500)
Fixes: a490e1b7c017 ("nand: atmel: Add pmecc driver")
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/atmel/pmecc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/pmecc.c
b/drivers/mtd/nand/raw/atmel/pmecc.c
index e2e3f1ee6b5..51f6bd2e65b 100644
--- a/drivers/mtd/nand/raw/atmel/pmecc.c
+++ b/drivers/mtd/nand/raw/atmel/pmecc.c
@@ -816,9 +816,6 @@ int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user)
}
EXPORT_SYMBOL_GPL(atmel_pmecc_wait_rdy);
-#define ATMEL_BASE_PMECC 0xe000
-#define ATMEL_BASE_PMERRLOC0xe600
-
static struct atmel_pmecc *
atmel_pmecc_create(struct udevice *dev,
const struct atmel_pmecc_caps *caps,
--
2.39.2
[PATCH 0/4] Facilitate new atmel raw nand driver for SAMA5D2
Hei hei,
for some downstream boards with SAMA5D27 SiP SoCs with raw NAND flash I
added the necessary nodes to sama5d2.dtsi with just one little
guesswork: the clocks. Motivation was to fix reading from raw nand
flash which failed on some of those boards, while others worked fine.
So I suppose the timings for the external interface were set to too slow
values. (IIRC I took them from the sama5d2_ptc_ek_nandflash board code
back in 2019.)
The solution was basically to switch from the old non-DM driver with
hardcoded timings for the external memory interface to the new DM based
driver introduced earlier this year, which sets the timings based on
ONFI parameters read from the flash chip.
Works for me, but I have no boards with that SoC _and_ a raw NAND flash
at hand, which are supported by upstream U-Boot. The only matching
upstream config is sama5d2_ptc_ek_nandflash_defconfig but because we
don't have that board, I did not touch it.
(When that driver was added with 6a8dfd57220d ("nand: atmel: Add DM
based NAND driver") the author claims in the commit message it was
tested on SAMA5D3, but none of the sama5d3 configs actually uses it.)
Some more changes to the board dts are necessary, but porting from Linux
is straightforward. The necessary changes to the defconfig should look
like this:
# CONFIG_I2C is not set
CONFIG_LED=y
CONFIG_LED_GPIO=y
+CONFIG_ATMEL_EBI=y
+CONFIG_MFD_ATMEL_SMC=y
# CONFIG_MMC is not set
CONFIG_MTD=y
-CONFIG_NAND_ATMEL=y
-CONFIG_ATMEL_NAND_HW_PMECC=y
-CONFIG_PMECC_CAP=8
+CONFIG_DM_MTD=y
+CONFIG_DM_NAND_ATMEL=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_PHY_SMSC=y
CONFIG_MACB=y
Hope the changes are acceptable nevertheless. The last patch has a
trivial fix for the new atmel raw nand driver which I came up with while
working on this.
Greets
Alex
Cc: Eugen Hristev
Cc: Dario Binacchi
Cc: Michael Trimarchi
Cc: Wenyou Yang
Cc: Balamanikandan Gunasundar
Alexander Dahl (4):
ARM: dts: at91: sama5d2: Move sfr node
ARM: dts: at91: sama5d2: Port ebi/nand nodes from linux
ARM: dts: at91: sama5d2: Align more node names with Linux
mtd: nand: raw: atmel: Remove duplicate definitions
arch/arm/dts/sama5d2.dtsi | 74 ++
drivers/mtd/nand/raw/atmel/pmecc.c | 3 --
2 files changed, 65 insertions(+), 12 deletions(-)
base-commit: 2f0282922b2c458eea7f85c500a948a587437b63
--
2.39.2
Re: [PATCH v1 1/2] fs: fat: add macro to convert u8[2] to u16
Hello Christian,
Am Wed, Nov 08, 2023 at 01:12:38PM +0100 schrieb
christian.taedcke-...@weidmueller.com:
> From: Christian Taedcke
>
> This reduces code duplications.
>
> Signed-off-by: Christian Taedcke
> ---
>
> fs/fat/fat.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> index 8ff1fd0ec8..8a0f4e4e6c 100644
> --- a/fs/fat/fat.c
> +++ b/fs/fat/fat.c
> @@ -25,6 +25,8 @@
> #include
> #include
>
> +#define FATU8ARRAY2CPU16(x) (((x)[1] << 8) + (x)[0])
This does the same as the generic `get_unaligned_le16()` … why not use
that?
Greets
Alex
> +
> /*
> * Convert a string to lowercase. Converts at most 'len' characters,
> * 'len' may be larger than the length of 'str' if 'str' is NULL
> @@ -571,7 +573,7 @@ static int get_fs_info(fsdata *mydata)
> mydata->total_sect = bs.total_sect;
> } else {
> mydata->fatlength = bs.fat_length;
> - mydata->total_sect = (bs.sectors[1] << 8) + bs.sectors[0];
> + mydata->total_sect = FATU8ARRAY2CPU16(bs.sectors);
> if (!mydata->total_sect)
> mydata->total_sect = bs.total_sect;
> }
> @@ -583,7 +585,7 @@ static int get_fs_info(fsdata *mydata)
>
> mydata->rootdir_sect = mydata->fat_sect + mydata->fatlength * bs.fats;
>
> - mydata->sect_size = (bs.sector_size[1] << 8) + bs.sector_size[0];
> + mydata->sect_size = FATU8ARRAY2CPU16(bs.sector_size);
> mydata->clust_size = bs.cluster_size;
> if (mydata->sect_size != cur_part_info.blksz) {
> log_err("FAT sector size mismatch (fs=%u, dev=%lu)\n",
> @@ -607,8 +609,7 @@ static int get_fs_info(fsdata *mydata)
> (mydata->clust_size * 2);
> mydata->root_cluster = bs.root_cluster;
> } else {
> - mydata->rootdir_size = ((bs.dir_entries[1] * (int)256 +
> - bs.dir_entries[0]) *
> + mydata->rootdir_size = (FATU8ARRAY2CPU16(bs.dir_entries) *
>sizeof(dir_entry)) /
>mydata->sect_size;
> mydata->data_begin = mydata->rootdir_sect +
> --
> 2.34.1
>
Re: ZFS support in custom u-boot build...
Hello Stacey, Am Thu, Oct 05, 2023 at 11:22:14AM +0100 schrieb Stacey Pellegrino: > To all those of concern, > > I am in need of help regarding building u-boot with ZFS support for the > Orange Pi 5 Plus. > > I have tried working out the following... > > https://github.com/u-boot/u-boot/blob/22ad69b7987eb4b10221330661db4427e40174fb/doc/README.zfs > > The URL link above specifies using the board specific config file, which > for the Orange Pi 5 Plus is (so I believe) > orangepi-build/userpatches/config-default.conf. > I therefore edited this file in question with CONFIG_CMD_ZFS="yes" and > uncommenting the line install_zfs="yes". In that regard this README.zfs is somewhat outdated. You should set CMD_ZFS through Kconfig instead. Which means: pick the matching defconfig from configs/ subfolder, then run menuconfig and enable CMD_ZFS, and build that. Not sure if that Orange Pi 5 Plus is already supported by U-Boot mainline already. From a quick glance at the defconfig filenames I would not know which to pick. > However, it still does not allow me to boot with root ZFS on the NVMe SSD > with the official Orange Pi Debian v12 (Bookwork) ARM image. ZFS does not > seem to be referenced in the custom u-boot source code build output as > well. I followed the build instructions located at the following URL link... > > http://www.orangepi.org/orangepiwiki/index.php/Orange_Pi_5_Plus#Compile_u-boot Oh you should have told before. This uses a custom build script not part of U-Boot, probably to call U-Boot build. Please contact that project on how to change U-Boot config instead. Or look at their build.sh and figure out how it configures and builds U-Boot. > ...but am I required to apply a patch to the u-boot source for ZFS support? > If so, then that could be my problem. If a patch is required, then how > would I go about applying this accordingly? Although they seem to use an outdated and patched version v2017.09 of u-boot: probably not. Please try with enabling CMD_ZFS in your U-Boot config first. It's in the menuconfig, also in v2017.09 already. Greets Alex > > Thank you in advance for help in this matter. Kindest regards, -Stacey > Pellegrino
[PATCH v2 0/1] mtd: nand: raw: atmel: R/B gpio on sam9x60
Hei hei, after sending v1 of this patch Eugen and Michael discussed what would be the right approach in U-Boot here. Actually now I saw I did not correctly port what Linux does here in v1, but this v2 should be what I understood would be the preferred solution and should be similar to what Linux does now. The original patch series had two patches, from which one was applied already. To not confuse patchwork or mailing setups, I send v2 with a cover letter too, although it is only one patch left in the series. Link to v1 below. Greets Alex Alexander Dahl (1): mtd: nand: raw: atmel: Add error handling when rb-gpios missing drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) Link: https://lore.kernel.org/u-boot/20230808130250.188588-3-...@thorsis.com/ base-commit: 5d2fae79c7d60eaf7f50322e4ec125d2f58544e9 -- 2.30.2
[PATCH v2 1/1] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is possible, the driver does
not override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl
---
Notes:
v1 -> v2:
- Only issue error message if error is not ENOENT. If the node just is
missing, move on without error message.
drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 2b29c8def6..fa962ba591 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1600,10 +1600,13 @@ static struct atmel_nand *atmel_nand_create(struct
atmel_nand_controller *nc,
nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB;
nand->cs[i].rb.id = val;
} else {
- gpio_request_by_name_nodev(np, "rb-gpios", 0,
- >cs[i].rb.gpio,
- GPIOD_IS_IN);
- nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
+ ret = gpio_request_by_name_nodev(np, "rb-gpios", 0,
+>cs[i].rb.gpio,
+GPIOD_IS_IN);
+ if (ret && ret != -ENOENT)
+ dev_err(nc->dev, "Failed to get R/B gpio (err =
%d)\n", ret);
+ if (!ret)
+ nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
}
gpio_request_by_name_nodev(np, "cs-gpios", 0,
--
2.30.2
Re: [PATCH 0/4] Add support for sam9x60 curiosity
Hello Durai, Am Thu, Sep 21, 2023 at 10:36:27PM +0530 schrieb Durai Manickam KR: > This patch series adds boot from NAND support, configs update and > fixes. The changes has been done on top of u-boot version 2023.07. Well, interesting. I sent patches for NAND flash support on that very board some weeks ago which were already applied to the at91 custodian tree: https://source.denx.de/u-boot/custodians/u-boot-at91/-/tree/next?ref_type=heads Tom already merged that to the mainline next branch. I suggest you rebase on next. Add Eugen to Cc, since he still is officially listed as maintainer of the at91 stuff. Greets Alex > > Durai Manickam KR (4): > configs: at91: sam9x60_curiosity: update > sam9x60_curiosity_mmc_defconfig > configs: at91: sam9x60_curiosity: Add > sam9x60_curiosity_nandflash_defconfig > ARM: dts: at91: sam9x60_curiosity: Enable NAND support > ARM: dts: at91: sam9x60_curiosity: fix eeprom compatible > > arch/arm/dts/at91-sam9x60_curiosity.dts | 106 +- > board/atmel/sam9x60_curiosity/MAINTAINERS | 1 + > configs/sam9x60_curiosity_mmc_defconfig | 14 +++ > configs/sam9x60_curiosity_nandflash_defconfig | 92 +++ > 4 files changed, 212 insertions(+), 1 deletion(-) > create mode 100644 configs/sam9x60_curiosity_nandflash_defconfig > > -- > 2.25.1 >
Re: [PATCH 2/2] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
Hello Eugen, hello Michael,
Am Wed, Aug 23, 2023 at 01:59:58PM +0300 schrieb Eugen Hristev:
> On 8/23/23 09:54, Michael Nazzareno Trimarchi wrote:
> > Hi
> >
> > On Wed, Aug 23, 2023 at 8:28 AM Eugen Hristev
> > wrote:
> > >
> > > Hi,
> > >
> > > On 8/8/23 18:03, Alexander Dahl wrote:
> > > > Hello Michael,
> > > >
> > > > Am Tue, Aug 08, 2023 at 03:49:45PM +0200 schrieb Michael Nazzareno
> > > > Trimarchi:
> > > > > Hi
> > > > >
> > > > > On Tue, Aug 8, 2023 at 3:03 PM Alexander Dahl
> > > > > wrote:
> > > > > >
> > > > > > Adapt behaviour to Linux kernel driver.
> > > > > >
> > > > > > The return value of gpio_request_by_name_nodev() was not checked
> > > > > > before,
> > > > > > and thus in case 'rb-gpios' was missing in DT, rb.type was set to
> > > > > > ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
> > > > > > example (on sam9x60-curiosity with the line removed from dts):
> > > > > >
> > > > > > NAND: Could not find valid ONFI parameter page; aborting
> > > > > > device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
> > > > > > Macronix NAND 512MiB 3,3V 8-bit
> > > > > > 512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size:
> > > > > > 64
> > > > > > atmel-nand-controller nand-controller: NAND scan failed: -22
> > > > > > Failed to probe nand driver (err = -22)
> > > > > > Failed to initialize NAND controller. (error -22)
> > > > > > 0 MiB
> > > > > >
> > > > > > Note: not having that gpio assigned in dts is fine, the driver does
> > > > > > not
> > > > > > override nand_chip->dev_ready() then and a generic solution is used.
> > > > > >
> > > > > > Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
> > > > > > Signed-off-by: Alexander Dahl
> > > > > > ---
> > > > > >drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
> > > > > >1 file changed, 7 insertions(+), 4 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
> > > > > > b/drivers/mtd/nand/raw/atmel/nand-controller.c
> > > > > > index 2b29c8def6..8e745a5111 100644
> > > > > > --- a/drivers/mtd/nand/raw/atmel/nand-controller.c
> > > > > > +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
> > > > > > @@ -1600,10 +1600,13 @@ static struct atmel_nand
> > > > > > *atmel_nand_create(struct atmel_nand_controller *nc,
> > > > > > nand->cs[i].rb.type =
> > > > > > ATMEL_NAND_NATIVE_RB;
> > > > > > nand->cs[i].rb.id = val;
> > > > > > } else {
> > > > > > - gpio_request_by_name_nodev(np, "rb-gpios",
> > > > > > 0,
> > > > > > -
> > > > > > >cs[i].rb.gpio,
> > > > > > - GPIOD_IS_IN);
> > > > > > - nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
> > > > > > + ret = gpio_request_by_name_nodev(np,
> > > > > > "rb-gpios", 0,
> > > > > > +
> > > > > > >cs[i].rb.gpio,
> > > > > > +
> > > > > > GPIOD_IS_IN);
> > > > > > + if (ret)
> > > > > > + dev_err(nc->dev, "Failed to get R/B
> > > > > > gpio (err = %d)\n", ret);
> > > > >
> > > > > Should not then an error here
> > > >
> > > > Different log level or no message at all?
> > > >
> > > > Note: Linux prints the same message with error level in that case.
> > > >
> > > > Greets
> > > > Alex
> > > >
> > >
> > > S
[PATCH v2 4/5] board: sam9x60-curiosity: Let LED subsystem init leds if enabled
If CONFIG_LED and CONFIG_LED_GPIO are enabled, it is not necessary to
initialize the RGB LED on the board by manually setting hardcoded GPIOs
anymore. Everything is well defined in dts and can be used like on
boards of other vendors.
Keep the old behaviour as fallback, though.
With all this in place enabling CONFIG_CMD_LED gives us a working 'led'
command on the U-Boot shell.
Signed-off-by: Alexander Dahl
---
.../arm/dts/at91-sam9x60_curiosity-u-boot.dtsi | 18 ++
.../sam9x60_curiosity/sam9x60_curiosity.c | 18 ++
2 files changed, 36 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
index a1b76e94d1..dd4623311c 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
+++ b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
@@ -20,6 +20,24 @@
chosen {
bootph-all;
};
+
+ config {
+ u-boot,boot-led = "blue";
+ };
+
+ leds {
+ led-red {
+ default-state = "off";
+ };
+
+ led-green {
+ default-state = "off";
+ };
+
+ led-blue {
+ default-state = "off";
+ };
+ };
};
{
diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
index 0fe0de9fde..f53d359404 100644
--- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
+++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -18,6 +19,7 @@
#include
#include
#include
+#include
extern void at91_pda_detect(void);
@@ -27,9 +29,25 @@ void at91_prepare_cpu_var(void);
static void board_leds_init(void)
{
+#if CONFIG_IS_ENABLED(LED)
+ const char *led_name;
+ struct udevice *dev;
+ int ret;
+
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
+ if (!led_name)
+ return;
+
+ ret = led_get_by_label(led_name, );
+ if (ret)
+ return;
+
+ led_set_state(dev, LEDST_ON);
+#else
at91_set_pio_output(AT91_PIO_PORTD, 17, 0); /* LED RED */
at91_set_pio_output(AT91_PIO_PORTD, 19, 0); /* LED GREEN */
at91_set_pio_output(AT91_PIO_PORTD, 21, 1); /* LED BLUE */
+#endif
}
int board_late_init(void)
--
2.30.2
[PATCH v2 1/5] configs: at91: sam9x60_curiosity: Sync both defconfig variants
The board has two SD card slots and we have two defconfigs for booting
from either the first (micro SD) named 'sam9x60_curiosity_mmc_defconfig'
or the second (full size SD) named 'sam9x60_curiosity_mmc1_defconfig'.
For comparable Microchip boards (sama5d27-som1-ek, sama5d29-curiosity,
sama7g5ek) with two card slots the defconfigs only differ in BOOTARGS,
BOOTCOMMAND, and ENV_FAT_DEVICE_AND_PART and the same should be the case
for sam9x60_curiosity.
Here the 'mmc1' config has more options enabled to support the raw NAND
flash populated on the board, so the 'mmc' config (for mmc0) was adapted
by enabling additional options, instead of removing options from mmc1.
The 'mem=128M' argument can be dropped from kernel command line, because
it is redundant to memory node in dts in both Linux and U-Boot:
memory@2000 {
reg = <0x2000 0x800>;
};
Signed-off-by: Alexander Dahl
---
Notes:
v1 -> v2:
- reworded commit message
configs/sam9x60_curiosity_mmc_defconfig | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/configs/sam9x60_curiosity_mmc_defconfig
b/configs/sam9x60_curiosity_mmc_defconfig
index 10937d67d7..269f015989 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -23,7 +23,7 @@ CONFIG_FIT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 root=/dev/mmcblk0p2 rw
rootfstype=ext4 rootwait"
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x2100 at91-sam9x60_curiosity.dtb;
fatload mmc 0:1 0x2200 zImage; bootz 0x2200 - 0x2100"
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -38,6 +38,8 @@ CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_NAND_TRIMFFS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
@@ -50,6 +52,8 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_CLK_CCF=y
CONFIG_CLK_AT91=y
@@ -60,10 +64,17 @@ CONFIG_CPU=y
CONFIG_AT91_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_AT91=y
+CONFIG_ATMEL_EBI=y
+CONFIG_MFD_ATMEL_SMC=y
CONFIG_I2C_EEPROM=y
CONFIG_MICROCHIP_FLEXCOM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_DM_NAND_ATMEL=y
+CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
@@ -71,6 +82,8 @@ CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_MCHP_PIT64B_TIMER=y
CONFIG_W1=y
--
2.30.2
[PATCH v2 5/5] ARM: dts: at91: sam9x60-curiosity: Sync gpio button from Linux
Copied as is from Linux Kernel release v6.4.
(dts file is still the same in Linux v6.5-rc7 but was moved to vendor
sub-directories with v6.5-rc1.)
Button works out of the box now if the following config options are
enabled: CONFIG_BUTTON, CONFIG_BUTTON_GPIO, CONFIG_CMD_BUTTON,
CONFIG_DM_GPIO.
Signed-off-by: Alexander Dahl
---
Notes:
v1 -> v2:
- reworded commit message
arch/arm/dts/at91-sam9x60_curiosity.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 244cacfe1b..99867d2bf8 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -7,6 +7,7 @@
* Author: Durai Manickam KR
*/
/dts-v1/;
+#include
#include
#include "sam9x60.dtsi"
@@ -33,6 +34,19 @@
};
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_key_gpio_default>;
+
+ button-user {
+ label = "PB_USER";
+ gpios = < 29 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ wakeup-source;
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -189,6 +203,12 @@
};
};
+ gpio-keys {
+ pinctrl_key_gpio_default: pinctrl-key-gpio {
+ atmel,pins = ;
+ };
+ };
+
leds {
pinctrl_gpio_leds: gpio-leds {
atmel,pins =
[PATCH v2 3/5] ARM: dts: at91: sam9x60-curiosity: Sync LED nodes from Linux
Copied as is from Linux Kernel release v6.4.
(dts file is still the same in Linux v6.5-rc7 but was moved to vendor
sub-directories with v6.5-rc1.)
Signed-off-by: Alexander Dahl
---
arch/arm/dts/at91-sam9x60_curiosity.dts | 30 +
1 file changed, 30 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 2547b4527c..244cacfe1b 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -33,6 +33,28 @@
};
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_gpio_leds>;
+
+ led-red {
+ label = "red";
+ gpios = < 17 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-green {
+ label = "green";
+ gpios = < 19 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-blue {
+ label = "blue";
+ gpios = < 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
onewire_tm: onewire {
gpios = < 14 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -167,6 +189,14 @@
};
};
+ leds {
+ pinctrl_gpio_leds: gpio-leds {
+ atmel,pins = ;
+ };
+ };
+
nand {
pinctrl_nand_oe_we: nand-oe-we-0 {
atmel,pins =
--
2.30.2
[PATCH v2 2/5] configs: at91: sam9x60: Switch to new reset driver
Since commit 61040097a9d1 ("reset: at91: Add reset driver for basic
assert/deassert operations") the compatible "microchip,sam9x60-rstc" for
the sam9x60 reset controller in sam9x60.dtsi is not handled by
CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now. This
resulted in the following error message, when trying to reset from
U-Boot shell:
U-Boot> reset
resetting ...
System reset not supported on this platform
### ERROR ### Please RESET the board ###
Fixed by enabling the new driver in the relevant defconfigs. Tested on
sam9x60-curiosity board. Defconfigs for sam9x60ek adapted in the same
way, but without testing. These should be all sam9x60 boards affected
in U-Boot here.
Signed-off-by: Alexander Dahl
---
Notes:
v1 -> v2:
- re-enabled SYSRESET and SYSRESET_AT91
configs/sam9x60_curiosity_mmc1_defconfig | 2 ++
configs/sam9x60_curiosity_mmc_defconfig | 2 ++
configs/sam9x60ek_mmc_defconfig | 2 ++
configs/sam9x60ek_nandflash_defconfig| 2 ++
configs/sam9x60ek_qspiflash_defconfig| 2 ++
5 files changed, 10 insertions(+)
diff --git a/configs/sam9x60_curiosity_mmc1_defconfig
b/configs/sam9x60_curiosity_mmc1_defconfig
index 21b2cc2edd..bb5e7d8ed0 100644
--- a/configs/sam9x60_curiosity_mmc1_defconfig
+++ b/configs/sam9x60_curiosity_mmc1_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,6 +80,7 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
diff --git a/configs/sam9x60_curiosity_mmc_defconfig
b/configs/sam9x60_curiosity_mmc_defconfig
index 269f015989..a0f819c002 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,6 +80,7 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index 2a1399748c..c70c41c278 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -87,6 +88,7 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
diff --git a/configs/sam9x60ek_nandflash_defconfig
b/configs/sam9x60ek_nandflash_defconfig
index c6c4686658..569b4e747c 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -89,6 +90,7 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig
b/configs/sam9x60ek_qspiflash_defconfig
index ef2e2db8b8..135cd787f9 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -88,6 +89,7 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
--
2.30.2
[PATCH v2 0/5] at91: sam9x60-curiosity: Misc improvements
Hei hei, while working with the sam9x60-curiosity board I noticed some things still have rough edges on U-Boot shell for that device. With these patches (and some more config options enabled), the following commands now work as expected: reset, led, button. The whole series is based on atmel/next. Note: some things here might be useful to implement for other Microchip boards. However I currently only have this one board, and I'm not sure if this is a direction appreciated by Microchip? So you might see all this as suggestion. See notes on patches for specific changes from v1 to v2 and below for summary of the changes. Greets Alex v1 -> v2: - reworded some commit messages - reenabled CONFIG_SYSRESET and CONFIG_SYSRESET_AT91 - split up LED patch in two new patches Alexander Dahl (5): configs: at91: sam9x60_curiosity: Sync both defconfig variants configs: at91: sam9x60: Switch to new reset driver ARM: dts: at91: sam9x60-curiosity: Sync LED nodes from Linux board: sam9x60-curiosity: Let LED subsystem init leds if enabled ARM: dts: at91: sam9x60-curiosity: Sync gpio button from Linux .../dts/at91-sam9x60_curiosity-u-boot.dtsi| 18 +++ arch/arm/dts/at91-sam9x60_curiosity.dts | 50 +++ .../sam9x60_curiosity/sam9x60_curiosity.c | 18 +++ configs/sam9x60_curiosity_mmc1_defconfig | 2 + configs/sam9x60_curiosity_mmc_defconfig | 17 ++- configs/sam9x60ek_mmc_defconfig | 2 + configs/sam9x60ek_nandflash_defconfig | 2 + configs/sam9x60ek_qspiflash_defconfig | 2 + 8 files changed, 110 insertions(+), 1 deletion(-) base-commit: 0498ff933813932ff057cdc314ab46df4a596d06 -- 2.30.2
Re: [PATCH 3/4] at91: sam9x60-curiosity: Add proper LED support
Hello Eugen,
Am Wed, Aug 16, 2023 at 03:49:54PM +0300 schrieb Eugen Hristev:
> Hi Alexander,
>
> On 8/9/23 17:16, Alexander Dahl wrote:
> > Copied dts pieces from Linux Kernel. Support is optional for now, to
> > make it work the following options have to be enabled: CONFIG_LED,
> > CONFIG_LED_GPIO, CONFIG_CMD_LED.
> >
> > Signed-off-by: Alexander Dahl
> > ---
> > .../dts/at91-sam9x60_curiosity-u-boot.dtsi| 18 +++
> > arch/arm/dts/at91-sam9x60_curiosity.dts | 30 +++
> > .../sam9x60_curiosity/sam9x60_curiosity.c | 18 +++
>
> Can you please split the DT changes from the C file changes, namely if you
> bring changes from Linux, add them in a sync commit indicating the commit
> from Linux, and the changes to the board in a separate patch.
Yes, I can do that in v2 of the series.
FWIW this LED stuff and the button stuff from patch 4 is taken from
Linux v6.4 and it has not changed in Linux master since (which is
currently at v6.5-rc6-36-g4853c74bd7ab).
Greets
Alex
>
> Thanks !
>
> > 3 files changed, 66 insertions(+)
> >
> > diff --git a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
> > b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
> > index a1b76e94d1..dd4623311c 100644
> > --- a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
> > +++ b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
> > @@ -20,6 +20,24 @@
> > chosen {
> > bootph-all;
> > };
> > +
> > + config {
> > + u-boot,boot-led = "blue";
> > + };
> > +
> > + leds {
> > + led-red {
> > + default-state = "off";
> > + };
> > +
> > + led-green {
> > + default-state = "off";
> > + };
> > +
> > + led-blue {
> > + default-state = "off";
> > + };
> > + };
> > };
> >{
> > diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
> > b/arch/arm/dts/at91-sam9x60_curiosity.dts
> > index 2547b4527c..244cacfe1b 100644
> > --- a/arch/arm/dts/at91-sam9x60_curiosity.dts
> > +++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
> > @@ -33,6 +33,28 @@
> > };
> > };
> > + leds {
> > + compatible = "gpio-leds";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <_gpio_leds>;
> > +
> > + led-red {
> > + label = "red";
> > + gpios = < 17 GPIO_ACTIVE_HIGH>;
> > + };
> > +
> > + led-green {
> > + label = "green";
> > + gpios = < 19 GPIO_ACTIVE_HIGH>;
> > + };
> > +
> > + led-blue {
> > + label = "blue";
> > + gpios = < 21 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "heartbeat";
> > + };
> > + };
> > +
> > onewire_tm: onewire {
> > gpios = < 14 GPIO_ACTIVE_HIGH>;
> > pinctrl-names = "default";
> > @@ -167,6 +189,14 @@
> > };
> > };
> > + leds {
> > + pinctrl_gpio_leds: gpio-leds {
> > + atmel,pins = > AT91_PINCTRL_NONE
> > + AT91_PIOD 19 AT91_PERIPH_GPIO
> > AT91_PINCTRL_NONE
> > + AT91_PIOD 21 AT91_PERIPH_GPIO
> > AT91_PINCTRL_NONE>;
> > + };
> > + };
> > +
> > nand {
> > pinctrl_nand_oe_we: nand-oe-we-0 {
> > atmel,pins =
> > diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
> > b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
> > index 0fe0de9fde..f53d359404 100644
> > --- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
> > +++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
> > @@ -9,6 +9,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -18,6 +19,7 @@
> > #include
> > #include
> > #include
> > +#include
> > extern void at91_pda_detect(void);
> > @@ -27,9 +29,25 @@ void at91_prepare_cpu_var(void);
> > static void board_leds_init(void)
> > {
> > +#if CONFIG_IS_ENABLED(LED)
> > + const char *led_name;
> > + struct udevice *dev;
> > + int ret;
> > +
> > + led_name = ofnode_conf_read_str("u-boot,boot-led");
> > + if (!led_name)
> > + return;
> > +
> > + ret = led_get_by_label(led_name, );
> > + if (ret)
> > + return;
> > +
> > + led_set_state(dev, LEDST_ON);
> > +#else
> > at91_set_pio_output(AT91_PIO_PORTD, 17, 0); /* LED RED */
> > at91_set_pio_output(AT91_PIO_PORTD, 19, 0); /* LED GREEN */
> > at91_set_pio_output(AT91_PIO_PORTD, 21, 1); /* LED BLUE */
> > +#endif
> > }
> > int board_late_init(void)
>
Re: [PATCH 2/4] configs: at91: sam9x60: Switch to new reset driver
Hei hei,
Am Wed, Aug 16, 2023 at 03:48:25PM +0300 schrieb Eugen Hristev:
>
> Hi Alexander,
>
> On 8/9/23 17:16, Alexander Dahl wrote:
> > Since commit 61040097a9d1 ("reset: at91: Add reset driver for basic
> > assert/deassert operations") the compatible "microchip,sam9x60-rstc" for
> > the sam9x60 reset controller in sam9x60.dtsi is not handled by
> > CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now. This
> > resulted in the following error message, when trying to reset from
> > U-Boot shell:
> >
> > U-Boot> reset
> > resetting ...
> > System reset not supported on this platform
> > ### ERROR ### Please RESET the board ###
> >
> > Fixed with the switch to the new driver. Tested on sam9x60-curiosity
> > board. Defconfigs for sam9x60ek adapted in the same way, but without
> > testing. These should be all sam9x60 boards affected in U-Boot here.
>
> From what I remember from the top of my head, it makes sense to use the new
> reset driver, however, you should not remove the old SYSRESET driver,
> because that driver handles different kind of resets on the SoC and PHYs.
> Can you double check that?
Had a look into it and TBH it's very confusing to me. I found no help
in documentation. There are two different uclass which from the
outside seem to do the same thing. The Kconfig help texts do not
explain what the purpose is of one over the other. As a user this
creates very bad user experience: Do I need one or the other or both?
Then there's CONFIG_SYSRESET_CMD_RESET which implicates there are more
than one possible implementations for cmd 'reset' … but which is the
right one. The help text does not explain.
I though sysreset is old and reset is new and assumed things get
migrated like in other subsystems. But here it seems we have two
entangled subsystems where one hooks into the other (as reset_at91
does).
So, I can of course _just_ enable CONFIG_RESET_AT91 and hope for the
best here, keeping SYSRESET_CMD_RESET as is … but it would be very
nice if someone else could explain the what and why in help texts and
documentation!
Greets
Alex
P.S.: I would have added sysreset or reset subsystem maintainer to Cc,
but according to MAINTAINERS there is none.
> > Signed-off-by: Alexander Dahl
> > ---
> > configs/sam9x60_curiosity_mmc1_defconfig | 4 ++--
> > configs/sam9x60_curiosity_mmc_defconfig | 4 ++--
> > configs/sam9x60ek_mmc_defconfig | 4 ++--
> > configs/sam9x60ek_nandflash_defconfig| 4 ++--
> > configs/sam9x60ek_qspiflash_defconfig| 4 ++--
> > 5 files changed, 10 insertions(+), 10 deletions(-)
> >
> > diff --git a/configs/sam9x60_curiosity_mmc1_defconfig
> > b/configs/sam9x60_curiosity_mmc1_defconfig
> > index 21b2cc2edd..e8781b363b 100644
> > --- a/configs/sam9x60_curiosity_mmc1_defconfig
> > +++ b/configs/sam9x60_curiosity_mmc1_defconfig
> > @@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
> > CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
> > CONFIG_SYS_PROMPT="U-Boot> "
> > CONFIG_OF_LIBFDT_OVERLAY=y
> > +CONFIG_DM_RESET=y
> > CONFIG_DEBUG_UART_BASE=0xf200
> > CONFIG_DEBUG_UART_CLOCK=2
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > @@ -79,11 +80,10 @@ CONFIG_PHY_MICREL=y
> > CONFIG_MACB=y
> > CONFIG_PINCTRL=y
> > CONFIG_PINCTRL_AT91=y
> > +CONFIG_RESET_AT91=y
> > CONFIG_DM_SERIAL=y
> > CONFIG_DEBUG_UART_ANNOUNCE=y
> > CONFIG_ATMEL_USART=y
> > -CONFIG_SYSRESET=y
> > -CONFIG_SYSRESET_AT91=y
> > CONFIG_TIMER=y
> > CONFIG_MCHP_PIT64B_TIMER=y
> > CONFIG_W1=y
> > diff --git a/configs/sam9x60_curiosity_mmc_defconfig
> > b/configs/sam9x60_curiosity_mmc_defconfig
> > index 269f015989..0f57588d8b 100644
> > --- a/configs/sam9x60_curiosity_mmc_defconfig
> > +++ b/configs/sam9x60_curiosity_mmc_defconfig
> > @@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
> > CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
> > CONFIG_SYS_PROMPT="U-Boot> "
> > CONFIG_OF_LIBFDT_OVERLAY=y
> > +CONFIG_DM_RESET=y
> > CONFIG_DEBUG_UART_BASE=0xf200
> > CONFIG_DEBUG_UART_CLOCK=2
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > @@ -79,11 +80,10 @@ CONFIG_PHY_MICREL=y
> > CONFIG_MACB=y
> > CONFIG_PINCTRL=y
> > CONFIG_PINCTRL_AT91=y
> > +CONFIG_RESET_AT91=y
> > CONFIG_DM_SERIAL=y
> > CONFIG_DEBUG_UART_ANNOUNCE=y
> > CONFIG_ATMEL_USART=y
> > -CONFIG_SYSRESET=y
> > -CONFIG_SYSRESET_AT91=y
> > CONFIG_TIMER=y
> > CONFIG_MCHP_PIT64B_TIMER=y
> > CONFIG_W1=y
> > diff
Re: [PATCH 1/4] configs: at91: sam9x60_curiosity: Sync both defconfig variants
Hello Eugen,
thanks for your review, my comments below …
Am Wed, Aug 16, 2023 at 03:46:09PM +0300 schrieb Eugen Hristev:
> Hi Alexander,
>
> On 8/9/23 17:16, Alexander Dahl wrote:
> > The board has two SD card slots and we have two defconfigs for booting
> > from either the first (micro SD) named 'sam9x60_curiosity_mmc_defconfig'
> > or the second (full size SD) named 'sam9x60_curiosity_mmc1_defconfig'.
> > For comparable Microchip boards (sama5d27-som1-ek, sama5d29-curiosity,
> > sama7g5ek) with two card slots the defconfigs only differ in BOOTARGS,
> > BOOTCOMMAND, and ENV_FAT_DEVICE_AND_PART and the same should be the case
> > for sam9x60_curiosity.
>
> To shed some light on this: the defconfigs for different at91 boards should
> differ only in terms of *where the env is stored*, but all the drivers
> should be available in all defconfigs.
> The `where it boots from` sometimes is not related to the name of the
> defconfig, because e.g. we have board_qspiflash_defconfigs, which store the
> env in the qspi flash, but do not boot Linux from it, main reason is that
> the QSPI flash is very small (8 Mbytes e.g.)
> Most boards have a simple boot example from the same media as where the env
> is stored, but it's not always the case as seen above.
Nice to know.
> > Here the 'mmc1' config has more options enabled to support the raw NAND
> > flash populated on the board, so the 'mmc' config (for mmc0) was adapted
> > by enabling additional options, instead of removing options from mmc1.
> >
> > Signed-off-by: Alexander Dahl
> > ---
> > configs/sam9x60_curiosity_mmc_defconfig | 15 ++-
> > 1 file changed, 14 insertions(+), 1 deletion(-)
> >
> > diff --git a/configs/sam9x60_curiosity_mmc_defconfig
> > b/configs/sam9x60_curiosity_mmc_defconfig
> > index 10937d67d7..269f015989 100644
> > --- a/configs/sam9x60_curiosity_mmc_defconfig
> > +++ b/configs/sam9x60_curiosity_mmc_defconfig
> > @@ -23,7 +23,7 @@ CONFIG_FIT=y
> > CONFIG_SD_BOOT=y
> > CONFIG_BOOTDELAY=3
> > CONFIG_USE_BOOTARGS=y
> > -CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 root=/dev/mmcblk0p2 rw
> > rootfstype=ext4 rootwait"
> > +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
>
> Have you checked the Linux DT if the memory is 128M hence the `mem=128M` is
> redundant ?
In Linux v6.4 the node looks like this:
27 memory@2000 {
28 reg = <0x2000 0x800>;
29 };
The 0x800 are equal to 134217728 aka 128M, so that cmdline arg is
redundant. The sam9x60_curiosity_mmc1_defconfig also does not have
it. I'll add a note on this to the commit message in v2 of the
series.
Greets
Alex
> > CONFIG_USE_BOOTCOMMAND=y
> > CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x2100
> > at91-sam9x60_curiosity.dtb; fatload mmc 0:1 0x2200 zImage; bootz
> > 0x2200 - 0x2100"
> > CONFIG_SYS_CONSOLE_IS_IN_ENV=y
> > @@ -38,6 +38,8 @@ CONFIG_CMD_DM=y
> > CONFIG_CMD_GPIO=y
> > CONFIG_CMD_I2C=y
> > CONFIG_CMD_MMC=y
> > +CONFIG_CMD_NAND=y
> > +CONFIG_CMD_NAND_TRIMFFS=y
> > # CONFIG_CMD_SETEXPR is not set
> > CONFIG_CMD_DHCP=y
> > CONFIG_BOOTP_BOOTFILESIZE=y
> > @@ -50,6 +52,8 @@ CONFIG_OF_CONTROL=y
> > CONFIG_ENV_IS_IN_FAT=y
> > CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
> > CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> > +CONFIG_REGMAP=y
> > +CONFIG_SYSCON=y
> > CONFIG_CLK=y
> > CONFIG_CLK_CCF=y
> > CONFIG_CLK_AT91=y
> > @@ -60,10 +64,17 @@ CONFIG_CPU=y
> > CONFIG_AT91_GPIO=y
> > CONFIG_DM_I2C=y
> > CONFIG_SYS_I2C_AT91=y
> > +CONFIG_ATMEL_EBI=y
> > +CONFIG_MFD_ATMEL_SMC=y
> > CONFIG_I2C_EEPROM=y
> > CONFIG_MICROCHIP_FLEXCOM=y
> > CONFIG_MMC_SDHCI=y
> > CONFIG_MMC_SDHCI_ATMEL=y
> > +CONFIG_MTD=y
> > +CONFIG_DM_MTD=y
> > +CONFIG_MTD_RAW_NAND=y
> > +CONFIG_DM_NAND_ATMEL=y
> > +CONFIG_SYS_NAND_ONFI_DETECTION=y
> > CONFIG_PHY_MICREL=y
> > CONFIG_MACB=y
> > CONFIG_PINCTRL=y
> > @@ -71,6 +82,8 @@ CONFIG_PINCTRL_AT91=y
> > CONFIG_DM_SERIAL=y
> > CONFIG_DEBUG_UART_ANNOUNCE=y
> > CONFIG_ATMEL_USART=y
> > +CONFIG_SYSRESET=y
> > +CONFIG_SYSRESET_AT91=y
> > CONFIG_TIMER=y
> > CONFIG_MCHP_PIT64B_TIMER=y
> > CONFIG_W1=y
>
[PATCH 3/4] at91: sam9x60-curiosity: Add proper LED support
Copied dts pieces from Linux Kernel. Support is optional for now, to
make it work the following options have to be enabled: CONFIG_LED,
CONFIG_LED_GPIO, CONFIG_CMD_LED.
Signed-off-by: Alexander Dahl
---
.../dts/at91-sam9x60_curiosity-u-boot.dtsi| 18 +++
arch/arm/dts/at91-sam9x60_curiosity.dts | 30 +++
.../sam9x60_curiosity/sam9x60_curiosity.c | 18 +++
3 files changed, 66 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
index a1b76e94d1..dd4623311c 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
+++ b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
@@ -20,6 +20,24 @@
chosen {
bootph-all;
};
+
+ config {
+ u-boot,boot-led = "blue";
+ };
+
+ leds {
+ led-red {
+ default-state = "off";
+ };
+
+ led-green {
+ default-state = "off";
+ };
+
+ led-blue {
+ default-state = "off";
+ };
+ };
};
{
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 2547b4527c..244cacfe1b 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -33,6 +33,28 @@
};
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_gpio_leds>;
+
+ led-red {
+ label = "red";
+ gpios = < 17 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-green {
+ label = "green";
+ gpios = < 19 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-blue {
+ label = "blue";
+ gpios = < 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
onewire_tm: onewire {
gpios = < 14 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -167,6 +189,14 @@
};
};
+ leds {
+ pinctrl_gpio_leds: gpio-leds {
+ atmel,pins = ;
+ };
+ };
+
nand {
pinctrl_nand_oe_we: nand-oe-we-0 {
atmel,pins =
diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
index 0fe0de9fde..f53d359404 100644
--- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
+++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -18,6 +19,7 @@
#include
#include
#include
+#include
extern void at91_pda_detect(void);
@@ -27,9 +29,25 @@ void at91_prepare_cpu_var(void);
static void board_leds_init(void)
{
+#if CONFIG_IS_ENABLED(LED)
+ const char *led_name;
+ struct udevice *dev;
+ int ret;
+
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
+ if (!led_name)
+ return;
+
+ ret = led_get_by_label(led_name, );
+ if (ret)
+ return;
+
+ led_set_state(dev, LEDST_ON);
+#else
at91_set_pio_output(AT91_PIO_PORTD, 17, 0); /* LED RED */
at91_set_pio_output(AT91_PIO_PORTD, 19, 0); /* LED GREEN */
at91_set_pio_output(AT91_PIO_PORTD, 21, 1); /* LED BLUE */
+#endif
}
int board_late_init(void)
--
2.30.2
[PATCH 4/4] ARM: dts: at91: sam9x60-curiosity: Add user button support
Copied as is from Linux Kernel. Works out of the box if the following
config options are enabled: CONFIG_BUTTON, CONFIG_BUTTON_GPIO,
CONFIG_CMD_BUTTON, CONFIG_DM_GPIO.
Signed-off-by: Alexander Dahl
---
arch/arm/dts/at91-sam9x60_curiosity.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 244cacfe1b..99867d2bf8 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -7,6 +7,7 @@
* Author: Durai Manickam KR
*/
/dts-v1/;
+#include
#include
#include "sam9x60.dtsi"
@@ -33,6 +34,19 @@
};
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_key_gpio_default>;
+
+ button-user {
+ label = "PB_USER";
+ gpios = < 29 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ wakeup-source;
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -189,6 +203,12 @@
};
};
+ gpio-keys {
+ pinctrl_key_gpio_default: pinctrl-key-gpio {
+ atmel,pins = ;
+ };
+ };
+
leds {
pinctrl_gpio_leds: gpio-leds {
atmel,pins =
[PATCH 0/4] at91: sam9x60-curiosity: Misc improvements
Hei hei, while working with the sam9x60-curiosity board I noticed some things still have rough edges on U-Boot shell for that device. With these patches (and some more config options enabled), the following commands now work as expected: reset, led, button. The whole series is based on atmel/next. Note: some things here might be useful to implement for other Microchip boards. However I currently only have this one board, and I'm not sure if this is a direction appreciated by Microchip? So you might see all this as suggestion. Greets Alex Alexander Dahl (4): configs: at91: sam9x60_curiosity: Sync both defconfig variants configs: at91: sam9x60: Switch to new reset driver at91: sam9x60-curiosity: Add proper LED support ARM: dts: at91: sam9x60-curiosity: Add user button support .../dts/at91-sam9x60_curiosity-u-boot.dtsi| 18 +++ arch/arm/dts/at91-sam9x60_curiosity.dts | 50 +++ .../sam9x60_curiosity/sam9x60_curiosity.c | 18 +++ configs/sam9x60_curiosity_mmc1_defconfig | 4 +- configs/sam9x60_curiosity_mmc_defconfig | 15 +- configs/sam9x60ek_mmc_defconfig | 4 +- configs/sam9x60ek_nandflash_defconfig | 4 +- configs/sam9x60ek_qspiflash_defconfig | 4 +- 8 files changed, 108 insertions(+), 9 deletions(-) base-commit: 87d1cac49d265ead979ff75bda36c45fa9025193 -- 2.30.2
[PATCH 2/4] configs: at91: sam9x60: Switch to new reset driver
Since commit 61040097a9d1 ("reset: at91: Add reset driver for basic
assert/deassert operations") the compatible "microchip,sam9x60-rstc" for
the sam9x60 reset controller in sam9x60.dtsi is not handled by
CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now. This
resulted in the following error message, when trying to reset from
U-Boot shell:
U-Boot> reset
resetting ...
System reset not supported on this platform
### ERROR ### Please RESET the board ###
Fixed with the switch to the new driver. Tested on sam9x60-curiosity
board. Defconfigs for sam9x60ek adapted in the same way, but without
testing. These should be all sam9x60 boards affected in U-Boot here.
Signed-off-by: Alexander Dahl
---
configs/sam9x60_curiosity_mmc1_defconfig | 4 ++--
configs/sam9x60_curiosity_mmc_defconfig | 4 ++--
configs/sam9x60ek_mmc_defconfig | 4 ++--
configs/sam9x60ek_nandflash_defconfig| 4 ++--
configs/sam9x60ek_qspiflash_defconfig| 4 ++--
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/configs/sam9x60_curiosity_mmc1_defconfig
b/configs/sam9x60_curiosity_mmc1_defconfig
index 21b2cc2edd..e8781b363b 100644
--- a/configs/sam9x60_curiosity_mmc1_defconfig
+++ b/configs/sam9x60_curiosity_mmc1_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,11 +80,10 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_MCHP_PIT64B_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60_curiosity_mmc_defconfig
b/configs/sam9x60_curiosity_mmc_defconfig
index 269f015989..0f57588d8b 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,11 +80,10 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_MCHP_PIT64B_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index 2a1399748c..446caceba0 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -87,14 +88,13 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60ek_nandflash_defconfig
b/configs/sam9x60ek_nandflash_defconfig
index c6c4686658..acaa16ee49 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -89,14 +90,13 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig
b/configs/sam9x60ek_qspiflash_defconfig
index ef2e2db8b8..6fb79214e5 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -88,14 +89,13 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=
[PATCH 1/4] configs: at91: sam9x60_curiosity: Sync both defconfig variants
The board has two SD card slots and we have two defconfigs for booting from either the first (micro SD) named 'sam9x60_curiosity_mmc_defconfig' or the second (full size SD) named 'sam9x60_curiosity_mmc1_defconfig'. For comparable Microchip boards (sama5d27-som1-ek, sama5d29-curiosity, sama7g5ek) with two card slots the defconfigs only differ in BOOTARGS, BOOTCOMMAND, and ENV_FAT_DEVICE_AND_PART and the same should be the case for sam9x60_curiosity. Here the 'mmc1' config has more options enabled to support the raw NAND flash populated on the board, so the 'mmc' config (for mmc0) was adapted by enabling additional options, instead of removing options from mmc1. Signed-off-by: Alexander Dahl --- configs/sam9x60_curiosity_mmc_defconfig | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index 10937d67d7..269f015989 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -23,7 +23,7 @@ CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x2100 at91-sam9x60_curiosity.dtb; fatload mmc 0:1 0x2200 zImage; bootz 0x2200 - 0x2100" CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -38,6 +38,8 @@ CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y @@ -50,6 +52,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y @@ -60,10 +64,17 @@ CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_AT91=y +CONFIG_ATMEL_EBI=y +CONFIG_MFD_ATMEL_SMC=y CONFIG_I2C_EEPROM=y CONFIG_MICROCHIP_FLEXCOM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_DM_NAND_ATMEL=y +CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_PHY_MICREL=y CONFIG_MACB=y CONFIG_PINCTRL=y @@ -71,6 +82,8 @@ CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y CONFIG_W1=y -- 2.30.2
Re: [PATCH 0/2] mtd: nand: raw: atmel: R/B gpio on sam9x60
Hello, just a short supplement … Am Wed, Aug 09, 2023 at 09:40:15AM +0200 schrieb Alexander Dahl: > Hello everyone, > > I had a closer look into the SAMA5D2 Series Datasheet and the SAM9X60 > Data Sheet again. See below. > > Am Tue, Aug 08, 2023 at 05:00:48PM +0200 schrieb Alexander Dahl: > > Hello Mihai, > > > > Am Tue, Aug 08, 2023 at 01:40:26PM + schrieb mihai.s...@microchip.com: > > > Hi Alex, > > > > > > Please find bellow my answer: > > > > > > -- > > > > > > Added Mihai who tested this a lot at some point in time > > > > > > Eugen > > > > > > On 8/8/23 16:02, Alexander Dahl wrote: > > > > Hello everyone, > > > > > > > > this is a patch series wtih some real fixes _and_ a question or some > > > > kind of support request in the cover letter. I would be happy if > > > > anyone could read the cover letter carefully and answer to that one > > > > what might be the problem I see. O:-) > > > > > > > > I'm currently working on the sam9x60-curiosity board and especially > > > > trying to get it booting from onboard raw NAND flash. As reported in > > > > my last series I got the flash recognized already. However > > > > interacting with it was terribly slow, because nand_wait_ready() > > > > calling > > > > atmel_nand_dev_ready() ran into a 400ms timeout in several occasions, > > > > especially when reading from the device. Reading a single block > > > > triggered that timeout two times per page, which summed up to over 50 > > > > seconds for 64 × 4096 = 256k Bytes! > > > > > > > > (You can have U-Boot print that warning from nand_wait_ready() by > > > > increasing the console log level to at least "warn".) > > > > > > > > Note: the dts from atmel/next seems correct to me, I double checked > > > > that again. My own debug log messages showed the GPIO is accessed, > > > > and if you add enough debug messages sometimes the timeout is not > > > > reached, so I'm sure the NAND chip eventually switches that R/B line > > > > and the code correctly sees that, that line level change however takes > > > > ages, something between 400ms and 500ms most of the times. > > > > > > > > I vaguely remembered on SAMA5D2 the old atmel raw nand driver is used > > > > which does not support reading the R/B signal, but nevertheless works. > > > > I'm not familiar in detail with those raw NAND flash chips, but as far > > > > as I can understand, there are other ways to determine if the chip is > > > > ready or busy. So after I removed that rb-gpio parameter from > > > > 'at91-sam9x60_curiosity.dts' I ran into the bug fixed by patch 2. > > > > Maybe I should add: currently there are two different drivers for > > atmel raw nand controllers in U-Boot, the old non-DM driver used by > > sam9g20 or sama5 based boards for example and a new driver used by > > sam9x60 based boards. We are talking about sam9x60 and the new driver > > in 'drivers/mtd/nand/raw/atmel/nand-controller.c' here. > > The old one is enabled by CONFIG_NAND_ATMEL, the new one by > CONFIG_DM_NAND_ATMEL instead. > > > > > With that patch applied _and_ rb-gpio still removed from dts, raw NAND > > > > access is reasonably fast on sam9x60-curiosity board. (You might want > > > > to rebase to atmel/next for testing this.) Not sure if I should send > > > > a patch for that dts change, because I suppose it's a workaround only > > > > and not addressing the actual cause? > > > > > > > > I think the fix is correct in itself, I tested different combinations > > > > and compared with the driver in Linux, however … > > > > > > > > Can anyone explain to me, why flash access is sooo slow if the R/B > > > > gpio is used? Especially in comparision to Linux, where I don't need > > > > to remove that thing from dts and it works reasonably fast? > > > > > > // I'm sorry for quoting (email is sent from Outlook) > > > # Please add in your board dts: atmel,rb = <0> > > > > Although the new U-Boot driver tests for that, it is not documented in > > U-Boot devicetree bindings. According to Linux kernel (v6.4) device > > tree binding documentation it is only meaningful for sama5. Those > > binding documentation was added to
Re: [PATCH 0/2] mtd: nand: raw: atmel: R/B gpio on sam9x60
Hello everyone, I had a closer look into the SAMA5D2 Series Datasheet and the SAM9X60 Data Sheet again. See below. Am Tue, Aug 08, 2023 at 05:00:48PM +0200 schrieb Alexander Dahl: > Hello Mihai, > > Am Tue, Aug 08, 2023 at 01:40:26PM + schrieb mihai.s...@microchip.com: > > Hi Alex, > > > > Please find bellow my answer: > > > > -- > > > > Added Mihai who tested this a lot at some point in time > > > > Eugen > > > > On 8/8/23 16:02, Alexander Dahl wrote: > > > Hello everyone, > > > > > > this is a patch series wtih some real fixes _and_ a question or some > > > kind of support request in the cover letter. I would be happy if > > > anyone could read the cover letter carefully and answer to that one > > > what might be the problem I see. O:-) > > > > > > I'm currently working on the sam9x60-curiosity board and especially > > > trying to get it booting from onboard raw NAND flash. As reported in > > > my last series I got the flash recognized already. However > > > interacting with it was terribly slow, because nand_wait_ready() > > > calling > > > atmel_nand_dev_ready() ran into a 400ms timeout in several occasions, > > > especially when reading from the device. Reading a single block > > > triggered that timeout two times per page, which summed up to over 50 > > > seconds for 64 × 4096 = 256k Bytes! > > > > > > (You can have U-Boot print that warning from nand_wait_ready() by > > > increasing the console log level to at least "warn".) > > > > > > Note: the dts from atmel/next seems correct to me, I double checked > > > that again. My own debug log messages showed the GPIO is accessed, > > > and if you add enough debug messages sometimes the timeout is not > > > reached, so I'm sure the NAND chip eventually switches that R/B line > > > and the code correctly sees that, that line level change however takes > > > ages, something between 400ms and 500ms most of the times. > > > > > > I vaguely remembered on SAMA5D2 the old atmel raw nand driver is used > > > which does not support reading the R/B signal, but nevertheless works. > > > I'm not familiar in detail with those raw NAND flash chips, but as far > > > as I can understand, there are other ways to determine if the chip is > > > ready or busy. So after I removed that rb-gpio parameter from > > > 'at91-sam9x60_curiosity.dts' I ran into the bug fixed by patch 2. > > Maybe I should add: currently there are two different drivers for > atmel raw nand controllers in U-Boot, the old non-DM driver used by > sam9g20 or sama5 based boards for example and a new driver used by > sam9x60 based boards. We are talking about sam9x60 and the new driver > in 'drivers/mtd/nand/raw/atmel/nand-controller.c' here. The old one is enabled by CONFIG_NAND_ATMEL, the new one by CONFIG_DM_NAND_ATMEL instead. > > > With that patch applied _and_ rb-gpio still removed from dts, raw NAND > > > access is reasonably fast on sam9x60-curiosity board. (You might want > > > to rebase to atmel/next for testing this.) Not sure if I should send > > > a patch for that dts change, because I suppose it's a workaround only > > > and not addressing the actual cause? > > > > > > I think the fix is correct in itself, I tested different combinations > > > and compared with the driver in Linux, however … > > > > > > Can anyone explain to me, why flash access is sooo slow if the R/B > > > gpio is used? Especially in comparision to Linux, where I don't need > > > to remove that thing from dts and it works reasonably fast? > > > > // I'm sorry for quoting (email is sent from Outlook) > > # Please add in your board dts: atmel,rb = <0> > > Although the new U-Boot driver tests for that, it is not documented in > U-Boot devicetree bindings. According to Linux kernel (v6.4) device > tree binding documentation it is only meaningful for sama5. Those > binding documentation was added to Linux back in 2019 by Boris > Brezillon. And that line is not present in the dts file for > sam9x60-curiosity in Linux, so access is fast on Linux without that > line (this is the part I don't understand yet). > > From what I saw in datasheets sam9x60 and sama5d2 have different > controllers (named 'SMC' and 'HSMC') and the U-Boot driver reflects > that. That's why I did not add 'atmel,rb' to dts before, I though SMC > is the older one which does not support native R/B line handling? &g
Re: [PATCH 2/2] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
Hello Michael,
Am Tue, Aug 08, 2023 at 03:49:45PM +0200 schrieb Michael Nazzareno Trimarchi:
> Hi
>
> On Tue, Aug 8, 2023 at 3:03 PM Alexander Dahl wrote:
> >
> > Adapt behaviour to Linux kernel driver.
> >
> > The return value of gpio_request_by_name_nodev() was not checked before,
> > and thus in case 'rb-gpios' was missing in DT, rb.type was set to
> > ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
> > example (on sam9x60-curiosity with the line removed from dts):
> >
> > NAND: Could not find valid ONFI parameter page; aborting
> > device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
> > Macronix NAND 512MiB 3,3V 8-bit
> > 512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
> > atmel-nand-controller nand-controller: NAND scan failed: -22
> > Failed to probe nand driver (err = -22)
> > Failed to initialize NAND controller. (error -22)
> > 0 MiB
> >
> > Note: not having that gpio assigned in dts is fine, the driver does not
> > override nand_chip->dev_ready() then and a generic solution is used.
> >
> > Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
> > Signed-off-by: Alexander Dahl
> > ---
> > drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
> > 1 file changed, 7 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
> > b/drivers/mtd/nand/raw/atmel/nand-controller.c
> > index 2b29c8def6..8e745a5111 100644
> > --- a/drivers/mtd/nand/raw/atmel/nand-controller.c
> > +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
> > @@ -1600,10 +1600,13 @@ static struct atmel_nand *atmel_nand_create(struct
> > atmel_nand_controller *nc,
> > nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB;
> > nand->cs[i].rb.id = val;
> > } else {
> > - gpio_request_by_name_nodev(np, "rb-gpios", 0,
> > - >cs[i].rb.gpio,
> > - GPIOD_IS_IN);
> > - nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
> > + ret = gpio_request_by_name_nodev(np, "rb-gpios", 0,
> > +
> > >cs[i].rb.gpio,
> > +GPIOD_IS_IN);
> > + if (ret)
> > + dev_err(nc->dev, "Failed to get R/B gpio
> > (err = %d)\n", ret);
>
> Should not then an error here
Different log level or no message at all?
Note: Linux prints the same message with error level in that case.
Greets
Alex
>
> Michael
>
> > + else
> > + nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
> > }
> >
> > gpio_request_by_name_nodev(np, "cs-gpios", 0,
> > --
> > 2.30.2
> >
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> mich...@amarulasolutions.com
> __
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> i...@amarulasolutions.com
> www.amarulasolutions.com
Re: [PATCH 0/2] mtd: nand: raw: atmel: R/B gpio on sam9x60
Hello Mihai, Am Tue, Aug 08, 2023 at 01:40:26PM + schrieb mihai.s...@microchip.com: > Hi Alex, > > Please find bellow my answer: > > -- > > Added Mihai who tested this a lot at some point in time > > Eugen > > On 8/8/23 16:02, Alexander Dahl wrote: > > Hello everyone, > > > > this is a patch series wtih some real fixes _and_ a question or some > > kind of support request in the cover letter. I would be happy if > > anyone could read the cover letter carefully and answer to that one > > what might be the problem I see. O:-) > > > > I'm currently working on the sam9x60-curiosity board and especially > > trying to get it booting from onboard raw NAND flash. As reported in > > my last series I got the flash recognized already. However > > interacting with it was terribly slow, because nand_wait_ready() > > calling > > atmel_nand_dev_ready() ran into a 400ms timeout in several occasions, > > especially when reading from the device. Reading a single block > > triggered that timeout two times per page, which summed up to over 50 > > seconds for 64 × 4096 = 256k Bytes! > > > > (You can have U-Boot print that warning from nand_wait_ready() by > > increasing the console log level to at least "warn".) > > > > Note: the dts from atmel/next seems correct to me, I double checked > > that again. My own debug log messages showed the GPIO is accessed, > > and if you add enough debug messages sometimes the timeout is not > > reached, so I'm sure the NAND chip eventually switches that R/B line > > and the code correctly sees that, that line level change however takes > > ages, something between 400ms and 500ms most of the times. > > > > I vaguely remembered on SAMA5D2 the old atmel raw nand driver is used > > which does not support reading the R/B signal, but nevertheless works. > > I'm not familiar in detail with those raw NAND flash chips, but as far > > as I can understand, there are other ways to determine if the chip is > > ready or busy. So after I removed that rb-gpio parameter from > > 'at91-sam9x60_curiosity.dts' I ran into the bug fixed by patch 2. Maybe I should add: currently there are two different drivers for atmel raw nand controllers in U-Boot, the old non-DM driver used by sam9g20 or sama5 based boards for example and a new driver used by sam9x60 based boards. We are talking about sam9x60 and the new driver in 'drivers/mtd/nand/raw/atmel/nand-controller.c' here. > > > > With that patch applied _and_ rb-gpio still removed from dts, raw NAND > > access is reasonably fast on sam9x60-curiosity board. (You might want > > to rebase to atmel/next for testing this.) Not sure if I should send > > a patch for that dts change, because I suppose it's a workaround only > > and not addressing the actual cause? > > > > I think the fix is correct in itself, I tested different combinations > > and compared with the driver in Linux, however … > > > > Can anyone explain to me, why flash access is sooo slow if the R/B > > gpio is used? Especially in comparision to Linux, where I don't need > > to remove that thing from dts and it works reasonably fast? > > // I'm sorry for quoting (email is sent from Outlook) > # Please add in your board dts: atmel,rb = <0> Although the new U-Boot driver tests for that, it is not documented in U-Boot devicetree bindings. According to Linux kernel (v6.4) device tree binding documentation it is only meaningful for sama5. Those binding documentation was added to Linux back in 2019 by Boris Brezillon. And that line is not present in the dts file for sam9x60-curiosity in Linux, so access is fast on Linux without that line (this is the part I don't understand yet). >From what I saw in datasheets sam9x60 and sama5d2 have different controllers (named 'SMC' and 'HSMC') and the U-Boot driver reflects that. That's why I did not add 'atmel,rb' to dts before, I though SMC is the older one which does not support native R/B line handling? (And because I took it from U-Boot sam9x60ek.dts which also does not have it.) Nevertheless, I tried to add it now in U-Boot as you suggested (although without adapting pinctrl), and to my suprise it works … o.O Trying the same in Linux leads to not finding a NAND device and thus failing of the atmel-nand-controller driver probe. (Note: all this while booting from SD card, so at91bootstrap should not interfere, because it does not touch nand.) What I did not test yet: - How it behaves in U-Boot when also adapting pinctrl - How other combinations of adaptions to dts behave in Linux Sending this mail now anyway, it's too long alr
[PATCH 1/2] mtd: nand: raw: atmel: Remove duplicate line
Signed-off-by: Alexander Dahl --- drivers/mtd/nand/raw/atmel/nand-controller.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c index 9873d11254..2b29c8def6 100644 --- a/drivers/mtd/nand/raw/atmel/nand-controller.c +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c @@ -1474,7 +1474,6 @@ static void atmel_nand_init(struct atmel_nand_controller *nc, mtd->dev->parent = nc->dev; nand->controller = >base; - nand->controller = >base; chip->cmd_ctrl = atmel_nand_cmd_ctrl; chip->read_byte = atmel_nand_read_byte; -- 2.30.2
[PATCH 0/2] mtd: nand: raw: atmel: R/B gpio on sam9x60
Hello everyone, this is a patch series wtih some real fixes _and_ a question or some kind of support request in the cover letter. I would be happy if anyone could read the cover letter carefully and answer to that one what might be the problem I see. O:-) I'm currently working on the sam9x60-curiosity board and especially trying to get it booting from onboard raw NAND flash. As reported in my last series I got the flash recognized already. However interacting with it was terribly slow, because nand_wait_ready() calling atmel_nand_dev_ready() ran into a 400ms timeout in several occasions, especially when reading from the device. Reading a single block triggered that timeout two times per page, which summed up to over 50 seconds for 64 × 4096 = 256k Bytes! (You can have U-Boot print that warning from nand_wait_ready() by increasing the console log level to at least "warn".) Note: the dts from atmel/next seems correct to me, I double checked that again. My own debug log messages showed the GPIO is accessed, and if you add enough debug messages sometimes the timeout is not reached, so I'm sure the NAND chip eventually switches that R/B line and the code correctly sees that, that line level change however takes ages, something between 400ms and 500ms most of the times. I vaguely remembered on SAMA5D2 the old atmel raw nand driver is used which does not support reading the R/B signal, but nevertheless works. I'm not familiar in detail with those raw NAND flash chips, but as far as I can understand, there are other ways to determine if the chip is ready or busy. So after I removed that rb-gpio parameter from 'at91-sam9x60_curiosity.dts' I ran into the bug fixed by patch 2. With that patch applied _and_ rb-gpio still removed from dts, raw NAND access is reasonably fast on sam9x60-curiosity board. (You might want to rebase to atmel/next for testing this.) Not sure if I should send a patch for that dts change, because I suppose it's a workaround only and not addressing the actual cause? I think the fix is correct in itself, I tested different combinations and compared with the driver in Linux, however … Can anyone explain to me, why flash access is sooo slow if the R/B gpio is used? Especially in comparision to Linux, where I don't need to remove that thing from dts and it works reasonably fast? The actual flash chip is a Macronix MX30LF4G28AD, 512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 256. Greets Alex P.S.: although not returned by get_maintainer.pl I added Eugen to Cc because he is maintainer of the at91 and might have some insight if it is a general problem of the nand controller in at91 socs? Alexander Dahl (2): mtd: nand: raw: atmel: Remove duplicate line mtd: nand: raw: atmel: Add error handling when rb-gpios missing drivers/mtd/nand/raw/atmel/nand-controller.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) base-commit: a169438411f9277cc689c14078151aa1d1caae3c -- 2.30.2
[PATCH 2/2] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is fine, the driver does not
override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 2b29c8def6..8e745a5111 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1600,10 +1600,13 @@ static struct atmel_nand *atmel_nand_create(struct
atmel_nand_controller *nc,
nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB;
nand->cs[i].rb.id = val;
} else {
- gpio_request_by_name_nodev(np, "rb-gpios", 0,
- >cs[i].rb.gpio,
- GPIOD_IS_IN);
- nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
+ ret = gpio_request_by_name_nodev(np, "rb-gpios", 0,
+>cs[i].rb.gpio,
+GPIOD_IS_IN);
+ if (ret)
+ dev_err(nc->dev, "Failed to get R/B gpio (err =
%d)\n", ret);
+ else
+ nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
}
gpio_request_by_name_nodev(np, "cs-gpios", 0,
--
2.30.2
[PATCH] cmd: cyclic: Remove duplicate command name in help text
Function 'cmd_usage()' already prints one command in usage before printing out the help text given to the U_BOOT_CMD_WITH_SUBCMDS macro. Wrong previous output: Usage: cyclic cyclic demo - register cyclic demo function cyclic list - list cyclic functions Signed-off-by: Alexander Dahl --- cmd/cyclic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/cyclic.c b/cmd/cyclic.c index 97324d8240..946f1d7818 100644 --- a/cmd/cyclic.c +++ b/cmd/cyclic.c @@ -77,7 +77,7 @@ static int do_cyclic_list(struct cmd_tbl *cmdtp, int flag, int argc, } static char cyclic_help_text[] = - "cyclic demo - register cyclic demo function\n" + "demo - register cyclic demo function\n" "cyclic list - list cyclic functions\n"; U_BOOT_CMD_WITH_SUBCMDS(cyclic, "Cyclic", cyclic_help_text, base-commit: 989892f5805dc205033c4723bc8e024472564d16 -- 2.30.2
Re: [PATCH 3/5] ARM: dts: at91: sam9x60: Change i2c compatible
Hello,
Am Thu, Jul 06, 2023 at 08:32:41AM + schrieb durai.manicka...@microchip.com:
> Hi Alexander,
>
> sam9x60_curiosity and sam9x60ek belongs to same SOC family. So the
> compatible string is updated as "microchip,sam9x60-i2c" in the
> sam9x60.dtsi file. These changes are available in linux-6.4.y branch.
Maybe I was not clear enough. We are talking about U-Boot here. The
whole patch series is for U-Boot and based on U-Boot v2023.07-rc6.
I'm on Linux v6.4 already and things work in Linux. The problem I
have is with EEPROM access in U-Boot.
Greets
Alex
>
> On 06/07/23 01:46, Alexander Dahl wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > From: Alexander Dahl
> >
> > There's a more specific compatible string for the i2c interface, use it.
> >
> > Signed-off-by: Alexander Dahl
> > ---
> >
> > Notes:
> > I²C access to the eeprom did not work though, neither before nor after
> > this change.
> >
> > arch/arm/dts/at91-sam9x60_curiosity.dts | 2 +-
> > arch/arm/dts/sam9x60ek.dts | 2 +-
> > 2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
> > b/arch/arm/dts/at91-sam9x60_curiosity.dts
> > index da5e19b66b..ae707dd64b 100644
> > --- a/arch/arm/dts/at91-sam9x60_curiosity.dts
> > +++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
> > @@ -21,7 +21,7 @@
> > status = "okay";
> >
> > i2c@600 {
> > - compatible = "atmel,sama5d2-i2c";
> > + compatible =
> > "microchip,sam9x60-i2c";
> > reg = <0x600 0x200>;
> > pinctrl-names = "default";
> > pinctrl-0 = <_flx0>;
> > diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
> > index 45e2f4cc40..74016f5e28 100644
> > --- a/arch/arm/dts/sam9x60ek.dts
> > +++ b/arch/arm/dts/sam9x60ek.dts
> > @@ -62,7 +62,7 @@
> > status = "okay";
> >
> > i2c@600 {
> > - compatible = "atmel,sama5d2-i2c";
> > + compatible =
> > "microchip,sam9x60-i2c";
> > reg = <0x600 0x200>;
> > pinctrl-names = "default";
> > pinctrl-0 = <_flx0>;
> > --
> > 2.30.2
> >
--
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signature.asc
Description: PGP signature
[PATCH 0/5] ARM: dts: at91: Improve sam9x60-curiosity
Hello everyone, currently I have the Microchip SAM9X60-Curiosity board on my desk and for evaluation purposes I'm trying to get it booting from NAND flash without SD card. This series contains a collection of patches I made on that journey. It's probably not the last set of patches, but I send it out now before my holidays so anyone who's interested has some time to look into it before I return to my desk in roughly two weeks. ;-) Note: while I could access the I²C EEPROM populated on that board with Linux v6.4 through nvmem and the 100 bytes content seem valid including a MAC address attributed to Microchip, I could not do so in U-Boot. That also means out of the box access to Ethernet is currently broken without valid MAC address. Note: I prepared the patches at the office, but sending them from home now. This is why I use two different mail addresses. Greets Alex Alexander Dahl (5): ARM: dts: at91: sam9x60: Better align with upstream dtsi ARM: dts: at91: sam9x60-curiosity: Fix EEPROM type ARM: dts: at91: sam9x60: Change i2c compatible ARM: dts: at91: sam9x60-curiosity: Improve alignment with upstream ARM: dts: at91: sam9x60-curiosity: Add raw NAND flash .../dts/at91-sam9x60_curiosity-u-boot.dtsi| 8 +- arch/arm/dts/at91-sam9x60_curiosity.dts | 203 +- arch/arm/dts/sam9x60.dtsi | 66 +++--- arch/arm/dts/sam9x60ek.dts| 2 +- 4 files changed, 190 insertions(+), 89 deletions(-) base-commit: e1bebc16e1d9aa0ddd56c53c0b781f7186dce557 -- 2.30.2
[PATCH 4/5] ARM: dts: at91: sam9x60-curiosity: Improve alignment with upstream
From: Alexander Dahl
- nodes moved
- using node references by label instead of dulicating the node tree
Makes it easier to compare with the dts file from Linux kernel.
Signed-off-by: Alexander Dahl
---
.../dts/at91-sam9x60_curiosity-u-boot.dtsi| 8 +-
arch/arm/dts/at91-sam9x60_curiosity.dts | 100 +-
2 files changed, 53 insertions(+), 55 deletions(-)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
index 0c3c0406b4..a1b76e94d1 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
+++ b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
@@ -14,10 +14,6 @@
apb {
bootph-all;
-
- pinctrl {
- bootph-all;
- };
};
};
@@ -42,6 +38,10 @@
bootph-all;
};
+ {
+ bootph-all;
+};
+
_dbgu {
bootph-all;
};
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index ae707dd64b..fb59405b24 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -11,60 +11,18 @@
#include "sam9x60.dtsi"
/ {
- model = "Microchip SAM9X60 CURIOSITY";
+ model = "Microchip SAM9X60 Curiosity";
compatible = "microchip,sam9x60-curiosity", "microchip,sam9x60",
"atmel,at91sam9";
- ahb {
- apb {
- flx0: flexcom@f801c600 {
- atmel,flexcom-mode = ;
- status = "okay";
-
- i2c@600 {
- compatible = "microchip,sam9x60-i2c";
- reg = <0x600 0x200>;
- pinctrl-names = "default";
- pinctrl-0 = <_flx0>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = < PMC_TYPE_PERIPHERAL 5>;
- status = "okay";
-
- eeprom@53 {
- compatible = "atmel,24c02";
- reg = <0x53>;
- pagesize = <16>;
- };
- };
- };
-
- pinctrl {
- pinctrl_flx0: flx0_default {
- atmel,pins =
- ;
- };
-
- pinctrl_onewire_tm_default:
onewire_tm_default {
- atmel,pins =
- ;
- };
-
- usb1 {
- pinctrl_usb_default:
usb_default {
- atmel,pins = ;
- };
- };
- };
- };
- };
-
chosen {
stdout-path =
i2c0 =
};
+ memory {
+ reg = <0x2000 0x800>;
+ };
+
clocks {
slow_xtal: slow_xtal {
clock-frequency = <32768>;
@@ -75,10 +33,6 @@
};
};
- memory {
- reg = <0x2000 0x800>;
- };
-
onewire_tm: onewire {
gpios = < 14 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -92,11 +46,55 @@
};
};
+ {
+ atmel,flexcom-mode = ;
+ status = "okay";
+
+ i2c@600 {
+ compatible = "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_flx0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = < PMC_TYPE_PERIPHERAL 5>;
+ status = "okay";
+
+ eeprom@53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+ };
+};
+
{
phy-mode = "rmii";
status = "okay";
};
+ {
+ flexcom {
+ pinctrl_f
[PATCH 5/5] ARM: dts: at91: sam9x60-curiosity: Add raw NAND flash
From: Alexander Dahl
Basically the same as on sam9x60-ek. Same as in Linux. NAND flash is
correctly detected when booting into U-Boot:
U-Boot 2023.07-rc6-5-g12719f75dc-dirty (Jul 05 2023 - 13:06:35 +)
CPU: SAM9X60 128MiB DDR2 SiP
Crystal frequency: 24 MHz
CPU clock: 600 MHz
Master clock : 200 MHz
Model: Microchip SAM9X60 Curiosity
DRAM: 128 MiB
Core: 145 devices, 22 uclasses, devicetree: separate
NAND: 512 MiB
MMC: sdhci-host@8000: 0, sdhci-host@9000: 1
Loading Environment from FAT... Unable to read "uboot.env" from mmc0:1...
In:serial
Out: serial
Err: serial
Net: eth0: ethernet@f802c000
Hit any key to stop autoboot: 0
Signed-off-by: Alexander Dahl
---
arch/arm/dts/at91-sam9x60_curiosity.dts | 103
1 file changed, 103 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index fb59405b24..2547b4527c 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -46,6 +46,71 @@
};
};
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_ebi_addr_nand _ebi_data_0_7>;
+ status = "okay";
+
+ nand_controller: nand-controller {
+ pinctrl-names = "default";
+ pinctrl-0 = <_nand_oe_we _nand_cs
_nand_rb>;
+ status = "okay";
+
+ nand@3 {
+ reg = <0x3 0x0 0x80>;
+ rb-gpios = < 5 GPIO_ACTIVE_HIGH>;
+ cs-gpios = < 4 GPIO_ACTIVE_HIGH>;
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <8>;
+ nand-ecc-step-size = <512>;
+ nand-on-flash-bbt;
+ label = "atmel_nand";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ at91bootstrap@0 {
+ label = "at91bootstrap";
+ reg = <0x0 0x4>;
+ };
+
+ uboot@4 {
+ label = "u-boot";
+ reg = <0x4 0xc>;
+ };
+
+ ubootenvred@10 {
+ label = "U-Boot Env Redundant";
+ reg = <0x10 0x4>;
+ };
+
+ ubootenv@14 {
+ label = "U-Boot Env";
+ reg = <0x14 0x4>;
+ };
+
+ dtb@18 {
+ label = "device tree";
+ reg = <0x18 0x8>;
+ };
+
+ kernel@20 {
+ label = "kernel";
+ reg = <0x20 0x60>;
+ };
+
+ rootfs@80 {
+ label = "rootfs";
+ reg = <0x80 0x1f80>;
+ };
+ };
+ };
+ };
+};
+
{
atmel,flexcom-mode = ;
status = "okay";
@@ -74,6 +139,26 @@
};
{
+ ebi {
+ pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
+ atmel,pins =
+ ;
+ };
+
+ pinctrl_ebi_addr_nand: ebi-addr-0 {
+ atmel,pins =
+ ;
+ };
+ };
+
flexcom {
pinctrl_flx0: flx0_default {
atmel,pins =
@@ -82,6 +167,24 @@
};
};
+ nand {
+ pinctrl_nand_oe_we: nand-oe-we-0 {
+ atmel,pins =
+ ;
+ };
+
+ pinctrl_nand_rb: nand-rb-0 {
+ atmel,pins =
+ ;
+ };
+
+ pinctrl_nand_cs: nand-cs-0 {
+ atmel,pins =
+ ;
+ };
+ };
+
pinctrl_onewire_tm_default: onewire_tm_default {
atmel,pins =
;
--
2.30.2
[PATCH 2/5] ARM: dts: at91: sam9x60-curiosity: Fix EEPROM type
From: Alexander Dahl
The user guide says it's a Microchip 24AA025E48 serial EEPROM, which is
a 2-Kbit I2C Serial EEPROM with EUI-48™ Identity. This is the chip
actually populated on board EV40E67A rev 4.
Signed-off-by: Alexander Dahl
---
Notes:
Sadly this did not fix the problem, that I could not access that
eeprom through I²C.
arch/arm/dts/at91-sam9x60_curiosity.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index d6ae3d648d..da5e19b66b 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -31,7 +31,7 @@
status = "okay";
eeprom@53 {
- compatible = "atmel,24c32";
+ compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
--
2.30.2
[PATCH 1/5] ARM: dts: at91: sam9x60: Better align with upstream dtsi
From: Alexander Dahl
No functional changes, but this:
- reorder nodes (ordered by memory offset as in Linux)
- add label to pinctrl node name for easier reference in board files
- fix whitespace
Diff to sam9x60.dtsi in Linux is much better readable now.
Signed-off-by: Alexander Dahl
---
arch/arm/dts/sam9x60.dtsi | 66 +++
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 2b93d08938..3b684fc63d 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -27,6 +27,18 @@
spi0 =
};
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ARM9260_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,arm926ej-s";
+ clocks = < PMC_TYPE_CORE 19>, < PMC_TYPE_CORE
11>, <_xtal>;
+ clock-names = "cpu", "master", "xtal";
+ };
+ };
+
clocks {
slow_rc_osc: slow_rc_osc {
compatible = "fixed-clock";
@@ -51,18 +63,6 @@
};
};
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ARM9260_0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,arm926ej-s";
- clocks = < PMC_TYPE_CORE 19>, < PMC_TYPE_CORE
11>, <_xtal>;
- clock-names = "cpu", "master", "xtal";
- };
- };
-
ahb {
compatible = "simple-bus";
#address-cells = <1>;
@@ -149,13 +149,20 @@
compatible = "microchip,sam9x60-qspi";
reg = <0xf0014000 0x100>, <0x7000
0x1000>;
reg-names = "qspi_base", "qspi_mmap";
- clocks = < PMC_TYPE_PERIPHERAL 35>, <
PMC_TYPE_SYSTEM 18>; /* ID_QSPI */
+ clocks = < PMC_TYPE_PERIPHERAL 35>, <
PMC_TYPE_SYSTEM 18>; /* ID_QSPI */
clock-names = "pclk", "qspick";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
+ pit64b0: timer@f0028000 {
+ compatible = "microchip,sam9x60-pit64b";
+ reg = <0xf0028000 0xec>;
+ clocks = < PMC_TYPE_PERIPHERAL 37>, <
PMC_TYPE_GCK 37>;
+ clock-names = "pclk", "gclk";
+ };
+
flx0: flexcom@f801c600 {
compatible = "atmel,sama5d2-flexcom";
reg = <0xf801c000 0x200>;
@@ -181,6 +188,17 @@
reg = <0xf805 0x100>;
};
+ pmecc: ecc-engine@e000 {
+ compatible = "microchip,sam9x60-pmecc",
"atmel,at91sam9g45-pmecc";
+ reg = <0xe000 0x300>,
+ <0xe600 0x100>;
+ };
+
+ smc: smc@ea00 {
+ compatible = "microchip,sam9x60-smc",
"atmel,at91sam9260-smc", "syscon";
+ reg = <0xea00 0x100>;
+ };
+
dbgu: serial@f200 {
compatible = "atmel,at91sam9260-dbgu",
"atmel,at91sam9260-usart";
reg = <0xf200 0x200>;
@@ -190,7 +208,7 @@
clock-names = "usart";
};
- pinctrl {
+ pinctrl: pinctrl@f400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "microchip,sam9x60-pinctrl",
"simple-bus";
@@ -205,7 +223,7 @@
pinctrl_dbgu: dbgu-0 {
atmel,pins =
;
+AT91_PIOA 10
AT91_PERIPH_A AT91_PINCTRL_NO
[PATCH 3/5] ARM: dts: at91: sam9x60: Change i2c compatible
From: Alexander Dahl
There's a more specific compatible string for the i2c interface, use it.
Signed-off-by: Alexander Dahl
---
Notes:
I²C access to the eeprom did not work though, neither before nor after
this change.
arch/arm/dts/at91-sam9x60_curiosity.dts | 2 +-
arch/arm/dts/sam9x60ek.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index da5e19b66b..ae707dd64b 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -21,7 +21,7 @@
status = "okay";
i2c@600 {
- compatible = "atmel,sama5d2-i2c";
+ compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
pinctrl-names = "default";
pinctrl-0 = <_flx0>;
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 45e2f4cc40..74016f5e28 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -62,7 +62,7 @@
status = "okay";
i2c@600 {
- compatible = "atmel,sama5d2-i2c";
+ compatible = "microchip,sam9x60-i2c";
reg = <0x600 0x200>;
pinctrl-names = "default";
pinctrl-0 = <_flx0>;
--
2.30.2
Re: [PATCH v3 0/8] Use logging feature instead of FPGA_DEBUG
Hello Michal,
Am Freitag, 7. Oktober 2022, 08:34:15 CEST schrieb Michal Simek:
> Hi,
>
> On 10/6/22 16:56, Alexander Dahl wrote:
> > Hello Michal,
> >
> > Am Donnerstag, 6. Oktober 2022, 16:44:29 CEST schrieb Michal Simek:
> >> Hi,
> >>
> >> On 10/5/22 13:44, Alexander Dahl wrote:
> >>> Hei hei,
> >>>
> >>> while working on FPGA support for a new device I discovered debug
> >>> logging in some FPGA drivers is still done as in the old days. Bring
> >>> that to what I thougt would be the currently preferred approach.
> >>>
> >>> Notes: Adding those Kconfig symbols in patch 3 is just to be able to
> >>> build those two old drivers.
> >>>
> >>> All drivers touched were build tested with sandbox_defconfig and GCC 8
> >>> on Debian GNU/Linux 10 (buster).
> >>>
> >>> Lines with other possibly questionable output were not touched, only
> >>> what seemed to be designated debug output, and only for FPGA drivers
> >>> having that ancient FPGA_DEBUG / PRINTF macros, so there's room for
> >>> future improvements.
> >>>
> >>> Changelog:
> >>>
> >>> v2 -> v3:
> >>> - Patch introducing FPGA uclass was completely reworked, sent
> >>>
> >>> independently from this series, and applied already, thus removed
> >>>
> >>> - Because requiring that new FPGA uclass changes, rebased on Michal's
> >>>
> >>> microblaze branch '20221005'
> >>>
> >>> - Removed '"%s …", __func__' and '"%d …", __line__' from log messages,
> >>>
> >>> because log framework can add those (enabled by CONFIG_LOGF_FUNC and
> >>> CONFIG_LOGF_LINE)
> >>>
> >>> v1 -> v2:
> >>> - Rebased on master
> >>> - Added patch to introduce new FPGA uclass in front of the other patches
> >>> - Use that new uclass as log category
> >>> - Slightly reworded cover letter
> >>>
> >>> Greets
> >>> Alex
> >>>
> >>> Cc: Michal Simek
> >>>
> >>> Alexander Dahl (7):
> >>> fpga: altera: Use logging feature instead of FPGA_DEBUG
> >>> fpga: cyclon2: Use logging feature instead of FPGA_DEBUG
> >>> fpga: Add missing Kconfig symbols for old FPGA drivers
> >>> fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG
> >>> fpga: spartan2: Use logging feature instead of FPGA_DEBUG
> >>> fpga: spartan3: Use logging feature instead of FPGA_DEBUG
> >>> fpga: virtex2: Use logging feature instead of FPGA_DEBUG
> >>>
> >>>drivers/fpga/ACEX1K.c | 37 +--
> >>>drivers/fpga/Kconfig| 12 +++
> >>>drivers/fpga/altera.c | 11 +++---
> >>>drivers/fpga/cyclon2.c | 38 +---
> >>>drivers/fpga/spartan2.c | 80
> >>>+++--
> >>>drivers/fpga/spartan3.c | 80
> >>>+++--
> >>>drivers/fpga/virtex2.c | 69 ---
> >>>7 files changed, 152 insertions(+), 175 deletions(-)
> >>
> >> I pushed it to CI loop and got failure.
> >>
> >> https://source.denx.de/u-boot/custodians/u-boot-microblaze/-/jobs/508906
> >>
> >> Building current source for 136 boards (64 threads, 1 job per thread)
> >>
> >> m68k: + astro_mcf5373l
> >>
> >> +In file included from include/linux/printk.h:4,
> >> + from include/common.h:20,
> >> + from drivers/fpga/spartan3.c:14:
> >> +drivers/fpga/spartan3.c: In function 'spartan3_sp_load':
> >> +drivers/fpga/spartan3.c:112:27: error: too many arguments for format
> >> [-Werror=format-extra-args]
> >> + 112 | log_debug("Function Table:\n"
> >> + | ^~~
> >> +include/log.h:220:24: note: in definition of macro 'log'
> >> + 220 | printf(_fmt, ##_args); \
> >> + |^~~~
> >> +drivers/fpga/spartan3.c:112:17: note: in expansion of macro 'log_debug'
> >> + | ^
> >> +cc1: all warnings being treated as errors
> >> +make[3]: *** [scripts/Makefile.build:258: drivers/fpga/spartan3.o] Error
> >> 1
> >> +make[2]: *** [scripts/Makefile.build:398: drivers/fpga] Error 2
> >> +make[1]: *** [Makefile:1883: drivers] Error 2
> >>
> >> Please fix it up.
> >
> > Not sure if those warnings were present before on the old PRINTF calls,
> > but we got them now. However the underlying problem was there before:
> > putting to much things in one printf/log line. I can go split it up like
> > in 'drivers/>
> > fpga/virtex2.c' already, where you have the following comment:
> > /* Gotta split this one up (so the stack won't blow??) */
> >
> > Not sure however if debug printing all function pointers in those function
> > tables has any value at all? Maybe that can just be dropped?
>
> No idea if this is useful or not. But it is there and I would split it as it
> is done in virtex2. Please do it in separate patch with mentioning virtex2
> to have the same change.
Turned out there was a different cause for those warnings.
See v4 of the series which I just sent.
Have a nice weekend
Alex
[PATCH v4 08/10] fpga: spartan2: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl
---
drivers/fpga/spartan2.c | 80 +++--
1 file changed, 37 insertions(+), 43 deletions(-)
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 3817ad8bb7..f72dfdec94 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -4,16 +4,12 @@
* Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include /* core U-Boot definitions */
+#include
#include /* Spartan-II device family */
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...)printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
#undef CONFIG_SYS_FPGA_CHECK_BUSY
/* Note: The assumption is that we cannot possibly run fast enough to
@@ -46,12 +42,12 @@ static int spartan2_load(xilinx_desc *desc, const void
*buf, size_t bsize,
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Load\n");
ret_val = spartan2_ss_load(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Load\n");
ret_val = spartan2_sp_load(desc, buf, bsize);
break;
@@ -69,12 +65,12 @@ static int spartan2_dump(xilinx_desc *desc, const void
*buf, size_t bsize)
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Dump\n");
ret_val = spartan2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Dump\n");
ret_val = spartan2_sp_dump(desc, buf, bsize);
break;
@@ -100,8 +96,7 @@ static int spartan2_sp_load(xilinx_desc *desc, const void
*buf, size_t bsize)
int ret_val = FPGA_FAIL;/* assume the worst */
xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -109,24 +104,24 @@ static int spartan2_sp_load(xilinx_desc *desc, const void
*buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pre: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "err:\t0x%p\n"
- "clk:\t0x%p\n"
- "cs:\t0x%p\n"
- "wr:\t0x%p\n"
- "read data:\t0x%p\n"
- "write data:\t0x%p\n"
- "busy:\t0x%p\n"
- "abort:\t0x%p\n"
- "post:\t0x%p\n\n",
- __FUNCTION__, , fn, fn->pre, fn->pgm,
fn->init, fn->err,
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
fn->busy,
- fn->abort, fn->post);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pre: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "err:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "cs:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "read data:\t0x%p\n"
+ "write data:\t0x%p\n"
+ "busy:\t0x%p\n"
+ "abort:\t0x%p\n"
+ "post:\t0x%p\n\n",
+ , fn, fn->pre, fn-&g
[PATCH v4 01/10] fpga: Add missing Kconfig symbols for old FPGA drivers
Those drivers could not be built anymore without those options present. Signed-off-by: Alexander Dahl --- drivers/fpga/Kconfig | 12 1 file changed, 12 insertions(+) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index e2fd16e6d2..813d6a836d 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -27,6 +27,12 @@ config FPGA_STRATIX_V help Say Y here to enable the Altera Stratix V FPGA specific driver. +config FPGA_ACEX1K + bool "Enable Altera ACEX 1K driver" + depends on FPGA_ALTERA + help + Say Y here to enable the Altera ACEX 1K FPGA specific driver. + config FPGA_CYCLON2 bool "Enable Altera FPGA driver for Cyclone II" depends on FPGA_ALTERA @@ -71,6 +77,12 @@ config FPGA_VERSALPL Versal. The bitstream will only be generated as PDI for Versal platform. +config FPGA_SPARTAN2 + bool "Enable Spartan2 FPGA driver" + depends on FPGA_XILINX + help + Enable Spartan2 FPGA driver. + config FPGA_SPARTAN3 bool "Enable Spartan3 FPGA driver" depends on FPGA_XILINX -- 2.30.2
[PATCH v4 07/10] fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl
---
drivers/fpga/ACEX1K.c | 37 -
1 file changed, 16 insertions(+), 21 deletions(-)
diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c
index aca8049c56..a1ff47035b 100644
--- a/drivers/fpga/ACEX1K.c
+++ b/drivers/fpga/ACEX1K.c
@@ -7,18 +7,14 @@
* Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include /* core U-Boot definitions */
#include
+#include
#include /* ACEX device family */
#include
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...)printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
/* Note: The assumption is that we cannot possibly run fast enough to
* overrun the device (the Slave Parallel mode can free run at 50MHz).
* If there is a need to operate slower, define CONFIG_FPGA_DELAY in
@@ -44,7 +40,7 @@ int ACEX1K_load(Altera_desc *desc, const void *buf, size_t
bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__);
+ log_debug("Launching Passive Serial Loader\n");
ret_val = ACEX1K_ps_load (desc, buf, bsize);
break;
@@ -64,7 +60,7 @@ int ACEX1K_dump(Altera_desc *desc, const void *buf, size_t
bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__);
+ log_debug("Launching Passive Serial Dump\n");
ret_val = ACEX1K_ps_dump (desc, buf, bsize);
break;
@@ -93,8 +89,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf,
size_t bsize)
Altera_ACEX1K_Passive_Serial_fns *fn = desc->iface_fns;
int i;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -102,16 +97,16 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void
*buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "config:\t0x%p\n"
- "status:\t0x%p\n"
- "clk:\t0x%p\n"
- "data:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, , fn, fn->config, fn->status,
- fn->clk, fn->data, fn->done);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "config:\t0x%p\n"
+ "status:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "data:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ , fn, fn->config, fn->status,
+ fn->clk, fn->data, fn->done);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf ("Loading FPGA Device %d...", cookie);
#endif
--
2.30.2
[PATCH v4 00/10] Use logging feature instead of FPGA_DEBUG
Hei hei, while working on FPGA support for a new device I discovered debug logging in some FPGA drivers is still done as in the old days. Bring that to what I thougt would be the currently preferred approach. Notes: Adding those Kconfig symbols in patch 1 is just to be able to build two of the old drivers. All drivers touched were build tested with sandbox_defconfig and GCC 8 on Debian GNU/Linux 10 (buster). Lines with other possibly questionable output were not touched, only what seemed to be designated debug output, and only for FPGA drivers having that ancient FPGA_DEBUG / PRINTF macros, so there's room for future improvements. Changelog: v3 -> v4: - Reordered patches, Kconfig patch comes first now (made it easier to build and test the series step by step) - Added three patches fixing printf compiler warnings first, before changing to the new logging framework (so CI should not fail anymore with -Werror) v2 -> v3: - Patch introducing FPGA uclass was completely reworked, sent independently from this series, and applied already, thus removed - Because requiring that new FPGA uclass changes, rebased on Michal's microblaze branch '20221005' - Removed '"%s …", __func__' and '"%d …", __line__' from log messages, because log framework can add those (enabled by CONFIG_LOGF_FUNC and CONFIG_LOGF_LINE) v1 -> v2: - Rebased on master - Added patch to introduce new FPGA uclass in front of the other patches - Use that new uclass as log category - Slightly reworded cover letter Greets Alex Cc: Michal Simek Alexander Dahl (10): fpga: Add missing Kconfig symbols for old FPGA drivers fpga: spartan2: Fix printf arguments warning fpga: spartan3: Fix printf arguments warning fpga: virtex2: Fix printf format string warnings fpga: altera: Use logging feature instead of FPGA_DEBUG fpga: cyclon2: Use logging feature instead of FPGA_DEBUG fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG fpga: spartan2: Use logging feature instead of FPGA_DEBUG fpga: spartan3: Use logging feature instead of FPGA_DEBUG fpga: virtex2: Use logging feature instead of FPGA_DEBUG drivers/fpga/ACEX1K.c | 37 +-- drivers/fpga/Kconfig| 12 +++ drivers/fpga/altera.c | 11 +++--- drivers/fpga/cyclon2.c | 38 +--- drivers/fpga/spartan2.c | 80 +++-- drivers/fpga/spartan3.c | 80 +++-- drivers/fpga/virtex2.c | 69 --- 7 files changed, 152 insertions(+), 175 deletions(-) base-commit: 2d8cf392a77815f062446ef441f1078958dc1b2a -- 2.30.2
[PATCH v4 10/10] fpga: virtex2: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl
---
drivers/fpga/virtex2.c | 69 ++
1 file changed, 30 insertions(+), 39 deletions(-)
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index e769ceebc1..0d536f0d04 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -12,21 +12,14 @@
* on spartan2.c (Rich Ireland, rirel...@enterasys.com).
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include
#include
+#include
#include
#include
-#if 0
-#define FPGA_DEBUG
-#endif
-
-#ifdef FPGA_DEBUG
-#definePRINTF(fmt, args...)printf(fmt, ##args)
-#else
-#define PRINTF(fmt, args...)
-#endif
-
/*
* If the SelectMap interface can be overrun by the processor, define
* CONFIG_SYS_FPGA_CHECK_BUSY and/or CONFIG_FPGA_DELAY in the board
@@ -89,12 +82,12 @@ static int virtex2_load(xilinx_desc *desc, const void *buf,
size_t bsize,
switch (desc->iface) {
case slave_serial:
- PRINTF("%s: Launching Slave Serial Load\n", __func__);
+ log_debug("Launching Slave Serial Load\n");
ret_val = virtex2_ss_load(desc, buf, bsize);
break;
case slave_selectmap:
- PRINTF("%s: Launching Slave Parallel Load\n", __func__);
+ log_debug("Launching Slave Parallel Load\n");
ret_val = virtex2_ssm_load(desc, buf, bsize);
break;
@@ -111,12 +104,12 @@ static int virtex2_dump(xilinx_desc *desc, const void
*buf, size_t bsize)
switch (desc->iface) {
case slave_serial:
- PRINTF("%s: Launching Slave Serial Dump\n", __func__);
+ log_debug("Launching Slave Serial Dump\n");
ret_val = virtex2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF("%s: Launching Slave Parallel Dump\n", __func__);
+ log_debug("Launching Slave Parallel Dump\n");
ret_val = virtex2_ssm_dump(desc, buf, bsize);
break;
@@ -150,8 +143,7 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns *fn,
int cookie)
{
unsigned long ts;
- PRINTF("%s:%d: Start with interface functions @ 0x%p\n",
- __func__, __LINE__, fn);
+ log_debug("Start with interface functions @ 0x%p\n", fn);
if (!fn) {
printf("%s:%d: NULL Interface function table!\n",
@@ -160,25 +152,24 @@ static int virtex2_slave_pre(xilinx_virtex2_slave_fns
*fn, int cookie)
}
/* Gotta split this one up (so the stack won't blow??) */
- PRINTF("%s:%d: Function Table:\n"
- " base 0x%p\n"
- " struct 0x%p\n"
- " pre0x%p\n"
- " prog 0x%p\n"
- " init 0x%p\n"
- " error 0x%p\n",
- __func__, __LINE__,
- , fn, fn->pre, fn->pgm, fn->init, fn->err);
- PRINTF(" clock 0x%p\n"
- " cs 0x%p\n"
- " write 0x%p\n"
- " rdata 0x%p\n"
- " wdata 0x%p\n"
- " busy 0x%p\n"
- " abort 0x%p\n"
- " post 0x%p\n\n",
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
- fn->busy, fn->abort, fn->post);
+ log_debug("Function Table:\n"
+ " base 0x%p\n"
+ " struct 0x%p\n"
+ " pre0x%p\n"
+ " prog 0x%p\n"
+ " init 0x%p\n"
+ " error 0x%p\n",
+ , fn, fn->pre, fn->pgm, fn->init, fn->err);
+ log_debug(" clock 0x%p\n"
+ " cs 0x%p\n"
+ " write 0x%p\n"
+ " rdata 0x%p\n"
+ " wdata 0x%p\n"
+ " busy 0x%p\n"
+ " abort 0x%p\n"
+ " post 0x%p\n\n",
+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
+ fn->busy, fn->abort, fn->post);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf("Initializing FPGA Device %d...\n", cookie);
@@ -330,8 +321,8 @@ static int virtex2_ssm_load(xilinx_desc *desc, const void
*buf, size_t bsize)
#endif
if ((*fn->done)(cookie) == FPGA_SUCCESS) {
- PRINTF("%s:%d:done went active early, bytecount =
%zu\
[PATCH v4 09/10] fpga: spartan3: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl
---
drivers/fpga/spartan3.c | 80 +++--
1 file changed, 37 insertions(+), 43 deletions(-)
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 641216ad5c..b7a063a95f 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -9,16 +9,12 @@
* on spartan2.c (Rich Ireland, rirel...@enterasys.com).
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include /* core U-Boot definitions */
+#include
#include /* Spartan-II device family */
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...)printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
#undef CONFIG_SYS_FPGA_CHECK_BUSY
/* Note: The assumption is that we cannot possibly run fast enough to
@@ -51,12 +47,12 @@ static int spartan3_load(xilinx_desc *desc, const void
*buf, size_t bsize,
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Load\n");
ret_val = spartan3_ss_load(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Load\n");
ret_val = spartan3_sp_load(desc, buf, bsize);
break;
@@ -74,12 +70,12 @@ static int spartan3_dump(xilinx_desc *desc, const void
*buf, size_t bsize)
switch (desc->iface) {
case slave_serial:
- PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Serial Dump\n");
ret_val = spartan3_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
+ log_debug("Launching Slave Parallel Dump\n");
ret_val = spartan3_sp_dump(desc, buf, bsize);
break;
@@ -105,8 +101,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void
*buf, size_t bsize)
int ret_val = FPGA_FAIL;/* assume the worst */
xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
size_t bytecount = 0;
@@ -114,24 +109,24 @@ static int spartan3_sp_load(xilinx_desc *desc, const void
*buf, size_t bsize)
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pre: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "err:\t0x%p\n"
- "clk:\t0x%p\n"
- "cs:\t0x%p\n"
- "wr:\t0x%p\n"
- "read data:\t0x%p\n"
- "write data:\t0x%p\n"
- "busy:\t0x%p\n"
- "abort:\t0x%p\n"
- "post:\t0x%p\n\n",
- __FUNCTION__, , fn, fn->pre, fn->pgm,
fn->init, fn->err,
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
fn->busy,
- fn->abort, fn->post);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pre: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "err:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "cs:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "read data:\t0x%p\n"
+ "write data:\t0x%p\n"
+ "busy:\t0x%p\n"
+ "abort:\t0x%p\n"
+ "post:\t0x%p\n\n",
+ , fn, fn->pre, fn-&g
[PATCH v4 05/10] fpga: altera: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl
---
drivers/fpga/altera.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 10c0475d25..6a4f0cb9bc 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -7,6 +7,8 @@
* Rich Ireland, Enterasys Networks, rirel...@enterasys.com.
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
/*
* Altera FPGA support
*/
@@ -16,9 +18,6 @@
#include
#include
-/* Define FPGA_DEBUG to 1 to get debug printf's */
-#define FPGA_DEBUG 0
-
static const struct altera_fpga {
enum altera_family family;
const char *name;
@@ -106,8 +105,7 @@ int altera_load(Altera_desc *desc, const void *buf, size_t
bsize)
if (!fpga)
return FPGA_FAIL;
- debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n",
- __func__, fpga->name);
+ log_debug("Launching the %s Loader...\n", fpga->name);
if (fpga->load)
return fpga->load(desc, buf, bsize);
return 0;
@@ -120,8 +118,7 @@ int altera_dump(Altera_desc *desc, const void *buf, size_t
bsize)
if (!fpga)
return FPGA_FAIL;
- debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n",
- __func__, fpga->name);
+ log_debug("Launching the %s Reader...\n", fpga->name);
if (fpga->dump)
return fpga->dump(desc, buf, bsize);
return 0;
--
2.30.2
[PATCH v4 02/10] fpga: spartan2: Fix printf arguments warning
That extra comma messes up format arguments.
Warning appears if built with FPGA_DEBUG defined:
CC drivers/fpga/spartan2.o
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan2.c: In function
‘spartan2_sp_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan2.c:112:11: warning: too
many arguments for format [-Wformat-extra-args]
PRINTF ("%s: Function Table:\n"
^~~
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan2.c:12:37: note: in
definition of macro ‘PRINTF’
#define PRINTF(fmt,args...) printf (fmt ,##args)
^~~
CC drivers/fpga/spartan3.o
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c: In function
‘spartan3_sp_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:117:11: warning: too
many arguments for format [-Wformat-extra-args]
PRINTF ("%s: Function Table:\n"
^~~
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:17:37: note: in
definition of macro ‘PRINTF’
#define PRINTF(fmt,args...) printf (fmt ,##args)
^~~
Fixes: e221174377d7 ("Initial revision")
Signed-off-by: Alexander Dahl
---
drivers/fpga/spartan2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 47692e3207..3817ad8bb7 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -122,7 +122,7 @@ static int spartan2_sp_load(xilinx_desc *desc, const void
*buf, size_t bsize)
"read data:\t0x%p\n"
"write data:\t0x%p\n"
"busy:\t0x%p\n"
- "abort:\t0x%p\n",
+ "abort:\t0x%p\n"
"post:\t0x%p\n\n",
__FUNCTION__, , fn, fn->pre, fn->pgm,
fn->init, fn->err,
fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
fn->busy,
--
2.30.2
[PATCH v4 06/10] fpga: cyclon2: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own
definition for debug output.
Signed-off-by: Alexander Dahl
---
drivers/fpga/cyclon2.c | 38 --
1 file changed, 16 insertions(+), 22 deletions(-)
diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c
index 3b008facb8..f264ff8c0e 100644
--- a/drivers/fpga/cyclon2.c
+++ b/drivers/fpga/cyclon2.c
@@ -5,18 +5,14 @@
* Based on ACE1XK.c
*/
+#define LOG_CATEGORY UCLASS_FPGA
+
#include /* core U-Boot definitions */
+#include
#include
#include /* ACEX device family */
#include
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt, args...) printf(fmt, ##args)
-#else
-#define PRINTF(fmt, args...)
-#endif
-
/* Note: The assumption is that we cannot possibly run fast enough to
* overrun the device (the Slave Parallel mode can free run at 50MHz).
* If there is a need to operate slower, define CONFIG_FPGA_DELAY in
@@ -42,7 +38,7 @@ int CYC2_load(Altera_desc *desc, const void *buf, size_t
bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF("%s: Launching Passive Serial Loader\n", __func__);
+ log_debug("Launching Passive Serial Loader\n");
ret_val = CYC2_ps_load(desc, buf, bsize);
break;
@@ -51,8 +47,7 @@ int CYC2_load(Altera_desc *desc, const void *buf, size_t
bsize)
* done in the write() callback. Use the existing PS load
* function for FPP, too.
*/
- PRINTF("%s: Launching Fast Passive Parallel Loader\n",
- __func__);
+ log_debug("Launching Fast Passive Parallel Loader\n");
ret_val = CYC2_ps_load(desc, buf, bsize);
break;
@@ -72,7 +67,7 @@ int CYC2_dump(Altera_desc *desc, const void *buf, size_t
bsize)
switch (desc->iface) {
case passive_serial:
- PRINTF("%s: Launching Passive Serial Dump\n", __func__);
+ log_debug("Launching Passive Serial Dump\n");
ret_val = CYC2_ps_dump(desc, buf, bsize);
break;
@@ -99,22 +94,21 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf,
size_t bsize)
Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
int ret = 0;
- PRINTF("%s: start with interface functions @ 0x%p\n",
- __func__, fn);
+ log_debug("start with interface functions @ 0x%p\n", fn);
if (fn) {
int cookie = desc->cookie; /* make a local copy */
unsigned long ts; /* timestamp */
- PRINTF("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "config:\t0x%p\n"
- "status:\t0x%p\n"
- "write:\t0x%p\n"
- "done:\t0x%p\n\n",
- __func__, , fn, fn->config, fn->status,
- fn->write, fn->done);
+ log_debug("Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "config:\t0x%p\n"
+ "status:\t0x%p\n"
+ "write:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ , fn, fn->config, fn->status,
+ fn->write, fn->done);
#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
printf("Loading FPGA Device %d...", cookie);
#endif
--
2.30.2
[PATCH v4 03/10] fpga: spartan3: Fix printf arguments warning
The additional comma messes up the arguments.
Warning appears if built with FPGA_DEBUG defined:
CC drivers/fpga/spartan3.o
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c: In function
‘spartan3_sp_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:118:11: warning: too
many arguments for format [-Wformat-extra-args]
PRINTF ("%s: Function Table:\n"
^~~
/mnt/data/adahl/src/u-boot/drivers/fpga/spartan3.c:18:37: note: in
definition of macro ‘PRINTF’
#define PRINTF(fmt,args...) printf (fmt ,##args)
^~~
Fixes: 875c78934ee2 ("Add Xilinx Spartan3 family FPGA support Patch by Kurt
Stremerch, 14 February 2005")
Signed-off-by: Alexander Dahl
---
drivers/fpga/spartan3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 918f6db506..641216ad5c 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -127,7 +127,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void
*buf, size_t bsize)
"read data:\t0x%p\n"
"write data:\t0x%p\n"
"busy:\t0x%p\n"
- "abort:\t0x%p\n",
+ "abort:\t0x%p\n"
"post:\t0x%p\n\n",
__FUNCTION__, , fn, fn->pre, fn->pgm,
fn->init, fn->err,
fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
fn->busy,
--
2.30.2
[PATCH v4 04/10] fpga: virtex2: Fix printf format string warnings
Warning appears if built with FPGA_DEBUG defined:
CC drivers/fpga/virtex2.o
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c: In function
‘virtex2_ssm_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:333:11: warning: format ‘%d’
expects argument of type ‘int’, but argument 4 has type ‘size_t’ {aka ‘long
unsigned int’} [-Wformat=]
PRINTF("%s:%d:done went active early, bytecount = %d\n",
^~~~
__func__, __LINE__, bytecount);
~
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:25:37: note: in definition of
macro ‘PRINTF’
#define PRINTF(fmt, args...) printf(fmt, ##args)
^~~
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c: In function
‘virtex2_ss_load’:
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:468:12: warning: format ‘%d’
expects argument of type ‘int’, but argument 4 has type ‘size_t’ {aka ‘long
unsigned int’} [-Wformat=]
PRINTF("%s:%d:done went active early, bytecount = %d\n",
^~~~
__func__, __LINE__, bytecount);
~
/mnt/data/adahl/src/u-boot/drivers/fpga/virtex2.c:25:37: note: in definition of
macro ‘PRINTF’
#define PRINTF(fmt, args...) printf(fmt, ##args)
^~~
Signed-off-by: Alexander Dahl
---
drivers/fpga/virtex2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 51b8d31205..e769ceebc1 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -330,7 +330,7 @@ static int virtex2_ssm_load(xilinx_desc *desc, const void
*buf, size_t bsize)
#endif
if ((*fn->done)(cookie) == FPGA_SUCCESS) {
- PRINTF("%s:%d:done went active early, bytecount = %d\n",
+ PRINTF("%s:%d:done went active early, bytecount =
%zu\n",
__func__, __LINE__, bytecount);
break;
}
@@ -465,7 +465,7 @@ static int virtex2_ss_load(xilinx_desc *desc, const void
*buf, size_t bsize)
#endif
if ((*fn->done)(cookie) == FPGA_SUCCESS) {
- PRINTF("%s:%d:done went active early, bytecount
= %d\n",
+ PRINTF("%s:%d:done went active early, bytecount
= %zu\n",
__func__, __LINE__, bytecount);
break;
}
--
2.30.2
