Re: [PATCH 1/2] rockchip: rk3588: Add support for ATAG parsing
On 3/27/24 15:32, Chris Morgan wrote:
> On Wed, Mar 27, 2024 at 06:32:06PM +0800, Kever Yang wrote:
>> Hi Chris,
>>
>> The ATAGS is used for passing parameter from bootloader to kernel at
>> first, which has been replaced by DTB now for ARM platform.
>>
>> And Rockchip using ATAGs for passing parameter like dram memory
>> size/board uart in different boot process like DRAM init binary/ TPL/SPL to
>> U-Boot since 2018.
>>
>> And almost at the same time, Simon add bloblist for mainline U-Boot
>> which for similar purpose.
>>
>> So I'm not sure if this ATAGS should be accept in mainline U-Boot or
>> not, even for rockchip platform only seems some kind of regression for this
>> feature support.
>>
>>
>> Hi Simon and Tom,
>>
>> Could you help to give some suggestion for this?
>>
>
> I really meant to do this as an "RFC", so I apologize in advance for
> possibly causing more work in treating this as a full-fledged patch.
>
> The problem I'm trying to solve is that I've got 2 boards, a Rock 5B
> as well as an Indiedroid Nova both with 16GB of RAM. I noticed that
> without the memory holes the Rock 5B defined in my Indiedroid it would
> also fail to boot. I've got 2 other boards as well with less than 16GB
> of RAM which seem to work fine without any holes (a 4GB Indiedroid Nova
> prototype and a GameForce Ace with 12GB of RAM).
Hi,
When I initially added these holes in the memory, I tried to ask Rockchip what
are
the holes for. I didn't get any answer, however the patches to reserve the holes
were accepted.
If we could get more information about why the holes are there, if that area is
specific to something, or that it's fixed in a per-SoC basis, we could reserve
it
by hardcoding in the Linux DT, without the need for ATAGs.
Without real information, we cannot be sure that for other variants of the SoC
or
some other bootrom configuration, the holes will not change/move.
Eugen
>
> The "RFC" part for which I'm really requesting guidance/comments is
> a question of "is it appropriate to use ATAGS" to get the RAM banks
> on this SoC, or is there a different way we should be doing it? If
> we can/should use the ATAGS, then I guess this can be pared down and
> refactored to just be RK3588 specific. If so, we can possibly add
> something like this to the RK3588 SoC specific code, guard it with
> an #ifdef ROCKCHIP_TPL to only call it when using the Rockchip
> specific RAM init (in the hopes that maybe one day we get our own
> RAM init), and then replace existing code for boards like the Rock 5B
> so that it no longer reserves these memory banks.
>
> Thank you,
> Chris.
>
>>
>> Thanks,
>> - Kever
>> On 2024/3/27 04:49, Chris Morgan wrote:
>>> From: Chris Morgan
>>>
>>> Add support for parsing the ATAGs created by the Rockchip binary
>>> RAM init. This ATAG parsing code was taken from the Rockchip BSP
>>> U-Boot source and tested only on parsing the RAM specific ATAGs
>>> for the RK3588.
>>>
>>> Signed-off-by: Chris Morgan
>>> ---
>>> arch/arm/include/asm/arch-rockchip/atags.h | 222 +
>>> arch/arm/mach-rockchip/Makefile| 1 +
>>> arch/arm/mach-rockchip/atags.c | 99 +
>>> 3 files changed, 322 insertions(+)
>>> create mode 100644 arch/arm/include/asm/arch-rockchip/atags.h
>>> create mode 100644 arch/arm/mach-rockchip/atags.c
>>>
>>> diff --git a/arch/arm/include/asm/arch-rockchip/atags.h
>>> b/arch/arm/include/asm/arch-rockchip/atags.h
>>> new file mode 100644
>>> index 00..9bae66d7f8
>>> --- /dev/null
>>> +++ b/arch/arm/include/asm/arch-rockchip/atags.h
>>> @@ -0,0 +1,222 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ */
>>> +/*
>>> + * (C) Copyright 2018 Rockchip Electronics Co., Ltd
>>> + *
>>> + */
>>> +
>>> +#ifndef __RK_ATAGS_H_
>>> +#define __RK_ATAGS_H_
>>> +
>>> +/* Tag magic */
>>> +#define ATAG_CORE 0x54410001
>>> +#define ATAG_NONE 0x
>>> +
>>> +#define ATAG_SERIAL0x54410050
>>> +#define ATAG_BOOTDEV 0x54410051
>>> +#define ATAG_DDR_MEM 0x54410052
>>> +#define ATAG_TOS_MEM 0x54410053
>>> +#define ATAG_RAM_PARTITION 0x54410054
>>> +#define ATAG_ATF_MEM 0x54410055
>>> +#define ATAG_PUB_KEY 0x54410056
>>> +#define ATAG_SOC_INFO 0x54410057
>>> +#define ATAG_BOOT1_PARAM 0x54410058
>>> +#define ATAG_PSTORE0x54410059
>>> +#define ATAG_FWVER 0x5441005a
>>> +#define ATAG_MAX 0x544100ff
>>> +
>>> +/* Tag size and offset */
>>> +#define ATAGS_SIZE (0x2000)/* 8K */
>>> +#define ATAGS_OFFSET (0x20 - ATAGS_SIZE)/* [2M-8K, 2M] */
>>> +#define ATAGS_PHYS_BASE(CFG_SYS_SDRAM_BASE + ATAGS_OFFSET)
>>> +
>>> +/* tag_fwver.ver[fwid][] */
>>> +#define FWVER_LEN 36
>>> +
>>> +enum fwid {
>>> + FW_DDR,
>>> + FW_SPL,
>>> + FW_ATF,
>>> + FW_TEE,
>>> + FW_MAX,
>>> +};
>>> +
>>> +struct tag_serial {
>>> +
[PULL next] u-boot-at91-2024.07-a
Hello Tom, Please pull tag u-boot-at91-2024.07-a , the first set of at91 features for the next cycle 2024.07 . This feature set includes a new board named sama7g54 Curiosity. Thanks, Eugen The following changes since commit 20a0ce574d6642e0dfe651467159039fac48cc4f: Merge tag 'v2024.04-rc4' into next (2024-03-11 15:27:20 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-at91.git tags/u-boot-at91-2024.07-a for you to fetch changes up to a7ba3bf65db264c02a774a59e8febc2ecb095f68: configs: at91: sama7g54_curiosity: Add initial default configs (2024-03-13 13:35:16 +0200) First set of u-boot-at91 features for the 2024.07 cycle Mihai Sain (4): ARM: dts: at91: sama7g5: Add flexcom 10 node ARM: dts: at91: sama7g54_curiosity: Add initial device tree of the board board: at91: sama7g54_curiosity: Add initial board support configs: at91: sama7g54_curiosity: Add initial default configs arch/arm/dts/Makefile | 3 + arch/arm/dts/at91-sama7g54_curiosity-u-boot.dtsi | 59 + arch/arm/dts/at91-sama7g54_curiosity.dts | 242 + arch/arm/dts/sama7g5.dtsi | 24 ++ arch/arm/mach-at91/Kconfig | 10 + board/atmel/sama7g54_curiosity/Kconfig | 15 ++ board/atmel/sama7g54_curiosity/MAINTAINERS | 9 + board/atmel/sama7g54_curiosity/Makefile| 7 + .../atmel/sama7g54_curiosity/sama7g54_curiosity.c | 36 +++ configs/sama7g54_curiosity_mmc_defconfig | 123 +++ configs/sama7g54_curiosity_nandflash_defconfig | 122 +++ configs/sama7g54_curiosity_qspiflash_defconfig | 122 +++ include/configs/sama7g54_curiosity.h | 17 ++ 13 files changed, 789 insertions(+) create mode 100644 arch/arm/dts/at91-sama7g54_curiosity-u-boot.dtsi create mode 100644 arch/arm/dts/at91-sama7g54_curiosity.dts create mode 100644 board/atmel/sama7g54_curiosity/Kconfig create mode 100644 board/atmel/sama7g54_curiosity/MAINTAINERS create mode 100644 board/atmel/sama7g54_curiosity/Makefile create mode 100644 board/atmel/sama7g54_curiosity/sama7g54_curiosity.c create mode 100644 configs/sama7g54_curiosity_mmc_defconfig create mode 100644 configs/sama7g54_curiosity_nandflash_defconfig create mode 100644 configs/sama7g54_curiosity_qspiflash_defconfig create mode 100644 include/configs/sama7g54_curiosity.h
Re: [RFC PATCH 0/3] mtd: nand: raw: atmel: Using dm driver for older sam9 SoCs
On 3/11/24 17:23, Alexander Dahl wrote: > Hello raw NAND fans, > Hello Alexander, Thank you for your efforts > today I thought it would be interesting to have all that automatic NAND > flash timings setting usable with an old board featuring a at91sam9g20 > SoC, which would pave the way to get rid of the old atmel raw nand > driver eventually. My "let's try this quickly" ended up in "damn this > took hours and now I'm stuck". > > Those older SoCs have no hardware ecc engine like the sama5d2 or sam9x60 > have, which the Linux driver can work with. (The U-Boot driver was > ported from Linux back then.) > > The problem is NAND flash detection fails because the atmel nand > controller drivers fails on probing. In fact > `atmel_nand_controller_init()` tries to set the pointer `nc->pmecc` by > calling `devm_atmel_pmecc_get()`. That one probably gets a > -EPROBE_DEFER returned by `atmel_pmecc_get_by_node()` and then > `atmel_nand_controller_init()` returns -EPROBE_DEFER too and probing the > driver fails. I suspect it should work fine if `nc->pmecc` would be > NULL, but I have no idea what would be the right place to implement > this. I also suspect that -EPROBE_DEFER contradicts the U-Boot driver > model somehow? The raw/atmel/nand-controller driver was adapted (quite > a bit) to work with U-Boot, but maybe some aspects of U-Boot driver > model where not considered correctly? I added Simon, to give us a hint on how to approach this. How I see it, is that the probing of the NAND should pause, and then the DM should look for the dependency, and probe it. if that dependency fails, then NAND probe fails. But returning DEFER would not be good since I do not believe there is another probe attempt unless manually done so (and it would be weird to get some error on first probe and success on the next, at least in u-boot state of mind) Maybe Simon can give us some ideas > > The attached patches are what I have so far, marked them as RFC because > my actual goal of using the new dm based driver for the old SoC was not > completed. Patches look good, but I am not sure whether they bring any additional value as you claim it's not working. Maybe they could be picked up and worked more to get it into the state you want ? >From my knowledge, investing effort into these old SoCs is not a priority for >the at91 people. Eugen > > Greets > Alex > > P.S.: Patch stack based on next. > > Alexander Dahl (3): > ARM: dts: at91sam9260: Add modern NAND controller nodes > memory: atmel-ebi: Add compatible for older 9260 cores > mtd: nand: raw: atmel: Remove redundant PMECC probe > > arch/arm/dts/at91sam9260.dtsi| 47 > drivers/memory/atmel_ebi.c | 1 + > drivers/mtd/nand/raw/atmel/nand-controller.c | 7 --- > drivers/mtd/nand/raw/atmel/pmecc.c | 1 + > 4 files changed, 49 insertions(+), 7 deletions(-) > > > base-commit: beedf675b36841ce1e09157a87a6505317e6
Re: [PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
On 3/18/24 10:09, mihai.s...@microchip.com wrote: > On 3/7/24 11:10, Alexander Dahl wrote: >> For now adds one new command 'hsmc' with a single subcommand 'decode' >> to read and display the content of the registers of the Static Memory >> Controllers (SMC/HSMC) found in different at91 SoCs. Needed to get a >> better picture on what raw nand core and atmel nand controller driver >> try to set as timings based on ONFI parameters of the connected NAND >> chip. >> >> Tested on SAMA5D2 and SAM9X60 based boards. Example output: >> >> U-Boot> hsmc decode >> >> mck clock rate: 2 >> >> SMC_SETUP3: 0x0002 >> SMC_PULSE3: 0x07040703 >> SMC_CYCLE3: 0x00070007 >> SMC_MODE3: 0x001f0003 >> NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 >> ns) >>NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 (35 >> ns) >> NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 >> ns) >>NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 >> (35 ns) >> Standard read is applied. >> TDF optimization enabled >> TDF cycles: 15 (75 ns) >> Data Bus Width: 8-bit bus >> NWAIT Mode: 0 >> Write operation controlled by NWE signal >> Read operation controlled by NRD signal > > Adding Mihai as he is usually very interested in such debug information and > methods. > > - > > Hi Alexander, > > I tested your work on sama7g54-curiosity board: > > U-Boot> nand info > > Device 0: nand0, sector size 256 KiB > Manufacturer MACRONIX > Model MX30LF4G28AD > Device size512 MiB > Page size 4096 b > OOB size 256 b > Erase size 262144 b > ecc strength 8 bits > ecc step size 512 b > subpagesize 4096 b > options 0x4200 > bbt options 0x00028000 > > U-Boot> hsmc decode > > mck clock rate: 2 > > HSMC_SETUP3:0x0001 > HSMC_PULSE3:0x07040804 > HSMC_CYCLE3:0x00070008 > HSMC_TIMINGS3: 0x880402f2 > HSMC_MODE3: 0x001f0003 > NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35 ns) >NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 (35 ns) > NCS_WR: setup: 0 (0 ns), pulse: 8 (40 ns), hold: 0 (0 ns), cycle: 8 (40 ns) >NWE: setup: 1 (5 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 8 (40 ns) > TDF optimization enabled > TDF cycles: 15 (75 ns) > Data Bus Width: 8-bit bus > NWAIT Mode: 0 > Write operation controlled by NWE signal > Read operation controlled by NRD signal > > Best regards, > Mihai Sain Hello Mihai, If you have any suggestions for improvement, changes, or you are happy with this command, is it useful ? You can provide your Tested-by then if you consider this is useful Eugen
Re: [PATCH v2 0/4] Add initial support for Microchip SAMA7G54 Curiosity board
On 2/27/24 15:43, Mihai Sain wrote: > This patch series adds initial support for Microchip SAMA7G54 Curiosity board. > > Changes in v2: > -- > > * Update flexcom 10 node in order to match previous flexcom definitions. > * Sort in alphabetical order all nodes and pinctrl. > * Remove status okay from leds, nand, eeprom, flash. > * Add CONFIG_ENV_SIZE=0x4000 in mmc defconfig. > * Set CONFIG_ENV_SECT_SIZE=0x1 in qspiflash defconfig. > > Mihai Sain (4): > ARM: dts: at91: sama7g5: Add flexcom 10 node > ARM: dts: at91: sama7g54_curiosity: Add initial device tree of the board > board: at91: sama7g54_curiosity: Add initial board support > configs: at91: sama7g54_curiosity: Add initial default configs > > arch/arm/dts/Makefile | 3 + > .../dts/at91-sama7g54_curiosity-u-boot.dtsi | 59 + > arch/arm/dts/at91-sama7g54_curiosity.dts | 242 ++ > arch/arm/dts/sama7g5.dtsi | 24 ++ > arch/arm/mach-at91/Kconfig| 10 + > board/atmel/sama7g54_curiosity/Kconfig| 15 ++ > board/atmel/sama7g54_curiosity/MAINTAINERS| 9 + > board/atmel/sama7g54_curiosity/Makefile | 7 + > .../sama7g54_curiosity/sama7g54_curiosity.c | 36 +++ > configs/sama7g54_curiosity_mmc_defconfig | 123 + > .../sama7g54_curiosity_nandflash_defconfig| 122 + > .../sama7g54_curiosity_qspiflash_defconfig| 122 + > include/configs/sama7g54_curiosity.h | 17 ++ > 13 files changed, 789 insertions(+) > create mode 100644 arch/arm/dts/at91-sama7g54_curiosity-u-boot.dtsi > create mode 100644 arch/arm/dts/at91-sama7g54_curiosity.dts > create mode 100644 board/atmel/sama7g54_curiosity/Kconfig > create mode 100644 board/atmel/sama7g54_curiosity/MAINTAINERS > create mode 100644 board/atmel/sama7g54_curiosity/Makefile > create mode 100644 board/atmel/sama7g54_curiosity/sama7g54_curiosity.c > create mode 100644 configs/sama7g54_curiosity_mmc_defconfig > create mode 100644 configs/sama7g54_curiosity_nandflash_defconfig > create mode 100644 configs/sama7g54_curiosity_qspiflash_defconfig > create mode 100644 include/configs/sama7g54_curiosity.h > Applied to u-boot-at91/next , thanks !
Re: [PATCH 4/4] mtd: nand: raw: atmel: Introduce optional debug commands
On 3/7/24 11:10, Alexander Dahl wrote:
> For now adds one new command 'hsmc' with a single subcommand 'decode' to
> read and display the content of the registers of the Static Memory
> Controllers (SMC/HSMC) found in different at91 SoCs. Needed to get a
> better picture on what raw nand core and atmel nand controller driver
> try to set as timings based on ONFI parameters of the connected NAND
> chip.
>
> Tested on SAMA5D2 and SAM9X60 based boards. Example output:
>
> U-Boot> hsmc decode
>
> mck clock rate: 2
>
> SMC_SETUP3: 0x0002
> SMC_PULSE3: 0x07040703
> SMC_CYCLE3: 0x00070007
> SMC_MODE3: 0x001f0003
> NCS_RD: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35
> ns)
>NRD: setup: 0 (0 ns), pulse: 4 (20 ns), hold: 3 (15 ns), cycle: 7 (35
> ns)
> NCS_WR: setup: 0 (0 ns), pulse: 7 (35 ns), hold: 0 (0 ns), cycle: 7 (35
> ns)
>NWE: setup: 2 (10 ns), pulse: 3 (15 ns), hold: 2 (10 ns), cycle: 7 (35
> ns)
> Standard read is applied.
> TDF optimization enabled
> TDF cycles: 15 (75 ns)
> Data Bus Width: 8-bit bus
> NWAIT Mode: 0
> Write operation controlled by NWE signal
> Read operation controlled by NRD signal
Adding Mihai as he is usually very interested in such debug information and
methods.
>
> Signed-off-by: Alexander Dahl
> ---
> drivers/mtd/nand/raw/Kconfig | 9 +
> drivers/mtd/nand/raw/atmel/nand-controller.c | 249 +++
> 2 files changed, 258 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index f6644899b0a..43057aa6c5b 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -50,12 +50,21 @@ config SYS_NAND_NO_SUBPAGE_WRITE
>
> config DM_NAND_ATMEL
> bool "Support Atmel NAND controller with DM support"
> + select MFD_ATMEL_SMC
> select SYS_NAND_SELF_INIT
> imply SYS_NAND_USE_FLASH_BBT
> help
> Enable this driver for NAND flash platforms using an Atmel NAND
> controller.
>
> +config CMD_NAND_ATMEL_DEBUG
> + bool "Optional debug commands for Atmel NAND controller"
> + depends on DM_NAND_ATMEL
> + help
> + Add commands for debugging internals of the Atmel NAND flash
> + controller, for example:
> + - Decode Static Memory Controller (SMC) registers
> +
> config NAND_ATMEL
> bool "Support Atmel NAND controller"
> select SYS_NAND_SELF_INIT
> diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
> b/drivers/mtd/nand/raw/atmel/nand-controller.c
> index e06523f3298..052d9c7b82a 100644
> --- a/drivers/mtd/nand/raw/atmel/nand-controller.c
> +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
> @@ -51,11 +51,13 @@
>
> #include
> #include
> +#include
> #include
> #include
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -69,6 +71,7 @@
> #include
> #include
> #include
> +#include
>
> #include "pmecc.h"
>
> @@ -216,6 +219,7 @@ struct atmel_nand_controller_ops {
> int (*ecc_init)(struct nand_chip *chip);
> int (*setup_data_interface)(struct atmel_nand *nand, int csline,
> const struct nand_data_interface *conf);
> + void (*print_info)(struct atmel_nand *nand, int csline);
> };
>
> struct atmel_nand_controller_caps {
> @@ -2041,12 +2045,214 @@ err:
> return ret;
> }
>
> +#ifdef CONFIG_CMD_NAND_ATMEL_DEBUG
> +u32 atmel_smc_decode_ncycles(u32 reg, u32 shift, u32 msbpos, u32 msbwidth,
> u32 msbfactor)
> +{
> + /*
> + * Examples:
> + *
> + * NRD setup length = (128 * NRD_SETUP[5] + NRD_SETUP[4:0]) clock
> cycles.
> + * NRD pulse length = (256 * NRD_PULSE[6] + NRD_PULSE[5:0]) clock
> cycles.
> + * Read cycle length = (NRD_CYCLE[8:7] * 256) + NRD_CYCLE[6:0]
> clock cycles.
> + */
> +
> + reg >>= shift;
> +
> + u32 lsbmask = GENMASK(msbpos - 1, 0);
> + u32 msbmask = GENMASK(msbwidth - 1, 0) << msbpos;
> + u32 msb = (reg & msbmask) >> msbpos;
> + u32 lsb = (reg & lsbmask);
> +
> + return msb * msbfactor + lsb;
> +}
> +
> +static void atmel_smc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int
> cs)
> +{
> + printf("SMC_SETUP%d: 0x%08x\n", cs, conf->setup);
> + printf("SMC_PULSE%d: 0x%08x\n", cs, conf->pulse);
> + printf("SMC_CYCLE%d: 0x%08x\n", cs, conf->cycle);
> + printf("SMC_MODE%d: 0x%08x\n", cs, conf->mode);
> +}
> +
> +static void atmel_hsmc_cs_conf_print_raw(struct atmel_smc_cs_conf *conf, int
> cs)
> +{
> + printf("HSMC_SETUP%d:0x%08x\n", cs, conf->setup);
> + printf("HSMC_PULSE%d:0x%08x\n", cs, conf->pulse);
> + printf("HSMC_CYCLE%d:0x%08x\n", cs, conf->cycle);
> + printf("HSMC_TIMINGS%d: 0x%08x\n", cs, conf->timings);
> + printf("HSMC_MODE%d: 0x%08x\n", cs, conf->mode);
> +}
> +
> +static void
Re: [PATCH] configs: rockchip: rock5a: enable environment
On 3/5/24 04:10, Trevor Woerner wrote: > Following the pattern of other Rockchip devices, enable the U-Boot > environment to be stored in MMC. This patch specifically assumes the > environment will be stored on the SDcard. > > Signed-off-by: Trevor Woerner > --- > configs/rock5a-rk3588s_defconfig | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/configs/rock5a-rk3588s_defconfig > b/configs/rock5a-rk3588s_defconfig > index a6471a519514..ac6411667d9a 100644 > --- a/configs/rock5a-rk3588s_defconfig > +++ b/configs/rock5a-rk3588s_defconfig > @@ -8,6 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y > CONFIG_NR_DRAM_BANKS=2 > CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0 > +CONFIG_ENV_SIZE=0x8000 > CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a" > CONFIG_ROCKCHIP_RK3588=y > CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y > @@ -48,6 +49,8 @@ CONFIG_CMD_REGULATOR=y > CONFIG_SPL_OF_CONTROL=y > CONFIG_OF_LIVE=y > CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks > assigned-clock-rates assigned-clock-parents" > +CONFIG_ENV_IS_IN_MMC=y > +CONFIG_SYS_MMC_ENV_DEV=1 > CONFIG_SPL_DM_SEQ_ALIAS=y > CONFIG_SPL_REGMAP=y > CONFIG_SPL_SYSCON=y Hi Trevor, What will happen if there is no Sd-Card, and we boot from eMMC or SPI flash ? The rockchip pattern is usually to have a standard config for all boards and it is not stored anywhere. Kever, Jonas, please correct me if I am wrong. Eugen
Re: [RFC] rockchip: Reset to bootrom download mode on hang
Hello Jonas, On 2/5/24 14:34, Jonas Karlman wrote: > Hi Quentin, > > On 2024-02-05 11:49, Quentin Schulz wrote: >> Hi Jonas, >> >> On 2/2/24 01:12, Jonas Karlman wrote: >>> Add support to reset to bootrom download mode on hang in U-Boot SPL and >>> proper. ROCKCHIP_HANG_TO_BROM can be used to enable this feature. >>> >>> Example when SPL cannot load FIT: >>> >>>U-Boot SPL 2024.04-rc1 (Feb 01 2024 - 23:01:12 +) >>>Trying to boot from MMC1 >>>mmc_load_image_raw_sector: mmc block read error >>>Trying to boot from MMC2 >>>Card did not respond to voltage select! : -110 >>>spl: mmc init failed with error: -95 >>>Trying to boot from MMC1 >>>mmc_load_image_raw_sector: mmc block read error >>>SPL: failed to boot from all boot devices >>>### ERROR ### Please RESET the board ### >>>entering download mode ... >>>resetting ... >>> >>> Procedure to start bootrom download mode: >>> - U-Boot SPL or proper write 0xEF08A53C to BOOT_MODE_REG and then reset >>> - Bootrom loads and run boot code (TPL) from e.g. SPI > eMMC > SD-card >>> - TPL check for 0xEF08A53C in BOOT_MODE_REG very early, i.e. Rockchip >>>TPL blobs check for this value directly at start >>> - TPL return to bootrom with a return value != 0 >>> - Bootrom enter download mode >>> >>> This also fixes an issue where the BOOT_MODE_REG is reset to 0 when >>> board is reset on RK35xx after TF-A has been loaded. To fix this the >>> SOC_CON1 reg value is reset prior to issuing a global reset. >>> >>> The RK356x TF-A blobs will clear SOC_CON1 as part of a PSCI reset, >>> however the RK3588 TF-A blobs does not seem to clear SOC_CON1. Recently I tested BL31 with TF-A, it works, and you can send a patch to fix bugs in there if you find them ! Its open source, I gathered the patches and tested them here: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/trusted-firmware-a >>> >>> Signed-off-by: Jonas Karlman >> >> I'm wondering if there isn't a simpler way to do this? >> >> board_boot_order() could parse u-boot,spl-boot-order for e.g. "bootrom", >> the same way it does for "same-as-spl" for example. >> >> If it is set, then add BOOT_DEVICE_BOOTROM to spl_boot_list. >> >> Then this would call spl_return_to_bootrom() from >> common/spl/spl_bootrom.c which in turns would call >> board_return_to_bootrom() and back_to_bootrom(). >> >> What do you think? > > Something like that is what I did in my initial implementation :-) > > I appended a BOOT_DEVICE_BOOTROM at the end of board_boot_order() and > implemented necessary parts in spl_return_to_bootrom(), and that worked > great for SPL. > > However, to catch a hang() in U-Boot proper, e.g. a failed initcall, the > only existing integration callback for hang() is to override > show_boot_progress(). > > Because the use of show_boot_progress() worked for both SPL and U-Boot > proper (probably also TPL) it seemed better to only have one integration > part for all phases. > > I am still not sure exactly when we would want to fall back into bootrom > download mode. Always at a hang() or at controlled parts e.g. when no > FIT can be loaded. > > I am open for any suggestions. I implemented DFU in SPL at some point last year (due to DWC3 being unaligned with Linux the patches weren't accepted), and defaulting to DFU is also an option when nothing boots. ( https://patchwork.ozlabs.org/project/uboot/cover/20230801072811.10354-1-eugen.hris...@collabora.com/#3185956 ) Eugen > > Regards, > Jonas > >> >> Cheers, >> Quentin >
[PULL] u-boot-at91-2024.04-a
Hello Tom, Please pull tag u-boot-at91-2024.04-a , the first set of at91 features for 2024.04 cycle. This set includes some DT alignments and solves a compile issue for custom nand defconfigs. Thanks, Eugen The following changes since commit 3c04fcf3137d5f694d52b8f355373e4baabe5f78: Merge patch series "k3-j721e: beagleboneai: Fix USB" (2024-01-20 11:39:13 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-at91.git tags/u-boot-at91-2024.04-a for you to fetch changes up to a1c6b08274e18e4afc0f78a2f63609880aa7ef08: mtd: nand: raw: atmel: Remove duplicate definitions (2024-01-22 06:05:26 +0200) First set of u-boot-at91 features for the 2024.04 cycle Alexander Dahl (4): ARM: dts: at91: sama5d2: Move sfr node ARM: dts: at91: sama5d2: Port ebi/nand nodes from linux ARM: dts: at91: sama5d2: Align more node names with Linux mtd: nand: raw: atmel: Remove duplicate definitions arch/arm/dts/sama5d2.dtsi | 74 +- drivers/mtd/nand/raw/atmel/pmecc.c | 3 -- 2 files changed, 65 insertions(+), 12 deletions(-)
Re: [PATCH 6/7] rockchip: rk3588: Add default u-boot,spl-boot-order prop
On 1/27/24 00:14, Jonas Karlman wrote:
> Add a default u-boot,spl-boot-order prop to rk3588s-u-boot.dtsi and
> remove the prop from board u-boot.dtsi files using the default value.
>
> Signed-off-by: Jonas Karlman
Reviewed-by: Eugen Hristev
> ---
> arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 6 --
> arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi | 6 --
> arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi | 6 --
> arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 4
> arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi | 6 --
> arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi| 6 --
> arch/arm/dts/rk3588s-u-boot.dtsi| 4
> 7 files changed, 4 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> index 87831c9d432a..60494bb8485f 100644
> --- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> @@ -6,12 +6,6 @@
>
> #include "rk3588-u-boot.dtsi"
>
> -/ {
> - chosen {
> - u-boot,spl-boot-order = "same-as-spl", ,
> - };
> -};
> -
> _pins {
> bootph-all;
> };
> diff --git a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi
> b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi
> index b0f5c667197c..5d5fa6ffb214 100644
> --- a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi
> @@ -2,12 +2,6 @@
>
> #include "rk3588-u-boot.dtsi"
>
> -/ {
> - chosen {
> - u-boot,spl-boot-order = "same-as-spl", ,
> - };
> -};
> -
> _pins {
> bootph-all;
> };
> diff --git a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
> b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
> index 191ec988c459..7b937943a53c 100644
> --- a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
> @@ -4,9 +4,3 @@
> */
>
> #include "rk3588-u-boot.dtsi"
> -
> -/ {
> - chosen {
> - u-boot,spl-boot-order = "same-as-spl", ,
> - };
> -};
> diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> index 5fa20cecc044..e99e60185ebe 100644
> --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> @@ -7,10 +7,6 @@
> #include
>
> / {
> - chosen {
> - u-boot,spl-boot-order = "same-as-spl", ,
> - };
> -
> vcc12v_dcin: vcc12v-dcin-regulator {
> compatible = "regulator-fixed";
> regulator-name = "vcc12v_dcin";
> diff --git a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
> b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
> index 06c6f327c14b..e791b572b6bf 100644
> --- a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
> @@ -6,12 +6,6 @@
>
> #include "rk3588-u-boot.dtsi"
>
> -/ {
> - chosen {
> - u-boot,spl-boot-order = "same-as-spl", ,
> - };
> -};
> -
> {
> cap-mmc-highspeed;
> mmc-ddr-1_8v;
> diff --git a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
> b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
> index 584476f77b13..9a6a353088df 100644
> --- a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
> @@ -5,12 +5,6 @@
>
> #include "rk3588s-u-boot.dtsi"
>
> -/ {
> - chosen {
> - u-boot,spl-boot-order = "same-as-spl", ,
> - };
> -};
> -
> {
> cap-mmc-highspeed;
> mmc-ddr-1_8v;
> diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi
> b/arch/arm/dts/rk3588s-u-boot.dtsi
> index d251a210b313..945b2d62a75e 100644
> --- a/arch/arm/dts/rk3588s-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588s-u-boot.dtsi
> @@ -10,6 +10,10 @@
> spi5 =
> };
>
> + chosen {
> + u-boot,spl-boot-order = "same-as-spl", ,
> + };
> +
> dmc {
> compatible = "rockchip,rk3588-dmc";
> bootph-all;
Re: [PATCH 1/3] rockchip: rk35xx: Remove use of eMMC DDR52 mode
Hi Jonas,
On 1/27/24 01:26, Jonas Karlman wrote:
> Writing to eMMC using DDR52 mode does not work reliably or at all on
> RK356x and RK3588 boards.
>
This is related to the old issue I encountered last year with mmc write?
Thanks,
Eugen
> Fix this by removing the mmc-ddr-1_8v prop from sdhci nodes.
>
> Signed-off-by: Jonas Karlman
> ---
> arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi | 1 -
> arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi | 1 -
> arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 1 -
> arch/arm/dts/rk3566-soquartz-u-boot.dtsi | 1 -
> arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi | 1 -
> arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 1 -
> arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi| 1 -
> arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi| 1 -
> arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 1 -
> arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 1 -
> arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi | 1 -
> arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi | 1 -
> 12 files changed, 12 deletions(-)
>
> diff --git a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> index 11976fd3a6e0..930d660868bb 100644
> --- a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> +++ b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
> @@ -8,7 +8,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> pinctrl-names = "default";
> pinctrl-0 = <_bus8 _clk _cmd _datastrobe>;
> };
> diff --git a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> index 8de9d1535efb..c235b4357f7d 100644
> --- a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> +++ b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
> @@ -4,7 +4,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> pinctrl-names = "default";
> pinctrl-0 = <_bus8 _clk _cmd _datastrobe>;
> };
> diff --git a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
> b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
> index 158f652cb3b1..e0e501deccfe 100644
> --- a/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
> +++ b/arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
> @@ -7,5 +7,4 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> };
> diff --git a/arch/arm/dts/rk3566-soquartz-u-boot.dtsi
> b/arch/arm/dts/rk3566-soquartz-u-boot.dtsi
> index f65f4067f3e9..5e46a2422d60 100644
> --- a/arch/arm/dts/rk3566-soquartz-u-boot.dtsi
> +++ b/arch/arm/dts/rk3566-soquartz-u-boot.dtsi
> @@ -4,7 +4,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> pinctrl-names = "default";
> pinctrl-0 = <_bus8 _clk _cmd _datastrobe>;
> };
> diff --git a/arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi
> b/arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi
> index a44ac35bdacd..1597473017ed 100644
> --- a/arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi
> @@ -8,7 +8,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> mmc-hs400-1_8v;
> mmc-hs400-enhanced-strobe;
> pinctrl-0 = <_bus8 _clk _cmd _datastrobe>;
> diff --git a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
> b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
> index 62f572c4cf9f..64c43374c042 100644
> --- a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
> @@ -14,7 +14,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> mmc-hs200-1_8v;
> mmc-hs400-1_8v;
> mmc-hs400-enhanced-strobe;
> diff --git a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
> b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
> index ecba91aa30f5..1fc71faa9e07 100644
> --- a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
> @@ -8,7 +8,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> mmc-hs200-1_8v;
> mmc-hs400-1_8v;
> mmc-hs400-enhanced-strobe;
> diff --git a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
> b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
> index caf524443079..74755a44eaee 100644
> --- a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
> @@ -16,7 +16,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> mmc-hs200-1_8v;
> mmc-hs400-1_8v;
> mmc-hs400-enhanced-strobe;
> diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> index 46ebb77283f1..5b823fcca5fb 100644
> --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
> @@ -20,7 +20,6 @@
>
> {
> cap-mmc-highspeed;
> - mmc-ddr-1_8v;
> mmc-hs200-1_8v;
> mmc-hs400-1_8v;
> mmc-hs400-enhanced-strobe;
> diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> index e99e60185ebe..9ee9dd051e32 100644
> --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> @@ -31,7 +31,6 @@
>
> {
> cap-mmc-highspeed;
> -
Re: [PATCH 0/4] Facilitate new atmel raw nand driver for SAMA5D2
On 12/12/23 18:04, Alexander Dahl wrote:
> Hei hei,
>
> for some downstream boards with SAMA5D27 SiP SoCs with raw NAND flash I
> added the necessary nodes to sama5d2.dtsi with just one little
> guesswork: the clocks. Motivation was to fix reading from raw nand
> flash which failed on some of those boards, while others worked fine.
> So I suppose the timings for the external interface were set to too slow
> values. (IIRC I took them from the sama5d2_ptc_ek_nandflash board code
> back in 2019.)
>
> The solution was basically to switch from the old non-DM driver with
> hardcoded timings for the external memory interface to the new DM based
> driver introduced earlier this year, which sets the timings based on
> ONFI parameters read from the flash chip.
>
> Works for me, but I have no boards with that SoC _and_ a raw NAND flash
> at hand, which are supported by upstream U-Boot. The only matching
> upstream config is sama5d2_ptc_ek_nandflash_defconfig but because we
> don't have that board, I did not touch it.
>
> (When that driver was added with 6a8dfd57220d ("nand: atmel: Add DM
> based NAND driver") the author claims in the commit message it was
> tested on SAMA5D3, but none of the sama5d3 configs actually uses it.)
>
> Some more changes to the board dts are necessary, but porting from Linux
> is straightforward. The necessary changes to the defconfig should look
> like this:
>
> # CONFIG_I2C is not set
> CONFIG_LED=y
> CONFIG_LED_GPIO=y
> +CONFIG_ATMEL_EBI=y
> +CONFIG_MFD_ATMEL_SMC=y
> # CONFIG_MMC is not set
> CONFIG_MTD=y
> -CONFIG_NAND_ATMEL=y
> -CONFIG_ATMEL_NAND_HW_PMECC=y
> -CONFIG_PMECC_CAP=8
> +CONFIG_DM_MTD=y
> +CONFIG_DM_NAND_ATMEL=y
> CONFIG_SYS_NAND_ONFI_DETECTION=y
> CONFIG_PHY_SMSC=y
> CONFIG_MACB=y
>
> Hope the changes are acceptable nevertheless. The last patch has a
> trivial fix for the new atmel raw nand driver which I came up with while
> working on this.
>
> Greets
> Alex
>
> Cc: Eugen Hristev
> Cc: Dario Binacchi
> Cc: Michael Trimarchi
> Cc: Wenyou Yang
> Cc: Balamanikandan Gunasundar
>
> Alexander Dahl (4):
> ARM: dts: at91: sama5d2: Move sfr node
> ARM: dts: at91: sama5d2: Port ebi/nand nodes from linux
> ARM: dts: at91: sama5d2: Align more node names with Linux
> mtd: nand: raw: atmel: Remove duplicate definitions
>
> arch/arm/dts/sama5d2.dtsi | 74 ++
> drivers/mtd/nand/raw/atmel/pmecc.c | 3 --
> 2 files changed, 65 insertions(+), 12 deletions(-)
>
>
> base-commit: 2f0282922b2c458eea7f85c500a948a587437b63
Applied series to u-boot-at91/master, thanks !
Re: [PATCH 4/4] mtd: nand: raw: atmel: Remove duplicate definitions
On 12/19/23 18:39, Alexander Dahl wrote:
> Hello Eugen,
>
> Am Tue, Dec 19, 2023 at 04:32:07PM +0200 schrieb Eugen Hristev:
>> On 12/12/23 18:04, Alexander Dahl wrote:
>>> These removed definitions were specific to some sam9 SoCs, but not
>>> generic over all at91 SoCs. The correct SoC specific definitions for
>>> ATMEL_BASE_PMECC are spread over different header files in
>>> arch/arm/mach-at91/include/mach directory.
>>>
>>> Fixes a build error on a custon board based on SAMA5D2:
>>>
>>> Building current source for 73 boards (16 threads, 1 job per thread)
>>>arm: + vera2
>>> +drivers/mtd/nand/raw/atmel/pmecc.c:819: warning: "ATMEL_BASE_PMECC"
>>> redefined
>>> + 819 | #define ATMEL_BASE_PMECC0xe000
>>> + |
>>> +In file included from include/configs/vera2.h:11,
>>> + from include/config.h:3,
>>> + from include/linux/mtd/rawnand.h:16,
>>> + from drivers/mtd/nand/raw/atmel/pmecc.c:44:
>>> +include/asm/arch/sama5d2.h:171: note: this is the location of the
>>> previous definition
>>> + 171 | #define ATMEL_BASE_PMECC(ATMEL_BASE_HSMC + 0x70)
>>> +drivers/mtd/nand/raw/atmel/pmecc.c:820: warning: "ATMEL_BASE_PMERRLOC"
>>> redefined
>>> + 820 | #define ATMEL_BASE_PMERRLOC 0xe600
>>> +include/asm/arch/sama5d2.h:172: note: this is the location of the
>>> previous definition
>>> + 172 | #define ATMEL_BASE_PMERRLOC (ATMEL_BASE_HSMC + 0x500)
>>>
>>> Fixes: a490e1b7c017 ("nand: atmel: Add pmecc driver")
>>> Signed-off-by: Alexander Dahl
>>> ---
>>> drivers/mtd/nand/raw/atmel/pmecc.c | 3 ---
>>> 1 file changed, 3 deletions(-)
>>>
>>> diff --git a/drivers/mtd/nand/raw/atmel/pmecc.c
>>> b/drivers/mtd/nand/raw/atmel/pmecc.c
>>> index e2e3f1ee6b5..51f6bd2e65b 100644
>>> --- a/drivers/mtd/nand/raw/atmel/pmecc.c
>>> +++ b/drivers/mtd/nand/raw/atmel/pmecc.c
>>> @@ -816,9 +816,6 @@ int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user)
>>> }
>>> EXPORT_SYMBOL_GPL(atmel_pmecc_wait_rdy);
>>>
>>> -#define ATMEL_BASE_PMECC 0xe000
>>> -#define ATMEL_BASE_PMERRLOC0xe600
>>> -
>>> static struct atmel_pmecc *
>>> atmel_pmecc_create(struct udevice *dev,
>>>const struct atmel_pmecc_caps *caps,
>>
>>
>> Hi Alexander,
>>
>> What happens if we try to select and build this driver without
>> sama5d2/sama5d3/sama5d4/sam9x5/sam9x60 ?
>> Is it even possible ?
>
> It is not possible on non-at91 boards because is
> included so you need to select arch at91. But it is possible on older
> sam9 boards like sam9260, sam9g20 and the like. Tried that by using
> at91sam9g20ek_nandflash_defconfig as a base, then disabling
> CONFIG_NAND_ATMEL, then enabling CONFIG_DM_NAND_ATMEL (which activates
> build of drivers/mtd/nand/raw/atmel/pmecc.c), then enabling some more
> missing dependencies (CONFIG_MFD_ATMEL_SMC, CONFIG_REGMAP,
> CONFIG_SYSCON) and then it builds just fine.
>
> (btw: should those be selected or implied by CONFIG_DM_NAND_ATMEL in
> 'drivers/mtd/nand/raw/Kconfig' then in another patch or is this stuff
> rather loose coupled?)
Hi Alexander,
I tried to look around the drivers and the symbols, but it appears enabling any
sort of driver makes things stop building, as the dependencies are not at all
stated correctly.
Thus, I cannot really answer that.
About this modification in particular, I ran the CI loop, it appears to be fine,
and I agree with the duplication, I was a bit reluctant to not break old
platforms,
but since the CI says it's fine... I applied your set to u-boot-at91/master .
Eugen
>
>> Because it appears these defines are done for those SoCs in their
>> mach header, but the driver uses them in any situation.
>
> I don't think so. There are two drivers, the old one is
> 'drivers/mtd/nand/raw/atmel_nand.c' selected by CONFIG_NAND_ATMEL
> while the new one is 'drivers/mtd/nand/raw/atmel/nand-controller.c'
> selected by CONFIG_DM_NAND_ATMEL (note the extra sub-directory). Only
> the new one leads to building the file in question. The symbols
> removed from pmecc.c are not used in pmecc.c but only in the old
> driver. The scope of those removed symbols would have been in pmecc.c
> only however, they are pointless at the place where they are currently
> defined. (Unless someone would #include that .c file, but that
&g
Re: [PATCH 4/4] mtd: nand: raw: atmel: Remove duplicate definitions
On 12/12/23 18:04, Alexander Dahl wrote:
> These removed definitions were specific to some sam9 SoCs, but not
> generic over all at91 SoCs. The correct SoC specific definitions for
> ATMEL_BASE_PMECC are spread over different header files in
> arch/arm/mach-at91/include/mach directory.
>
> Fixes a build error on a custon board based on SAMA5D2:
>
> Building current source for 73 boards (16 threads, 1 job per thread)
>arm: + vera2
> +drivers/mtd/nand/raw/atmel/pmecc.c:819: warning: "ATMEL_BASE_PMECC"
> redefined
> + 819 | #define ATMEL_BASE_PMECC0xe000
> + |
> +In file included from include/configs/vera2.h:11,
> + from include/config.h:3,
> + from include/linux/mtd/rawnand.h:16,
> + from drivers/mtd/nand/raw/atmel/pmecc.c:44:
> +include/asm/arch/sama5d2.h:171: note: this is the location of the
> previous definition
> + 171 | #define ATMEL_BASE_PMECC(ATMEL_BASE_HSMC + 0x70)
> +drivers/mtd/nand/raw/atmel/pmecc.c:820: warning: "ATMEL_BASE_PMERRLOC"
> redefined
> + 820 | #define ATMEL_BASE_PMERRLOC 0xe600
> +include/asm/arch/sama5d2.h:172: note: this is the location of the
> previous definition
> + 172 | #define ATMEL_BASE_PMERRLOC (ATMEL_BASE_HSMC + 0x500)
>
> Fixes: a490e1b7c017 ("nand: atmel: Add pmecc driver")
> Signed-off-by: Alexander Dahl
> ---
> drivers/mtd/nand/raw/atmel/pmecc.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/atmel/pmecc.c
> b/drivers/mtd/nand/raw/atmel/pmecc.c
> index e2e3f1ee6b5..51f6bd2e65b 100644
> --- a/drivers/mtd/nand/raw/atmel/pmecc.c
> +++ b/drivers/mtd/nand/raw/atmel/pmecc.c
> @@ -816,9 +816,6 @@ int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user)
> }
> EXPORT_SYMBOL_GPL(atmel_pmecc_wait_rdy);
>
> -#define ATMEL_BASE_PMECC 0xe000
> -#define ATMEL_BASE_PMERRLOC 0xe600
> -
> static struct atmel_pmecc *
> atmel_pmecc_create(struct udevice *dev,
> const struct atmel_pmecc_caps *caps,
Hi Alexander,
What happens if we try to select and build this driver without
sama5d2/sama5d3/sama5d4/sam9x5/sam9x60 ?
Is it even possible ?
Because it appears these defines are done for those SoCs in their mach header,
but
the driver uses them in any situation. And currently, these warnings are being
ignored if the driver is built with sama5d2/sama5d3/sama5d4/sam9x5/sam9x60 ? or
the
driver actually isn't even built with these platforms at all ?
So, I guess it would be safer to do #ifndef ATMEL_BASE_PMECC, #define ...
Or, we could fix the driver to get these base addresses from the platform/DT ?
Eugen
Re: eMMC errors on RK3588 (rock5b)
On 11/23/23 07:22, Tom Fitzhenry wrote: I am able to reproduce this on RK3588 QuartzPro64. I cannot reproduce on the vendor u-boot, used on stock RK3588 QuartzPro64. That works fine. I thought "[PATCH v2 RESEND] mmc: dw_mmc: reset controller after data error"[0] might fix this, but after applying that, I am still able to reproduce the issue. 0. https://lore.kernel.org/u-boot/20230619103347.278004-1-eugen.hris...@collabora.com/ I never said that patch would fix this issue. It fixes another problem that was happening when the controller was resetting. But that issue was arising only in a specific scenario which happened only during my tests. So the fix is here, it's helpful, but not fixing this issue. And it appears that this fix will not be accepted to upstream, as it's months since I am resending it. Eugen
Re: [PATCH] arm: Enable SYS_THUMB_BUILD on AT91
On 11/17/23 15:46, Tom Rini wrote: On Fri, Nov 17, 2023 at 03:45:02PM +0200, Eugen Hristev wrote: On 11/17/23 15:40, Tom Rini wrote: On Sat, 04 Nov 2023 22:27:42 -0400, Sean Anderson wrote: Several AT91 boards are quite close to their SPL size limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't even fit with older GCCs. All AT91 processors should have thumb support. Enable SYS_THUMB_BUILD. This shrinks SPL by around 30%. [...] Applied to u-boot/next, thanks! so I'd assume that it would go through at91 tree. Ah, sorry. Since it was blocking two other series from coming in and you had gotten it tested I had assumed I could pull it to -next now to unblock that work. This is yet another time at91 patches get applied directly. Maybe you do not really need an at91 maintainer ?
Re: [PATCH] arm: Enable SYS_THUMB_BUILD on AT91
On 11/17/23 15:40, Tom Rini wrote: On Sat, 04 Nov 2023 22:27:42 -0400, Sean Anderson wrote: Several AT91 boards are quite close to their SPL size limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't even fit with older GCCs. All AT91 processors should have thumb support. Enable SYS_THUMB_BUILD. This shrinks SPL by around 30%. [...] Applied to u-boot/next, thanks! so I'd assume that it would go through at91 tree.
Re: [PATCH] arm: Enable SYS_THUMB_BUILD on AT91
On 11/17/23 11:15, mihai.s...@microchip.com wrote: Hi Eugen, I built new binaries with CONFIG_SYS_THUMB_BUILD=y for sam9x60_curiosity, sama5d29_curiosity, sama7g5ek and new sam9x75_curiosity board. I used the latest u-boot/master branch for this test. I noticed that the file size of the binaries have beed reduced with aprox 150KiB due to CONFIG_SYS_THUMB_BUILD=y. After flashing the new binaries on these boards I can confirm that on all boards the linux kernel was booted properly from mmc, qspi-flash, nand-flash and usb. I tested using bootm and bootz commands. Thank you Mihai, Tom, Sean, are you okay with this going in the next merge window ? It is definitely not a fix, so that would be the best. Eugen Best regards, Mihai Sain On 11/16/23 20:47, Tom Rini wrote: On Sat, Nov 04, 2023 at 10:27:42PM -0400, Sean Anderson wrote: Several AT91 boards are quite close to their SPL size limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't even fit with older GCCs. All AT91 processors should have thumb support. Enable SYS_THUMB_BUILD. This shrinks SPL by around 30%. Signed-off-by: Sean Anderson --- This has been BUILD TESTED ONLY! We in turn need this for Sean's other cleanup series to go in. Is this OK? Would it be safer if it was only for CPU_V7A ? I do have recollections of thumb being sometimes buggy prior to v7a cores. Thanks! Hi Tom, I would like this to be tested on a few boards at least. There are boards with Cortex A5, A7 and ARM926 which are important, one of each of them and booting Linux should be enough I think. Nicolas, Aubin ? I remember you guys have also a CI tool that is fairly easy to use if you just push a branch/commit. + Mihai as well. Eugen
Re: [PATCH] arm: Enable SYS_THUMB_BUILD on AT91
On 11/16/23 20:47, Tom Rini wrote: On Sat, Nov 04, 2023 at 10:27:42PM -0400, Sean Anderson wrote: Several AT91 boards are quite close to their SPL size limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't even fit with older GCCs. All AT91 processors should have thumb support. Enable SYS_THUMB_BUILD. This shrinks SPL by around 30%. Signed-off-by: Sean Anderson --- This has been BUILD TESTED ONLY! We in turn need this for Sean's other cleanup series to go in. Is this OK? Would it be safer if it was only for CPU_V7A ? I do have recollections of thumb being sometimes buggy prior to v7a cores. Thanks! Hi Tom, I would like this to be tested on a few boards at least. There are boards with Cortex A5, A7 and ARM926 which are important, one of each of them and booting Linux should be enough I think. Nicolas, Aubin ? I remember you guys have also a CI tool that is fairly easy to use if you just push a branch/commit. + Mihai as well. Eugen
Re: [PATCH 3/3] treewide: use linux/time.h for time conversion defines
On 11/9/23 19:10, Igor Prusov wrote: Now that we have time conversion defines from in time.h there is no need for each driver to define their own version. Signed-off-by: Igor Prusov --- board/friendlyarm/nanopi2/onewire.c | 5 + drivers/clk/at91/clk-main.c | 2 +- drivers/i2c/stm32f7_i2c.c| 11 +-- drivers/memory/stm32-fmc2-ebi.c | 5 ++--- drivers/mmc/octeontx_hsmmc.h | 2 -- drivers/mtd/nand/raw/atmel/nand-controller.c | 3 +-- drivers/mtd/nand/raw/mxs_nand.c | 3 +-- drivers/mtd/nand/raw/octeontx_nand.c | 2 +- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 5 ++--- drivers/phy/meson-axg-mipi-dphy.c| 3 +-- drivers/phy/phy-core-mipi-dphy.c | 3 +-- drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c | 3 +-- drivers/pwm/pwm-aspeed.c | 3 +-- drivers/pwm/pwm-at91.c | 2 +- drivers/pwm/pwm-cadence-ttc.c| 3 +-- drivers/pwm/pwm-meson.c | 3 +-- drivers/pwm/pwm-mtk.c| 3 +-- drivers/pwm/pwm-ti-ehrpwm.c | 3 +-- drivers/serial/serial_msm_geni.c | 3 +-- drivers/spi/cadence_qspi.c | 3 +-- drivers/spi/fsl_dspi.c | 4 +--- drivers/ufs/cdns-platform.c | 3 +-- drivers/usb/dwc3/core.c | 3 +-- drivers/video/dw_mipi_dsi.c | 3 +-- drivers/video/rockchip/dw_mipi_dsi_rockchip.c| 3 +-- drivers/video/tegra20/tegra-dsi.c| 4 +--- drivers/watchdog/sunxi_wdt.c | 3 +-- fs/ubifs/ubifs.h | 1 - 28 files changed, 32 insertions(+), 62 deletions(-) Reviewed-by: Eugen Hristev #at91
Re: [PATCH 0/4] Add support for sam9x60 curiosity
On 9/26/23 09:13, durai.manicka...@microchip.com wrote: On 22/09/23 12:30, Alexander Dahl wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Hello Durai, Am Thu, Sep 21, 2023 at 10:36:27PM +0530 schrieb Durai Manickam KR: This patch series adds boot from NAND support, configs update and fixes. The changes has been done on top of u-boot version 2023.07. Well, interesting. I sent patches for NAND flash support on that very board some weeks ago which were already applied to the at91 custodian tree: https://source.denx.de/u-boot/custodians/u-boot-at91/-/tree/next?ref_type=heads Tom already merged that to the mainline next branch. I suggest you rebase on next. Hi Alexander, Well, it is present in custodians next branch. Only thing which is missed is the NAND defconfig support [PATCH 2/4]. Will send only this patch shortly. Hello Durai, Before you resend, check your config please, as in the CI loop it does not build as-is: +arm-linux-gnueabi-ld.bfd: drivers/clk/at91/sam9x60.o: in function `sam9x60_clk_probe': +drivers/clk/at91/sam9x60.c:595:(.text.sam9x60_clk_probe+0x500): undefined reference to `sam9x60_clk_register_usb' +make[1]: *** [Makefile:1765: u-boot] Error 1 +make: *** [Makefile:177: sub-make] Error 2 Eugen Add Eugen to Cc, since he still is officially listed as maintainer of the at91 stuff. Greets Alex Durai Manickam KR (4): configs: at91: sam9x60_curiosity: update sam9x60_curiosity_mmc_defconfig configs: at91: sam9x60_curiosity: Add sam9x60_curiosity_nandflash_defconfig ARM: dts: at91: sam9x60_curiosity: Enable NAND support ARM: dts: at91: sam9x60_curiosity: fix eeprom compatible arch/arm/dts/at91-sam9x60_curiosity.dts | 106 +- board/atmel/sam9x60_curiosity/MAINTAINERS | 1 + configs/sam9x60_curiosity_mmc_defconfig | 14 +++ configs/sam9x60_curiosity_nandflash_defconfig | 92 +++ 4 files changed, 212 insertions(+), 1 deletion(-) create mode 100644 configs/sam9x60_curiosity_nandflash_defconfig -- 2.25.1
[PULL] u-boot-at91-2024.01-b
Hello Tom, Please pull tag u-boot-at91-2024.01-b , the second set of at91 features for 2024.01 cycle. This feature set a new board named Conclusive KSTR sama5d27 with some small prerequisites patches. Thanks, Eugen The following changes since commit 9a3a58396b78b1f9d0c14580dc03f81d29207dd2: Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2023-10-20 12:54:33 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-at91.git tags/u-boot-at91-2024.01-b for you to fetch changes up to 27347893f02d4457b80357a38c194a726a43533a: board: Add support for Conclusive KSTR-SAMA5D27 (2023-10-23 17:07:06 +0300) Second set of u-boot-at91 features for the 2024.01 cycle Artur Rojek (4): common: add prototype & rename populate_serial_number() event: add new EVT_SETTINGS_R event arm: dts: at91: sama5: Add flexcom4 node board: Add support for Conclusive KSTR-SAMA5D27 arch/arm/dts/Makefile | 3 + arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi| 42 + arch/arm/dts/at91-kstr-sama5d27.dts| 127 + arch/arm/dts/sama5d2.dtsi | 20 +++ arch/arm/mach-at91/Kconfig | 12 ++ board/conclusive/kstr-sama5d27/Kconfig | 15 ++ board/conclusive/kstr-sama5d27/MAINTAINERS | 9 + board/conclusive/kstr-sama5d27/Makefile| 5 + board/conclusive/kstr-sama5d27/kstr-sama5d27.c | 239 + cmd/tlv_eeprom.c | 14 +- common/board_r.c | 1 + common/event.c | 1 + configs/kstr_sama5d27_defconfig| 73 include/configs/kstr-sama5d27.h| 15 ++ include/event.h| 9 + include/init.h | 14 ++ 16 files changed, 586 insertions(+), 13 deletions(-) create mode 100644 arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi create mode 100644 arch/arm/dts/at91-kstr-sama5d27.dts create mode 100644 board/conclusive/kstr-sama5d27/Kconfig create mode 100644 board/conclusive/kstr-sama5d27/MAINTAINERS create mode 100644 board/conclusive/kstr-sama5d27/Makefile create mode 100644 board/conclusive/kstr-sama5d27/kstr-sama5d27.c create mode 100644 configs/kstr_sama5d27_defconfig create mode 100644 include/configs/kstr-sama5d27.h
Re: [PATCH v5 0/4] Conclusive KSTR-SAMA5D27 support
On 10/18/23 17:00, Artur Rojek wrote: Hi all, this is v5 of the Conclusive KSTR-SAMA5D27 support series. Patches [1/4], [2/4] and [3/4] remain unchanged. In patch [4/4], a new dtsi file has been added in order to keep U-Boot specific properties separate from the main dts. As such, MAINTAINERS has been modified to feature the new file. An alias to the i2c node holding the EEPROM has also been explicitly added, so that it always enumerates at bus 2. Artur Rojek (4): common: add prototype & rename populate_serial_number() event: add new EVT_SETTINGS_R event arm: dts: at91: sama5: Add flexcom4 node board: Add support for Conclusive KSTR-SAMA5D27 arch/arm/dts/Makefile | 3 + arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi | 42 +++ arch/arm/dts/at91-kstr-sama5d27.dts | 127 ++ arch/arm/dts/sama5d2.dtsi | 20 ++ arch/arm/mach-at91/Kconfig| 12 + board/conclusive/kstr-sama5d27/Kconfig| 15 ++ board/conclusive/kstr-sama5d27/MAINTAINERS| 9 + board/conclusive/kstr-sama5d27/Makefile | 5 + .../conclusive/kstr-sama5d27/kstr-sama5d27.c | 239 ++ cmd/tlv_eeprom.c | 14 +- common/board_r.c | 1 + common/event.c| 1 + configs/kstr_sama5d27_defconfig | 73 ++ include/configs/kstr-sama5d27.h | 15 ++ include/event.h | 9 + include/init.h| 14 + 16 files changed, 586 insertions(+), 13 deletions(-) create mode 100644 arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi create mode 100644 arch/arm/dts/at91-kstr-sama5d27.dts create mode 100644 board/conclusive/kstr-sama5d27/Kconfig create mode 100644 board/conclusive/kstr-sama5d27/MAINTAINERS create mode 100644 board/conclusive/kstr-sama5d27/Makefile create mode 100644 board/conclusive/kstr-sama5d27/kstr-sama5d27.c create mode 100644 configs/kstr_sama5d27_defconfig create mode 100644 include/configs/kstr-sama5d27.h Applied series to u-boot-at91 / master, thanks !
Re: [PATCH v2] usb: xhci: Workaround to fix the USB halted endpoint issues
On 10/16/23 22:30, Tom Rini wrote: On Mon, Oct 16, 2023 at 08:34:16AM +0200, Michal Simek wrote: On 10/13/23 17:15, Tom Rini wrote: On Fri, Oct 13, 2023 at 11:11:04AM -0400, Da Xue wrote: On Fri, Oct 13, 2023 at 7:47 AM Marek Vasut wrote: On 10/13/23 06:53, Venkatesh Yadav Abbarapu wrote: The xhci host controller driver trying to queue the URB's and it is getting halted at the endpoint, thereby hitting the BUG_ON's. Mostly these kind of random issues are seen on faulty boards. Removing these BUG_ON's from the U-Boot xhci code, as in Linux kernel xhci code BUG_ON/BUG's are removed entirely. Please also note, that BUG_ON() is not recommended any more in the Linux kernel. Similar issue has been observed on TI AM437x board and they created a patch in Linux kernel as below https://patches.linaro.org/project/linux-usb/patch/1390250711-25840-1-git-send-email-ba...@ti.com/ Signed-off-by: Venkatesh Yadav Abbarapu I already explained to Xilinx how to sync the driver with Linux and why this is needed to move forward, multiple times, and even provided a script which does most of the work automatically, since it is basically automated process. Xilinx did not even bother to test the script and provide any feedback. Until that happens, this patch is rejected. This patch also causes all of the USB devices on certain platforms to not be detected: scanning bus usb@c900 for devices... Device not responding to set address. USB device not accepting new address (error=8000) Yes, we are stuck at the impasse where the custodian is asking for someone to try and do the re-sync, and everyone else will assist with testing on other platforms, but the re-sync hasn't happened. Can we please get someone from AMD to attempt the re-sync? I would like to say that we have someone to do it. But I simply don't have that person. That is the big problem we face, yes. Eugen, I think you said you were going to try and find time to do a re-sync, did you end up getting any? Hi Tom, Unfortunately at the moment I am working on a different project, so I do not see any perspective to do this in the near future, although I would like to do it and to help. It may be the case that a company investing into an engineer to work on this would be the only way. In any case, do you think Marek would accept doing this incrementally , e.g. now the driver is synced with 3.10, it would be easier to increment to 4.1 as a first step ? Eugen
Re: [PATCH v4 4/4] board: Add support for Conclusive KSTR-SAMA5D27
Hello Artur,
On 10/9/23 17:41, Artur Rojek wrote:
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.
Co-developed-by: Jakub Klama
Signed-off-by: Jakub Klama
Co-developed-by: Marcin Jabrzyk
Signed-off-by: Marcin Jabrzyk
Signed-off-by: Artur Rojek
---
v4: - utilize EVT_SETTINGS_R in order to read MAC and serial number from
EEPROM
v3: - use CONFIG_ID_EEPROM to read serial number
- as side-effect of using CONFIG_ID_EEPROM, KSTR-SAMA5D27 now also
correctly uses EEPROM embedded MAC addresses (overlooked in v1-v2)
- use CONFIG_DISPLAY_BOARDINFO_LATE for printing the board model and
serial number, and provide the required checkboard() call
- drop CONFIG_BOARD_LATE_INIT, as not needed anymore
- defconfig cleanup
v2: - remove redundant license text from at91-kstr-sama5d27.dts
- when defining properties in .dts, reference nodes by labels
- drop nodes for usb0 and pmic, as these aren't used by drivers
- switch i2c to flexcom driver and make the necessary dts changes
- sort includes in at91-kstr-sama5d27.dts alphabetically
arch/arm/dts/Makefile | 3 +
arch/arm/dts/at91-kstr-sama5d27.dts | 131 ++
arch/arm/mach-at91/Kconfig| 12 +
board/conclusive/kstr-sama5d27/Kconfig| 15 ++
board/conclusive/kstr-sama5d27/MAINTAINERS| 8 +
board/conclusive/kstr-sama5d27/Makefile | 5 +
.../conclusive/kstr-sama5d27/kstr-sama5d27.c | 239 ++
configs/kstr_sama5d27_defconfig | 73 ++
include/configs/kstr-sama5d27.h | 15 ++
9 files changed, 501 insertions(+)
create mode 100644 arch/arm/dts/at91-kstr-sama5d27.dts
create mode 100644 board/conclusive/kstr-sama5d27/Kconfig
create mode 100644 board/conclusive/kstr-sama5d27/MAINTAINERS
create mode 100644 board/conclusive/kstr-sama5d27/Makefile
create mode 100644 board/conclusive/kstr-sama5d27/kstr-sama5d27.c
create mode 100644 configs/kstr_sama5d27_defconfig
create mode 100644 include/configs/kstr-sama5d27.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index bde2176ec7f6..c0f3525ed4d3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1198,6 +1198,9 @@ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
at91-sama5d27_wlsom1_ek.dtb
+dtb-$(CONFIG_TARGET_KSTR_SAMA5D27) += \
+ at91-kstr-sama5d27.dtb
+
dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \
at91-sama5d2_icp.dtb
diff --git a/arch/arm/dts/at91-kstr-sama5d27.dts b/arch/arm/dts/at91-kstr-sama5d27.dts
new file mode 100644
index ..fe9ec7e5bbc3
--- /dev/null
+++ b/arch/arm/dts/at91-kstr-sama5d27.dts
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * at91-kstr-sama5d27.dts - Device Tree file for Conclusive KSTR-SAMA5D27 board
+ *
+ * Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
+ *
+ */
+/dts-v1/;
+
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+#include
+#include
+#include
+
+/ {
+ model = "Conclusive KSTR-SAMA5D27";
+ compatible = "conclusive,kstr-sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ chosen {
+ bootph-all;
+ stdout-path =
+ };
+};
+
+_xtal {
+ clock-frequency = <1200>;
+};
+
+ {
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_sdmmc0_cmd_dat_default
_sdmmc0_ck_cd_default>;
+ status = "okay";
+ bootph-all;
Can you create a separate file named at91-kstr-sama5d27-u-boot.dtsi (
which is automatically included by the Makefile) which would contain the
bootph properties
(Have a look at arch/arm/dts/at91-sama5d29_curiosity-u-boot.dtsi for
example )
In theory we would like the board dts file to be identical with Linux (
as much as possible if not identical ), and have specific U-boot props
in such a separate file.
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_uart1_default>;
+ status = "okay";
+ bootph-all;
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_macb0_rmii _macb0_phy_irq>;
+ phy-mode = "rmii";
+ status = "okay";
+
+ ethernet-phy@0 {
+ reg = <0x0>;
+ reset-gpios = < 44 GPIO_ACTIVE_LOW>;
+ };
+};
+
+ {
+ atmel,flexcom-mode = ;
+ status = "okay";
+};
+
+ {
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_flx4_i2c>;
+ status = "okay";
Which bus number (in Uboot) is this i2c6 being assigned to ?
Would it be better , and/or more predictable to add an alias to the
desired bus number in DT ?
e.g. aliases { i2c2 = }
Thanks,
Eugen
+
+ eeprom: eeprom@50 {
+ compatible = "microchip,24c32", "atmel,24c32";
+ reg = <0x50>;
+ read-only;
+ pagesize = <32>;
+ status = "okay";
+ };
[PULL] u-boot-at91-fixes-2023.10-b
Hello Tom, Please pull tag u-boot-at91-fixes-2023.10-b , the second set of fixes for 2023.10 cycle. This comes late, but I hope you can merge it before the release, it's only two small fixes , one for an array not initialized and the second one fixes an error case when a DT property is missing for the atmel NAND driver. Thanks, Eugen The following changes since commit 15155ab0a3d1f839509bcac620bfb38f950bead6: Merge tag 'u-boot-imx-20230923' of https://source.denx.de/u-boot/custodians/u-boot-imx (2023-09-24 17:15:31 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-at91.git tags/u-boot-at91-fixes-2023.10-b for you to fetch changes up to 7b4ffe8c32db284e25d3a2636904def8e093da9e: clk: at91: Fix initializing arrays (2023-09-29 16:45:40 +0300) Second set of u-boot-atmel fixes for the 2023.10 cycle Alexander Dahl (1): mtd: nand: raw: atmel: Add error handling when rb-gpios missing Francois Berder (1): clk: at91: Fix initializing arrays drivers/clk/at91/sam9x60.c | 4 ++-- drivers/clk/at91/sama7g5.c | 4 ++-- drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++ 3 files changed, 11 insertions(+), 8 deletions(-)
Re: [PATCH] clk: at91: Fix initializing arrays
On 9/24/23 12:58, Francois Berder wrote: Arrays are not cleared entirely because ARRAY_SIZE returns the number of elements in an array, not the size in bytes. This commit fixes the calls to memset by providing the array size in bytes instead of the number of elements in the array. Signed-off-by: Francois Berder --- Applied to u-boot-at91/ master, thanks !
Re: [PATCH v2 1/1] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
On 9/23/23 19:50, Michael Nazzareno Trimarchi wrote:
On Fri, Sep 22, 2023 at 11:40 AM Eugen Hristev
wrote:
On 9/22/23 12:08, Alexander Dahl wrote:
Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is possible, the driver does
not override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl
---
Reviewed-by: Eugen Hristev
Notes:
v1 -> v2:
- Only issue error message if error is not ENOENT. If the node just is
missing, move on without error message.
drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
Acked-by: Michael Trimarchi
Applied to u-boot-at91/master, thanks !
Re: [PATCH 2/2] board: Add support for Conclusive KSTR-SAMA5D27
On 9/25/23 22:31, Artur Rojek wrote:
Hey Eugen,
thanks for the review.
Hello,
Thank you for your patch,
On 9/21/23 18:37, Artur Rojek wrote:
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.
Co-developed-by: Jakub Klama
Signed-off-by: Jakub Klama
Co-developed-by: Marcin Jabrzyk
Signed-off-by: Marcin Jabrzyk
Signed-off-by: Artur Rojek
---
arch/arm/dts/Makefile | 3 +
arch/arm/dts/at91-kstr-sama5d27.dts | 310 ++
arch/arm/mach-at91/Kconfig| 13 +
board/conclusive/kstr-sama5d27/Kconfig| 15 +
board/conclusive/kstr-sama5d27/MAINTAINERS| 8 +
board/conclusive/kstr-sama5d27/Makefile | 5 +
.../conclusive/kstr-sama5d27/kstr-sama5d27.c | 235 +
configs/kstr_sama5d27_defconfig | 79 +
include/configs/kstr-sama5d27.h | 15 +
9 files changed, 683 insertions(+)
create mode 100644 arch/arm/dts/at91-kstr-sama5d27.dts
create mode 100644 board/conclusive/kstr-sama5d27/Kconfig
create mode 100644 board/conclusive/kstr-sama5d27/MAINTAINERS
create mode 100644 board/conclusive/kstr-sama5d27/Makefile
create mode 100644 board/conclusive/kstr-sama5d27/kstr-sama5d27.c
create mode 100644 configs/kstr_sama5d27_defconfig
create mode 100644 include/configs/kstr-sama5d27.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85fd5b1157b1..8e4d33c01912 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1198,6 +1198,9 @@ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
at91-sama5d27_wlsom1_ek.dtb
+dtb-$(CONFIG_TARGET_KSTR_SAMA5D27) += \
+ at91-kstr-sama5d27.dtb
+
dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \
at91-sama5d2_icp.dtb
diff --git a/arch/arm/dts/at91-kstr-sama5d27.dts b/arch/arm/dts/at91-kstr-sama5d27.dts
new file mode 100644
index ..6de918a3c964
--- /dev/null
+++ b/arch/arm/dts/at91-kstr-sama5d27.dts
@@ -0,0 +1,310 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * at91-kstr-sama5d27.dts - Device Tree file for Conclusive KSTR-SAMA5D27 board
+ *
+ * Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
SPDX tag is enough, no need to replicate the license text below
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+#include
+#include
+
+/ {
+ model = "Conclusive KSTR-SAMA5D27";
+ compatible = "conclusive,kstr-sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ chosen {
+ bootph-all;
+ stdout-path =
+ };
+
+ clocks {
+ main_xtal: main_xtal {
+ clock-frequency = <1200>;
+ };
+ };
+
+ ahb {
+ usb0: gadget@0030 {
I feel this line is not properly aligned
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible =
Re: Enable thumb on AT91?
On 9/27/23 01:15, Sean Anderson wrote: Hi Eugen, I noticed that several AT91 boards are quite close to their SPL size limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't even git with older GCCs. I looked at the datasheet for that processor, and noticed that it has thumb support. Have you considered enabling SYS_THUMB_BUILD? This shrinks SPL by around 30%. I don't have a board to test with, so I don't know if there are any technical reasons blocking this. --Sean Hello Sean, Thumb should be fine for the AT91 architecture. + Nicolas and Aubin in CC. The change would require testing. Eugen
Re: [PATCH v2 00/10] rockchip: rk3588: add support for DFU in SPL
On 9/22/23 03:48, Kever Yang wrote: On 2023/9/21 22:47, Eugen Hristev wrote: On 8/1/23 10:28, Eugen Hristev wrote: This series adds support for DFU in SPL for rockchip rk3588 on rock5b board. Namely, when SPL is loaded via rockusb (thus via USB), having the `same-as-spl` boot order item, after having detected that it was loaded from USB, it will lookup the gadget USB node in DT and boot via DFU. Some changes were required namely: - DFU needs environment, hence adding environment variables into DFU - added bootph-all to nodes such that they are available in SPL - insert gadget into boot order I had to port one patch for DWC3 from Linux, and include in this series the patches that are floating from Venkatesh that fixup the DWC3 (https://marc.info/?l=u-boot=168351919807081=2 ) I know that Marek NAKed them and I am fine with it, I am not trying to sneak in any patches, they are not to be merged, also this patch `usb: dwc3: Increase DWC3 controller halt timeout` is in the same bucket so Marek you can NAK this one as well, no problem, I am just sending out all the series so maybe the rockchip part for the gadget can be picked up and if people want to use the DFU SPL gadget can also manually pick the DWC3 patches. The branch with all the patches is available here : https://gitlab.collabora.com/hardware-enablement/rockchip-3588/u-boot Thanks! Changes in v2: - rebased on latest upstream which caused a change in the config patch. Eugen Hristev (7): rockchip: allow env defines for SPL build usb: dwc3: Increase DWC3 controller halt timeout ARM: dts: rockchip: rk3588-rock-5b-u-boot: add bootph-all to gadget nodes ARM: mach-rockchip: spl-boot-order: add possibility to DFU ARM: mach-rockchip: rk3588: add gadget device to the boot order rockchip: rk3588: prepare env for DFU configs: rockchip: rock5b-rk3588: enable DFU and related configs Venkatesh Yadav Abbarapu (3): usb: dwc3: core: improve reset sequence usb: dwc3: gadget: Don't send unintended link state change usb: dwc3: core: Only handle soft-reset in DCTL arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 6 + arch/arm/mach-rockchip/rk3588/rk3588.c | 1 + arch/arm/mach-rockchip/spl-boot-order.c | 3 +++ configs/rock5b-rk3588_defconfig | 18 +++--- drivers/usb/dwc3/core.c | 32 +++-- drivers/usb/dwc3/gadget.c | 20 +++- drivers/usb/dwc3/gadget.h | 14 +++ include/configs/rk3588_common.h | 9 ++- include/configs/rockchip-common.h | 4 9 files changed, 76 insertions(+), 31 deletions(-) Hello Kever, I see in patchwork this series is marked as 'Changes requested'. Do you wish to tell me which are the changes you requested, as I did not see anything in your replies. I am interested to see the patches related to rockchip (not the DWC3), if it's fine for you to merge them. Hi Eugen, For rockchip platform part is fine to me, but as a patchset, the dwc3 part is NAKed by Marek, so patch set not able to merge. If rockchip part can work without dwc3 change, you can send a separate patch set for it, so that I can merge it. Hi Kever, The rockchip part works except the fact that sometimes the dwc3 gadget does not power up correctly (hence the three patches that fix the problem). If you are fine to take the rockchip part I can resend it as a separate series. It would be useful for people to have the gadget devicetree and configs in upstream, and only the DWC3 part missing. Otherwise, this series will float until someone brings DWC3 up to date in U-boot as Marek requested. Let me know what do you think. Thanks, Eugen Thanks, - Kever Thanks, Eugen
Re: [PATCH v2 1/1] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
On 9/22/23 12:08, Alexander Dahl wrote:
Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is possible, the driver does
not override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl
---
Reviewed-by: Eugen Hristev
Notes:
v1 -> v2:
- Only issue error message if error is not ENOENT. If the node just is
missing, move on without error message.
drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
Re: [PATCH 2/2] board: Add support for Conclusive KSTR-SAMA5D27
Hello,
Thank you for your patch,
On 9/21/23 18:37, Artur Rojek wrote:
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.
Co-developed-by: Jakub Klama
Signed-off-by: Jakub Klama
Co-developed-by: Marcin Jabrzyk
Signed-off-by: Marcin Jabrzyk
Signed-off-by: Artur Rojek
---
arch/arm/dts/Makefile | 3 +
arch/arm/dts/at91-kstr-sama5d27.dts | 310 ++
arch/arm/mach-at91/Kconfig| 13 +
board/conclusive/kstr-sama5d27/Kconfig| 15 +
board/conclusive/kstr-sama5d27/MAINTAINERS| 8 +
board/conclusive/kstr-sama5d27/Makefile | 5 +
.../conclusive/kstr-sama5d27/kstr-sama5d27.c | 235 +
configs/kstr_sama5d27_defconfig | 79 +
include/configs/kstr-sama5d27.h | 15 +
9 files changed, 683 insertions(+)
create mode 100644 arch/arm/dts/at91-kstr-sama5d27.dts
create mode 100644 board/conclusive/kstr-sama5d27/Kconfig
create mode 100644 board/conclusive/kstr-sama5d27/MAINTAINERS
create mode 100644 board/conclusive/kstr-sama5d27/Makefile
create mode 100644 board/conclusive/kstr-sama5d27/kstr-sama5d27.c
create mode 100644 configs/kstr_sama5d27_defconfig
create mode 100644 include/configs/kstr-sama5d27.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85fd5b1157b1..8e4d33c01912 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1198,6 +1198,9 @@ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
at91-sama5d27_wlsom1_ek.dtb
+dtb-$(CONFIG_TARGET_KSTR_SAMA5D27) += \
+ at91-kstr-sama5d27.dtb
+
dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \
at91-sama5d2_icp.dtb
diff --git a/arch/arm/dts/at91-kstr-sama5d27.dts b/arch/arm/dts/at91-kstr-sama5d27.dts
new file mode 100644
index ..6de918a3c964
--- /dev/null
+++ b/arch/arm/dts/at91-kstr-sama5d27.dts
@@ -0,0 +1,310 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * at91-kstr-sama5d27.dts - Device Tree file for Conclusive KSTR-SAMA5D27 board
+ *
+ * Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
SPDX tag is enough, no need to replicate the license text below
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+#include
+#include
+
+/ {
+ model = "Conclusive KSTR-SAMA5D27";
+ compatible = "conclusive,kstr-sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ chosen {
+ bootph-all;
+ stdout-path =
+ };
+
+ clocks {
+ main_xtal: main_xtal {
+ clock-frequency = <1200>;
+ };
+ };
+
+ ahb {
+ usb0: gadget@0030 {
I feel this line is not properly aligned
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "atmel,sama5d3-udc";
+ reg = <0x0030 0x10
+
Re: [PATCH v2 RESEND] mmc: dw_mmc: reset controller after data error
On 6/19/23 13:33, Eugen Hristev wrote:
From: Ziyuan Xu
Per dw_mmc databook, it's recommended to reset the host controller if
some data-related error occurred.
Implement a reset mechanism.
Signed-off-by: Ziyuan Xu
Co-developed-by: Jason Zhu
Signed-off-by: Jason Zhu
[eugen.hris...@collabora.com: modified a bit the variables initialization]
Signed-off-by: Eugen Hristev
---
Hi,
Gentle ping.
This patch require any more changes?
Thanks,
Eugen
drivers/mmc/dw_mmc.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 5085a3b491da..d6cad998b0cd 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -138,7 +138,7 @@ static int dwmci_data_transfer(struct dwmci_host *host,
struct mmc_data *data)
{
struct mmc *mmc = host->mmc;
int ret = 0;
- u32 timeout, mask, size, i, len = 0;
+ u32 timeout, reset_timeout = 100, status, ctrl, mask, size, i, len = 0;
u32 *buf = NULL;
ulong start = get_timer(0);
u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >>
@@ -159,6 +159,24 @@ static int dwmci_data_transfer(struct dwmci_host *host,
struct mmc_data *data)
/* Error during data transfer. */
if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
debug("%s: DATA ERROR!\n", __func__);
+
+ dwmci_wait_reset(host, DWMCI_RESET_ALL);
+ dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
+DWMCI_CMD_UPD_CLK | DWMCI_CMD_START);
+
+ do {
+ status = dwmci_readl(host, DWMCI_CMD);
+ if (!reset_timeout--)
+ break;
+ udelay(100);
+ } while (status & DWMCI_CMD_START);
+
+ if (!host->fifo_mode) {
+ ctrl = dwmci_readl(host, DWMCI_BMOD);
+ ctrl |= DWMCI_BMOD_IDMAC_RESET;
+ dwmci_writel(host, DWMCI_BMOD, ctrl);
+ }
+
ret = -EINVAL;
break;
}
Re: [PATCH] clk: fix count parameter type for clk_release_all
On 6/19/23 13:47, Eugen Hristev wrote:
The second parameter for clk_release_all is used as an unsigned
(which makes sense) but the function prototype declares it as an int.
This causes warnings/error like such below:
include/clk.h:422:48: error: conversion to ‘int’ from ‘unsigned int’ may change
the sign of the result [-Werror=sign-conversion]
422 | return clk_release_all(bulk->clks, bulk->count);
To fix this, changed the type of the count to `unsigned int`
Fixes: 82a8a669b4f7 ("clk: add clk_release_all()")
Signed-off-by: Eugen Hristev
---
drivers/clk/clk-uclass.c | 7 ---
include/clk.h| 4 ++--
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index dc3e9d6a2615..eada3a3a5b62 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -416,12 +416,13 @@ int clk_get_by_name_nodev(ofnode node, const char *name,
struct clk *clk)
return clk_get_by_index_nodev(node, index, clk);
}
-int clk_release_all(struct clk *clk, int count)
+int clk_release_all(struct clk *clk, unsigned int count)
{
- int i, ret;
+ unsigned int i;
+ int ret;
for (i = 0; i < count; i++) {
- debug("%s(clk[%d]=%p)\n", __func__, i, [i]);
+ debug("%s(clk[%u]=%p)\n", __func__, i, [i]);
/* check if clock has been previously requested */
if (!clk[i].dev)
diff --git a/include/clk.h b/include/clk.h
index d91285235f79..a342297007b6 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -243,7 +243,7 @@ static inline struct clk *devm_clk_get_optional(struct
udevice *dev,
*
* Return: zero on success, or -ve error code.
*/
-int clk_release_all(struct clk *clk, int count);
+int clk_release_all(struct clk *clk, unsigned int count);
/**
* devm_clk_put - "free" a managed clock source
@@ -307,7 +307,7 @@ clk_get_by_name_nodev(ofnode node, const char *name, struct
clk *clk)
return -ENOSYS;
}
-static inline int clk_release_all(struct clk *clk, int count)
+static inline int clk_release_all(struct clk *clk, unsigned int count)
{
return -ENOSYS;
}
Hi,
gentle ping.
Thanks,
Eugen
Re: [PATCH v2 00/10] rockchip: rk3588: add support for DFU in SPL
On 8/1/23 10:28, Eugen Hristev wrote: This series adds support for DFU in SPL for rockchip rk3588 on rock5b board. Namely, when SPL is loaded via rockusb (thus via USB), having the `same-as-spl` boot order item, after having detected that it was loaded from USB, it will lookup the gadget USB node in DT and boot via DFU. Some changes were required namely: - DFU needs environment, hence adding environment variables into DFU - added bootph-all to nodes such that they are available in SPL - insert gadget into boot order I had to port one patch for DWC3 from Linux, and include in this series the patches that are floating from Venkatesh that fixup the DWC3 (https://marc.info/?l=u-boot=168351919807081=2 ) I know that Marek NAKed them and I am fine with it, I am not trying to sneak in any patches, they are not to be merged, also this patch `usb: dwc3: Increase DWC3 controller halt timeout` is in the same bucket so Marek you can NAK this one as well, no problem, I am just sending out all the series so maybe the rockchip part for the gadget can be picked up and if people want to use the DFU SPL gadget can also manually pick the DWC3 patches. The branch with all the patches is available here : https://gitlab.collabora.com/hardware-enablement/rockchip-3588/u-boot Thanks! Changes in v2: - rebased on latest upstream which caused a change in the config patch. Eugen Hristev (7): rockchip: allow env defines for SPL build usb: dwc3: Increase DWC3 controller halt timeout ARM: dts: rockchip: rk3588-rock-5b-u-boot: add bootph-all to gadget nodes ARM: mach-rockchip: spl-boot-order: add possibility to DFU ARM: mach-rockchip: rk3588: add gadget device to the boot order rockchip: rk3588: prepare env for DFU configs: rockchip: rock5b-rk3588: enable DFU and related configs Venkatesh Yadav Abbarapu (3): usb: dwc3: core: improve reset sequence usb: dwc3: gadget: Don't send unintended link state change usb: dwc3: core: Only handle soft-reset in DCTL arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 6 + arch/arm/mach-rockchip/rk3588/rk3588.c | 1 + arch/arm/mach-rockchip/spl-boot-order.c | 3 +++ configs/rock5b-rk3588_defconfig | 18 +++--- drivers/usb/dwc3/core.c | 32 +++-- drivers/usb/dwc3/gadget.c | 20 +++- drivers/usb/dwc3/gadget.h | 14 +++ include/configs/rk3588_common.h | 9 ++- include/configs/rockchip-common.h | 4 9 files changed, 76 insertions(+), 31 deletions(-) Hello Kever, I see in patchwork this series is marked as 'Changes requested'. Do you wish to tell me which are the changes you requested, as I did not see anything in your replies. I am interested to see the patches related to rockchip (not the DWC3), if it's fine for you to merge them. Thanks, Eugen
[PULL next] u-boot-at91-2023.10-a
Hello Tom, Please pull tag u-boot-at91-2023.10-a , the first set of at91 features for the next cycle 2023.10 . This feature set includes a new board sama5d29 Curiosity, and various fixes and alignments for sam9x60 and sam9x60 curiosity board. Thanks, Eugen The following changes since commit 7755b2200777f72dca87dd169138e95f011bbcb9: Merge tag 'x86-pull-20230801' of https://source.denx.de/u-boot/custodians/u-boot-x86 (2023-08-01 11:57:55 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-at91.git tags/u-boot-at91-2023.10-a for you to fetch changes up to 6e8c9d29e3a72f93e4d5125079eaaa1b5a52a951: ARM: dts: at91: sam9x60-curiosity: Sync gpio button from Linux (2023-08-29 17:39:01 +0300) First set of u-boot-at91 features for the 2023.10 cycle Alexander Dahl (11): ARM: dts: at91: sam9x60: Better align with upstream dtsi ARM: dts: at91: sam9x60-curiosity: Fix EEPROM type ARM: dts: at91: sam9x60: Change i2c compatible ARM: dts: at91: sam9x60-curiosity: Improve alignment with upstream ARM: dts: at91: sam9x60-curiosity: Add raw NAND flash mtd: nand: raw: atmel: Remove duplicate line configs: at91: sam9x60_curiosity: Sync both defconfig variants configs: at91: sam9x60: Switch to new reset driver ARM: dts: at91: sam9x60-curiosity: Sync LED nodes from Linux board: sam9x60-curiosity: Let LED subsystem init leds if enabled ARM: dts: at91: sam9x60-curiosity: Sync gpio button from Linux Mihai Sain (1): board: at91: sama5d29_curiosity: add initial support for sama5d29_curiosity arch/arm/dts/Makefile | 3 + arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi| 26 ++- arch/arm/dts/at91-sam9x60_curiosity.dts| 249 + arch/arm/dts/at91-sama5d29_curiosity-u-boot.dtsi | 55 + arch/arm/dts/at91-sama5d29_curiosity.dts | 219 ++ arch/arm/dts/sam9x60.dtsi | 66 +++--- arch/arm/dts/sam9x60ek.dts | 2 +- arch/arm/mach-at91/Kconfig | 12 + board/atmel/sam9x60_curiosity/sam9x60_curiosity.c | 18 ++ board/atmel/sama5d29_curiosity/Kconfig | 15 ++ board/atmel/sama5d29_curiosity/MAINTAINERS | 9 + board/atmel/sama5d29_curiosity/Makefile| 7 + .../atmel/sama5d29_curiosity/sama5d29_curiosity.c | 86 +++ configs/sam9x60_curiosity_mmc1_defconfig | 2 + configs/sam9x60_curiosity_mmc_defconfig| 17 +- configs/sam9x60ek_mmc_defconfig| 2 + configs/sam9x60ek_nandflash_defconfig | 2 + configs/sam9x60ek_qspiflash_defconfig | 2 + configs/sama5d29_curiosity_mmc1_defconfig | 120 ++ configs/sama5d29_curiosity_mmc_defconfig | 119 ++ configs/sama5d29_curiosity_qspiflash_defconfig | 119 ++ drivers/mtd/nand/raw/atmel/nand-controller.c | 1 - include/configs/sama5d29_curiosity.h | 17 ++ 23 files changed, 1079 insertions(+), 89 deletions(-) create mode 100644 arch/arm/dts/at91-sama5d29_curiosity-u-boot.dtsi create mode 100644 arch/arm/dts/at91-sama5d29_curiosity.dts create mode 100644 board/atmel/sama5d29_curiosity/Kconfig create mode 100644 board/atmel/sama5d29_curiosity/MAINTAINERS create mode 100644 board/atmel/sama5d29_curiosity/Makefile create mode 100644 board/atmel/sama5d29_curiosity/sama5d29_curiosity.c create mode 100644 configs/sama5d29_curiosity_mmc1_defconfig create mode 100644 configs/sama5d29_curiosity_mmc_defconfig create mode 100644 configs/sama5d29_curiosity_qspiflash_defconfig create mode 100644 include/configs/sama5d29_curiosity.h
Re: [PATCH v2 0/5] at91: sam9x60-curiosity: Misc improvements
On 8/23/23 16:58, Alexander Dahl wrote: Hei hei, while working with the sam9x60-curiosity board I noticed some things still have rough edges on U-Boot shell for that device. With these patches (and some more config options enabled), the following commands now work as expected: reset, led, button. The whole series is based on atmel/next. Note: some things here might be useful to implement for other Microchip boards. However I currently only have this one board, and I'm not sure if this is a direction appreciated by Microchip? So you might see all this as suggestion. It is appreciated by me, so thank you ! Applied to u-boot-at91/next See notes on patches for specific changes from v1 to v2 and below for summary of the changes. Greets Alex v1 -> v2: - reworded some commit messages - reenabled CONFIG_SYSRESET and CONFIG_SYSRESET_AT91 - split up LED patch in two new patches Alexander Dahl (5): configs: at91: sam9x60_curiosity: Sync both defconfig variants configs: at91: sam9x60: Switch to new reset driver ARM: dts: at91: sam9x60-curiosity: Sync LED nodes from Linux board: sam9x60-curiosity: Let LED subsystem init leds if enabled ARM: dts: at91: sam9x60-curiosity: Sync gpio button from Linux .../dts/at91-sam9x60_curiosity-u-boot.dtsi| 18 +++ arch/arm/dts/at91-sam9x60_curiosity.dts | 50 +++ .../sam9x60_curiosity/sam9x60_curiosity.c | 18 +++ configs/sam9x60_curiosity_mmc1_defconfig | 2 + configs/sam9x60_curiosity_mmc_defconfig | 17 ++- configs/sam9x60ek_mmc_defconfig | 2 + configs/sam9x60ek_nandflash_defconfig | 2 + configs/sam9x60ek_qspiflash_defconfig | 2 + 8 files changed, 110 insertions(+), 1 deletion(-) base-commit: 0498ff933813932ff057cdc314ab46df4a596d06
Re: [PATCH RESEND v3] fpga: add inline stub for fpga_load
On 8/28/23 13:53, Michal Simek wrote:
Hi Eugen, + Chanho,
On 8/8/23 12:22, Eugen Hristev wrote:
In case CC_OPTIMIZE_FOR_DEBUG is set, unused code will not be
optimized out,
hence the reference to fpga_load will be compiled.
if DM_FPGA and SPL_FPGA are not set, the build will fail with :
this is not correct. It is not DM_FPGA but only FPGA.
aarch64-none-linux-gnu-ld.bfd: common/spl/spl_fit.o: in function
`spl_fit_upload_fpga':
u-boot/common/spl/spl_fit.c:595: undefined reference to `fpga_load'
To solve this, added an inline empty stub in the header if
CC_OPTIMIZE_FOR_DEBUG is set such that the build will succeed.
Signed-off-by: Eugen Hristev
---
Changes in v3:
- return -ENOSYS
Changes in v2:
- this is a rework as suggested by Simon of this previous patch :
https://patchwork.ozlabs.org/project/uboot/patch/20230619102839.277902-1-eugen.hris...@collabora.com/
include/fpga.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/fpga.h b/include/fpga.h
index ed688cc0fa3b..33d0dbbe2ba4 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -60,8 +60,17 @@ int fpga_add(fpga_type devtype, void *desc);
int fpga_count(void);
const fpga_desc *const fpga_get_desc(int devnum);
int fpga_is_partial_data(int devnum, size_t img_len);
+#if defined(CONFIG_CC_OPTIMIZE_FOR_DEBUG)
And when you enable CONFIG_CC_OPTIMIZE_FOR_DEBUG and FPGA you get
compilation warnings.
drivers/fpga/fpga.c:265:5: error: redefinition of 'fpga_load'
265 | int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype,
| ^
In file included from include/xilinx.h:7,
from drivers/fpga/fpga.c:11:
include/fpga.h:64:19: note: previous definition of 'fpga_load' with type
'int(int, const void *, size_t, bitstream_type, int)' {aka 'int(int,
const void *, long unsigned int, bitstream_type, int)'}
64 | static inline int fpga_load(int devnum, const void *buf, size_t
bsize,
| ^
make[2]: *** [scripts/Makefile.build:257: drivers/fpga/fpga.o] Error 1
I means please tune that condition properly not to create additional
compilation warnings for other combinations.
Thanks,
Michal
Hello Michal,
Thanks for reviewing .
Chanho, I cannot try this at the moment, if you are in a hurry you can
send a v4 or v2 to your patch addressing this (or maybe your patch does
not have this problem)
Thanks,
Eugen
+static inline int fpga_load(int devnum, const void *buf, size_t bsize,
+ bitstream_type bstype, int flags)
+{
+ return -ENOSYS;
+}
+#else
int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype, int flags);
+#endif
+
int fpga_fsload(int devnum, const void *buf, size_t size,
fpga_fs_info *fpga_fsinfo);
int fpga_loads(int devnum, const void *buf, size_t size,
Re: [PATCH] fpga: define dummy fpga_load function for debug build
On 8/28/23 03:21, Chanho Park wrote:
Hi,
-Original Message-
From: Michal Simek
Sent: Friday, August 25, 2023 4:23 PM
To: Chanho Park ; u-boot@lists.denx.de
Subject: Re: [PATCH] fpga: define dummy fpga_load function for debug build
Hi,
On 8/16/23 08:54, Chanho Park wrote:
This fixes below build error when CC_OPTIMIZE_FOR_DEBUG is enabled and
CONFIG_SPL_FPGA is not enabled.
../common/spl/spl_fit.c:591: undefined reference to `fpga_load'
collect2: error: ld returned 1 exit status
Signed-off-by: Chanho Park
---
include/fpga.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/fpga.h b/include/fpga.h index
ed688cc0fa3b..44f2755a3f10 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -60,8 +60,16 @@ int fpga_add(fpga_type devtype, void *desc);
int fpga_count(void);
const fpga_desc *const fpga_get_desc(int devnum);
int fpga_is_partial_data(int devnum, size_t img_len);
+#if CONFIG_IS_ENABLED(FPGA)
int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype, int flags);
+#else
+static inline int fpga_load(int devnum, const void *buf, size_t bsize,
+ bitstream_type bstype, int flags) {
+ return FPGA_FAIL;
+}
+#endif
int fpga_fsload(int devnum, const void *buf, size_t size,
fpga_fs_info *fpga_fsinfo);
int fpga_loads(int devnum, const void *buf, size_t size,
There is another patch targeting the same code.
Please take a look at
https://lore.kernel.org/r/20230808102227.34233-1-
eugen.hris...@collabora.com
I wasn't aware that there was an attempt to fix the issue. If I knew it, I
would reply the patch...
and work together to come up with the patch which covers both cases.
Yes. I also tried to make the patch with CONFIG_CC_OPTIMIZE_FOR_DEBUG guard but
I couldn't find any codes that uses the guard.
And I was also worried about the CC_OPTIMIZE_FOR_DEBUG's behavior. It could be
related with the optimization level of the compiler.
That's why I put the guard with #if CONFIG_IS_ENABLED(FPGA).
Best Regards,
Chanho Park
Hi Chanho,
Simon suggested to use CONFIG_CC_OPTIMIZE_FOR_DEBUG in this case here:
https://patchwork.ozlabs.org/project/uboot/patch/20230619102839.277902-1-eugen.hris...@collabora.com/
As I told Michal, basically your patch and my patch do the same thing.
I suggested him to pick the one that he thinks it's best. (or even
suggest another way)
Eugen
Re: [PATCH RESEND v3] fpga: add inline stub for fpga_load
On 8/25/23 10:21, Michal Simek wrote:
Hi,
On 8/8/23 12:22, Eugen Hristev wrote:
In case CC_OPTIMIZE_FOR_DEBUG is set, unused code will not be
optimized out,
hence the reference to fpga_load will be compiled.
if DM_FPGA and SPL_FPGA are not set, the build will fail with :
aarch64-none-linux-gnu-ld.bfd: common/spl/spl_fit.o: in function
`spl_fit_upload_fpga':
u-boot/common/spl/spl_fit.c:595: undefined reference to `fpga_load'
To solve this, added an inline empty stub in the header if
CC_OPTIMIZE_FOR_DEBUG is set such that the build will succeed.
Signed-off-by: Eugen Hristev
---
Changes in v3:
- return -ENOSYS
Changes in v2:
- this is a rework as suggested by Simon of this previous patch :
https://patchwork.ozlabs.org/project/uboot/patch/20230619102839.277902-1-eugen.hris...@collabora.com/
include/fpga.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/fpga.h b/include/fpga.h
index ed688cc0fa3b..33d0dbbe2ba4 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -60,8 +60,17 @@ int fpga_add(fpga_type devtype, void *desc);
int fpga_count(void);
const fpga_desc *const fpga_get_desc(int devnum);
int fpga_is_partial_data(int devnum, size_t img_len);
+#if defined(CONFIG_CC_OPTIMIZE_FOR_DEBUG)
+static inline int fpga_load(int devnum, const void *buf, size_t bsize,
+ bitstream_type bstype, int flags)
+{
+ return -ENOSYS;
+}
+#else
int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype, int flags);
+#endif
+
int fpga_fsload(int devnum, const void *buf, size_t size,
fpga_fs_info *fpga_fsinfo);
int fpga_loads(int devnum, const void *buf, size_t size,
Actually there is another patch targeting the same code.
Please take a look at
https://lore.kernel.org/r/20230816065437.836392-1-chanho61.p...@samsung.com
and get Chanho on board and create a patch to cover both cases.
Thanks,
Michal
Hello Michal,
Looking at Chanho's patch, it appears that he is solving the same issue.
These are not two separate cases.
He fixed it the other way around : if CONFIG_FPGA define the right
prototype, else define the stub, while I did if CONFIG_DEBUG define
stub, else define the right prototype.
I think you should select the patch that you deem more appropriate to
fix this, I don't mind which one.
Thanks,
Eugen
Re: [PATCH 1/2] mtd: nand: raw: atmel: Remove duplicate line
On 8/8/23 16:48, Michael Nazzareno Trimarchi wrote: Hi On Tue, Aug 8, 2023 at 3:03 PM Alexander Dahl wrote: Signed-off-by: Alexander Dahl Reviewed-by: Michael Trimarchi Applied this one patch to u-boot-at91/next , thanks !
Re: [PATCH 2/2] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
On 8/23/23 09:54, Michael Nazzareno Trimarchi wrote:
Hi
On Wed, Aug 23, 2023 at 8:28 AM Eugen Hristev
wrote:
Hi,
On 8/8/23 18:03, Alexander Dahl wrote:
Hello Michael,
Am Tue, Aug 08, 2023 at 03:49:45PM +0200 schrieb Michael Nazzareno Trimarchi:
Hi
On Tue, Aug 8, 2023 at 3:03 PM Alexander Dahl wrote:
Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is fine, the driver does not
override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 2b29c8def6..8e745a5111 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1600,10 +1600,13 @@ static struct atmel_nand *atmel_nand_create(struct
atmel_nand_controller *nc,
nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB;
nand->cs[i].rb.id = val;
} else {
- gpio_request_by_name_nodev(np, "rb-gpios", 0,
- >cs[i].rb.gpio,
- GPIOD_IS_IN);
- nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
+ ret = gpio_request_by_name_nodev(np, "rb-gpios", 0,
+>cs[i].rb.gpio,
+GPIOD_IS_IN);
+ if (ret)
+ dev_err(nc->dev, "Failed to get R/B gpio (err =
%d)\n", ret);
Should not then an error here
Different log level or no message at all?
Note: Linux prints the same message with error level in that case.
Greets
Alex
Since the rb-gpios is optional, we can continue probing without it.
Throwing an error message is optional and pure informative. So I am fine
with it
Yes ok, but I'm not sure linux give an error if the gpio is get as
optional and condition
is IS_ERR. Am I right?
if (IS_ERR(gpio) && PTR_ERR(gpio) != -ENOENT) {
dev_err(nc->dev,
"Failed to get R/B gpio (err = %ld)\n",
PTR_ERR(gpio));
return ERR_CAST(gpio);
}
So Linux throws the message if IS_ERR . If the property is missing
(ENOENT) it moves on.
Can we replicate the same behavior or this behavior does not suit us in
U-boot ?
Basically I think it should be :
if (ret && ret != -ENOENT)
dev_err(...)
if (!ret)
rb.type = ATMEL_NAND_GPIO_RB;
Is this what you had in mind Michael ?
Eugen
For the rest is fine
Michael
What I wanted to ask is what happens with nand->cs[i].rb.type , is it 0
by default ?
Other than that, I can apply this patch, Michael, do you have any more
comments on it ?
Thanks,
Eugen
Michael
+ else
+ nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
}
gpio_request_by_name_nodev(np, "cs-gpios", 0,
--
2.30.2
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH 2/2] mtd: nand: raw: atmel: Add error handling when rb-gpios missing
Hi,
On 8/8/23 18:03, Alexander Dahl wrote:
Hello Michael,
Am Tue, Aug 08, 2023 at 03:49:45PM +0200 schrieb Michael Nazzareno Trimarchi:
Hi
On Tue, Aug 8, 2023 at 3:03 PM Alexander Dahl wrote:
Adapt behaviour to Linux kernel driver.
The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):
NAND: Could not find valid ONFI parameter page; aborting
device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
Macronix NAND 512MiB 3,3V 8-bit
512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
atmel-nand-controller nand-controller: NAND scan failed: -22
Failed to probe nand driver (err = -22)
Failed to initialize NAND controller. (error -22)
0 MiB
Note: not having that gpio assigned in dts is fine, the driver does not
override nand_chip->dev_ready() then and a generic solution is used.
Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl
---
drivers/mtd/nand/raw/atmel/nand-controller.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c
b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 2b29c8def6..8e745a5111 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1600,10 +1600,13 @@ static struct atmel_nand *atmel_nand_create(struct
atmel_nand_controller *nc,
nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB;
nand->cs[i].rb.id = val;
} else {
- gpio_request_by_name_nodev(np, "rb-gpios", 0,
- >cs[i].rb.gpio,
- GPIOD_IS_IN);
- nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
+ ret = gpio_request_by_name_nodev(np, "rb-gpios", 0,
+>cs[i].rb.gpio,
+GPIOD_IS_IN);
+ if (ret)
+ dev_err(nc->dev, "Failed to get R/B gpio (err =
%d)\n", ret);
Should not then an error here
Different log level or no message at all?
Note: Linux prints the same message with error level in that case.
Greets
Alex
Since the rb-gpios is optional, we can continue probing without it.
Throwing an error message is optional and pure informative. So I am fine
with it
What I wanted to ask is what happens with nand->cs[i].rb.type , is it 0
by default ?
Other than that, I can apply this patch, Michael, do you have any more
comments on it ?
Thanks,
Eugen
Michael
+ else
+ nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB;
}
gpio_request_by_name_nodev(np, "cs-gpios", 0,
--
2.30.2
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
Re: [PATCH 2/3] board: rockchip: rk35xx: Add device tree files to MAINTAINERS
On 8/17/23 09:04, Jonas Karlman wrote: Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include related device tree files. Also replace space with tabs. Signed-off-by: Jonas Karlman --- board/anbernic/rgxx3_rk3566/MAINTAINERS | 3 ++ .../neural-compute-module-6/MAINTAINERS | 6 +++ board/radxa/rock5a-rk3588s/MAINTAINERS| 2 + board/radxa/rock5b-rk3588/MAINTAINERS | 4 +- board/rockchip/evb_rk3568/MAINTAINERS | 51 ++- board/rockchip/evb_rk3588/MAINTAINERS | 3 +- 6 files changed, 43 insertions(+), 26 deletions(-) For rock5, Acked-by: Eugen Hristev
Re: [PATCH 3/3] board: rockchip: rk35xx: Add myself as reviewer to MAINTAINERS
On 8/17/23 09:04, Jonas Karlman wrote: Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and can help with review and testing of defconfig and device tree changes. Signed-off-by: Jonas Karlman --- board/radxa/rock5a-rk3588s/MAINTAINERS | 1 + board/radxa/rock5b-rk3588/MAINTAINERS | 1 + board/rockchip/evb_rk3568/MAINTAINERS | 4 3 files changed, 6 insertions(+) For rock5, Acked-by: Eugen Hristev
Re: [PATCH 2/4] configs: at91: sam9x60: Switch to new reset driver
On 8/16/23 16:42, Alexander Dahl wrote:
Hei hei,
Am Wed, Aug 16, 2023 at 03:48:25PM +0300 schrieb Eugen Hristev:
Hi Alexander,
On 8/9/23 17:16, Alexander Dahl wrote:
Since commit 61040097a9d1 ("reset: at91: Add reset driver for basic
assert/deassert operations") the compatible "microchip,sam9x60-rstc" for
the sam9x60 reset controller in sam9x60.dtsi is not handled by
CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now. This
resulted in the following error message, when trying to reset from
U-Boot shell:
U-Boot> reset
resetting ...
System reset not supported on this platform
### ERROR ### Please RESET the board ###
Fixed with the switch to the new driver. Tested on sam9x60-curiosity
board. Defconfigs for sam9x60ek adapted in the same way, but without
testing. These should be all sam9x60 boards affected in U-Boot here.
From what I remember from the top of my head, it makes sense to use the new
reset driver, however, you should not remove the old SYSRESET driver,
because that driver handles different kind of resets on the SoC and PHYs.
Can you double check that?
Had a look into it and TBH it's very confusing to me. I found no help
in documentation. There are two different uclass which from the
outside seem to do the same thing. The Kconfig help texts do not
explain what the purpose is of one over the other. As a user this
creates very bad user experience: Do I need one or the other or both?
Maybe I can shed some light into it.
U-boot, unlike Linux, is a bit more modular in a few aspects, as in this
RESET vs SYSRESET case.
From my understanding, RESET is used to reset the board and SYSRESET
for general reset purposes: reset a PHY, reset something else, etc.
DT-bindings are done by Linux guys, and in Linux, we have a single
driver for all above (it's similar with PINCTRL and GPIO, one linux
driver, but two different u-boot UCLASS), so we have just one
compatible, but U-boot needs to probe two drivers to achieve all the
wanted functionality !
And we are forced to use the bindings from Linux (little rant), so just
one U-boot driver is bound to the compatible at boot time. Then, the
second driver, has to be manually bound by the first driver, and it does
not have a compatible into it.
I think some of the stuff I explained(poorly) should be readable from
this patch https://lists.denx.de/pipermail/u-boot/2022-December/501618.html
To simply answer your question, you would need both.
Then there's CONFIG_SYSRESET_CMD_RESET which implicates there are more
than one possible implementations for cmd 'reset' … but which is the
right one. The help text does not explain.
I though sysreset is old and reset is new and assumed things get
migrated like in other subsystems. But here it seems we have two
entangled subsystems where one hooks into the other (as reset_at91
does).
So, I can of course _just_ enable CONFIG_RESET_AT91 and hope for the
best here, keeping SYSRESET_CMD_RESET as is … but it would be very
nice if someone else could explain the what and why in help texts and
documentation!
Greets
Alex
P.S.: I would have added sysreset or reset subsystem maintainer to Cc,
but according to MAINTAINERS there is none.
Signed-off-by: Alexander Dahl
---
configs/sam9x60_curiosity_mmc1_defconfig | 4 ++--
configs/sam9x60_curiosity_mmc_defconfig | 4 ++--
configs/sam9x60ek_mmc_defconfig | 4 ++--
configs/sam9x60ek_nandflash_defconfig| 4 ++--
configs/sam9x60ek_qspiflash_defconfig| 4 ++--
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/configs/sam9x60_curiosity_mmc1_defconfig
b/configs/sam9x60_curiosity_mmc1_defconfig
index 21b2cc2edd..e8781b363b 100644
--- a/configs/sam9x60_curiosity_mmc1_defconfig
+++ b/configs/sam9x60_curiosity_mmc1_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,11 +80,10 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_MCHP_PIT64B_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60_curiosity_mmc_defconfig
b/configs/sam9x60_curiosity_mmc_defconfig
index 269f015989..0f57588d8b 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,
Re: [PATCH 4/4] ARM: dts: at91: sam9x60-curiosity: Add user button support
Hi Alexander,
On 8/9/23 17:16, Alexander Dahl wrote:
Copied as is from Linux Kernel. Works out of the box if the following
config options are enabled: CONFIG_BUTTON, CONFIG_BUTTON_GPIO,
CONFIG_CMD_BUTTON, CONFIG_DM_GPIO.
Can you please indicate the Linux commit which was picked,
thanks !
Eugen
Signed-off-by: Alexander Dahl
---
arch/arm/dts/at91-sam9x60_curiosity.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 244cacfe1b..99867d2bf8 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -7,6 +7,7 @@
* Author: Durai Manickam KR
*/
/dts-v1/;
+#include
#include
#include "sam9x60.dtsi"
@@ -33,6 +34,19 @@
};
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_key_gpio_default>;
+
+ button-user {
+ label = "PB_USER";
+ gpios = < 29 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ wakeup-source;
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -189,6 +203,12 @@
};
};
+ gpio-keys {
+ pinctrl_key_gpio_default: pinctrl-key-gpio {
+ atmel,pins = ;
+ };
+ };
+
leds {
pinctrl_gpio_leds: gpio-leds {
atmel,pins =
Re: [PATCH 3/4] at91: sam9x60-curiosity: Add proper LED support
Hi Alexander,
On 8/9/23 17:16, Alexander Dahl wrote:
Copied dts pieces from Linux Kernel. Support is optional for now, to
make it work the following options have to be enabled: CONFIG_LED,
CONFIG_LED_GPIO, CONFIG_CMD_LED.
Signed-off-by: Alexander Dahl
---
.../dts/at91-sam9x60_curiosity-u-boot.dtsi| 18 +++
arch/arm/dts/at91-sam9x60_curiosity.dts | 30 +++
.../sam9x60_curiosity/sam9x60_curiosity.c | 18 +++
Can you please split the DT changes from the C file changes, namely if
you bring changes from Linux, add them in a sync commit indicating the
commit from Linux, and the changes to the board in a separate patch.
Thanks !
3 files changed, 66 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
index a1b76e94d1..dd4623311c 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
+++ b/arch/arm/dts/at91-sam9x60_curiosity-u-boot.dtsi
@@ -20,6 +20,24 @@
chosen {
bootph-all;
};
+
+ config {
+ u-boot,boot-led = "blue";
+ };
+
+ leds {
+ led-red {
+ default-state = "off";
+ };
+
+ led-green {
+ default-state = "off";
+ };
+
+ led-blue {
+ default-state = "off";
+ };
+ };
};
{
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 2547b4527c..244cacfe1b 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -33,6 +33,28 @@
};
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_gpio_leds>;
+
+ led-red {
+ label = "red";
+ gpios = < 17 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-green {
+ label = "green";
+ gpios = < 19 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-blue {
+ label = "blue";
+ gpios = < 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
onewire_tm: onewire {
gpios = < 14 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -167,6 +189,14 @@
};
};
+ leds {
+ pinctrl_gpio_leds: gpio-leds {
+ atmel,pins = ;
+ };
+ };
+
nand {
pinctrl_nand_oe_we: nand-oe-we-0 {
atmel,pins =
diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
index 0fe0de9fde..f53d359404 100644
--- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
+++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -18,6 +19,7 @@
#include
#include
#include
+#include
extern void at91_pda_detect(void);
@@ -27,9 +29,25 @@ void at91_prepare_cpu_var(void);
static void board_leds_init(void)
{
+#if CONFIG_IS_ENABLED(LED)
+ const char *led_name;
+ struct udevice *dev;
+ int ret;
+
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
+ if (!led_name)
+ return;
+
+ ret = led_get_by_label(led_name, );
+ if (ret)
+ return;
+
+ led_set_state(dev, LEDST_ON);
+#else
at91_set_pio_output(AT91_PIO_PORTD, 17, 0); /* LED RED */
at91_set_pio_output(AT91_PIO_PORTD, 19, 0); /* LED GREEN */
at91_set_pio_output(AT91_PIO_PORTD, 21, 1); /* LED BLUE */
+#endif
}
int board_late_init(void)
Re: [PATCH 2/4] configs: at91: sam9x60: Switch to new reset driver
Hi Alexander,
On 8/9/23 17:16, Alexander Dahl wrote:
Since commit 61040097a9d1 ("reset: at91: Add reset driver for basic
assert/deassert operations") the compatible "microchip,sam9x60-rstc" for
the sam9x60 reset controller in sam9x60.dtsi is not handled by
CONFIG_SYSRESET_AT91 anymore, but by CONFIG_RESET_AT91 now. This
resulted in the following error message, when trying to reset from
U-Boot shell:
U-Boot> reset
resetting ...
System reset not supported on this platform
### ERROR ### Please RESET the board ###
Fixed with the switch to the new driver. Tested on sam9x60-curiosity
board. Defconfigs for sam9x60ek adapted in the same way, but without
testing. These should be all sam9x60 boards affected in U-Boot here.
From what I remember from the top of my head, it makes sense to use the
new reset driver, however, you should not remove the old SYSRESET
driver, because that driver handles different kind of resets on the SoC
and PHYs. Can you double check that?
Signed-off-by: Alexander Dahl
---
configs/sam9x60_curiosity_mmc1_defconfig | 4 ++--
configs/sam9x60_curiosity_mmc_defconfig | 4 ++--
configs/sam9x60ek_mmc_defconfig | 4 ++--
configs/sam9x60ek_nandflash_defconfig| 4 ++--
configs/sam9x60ek_qspiflash_defconfig| 4 ++--
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/configs/sam9x60_curiosity_mmc1_defconfig
b/configs/sam9x60_curiosity_mmc1_defconfig
index 21b2cc2edd..e8781b363b 100644
--- a/configs/sam9x60_curiosity_mmc1_defconfig
+++ b/configs/sam9x60_curiosity_mmc1_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,11 +80,10 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_MCHP_PIT64B_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60_curiosity_mmc_defconfig
b/configs/sam9x60_curiosity_mmc_defconfig
index 269f015989..0f57588d8b 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -79,11 +80,10 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_MCHP_PIT64B_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index 2a1399748c..446caceba0 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -15,6 +15,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -87,14 +88,13 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60ek_nandflash_defconfig
b/configs/sam9x60ek_nandflash_defconfig
index c6c4686658..acaa16ee49 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
CONFIG_DEBUG_UART_CLOCK=2
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -89,14 +90,13 @@ CONFIG_PHY_MICREL=y
CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
+CONFIG_RESET_AT91=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_W1=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig
b/configs/sam9x60ek_qspiflash_defconfig
index ef2e2db8b8..6fb79214e5 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -14,6 +14,7 @@ CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek"
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_BASE=0xf200
Re: [PATCH 1/4] configs: at91: sam9x60_curiosity: Sync both defconfig variants
Hi Alexander, On 8/9/23 17:16, Alexander Dahl wrote: The board has two SD card slots and we have two defconfigs for booting from either the first (micro SD) named 'sam9x60_curiosity_mmc_defconfig' or the second (full size SD) named 'sam9x60_curiosity_mmc1_defconfig'. For comparable Microchip boards (sama5d27-som1-ek, sama5d29-curiosity, sama7g5ek) with two card slots the defconfigs only differ in BOOTARGS, BOOTCOMMAND, and ENV_FAT_DEVICE_AND_PART and the same should be the case for sam9x60_curiosity. To shed some light on this: the defconfigs for different at91 boards should differ only in terms of *where the env is stored*, but all the drivers should be available in all defconfigs. The `where it boots from` sometimes is not related to the name of the defconfig, because e.g. we have board_qspiflash_defconfigs, which store the env in the qspi flash, but do not boot Linux from it, main reason is that the QSPI flash is very small (8 Mbytes e.g.) Most boards have a simple boot example from the same media as where the env is stored, but it's not always the case as seen above. Here the 'mmc1' config has more options enabled to support the raw NAND flash populated on the board, so the 'mmc' config (for mmc0) was adapted by enabling additional options, instead of removing options from mmc1. Signed-off-by: Alexander Dahl --- configs/sam9x60_curiosity_mmc_defconfig | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index 10937d67d7..269f015989 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -23,7 +23,7 @@ CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" Have you checked the Linux DT if the memory is 128M hence the `mem=128M` is redundant ? CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x2100 at91-sam9x60_curiosity.dtb; fatload mmc 0:1 0x2200 zImage; bootz 0x2200 - 0x2100" CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -38,6 +38,8 @@ CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y @@ -50,6 +52,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y @@ -60,10 +64,17 @@ CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_AT91=y +CONFIG_ATMEL_EBI=y +CONFIG_MFD_ATMEL_SMC=y CONFIG_I2C_EEPROM=y CONFIG_MICROCHIP_FLEXCOM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_DM_NAND_ATMEL=y +CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_PHY_MICREL=y CONFIG_MACB=y CONFIG_PINCTRL=y @@ -71,6 +82,8 @@ CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y CONFIG_W1=y
Re: [PATCH v2 06/10] ARM: dts: rockchip: rk3588-rock-5b-u-boot: add bootph-all to gadget nodes
On 8/12/23 05:53, Kever Yang wrote:
Hi Eugen,
On 2023/8/1 15:28, Eugen Hristev wrote:
Add bootph-all to gadget nodes to have the gadget available in SPL.
Does this gadget available on both USB2 and USB3? I think only USB2 is
enough?
Hi Kever,
This board has one USB type C that is connected on USB3. This type C
port is used for maskrom, to flash using rkdeveloptool and to power the
board. It is only natural that this port is used for gadget, because
everyone who boot this board, use rockusb to boot, will already have a
cable connected to the host.
Also, on this device RK3588 USB2 controller does not support gadget
mode, only host, so I am forced to use USB3 anyway.
Eugen
Thanks,
- Kever
Signed-off-by: Eugen Hristev
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 5a3292699640..f453aeeaf526 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -221,10 +221,12 @@
};
{
+ bootph-all;
status = "okay";
};
_otg {
+ bootph-all;
rockchip,typec-vbus-det;
status = "okay";
};
@@ -271,6 +273,7 @@
};
_phy0 {
+ bootph-all;
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = < RK_PA6 GPIO_ACTIVE_HIGH>;
@@ -293,14 +296,17 @@
};
_phy0_u3 {
+ bootph-all;
status = "okay";
};
_0 {
+ bootph-all;
status = "okay";
};
_dwc3_0 {
+ bootph-all;
dr_mode = "otg";
usb-role-switch;
Re: [PATCH 0/2] mtd: nand: raw: atmel: R/B gpio on sam9x60
Added Mihai who tested this a lot at some point in time Eugen On 8/8/23 16:02, Alexander Dahl wrote: Hello everyone, this is a patch series wtih some real fixes _and_ a question or some kind of support request in the cover letter. I would be happy if anyone could read the cover letter carefully and answer to that one what might be the problem I see. O:-) I'm currently working on the sam9x60-curiosity board and especially trying to get it booting from onboard raw NAND flash. As reported in my last series I got the flash recognized already. However interacting with it was terribly slow, because nand_wait_ready() calling atmel_nand_dev_ready() ran into a 400ms timeout in several occasions, especially when reading from the device. Reading a single block triggered that timeout two times per page, which summed up to over 50 seconds for 64 × 4096 = 256k Bytes! (You can have U-Boot print that warning from nand_wait_ready() by increasing the console log level to at least "warn".) Note: the dts from atmel/next seems correct to me, I double checked that again. My own debug log messages showed the GPIO is accessed, and if you add enough debug messages sometimes the timeout is not reached, so I'm sure the NAND chip eventually switches that R/B line and the code correctly sees that, that line level change however takes ages, something between 400ms and 500ms most of the times. I vaguely remembered on SAMA5D2 the old atmel raw nand driver is used which does not support reading the R/B signal, but nevertheless works. I'm not familiar in detail with those raw NAND flash chips, but as far as I can understand, there are other ways to determine if the chip is ready or busy. So after I removed that rb-gpio parameter from 'at91-sam9x60_curiosity.dts' I ran into the bug fixed by patch 2. With that patch applied _and_ rb-gpio still removed from dts, raw NAND access is reasonably fast on sam9x60-curiosity board. (You might want to rebase to atmel/next for testing this.) Not sure if I should send a patch for that dts change, because I suppose it's a workaround only and not addressing the actual cause? I think the fix is correct in itself, I tested different combinations and compared with the driver in Linux, however … Can anyone explain to me, why flash access is sooo slow if the R/B gpio is used? Especially in comparision to Linux, where I don't need to remove that thing from dts and it works reasonably fast? The actual flash chip is a Macronix MX30LF4G28AD, 512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 256. Greets Alex P.S.: although not returned by get_maintainer.pl I added Eugen to Cc because he is maintainer of the at91 and might have some insight if it is a general problem of the nand controller in at91 socs? Alexander Dahl (2): mtd: nand: raw: atmel: Remove duplicate line mtd: nand: raw: atmel: Add error handling when rb-gpios missing drivers/mtd/nand/raw/atmel/nand-controller.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) base-commit: a169438411f9277cc689c14078151aa1d1caae3c
Re: [PATCH v2] board: rockchip: Add Bananapi R2Pro Board
Hi Frank,
On 8/8/23 11:09, Frank Wunderlich wrote:
From: Frank Wunderlich
Add Bananapi R2 Pro board.
Signed-off-by: Frank Wunderlich
---
because iodomain is different to evb and now iodomain driver is sent as
patch we need to separate between EVB and R2Pro else board can be bricked.
---
v2:
- drop switch-node for now as u-boot driver works differently to linux
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi | 23 +
arch/arm/dts/rk3568-bpi-r2pro.dts | 549 ++
configs/bpi-r2pro-rk3568_defconfig| 101
4 files changed, 675 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-bpi-r2pro.dts
create mode 100644 configs/bpi-r2pro-rk3568_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index bd518064f35f..767bf9db39fb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -182,7 +182,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3568-nanopi-r5s.dtb \
rk3568-odroid-m1.dtb \
rk3568-radxa-e25.dtb \
- rk3568-rock-3a.dtb
+ rk3568-rock-3a.dtb \
+ rk3568-bpi-r2pro.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
diff --git a/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi
b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi
new file mode 100644
index ..382a52a28b10
--- /dev/null
+++ b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include "rk356x-u-boot.dtsi"
Isn't rk356x-u-boot.dtsi automatically included if rk356x.dtsi is included ?
+
+/ {
+ chosen {
+ stdout-path =
+ u-boot,spl-boot-order = "same-as-spl", ,
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ clock-frequency = <2400>;
+ bootph-pre-ram;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-bpi-r2pro.dts
b/arch/arm/dts/rk3568-bpi-r2pro.dts
new file mode 100644
index ..d99f29ab0bcb
--- /dev/null
+++ b/arch/arm/dts/rk3568-bpi-r2pro.dts
@@ -0,0 +1,549 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Author: Frank Wunderlich
+ *
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include "rk3568.dtsi"
... as it's included here and rk3568.dtsi includes rk356x.dtsi
+
+/ {
+ model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
+ compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 =
+ ethernet1 =
+ mmc0 =
+ mmc1 =
+ };
+
+ chosen: chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_led_pin _led_pin>;
+
+ blue_led: led-0 {
+ color = ;
+ default-state = "off";
+ function = LED_FUNCTION_STATUS;
+ gpios = < RK_PD6 GPIO_ACTIVE_HIGH>;
+ };
+
+ green_led: led-1 {
+ color = ;
+ default-state = "on";
+ function = LED_FUNCTION_POWER;
+ gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ dc_12v: dc-12v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
+
+ vcc3v3_sys: vcc3v3-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_12v>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_12v>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_12v>;
+ };
+
+ vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+ compatible = "regulator-fixed";
+
[PATCH RESEND v3] fpga: add inline stub for fpga_load
In case CC_OPTIMIZE_FOR_DEBUG is set, unused code will not be optimized out,
hence the reference to fpga_load will be compiled.
if DM_FPGA and SPL_FPGA are not set, the build will fail with :
aarch64-none-linux-gnu-ld.bfd: common/spl/spl_fit.o: in function
`spl_fit_upload_fpga':
u-boot/common/spl/spl_fit.c:595: undefined reference to `fpga_load'
To solve this, added an inline empty stub in the header if
CC_OPTIMIZE_FOR_DEBUG is set such that the build will succeed.
Signed-off-by: Eugen Hristev
---
Changes in v3:
- return -ENOSYS
Changes in v2:
- this is a rework as suggested by Simon of this previous patch :
https://patchwork.ozlabs.org/project/uboot/patch/20230619102839.277902-1-eugen.hris...@collabora.com/
include/fpga.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/fpga.h b/include/fpga.h
index ed688cc0fa3b..33d0dbbe2ba4 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -60,8 +60,17 @@ int fpga_add(fpga_type devtype, void *desc);
int fpga_count(void);
const fpga_desc *const fpga_get_desc(int devnum);
int fpga_is_partial_data(int devnum, size_t img_len);
+#if defined(CONFIG_CC_OPTIMIZE_FOR_DEBUG)
+static inline int fpga_load(int devnum, const void *buf, size_t bsize,
+ bitstream_type bstype, int flags)
+{
+ return -ENOSYS;
+}
+#else
int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype, int flags);
+#endif
+
int fpga_fsload(int devnum, const void *buf, size_t size,
fpga_fs_info *fpga_fsinfo);
int fpga_loads(int devnum, const void *buf, size_t size,
--
2.34.1
Re: [PATCH 4/7] net: dwc_eth_qos: Add glue driver for GMAC on Rockchip RK3568
Hi Jonas,
Thank you for your work,
On 8/7/23 03:08, Jonas Karlman wrote:
Add a new glue driver for Rockchip SoCs, i.e RK3568, with a GMAC based
on Synopsys DWC Ethernet QoS IP.
rk_gmac_ops was ported from linux commit:
3bb3d6b1c195 ("net: stmmac: Add RK3566/RK3568 SoC support")
Signed-off-by: Jonas Karlman
---
Cc: David Wu
Cc: Ezequiel Garcia
---
drivers/net/Kconfig| 8 +
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c | 8 +-
drivers/net/dwc_eth_qos.h | 2 +
drivers/net/dwc_eth_qos_rockchip.c | 348 +
5 files changed, 365 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/dwc_eth_qos_rockchip.c
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 0ed39a61e4de..29304fd77759 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -225,6 +225,14 @@ config DWC_ETH_QOS_IMX
The Synopsys Designware Ethernet QOS IP block with the specific
configuration used in IMX soc.
+config DWC_ETH_QOS_ROCKCHIP
+ bool "Synopsys DWC Ethernet QOS device support for Rockchip SoCs"
+ depends on DWC_ETH_QOS
+ select DM_ETH_PHY
+ help
+ The Synopsys Designware Ethernet QOS IP block with specific
+ configuration used in Rockchip SoCs.
+
config DWC_ETH_QOS_STM32
bool "Synopsys DWC Ethernet QOS device support for STM32"
depends on DWC_ETH_QOS
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index d4af253b6f28..1d444f5b4a69 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o
obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o
+obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o
obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o
obj-$(CONFIG_DWC_ETH_QOS_STARFIVE) += dwc_eth_qos_starfive.o
obj-$(CONFIG_E1000) += e1000.o
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 24fb3fac1f12..9fb98a2c3c74 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1707,7 +1707,12 @@ static const struct udevice_id eqos_ids[] = {
.data = (ulong)_imx_config
},
#endif
-
+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_ROCKCHIP)
+ {
+ .compatible = "rockchip,rk3568-gmac",
+ .data = (ulong)_rockchip_config
+ },
+#endif
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_QCOM)
{
.compatible = "qcom,qcs404-ethqos",
@@ -1720,7 +1725,6 @@ static const struct udevice_id eqos_ids[] = {
.data = (ulong)_jh7110_config
},
#endif
-
Unintended change ?
{ }
};
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 06a082da72ef..e3222e1e17e5 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -82,6 +82,7 @@ struct eqos_mac_regs {
#define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT21
#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT 16
#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT8
+#define EQOS_MAC_MDIO_ADDRESS_CR_100_150 1
#define EQOS_MAC_MDIO_ADDRESS_CR_20_352
#define EQOS_MAC_MDIO_ADDRESS_CR_250_300 5
#define EQOS_MAC_MDIO_ADDRESS_SKAPBIT(4)
@@ -287,5 +288,6 @@ void eqos_flush_buffer_generic(void *buf, size_t size);
int eqos_null_ops(struct udevice *dev);
extern struct eqos_config eqos_imx_config;
+extern struct eqos_config eqos_rockchip_config;
extern struct eqos_config eqos_qcom_config;
extern struct eqos_config eqos_jh7110_config;
diff --git a/drivers/net/dwc_eth_qos_rockchip.c
b/drivers/net/dwc_eth_qos_rockchip.c
new file mode 100644
index ..c8abe351fc3e
--- /dev/null
+++ b/drivers/net/dwc_eth_qos_rockchip.c
@@ -0,0 +1,348 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "dwc_eth_qos.h"
+
+struct rk_gmac_ops {
+ const char *compatible;
+ int (*set_to_rgmii)(struct udevice *dev,
+ int tx_delay, int rx_delay);
+ int (*set_to_rmii)(struct udevice *dev);
+ int (*set_gmac_speed)(struct udevice *dev);
+ u32 regs[3];
Can't these be somehow const and point to a dedicated array for a
specific SoC ?
Also I believe the naming 'regs' is a bit unfortunate, as it does not
hold the usual regmap, rather an array of addresses hardcoded used to
figure out which of the GMAC instances we are referring to.
+};
+
+struct rockchip_platform_data {
+ struct reset_ctl_bulk resets;
+ const struct rk_gmac_ops *ops;
+ int id;
+ struct regmap *grf;
+};
+
+#define HIWORD_UPDATE(val, mask, shift) \
+ ((val) << (shift) | (mask) << ((shift) + 16))
+
Re: [PATCH v2] board: at91: sama5d29_curiosity: add initial support for sama5d29_curiosity
On 7/24/23 14:35, Mihai Sain wrote: Add initial support for sama5d29_curiosity board. Hardware: SoC: SAMA5D29 500 MHz DRAM: LPDDR2 512 MiB PMIC: MCP16502 Debug: UART0 Flash: QSPI NOR 8 MiB RGB LCD connector Mikrobus connectors x 2 SD-Card connectors x 2 USB 2.0 x 2 Changes in v2: The version changes must be written after the `---` dashes, such that they will not land in the commit message. I fixed this for you. * Remove CONFIG_SYS_PROMPT and CONFIG_SYS_PROMPT_HUSH_PS2 * Remove CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_SDRAM_SIZE Signed-off-by: Mihai Sain --- [snip] diff --git a/board/atmel/sama5d29_curiosity/MAINTAINERS b/board/atmel/sama5d29_curiosity/MAINTAINERS new file mode 100644 index 00..110c3d2874 --- /dev/null +++ b/board/atmel/sama5d29_curiosity/MAINTAINERS @@ -0,0 +1,8 @@ +SAMA5D29 CURIOSITY BOARD +M: Mihai Sain +S: Maintained +F: board/atmel/sama5d29_curiosity.c +F: include/configs/sama5d29_curiosity.h +F: configs/sama5d29_curiosity_mmc_defconfig +F: configs/sama5d29_curiosity_mmc1_defconfig +F: configs/sama5d29_curiosity_qspiflash_defconfig New requirement is to have the DT files added to this list as well I added them for you, and applied to u-boot-at91/next , thanks !
[PATCH] MAINTAINERS: add DT/bindings files to at91 entry
With this change the DT and binding files are under the at91 tree maintainer, and get_maintainer.pl correctly reports the entry. Signed-off-by: Eugen Hristev --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 47581cf6fbb8..23d1d232a415 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -412,13 +412,21 @@ ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-at91.git +F: arch/arm/dts/at91* +F: arch/arm/dts/sam* F: arch/arm/mach-at91/ F: board/atmel/ F: drivers/cpu/at91_cpu.c F: drivers/memory/atmel-ebi.c F: drivers/misc/microchip_flexcom.c F: drivers/timer/atmel_tcb_timer.c +F: include/dt-bindings/clk/at91.h +F: include/dt-bindings/clock/at91.h +F: include/dt-bindings/dma/at91.h +F: include/dt-bindings/mfd/at91-usart.h F: include/dt-bindings/mfd/atmel-flexcom.h +F: include/dt-bindings/pinctrl/at91.h +F: include/dt-bindings/sound/microchip,pdmc.h F: drivers/timer/mchp-pit64b-timer.c ARM MSC SM2S IMX8MP SOM -- 2.34.1
Re: [PATCH 3/5] clk: rockchip: rk3568: Include UART clocks in SPL
On 8/4/23 12:33, Jonas Karlman wrote:
The clock driver for RK3568 does not include support for UART clocks in
SPL. This result in the following message with high enough loglevel.
ns16550_serial serial@fe66: pinctrl_select_state_full:
uclass_get_device_by_phandle_id: err=-19
Fix this by including support for UART clocks in SPL.
Fixes: 4a262feba3a5 ("rockchip: rk3568: add clock driver")
Signed-off-by: Jonas Karlman
---
Something like this it's also done for the 3588, and I still have not
figured out why. When the rk3588 clock driver was added, I commented on
this, but the result was just that the 'clock not found' message was
removed.
I am happy that you found some time to do these changes
Reviewed-by: Eugen Hristev
Re: [PATCH 0/5] ARM: dts: at91: Improve sam9x60-curiosity
On 7/5/23 23:16, Alexander Dahl wrote: Hello everyone, currently I have the Microchip SAM9X60-Curiosity board on my desk and for evaluation purposes I'm trying to get it booting from NAND flash without SD card. This series contains a collection of patches I made on that journey. It's probably not the last set of patches, but I send it out now before my holidays so anyone who's interested has some time to look into it before I return to my desk in roughly two weeks. ;-) Note: while I could access the I²C EEPROM populated on that board with Linux v6.4 through nvmem and the 100 bytes content seem valid including a MAC address attributed to Microchip, I could not do so in U-Boot. That also means out of the box access to Ethernet is currently broken without valid MAC address. Note: I prepared the patches at the office, but sending them from home now. This is why I use two different mail addresses. Greets Alex Alexander Dahl (5): ARM: dts: at91: sam9x60: Better align with upstream dtsi ARM: dts: at91: sam9x60-curiosity: Fix EEPROM type ARM: dts: at91: sam9x60: Change i2c compatible ARM: dts: at91: sam9x60-curiosity: Improve alignment with upstream ARM: dts: at91: sam9x60-curiosity: Add raw NAND flash .../dts/at91-sam9x60_curiosity-u-boot.dtsi| 8 +- arch/arm/dts/at91-sam9x60_curiosity.dts | 203 +- arch/arm/dts/sam9x60.dtsi | 66 +++--- arch/arm/dts/sam9x60ek.dts| 2 +- 4 files changed, 190 insertions(+), 89 deletions(-) base-commit: e1bebc16e1d9aa0ddd56c53c0b781f7186dce557 Applied to u-boot-at91/next , thanks !
Re: Data abort when starting DFU on SAMA5D2
Hi Alexis, On 8/1/23 10:09, Alexis Lothoré wrote: Hi, I am currently using an ATSAMA5D27-WLSOM1-EK1. This boards embeds an ATSAMA5D27-WLSOM1, which in turns holds an ATSAMA5D27 and a 8MB QSPI flash. I have been wanting to program u-boot in the QSPI flash thanks to DFU, since the board is able to boot from QSPI and is supported in uboot. To do so, I have executed the following steps: - check out recent uboot version (2023.07.02, but issed described below is observed on master too) - load sama5d27_wlsom1_ek_qspiflash_defconfig - tune the configuration to enable DFU: - CONFIG_CMD_DFU=y - CONFIG_DFU_SF=y - CONFIG_USB_GADGET_DOWNLOAD=y - build uboot, upload and run it onto external ram thanks to snagrecover ([1]). - running "bdinfo" shows that board is properly defined/recognized - "sf probe" properly detects the qspi flash chip - in u-boot console, configure dfu: - setenv dfu_alt_info uboot raw 0 0x8 - start DFU: - dfu 0 sf 2:0 Unfortunately, this step systematically and immediately leads to a data abort with the following log: => dfu 0 sf 2:0 data abort pc : [<2fda9ee0>]lr : [<2fd8dc08>] reloc pc : [<26f3fee0>]lr : [<26f23c08>] sp : 2f963fe8 ip : 2f9829cc fp : r10: 2fde1cd9 r9 : 2f969e80 r8 : 2fdfc304 r7 : r6 : r5 : 2fdf3034 r4 : 2f982948 r3 : 0a299cfc r2 : ffec r1 : r0 : Flags: nzCv IRQs off FIQs off Mode SVC_32 Code: e5843058 e5950004 e3a01000 e5903008 (e5933008) Resetting CPU ... resetting ... System reset not supported on this platform ### ERROR ### Please RESET the board ### A quick translation with addr2line shows that the data abort occurs in include/linux/usb/gagdet.h, in usb_ep_alloc_request, likely because of ep being NULL, which seems confirmed by adding some custom logs in both usb_ep_alloc_request and its caller (composite_bind). Before digging further, does anyone have successfully used DFU on SAMA5D2 boards (and if so, am I missing something in the configuration) ? Or does this data abort show that some support is still missing to make it work for SAMA5D2 ? I believe this is related to the gadget more than DFU itself. Zixun LI (in CC) has attempted gadget on this platform at some point. Mihai (also in CC) has did some tests with USB on this platform as well. Cristian has more knowledge of the USB implementation on sama5d2. Eugen Kind regards, Alexis [1] https://github.com/bootlin/snagboot
[PATCH v2 10/10] configs: rockchip: rock5b-rk3588: enable DFU and related configs
Enable DFU and related configs, expand stack and buffers to hold downloaded image. Signed-off-by: Eugen Hristev --- Changes in v2: - added # CONFIG_SPL_BINMAN_UBOOT_SYMBOLS is not set because with the configs enabled here, this is automatically set as =y and this causes a build failure. configs/rock5b-rk3588_defconfig | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index 3976a6c0f05c..ca70073f3ccc 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=2400 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a0 +CONFIG_SYS_MALLOC_F_LEN=0x50 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 @@ -16,9 +17,9 @@ CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x60 +CONFIG_SPL_STACK_R_ADDR=0x100 CONFIG_TARGET_ROCK5B_RK3588=y -CONFIG_SPL_STACK=0x40 +CONFIG_SPL_STACK=0x100 CONFIG_DEBUG_UART_BASE=0xFEB5 CONFIG_DEBUG_UART_CLOCK=2400 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -30,6 +31,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x5000 CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" @@ -41,12 +43,17 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x400 CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_BINMAN_UBOOT_SYMBOLS is not set # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x30 +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x6 CONFIG_SPL_ATF=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -59,10 +66,12 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y +CONFIG_DFU_RAM=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x20 # CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -93,6 +102,7 @@ CONFIG_ROCKCHIP_SFC=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y +CONFIG_SPL_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set CONFIG_USB_EHCI_HCD=y @@ -111,7 +121,9 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y +CONFIG_SPL_USB_GADGET=y CONFIG_USB_GADGET_PRODUCT_NUM=0x350b CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_SPL_DFU=y CONFIG_ERRNO_STR=y -- 2.34.1
[PATCH v2 09/10] rockchip: rk3588: prepare env for DFU
Prepare env variables for DFU Signed-off-by: Eugen Hristev --- include/configs/rk3588_common.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h index 46389d087d29..48414fe946a0 100644 --- a/include/configs/rk3588_common.h +++ b/include/configs/rk3588_common.h @@ -7,6 +7,7 @@ #ifndef __CONFIG_RK3588_COMMON_H #define __CONFIG_RK3588_COMMON_H +#include #include "rockchip-common.h" #define CFG_IRAM_BASE 0xff00 @@ -31,6 +32,12 @@ "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ - "boot_targets=" BOOT_TARGETS "\0" + "boot_targets=" BOOT_TARGETS "\0" \ + "dfu_alt_info=ram ram0=ram ram " \ + __stringify(CONFIG_SPL_LOAD_FIT_ADDRESS) " " \ + __stringify(CONFIG_SYS_DFU_DATA_BUF_SIZE) "\0" \ + "dfu_alt_info_ram=u-boot.itb ram " \ + __stringify(CONFIG_SPL_LOAD_FIT_ADDRESS) " " \ + __stringify(CONFIG_SYS_DFU_DATA_BUF_SIZE) #endif /* __CONFIG_RK3588_COMMON_H */ -- 2.34.1
[PATCH v2 08/10] ARM: mach-rockchip: rk3588: add gadget device to the boot order
In case SPL was booted from USB, add the gadget as the boot device
for the 'same-as-spl' boot order next device.
Signed-off-by: Eugen Hristev
---
arch/arm/mach-rockchip/rk3588/rk3588.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c
b/arch/arm/mach-rockchip/rk3588/rk3588.c
index b1f535fad505..c95268e18801 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -42,6 +42,7 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_SPINOR] = "/spi@fe2b/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@fe2c",
[BROM_BOOTSOURCE_SPINOR_RK3588] = "/spi@fe2b/flash@0",
+ [BROM_BOOTSOURCE_USB] = "/usbdrd3_0/usb@fc00",
};
static struct mm_region rk3588_mem_map[] = {
--
2.34.1
[PATCH v2 07/10] ARM: mach-rockchip: spl-boot-order: add possibility to DFU
Add DFU as a possible SPL boot media if the boot device is a
gadget device.
Signed-off-by: Eugen Hristev
---
arch/arm/mach-rockchip/spl-boot-order.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c
b/arch/arm/mach-rockchip/spl-boot-order.c
index 93b8e7de4d0d..89bbe449e86c 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -66,6 +66,9 @@ static int spl_node_to_boot_device(int node)
} else if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
)) {
return BOOT_DEVICE_SPI;
+ } else if (!uclass_get_device_by_of_offset(UCLASS_USB_GADGET_GENERIC,
+ node, )) {
+ return BOOT_DEVICE_DFU;
}
/*
--
2.34.1
[PATCH v2 05/10] usb: dwc3: Increase DWC3 controller halt timeout
Since EP0 transactions need to be completed before the controller halt
sequence is finished, this may take some time depending on the host and the
enabled functions. Increase the controller halt timeout, so that we give
the controller sufficient time to handle EP0 transfers.
Signed-off-by: Wesley Cheng
Link: https://lore.kernel.org/r/20220901193625.8727-4-quic_wch...@quicinc.com
Cherry-picked from Linux: 461ee467507c ("usb: dwc3: Increase DWC3 controller
halt timeout")
Signed-off-by: Eugen Hristev
---
Not to be merged, I know Marek does not apply any patches to DWC3.
drivers/usb/dwc3/gadget.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 24a2c455b0a4..a86680719108 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1356,7 +1356,7 @@ static int dwc3_gadget_set_selfpowered(struct usb_gadget
*g,
static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
{
u32 reg;
- u32 timeout = 500;
+ u32 timeout = 2000;
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
if (is_on) {
@@ -1385,6 +1385,7 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int
is_on, int suspend)
dwc3_gadget_dctl_write_safe(dwc, reg);
do {
+ mdelay(2);
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
if (is_on) {
if (!(reg & DWC3_DSTS_DEVCTRLHLT))
@@ -1396,7 +1397,6 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int
is_on, int suspend)
timeout--;
if (!timeout)
return -ETIMEDOUT;
- udelay(1);
} while (1);
dev_vdbg(dwc->dev, "gadget %s data soft-%s\n",
--
2.34.1
[PATCH v2 06/10] ARM: dts: rockchip: rk3588-rock-5b-u-boot: add bootph-all to gadget nodes
Add bootph-all to gadget nodes to have the gadget available in SPL.
Signed-off-by: Eugen Hristev
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 5a3292699640..f453aeeaf526 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -221,10 +221,12 @@
};
{
+ bootph-all;
status = "okay";
};
_otg {
+ bootph-all;
rockchip,typec-vbus-det;
status = "okay";
};
@@ -271,6 +273,7 @@
};
_phy0 {
+ bootph-all;
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = < RK_PA6 GPIO_ACTIVE_HIGH>;
@@ -293,14 +296,17 @@
};
_phy0_u3 {
+ bootph-all;
status = "okay";
};
_0 {
+ bootph-all;
status = "okay";
};
_dwc3_0 {
+ bootph-all;
dr_mode = "otg";
usb-role-switch;
--
2.34.1
[PATCH v2 04/10] usb: dwc3: core: Only handle soft-reset in DCTL
From: Venkatesh Yadav Abbarapu
[ Nguyen/Greg: Ported from Linux kernel commit
f4fd84ae0765a ("usb: dwc3: core: Only handle soft-reset in DCTL") ]
Make sure not to set run_stop bit or link state change request while
initiating soft-reset. Register read-modify-write operation may
unintentionally start the controller before the initialization completes
with its previous DCTL value, which can cause initialization failure.
Signed-off-by: Venkatesh Yadav Abbarapu
---
Not to be merged, I know Marek does not apply any patches to DWC3.
drivers/usb/dwc3/core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index bdfe51c3df96..06ca3fc96842 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -72,7 +72,8 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg |= DWC3_DCTL_CSFTRST;
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ reg &= ~DWC3_DCTL_RUN_STOP;
+ dwc3_gadget_dctl_write_safe(dwc, reg);
/* Assert USB3 PHY reset */
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
--
2.34.1
[PATCH v2 03/10] usb: dwc3: gadget: Don't send unintended link state change
From: Venkatesh Yadav Abbarapu
[ Nguyen/Felipe/Greg: Ported from Linux kernel commit
5b738211fb59 ("usb: dwc3: gadget: Don't send
unintended link state change") ]
DCTL.ULSTCHNGREQ is a write-only field. When doing a read-modify-write
to DCTL, the driver must make sure that there's no unintended link state
change request from whatever is read from DCTL.ULSTCHNGREQ. Set link
state change to no-action when the driver writes to DCTL.
Signed-off-by: Venkatesh Yadav Abbarapu
---
Not to be merged, I know Marek does not apply any patches to DWC3.
drivers/usb/dwc3/gadget.c | 16 +++-
drivers/usb/dwc3/gadget.h | 14 ++
2 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index eb416b832aad..24a2c455b0a4 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -62,7 +62,7 @@ int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)
return -EINVAL;
}
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_gadget_dctl_write_safe(dwc, reg);
return 0;
}
@@ -1382,7 +1382,7 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int
is_on, int suspend)
dwc->pullups_connected = false;
}
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_gadget_dctl_write_safe(dwc, reg);
do {
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
@@ -2047,10 +2047,8 @@ static void dwc3_gadget_disconnect_interrupt(struct dwc3
*dwc)
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg &= ~DWC3_DCTL_INITU1ENA;
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
-
reg &= ~DWC3_DCTL_INITU2ENA;
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_gadget_dctl_write_safe(dwc, reg);
dwc3_disconnect_gadget(dwc);
dwc->start_config_issued = false;
@@ -2099,7 +2097,7 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg &= ~DWC3_DCTL_TSTCTRL_MASK;
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_gadget_dctl_write_safe(dwc, reg);
dwc->test_mode = false;
dwc3_stop_active_transfers(dwc);
@@ -2215,11 +2213,11 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3
*dwc)
if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_gadget_dctl_write_safe(dwc, reg);
} else {
reg = dwc3_readl(dwc->regs, DWC3_DCTL);
reg &= ~DWC3_DCTL_HIRD_THRES_MASK;
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_gadget_dctl_write_safe(dwc, reg);
}
dep = dwc->eps[0];
@@ -2327,7 +2325,7 @@ static void dwc3_gadget_linksts_change_interrupt(struct
dwc3 *dwc,
reg &= ~u1u2;
- dwc3_writel(dwc->regs, DWC3_DCTL, reg);
+ dwc3_gadget_dctl_write_safe(dwc, reg);
break;
default:
/* do nothing */
diff --git a/drivers/usb/dwc3/gadget.h b/drivers/usb/dwc3/gadget.h
index 7806ce59a27f..b48ec6b2372f 100644
--- a/drivers/usb/dwc3/gadget.h
+++ b/drivers/usb/dwc3/gadget.h
@@ -104,4 +104,18 @@ static inline u32 dwc3_gadget_ep_get_transfer_index(struct
dwc3 *dwc, u8 number)
return DWC3_DEPCMD_GET_RSC_IDX(res_id);
}
+/**
+ * dwc3_gadget_dctl_write_safe - write to DCTL safe from link state change
+ * @dwc: pointer to our context structure
+ * @value: value to write to DCTL
+ *
+ * Use this function when doing read-modify-write to DCTL. It will not
+ * send link state change request.
+ */
+static inline void dwc3_gadget_dctl_write_safe(struct dwc3 *dwc, u32 value)
+{
+ value &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
+ dwc3_writel(dwc->regs, DWC3_DCTL, value);
+}
+
#endif /* __DRIVERS_USB_DWC3_GADGET_H */
--
2.34.1
[PATCH v2 02/10] usb: dwc3: core: improve reset sequence
From: Venkatesh Yadav Abbarapu
[ Felipe: Ported from Linux kernel commit
f59dcab17629 ("usb: dwc3: core: improve reset sequence") ]
According to Synopsys Databook, we shouldn't be relying on
GCTL.CORESOFTRESET bit as that's only for debugging purposes.
Instead, let's use DCTL.CSFTRST if we're OTG or PERIPHERAL mode.
Host side block will be reset by XHCI driver if necessary. Note that this
reduces amount of time spent on dwc3_probe() by a long margin.
We're still gonna wait for reset to finish for a long time
(default to 1ms max), but tests show that the reset polling loop executed
at most 19 times (modprobe dwc3 && modprobe -r dwc3 executed 1000
times in a row).
Without proper core reset, observing random issues like when the
USB(DWC3) is in device mode, the host device is not able to detect the
USB device.
Signed-off-by: Venkatesh Yadav Abbarapu
[eugen.hris...@collabora.com: keep the PHY resets code]
Signed-off-by: Eugen Hristev
---
Not to be merged, I know Marek does not apply any patches to DWC3.
drivers/usb/dwc3/core.c | 31 +++
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 5a8c29424578..bdfe51c3df96 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -60,17 +60,24 @@ static void dwc3_set_mode(struct dwc3 *dwc, u32 mode)
static int dwc3_core_soft_reset(struct dwc3 *dwc)
{
u32 reg;
+ int retries = 1000;
- /* Before Resetting PHY, put Core in Reset */
- reg = dwc3_readl(dwc->regs, DWC3_GCTL);
- reg |= DWC3_GCTL_CORESOFTRESET;
- dwc3_writel(dwc->regs, DWC3_GCTL, reg);
+ /*
+* We're resetting only the device side because, if we're in host mode,
+* XHCI driver will reset the host block. If dwc3 was configured for
+* host-only mode, then we can return early.
+*/
+ if (dwc->dr_mode == USB_DR_MODE_HOST)
+ return 0;
+
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ reg |= DWC3_DCTL_CSFTRST;
+ dwc3_writel(dwc->regs, DWC3_DCTL, reg);
/* Assert USB3 PHY reset */
reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));
reg |= DWC3_GUSB3PIPECTL_PHYSOFTRST;
dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
-
/* Assert USB2 PHY reset */
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
reg |= DWC3_GUSB2PHYCFG_PHYSOFTRST;
@@ -88,14 +95,14 @@ static int dwc3_core_soft_reset(struct dwc3 *dwc)
reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
- mdelay(100);
-
- /* After PHYs are stable we can take Core out of reset state */
- reg = dwc3_readl(dwc->regs, DWC3_GCTL);
- reg &= ~DWC3_GCTL_CORESOFTRESET;
- dwc3_writel(dwc->regs, DWC3_GCTL, reg);
+ do {
+ reg = dwc3_readl(dwc->regs, DWC3_DCTL);
+ if (!(reg & DWC3_DCTL_CSFTRST))
+ return 0;
+ udelay(1);
+ } while (--retries);
- return 0;
+ return -ETIMEDOUT;
}
/*
--
2.34.1
[PATCH v2 01/10] rockchip: allow env defines for SPL build
For environment in SPL, all these defines are required, otherwise
build fails:
[...]
include/env_default.h:120:9: note: in expansion of macro
‘CFG_EXTRA_ENV_SETTINGS’
120 | CFG_EXTRA_ENV_SETTINGS
| ^~
In file included from env/common.c:32:
[...]
Environment in SPL is needed e.g. for DFU, as dfu_alt is kept as
env variable.
Signed-off-by: Eugen Hristev
---
include/configs/rockchip-common.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/configs/rockchip-common.h
b/include/configs/rockchip-common.h
index 9121bba37384..be20b135066e 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -11,8 +11,6 @@
#define CFG_CPUID_OFFSET 0x7
#endif
-#ifndef CONFIG_SPL_BUILD
-
#define BOOT_TARGETS "mmc1 mmc0 nvme scsi usb pxe dhcp spi"
#ifdef CONFIG_ARM64
@@ -28,6 +26,4 @@
"name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \
"name=rootfs,size=-,uuid="ROOT_UUID
-#endif
-
#endif /* _ROCKCHIP_COMMON_H_ */
--
2.34.1
[PATCH v2 00/10] rockchip: rk3588: add support for DFU in SPL
This series adds support for DFU in SPL for rockchip rk3588 on rock5b board. Namely, when SPL is loaded via rockusb (thus via USB), having the `same-as-spl` boot order item, after having detected that it was loaded from USB, it will lookup the gadget USB node in DT and boot via DFU. Some changes were required namely: - DFU needs environment, hence adding environment variables into DFU - added bootph-all to nodes such that they are available in SPL - insert gadget into boot order I had to port one patch for DWC3 from Linux, and include in this series the patches that are floating from Venkatesh that fixup the DWC3 (https://marc.info/?l=u-boot=168351919807081=2 ) I know that Marek NAKed them and I am fine with it, I am not trying to sneak in any patches, they are not to be merged, also this patch `usb: dwc3: Increase DWC3 controller halt timeout` is in the same bucket so Marek you can NAK this one as well, no problem, I am just sending out all the series so maybe the rockchip part for the gadget can be picked up and if people want to use the DFU SPL gadget can also manually pick the DWC3 patches. The branch with all the patches is available here : https://gitlab.collabora.com/hardware-enablement/rockchip-3588/u-boot Thanks! Changes in v2: - rebased on latest upstream which caused a change in the config patch. Eugen Hristev (7): rockchip: allow env defines for SPL build usb: dwc3: Increase DWC3 controller halt timeout ARM: dts: rockchip: rk3588-rock-5b-u-boot: add bootph-all to gadget nodes ARM: mach-rockchip: spl-boot-order: add possibility to DFU ARM: mach-rockchip: rk3588: add gadget device to the boot order rockchip: rk3588: prepare env for DFU configs: rockchip: rock5b-rk3588: enable DFU and related configs Venkatesh Yadav Abbarapu (3): usb: dwc3: core: improve reset sequence usb: dwc3: gadget: Don't send unintended link state change usb: dwc3: core: Only handle soft-reset in DCTL arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 6 + arch/arm/mach-rockchip/rk3588/rk3588.c | 1 + arch/arm/mach-rockchip/spl-boot-order.c | 3 +++ configs/rock5b-rk3588_defconfig | 18 +++--- drivers/usb/dwc3/core.c | 32 +++-- drivers/usb/dwc3/gadget.c | 20 +++- drivers/usb/dwc3/gadget.h | 14 +++ include/configs/rk3588_common.h | 9 ++- include/configs/rockchip-common.h | 4 9 files changed, 76 insertions(+), 31 deletions(-) -- 2.34.1
[PATCH] ARM: mach-rockchip: rk3588: fix stray CONFIG line in Kconfig
This duplicate/stray line was probably added during a rebase.
Remove it
Fixes: 0a3a5746c385 ("board: rockchip: Add Edgeble Neural Compute Module 6B")
Signed-off-by: Eugen Hristev
---
arch/arm/mach-rockchip/rk3588/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig
b/arch/arm/mach-rockchip/rk3588/Kconfig
index d72ef92f2efd..6daf86bfe855 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -28,7 +28,6 @@ config TARGET_RK3588_NEU6
IO board and Neu6a needs to mount on top of this IO board in order to
create complete Edgeble Neural Compute Module 6B(Neu6B) IO platform.
-config TARGET_ROCK5B_RK3588
config TARGET_ROCK5B_RK3588
bool "Radxa ROCK5B RK3588 board"
select BOARD_LATE_INIT
--
2.34.1
[PATCH v5 1/3] phy: at91: Add support for the USB 2.0 PHY's of SAMA7
From: Sergiu Moga
In order to have USB functionality, drivers for SAMA7's
USB 2.0 PHY's have been added. There is one driver
for UTMI clock's SFR and RESET required functionalities and
one for its three possible subclocks of the phy's themselves.
In order for this layout to properly work in conjunction with
CCF and DT, the former driver will also act as a clock provider
for the three phy's with the help of a custom hook into the
driver's of_xlate method.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
Reviewed-by: Marek Vasut
---
v1 -> v2:
- use *_bulk API's
v2 -> v3:
- use if (CONFIG_IS_ENABLED(...))
v3->v4:
- none
v4->v5
- add Rb Marek
drivers/phy/Kconfig | 10 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-sama7-usb.c | 90 +
drivers/phy/phy-sama7-utmi-clk.c | 216 +++
4 files changed, 317 insertions(+)
create mode 100644 drivers/phy/phy-sama7-usb.c
create mode 100644 drivers/phy/phy-sama7-utmi-clk.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 7a2d54f71d21..999f9793fa3f 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -281,6 +281,16 @@ config PHY_XILINX_ZYNQMP
Enable this to support ZynqMP High Speed Gigabit Transceiver
that is part of ZynqMP SoC.
+config PHY_MICROCHIP_SAMA7_USB
+ tristate "Microchip SAMA7 USB 2.0 PHY"
+ depends on PHY && ARCH_AT91
+ help
+Enable this to support SAMA7 USB 2.0 PHY.
+
+The USB 2.0 PHY integrates high-speed, full-speed and low-speed
+termination and signal switching. With a single resistor, it
+requires minimal external components.
+
source "drivers/phy/rockchip/Kconfig"
source "drivers/phy/cadence/Kconfig"
source "drivers/phy/ti/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index aca365d219c4..0b609768774a 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o
+obj-$(CONFIG_PHY_MICROCHIP_SAMA7_USB) += phy-sama7-utmi-clk.o phy-sama7-usb.o
obj-y += cadence/
obj-y += ti/
obj-y += qcom/
diff --git a/drivers/phy/phy-sama7-usb.c b/drivers/phy/phy-sama7-usb.c
new file mode 100644
index ..200324d81281
--- /dev/null
+++ b/drivers/phy/phy-sama7-usb.c
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip USB PHY's.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct sama7_usb_phy {
+ struct clk *uclk;
+ struct regmap *sfr;
+ int port;
+};
+
+static int sama7_usb_phy_init(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+ int port = sama7_phy->port;
+
+ regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+ SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X,
+ SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X);
+
+ regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+ SAMA7_SFR_UTMI_RX_VBUS,
+ SAMA7_SFR_UTMI_RX_VBUS);
+
+ return 0;
+}
+
+static int sama7_phy_power_on(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+ clk_prepare_enable(sama7_phy->uclk);
+
+ return 0;
+}
+
+static int sama7_phy_power_off(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+ clk_disable_unprepare(sama7_phy->uclk);
+
+ return 0;
+}
+
+static int sama7_usb_phy_probe(struct udevice *dev)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(dev);
+
+ sama7_phy->uclk = devm_clk_get(dev, "utmi_clk");
+ if (IS_ERR(sama7_phy->uclk))
+ return PTR_ERR(sama7_phy->uclk);
+
+ sama7_phy->sfr = syscon_regmap_lookup_by_phandle(dev, "sfr-phandle");
+ if (IS_ERR(sama7_phy->sfr))
+ return PTR_ERR(sama7_phy->sfr);
+
+ return dev_read_u32(dev, "reg", _phy->port);
+}
+
+static const struct phy_ops sama7_usb_phy_ops = {
+ .init = sama7_usb_phy_init,
+ .power_on = sama7_phy_power_on,
+ .power_off = sama7_phy_power_off,
+};
+
+static const struct udevice_id sama7_usb_phy_of_match[] = {
+ { .compatible = "microchip,sama7g5-usb-phy", },
+ { },
+};
+
+U_BOOT_DRIVER(sama7_usb_phy_driver) = {
+ .name = "sama7-usb-phy",
+ .id = UCLASS_PHY,
+ .of_match = sama7_usb_phy_of_match,
+ .ops = _usb_phy_ops,
+ .probe = sama7_usb_phy_probe,
+ .priv_auto = sizeof(struct sama7_usb_phy),
+};
diff --git a/drivers/phy/phy-sama7-utmi-clk.c b/drivers/phy/phy-sama7-utmi-clk.c
new file mode 100644
index ..2371b4341cd5
--- /dev/null
+++
[PATCH v5 3/3] usb: ohci-at91: Add USB PHY functionality
From: Sergiu Moga
Add the ability to enable/disable whatever USB PHY's are
passed to the AT91 OHCI driver through DT.
Signed-off-by: Sergiu Moga
[eugen.hris...@collabora.com: rewrite error paths according to Marek's review]
Signed-off-by: Eugen Hristev
---
v1 -> v2:
- use *_bulk API's
v2 -> v3:
- use if (CONFIG_IS_ENABLED(...))
v3 -> v4
[eugen.hris...@collabora.com: disable PHYs in at91_start_clock if
clk_enable_bulk fails]
v4->v5:
[eugen.hris...@collabora.com: rewrite error paths according to Marek's review]
drivers/usb/host/ohci-at91.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 92d0ab7184c4..4f4689745896 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -73,6 +73,7 @@ int usb_cpu_init_fail(void)
#include
#include
#include "ohci.h"
+#include
#define AT91_MAX_USBH_PORTS3
@@ -90,15 +91,36 @@ struct at91_usbh_data {
struct ohci_at91_priv {
ohci_t ohci;
struct clk_bulk clks;
+ struct phy_bulk phys;
};
static int at91_start_clock(struct ohci_at91_priv *ohci_at91)
{
- return clk_enable_bulk(_at91->clks);
+ int ret;
+
+ if (CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)) {
+ ret = generic_phy_power_on_bulk(_at91->phys);
+ if (ret)
+ return ret;
+ }
+
+ ret = clk_enable_bulk(_at91->clks);
+ if (ret)
+ goto at91_start_clock_err;
+
+ return 0;
+
+at91_start_clock_err:
+ generic_phy_power_off_bulk(_at91->phys);
+
+ return ret;
}
static int at91_stop_clock(struct ohci_at91_priv *ohci_at91)
{
+ if (CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB))
+ generic_phy_power_off_bulk(_at91->phys);
+
return clk_disable_bulk(_at91->clks);
}
@@ -185,6 +207,16 @@ static int ohci_atmel_probe(struct udevice *dev)
if (ret)
goto fail;
+ if (CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)) {
+ ret = generic_phy_get_bulk(dev, _at91->phys);
+ if (ret)
+ goto fail;
+
+ ret = generic_phy_init_bulk(_at91->phys);
+ if (ret)
+ goto fail;
+ }
+
ret = at91_start_hc(dev);
if (ret)
goto fail;
--
2.34.1
[PATCH v5 2/3] usb: ohci-at91: Enable OHCI functionality and register into DM
From: Sergiu Moga
Register the OHCI driver into DM by properly initializing the required
clocks and pins required by the DT node of OHCI. In order for the VBUS
to stay enabled, a `child_pre_probe` method has been added to overcome
the DM core disabling it in `usb_scan_device`: when the generic
`device_probe` method is called, the pinctrl is processed once again,
undoing whatever changes have been made in our driver's probe method.
Furthermore, enable CONFIG_DM_GPIO whenever this driver and CONFIG_DM_USB
are selected.
Signed-off-by: Sergiu Moga
Reviewed-by: Marek Vasut
---
v1 -> v2:
- squashed 3/4 into this patch
- removed bool clocked
- use *_blk API's
- select DM_GPIO in Kconfig if DM_USB enabled
- use dev_read_u32_default
v2 -> v3:
- check value of dev_read_addr
- clk_disable in case of failure after at91_start_hc
v3->v4:
none
v4->v5:
add Rb Marek
drivers/usb/host/Kconfig | 1 +
drivers/usb/host/ohci-at91.c | 159 +++
2 files changed, 160 insertions(+)
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 1a883babf4c2..e9551a74bb23 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -437,6 +437,7 @@ config USB_ATMEL
depends on ARCH_AT91
select SYS_USB_OHCI_CPU_INIT
select USB_OHCI_NEW
+ select DM_GPIO if DM_USB
choice
prompt "Clock for OHCI"
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 9b955c1bd678..92d0ab7184c4 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -5,6 +5,9 @@
*/
#include
+
+#if !(CONFIG_IS_ENABLED(DM_USB))
+
#include
int usb_cpu_init(void)
@@ -62,3 +65,159 @@ int usb_cpu_init_fail(void)
{
return usb_cpu_stop();
}
+
+#else
+
+#include
+#include
+#include
+#include
+#include "ohci.h"
+
+#define AT91_MAX_USBH_PORTS3
+
+#define at91_for_each_port(index, ports)
\
+ for ((index) = 0;
\
+(index) < min_t(u32, AT91_MAX_USBH_PORTS, (ports));
\
+(index)++)
+
+struct at91_usbh_data {
+ enum usb_init_type init_type;
+ struct gpio_desc vbus_pin[AT91_MAX_USBH_PORTS];
+ u32 ports; /* number of ports on root hub
*/
+};
+
+struct ohci_at91_priv {
+ ohci_t ohci;
+ struct clk_bulk clks;
+};
+
+static int at91_start_clock(struct ohci_at91_priv *ohci_at91)
+{
+ return clk_enable_bulk(_at91->clks);
+}
+
+static int at91_stop_clock(struct ohci_at91_priv *ohci_at91)
+{
+ return clk_disable_bulk(_at91->clks);
+}
+
+static void ohci_at91_set_power(struct at91_usbh_data *pdata, int port,
+ bool enable)
+{
+ if (!dm_gpio_is_valid(>vbus_pin[port]))
+ return;
+
+ if (enable)
+ dm_gpio_set_dir_flags(>vbus_pin[port],
+ GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+ else
+ dm_gpio_set_dir_flags(>vbus_pin[port], 0);
+}
+
+static int at91_start_hc(struct udevice *dev)
+{
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+ return at91_start_clock(ohci_at91);
+}
+
+static int at91_stop_hc(struct udevice *dev)
+{
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+ return at91_stop_clock(ohci_at91);
+}
+
+static int ohci_atmel_deregister(struct udevice *dev)
+{
+ struct at91_usbh_data *pdata = dev_get_plat(dev);
+ int ret, i;
+
+ ret = at91_stop_hc(dev);
+ if (ret)
+ return ret;
+
+ at91_for_each_port(i, pdata->ports)
+ ohci_at91_set_power(pdata, i, false);
+
+ return ohci_deregister(dev);
+}
+
+static int ohci_atmel_child_pre_probe(struct udevice *dev)
+{
+ struct udevice *ohci_controller = dev_get_parent(dev);
+ struct at91_usbh_data *pdata = dev_get_plat(ohci_controller);
+ int i;
+
+ at91_for_each_port(i, pdata->ports)
+ ohci_at91_set_power(pdata, i, true);
+
+ return 0;
+}
+
+static int ohci_atmel_probe(struct udevice *dev)
+{
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+ struct at91_usbh_data *pdata = dev_get_plat(dev);
+ struct ohci_regs *regs;
+ int ret;
+ u32 i;
+
+ regs = (struct ohci_regs *)dev_read_addr(dev);
+ if (IS_ERR(regs)) {
+ ret = PTR_ERR(regs);
+ goto fail;
+ }
+
+ pdata->ports = dev_read_u32_default(dev, "num-ports", 3);
+
+ at91_for_each_port(i, pdata->ports)
+ gpio_request_by_name(dev, "atmel,vbus-gpio", i,
+>vbus_pin[i], GPIOD_IS_OUT |
+GPIOD_IS_OUT_ACTIVE);
+
+ ret = clk_get_bulk(dev, _at91->clks);
+ if (ret)
+ goto fail;
+
+ ret = clk_enable_bulk(_at91->clks);
+ if (ret)
+
[PULL] u-boot-at91-fixes-2023.10-a
Hello Tom, Please pull tag u-boot-at91-fixes-2023.10-a , the first set of fixes for 2023.10 cycle. This small fixes set includes the LTO configs for the boards that had the SPL size up to the limit (sama5d2-based), such that more code can be added. It also includes a fix for mmc non-removable. Thanks, Eugen The following changes since commit 247aa5a191159ea7e03bf1918e22fbbb784cd410: Merge branch '2023-07-21-assorted-TI-platform-updates' (2023-07-21 19:33:05 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-at91.git tags/u-boot-at91-fixes-2023.10-a for you to fetch changes up to e83b6f99fc512acda05691db35e7d83817eac0b9: atmel_sdhci: Force card-detect if MMC_CAP_NONREMOVABLE. (2023-07-24 14:21:00 +0300) First set of u-boot-atmel fixes for the 2023.07 cycle Eugen Hristev (1): configs: sama5d2: enable CONFIG_LTO Stefan Roese (1): configs: at91: sama5d2_icp_mmc: Enable CONFIG_LTO Zixun LI (1): atmel_sdhci: Force card-detect if MMC_CAP_NONREMOVABLE. configs/sama5d2_icp_mmc_defconfig| 1 + configs/sama5d2_xplained_emmc_defconfig | 1 + configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_qspiflash_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + drivers/mmc/atmel_sdhci.c| 39 +-- 6 files changed, 42 insertions(+), 2 deletions(-)
Re: [PATCH v2] atmel_sdhci: Force card-detect if MMC_CAP_NONREMOVABLE.
On 5/17/23 16:49, Zixun LI wrote: If the device attached to the MMC bus is not removable, set force card-detect bit to bypass card detection procedure, so card detection pin can be used for other purposes. It's also a workaround for SAMA5D2 who doesn't drive CMD if using GPIO for card detection. Signed-off-by: Zixun LI --- Applied to u-boot-at91/master, thanks ! Reviewed-by: Eugen Hristev
Re: [PATCH] configs: sama5d2: enable CONFIG_LTO
On 7/24/23 13:29, mihai.s...@microchip.com wrote: Hello Eugen, I have successfully tested the binary on sama5d2_xplained board. Board is booting OK the zImage from fat (eMMC). Tested-by: Mihai Sain Best regards, Mihai Sain Thank you for testing, applied to u-boot-at91/master
Re: [PATCH] configs: sama5d2: enable CONFIG_LTO
On 7/24/23 13:29, mihai.s...@microchip.com wrote: Tested-by: Mihai Sain Applied to u-boot-at91/master, thanks !
Re: [PATCH] configs: at91: sama5d2_icp_mmc: Enable CONFIG_LTO
On 4/27/23 11:59, Stefan Roese wrote: Adding just a tiny bit more code for sama5d2_icp_mmc leads to a SRAM image overflow. Fix this by enabling LTO for this board, so that such changes still can be made to the common U-Boot code. Signed-off-by: Stefan Roese Cc: Tudor Ambarus Cc: Eugen Hristev Cc: Sergiu Moga Cc: Pali Rohár --- configs/sama5d2_icp_mmc_defconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index e1b602d8e5ec..a3c57a3f1250 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -9,9 +9,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 +CONFIG_SF_DEFAULT_SPEED=6600 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -24,6 +26,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x2200 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y @@ -86,7 +89,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=2 -CONFIG_SF_DEFAULT_SPEED=6600 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_MACRONIX=y @@ -110,5 +112,4 @@ CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_ATMEL_TCB_TIMER=y CONFIG_SPL_ATMEL_TCB_TIMER=y -CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER_HII is not set Mihai (added to the thread) tested this patch on sama5d2_icp. Mihai, can you add your Tested-by tag then? This is the original LTO patch for sama5d2_icp that we discussed about. Thanks, Eugen
[PATCH] configs: sama5d2: enable CONFIG_LTO
arm-none-linux-gnueabihf-ld.bfd: u-boot-spl section `__u_boot_list' will not fit in region `.sram' arm-none-linux-gnueabihf-ld.bfd: region `.sram' overflowed by 100 bytes SPL is at limit so to stop seeing above error in built, enable link time optimizations CONFIG_LTO. Signed-off-by: Eugen Hristev --- Hello Mihai, Can you please test also this patch, that sama5d2_xplained boots correctly ? With the current tree, sama5d2_xplained configs no longer build as the SPL is overflown. Thanks ! Eugen configs/sama5d2_xplained_emmc_defconfig | 1 + configs/sama5d2_xplained_mmc_defconfig | 1 + configs/sama5d2_xplained_qspiflash_defconfig | 1 + configs/sama5d2_xplained_spiflash_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index e33dcb8fb80a..9ef0ff4aa9a7 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x2200 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index acd75174f7d6..aed9edafdf70 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x2200 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 6346e5315bf1..c9a20723f5a1 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x2200 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_QSPI_BOOT=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 76fa56ebeb53..c01a0c4cc7c8 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x2200 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SPI_BOOT=y -- 2.34.1
Re: [u-boot][PATCH] board: at91: sama5d29_curiosity: add initial support for sama5d29_curiosity
On 7/24/23 11:49, mihai.s...@microchip.com wrote: Hello Eugen, Thank you for applying the patch. For this board we don't want to use SPL. I will send v2 patch to remove the custom prompt. Thanks. As I said, I won't be applying any patches to at91 tree unless someone helps with the testing below. SPL for this board has nothing to do with my request. These also have to be removed: + +#define CONFIG_SYS_SDRAM_BASE 0x2000 +#define CONFIG_SYS_SDRAM_SIZE 0x2000 as they are forbidden to set in the config file and appear to be unused anyway. Eugen Best regards, Mihai Sain -Original Message- From: Eugen Hristev Sent: Monday, July 24, 2023 11:13 AM To: Mihai Sain - M19926 ; u-boot@lists.denx.de Cc: Cristian Birsan - M91496 Subject: Re: [u-boot][PATCH] board: at91: sama5d29_curiosity: add initial support for sama5d29_curiosity EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Hello Mihai, Thank you for the patch. However, the at91 maintainer tree nowadays has a big problem, I cannot apply patches because the size of the SPL will overflow. There is a pending patch that fixes it, but it has not been tested. Here you can help, and test this integration branch (at least on sama5d2 ICP, but if you can test on multiple boards, it's even better) : https://source.denx.de/u-boot/custodians/u-boot-at91/-/tree/testing?ref_type=heads Once this is tested you can reply with a Tested-by: tag, and we can move along. Without testing the patch that fixes the size restraint (it's the CONFIG_LTO patch), the tree is stalled. One small nitpick below, and I am looking forward for your reply, Eugen On 7/20/23 10:54, Mihai Sain wrote: Add initial support for sama5d29_curiosity board. Hardware: SoC: SAMA5D29 500 MHz DRAM: LPDDR2 512 MiB PMIC: MCP16502 Debug: UART0 Flash: QSPI NOR 8 MiB RGB LCD connector Mikrobus connectors x 2 SD-Card connectors x 2 USB 2.0 x 2 Signed-off-by: Mihai Sain --- +CONFIG_SYS_PROMPT="[root@sama5d29 ~]$ " Can you remove this. It looks like a Linux prompt and might be confusing for people (and everywhere below)
Re: [u-boot][PATCH] board: at91: sama5d29_curiosity: add initial support for sama5d29_curiosity
Hello Mihai, Thank you for the patch. However, the at91 maintainer tree nowadays has a big problem, I cannot apply patches because the size of the SPL will overflow. There is a pending patch that fixes it, but it has not been tested. Here you can help, and test this integration branch (at least on sama5d2 ICP, but if you can test on multiple boards, it's even better) : https://source.denx.de/u-boot/custodians/u-boot-at91/-/tree/testing?ref_type=heads Once this is tested you can reply with a Tested-by: tag, and we can move along. Without testing the patch that fixes the size restraint (it's the CONFIG_LTO patch), the tree is stalled. One small nitpick below, and I am looking forward for your reply, Eugen On 7/20/23 10:54, Mihai Sain wrote: Add initial support for sama5d29_curiosity board. Hardware: SoC: SAMA5D29 500 MHz DRAM: LPDDR2 512 MiB PMIC: MCP16502 Debug: UART0 Flash: QSPI NOR 8 MiB RGB LCD connector Mikrobus connectors x 2 SD-Card connectors x 2 USB 2.0 x 2 Signed-off-by: Mihai Sain --- +CONFIG_SYS_PROMPT="[root@sama5d29 ~]$ " Can you remove this. It looks like a Linux prompt and might be confusing for people (and everywhere below)
Re: [PATCH 2/2] configs: rock5b-rk3588: add rtl8169 driver
On 5/17/23 13:46, Eugen Hristev wrote: On 5/15/23 16:16, Tom Rini wrote: On Mon, May 15, 2023 at 03:57:14PM +0300, Eugen Hristev wrote: On 5/15/23 15:52, Tom Rini wrote: On Mon, May 15, 2023 at 03:36:24PM +0300, Eugen Hristev wrote: On 5/6/23 01:03, Tom Rini wrote: On Tue, Apr 25, 2023 at 04:06:59PM +0300, Eugen Hristev wrote: Add the rtl8169 driver, which supports the rtl8125b device, which is connected on the pciE bus on this board. Enable also CONFIG_SYS_HAS_NONCACHED_MEMORY to have the descriptors stored. Signed-off-by: Eugen Hristev --- configs/rock5b-rk3588_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index a14fcd2ee924..bfa48227aee2 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=2400 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00a0 @@ -71,6 +72,7 @@ CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_ETH_DESIGNWARE=y +CONFIG_RTL8169=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y Does this depend on some series I missed where PCI is enabled on this config? Hi Tom, the network device is connected on PCI express, that is right. I have a separate series for that. However, the network driver itself and the enabling of the network driver is somewhat independent, so I sent it as a separate series (this one ) I think the config patch can go through rockchip custodian tree. With 1/2 now applied this results in failure to build due to DM_PCI not being enabled. This is most strange. 1/2 are just changes in the driver. How does that cause a build failure ? The driver is not even selected for this config in 2/2, before the actual patch. Do you have the log of the failure so I can have a look ? I don't have the log handy right now, please re-test the config changes on top of master and repost. Hi Tom, I figured out the issue. My patch is indeed based on another patch that selects CONFIG_PCI. However, the rtl8169 driver depends on PCI, even if it does not have 'depends on PCI' in the Kconfig. So selecting it without PCI, well, the error. So I sent another patch : https://patchwork.ozlabs.org/project/uboot/patch/20230517104124.111075-1-eugen.hris...@collabora.com/ ... that should have the rtl8169 depend on PCI now. That being said, this current patch can be applied on kever's rockchip master branch on top of PCI series, but if it's to be applied on master, it should work on top of the 'rtl8169 depends on PCI' patch now. I hope it makes sense. Thanks Hi Kever, Maybe you somehow missed this patch ? The prerequisites(PCI series, driver, and PCI dependency for the driver are already in tree) Thanks, Eugen
Re: [PATCH 1/2] arm64: dts: rockchip: Sync DT from linux-next
On 7/18/23 10:44, Jagan Teki wrote:
On Tue, 18 Jul 2023 at 02:36, Eugen Hristev wrote:
On 7/17/23 18:42, Jagan Teki wrote:
Sync the linux-next from below commit,
commit <1642bf66e270> ("arm64: dts: rockchip: add USB2 to
rk3588s-rock5a")
Also rops the duplicate usb nodes from rk3588s-u-boot.dtsi
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 1 -
arch/arm/dts/rk3588-edgeble-neu6b-io.dts | 66 +++
arch/arm/dts/rk3588-edgeble-neu6b.dtsi | 359 ++-
arch/arm/dts/rk3588-evb1-v10.dts | 720 ++-
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 13 -
arch/arm/dts/rk3588-rock-5b.dts | 578 +-
arch/arm/dts/rk3588.dtsi | 112
arch/arm/dts/rk3588s-u-boot.dtsi | 119
arch/arm/dts/rk3588s.dtsi| 499 +++-
include/dt-bindings/ata/ahci.h | 20 +
10 files changed, 2346 insertions(+), 141 deletions(-)
create mode 100644 include/dt-bindings/ata/ahci.h
[...]
};
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index c703e41802..f8c10227b0 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -13,103 +13,12 @@
status = "okay";
};
- usb_host0_ehci: usb@fc80 {
- compatible = "generic-ehci";
- reg = <0x0 0xfc80 0x0 0x4>;
- interrupts = ;
- clocks = < HCLK_HOST0>, < HCLK_HOST_ARB0>;
- clock-names = "usbhost", "arbiter";
- power-domains = < RK3588_PD_USB>;
- status = "disabled";
- };
No, this has to stay, the new nodes in kernel break usb2 on rk3588
platforms in U-boot.
In u-boot, the PHY is not a clock provider. Hence the breakage.
Only when the PHY becomes a clock provider you can remove these nodes here.
Not really, clock provider in PHY driver is already fixed in Mainline.
Here is the ROCK5B test.
U-Boot 2023.07-00367-g43479b8a69 (Jul 18 2023 - 13:10:42 +0530)
Model: Radxa ROCK 5 Model B
DRAM: 16 GiB (effective 15.7 GiB)
Core: 305 devices, 27 uclasses, devicetree: separate
MMC: mmc@fe2c: 1, mmc@fe2e: 0
Loading Environment from nowhere... OK
In:serial@feb5
Out: serial@feb5
Err: serial@feb5
Model: Radxa ROCK 5 Model B
Net: No ethernet found.
Hit any key to stop autoboot: 0
=> usb start
starting USB...
Bus usb@fc80: USB EHCI 1.00
Bus usb@fc84: USB OHCI 1.0
Bus usb@fc88: USB EHCI 1.00
Bus usb@fc8c: USB OHCI 1.0
scanning bus usb@fc80 for devices... 4 USB Device(s) found
scanning bus usb@fc84 for devices... 1 USB Device(s) found
scanning bus usb@fc88 for devices... 1 USB Device(s) found
scanning bus usb@fc8c for devices... 1 USB Device(s) found
scanning usb for storage devices... 2 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Hub (480 Mb/s, 100mA)
| USB 2.0 Hub
|
+-3 Mass Storage (480 Mb/s, 100mA)
|SMI Corporation USB DISK AA0401297464
|
+-4 Mass Storage (480 Mb/s, 224mA)
SanDisk Dual Drive 040130e3ee554b7078843f4eb331646
1 Hub (12 Mb/s, 0mA)
U-Boot Root Hub
1 Hub (480 Mb/s, 0mA)
u-boot EHCI Host Controller
1 Hub (12 Mb/s, 0mA)
U-Boot Root Hub
Thanks,
Jagan.
Oh, this is neat. I will try it out, and let you know if I see any issues.
Thanks
Re: [PATCH v1 1/4] power: regulator: expand basic reference counter onto all uclass
Hi Svyatoslav,
On 7/18/23 10:05, Svyatoslav Ryhel wrote:
Commit is based on 4fcba5d ("regulator: implement basic reference
counter") but expands the idea to all regulators instead of just
fixed/gpio regulators.
Signed-off-by: Svyatoslav Ryhel
---
drivers/power/regulator/regulator-uclass.c | 22 ++
drivers/power/regulator/regulator_common.c | 22 --
drivers/power/regulator/regulator_common.h | 21 -
include/power/regulator.h | 2 ++
4 files changed, 24 insertions(+), 43 deletions(-)
diff --git a/drivers/power/regulator/regulator-uclass.c
b/drivers/power/regulator/regulator-uclass.c
index 3a6ba69f6d..c9194fe95c 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -172,6 +172,23 @@ int regulator_set_enable(struct udevice *dev, bool enable)
if (!enable && uc_pdata->always_on)
return -EACCES;
+ /* If previously enabled, increase count */
+ if (enable && uc_pdata->enable_count > 0) {
+ uc_pdata->enable_count++;
+ return -EALREADY;
+ }
+
+ if (!enable) {
+ if (uc_pdata->enable_count > 1) {
+ /* If enabled multiple times, decrease count */
+ uc_pdata->enable_count--;
+ return -EBUSY;
+ } else if (!uc_pdata->enable_count) {
+ /* If already disabled, do nothing */
+ return -EALREADY;
+ }
+ }
+
if (uc_pdata->ramp_delay)
old_enable = regulator_get_enable(dev);
@@ -187,6 +204,11 @@ int regulator_set_enable(struct udevice *dev, bool enable)
}
}
+ if (enable)
+ uc_pdata->enable_count++;
+ else
+ uc_pdata->enable_count--;
+
return ret;
}
diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c
index e26f5ebec3..d88bc6f6de 100644
--- a/drivers/power/regulator/regulator_common.c
+++ b/drivers/power/regulator/regulator_common.c
@@ -72,23 +72,6 @@ int regulator_common_set_enable(const struct udevice *dev,
return 0;
}
- /* If previously enabled, increase count */
- if (enable && plat->enable_count > 0) {
- plat->enable_count++;
- return -EALREADY;
- }
-
- if (!enable) {
- if (plat->enable_count > 1) {
- /* If enabled multiple times, decrease count */
- plat->enable_count--;
- return -EBUSY;
- } else if (!plat->enable_count) {
- /* If already disabled, do nothing */
- return -EALREADY;
- }
- }
-
ret = dm_gpio_set_value(>gpio, enable);
if (ret) {
pr_err("Can't set regulator : %s gpio to: %d\n", dev->name,
@@ -103,10 +86,5 @@ int regulator_common_set_enable(const struct udevice *dev,
if (!enable && plat->off_on_delay_us)
udelay(plat->off_on_delay_us);
- if (enable)
- plat->enable_count++;
- else
- plat->enable_count--;
-
return 0;
}
diff --git a/drivers/power/regulator/regulator_common.h
b/drivers/power/regulator/regulator_common.h
index d4962899d8..15f1fa4c93 100644
--- a/drivers/power/regulator/regulator_common.h
+++ b/drivers/power/regulator/regulator_common.h
@@ -13,7 +13,6 @@ struct regulator_common_plat {
struct gpio_desc gpio; /* GPIO for regulator enable control */
unsigned int startup_delay_us;
unsigned int off_on_delay_us;
- unsigned int enable_count;
};
int regulator_common_of_to_plat(struct udevice *dev,
@@ -21,26 +20,6 @@ int regulator_common_of_to_plat(struct udevice *dev,
char *enable_gpio_name);
int regulator_common_get_enable(const struct udevice *dev,
struct regulator_common_plat *plat);
-/*
- * Enable or Disable a regulator
- *
- * This is a reentrant function and subsequent calls that enable will
- * increase an internal counter, and disable calls will decrease the counter.
- * The actual resource will be enabled when the counter gets to 1 coming from
0,
- * and disabled when it reaches 0 coming from 1.
- *
- * @dev: regulator device
- * @plat: Platform data
- * @enable: bool indicating whether to enable or disable the regulator
- * @return:
- * 0 on Success
- * -EBUSY if the regulator cannot be disabled because it's requested by
- *another device
- * -EALREADY if the regulator has already been enabled or has already been
- *disabled
- * -EACCES if there is no possibility to enable/disable the regulator
- * -ve on different error situation
- */
Can't this whole documentation that you are removing be in fact
integrated into the documentation for the function you
Re: [PATCH 1/2] arm64: dts: rockchip: Sync DT from linux-next
On 7/17/23 18:42, Jagan Teki wrote:
Sync the linux-next from below commit,
commit <1642bf66e270> ("arm64: dts: rockchip: add USB2 to
rk3588s-rock5a")
Also rops the duplicate usb nodes from rk3588s-u-boot.dtsi
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 1 -
arch/arm/dts/rk3588-edgeble-neu6b-io.dts | 66 +++
arch/arm/dts/rk3588-edgeble-neu6b.dtsi | 359 ++-
arch/arm/dts/rk3588-evb1-v10.dts | 720 ++-
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 13 -
arch/arm/dts/rk3588-rock-5b.dts | 578 +-
arch/arm/dts/rk3588.dtsi | 112
arch/arm/dts/rk3588s-u-boot.dtsi | 119
arch/arm/dts/rk3588s.dtsi| 499 +++-
include/dt-bindings/ata/ahci.h | 20 +
10 files changed, 2346 insertions(+), 141 deletions(-)
create mode 100644 include/dt-bindings/ata/ahci.h
[...]
};
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index c703e41802..f8c10227b0 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -13,103 +13,12 @@
status = "okay";
};
- usb_host0_ehci: usb@fc80 {
- compatible = "generic-ehci";
- reg = <0x0 0xfc80 0x0 0x4>;
- interrupts = ;
- clocks = < HCLK_HOST0>, < HCLK_HOST_ARB0>;
- clock-names = "usbhost", "arbiter";
- power-domains = < RK3588_PD_USB>;
- status = "disabled";
- };
No, this has to stay, the new nodes in kernel break usb2 on rk3588
platforms in U-boot.
In u-boot, the PHY is not a clock provider. Hence the breakage.
Only when the PHY becomes a clock provider you can remove these nodes here.
Check below the difference which I highlighted:
-
- usb_host0_ohci: usb@fc84 {
- compatible = "generic-ohci";
- reg = <0x0 0xfc84 0x0 0x4>;
- interrupts = ;
- clocks = < HCLK_HOST0>, < HCLK_HOST_ARB0>;
- clock-names = "usbhost", "arbiter";
- power-domains = < RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host1_ehci: usb@fc88 {
- compatible = "generic-ehci";
- reg = <0x0 0xfc88 0x0 0x4>;
- interrupts = ;
- clocks = < HCLK_HOST1>, < HCLK_HOST_ARB1>;
- clock-names = "usbhost", "arbiter";
- power-domains = < RK3588_PD_USB>;
- status = "disabled";
- };
-
- usb_host1_ohci: usb@fc8c {
- compatible = "generic-ohci";
- reg = <0x0 0xfc8c 0x0 0x4>;
- interrupts = ;
- clocks = < HCLK_HOST1>, < HCLK_HOST_ARB1>;
- clock-names = "usbhost", "arbiter";
- power-domains = < RK3588_PD_USB>;
- status = "disabled";
- };
-
pmu1_grf: syscon@fd58a000 {
bootph-all;
compatible = "rockchip,rk3588-pmu1-grf", "syscon";
reg = <0x0 0xfd58a000 0x0 0x2000>;
};
- pipe_phy0_grf: syscon@fd5bc000 {
- compatible = "rockchip,pipe-phy-grf", "syscon";
- reg = <0x0 0xfd5bc000 0x0 0x100>;
- };
-
- usb2phy2_grf: syscon@fd5d8000 {
- compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
-"simple-mfd";
- reg = <0x0 0xfd5d8000 0x0 0x4000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- u2phy2: usb2-phy@8000 {
- compatible = "rockchip,rk3588-usb2phy";
- reg = <0x8000 0x10>;
- interrupts = ;
- clocks = < CLK_USB2PHY_HDPTXRXPHY_REF>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- status = "disabled";
-
- u2phy2_host: host-port {
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- usb2phy3_grf: syscon@fd5dc000 {
- compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
-"simple-mfd";
- reg = <0x0 0xfd5dc000 0x0 0x4000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- u2phy3: usb2-phy@c000 {
- compatible = "rockchip,rk3588-usb2phy";
- reg = <0xc000 0x10>;
- interrupts = ;
- clocks = < CLK_USB2PHY_HDPTXRXPHY_REF>;
- clock-names = "phyclk";
- #clock-cells = <0>;
- status = "disabled";
-
- u2phy3_host: host-port {
-
[PATCH v3] fpga: add inline stub for fpga_load
In case CC_OPTIMIZE_FOR_DEBUG is set, unused code will not be optimized out,
hence the reference to fpga_load will be compiled.
if DM_FPGA and SPL_FPGA are not set, the build will fail with :
aarch64-none-linux-gnu-ld.bfd: common/spl/spl_fit.o: in function
`spl_fit_upload_fpga':
u-boot/common/spl/spl_fit.c:595: undefined reference to `fpga_load'
To solve this, added an inline empty stub in the header if
CC_OPTIMIZE_FOR_DEBUG is set such that the build will succeed.
Signed-off-by: Eugen Hristev
---
Changes in v3:
- return -ENOSYS
Changes in v2:
- this is a rework as suggested by Simon of this previous patch :
https://patchwork.ozlabs.org/project/uboot/patch/20230619102839.277902-1-eugen.hris...@collabora.com/
include/fpga.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/fpga.h b/include/fpga.h
index ed688cc0fa3b..33d0dbbe2ba4 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -60,8 +60,17 @@ int fpga_add(fpga_type devtype, void *desc);
int fpga_count(void);
const fpga_desc *const fpga_get_desc(int devnum);
int fpga_is_partial_data(int devnum, size_t img_len);
+#if defined(CONFIG_CC_OPTIMIZE_FOR_DEBUG)
+static inline int fpga_load(int devnum, const void *buf, size_t bsize,
+ bitstream_type bstype, int flags)
+{
+ return -ENOSYS;
+}
+#else
int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype, int flags);
+#endif
+
int fpga_fsload(int devnum, const void *buf, size_t size,
fpga_fs_info *fpga_fsinfo);
int fpga_loads(int devnum, const void *buf, size_t size,
--
2.34.1
[PATCH] MAINTAINERS: correct at91 tree link
This was not done when the tree name was changed, fix it now. Signed-off-by: Eugen Hristev --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index d724b6467344..2477923a5201 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -409,7 +409,7 @@ F: configs/uDPU_defconfig ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained -T: git https://source.denx.de/u-boot/custodians/u-boot-atmel.git +T: git https://source.denx.de/u-boot/custodians/u-boot-at91.git F: arch/arm/mach-at91/ F: board/atmel/ F: drivers/cpu/at91_cpu.c -- 2.34.1
Re: [PATCH 2/5] ARM: dts: at91: sam9x60-curiosity: Fix EEPROM type
On 7/6/23 11:06, Eugen Hristev wrote:
On 7/5/23 23:16, Alexander Dahl wrote:
From: Alexander Dahl
The user guide says it's a Microchip 24AA025E48 serial EEPROM, which is
a 2-Kbit I2C Serial EEPROM with EUI-48™ Identity. This is the chip
actually populated on board EV40E67A rev 4.
Signed-off-by: Alexander Dahl
---
Notes:
Sadly this did not fix the problem, that I could not access that
eeprom through I²C.
arch/arm/dts/at91-sam9x60_curiosity.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index d6ae3d648d..da5e19b66b 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -31,7 +31,7 @@
status = "okay";
eeprom@53 {
- compatible = "atmel,24c32";
+ compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
Hello Alexander,
Thank you for the patch.
I remember I tested this a while back and I remember that the 24c32
compatible is not correct for this eeprom.
I have this commit that fixed it for sam9x60ek board:
commit 5ae89b3cfe842ecbb5153a95e2e3ac404abe543c
Author: Eugen Hristev
Date: Thu May 26 17:04:56 2022 +0300
ARM: dts: at91: sam9x60ek: fix eeprom compatible
24c32 should be 32K and 24c02 is 2K .
I remember that with 24c32 it works, but when you read , the offset
changes, and then you read the same data multiple times, as if the 2K is
multiplied to have the 32K the driver thinks it has.
Do you have any reasoning for wanting to change the compatible to 24c32 ?
I am trying to understand how you found that 24c32 is better.
Eugen
I am sorry, I misread your patch. You are doing the exact opposite,
which appears to be correct ! Ignore the noise.
Re: [PATCH 2/5] ARM: dts: at91: sam9x60-curiosity: Fix EEPROM type
On 7/5/23 23:16, Alexander Dahl wrote:
From: Alexander Dahl
The user guide says it's a Microchip 24AA025E48 serial EEPROM, which is
a 2-Kbit I2C Serial EEPROM with EUI-48™ Identity. This is the chip
actually populated on board EV40E67A rev 4.
Signed-off-by: Alexander Dahl
---
Notes:
Sadly this did not fix the problem, that I could not access that
eeprom through I²C.
arch/arm/dts/at91-sam9x60_curiosity.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index d6ae3d648d..da5e19b66b 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -31,7 +31,7 @@
status = "okay";
eeprom@53 {
- compatible = "atmel,24c32";
+ compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
Hello Alexander,
Thank you for the patch.
I remember I tested this a while back and I remember that the 24c32
compatible is not correct for this eeprom.
I have this commit that fixed it for sam9x60ek board:
commit 5ae89b3cfe842ecbb5153a95e2e3ac404abe543c
Author: Eugen Hristev
Date: Thu May 26 17:04:56 2022 +0300
ARM: dts: at91: sam9x60ek: fix eeprom compatible
24c32 should be 32K and 24c02 is 2K .
I remember that with 24c32 it works, but when you read , the offset
changes, and then you read the same data multiple times, as if the 2K is
multiplied to have the 32K the driver thinks it has.
Do you have any reasoning for wanting to change the compatible to 24c32 ?
I am trying to understand how you found that 24c32 is better.
Eugen
[PATCH v2] fpga: add inline stub for fpga_load
In case CC_OPTIMIZE_FOR_DEBUG is set, unused code will not be optimized out,
hence the reference to fpga_load will be compiled.
if DM_FPGA and SPL_FPGA are not set, the build will fail with :
aarch64-none-linux-gnu-ld.bfd: common/spl/spl_fit.o: in function
`spl_fit_upload_fpga':
u-boot/common/spl/spl_fit.c:595: undefined reference to `fpga_load'
To solve this, added an inline empty stub in the header if
CC_OPTIMIZE_FOR_DEBUG is set such that the build will succeed.
Signed-off-by: Eugen Hristev
---
Changes in v2:
- this is a rework as suggested by Simon of this previous patch :
https://patchwork.ozlabs.org/project/uboot/patch/20230619102839.277902-1-eugen.hris...@collabora.com/
include/fpga.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/fpga.h b/include/fpga.h
index ed688cc0fa3b..50ab03af06bb 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -60,8 +60,17 @@ int fpga_add(fpga_type devtype, void *desc);
int fpga_count(void);
const fpga_desc *const fpga_get_desc(int devnum);
int fpga_is_partial_data(int devnum, size_t img_len);
+#if defined(CONFIG_CC_OPTIMIZE_FOR_DEBUG)
+static inline int fpga_load(int devnum, const void *buf, size_t bsize,
+ bitstream_type bstype, int flags)
+{
+ return 0;
+}
+#else
int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype, int flags);
+#endif
+
int fpga_fsload(int devnum, const void *buf, size_t size,
fpga_fs_info *fpga_fsinfo);
int fpga_loads(int devnum, const void *buf, size_t size,
--
2.34.1
[PATCH v4 2/2] board: rockchip: add Radxa ROCK5A Rk3588 board
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specifications:
Rockchip Rk3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
Audio – 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
Gigabit Ethernet RJ45 with optional PoE support
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 56mm (Raspberry Pi 4 form factor)
Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on
rk3588s-rock5a")
Signed-off-by: Eugen Hristev
---
Resent with correct email addresses
Changes in v4:
- tweaked the defconfig as reviewed by Jonas
- moved some of bootph-all to rk3588s-u-boot.dtsi
- renamed fdt fixup function
Changes in v3:
- forgot to add defconfig and include file, added now, sorry
Changes in v2:
-fixed wrong Kconfig text (rk3588s instead of rk3588)
-changed doc name (rk3588s instead of rk3588)
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi| 34 ++
arch/arm/dts/rk3588s-rock-5a.dts| 73 +
arch/arm/mach-rockchip/rk3588/Kconfig | 28
board/radxa/rock5a-rk3588s/Kconfig | 15 +
board/radxa/rock5a-rk3588s/MAINTAINERS | 6 ++
board/radxa/rock5a-rk3588s/Makefile | 6 ++
board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 +++
configs/rock5a-rk3588s_defconfig| 72
doc/board/rockchip/rockchip.rst | 1 +
include/configs/rock5a-rk3588s.h| 15 +
11 files changed, 290 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588s-rock-5a.dts
create mode 100644 board/radxa/rock5a-rk3588s/Kconfig
create mode 100644 board/radxa/rock5a-rk3588s/MAINTAINERS
create mode 100644 board/radxa/rock5a-rk3588s/Makefile
create mode 100644 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
create mode 100644 configs/rock5a-rk3588s_defconfig
create mode 100644 include/configs/rock5a-rk3588s.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa6065..cd9b96c5ba7c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -174,6 +174,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
rk3588-evb1-v10.dtb \
+ rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
diff --git a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
new file mode 100644
index ..9bb0e4f89e11
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#include "rk3588s-u-boot.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ aliases {
+ mmc1 =
+ };
+
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", ,
+ };
+};
+
+ {
+ bus-width = <4>;
+ status = "okay";
+};
+
+ {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ pinctrl-names = "default";
+ pinctrl-0 = <_bus8 _clk _cmd _data_strobe
_rstnout>;
+};
+
diff --git a/arch/arm/dts/rk3588s-rock-5a.dts b/arch/arm/dts/rk3588s-rock-5a.dts
new file mode 100644
index ..901825514f9d
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a.dts
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include
+#include
+#include "rk3588s.dtsi"
+
+/ {
+ model = "Radxa ROCK 5 Model A";
+ compatible = "radxa,rock-5a", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 =
+ serial2 =
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+};
+
+ {
+ clock_in_out = "output";
+ phy-handle = <_phy1>;
+ phy-mode = "rgmii";
+ pinctrl-0 = <_miim
+_tx_bus2
+_rx_bus2
+_rgmii_clk
+_rgmii_bus>;
+ pinctrl-names = "default";
+ tx_delay = <0x3a>;
+ rx_delay = <0x3e>;
+ status = "okay";
+};
+
+ {
+ rgmii_phy1: ethe
[PATCH v4 1/2] ARM: dts: rockchip: rk3588: Move bootph-all props to common file
Move bootph-all prop to common SoC dt file, because they are typically used
by multiple boards.
Unreferenced nodes are removed from the SPL device tree during a
normal build.
Suggested-by: Jonas Karlman
Signed-off-by: Eugen Hristev
---
Resent with correct mail addresses
Changes in v4:
- new patch
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 54
arch/arm/dts/rk3588s-u-boot.dtsi| 56 +
2 files changed, 56 insertions(+), 54 deletions(-)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index f453aeeaf526..2a80422390e7 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -77,26 +77,6 @@
status = "okay";
};
-_bus8 {
- bootph-all;
-};
-
-_clk {
- bootph-all;
-};
-
-_cmd {
- bootph-all;
-};
-
-_data_strobe {
- bootph-all;
-};
-
-_rstnout {
- bootph-all;
-};
-
_pins {
bootph-all;
};
@@ -109,8 +89,6 @@
};
{
- bootph-all;
-
pcie {
pcie_reset_h: pcie-reset-h {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO _pull_none>;
@@ -139,39 +117,11 @@
};
};
-_pull_none {
- bootph-all;
-};
-
-_pull_up_drv_level_2 {
- bootph-all;
-};
-
-_pull_up {
- bootph-all;
-};
-
{
bus-width = <4>;
status = "okay";
};
-_bus4 {
- bootph-all;
-};
-
-_clk {
- bootph-all;
-};
-
-_cmd {
- bootph-all;
-};
-
-_det {
- bootph-all;
-};
-
{
cap-mmc-highspeed;
mmc-ddr-1_8v;
@@ -199,10 +149,6 @@
};
};
-_xfer {
- bootph-all;
-};
-
_host0_ehci {
companion = <_host0_ohci>;
phys = <_host>;
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index acb1cfe20063..2d0b0d8ce2fc 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -302,6 +302,42 @@
};
};
+_bus8 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_data_strobe {
+ bootph-all;
+};
+
+_rstnout {
+ bootph-all;
+};
+
+ {
+ bootph-all;
+};
+
+_pull_none {
+ bootph-all;
+};
+
+_pull_up_drv_level_2 {
+ bootph-all;
+};
+
+_pull_up {
+ bootph-all;
+};
+
{
bootph-all;
status = "okay";
@@ -335,12 +371,32 @@
u-boot,spl-fifo-mode;
};
+_bus4 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_det {
+ bootph-all;
+};
+
{
clock-frequency = <2400>;
bootph-pre-ram;
status = "okay";
};
+_xfer {
+ bootph-all;
+};
+
{
bootph-pre-ram;
};
--
2.34.1
[PATCH v4 2/2] board: rockchip: add Radxa ROCK5A Rk3588 board
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specifications:
Rockchip Rk3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
Audio – 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
Gigabit Ethernet RJ45 with optional PoE support
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 56mm (Raspberry Pi 4 form factor)
Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on
rk3588s-rock5a")
Signed-off-by: Eugen Hristev
---
Changes in v4:
- tweaked the defconfig as reviewed by Jonas
- moved some of bootph-all to rk3588s-u-boot.dtsi
- renamed fdt fixup function
Changes in v3:
- forgot to add defconfig and include file, added now, sorry
Changes in v2:
-fixed wrong Kconfig text (rk3588s instead of rk3588)
-changed doc name (rk3588s instead of rk3588)
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi| 34 ++
arch/arm/dts/rk3588s-rock-5a.dts| 73 +
arch/arm/mach-rockchip/rk3588/Kconfig | 28
board/radxa/rock5a-rk3588s/Kconfig | 15 +
board/radxa/rock5a-rk3588s/MAINTAINERS | 6 ++
board/radxa/rock5a-rk3588s/Makefile | 6 ++
board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 +++
configs/rock5a-rk3588s_defconfig| 72
doc/board/rockchip/rockchip.rst | 1 +
include/configs/rock5a-rk3588s.h| 15 +
11 files changed, 290 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588s-rock-5a.dts
create mode 100644 board/radxa/rock5a-rk3588s/Kconfig
create mode 100644 board/radxa/rock5a-rk3588s/MAINTAINERS
create mode 100644 board/radxa/rock5a-rk3588s/Makefile
create mode 100644 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
create mode 100644 configs/rock5a-rk3588s_defconfig
create mode 100644 include/configs/rock5a-rk3588s.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa6065..cd9b96c5ba7c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -174,6 +174,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
rk3588-evb1-v10.dtb \
+ rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
diff --git a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
new file mode 100644
index ..9bb0e4f89e11
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#include "rk3588s-u-boot.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ aliases {
+ mmc1 =
+ };
+
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", ,
+ };
+};
+
+ {
+ bus-width = <4>;
+ status = "okay";
+};
+
+ {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ pinctrl-names = "default";
+ pinctrl-0 = <_bus8 _clk _cmd _data_strobe
_rstnout>;
+};
+
diff --git a/arch/arm/dts/rk3588s-rock-5a.dts b/arch/arm/dts/rk3588s-rock-5a.dts
new file mode 100644
index ..901825514f9d
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a.dts
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include
+#include
+#include "rk3588s.dtsi"
+
+/ {
+ model = "Radxa ROCK 5 Model A";
+ compatible = "radxa,rock-5a", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 =
+ serial2 =
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+};
+
+ {
+ clock_in_out = "output";
+ phy-handle = <_phy1>;
+ phy-mode = "rgmii";
+ pinctrl-0 = <_miim
+_tx_bus2
+_rx_bus2
+_rgmii_clk
+_rgmii_bus>;
+ pinctrl-names = "default";
+ tx_delay = <0x3a>;
+ rx_delay = <0x3e>;
+ status = "okay";
+};
+
+ {
+ rgmii_phy1: ethernet-phy@1 {
+ /* RTL8211F */
[PATCH v4 1/2] ARM: dts: rockchip: rk3588: Move bootph-all props to common file
Move bootph-all prop to common SoC dt file, because they are typically used
by multiple boards.
Unreferenced nodes are removed from the SPL device tree during a
normal build.
Suggested-by: Jonas Karlman
Signed-off-by: Eugen Hristev
---
Changes in v4:
- new patch
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 54
arch/arm/dts/rk3588s-u-boot.dtsi| 56 +
2 files changed, 56 insertions(+), 54 deletions(-)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index f453aeeaf526..2a80422390e7 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -77,26 +77,6 @@
status = "okay";
};
-_bus8 {
- bootph-all;
-};
-
-_clk {
- bootph-all;
-};
-
-_cmd {
- bootph-all;
-};
-
-_data_strobe {
- bootph-all;
-};
-
-_rstnout {
- bootph-all;
-};
-
_pins {
bootph-all;
};
@@ -109,8 +89,6 @@
};
{
- bootph-all;
-
pcie {
pcie_reset_h: pcie-reset-h {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO _pull_none>;
@@ -139,39 +117,11 @@
};
};
-_pull_none {
- bootph-all;
-};
-
-_pull_up_drv_level_2 {
- bootph-all;
-};
-
-_pull_up {
- bootph-all;
-};
-
{
bus-width = <4>;
status = "okay";
};
-_bus4 {
- bootph-all;
-};
-
-_clk {
- bootph-all;
-};
-
-_cmd {
- bootph-all;
-};
-
-_det {
- bootph-all;
-};
-
{
cap-mmc-highspeed;
mmc-ddr-1_8v;
@@ -199,10 +149,6 @@
};
};
-_xfer {
- bootph-all;
-};
-
_host0_ehci {
companion = <_host0_ohci>;
phys = <_host>;
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index acb1cfe20063..2d0b0d8ce2fc 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -302,6 +302,42 @@
};
};
+_bus8 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_data_strobe {
+ bootph-all;
+};
+
+_rstnout {
+ bootph-all;
+};
+
+ {
+ bootph-all;
+};
+
+_pull_none {
+ bootph-all;
+};
+
+_pull_up_drv_level_2 {
+ bootph-all;
+};
+
+_pull_up {
+ bootph-all;
+};
+
{
bootph-all;
status = "okay";
@@ -335,12 +371,32 @@
u-boot,spl-fifo-mode;
};
+_bus4 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_det {
+ bootph-all;
+};
+
{
clock-frequency = <2400>;
bootph-pre-ram;
status = "okay";
};
+_xfer {
+ bootph-all;
+};
+
{
bootph-pre-ram;
};
--
2.34.1
[PATCH] git-mailrc: add alias for Eugen Hristev
add my patchwork alias Signed-off-by: Eugen Hristev --- doc/git-mailrc | 1 + 1 file changed, 1 insertion(+) diff --git a/doc/git-mailrc b/doc/git-mailrc index 96623c3b4ee1..0ceb9eb88b52 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -22,6 +22,7 @@ alias apritzel Andre Przywara alias bmeng Bin Meng alias danielschwierzeck Daniel Schwierzeck alias dinh Dinh Nguyen +alias ehristev Eugen Hristev alias hs Heiko Schocher alias freenixPeng Fan alias iwamatsu Nobuhiro Iwamatsu -- 2.34.1
[PATCH v3] board: rockchip: add Radxa ROCK5A Rk3588 board
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specifications:
Rockchip Rk3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
Audio – 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
Gigabit Ethernet RJ45 with optional PoE support
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 56mm (Raspberry Pi 4 form factor)
Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on
rk3588s-rock5a")
Signed-off-by: Eugen Hristev
---
Changes in v3:
- forgot to add defconfig and include file, added now, sorry
Changes in v2:
-fixed wrong Kconfig text (rk3588s instead of rk3588)
-changed doc name (rk3588s instead of rk3588)
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi| 90 +
arch/arm/dts/rk3588s-rock-5a.dts| 73 +
arch/arm/mach-rockchip/rk3588/Kconfig | 28 +++
board/radxa/rock5a-rk3588s/Kconfig | 15
board/radxa/rock5a-rk3588s/MAINTAINERS | 6 ++
board/radxa/rock5a-rk3588s/Makefile | 6 ++
board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 +
configs/rock5a-rk3588s_defconfig| 71
doc/board/rockchip/rockchip.rst | 1 +
include/configs/rock5a-rk3588s.h| 15
11 files changed, 345 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588s-rock-5a.dts
create mode 100644 board/radxa/rock5a-rk3588s/Kconfig
create mode 100644 board/radxa/rock5a-rk3588s/MAINTAINERS
create mode 100644 board/radxa/rock5a-rk3588s/Makefile
create mode 100644 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
create mode 100644 configs/rock5a-rk3588s_defconfig
create mode 100644 include/configs/rock5a-rk3588s.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa6065..cd9b96c5ba7c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -174,6 +174,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
rk3588-evb1-v10.dtb \
+ rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
diff --git a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
new file mode 100644
index ..a546f9e4dcc2
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#include "rk3588s-u-boot.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ aliases {
+ mmc1 =
+ };
+
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", ,
+ };
+};
+
+_bus8 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_data_strobe {
+ bootph-all;
+};
+
+_rstnout {
+ bootph-all;
+};
+
+ {
+ bootph-all;
+};
+
+_pull_none {
+ bootph-all;
+};
+
+_pull_up_drv_level_2 {
+ bootph-all;
+};
+
+_pull_up {
+ bootph-all;
+};
+
+ {
+ bus-width = <4>;
+ status = "okay";
+};
+
+_bus4 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_det {
+ bootph-all;
+};
+
+ {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ pinctrl-names = "default";
+ pinctrl-0 = <_bus8 _clk _cmd _data_strobe
_rstnout>;
+};
+
+_xfer {
+ bootph-all;
+};
+
diff --git a/arch/arm/dts/rk3588s-rock-5a.dts b/arch/arm/dts/rk3588s-rock-5a.dts
new file mode 100644
index ..901825514f9d
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a.dts
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include
+#include
+#include "rk3588s.dtsi"
+
+/ {
+ model = "Radxa ROCK 5 Model A";
+ compatible = "radxa,rock-5a", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 =
+ serial2 =
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+};
+
+ {
+ clock_in_out = "output";
+ phy-handle = <_phy1>;
+ phy-mode = "rgmii";
+ pinctrl-0
[PATCH v2] board: rockchip: add Radxa ROCK5A Rk3588 board
ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa.
There are tree variants depending on the DRAM size : 4G, 8G and 16G.
Specifications:
Rockchip Rk3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
Audio – 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
Gigabit Ethernet RJ45 with optional PoE support
40-pin IO header including UART, SPI, I2C and 5V DC power in
USB PD over USB Type-C
Size: 85mm x 56mm (Raspberry Pi 4 form factor)
Kernel commits:
d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board")
991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a")
304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a")
cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on
rk3588s-rock5a")
Signed-off-by: Eugen Hristev
---
Changes in v2:
-fixed wrong Kconfig text (rk3588s instead of rk3588)
-changed doc name (rk3588s instead of rk3588)
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi| 90 +
arch/arm/dts/rk3588s-rock-5a.dts| 73 +
arch/arm/mach-rockchip/rk3588/Kconfig | 28 +++
board/radxa/rock5a-rk3588s/Kconfig | 15
board/radxa/rock5a-rk3588s/MAINTAINERS | 6 ++
board/radxa/rock5a-rk3588s/Makefile | 6 ++
board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 +
doc/board/rockchip/rockchip.rst | 1 +
9 files changed, 259 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588s-rock-5a.dts
create mode 100644 board/radxa/rock5a-rk3588s/Kconfig
create mode 100644 board/radxa/rock5a-rk3588s/MAINTAINERS
create mode 100644 board/radxa/rock5a-rk3588s/Makefile
create mode 100644 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa6065..cd9b96c5ba7c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -174,6 +174,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
rk3588-evb1-v10.dtb \
+ rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
diff --git a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
new file mode 100644
index ..a546f9e4dcc2
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#include "rk3588s-u-boot.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ aliases {
+ mmc1 =
+ };
+
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", ,
+ };
+};
+
+_bus8 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_data_strobe {
+ bootph-all;
+};
+
+_rstnout {
+ bootph-all;
+};
+
+ {
+ bootph-all;
+};
+
+_pull_none {
+ bootph-all;
+};
+
+_pull_up_drv_level_2 {
+ bootph-all;
+};
+
+_pull_up {
+ bootph-all;
+};
+
+ {
+ bus-width = <4>;
+ status = "okay";
+};
+
+_bus4 {
+ bootph-all;
+};
+
+_clk {
+ bootph-all;
+};
+
+_cmd {
+ bootph-all;
+};
+
+_det {
+ bootph-all;
+};
+
+ {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ pinctrl-names = "default";
+ pinctrl-0 = <_bus8 _clk _cmd _data_strobe
_rstnout>;
+};
+
+_xfer {
+ bootph-all;
+};
+
diff --git a/arch/arm/dts/rk3588s-rock-5a.dts b/arch/arm/dts/rk3588s-rock-5a.dts
new file mode 100644
index ..901825514f9d
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a.dts
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include
+#include
+#include "rk3588s.dtsi"
+
+/ {
+ model = "Radxa ROCK 5 Model A";
+ compatible = "radxa,rock-5a", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 =
+ serial2 =
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+};
+
+ {
+ clock_in_out = "output";
+ phy-handle = <_phy1>;
+ phy-mode = "rgmii";
+ pinctrl-0 = <_miim
+_tx_bus2
+_rx_bus2
+_rgmii_clk
+_rgmii_bus>;
+ pinctrl-names = "default";
+ tx_delay = <0x3a>;
+ rx_delay = <0x3e>;
+ status = "okay";
+};
+
+ {
+ rgmii_ph
