Re: [U-Boot] [PATCH] MAINTAINERS: add me as a maintainer of UBI
On Tuesday, November 18, 2014, Stefan Roese s...@denx.de wrote: On 18.11.2014 09:08, Heiko Schocher wrote: Add me for UBI custodian. Signed-off-by: Heiko Schocher h...@denx.de Acked-by: Stefan Roese s...@denx.de Acked-by: Kyungmin Park kyungmin.p...@samsung.com Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] usb: gadget: Use unaligned access for wMaxPacketSize
On Mon, May 13, 2013 at 7:23 PM, Vivek Gautam gautam.vi...@samsung.comwrote:
Use get_unaligned() while fetching wMaxPacketSize to avoid
voilating any alignment rules.
It's another story, can we get performance gain with unaligned access
feature? In case of kernel, we got some gains.
Anyway, good job!
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: Lukasz Dalek luk0...@gmail.com
Cc: Marek Vasut ma...@denx.de
---
Just did a build test on u-boot-usb/master branch.
Need to be tested further.
Based on u-boot-usb/next.
drivers/usb/gadget/f_mass_storage.c |3 ++-
drivers/usb/gadget/pxa25x_udc.c | 13 +++--
2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/gadget/f_mass_storage.c
b/drivers/usb/gadget/f_mass_storage.c
index c28866f..45bc132 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -2261,7 +2261,8 @@ reset:
if (rc)
goto reset;
fsg-bulk_out_enabled = 1;
- common-bulk_out_maxpacket = le16_to_cpu(d-wMaxPacketSize);
+ common-bulk_out_maxpacket =
+
le16_to_cpu(get_unaligned(d-wMaxPacketSize));
clear_bit(IGNORE_BULK_OUT, fsg-atomic_bitflags);
/* Allocate the requests */
diff --git a/drivers/usb/gadget/pxa25x_udc.c
b/drivers/usb/gadget/pxa25x_udc.c
index 9ce98f0..085503d 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -314,7 +314,8 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
if (!_ep || !desc || ep-desc || _ep-name == ep0name
|| desc-bDescriptorType != USB_DT_ENDPOINT
|| ep-bEndpointAddress != desc-bEndpointAddress
- || ep-fifo_size
le16_to_cpu(desc-wMaxPacketSize)) {
+ || ep-fifo_size
+
le16_to_cpu(get_unaligned(desc-wMaxPacketSize))) {
printf(%s, bad ep or descriptor\n, __func__);
return -EINVAL;
}
@@ -329,9 +330,9 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
/* hardware _could_ do smaller, but driver doesn't */
if ((desc-bmAttributes == USB_ENDPOINT_XFER_BULK
-le16_to_cpu(desc-wMaxPacketSize)
+
le16_to_cpu(get_unaligned(desc-wMaxPacketSize))
!= BULK_FIFO_SIZE)
- || !desc-wMaxPacketSize) {
+ || !get_unaligned(desc-wMaxPacketSize)) {
printf(%s, bad %s maxpacket\n, __func__, _ep-name);
return -ERANGE;
}
@@ -345,7 +346,7 @@ static int pxa25x_ep_enable(struct usb_ep *_ep,
ep-desc = desc;
ep-stopped = 0;
ep-pio_irqs = 0;
- ep-ep.maxpacket = le16_to_cpu(desc-wMaxPacketSize);
+ ep-ep.maxpacket =
le16_to_cpu(get_unaligned(desc-wMaxPacketSize));
/* flush fifo (mostly for OUT buffers) */
pxa25x_ep_fifo_flush(_ep);
@@ -485,7 +486,7 @@ write_fifo(struct pxa25x_ep *ep, struct pxa25x_request
*req)
{
unsigned max;
- max = le16_to_cpu(ep-desc-wMaxPacketSize);
+ max = le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize));
do {
unsigned count;
int is_last, is_short;
@@ -766,7 +767,7 @@ pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request
*_req, gfp_t gfp_flags)
*/
if (unlikely(ep-bmAttributes == USB_ENDPOINT_XFER_ISOC
req-req.length
- le16_to_cpu(ep-desc-wMaxPacketSize)))
+
le16_to_cpu(get_unaligned(ep-desc-wMaxPacketSize
return -EMSGSIZE;
debug_cond(NOISY, %s queue req %p, len %d buf %p\n,
--
1.7.6.5
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Re: [U-Boot] [PATCH 2/2] SPL: ONENAND: Support SPL to boot u-boot from OneNAND.
Hi,
On Tue, Feb 5, 2013 at 6:23 PM, Enric Balletbo i Serra
eballe...@gmail.com wrote:
From: Enric Balletbo i Serra eballe...@iseebcn.com
This patch will allow use SPL to boot an u-boot from the OneNAND.
Tested with IGEPv2 board with a OneNAND from Numonyx.
Signed-off-by: Enric Balletbo i Serra eballe...@iseebcn.com
---
arch/arm/cpu/armv7/omap3/board.c |2 +-
It's not related with OneNAND SPL patch, can you split it two patches?
common/spl/Makefile |1 +
common/spl/spl.c |5 +
common/spl/spl_onenand.c | 45
++
4 files changed, 52 insertions(+), 1 deletion(-)
create mode 100644 common/spl/spl_onenand.c
diff --git a/arch/arm/cpu/armv7/omap3/board.c
b/arch/arm/cpu/armv7/omap3/board.c
index 89c587e..63063c8 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -110,7 +110,7 @@ int board_mmc_init(bd_t *bis)
void spl_board_init(void)
{
-#ifdef CONFIG_SPL_NAND_SUPPORT
+#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
#endif
#ifdef CONFIG_SPL_I2C_SUPPORT
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 5698a23..da2afc1 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -18,6 +18,7 @@ COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o
COBJS-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
+COBJS-$(CONFIG_SPL_ONENAND_SUPPORT) += spl_onenand.o
COBJS-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
endif
diff --git a/common/spl/spl.c b/common/spl/spl.c
index ff9ba7b..c584247 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -197,6 +197,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_nand_load_image();
break;
#endif
+#ifdef CONFIG_SPL_ONENAND_SUPPORT
+ case BOOT_DEVICE_ONE_NAND:
ONE_NAND? It should be ONENAND.
+ spl_onenand_load_image();
+ break;
+#endif
#ifdef CONFIG_SPL_NOR_SUPPORT
case BOOT_DEVICE_NOR:
spl_nor_load_image();
diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c
new file mode 100644
index 000..247f97b
--- /dev/null
+++ b/common/spl/spl_onenand.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2011
+ * Corscience GmbH Co. KG - Simon Schwarz schw...@corscience.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include common.h
+#include config.h
+#include spl.h
+#include asm/io.h
+#include onenand_uboot.h
+
+void spl_onenand_load_image(void)
+{
+ struct image_header *header;
+ int *src __attribute__((unused));
+ int *dst __attribute__((unused));
why these are needed? just remove these.
Thank you,
Kyungmin Park
+
+ debug(spl: onenand\n);
+
+ /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+ /* Load u-boot */
+ onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS,
+ CONFIG_SYS_ONENAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS,
+ spl_image.size, (void *)spl_image.load_addr);
+}
--
1.7.10.4
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Re: [U-Boot] [PATCH 1/4] SMDK5250: Convert lowlevel_init.S to lowlevel_init_c.c
Hi,
On 1/2/13, Rajeshwari Birje rajeshwari.bi...@gmail.com wrote:
Hi Kyungmin Park,
Thank you for comments.
On Mon, Dec 31, 2012 at 6:02 PM, Kyungmin Park kmp...@infradead.org
wrote:
On Fri, Dec 28, 2012 at 9:08 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch converts lowlevel_init.S to lowlevel_init_c.c for
SMDK5250.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
board/samsung/smdk5250/Makefile |1 +
board/samsung/smdk5250/dmc_common.c |4 +-
board/samsung/smdk5250/dmc_init_ddr3.c |6 ++-
board/samsung/smdk5250/lowlevel_init.S | 69
++---
board/samsung/smdk5250/lowlevel_init_c.c | 70
++
board/samsung/smdk5250/setup.h | 17 ++-
board/samsung/smdk5250/spl_boot.c| 52 ++
spl/Makefile |4 ++
8 files changed, 142 insertions(+), 81 deletions(-)
create mode 100644 board/samsung/smdk5250/lowlevel_init_c.c
diff --git a/board/samsung/smdk5250/Makefile
b/board/samsung/smdk5250/Makefile
index 47c6a5a..b99ac7f 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -37,6 +37,7 @@ endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
+COBJS += lowlevel_init_c.o
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/samsung/smdk5250/dmc_common.c
b/board/samsung/smdk5250/dmc_common.c
index 109602a..6a26822 100644
--- a/board/samsung/smdk5250/dmc_common.c
+++ b/board/samsung/smdk5250/dmc_common.c
@@ -175,7 +175,7 @@ void dmc_config_memory(struct mem_timings *mem,
struct exynos5_dmc *dmc)
writel(DMC_MEMBASECONFIG1_VAL, dmc-membaseconfig1);
}
-void mem_ctrl_init()
+void mem_ctrl_init(int mem_reset)
does 'reset' is enough?
- OK
{
struct spl_machine_param *param = spl_get_machine_params();
struct mem_timings *mem;
@@ -185,7 +185,7 @@ void mem_ctrl_init()
/* If there are any other memory variant, add their init call
below */
if (param-mem_type == DDR_MODE_DDR3) {
- ret = ddr3_mem_ctrl_init(mem, param-mem_iv_size);
+ ret = ddr3_mem_ctrl_init(mem, param-mem_iv_size,
mem_reset);
if (ret) {
/* will hang if failed to init memory control */
while (1)
diff --git a/board/samsung/smdk5250/dmc_init_ddr3.c
b/board/samsung/smdk5250/dmc_init_ddr3.c
index e050790..4e0693d 100644
--- a/board/samsung/smdk5250/dmc_init_ddr3.c
+++ b/board/samsung/smdk5250/dmc_init_ddr3.c
@@ -40,7 +40,8 @@ static void reset_phy_ctrl(void)
writel(DDR3PHY_CTRL_PHY_RESET, clk-lpddr3phy_ctrl);
}
-int ddr3_mem_ctrl_init(struct mem_timings *mem, unsigned long
mem_iv_size)
+int ddr3_mem_ctrl_init(struct mem_timings *mem, unsigned long
mem_iv_size,
+ int mem_reset)
ditto
-OK
{
unsigned int val;
struct exynos5_phy_control *phy0_ctrl, *phy1_ctrl;
@@ -51,7 +52,8 @@ int ddr3_mem_ctrl_init(struct mem_timings *mem,
unsigned long mem_iv_size)
phy1_ctrl = (struct exynos5_phy_control *)EXYNOS5_DMC_PHY1_BASE;
dmc = (struct exynos5_dmc *)EXYNOS5_DMC_CTRL_BASE;
- reset_phy_ctrl();
+ if (mem_reset)
if (reset)
+ reset_phy_ctrl();
/* Set Impedance Output Driver */
val = (mem-impedance CA_CK_DRVR_DS_OFFSET) |
diff --git a/board/samsung/smdk5250/lowlevel_init.S
b/board/samsung/smdk5250/lowlevel_init.S
index bc6cb6f..469126d 100644
--- a/board/samsung/smdk5250/lowlevel_init.S
+++ b/board/samsung/smdk5250/lowlevel_init.S
@@ -23,74 +23,13 @@
*/
#include config.h
-#include version.h
#include asm/arch/cpu.h
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE
-
.globl lowlevel_init
lowlevel_init:
-
- /* use iRAM stack in bl2 */
- ldr sp, =CONFIG_IRAM_STACK
- stmdb r13!, {ip,lr}
-
- /* check reset status */
- ldr r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET)
- ldr r1, [r0]
-
- /* AFTR wakeup reset */
- ldr r2, =S5P_CHECK_DIDLE
- cmp r1, r2
- beq exit_wakeup
-
- /* LPA wakeup reset */
- ldr r2, =S5P_CHECK_LPA
- cmp r1, r2
- beq exit_wakeup
-
- /* Sleep wakeup reset */
- ldr r2, =S5P_CHECK_SLEEP
- cmp r1, r2
- beq wakeup_reset
-
/*
-* If U-boot is already running in RAM, no need to relocate
U-Boot.
-* Memory controller must be configured before relocating U-Boot
-* in ram.
+* Set the stack pointer, although it will be overwriten by the
caller
+* It seems we will not boot if this function is empty.
*/
- ldr r0, =0x0ff /* r0 - Mask Bits*/
- bic r1, pc, r0 /* pc - current addr of code
Re: [U-Boot] [PATCH 1/4] SMDK5250: Convert lowlevel_init.S to lowlevel_init_c.c
On 1/2/13, Rajeshwari Birje rajeshwari.bi...@gmail.com wrote:
Hi Kyungmin Park,
On Wed, Jan 2, 2013 at 11:48 AM, Kyungmin Park kmp...@infradead.org
wrote:
Hi,
On 1/2/13, Rajeshwari Birje rajeshwari.bi...@gmail.com wrote:
Hi Kyungmin Park,
Thank you for comments.
On Mon, Dec 31, 2012 at 6:02 PM, Kyungmin Park kmp...@infradead.org
wrote:
On Fri, Dec 28, 2012 at 9:08 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch converts lowlevel_init.S to lowlevel_init_c.c for
SMDK5250.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
board/samsung/smdk5250/Makefile |1 +
board/samsung/smdk5250/dmc_common.c |4 +-
board/samsung/smdk5250/dmc_init_ddr3.c |6 ++-
board/samsung/smdk5250/lowlevel_init.S | 69
++---
board/samsung/smdk5250/lowlevel_init_c.c | 70
++
board/samsung/smdk5250/setup.h | 17 ++-
board/samsung/smdk5250/spl_boot.c| 52
++
spl/Makefile |4 ++
8 files changed, 142 insertions(+), 81 deletions(-)
create mode 100644 board/samsung/smdk5250/lowlevel_init_c.c
diff --git a/board/samsung/smdk5250/Makefile
b/board/samsung/smdk5250/Makefile
index 47c6a5a..b99ac7f 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -37,6 +37,7 @@ endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
+COBJS += lowlevel_init_c.o
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/samsung/smdk5250/dmc_common.c
b/board/samsung/smdk5250/dmc_common.c
index 109602a..6a26822 100644
--- a/board/samsung/smdk5250/dmc_common.c
+++ b/board/samsung/smdk5250/dmc_common.c
@@ -175,7 +175,7 @@ void dmc_config_memory(struct mem_timings *mem,
struct exynos5_dmc *dmc)
writel(DMC_MEMBASECONFIG1_VAL, dmc-membaseconfig1);
}
-void mem_ctrl_init()
+void mem_ctrl_init(int mem_reset)
does 'reset' is enough?
- OK
{
struct spl_machine_param *param = spl_get_machine_params();
struct mem_timings *mem;
@@ -185,7 +185,7 @@ void mem_ctrl_init()
/* If there are any other memory variant, add their init call
below */
if (param-mem_type == DDR_MODE_DDR3) {
- ret = ddr3_mem_ctrl_init(mem, param-mem_iv_size);
+ ret = ddr3_mem_ctrl_init(mem, param-mem_iv_size,
mem_reset);
if (ret) {
/* will hang if failed to init memory control
*/
while (1)
diff --git a/board/samsung/smdk5250/dmc_init_ddr3.c
b/board/samsung/smdk5250/dmc_init_ddr3.c
index e050790..4e0693d 100644
--- a/board/samsung/smdk5250/dmc_init_ddr3.c
+++ b/board/samsung/smdk5250/dmc_init_ddr3.c
@@ -40,7 +40,8 @@ static void reset_phy_ctrl(void)
writel(DDR3PHY_CTRL_PHY_RESET, clk-lpddr3phy_ctrl);
}
-int ddr3_mem_ctrl_init(struct mem_timings *mem, unsigned long
mem_iv_size)
+int ddr3_mem_ctrl_init(struct mem_timings *mem, unsigned long
mem_iv_size,
+ int mem_reset)
ditto
-OK
{
unsigned int val;
struct exynos5_phy_control *phy0_ctrl, *phy1_ctrl;
@@ -51,7 +52,8 @@ int ddr3_mem_ctrl_init(struct mem_timings *mem,
unsigned long mem_iv_size)
phy1_ctrl = (struct exynos5_phy_control
*)EXYNOS5_DMC_PHY1_BASE;
dmc = (struct exynos5_dmc *)EXYNOS5_DMC_CTRL_BASE;
- reset_phy_ctrl();
+ if (mem_reset)
if (reset)
+ reset_phy_ctrl();
/* Set Impedance Output Driver */
val = (mem-impedance CA_CK_DRVR_DS_OFFSET) |
diff --git a/board/samsung/smdk5250/lowlevel_init.S
b/board/samsung/smdk5250/lowlevel_init.S
index bc6cb6f..469126d 100644
--- a/board/samsung/smdk5250/lowlevel_init.S
+++ b/board/samsung/smdk5250/lowlevel_init.S
@@ -23,74 +23,13 @@
*/
#include config.h
-#include version.h
#include asm/arch/cpu.h
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE
-
.globl lowlevel_init
lowlevel_init:
-
- /* use iRAM stack in bl2 */
- ldr sp, =CONFIG_IRAM_STACK
- stmdb r13!, {ip,lr}
-
- /* check reset status */
- ldr r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET)
- ldr r1, [r0]
-
- /* AFTR wakeup reset */
- ldr r2, =S5P_CHECK_DIDLE
- cmp r1, r2
- beq exit_wakeup
-
- /* LPA wakeup reset */
- ldr r2, =S5P_CHECK_LPA
- cmp r1, r2
- beq exit_wakeup
-
- /* Sleep wakeup reset */
- ldr r2, =S5P_CHECK_SLEEP
- cmp r1, r2
- beq wakeup_reset
-
/*
-* If U-boot is already running in RAM, no need to relocate
U-Boot.
-* Memory controller must be configured before relocating
U-Boot
-* in ram.
+* Set the stack pointer, although it will be overwriten by
the
caller
+* It seems we will not boot if this function is empty
Re: [U-Boot] [PATCH 1/4] SMDK5250: Convert lowlevel_init.S to lowlevel_init_c.c
r1, r2 /* compare r1, r2 */
- beq 1f /* r0 == r1 then skip sdram init */
-
- /* init system clock */
- bl system_clock_init
-
- /* Memory initialize */
- bl mem_ctrl_init
-
-1:
- bl tzpc_init
- ldmia r13!, {ip,pc}
-
-wakeup_reset:
- bl system_clock_init
- bl mem_ctrl_init
- bl tzpc_init
-
-exit_wakeup:
- /* Load return address and jump to kernel */
- ldr r0, =(EXYNOS5_POWER_BASE + INFORM0_OFFSET)
-
- /* r1 = physical address of exynos5_cpu_resume function*/
- ldr r1, [r0]
-
- /* Jump to kernel */
- mov pc, r1
- nop
- nop
+ ldr sp, =CONFIG_IRAM_STACK
+ mov pc, lr
diff --git a/board/samsung/smdk5250/lowlevel_init_c.c
b/board/samsung/smdk5250/lowlevel_init_c.c
new file mode 100644
index 000..fdb98cf
--- /dev/null
+++ b/board/samsung/smdk5250/lowlevel_init_c.c
lowlevel_init.c?
@@ -0,0 +1,70 @@
+/*
+ * Lowlevel setup for SMDK5250 board based on S5PC520
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include config.h
+#include asm/arch/cpu.h
+#include asm/arch/dmc.h
+#include asm/arch/power.h
+#include asm/arch/tzpc.h
+#include setup.h
+
+/* These are the things we can do during low-level init */
+enum {
+ DO_WAKEUP = 1 0,
+ DO_CLOCKS = 1 1,
+ DO_MEM_RESET= 1 2,
+};
+
+int lowlevel_init_subsystems(void)
+{
+ uint32_t reset_status;
+ int actions = 0;
+
+ arch_cpu_init();
+
+ reset_status = power_read_reset_status();
+
+ switch (reset_status) {
+ case EXYNOS_CHECK_SLEEP:
+ actions = DO_CLOCKS | DO_WAKEUP;
+ break;
+ case EXYNOS_CHECK_DIDLE:
+ case EXYNOS_CHECK_LPA:
+ actions = DO_WAKEUP;
+ break;
+ default:
+ /* This is a normal boot (not a wake from sleep) */
+ actions = DO_CLOCKS | DO_MEM_RESET;
+ }
+
+ if (actions DO_CLOCKS) {
+ system_clock_init();
+ mem_ctrl_init(actions DO_MEM_RESET);
+ tzpc_init();
+ }
+
+ return actions DO_WAKEUP;
+}
diff --git a/board/samsung/smdk5250/setup.h b/board/samsung/smdk5250/setup.h
index a159601..d64e385 100644
--- a/board/samsung/smdk5250/setup.h
+++ b/board/samsung/smdk5250/setup.h
@@ -28,6 +28,11 @@
#include config.h
#include asm/arch/dmc.h
+/* Power Down Modes */
+#define EXYNOS_CHECK_SLEEP 0x0BAD
+#define EXYNOS_CHECK_DIDLE 0xBAD0
+#define EXYNOS_CHECK_LPA 0xABAD
These can be uses other exynos5250 series. so can you place it common
header file?
+
/* TZPC : Register Offsets */
#define TZPC0_BASE 0x1010
#define TZPC1_BASE 0x1011
@@ -539,7 +544,8 @@ enum {
* accesses; may vary across boards.
* @return 0 if ok, SETUP_ERR_... if there is a problem
*/
-int ddr3_mem_ctrl_init(struct mem_timings *mem, unsigned long mem_iv_size);
+int ddr3_mem_ctrl_init(struct mem_timings *mem, unsigned long mem_iv_size,
+ int mem_reset);
/*
* Configure ZQ I/O interface
@@ -588,7 +594,14 @@ void dmc_config_memory(struct mem_timings *mem, struct
exynos5_dmc *dmc);
void update_reset_dll(struct exynos5_dmc *, enum ddr_mode);
void sdelay(unsigned long);
-void mem_ctrl_init(void);
+void mem_ctrl_init(int mem_reset);
void system_clock_init(void);
void tzpc_init(void);
+
+/**
+ * Init subsystems according to the reset status
+ *
+ * @return 0 for a normal boot, non-zero for a resume
+ */
+int lowlevel_init_subsystems(void);
do_lowlevle_init?
Thank you,
Kyungmin Park
#endif
diff --git a/board/samsung/smdk5250/spl_boot.c
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..66bce5b 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -20,18 +20,16 @@
* MA 02111-1307 USA
Re: [U-Boot] [PATCH V3 1/9] FDT: Add compatible string for DWMMC
Hi,
On Mon, Dec 31, 2012 at 7:58 PM, Amar amarendra...@samsung.com wrote:
Add required compatible information for DWMMC driver.
Changes from V1:
No change.
Changes from V2:
1)Updation of commit message and resubmition of proper patch set.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Amar amarendra...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index ce10bf4..dcd4142 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -76,6 +76,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_SOUND, /* Exynos Sound */
COMPAT_WOLFSON_WM8994_CODEC,/* Wolfson WM8994 Sound Codec */
COMPAT_SAMSUNG_EXYNOS_SPI, /* Exynos SPI */
+ COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
You already know that exynos4 series also have DWMMC controller and
it's strange to use this value at exynos4 series.
so can you use 'SAMSUNG_EXYNOS_DWMMC'?
Thank you,
Kyungmin Park
COMPAT_COUNT,
};
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index aa75710..646d5d6 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -51,6 +51,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_SOUND, samsung,exynos-sound),
COMPAT(WOLFSON_WM8994_CODEC, wolfson,wm8994-codec),
COMPAT(SAMSUNG_EXYNOS_SPI, samsung,exynos-spi),
+ COMPAT(SAMSUNG_EXYNOS5_DWMMC, samsung,exynos5250-dwmmc),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
--
1.8.0
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Re: [U-Boot] [PATCH V4 4/4] EXYNOS5: Add support for FIMD and DP
On Friday, December 21, 2012, Rajeshwari Birje wrote:
Hi Ajay
On Fri, Dec 21, 2012 at 4:05 PM, Ajay Kumar
ajaykumar...@samsung.comjavascript:;
wrote:
Add panel_info structure required by LCD driver
and DP panel platdata for SMDK5250.
Add GPIO configuration for LCD.
Enable FIMD and DP support on SMDK5250.
DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com javascript:;
Acked-by: Simon Glass s...@chomium.org javascript:;
---
board/samsung/smdk5250/smdk5250.c | 97
+
include/configs/smdk5250.h|8 +++
2 files changed, 105 insertions(+), 0 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index 4c50342..46fd2a5 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -24,12 +24,15 @@
#include asm/io.h
#include i2c.h
#include netdev.h
+#include lcd.h
#include spi.h
#include asm/arch/cpu.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
+#include asm/arch/power.h
#include asm/arch/pinmux.h
#include asm/arch/sromc.h
+#include asm/arch/dp_info.h
#include pmic.h
DECLARE_GLOBAL_DATA_PTR;
@@ -181,6 +184,100 @@ static int board_uart_init(void)
return 0;
}
+void cfg_lcd_gpio(void)
+{
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *)
samsung_get_base_gpio_part1();
+
+ /* For Backlight */
+ s5p_gpio_cfg_pin(gpio1-b2, 0, GPIO_OUTPUT);
+ s5p_gpio_set_value(gpio1-b2, 0, 1);
+
+ /* LCD power on */
+ s5p_gpio_cfg_pin(gpio1-x1, 5, GPIO_OUTPUT);
+ s5p_gpio_set_value(gpio1-x1, 5, 1);
+
+ /* Set Hotplug detect for DP */
+ s5p_gpio_cfg_pin(gpio1-x0, 7, GPIO_FUNC(0x3));
+}
Cant this GPIO changes go to pinmux file?
No it's smdk5250 specific. Other board has different GPIOs.
Thank you,
Kyungmin Park
+
+vidinfo_t panel_info = {
+ .vl_freq= 60,
+ .vl_col = 2560,
+ .vl_row = 1600,
+ .vl_width = 2560,
+ .vl_height = 1600,
+ .vl_clkp= CONFIG_SYS_LOW,
+ .vl_hsp = CONFIG_SYS_LOW,
+ .vl_vsp = CONFIG_SYS_LOW,
+ .vl_dp = CONFIG_SYS_LOW,
+ .vl_bpix= 4,/* LCD_BPP = 2^4, for output conosle on
LCD */
+
+ /* wDP panel timing infomation */
+ .vl_hspw= 32,
+ .vl_hbpd= 80,
+ .vl_hfpd= 48,
+
+ .vl_vspw= 6,
+ .vl_vbpd= 37,
+ .vl_vfpd= 3,
+ .vl_cmd_allow_len = 0xf,
+
+ .win_id = 3,
+ .cfg_gpio = cfg_lcd_gpio,
+ .backlight_on = NULL,
+ .lcd_power_on = NULL,
+ .reset_lcd = NULL,
+ .dual_lcd_enabled = 0,
+
+ .init_delay = 0,
+ .power_on_delay = 0,
+ .reset_delay= 0,
+ .interface_mode = FIMD_RGB_INTERFACE,
+ .dp_enabled = 1,
+};
+
+static struct edp_device_info edp_info = {
+ .disp_info = {
+ .h_res = 2560,
+ .h_sync_width = 32,
+ .h_back_porch = 80,
+ .h_front_porch = 48,
+ .v_res = 1600,
+ .v_sync_width = 6,
+ .v_back_porch = 37,
+ .v_front_porch = 3,
+ .v_sync_rate = 60,
+ },
+ .lt_info = {
+ .lt_status = DP_LT_NONE,
+ },
+ .video_info = {
+ .master_mode = 0,
+ .bist_mode = DP_DISABLE,
+ .bist_pattern = NO_PATTERN,
+ .h_sync_polarity = 0,
+ .v_sync_polarity = 0,
+ .interlaced = 0,
+ .color_space = COLOR_RGB,
+ .dynamic_range = VESA,
+ .ycbcr_coeff = COLOR_YCBCR601,
+ .color_depth = COLOR_8,
+ },
+};
+
+static struct exynos_dp_platform_data dp_platform_data = {
+ .phy_enable = set_dp_phy_ctrl,
+ .edp_dev_info = edp_info,
+};
+
+void init_panel_info(vidinfo_t *vid)
+{
+ vid-rgb_mode = MODE_RGB_P,
+
+ exynos_set_dp_platform_data(dp_platform_data);
+}
+
#ifdef CONFIG_SYS_I2C_INIT_BOARD
static int board_i2c_init(void)
{
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index e412da8..a9b3b8b 100644
--- a/inc--
Regards,
Rajeshwari Shinde
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Re: [U-Boot] [PATCH 2/2] EXYNOS5: Add gpio pin numbering feature
Hi,
On Wed, Dec 12, 2012 at 8:33 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch adds support for gpio pin numbering support on EXYNOS5
pinmux.
We already know that each exynos5 SoCs has different GPIO name and offsets.
So it's good time to use proper soc prefix. e.g., EXYNOS5250_*.
Since only exynos5250 is mainlined at this time.
Thank you,
Kyungmin Park
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c | 148 +
arch/arm/include/asm/arch-exynos/gpio.h | 360
++-
2 files changed, 413 insertions(+), 95 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index f02f441..9b4355a 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -28,89 +28,77 @@
static void exynos5_uart_config(int peripheral)
{
- struct exynos5_gpio_part1 *gpio1 =
- (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
- struct s5p_gpio_bank *bank;
int i, start, count;
switch (peripheral) {
case PERIPH_ID_UART0:
- bank = gpio1-a0;
- start = 0;
+ start = GPIO_A00;
count = 4;
break;
case PERIPH_ID_UART1:
- bank = gpio1-d0;
- start = 0;
+ start = GPIO_D00;
count = 4;
break;
case PERIPH_ID_UART2:
- bank = gpio1-a1;
- start = 0;
+ start = GPIO_A10;
count = 4;
break;
case PERIPH_ID_UART3:
- bank = gpio1-a1;
- start = 4;
+ start = GPIO_A14;
count = 2;
break;
}
for (i = start; i start + count; i++) {
- s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ gpio_set_pull(i, GPIO_PULL_NONE);
+ gpio_cfg_pin(i, GPIO_FUNC(0x2));
}
}
static int exynos5_mmc_config(int peripheral, int flags)
{
- struct exynos5_gpio_part1 *gpio1 =
- (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
- struct s5p_gpio_bank *bank, *bank_ext;
- int i, start = 0, gpio_func = 0;
+ int i, start, start_ext, gpio_func = 0;
switch (peripheral) {
case PERIPH_ID_SDMMC0:
- bank = gpio1-c0;
- bank_ext = gpio1-c1;
- start = 0;
+ start = GPIO_C00;
+ start_ext = GPIO_C10;
gpio_func = GPIO_FUNC(0x2);
break;
case PERIPH_ID_SDMMC1:
- bank = gpio1-c2;
- bank_ext = NULL;
+ start = GPIO_C20;
+ start_ext = 0;
break;
case PERIPH_ID_SDMMC2:
- bank = gpio1-c3;
- bank_ext = gpio1-c4;
- start = 3;
+ start = GPIO_C30;
+ start_ext = GPIO_C43;
gpio_func = GPIO_FUNC(0x3);
break;
case PERIPH_ID_SDMMC3:
- bank = gpio1-c4;
- bank_ext = NULL;
+ start = GPIO_C40;
+ start_ext = 0;
break;
}
- if ((flags PINMUX_FLAG_8BIT_MODE) !bank_ext) {
+ if ((flags PINMUX_FLAG_8BIT_MODE) !start_ext) {
debug(SDMMC device %d does not support 8bit mode,
peripheral);
return -1;
}
if (flags PINMUX_FLAG_8BIT_MODE) {
- for (i = start; i = (start + 3); i++) {
- s5p_gpio_cfg_pin(bank_ext, i, gpio_func);
- s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
- s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ for (i = start_ext; i = (start_ext + 3); i++) {
+ gpio_cfg_pin(i, gpio_func);
+ gpio_set_pull(i, GPIO_PULL_UP);
+ gpio_set_drv(i, GPIO_DRV_4X);
}
}
for (i = 0; i 2; i++) {
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
- s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
- s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ gpio_cfg_pin(start + i, GPIO_FUNC(0x2));
+ gpio_set_pull(start + i, GPIO_PULL_NONE);
+ gpio_set_drv(start + i, GPIO_DRV_4X);
}
for (i = 3; i = 6; i++) {
- s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
- s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
- s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ gpio_cfg_pin
Re: [U-Boot] [PATCH 2/5] EXYNOS5: Add pinmux for LCD
Hi,
On Tue, Dec 11, 2012 at 8:01 PM, Ajay Kumar ajaykumar...@samsung.com wrote:
This patch adds pinmux configuration for backlight, LCD reset
and HPD for DP panel on Exynos5 SMDK.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c| 20
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index f02f441..84f52ea 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -284,6 +284,23 @@ void exynos5_spi_config(int peripheral)
}
}
+void exynos5_lcd_config()
missing void
+{
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+ /* For Backlight */
+ s5p_gpio_cfg_pin(gpio1-b2, 0, GPIO_OUTPUT);
+ s5p_gpio_set_value(gpio1-b2, 0, 1);
+
+ /* LCD power on */
+ s5p_gpio_cfg_pin(gpio1-x1, 5, GPIO_OUTPUT);
+ s5p_gpio_set_value(gpio1-x1, 5, 1);
+
+ /* Set Hotplug detect for DP */
+ s5p_gpio_cfg_pin(gpio1-x0, 7, GPIO_FUNC(0x3));
It should be SMDK5250 specific codes, it can't located at common file.
Thank you,
Kyungmin Park
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -321,6 +338,9 @@ static int exynos5_pinmux_config(int peripheral, int
flags)
case PERIPH_ID_SPI4:
exynos5_spi_config(peripheral);
break;
+ case PERIPH_ID_LCD:
+ exynos5_lcd_config();
+ break;
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 13abd2d..446f5c9 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -54,6 +54,7 @@ enum periph_id {
PERIPH_ID_UART1,
PERIPH_ID_UART2,
PERIPH_ID_UART3,
+ PERIPH_ID_LCD,
PERIPH_ID_COUNT,
PERIPH_ID_NONE = -1,
--
1.7.1
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Re: [U-Boot] [PATCH 1/2] EXYNOS5: Add pinmux for VBus
On Mon, Dec 3, 2012 at 10:18 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch sets pinmux for VBus of USB.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c| 10 ++
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index f9f6911..d65ffc7 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -285,6 +285,14 @@ void exynos5_spi_config(int peripheral)
}
}
+void exynos5_usb20_config(void)
+{
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+ /* Enable VBUS power switch */
+ s5p_gpio_direction_output(gpio1-x2,6, 1);
it seems to be board specific GPIO value. doesn't it?
Thank you,
Kyungmin Park
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -322,6 +330,8 @@ static int exynos5_pinmux_config(int peripheral, int
flags)
case PERIPH_ID_SPI4:
exynos5_spi_config(peripheral);
break;
+ case PERIPH_ID_USB20:
+ exynos5_usb20_config();
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 783b77c..84593f6 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -46,6 +46,7 @@ enum periph_id {
PERIPH_ID_SPI0 = 68,
PERIPH_ID_SPI1,
PERIPH_ID_SPI2,
+ PERIPH_ID_USB20,
PERIPH_ID_SDMMC0 = 75,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
--
1.7.4.4
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Re: [U-Boot] [PATCH 1/2] EXYNOS5: Add pinmux for VBus
On Mon, Dec 3, 2012 at 10:38 PM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Kyungmin Park,
On Mon, Dec 3, 2012 at 7:00 PM, Kyungmin Park kmp...@infradead.org wrote:
On Mon, Dec 3, 2012 at 10:18 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch sets pinmux for VBus of USB.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c| 10 ++
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index f9f6911..d65ffc7 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -285,6 +285,14 @@ void exynos5_spi_config(int peripheral)
}
}
+void exynos5_usb20_config(void)
+{
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+ /* Enable VBUS power switch */
+ s5p_gpio_direction_output(gpio1-x2,6, 1);
it seems to be board specific GPIO value. doesn't it?
Yes it is smdk5250 specific.
So it's not proper place to add.
Thank you,
Kyungmin Park
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -322,6 +330,8 @@ static int exynos5_pinmux_config(int peripheral, int
flags)
case PERIPH_ID_SPI4:
exynos5_spi_config(peripheral);
break;
+ case PERIPH_ID_USB20:
+ exynos5_usb20_config();
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 783b77c..84593f6 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -46,6 +46,7 @@ enum periph_id {
PERIPH_ID_SPI0 = 68,
PERIPH_ID_SPI1,
PERIPH_ID_SPI2,
+ PERIPH_ID_USB20,
PERIPH_ID_SDMMC0 = 75,
PERIPH_ID_SDMMC1,
PERIPH_ID_SDMMC2,
--
1.7.4.4
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Regards,
Rajeshwari shinde.
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Re: [U-Boot] [PATCH] EXYNOS: Add L2 Cache Support.
On Thu, Nov 29, 2012 at 5:12 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch set adds L2 Cache Support to EXYNOS.
Signed-off-by: Arun Mankuzhi aru...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/soc.c | 36
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/soc.c b/arch/arm/cpu/armv7/exynos/soc.c
index ab65b8d..a45bbfb 100644
--- a/arch/arm/cpu/armv7/exynos/soc.c
+++ b/arch/arm/cpu/armv7/exynos/soc.c
@@ -23,6 +23,14 @@
#include common.h
#include asm/io.h
+#include asm/system.h
+
+enum l2_cache_params {
+ CACHE_TAG_RAM_SETUP = (19),
+ CACHE_DATA_RAM_SETUP = (15),
+ CACHE_TAG_RAM_LATENCY = (26),
+ CACHE_DATA_RAM_LATENCY = (20)
+};
void reset_cpu(ulong addr)
{
@@ -36,3 +44,31 @@ void enable_caches(void)
dcache_enable();
}
#endif
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+/*
+ * Set L2 cache parameters
+ */
+static void exynos5_set_l2cache_params(void)
+{
+ unsigned int val = 0;
+
+ asm volatile(mrc p15, 1, %0, c9, c0, 2\n : =r(val));
+
+ val |= CACHE_TAG_RAM_SETUP |
+ CACHE_DATA_RAM_SETUP |
+ CACHE_TAG_RAM_LATENCY |
+ CACHE_DATA_RAM_LATENCY;
+
+ asm volatile(mcr p15, 1, %0, c9, c0, 2\n : : r(val));
+}
+
+/*
+ * Sets L2 cache related parameters before enabling data cache
+ */
+void v7_outer_cache_enable(void)
+{
if (soc_is_exynos5250())
+ exynos5_set_l2cache_params();
Since it's not working at exynos4
Thank you,
Kyungmin Park
+}
+#endif
+
--
1.7.4.4
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Re: [U-Boot] [PATCH 2/4] Exynos5: Add base addresses for SATA
Hi,
On Thu, Nov 22, 2012 at 10:41 PM, Vasanth Ananthan
vasanthanant...@gmail.com wrote:
This patch adds the macro definition of SATA controller and PHY controller
base addresses.
Signed-off-by: Vasanth Ananthan vasant...@samsung.com
---
arch/arm/include/asm/arch-exynos/cpu.h|3 +++
arch/arm/include/asm/arch-exynos/periph.h |1 +
2 files changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index d1b2ea8..11265ea 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -91,6 +91,9 @@
#define EXYNOS5_GPIO_PART2_BASE0x1340
#define EXYNOS5_FIMD_BASE 0x1440
#define EXYNOS5_DP_BASE0x145B
+#define EXYNOS5_SATA_BASE 0x122F
+#define EXYNOS5_SATA_PHY_BASE 0x1217
+#define EXYNOS5_SATA_PHY_I2C 0x121D
Can you add it address order as others?
#define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index 13abd2d..58dc675 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -54,6 +54,7 @@ enum periph_id {
PERIPH_ID_UART1,
PERIPH_ID_UART2,
PERIPH_ID_UART3,
+ PERIPH_ID_SATA,
PERIPH_ID_COUNT,
PERIPH_ID_NONE = -1,
--
1.7.9.5
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Re: [U-Boot] [PATCH] arm: trats: Power down core 1
FYI: Piotr and Lukasz are working together for samsung board. Minkyu, can you pick up this patch? Thank you, Kyungmin Park -Original Message- From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net] Sent: Wednesday, October 10, 2012 2:07 AM To: Piotr Wilczek Cc: u-boot@lists.denx.de; Kyungmin Park; Lukasz Majewski Subject: Re: [U-Boot] [PATCH] arm: trats: Power down core 1 Hi Piotr, On Tue, 09 Oct 2012 08:45:42 +0200, Piotr Wilczek p.wilc...@samsung.com wrote: This patch turns power down for unused core 1 Signed-off-by: Piotr Wilczek p.wilc...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com CC: Minkyu Kang mk7.k...@samsung.com --- board/samsung/trats/trats.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index 57400ce..d5c681c 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c @@ -321,6 +321,10 @@ static void board_power_init(void) writel(0, (unsigned int)pwr-lcd1_configuration); writel(0, (unsigned int)pwr-gps_configuration); writel(0, (unsigned int)pwr-gps_alive_configuration); + + /* It is necessary to power down core 1 */ + /* to successfully boot CPU1 in kernel */ + writel(0, (unsigned int)pwr-arm_core1_configuration); } static void board_uart_init(void) Cc:ing trats maintainer. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot/master slight regression with trats
On 10/2/12, Lukasz Majewski l.majew...@samsung.com wrote: Hi Tom, On Mon, Oct 01, 2012 at 12:25:34PM +0200, Lukasz Majewski wrote: Hi all, On Sat, 29 Sep 2012 17:17:48 +0200 Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi all, On Sat, 29 Sep 2012 12:32:36 +0200, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hello, While merging u-boot-arm/master and u-boot/master I have noticed one slight regression apparently coming from u-boot: $ cat LOG/trats.ERR cmd_fat.c: In function ???do_fat_fswrite???: cmd_fat.c:178:8: warning: unused variable ???ep??? [-Wunused-variable] ep should have disappeared along with the code which used it, but somehow resurfaced (I suspect it did in a merge). This warning is not seen in u-boot-arm. Amicalement, Seems Heungjun Kim riverful@samsung.com is now a dead address. Anatolij, I see you've sent out a patch. Does it mean you would act as a maintainer for trats? Otherwise the board should be made orphan. Dear all, I was on a holidays :-). I can test if Trats is working. I posses one, so there is no problem with that :-). I will fix Trats ASAP. I've just tested TRATS with the newest origin/master (SHA1: 4668a086bb0a769b741e3a4ffab85f1c41c7cdb8 ) It builds without errors/warinigs I do not have a trats board, so I can't do tests and act as a maintainer for it. Lukasz (on Cc) recently submitted some patches for trats, maybe he knows who could become new maintainer for trats board? Ah, but would you be willing to take the MAINTAINER spot for the board? Thanks! I can serve as a maintainer for the board - I posses one and I actively develop and test code for it. No problem with that. Acked-by: Kyungmin Park kyungmin.p...@samsung.com Note that Mr. Kim left the company and Lukasz can take over trats board support. Thank you, Kyungmin Park -- Best regards, Lukasz Majewski Samsung Poland RD Center | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] EXYNOS: additional Exynos4 SoC series support
);
+ break;
+ default:
+ debug(%s: invalid peripheral %d, __func__, peripheral);
+ return -1;
+ }
+
+ return 0;
+}
+
static void exynos5_uart_config(int peripheral)
{
struct exynos5_gpio_part1 *gpio1 =
@@ -269,6 +508,8 @@ int exynos_pinmux_config(int peripheral, int flags)
{
if (cpu_is_exynos5())
return exynos5_pinmux_config(peripheral, flags);
+ else if (cpu_is_exynos4())
+ return exynos4_pinmux_config(peripheral, flags);
else {
debug(pinmux functionality not supported\n);
return -1;
diff --git a/arch/arm/include/asm/arch-exynos/clock.h
b/arch/arm/include/asm/arch-exynos/clock.h
index fce38ef..e238810 100644
--- a/arch/arm/include/asm/arch-exynos/clock.h
+++ b/arch/arm/include/asm/arch-exynos/clock.h
@@ -57,10 +57,20 @@ struct exynos4_clock {
unsigned char res16[0xec];
unsigned intepll_con0;
unsigned intepll_con1;
+#ifdef CONFIG_EXYNOS4210
like above, how about to define 4412 specific clock? e.g., exynos4412_clock?
unsigned char res17[0x8];
+#else
+ unsigned intepll_con2;
+ unsigned char res17[0x4];
+#endif
unsigned intvpll_con0;
unsigned intvpll_con1;
+#ifdef CONFIG_EXYNOS4210
unsigned char res18[0xe8];
+#else
+ unsigned intvpll_con2;
+ unsigned char res18[0xe4];
+#endif
unsigned intsrc_top0;
unsigned intsrc_top1;
unsigned char res19[0x8];
@@ -161,7 +171,16 @@ struct exynos4_clock {
unsigned char res38[0x8c];
unsigned intclkout_cmu_top;
unsigned intclkout_cmu_top_div_stat;
+#ifdef CONFIG_EXYNOS4210
unsigned char res39[0x37f8];
+#else
+ unsigned char res39[0x3600];
+ unsigned intmpll_lock;
+ unsigned char res3a[0xfc];
+ unsigned intmpll_con0;
+ unsigned intmpll_con1;
+ unsigned char res3b[0xf0];
+#endif
unsigned intsrc_dmc;
unsigned char res40[0xfc];
unsigned intsrc_mask_dmc;
@@ -195,14 +214,22 @@ struct exynos4_clock {
unsigned intmaxperf;
unsigned char res51[0x2f78];
unsigned intapll_lock;
+#ifdef CONFIG_EXYNOS4210
unsigned char res52[0x4];
unsigned intmpll_lock;
+#else
+ unsigned char res52[0x8];
+#endif
unsigned char res53[0xf4];
unsigned intapll_con0;
unsigned intapll_con1;
+#ifdef CONFIG_EXYNOS4210
unsigned intmpll_con0;
unsigned intmpll_con1;
unsigned char res54[0xf0];
+#else
+ unsigned char res54[0xf8];
+#endif
unsigned intsrc_cpu;
unsigned char res55[0x1fc];
unsigned intmux_stat_cpu;
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 2cd4ae1..d1117c0 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -55,7 +55,11 @@
#define EXYNOS4_MODEM_BASE 0x13A0
#define EXYNOS4_USBPHY_CONTROL 0x10020704
+#ifdef CONFIG_EXYNOS4412
+#define EXYNOS4_GPIO_PART4_BASE 0x106E
+#else
#define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE
+#endif
if it's only valid at exynos4412, then make it variable and configure
it at runtime
e.g.,
#define EXYNOS4412_GPIO_PART4_BASE 0x106E
#define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE
int exynos4_get_gpio_part4_base(void)
{
if (cpu_is_exynos4412())
return EXYNOS4412_GPIO_PART4_BASE;
return EXYNOS4_GPIO_PART4_BASE;
}
Thank you,
Kyungmin Park
#define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE
/* EXYNOS5 */
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index 97be4ea..9539aa0 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -49,6 +49,9 @@ struct exynos4_gpio_part1 {
struct s5p_gpio_bank f1;
struct s5p_gpio_bank f2;
struct s5p_gpio_bank f3;
+ struct s5p_gpio_bank res1[2];
+ struct s5p_gpio_bank j0;
+ struct s5p_gpio_bank j1;
};
struct exynos4_gpio_part2 {
@@ -68,7 +71,13 @@ struct exynos4_gpio_part2 {
struct s5p_gpio_bank y4;
struct s5p_gpio_bank y5;
struct s5p_gpio_bank y6;
- struct s5p_gpio_bank res1[80];
+ struct s5p_gpio_bank res1[3];
+ struct s5p_gpio_bank m0;
+ struct s5p_gpio_bank m1;
+ struct s5p_gpio_bank m2;
+ struct s5p_gpio_bank m3;
+ struct s5p_gpio_bank m4;
+ struct s5p_gpio_bank res2[72];
struct s5p_gpio_bank x0;
struct s5p_gpio_bank x1;
struct s5p_gpio_bank x2;
@@ -79,6 +88,16 @@ struct exynos4_gpio_part3 {
struct s5p_gpio_bank z;
};
+struct exynos4_gpio_part4 {
+ struct s5p_gpio_bank v0;
+ struct s5p_gpio_bank v1
Re: [U-Boot] [PATCH] disk: generate GUID Partiton Tables
On 8/10/12, Wolfgang Denk w...@denx.de wrote: Dear Donghwa Lee, In message 4fa08f0a.6040...@samsung.com you wrote: This patch manipulates GUID Papartition Tables. I send this patch on behalf of Gwuieon Jin. Signed-off-by: Gwuieon Jin ge@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- disk/part_efi.c | 107 +++ disk/part_efi.h |2 + include/part.h |2 + 3 files changed, 111 insertions(+), 0 deletions(-) diff --git a/disk/part_efi.c b/disk/part_efi.c index b6cda57..ce25ad5 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -433,4 +433,111 @@ static int is_pte_valid(gpt_entry * pte) return 1; } } + +void set_gpt_table(block_dev_desc_t *dev_desc, unsigned int part_start_lba, +int parts, unsigned int *blocks, unsigned int *part_offset) Is there any code anywhere that actually calls this function? I cannot see it, and we don't add dead code... It used at generating partition when new partition information downloaded by USB. and it's preperation patch for it. However, as you concerns thses codes are not yet posted. it will send patches together next time. Thank you, Kyungmin Park Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If a computer can't directly address all the RAM you can use, it's just a toy. - anonymous comp.sys.amiga posting, non-sequitir ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/3] create lib/tizen directory
On 5/14/12, Mike Frysinger vap...@gentoo.org wrote: On Monday 14 May 2012 01:37:10 Kyungmin Park wrote: On 5/14/12, Mike Frysinger vap...@gentoo.org wrote: On Thursday 10 May 2012 01:23:40 Donghwa Lee wrote: Makefile |1 + include/libtizen.h | 30 + lib/tizen/Makefile | 46 + lib/tizen/tizen.c | 40 + lib/tizen/tizen_hd_logo.h | 5071 lib/tizen/tizen_hd_logo_data.h | 30 + do you really need your own lib/tizen/ dir for a logo ? every one who doesn't build this still has to waste time going into lib/tizen/ to create an empty object. at least make the addition of lib/tizen/ depend on CONFIG_TIZEN too. It uses the same method as others does. e.g., libfdt In Makefile LIBS += lib/libfdt/libfdt.o In lib/libfdt/Makefile SOBJS = COBJS-libfdt += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o COBJS-$(CONFIG_OF_LIBFDT) += $(COBJS-libfdt) COBJS-$(CONFIG_FIT) += $(COBJS-libfdt) the difference is they have more than one CONFIG symbol going on, and their code base is sizable, and many arches/boards utilize it. you're adding a single file with a single function with a single CONFIG knob for a single board. Right, So we asked it first, which directory is proper. and suggested that the create the lib/tizen instead of others. since it's not platform, nor soc specific. Of course this suggestion from Wolfgang. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/3] create lib/tizen directory
Hi, On 5/14/12, Mike Frysinger vap...@gentoo.org wrote: On Thursday 10 May 2012 01:23:40 Donghwa Lee wrote: Makefile |1 + include/libtizen.h | 30 + lib/tizen/Makefile | 46 + lib/tizen/tizen.c | 40 + lib/tizen/tizen_hd_logo.h | 5071 lib/tizen/tizen_hd_logo_data.h | 30 + do you really need your own lib/tizen/ dir for a logo ? every one who doesn't build this still has to waste time going into lib/tizen/ to create an empty object. at least make the addition of lib/tizen/ depend on CONFIG_TIZEN too. It uses the same method as others does. e.g., libfdt In Makefile LIBS += lib/libfdt/libfdt.o In lib/libfdt/Makefile SOBJS = COBJS-libfdt += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o COBJS-$(CONFIG_OF_LIBFDT) += $(COBJS-libfdt) COBJS-$(CONFIG_FIT) += $(COBJS-libfdt) also, where are the boards that actually use this ? board/samsung/trats uses this logo. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/5] exynos5: Add system register structure
+ Minkyu,
On 5/3/12, Marek Vasut ma...@denx.de wrote:
Dear Rajeshwari Shinde,
This patch add structure for SYSREG.
Ccing Minkyu. Can I get your opinion on these patches please?
Signed-off-by: Che-Liang Chiou clch...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Reviewed-by: Vivek Gautam gautam.vi...@samsung.com
Reviewed-by: Simon Glass s...@chromium.org
---
arch/arm/include/asm/arch-exynos/sysreg.h | 43
+ 1 files changed, 43 insertions(+), 0
deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/sysreg.h
diff --git a/arch/arm/include/asm/arch-exynos/sysreg.h
b/arch/arm/include/asm/arch-exynos/sysreg.h new file mode 100644
index 000..aca4b2b
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/sysreg.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Register map for sysreg
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __EXYNOS5_SYSREG_H__
+#define __EXYNOS5_SYSREG_H__
+
+#ifndef __ASSEMBLY__
+/* sysreg map */
+struct exynos5_sysreg {
+/* Add registers as and when required */
+unsigned char res1[0x214];
+unsigned intdisp1blk_cfg;
+unsigned intdispblk_cfg2;
+unsigned inthdcp_e_fuse_mem_cfg;
+unsigned intgsclblk_cfg0;
+unsigned intgsclblk_cfg1;
+unsigned intispblk_cfg;
+unsigned intusb20_phy_cfg;
+unsigned char res2[0x29c];
+unsigned intmipi_dphy;
+unsigned intdptx_phy;
+unsigned intphyclk_sel;
+};
+#endif
+
+#endif
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 0/5] exynos5: usb: Enable USB 2.0 support
Hi, Can you share the purpose of USB host support at bootloader? Just curious. Thank you, Kyungmin Park On 5/2/12, Rajeshwari Shinde rajeshwar...@samsung.com wrote: This patchset series adds support to enable USB 2.0 on smdk5250. It includes addition of system and power management registers, functions to enable and disable power to the USB host controller. This patchset is based on: USB: S5P: Add ehci support.patch Rajeshwari Shinde (5): exynos5: Add system register structure exynos5: Add structure for PMU register exynos5: Add power Enable/Disable for USB-EHCI exynos5: usb: Fix incorrect USB base addresses exynos5: usb: Enable USB 2.0 on smdk5250 arch/arm/cpu/armv7/exynos/power.c | 59 +++ arch/arm/include/asm/arch-exynos/cpu.h|5 +- arch/arm/include/asm/arch-exynos/power.h | 627 + arch/arm/include/asm/arch-exynos/sysreg.h | 44 ++ drivers/usb/host/ehci-s5p.c |3 + include/configs/smdk5250.h|6 + 6 files changed, 742 insertions(+), 2 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/sysreg.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] cmd_fat: add FAT write command
Acked-by: Kyungmin Park kyungmin.p...@samsung.com Maybe some debug codes are included. On 3/26/12, Anatolij Gustschin ag...@denx.de wrote: On Mon, 26 Mar 2012 09:34:07 +0900 Kyungmin Park kyungmin.p...@samsung.com wrote: ... Hmm, emails to dg77@samsung.com address are now rejected: Recipient address rejected: User unknown (in reply to RCPT TO command) Hi, Hi, FYI: Now Mr. Kim is left the company. So if any issue and codes from Mr. Kim, then let me follow up. Thanks for the info. When compiling the FAT write code with newer GCC 4.6.1 I've seen some warnings and fixed them by this patch [1]. Could you please look at this patch and if it is okay, then send your Acked-by? Thank you, Kyungmin Park Thanks, Anatolij [1] http://patchwork.ozlabs.org/patch/148551/ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] cmd_fat: add FAT write command
On 3/25/12, Anatolij Gustschin ag...@denx.de wrote: On Thu, 22 Mar 2012 15:38:56 +0100 Maximilian Schwerin m...@tigris.de wrote: Once CONFIG_FAT_WRITE is defined, users can invoke 'fatwrite' command that saves data in RAM as a FAT file. This patch was originally part of http://article.gmane.org/gmane.comp.boot-loaders.u-boot/121847 Reported-by: Donggeun Kim dg77@samsung.com Cc: Kyungmin Park kyungmin.p...@samsung.com --- README |8 +- common/cmd_fat.c | 57 ++ 2 files changed, 63 insertions(+), 2 deletions(-) Applied to u-boot-staging/ag...@denx.de after fixing attribution tags and a typo. Thanks. Hmm, emails to dg77@samsung.com address are now rejected: Recipient address rejected: User unknown (in reply to RCPT TO command) Hi, FYI: Now Mr. Kim is left the company. So if any issue and codes from Mr. Kim, then let me follow up. Thank you, Kyungmin Park +printf(%ld bytes write\n, size); typo fixed, s/write/written/ Thanks, Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] EXYNOS: Rename exynos5_tzpc structure to s5p_tzpc
Hi Chander,
On Wed, Mar 14, 2012 at 10:14 PM, Chander Kashyap
chander.kash...@linaro.org wrote:
TZPC IP is common across S5P and Exynos based SoC'c. Renaming exynos5_tzpc
in arch/arm/include/asm/arch-exynos/tzpc.h to s5p_tzpc will allow generic
usase of tzpc.
Also modify board/samsung/smdk5250/tzpc_init.c to use s5p_tzpc.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/tzpc.h | 2 +-
board/samsung/smdk5250/tzpc_init.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h
b/arch/arm/include/asm/arch-exynos/tzpc.h
index 2c9a07b..63736ae 100644
--- a/arch/arm/include/asm/arch-exynos/tzpc.h
+++ b/arch/arm/include/asm/arch-exynos/tzpc.h
@@ -22,7 +22,7 @@
#define __TZPC_H_
#ifndef __ASSEMBLY__
-struct exynos5_tzpc {
+struct s5p_tzpc {
I think 'exynos' is preferable. Even though each SOC has different
number of tzpc. It can be covered one exynos_tzpc. or we can define
it for each SoC.
Thank you,
Kyungmin Park
unsigned int r0size;
char res1[0x7FC];
unsigned int decprot0stat;
diff --git a/board/samsung/smdk5250/tzpc_init.c
b/board/samsung/smdk5250/tzpc_init.c
index c2ccef3..03e46bb 100644
--- a/board/samsung/smdk5250/tzpc_init.c
+++ b/board/samsung/smdk5250/tzpc_init.c
@@ -28,7 +28,7 @@
/* Setting TZPC[TrustZone Protection Controller] */
void tzpc_init(void)
{
- struct exynos5_tzpc *tzpc;
+ struct s5p_tzpc *tzpc;
unsigned int addr;
for (addr = TZPC0_BASE; addr = TZPC9_BASE; addr += TZPC_BASE_OFFSET) {
--
1.7.5.4
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Re: [U-Boot] OneNAND custodian (was: Re: [RESEND 0/4] onenand: OneNAND board dependent probe and fixes for Samsung targets)
On 3/7/12, Scott Wood scottw...@freescale.com wrote: On 03/06/2012 12:54 AM, Lukasz Majewski wrote: This patch sets add board dependent onenand probes. Several fixes for GONI and Exynos4210 (C210_universal) targets have been added. Tested at: Samsung S5PC110 GONI Samsung Exynos4210 (S5PC210 Universal) Lukasz Majewski (4): onenand:samsung Target dependent OneNAND chip probe function onenand:samsung OneNAND chip probe functions added for GONI and Exynos4210 onenand: Replace ONENAND_IS_MLC() test with ONENAND_HAS_4KB() onenand: samsung: Enable support OneNAND support at Samsung's Exynos4210 Is anyone interested in being a OneNAND custodian? I've taken some OneNAND patches in the past, but it's a completely separate subsystem from NAND, and nobody seems interested in changing that. I not only have no hardware, but also no documentation other than marketing materials. I lack the context to properly review OneNAND patches. Thanks Scott. Now I'm no more work on OneNAND. It's almost fixed and no more new features. These patches are syncing internal tree with mainline one. and no more changes. So please until this time, handle this patches. Next time, Mr. Kang handle both samsung and onenand together. How do you think? Thank you, Kyungmin Park -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/4] Add SMDK5250 board support
On 1/10/12, Chander Kashyap chander.kash...@linaro.org wrote: Dear Simon, On 9 January 2012 23:25, Simon Glass s...@chromium.org wrote: Hi Chander, On Sun, Jan 8, 2012 at 10:40 PM, Chander Kashyap chander.kash...@linaro.org wrote: This patchset add support for Samsung's SMDK5250 board based on EXYNOS5250 based SoC. It also adds support for MMC SPL booting. The porting is done by Samsung engineers at HQ in System LSI Team. I am contributing in upstreaming the code for the board. Based upon discussions following patches are dropped in this version: Exynos: Add CONFIG_EXYNOS4 Macro to EXYNOS4 based boards Exynos: Clock.c: Replace exynos4 prefix with exynos SMDK5250: enable device tree support is squashed with EXYNOS: Add SMDK5250 board support Chander Kashyap (4): Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro ARM: EXYNOS: Add support for Exynos5 based SoCs EXYNOS: Add SMDK5250 board support EXYNOS: SMDK5250: Add MMC SPL support MAINTAINERS |1 + arch/arm/cpu/armv7/exynos/clock.c | 215 +- arch/arm/include/asm/arch-exynos/clock.h | 326 ++ arch/arm/include/asm/arch-exynos/cpu.h| 53 ++- arch/arm/include/asm/arch-exynos/gpio.h | 32 ++ board/samsung/smdk5250/Makefile | 64 +++ board/samsung/smdk5250/lowlevel_init.S| 528 ++ board/samsung/smdk5250/mem_setup.S| 600 + Are you planning to reimplement most of these two files in C as per Wolfgang's comments on the TRATS board, or is that a separate issue? Not as of now. We have 14K for spl. Using C style it might not fit into that. In case of trats implemented by C. it's not big. and I think it can fit SPL size limitation. Thank you, Kyungmin Park Regards, Simon board/samsung/smdk5250/mmc_boot.c | 58 +++ board/samsung/smdk5250/smdk5250.c | 125 + board/samsung/smdk5250/smdk5250_setup.h | 589 board/samsung/smdk5250/tools/mkexynos_image.c | 117 + boards.cfg|1 + include/configs/s5pc210_universal.h |1 + include/configs/smdk5250.h| 188 15 files changed, 2878 insertions(+), 20 deletions(-) create mode 100644 board/samsung/smdk5250/Makefile create mode 100644 board/samsung/smdk5250/lowlevel_init.S create mode 100644 board/samsung/smdk5250/mem_setup.S create mode 100644 board/samsung/smdk5250/mmc_boot.c create mode 100644 board/samsung/smdk5250/smdk5250.c create mode 100644 board/samsung/smdk5250/smdk5250_setup.h create mode 100644 board/samsung/smdk5250/tools/mkexynos_image.c create mode 100644 include/configs/smdk5250.h -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- with warm regards, Chander Kashyap ___ linaro-dev mailing list linaro-...@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] S5PC2XX: Rename S5pc2XX to exynos4
Hi,
New Cortex-A15 also uses the armv7. So it's better to use the exynos itself.
Just remove the number 4.
Thank you,
Kyungmin Park
On 11/25/11, Chander Kashyap chander.kash...@linaro.org wrote:
As per new conventions Samsung SoC's are named as Exynos.
Cortex-A9 based Soc's are named as exynos4. s5pc2xx is cortex-A9
based, hence renamed to exynos4. This is done as per kernel
naming convetions.
Similerly s5pc210 is now exynos4210. Hence S5PC210/s5pc210
suffix/prefix has been renamed to exynos4210/EXYNOS4210
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes for v2:
- Removed renaming of s5p-common to exynos4-common
- Renamed s5pc210 prefixes to exynos4210
Rebased on following commit.
19cdfd3e84bff108febb127b598ac3f1634c768c
Ethernut 5 board support
MAINTAINERS|6 +-
Makefile |2 +-
arch/arm/cpu/armv7/{s5pc2xx = exynos4}/Makefile |0
arch/arm/cpu/armv7/{s5pc2xx = exynos4}/clock.c| 50
arch/arm/cpu/armv7/{s5pc2xx = exynos4}/soc.c |0
.../asm/{arch-s5pc2xx = arch-exynos4}/adc.h |0
.../asm/{arch-s5pc2xx = arch-exynos4}/clk.h |0
.../asm/{arch-s5pc2xx = arch-exynos4}/clock.h |2 +-
.../asm/{arch-s5pc2xx = arch-exynos4}/cpu.h | 62
++--
.../asm/{arch-s5pc2xx = arch-exynos4}/gpio.h | 28 +-
.../asm/{arch-s5pc2xx = arch-exynos4}/mmc.h |0
.../asm/{arch-s5pc2xx = arch-exynos4}/pwm.h |0
.../asm/{arch-s5pc2xx = arch-exynos4}/sromc.h |0
.../asm/{arch-s5pc2xx = arch-exynos4}/sys_proto.h |0
.../asm/{arch-s5pc2xx = arch-exynos4}/uart.h |0
board/samsung/origen/lowlevel_init.S | 26
board/samsung/origen/mem_setup.S | 12 ++--
board/samsung/origen/origen.c |8 +-
board/samsung/origen/origen_setup.h|8 +-
board/samsung/smdkv310/lowlevel_init.S | 22
board/samsung/smdkv310/mem_setup.S |8 +-
board/samsung/smdkv310/smdkv310.c |8 +-
board/samsung/universal_c210/lowlevel_init.S | 24
board/samsung/universal_c210/universal.c |8 +-
boards.cfg |6 +-
include/configs/origen.h |6 +-
include/configs/s5pc210_universal.h| 10 ++--
include/configs/smdkv310.h |6 +-
28 files changed, 151 insertions(+), 151 deletions(-)
rename arch/arm/cpu/armv7/{s5pc2xx = exynos4}/Makefile (100%)
rename arch/arm/cpu/armv7/{s5pc2xx = exynos4}/clock.c (80%)
rename arch/arm/cpu/armv7/{s5pc2xx = exynos4}/soc.c (100%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/adc.h (100%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/clk.h (100%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/clock.h (99%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/cpu.h (64%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/gpio.h (83%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/mmc.h (100%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/pwm.h (100%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/sromc.h (100%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/sys_proto.h
(100%)
rename arch/arm/include/asm/{arch-s5pc2xx = arch-exynos4}/uart.h (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 37bbb34..d493e4e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -691,12 +691,12 @@ Minkyu Kang mk7.k...@samsung.com
SMDKC100ARM ARMV7 (S5PC100 SoC)
s5p_goniARM ARMV7 (S5PC110 SoC)
- s5pc210_universal ARM ARMV7 (S5PC210 SoC)
+ s5pc210_universal ARM ARMV7 (EXYNOS4210 SoC)
Chander Kashyap k.chan...@samsung.com
- origen ARM ARMV7 (S5PC210 SoC)
- SMDKV310ARM ARMV7 (S5PC210 SoC)
+ origen ARM ARMV7 (EXYNOS4210 SoC)
+ SMDKV310ARM ARMV7 (EXYNOS4210 SoC)
Torsten Koschorrek koschor...@synertronixx.de
scb9328 ARM920T (i.MXL)
diff --git a/Makefile b/Makefile
index fb658f4..646b105 100644
--- a/Makefile
+++ b/Makefile
@@ -296,7 +296,7 @@ endif
ifeq ($(SOC),s5pc1xx)
LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
endif
-ifeq ($(SOC),s5pc2xx)
+ifeq ($(SOC),exynos4)
LIBS += $(CPUDIR)/s5p-common/libs5p-common.o
endif
diff --git a/arch/arm/cpu/armv7/s5pc2xx/Makefile
b/arch/arm/cpu/armv7/exynos4/Makefile
similarity index 100%
rename from arch/arm/cpu/armv7/s5pc2xx/Makefile
rename to arch/arm/cpu/armv7/exynos4/Makefile
diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c
b/arch/arm/cpu/armv7/exynos4/clock.c
similarity index 80%
rename from arch/arm/cpu/armv7/s5pc2xx/clock.c
Re: [U-Boot] [PATCH 1/4] onenand:samsung Target dependent OneNAND chip probe function
On 11/20/11, Marek Vasut marek.va...@gmail.com wrote:
Separate callback for probing OneNAND memory chip.
If no special function is defined, default implementation will be used.
This approach gives more flexibility for OneNAND device probing.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
./tools/checkpatch.pl -
total: 0 errors, 0 warnings, 108 lines checked
NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX
MULTISTATEMENT_MACRO_USE_DO_WHILE
---
drivers/mtd/onenand/onenand_base.c | 43
+- drivers/mtd/onenand/samsung.c |
10
include/linux/mtd/onenand.h |1 +
include/linux/mtd/samsung_onenand.h |2 +
4 files changed, 49 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/onenand/onenand_base.c
b/drivers/mtd/onenand/onenand_base.c index 24e02c2..a557d48 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -2505,23 +2505,24 @@ out:
}
/**
- * onenand_probe - [OneNAND Interface] Probe the OneNAND device
+ * onenand_chip_probe - [OneNAND Interface] Probe the OneNAND chip
* @param mtd MTD device structure
*
* OneNAND detection method:
* Compare the the values from command with ones from register
*/
-static int onenand_probe(struct mtd_info *mtd)
+static int onenand_chip_probe(struct mtd_info *mtd)
{
struct onenand_chip *this = mtd-priv;
-int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
-int density;
+int bram_maf_id, bram_dev_id, maf_id, dev_id;
int syscfg;
/* Save system configuration 1 */
syscfg = this-read_word(this-base + ONENAND_REG_SYS_CFG1);
+
/* Clear Sync. Burst Read mode to read BootRAM */
-this-write_word((syscfg ~ONENAND_SYS_CFG1_SYNC_READ), this-base +
ONENAND_REG_SYS_CFG1); + this-write_word((syscfg
~ONENAND_SYS_CFG1_SYNC_READ),
+ this-base + ONENAND_REG_SYS_CFG1);
/* Send the command for reading device ID from BootRAM */
this-write_word(ONENAND_CMD_READID, this-base + ONENAND_BOOTRAM);
@@ -2546,13 +2547,38 @@ static int onenand_probe(struct mtd_info *mtd)
/* Read manufacturer and device IDs from Register */
maf_id = this-read_word(this-base + ONENAND_REG_MANUFACTURER_ID);
dev_id = this-read_word(this-base + ONENAND_REG_DEVICE_ID);
-ver_id = this-read_word(this-base + ONENAND_REG_VERSION_ID);
-this-technology = this-read_word(this-base + ONENAND_REG_TECHNOLOGY);
/* Check OneNAND device */
if (maf_id != bram_maf_id || dev_id != bram_dev_id)
return -ENXIO;
+return 0;
+}
+
+/**
+ * onenand_probe - [OneNAND Interface] Probe the OneNAND device
+ * @param mtd MTD device structure
+ *
+ * OneNAND detection method:
+ * Compare the the values from command with ones from register
+ */
+int onenand_probe(struct mtd_info *mtd)
+{
+struct onenand_chip *this = mtd-priv;
+int maf_id, dev_id, ver_id;
+int density;
+int ret;
+
+ret = this-chip_probe(mtd);
+if (ret)
+return ret;
+
+/* Read manufacturer and device IDs from Register */
+maf_id = this-read_word(this-base + ONENAND_REG_MANUFACTURER_ID);
+dev_id = this-read_word(this-base + ONENAND_REG_DEVICE_ID);
+ver_id = this-read_word(this-base + ONENAND_REG_VERSION_ID);
+this-technology = this-read_word(this-base + ONENAND_REG_TECHNOLOGY);
+
/* Flash device information */
mtd-name = onenand_print_device_info(dev_id, ver_id);
this-device_id = dev_id;
@@ -2659,6 +2685,9 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
if (!this-write_bufferram)
this-write_bufferram = onenand_write_bufferram;
+if (!this-chip_probe)
+this-chip_probe = onenand_chip_probe;
+
if (!this-block_markbad)
this-block_markbad = onenand_default_block_markbad;
if (!this-scan_bbt)
diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index 20b4912..1f4bd81 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -590,6 +590,16 @@ static void s3c_set_width_regs(struct onenand_chip
*this) }
#endif
+int s5pc110_chip_probe(struct mtd_info *mtd)
+{
+return 0;
+}
+
+int s5pc210_chip_probe(struct mtd_info *mtd)
+{
+return 0;
+}
+
Will there be a problem if you used the default chip_probe() method from the
driver ?
Samsung SoCs have their own OneNAND controller and difficult to access
OneNAND directly. instead it provides the registers which is mapped
OneNAND registers.
e.g., Manufacture ID, device ID and so on.
Yes it's Samsung SoCs specific. that's reason introduce chip_probe
function. it's same as kernel.
Thank you,
Kyungmin Park
void s3c_onenand_init(struct mtd_info *mtd)
{
struct onenand_chip *this = mtd-priv;
diff
Re: [U-Boot] [PATCH 3/4 V2] OneNAND: Add simple OneNAND SPL
Hi all,
Marek, did you see the onenand_ipl/onenand_read.c at u-boot? It's already
implemented and used for OneNAND boot.
How do you think migrate this file into generic SPL framework?
Thank you,
Kyungmin Park
-Original Message-
From: Marek Vasut [mailto:marek.va...@gmail.com]
Sent: Thursday, November 03, 2011 9:16 AM
To: Scott Wood
Cc: u-boot@lists.denx.de; Albert ARIBAUD; Kyungmin Park
Subject: Re: [PATCH 3/4 V2] OneNAND: Add simple OneNAND SPL
On 11/01/2011 05:54 PM, Marek Vasut wrote:
+static void spl_onenand_get_geometry(struct spl_onenand_data *data)
+{
[...]
+ /* The page can be either 2k or 4k, avoid using DIV_ROUND_UP. */
+ if (data.pagesize == 2048) {
+ total_pages = len / 2048;
+ page = offset / 2048;
+ total_pages += !!(len 2047);
+ } else if (data.pagesize == 4096) {
+ total_pages = len / 4096;
+ page = offset / 4096;
+ total_pages += !!(len 4095);
+ }
What's wrong with DIV_ROUND_UP? It should produce smaller code than
what you've done here...
It pulls in aeabi_*div* functions, which won't fit into block 0 of Onenand.
+ for (; page = total_pages; page++) {
+ block = page / ONENAND_PAGES_PER_BLOCK;
+ rpage = page (ONENAND_PAGES_PER_BLOCK - 1);
+ ret = spl_onenand_read_page(block, rpage, addr,
data.pagesize);
+ if (ret) {
+ total_pages++;
+ err |= 1;
+ } else
+ addr += data.pagesize / 4;
+ }
As discussed, please retain the existing block-skipping semantics. And
if you do skip a block, that's not an error to be propagated upward (as
opposed to something like an uncorrectable ECC error).
If one side of an if statement requires braces, both sides should have
them.
diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h
index 92279d5..fcb50ff 100644
--- a/include/onenand_uboot.h
+++ b/include/onenand_uboot.h
@@ -16,6 +16,8 @@
#include linux/types.h
+#ifndefCONFIG_SPL_BUILD
+
Please use a space rather than a tab after #define, #ifndef, etc.
/* Forward declarations */
struct mtd_info;
struct mtd_oob_ops;
@@ -52,4 +54,10 @@ extern int flexonenand_set_boundary(struct mtd_info
*mtd, int die,
extern void s3c64xx_onenand_init(struct mtd_info *);
extern void s3c64xx_set_width_regs(struct onenand_chip *);
+#else
+
+int spl_onenand_load_image(uint32_t dst, uint32_t offset, uint32_t
len);
+
+#endif
Why does this need to be ifdeffed at all? We normally don't ifdef
header declarations.
-Scott
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Re: [U-Boot] [PATCH] ubifs bad superblock bug
On Tue, Oct 4, 2011 at 6:08 PM, larsi la...@atlantis.wh2.tu-dresden.de wrote:
This patch fixes an issue when ubifs reads a bad superblock. Later it
tries to free memory, that was not allocated, which freezes u-boot.
This is fixed by looking for a non null pointer before free.
Signed-off-by: Lars Poeschel la...@wh2.tu-dresden.de
Cc: Kyungmin Park kmp...@infradead.org
---
The message I got before u-boot freezes:
UBI: max/mean erase counter: 53/32
UBIFS: mounted UBI device 0, volume 1, name rootfs
UBIFS: mounted read-only
UBIFS: file system size: 49140 bytes (50319360 KiB, 0 MiB, 49140 LEBs)
UBIFS: journal size: 49 bytes (6838272 KiB, 0 MiB, 6678 LEBs)
UBIFS: media format: w4/r0 (latest is w4/r0)
UBIFS: default compressor: LZO
UBIFS: reserved for root: 0 bytes (0 KiB)
UBIFS error (pid 0): ubifs_read_node: bad node type (255 but expected 9)
UBIFS error (pid 0): ubifs_read_node: bad node at LEB 330:13104
UBIFS error (pid 0): ubifs_iget: failed to read inode 1, error -22
Error reading superblock on volume 'ubi:rootfs'!
fs/ubifs/super.c | 6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c
index 63b2164..20fb244 100644
--- a/fs/ubifs/super.c
+++ b/fs/ubifs/super.c
@@ -848,8 +848,10 @@ void ubifs_umount(struct ubifs_info *c)
ubifs_debugging_exit(c);
/* Finally free U-Boot's global copy of superblock */
- free(ubifs_sb-s_fs_info);
- free(ubifs_sb);
+ if (ubifs_sb != null) {
+ free(ubifs_sb-s_fs_info);
+ free(ubifs_sb);
+ }
Which statement is problem? Basically free() check the null address.
so If ubifs_sb-s_fs_info doesn't have value its skipped. and ubifs_sb
is similar.
Thank you,
Kyungmin Park
}
/**
--
1.7.4.1
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Re: [U-Boot] How to use the NEON instruction at u-boot?
2010/11/11 Måns Rullgård m...@mansr.com:
Kyungmin Park kmp...@infradead.org writes:
Hi,
Now I'm trying to use the NEON instruction at u-boot. but it's failed
and got the data abort.
Are there any way to use the NEON instruction at u-boot?
No, just like you can't use floating-point.
I don't use the floating-point just use the 64 or 128 registers for memcpy.
The main purpose is to use the neon memcpy as below.
bge 1f
// copies 4 bytes, destination 32-bits aligned
vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
1: bcc 2f
Plain LDR/STR will be just as fast as that.
I saw you patches and the result using neon is better than ARM optimized memcpy.
Now I used the ARM optimized memcpy. and try to find a better solution as NEON.
Thank you,
Kyungmin Park
--
Måns Rullgård
m...@mansr.com
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Re: [U-Boot] How to use the NEON instruction at u-boot?
On Thu, Nov 11, 2010 at 5:58 PM, V, Aneesh ane...@ti.com wrote:
Hi Kyungmin Park,
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
boun...@lists.denx.de] On Behalf Of Kyungmin Park
Sent: Thursday, November 11, 2010 11:05 AM
To: u-boot@lists.denx.de
Cc: Minkyu Kang
Subject: [U-Boot] How to use the NEON instruction at u-boot?
Hi,
Now I'm trying to use the NEON instruction at u-boot. but it's
failed
and got the data abort.
Are there any way to use the NEON instruction at u-boot?
The main purpose is to use the neon memcpy as below.
bge 1f
// copies 4 bytes, destination 32-bits aligned
vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
1: bcc 2f
I am not sure if there is a valid use-case for this. But if you
are keen on using Neon you will have to enable the co-processor first.
Here is a piece of code I wrote for doing this in another bootloader.
#define VMSR_FPSCR_r0 dcd 0xeee80a10
#define VMRS_r0_FPSCR dcd 0xeef80a10
__asm uint32 enable_neon(void)
{
ldr r0, =0x00F0
MCR p15,0,r0,c1,c0,2 // CP15 Coprocessor Access Control Register
ldr r0, =0x4000
VMSR_FPSCR_r0
VMRS_r0_FPSCR
bx r14
}
Thanks
NEON instruction is working but need to debug to use it correctly.
I used it as below.
ldr r0, =0x00F0
mcr p15, 0, r0, c1, c0, 2
ldr r0, =0x4000
.word 0xeee80a10
.word 0xeef80a10
Thank you,
Kyungmin Park
This is written for RVCT tool chain. So you may have to convert it
for GCC. Also, my assembler didn't allow ARMv7 instructions. So, I
used DCD. You can either use .word in gcc or use the real instructions
if your assembler understands those instructions.
Thank you,
Kyungmin Park
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[U-Boot] How to use the NEON instruction at u-boot?
Hi,
Now I'm trying to use the NEON instruction at u-boot. but it's failed
and got the data abort.
Are there any way to use the NEON instruction at u-boot?
The main purpose is to use the neon memcpy as below.
bge 1f
// copies 4 bytes, destination 32-bits aligned
vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]!
vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
1: bcc 2f
Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCHv3 1/3] mtd: OneNAND: add support for OneNAND manufactured by Numonyx
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
On Mon, Oct 11, 2010 at 7:12 AM, Enric Balletbo i Serra
eballe...@gmail.com wrote:
This patch adds the Numonyx manufacturer code (0x20) to
onenand manufacturers.
Signed-off-by: Enric Balletbo i Serra eballe...@gmail.com
---
drivers/mtd/onenand/onenand_base.c | 1 +
include/linux/mtd/onenand.h | 1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/onenand/onenand_base.c
b/drivers/mtd/onenand/onenand_base.c
index f9273ab..24e02c2 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -2213,6 +2213,7 @@ char *onenand_print_device_info(int device, int version)
}
static const struct onenand_manufacturers onenand_manuf_ids[] = {
+ {ONENAND_MFR_NUMONYX, Numonyx},
{ONENAND_MFR_SAMSUNG, Samsung},
};
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 68e174e..5465562 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -154,6 +154,7 @@ struct onenand_chip {
/*
* OneNAND Flash Manufacturer ID Codes
*/
+#define ONENAND_MFR_NUMONYX 0x20
#define ONENAND_MFR_SAMSUNG 0xec
/**
--
1.7.0.4
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Re: [U-Boot] [PATCH 1/4] OneNAND: Move largepage_memorybased
Hi, I tested it with the latest u-boot codes. and without OneNAND patch, it's boot and working well. Of course I used the relocation method at u-boot. Thank you, Kyungmin Park On Tue, Oct 5, 2010 at 7:31 AM, Marek Vasut marek.va...@gmail.com wrote: Dne Po 4. října 2010 23:18:51 Scott Wood napsal(a): On Mon, 4 Oct 2010 23:15:11 +0200 Marek Vasut marek.va...@gmail.com wrote: Dne Po 4. října 2010 19:59:14 Scott Wood napsal(a): NACK, you're taking the address of stack data and using it after the stack frame goes away. The .data section doesn't exist at 0x0 (where the stuff is linked) when this code is executed in my case. So fix the linking. :-) I'd gladly accept any suggestion or if you could point me in a correct direction. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] OneNAND: Use generic_onenand_read_page in IPL
Hi,
No it's used another place. that's reason not static function pointer.
I'll update it soon.
Thank you,
Kyungmin Park
On Sun, Oct 3, 2010 at 2:33 AM, Marek Vasut marek.va...@gmail.com wrote:
There apparantly is no reason for having onenand_read_page abstracted.
Besides, it's static data which causes trouble.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
onenand_ipl/onenand_read.c | 9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index 8d0df81..008d73a 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -37,8 +37,6 @@
extern void *memcpy32(void *dest, void *src, int size);
#endif
-int (*onenand_read_page)(ulong block, ulong page, u_char *buf, int pagesize);
-
/* read a page with ECC */
static int generic_onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
@@ -122,8 +120,6 @@ int onenand_read_block(unsigned char *buf)
int pagesize, erasesize, erase_shift;
int page_is_4KiB = 0;
- onenand_read_page = generic_onenand_read_page;
-
onenand_generic_init(page_is_4KiB, page);
if (page_is_4KiB) {
@@ -139,10 +135,11 @@ int onenand_read_block(unsigned char *buf)
/* NOTE: you must read page from page 1 of block 0 */
/* read the block page by page */
+
for (block = 0; block nblocks; block++) {
for (; page ONENAND_PAGES_PER_BLOCK; page++) {
- if (onenand_read_page(block, page, buf + offset,
- pagesize)) {
+ if (generic_onenand_read_page(block, page,
+ buf + offset, pagesize)) {
/* This block is bad. Skip it
* and read next block */
offset -= page * pagesize;
--
1.7.1
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Re: [U-Boot] [PATCH 3/4] OneNAND: Introduce CONFIG_SYS_IPL_LOAD_ADDR
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
On Sun, Oct 3, 2010 at 2:33 AM, Marek Vasut marek.va...@gmail.com wrote:
This allows to specify where the OneNAND IPL should load the U-Boot binary.
The
purpose of CONFIG_SYS_LOAD_ADDR is different I believe.
On PXA, this is needed with OneNAND memories that expose only first 1kb of
data,
which is insufficient for SDRAM init. U-Boot can then be copied into SRAM.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
include/configs/apollon.h | 1 +
onenand_ipl/onenand_boot.c | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/configs/apollon.h b/include/configs/apollon.h
index c1295de..d34e24d 100644
--- a/include/configs/apollon.h
+++ b/include/configs/apollon.h
@@ -199,6 +199,7 @@
/* default load address */
#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0)
+#define CONFIG_SYS_IPL_LOAD_ADDR (OMAP2420_SDRC_CS0)
/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2)
* or by 32KHz clk, or from external sig. This rate is divided by a local
diff --git a/onenand_ipl/onenand_boot.c b/onenand_ipl/onenand_boot.c
index 22baebb..2a0c7ce 100644
--- a/onenand_ipl/onenand_boot.c
+++ b/onenand_ipl/onenand_boot.c
@@ -33,11 +33,11 @@ void start_oneboot(void)
{
uchar *buf;
- buf = (uchar *) CONFIG_SYS_LOAD_ADDR;
+ buf = (uchar *) CONFIG_SYS_IPL_LOAD_ADDR;
onenand_read_block(buf);
- ((init_fnc_t *)CONFIG_SYS_LOAD_ADDR)();
+ ((init_fnc_t *)CONFIG_SYS_IPL_LOAD_ADDR)();
/* should never come here */
}
--
1.7.1
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Re: [U-Boot] [PATCH 4/4] OneNAND: Use generic_onenand_read_page in IPL
Hi,
There's no OneNAND tree but all patches are mainlined by Scott Wood's tree.
And related with patch. I wonder why it's problem with your board?
As it's function pointer. It should be located the data section and it's
assigned at runtime.
Maybe your board runs the code at OneNAND directly. It's the reason do you need
to fixup.
I'll prepare the patches to fix this issue. So don't delete the codes.
Thank you,
Kyungmin Park
-Original Message-
From: Marek Vasut [mailto:marek.va...@gmail.com]
Sent: Monday, October 04, 2010 8:34 AM
To: Kyungmin Park
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH 4/4] OneNAND: Use generic_onenand_read_page in IPL
Dne Ne 3. října 2010 16:27:04 Marek Vasut napsal(a):
Dne Ne 3. října 2010 08:40:19 Kyungmin Park napsal(a):
Hi,
No it's used another place. that's reason not static function pointer.
I'll update it soon.
Hey, my problem is this code hangs my CPU. If I apply this patch, it
doesn't happen anymore.
Where is this used and what's your proposed change?
btw. who's the OneNAND maintainer (aka. who's supposed to pick up these changes
?)
Thank you in advance
Thank you,
Kyungmin Park
On Sun, Oct 3, 2010 at 2:33 AM, Marek Vasut marek.va...@gmail.com wrote:
There apparantly is no reason for having onenand_read_page
abstracted. Besides, it's static data which causes trouble.
Signed-off-by: Marek Vasut marek.va...@gmail.com
---
onenand_ipl/onenand_read.c |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index 8d0df81..008d73a 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -37,8 +37,6 @@
extern void *memcpy32(void *dest, void *src, int size);
#endif
-int (*onenand_read_page)(ulong block, ulong page, u_char *buf, int
pagesize); -
/* read a page with ECC */
static int generic_onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
@@ -122,8 +120,6 @@ int onenand_read_block(unsigned char *buf)
int pagesize, erasesize, erase_shift;
int page_is_4KiB = 0;
- onenand_read_page = generic_onenand_read_page;
-
onenand_generic_init(page_is_4KiB, page);
if (page_is_4KiB) {
@@ -139,10 +135,11 @@ int onenand_read_block(unsigned char *buf)
/* NOTE: you must read page from page 1 of block 0 */
/* read the block page by page */
+
for (block = 0; block nblocks; block++) {
for (; page ONENAND_PAGES_PER_BLOCK; page++) {
- if (onenand_read_page(block, page, buf +
offset, - pagesize)) {
+ if (generic_onenand_read_page(block, page,
+ buf + offset, pagesize)) {
/* This block is bad. Skip it
* and read next block */
offset -= page * pagesize;
--
1.7.1
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Re: [U-Boot] [PATCH] LZO: Add a LZO compression feature
Hi Wolfgang. On Fri, Oct 1, 2010 at 7:53 PM, Wolfgang Denk w...@denx.de wrote: Dear Donggeun Kim, In message 4ca5b732.3030...@samsung.com you wrote: In some case, LZO compression function is needed in U-Boot. Can you please explain what use cases you have in mind? There's request from other team. They want to transfer the binary but it's written as ubifs filesystem. So download the binary to RAM and then mkfs.ubifs at this address and ubinize it finally. Then write it to flash. When mkfs.ubifs, it requires it. So far, we provide only uncompression functions, and it seems nobody ever needed compression inside U-Boot yet? If we really add this, then please make it separately configurable, so that not everybody who wants LZO decompression always has to accept the compression functions, too. Agree, It will use the CONFIG_LZO_COMPRESSION This patch supports LZO compression feature which is originated from Linux kernel. ... --- /dev/null +++ b/lib/lzo/lzo1x_compress.c @@ -0,0 +1,219 @@ +/* + * LZO1X Compressor from MiniLZO + * + * Copyright (C) 1996-2005 Markus F.X.J. Oberhumer mar...@oberhumer.com + * + * The full LZO package can be found at: + * http://www.oberhumer.com/opensource/lzo/ + * + * Changed for kernel use by: + * Nitin Gupta nitingupta...@gmail.com + * Richard Purdie rpur...@openedhand.com + */ What exactly are the licensing terms? It's from kernel code. do you want to add the GPL v2? Thank you, Kyungmin Park Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Am I your nanny? The kernel is there to support user programs, but it's a _resource_ handler, not a baby feeder. - Linus Torvalds in pine.lnx.3.91.960425074845.22041c-100...@linux.cs.helsinki.fi ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] LZO: Add a LZO compression feature
On Fri, Oct 1, 2010 at 10:54 PM, Wolfgang Denk w...@denx.de wrote: Dear Kyungmin Park, In message aanlkti=hnkqfunozmrwgg_=ghjor6efigwwukggzc...@mail.gmail.com you wrote: There's request from other team. They want to transfer the binary but it's written as ubifs filesystem. So download the binary to RAM and then mkfs.ubifs at this address and ubinize it finally. Then write it to flash. When mkfs.ubifs, it requires it. You mean you want to add both support for ubinize and mkfs.ubifs to U-Boot? Would it not make more sense to boot a (minimal) Linux kernel for that purposes? Umm it's maybe difficult. This team don't use the linux and don't have linux environment. Only generate binary it and remaining job are done by each product team. The even worse there's no console when they are use it. Enter the download mode and send the image to target. Of course this method is not visible to their. and no behavior changed to our environment. Thank you, Kyungmin Park What exactly are the licensing terms? It's from kernel code. do you want to add the GPL v2? I think we should do that (if that's what the original code is released under; I'm not so certain), to make things clear. Then just add the It's from linux kernel Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There's always been Tower of Babel sort of bickering inside Unix, but this is the most extreme form ever. This means at least several years of confusion. - Bill Gates, founder and chairman of Microsoft, about the Open Systems Foundation ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Multiple binaries built through u-boot source
On Tue, Sep 14, 2010 at 4:16 PM, Stefan Roese s...@denx.de wrote: Hi Vipin, On Tuesday 14 September 2010 07:22:10 Vipin Kumar wrote: This is about a generic problem which may also be faced by other developers. Our SoC has a masked bootrom area which copies an image from NOR/NAND memories to an internal embedded SRAM. The size of this SRAM is only 8K. This binary initializes the DDR for larger binaries (u-boot/OS) to be placed in RAM and executed from there. I wanted to know if there is a generic way to create two binaries from the u-boot source both compiled for different address ranges. The first initializes the RAM (may be something else as well) and the second is the u-boot binary responsible for loading OS etc. Take a look at the NAND_SPL infrastructure (nand_spl/*). It was created for platforms booting from NAND with tight restrictions (e.g. 4k image size for inital setup, mostly DDR). General idea here is that 2 images are created: a) Very small SPL (secondary program loader) image with only basic setup, like DDR and NAND b) RAM based U-Boot image Both images are combined in the build process creating a single image that can be flashed into NAND. doc/README.nand-boot-ppc440 might be interesting to get some more infos about this, some of it PPC4xx specific though. Same method. OneNAND IPL (2KiB, 8KiB or 16KiB) combined with u-boot.bin and generate u-boot-onenand.bin OneNAND IPL (at SRAM) load the u-boot.bin to DRAM and jump to u-boot address. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Multiple binaries built through u-boot source
On Tue, Sep 14, 2010 at 10:51 PM, Stefan Roese s...@denx.de wrote: Hi Aneesh, On Tuesday 14 September 2010 15:33:53 V, Aneesh wrote: I wanted to know if there is a generic way to create two binaries from the u-boot source both compiled for different address ranges. The first initializes the RAM (may be something else as well) and the second is the u-boot binary responsible for loading OS etc. It's sheer coincidence that I also wanted to post a very similar query today. We have a similar requirement for OMAP platforms. Presently, we are maintaining a mini bootloader(called x-loader, based on u-boot)separately. We want to integrate x-loader with u-boot and up-stream the source code. That's definitely a good idea. Take a look at the NAND_SPL infrastructure (nand_spl/*). It was created for platforms booting from NAND with tight restrictions (e.g. 4k image size for inital setup, mostly DDR). General idea here is that 2 images are created: a) Very small SPL (secondary program loader) image with only basic setup, like DDR and NAND b) RAM based U-Boot image Both images are combined in the build process creating a single image that can be flashed into NAND. doc/README.nand-boot-ppc440 might be interesting to get some more infos about this, some of it PPC4xx specific though. This looks promising. However, our SPL has to load u-boot from MMC. Is it OK to keep it under nand_spl directory or should we create something like 'mmc_spl'? Good question, It created the mmc_ipl and use it for mmc booting e.g., eMMC boot. Not sure. Perhaps we should now really think about a more generic approach and merge all this IPL/SPL stuff into a single directory. Perhaps something like this: spl/ spl/nand spl/onenand spl/mmc spl/board Good, and use the CONFIG_PRELOADER as existing. but what's the SPL stand for? SPL (secondary program loader)? Thank you, Kyungmin Park ... Comments welcome. Cheers, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Multiple binaries built through u-boot source
On Tue, Sep 14, 2010 at 11:22 PM, Vaibhav Bedia vaibhav.be...@gmail.com wrote: On Tue, Sep 14, 2010 at 7:03 PM, V, Aneesh ane...@ti.com wrote: Hi, -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot- boun...@lists.denx.de] On Behalf Of Vipin Kumar Sent: Tuesday, September 14, 2010 3:52 PM To: Stefan Roese Cc: u-boot@lists.denx.de; Shiraz HASHIM Subject: Re: [U-Boot] Multiple binaries built through u-boot source On 9/14/2010 12:46 PM, Stefan Roese wrote: Hello Stefan, On Tuesday 14 September 2010 07:22:10 Vipin Kumar wrote: This is about a generic problem which may also be faced by other developers. Our SoC has a masked bootrom area which copies an image from NOR/NAND memories to an internal embedded SRAM. The size of this SRAM is only 8K. This binary initializes the DDR for larger binaries (u-boot/OS) to be placed in RAM and executed from there. I wanted to know if there is a generic way to create two binaries from the u-boot source both compiled for different address ranges. The first initializes the RAM (may be something else as well) and the second is the u-boot binary responsible for loading OS etc. It's sheer coincidence that I also wanted to post a very similar query today. We have a similar requirement for OMAP platforms. Presently, we are maintaining a mini bootloader(called x-loader, based on u-boot)separately. We want to integrate x-loader with u-boot and up-stream the source code. Take a look at the NAND_SPL infrastructure (nand_spl/*). It was created for platforms booting from NAND with tight restrictions (e.g. 4k image size for inital setup, mostly DDR). General idea here is that 2 images are created: a) Very small SPL (secondary program loader) image with only basic setup, like DDR and NAND b) RAM based U-Boot image Both images are combined in the build process creating a single image that can be flashed into NAND. doc/README.nand-boot-ppc440 might be interesting to get some more infos about this, some of it PPC4xx specific though. This looks promising. However, our SPL has to load u-boot from MMC. Is it OK to keep it under nand_spl directory or should we create something like 'mmc_spl'? Best regards, Aneesh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Hi, On TI's OMAP based devices there is a minimal bootloader called as xloader based on U-Boot. It which takes care of initializing the RAM and loads the U-Boot binary built from the denx tree. The directory structure, ONENAND_spl does seem to based on xloader from the info by the author in the source code. Right, First OneNAND IPL based on x-loader and used for OMAP2 board. and I integrate it into u-boot as onenand_ipl. To reduce the code size, I introduced the CONFIG_ONENAND_IPL and someone change it to CONFIG_PRELOADER for use both NAND and OneNAND. Although it is possible to achieve significant size reduction by making minimal changes to the U-Boot code, problems come in when we have to selectively include some features and not make use of the whole framework due to the size limitation of the initial program loader. OneNAND IPL ues the symlink method and compile the code only when CONFIG_PRELOADER is defined. you can find it at arm/*/start.S. As I remover arm1176 and armv7 support it. Thank you, Kyungmin Park Since the directory structure, the build system and flow of xloader is similar to U-Boot.. how about leveraging this for making the spl generic? If linking against the various drivers directly instead of using the whole framework is fine then we could have a common source for both the initial loader and full fledged U-Boot. -- Regards, Vaibhav ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Multiple binaries built through u-boot source
On Tue, Sep 14, 2010 at 11:26 PM, Stefan Roese s...@denx.de wrote: Hi Kyungmin, On Tuesday 14 September 2010 16:18:00 Kyungmin Park wrote: This looks promising. However, our SPL has to load u-boot from MMC. Is it OK to keep it under nand_spl directory or should we create something like 'mmc_spl'? Good question, It created the mmc_ipl and use it for mmc booting e.g., eMMC boot. mmc_ipl? This is not in mainline yet. Right, I will tell the person to posting it. Not sure. Perhaps we should now really think about a more generic approach and merge all this IPL/SPL stuff into a single directory. Perhaps something like this: spl/ spl/nand spl/onenand spl/mmc spl/board Good, and use the CONFIG_PRELOADER as existing. but what's the SPL stand for? SPL (secondary program loader)? Correct. That's how IBM/AMCC called this code first loaded from NAND in their documentation. IPL (Initial Program Loader) was used for the ROM code inside the SoC, loading this SPL code from NAND. Please note that I don't have a strong preference here. We could also call this first loader stage in the U-Boot source IPL. But we should move to one name and stop mixing these names. Okay first explain our case. BootROM code - Initial Program Loader (runs on OneNAND 1KiB or internal RAM) - u-boot (secondary bootloader). IPL configure the DRAM and loads the secondary bootloader, u-boot and jump it. It's another story but I introduce the fastboot between IPL and u-boot. So if normal boot, fastboot load the kernel and jump it. if not, e.g., debug or usb download. then jump to u-boot and handle it. In this case I call it Second BootLoader (SBL). I also don't preference. just decide and use it. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] USB CDC branch
On Wed, Jul 14, 2010 at 4:48 AM, Remy Bohmer li...@bohmer.net wrote: Hi, 2010/7/13 Vitaly Kuzmichev vkuzmic...@mvista.com: FYI I'm doing some work on this branch too. Great! Actually I have ported it to 2010.03 What do you mean with ported to 2010.03? It was already working on latest git, do you mean you backported it to an older version? (I would not expect this would be a big difference though) added RNDIS support Is RNDIS working stable? We had quite some troubles with it, especially with BSODs on those Windows boxes... The device unplug/plug behaviour was a pain for RNDIS, hence the reason why we removed that from the code. But, I do not want to scare you off from this rndis work, please continue. Maybe you can get it to work properly :-) We use it to communicate with a CDC driver on a Windows XP-embedded host (http://www.thesycon.de/eng/usb_cdcecm.shtml). CDC works much more stable, and much more faster compared to rndis. We also implemented the CDC and RNDIS on our board and working well. If you merge your usb gadget tree then we will send the patches also. To Minkyu, Can you prepare the patches and send to u-boot? Thank you, Kyungmin Park and made integration into 'usb' command. Great! However these changes aren't tested yet so the work is still under progress. Probably someone knows about any possible issues with CDC/RNDIS support? See above. and CDC is working stable, no known issues with it. At least one hint: First get CDC working on your hardware before you start to connect rndis, that would allow you to get the udc driver and all other levels of SW working properly and that you would only need to focus on rndis protocol rarities after that. And to prevent that you are debugging all kinds of undocumented rndis calls from the Windows host you could use a Linux host instead with the Linux-rndis-usb-host driver ;-) And also I would like to know the answers to Stefano's questions. See my other reply. I would suggest to merge all work in progress in the u-boot-usb/CDC branch from which we push it to mainline. Kind regards, Remy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot: Beagle board as a USB Mass Storage Device Class
Hi, On Fri, Jun 11, 2010 at 10:13 PM, Gupta, Ajay Kumar ajay.gu...@ti.com wrote: Hi, Thanks for your response. I want to tell few more things about our implementation. Actually we are planning to simulate (but not implement) the file system and implement the SCSI transparent command set decoder. When ever a file You can also use USB DFU for this where you can transfer files to RAM or NAND partitions. DFU is not yet supported in Denx's uboot tree but is Available in openmoko's tree [http://git.openmoko.org/?p=u-boot.git;a=summary]. You will have to port back DFU feature from openmoko to Denx's tree. Thanks for the hint Ajay. Let me add that DFU is also a standard protocol: http://www.usb.org/developers/devclass_docs/DFU_1.1.pdf So many people will be able to enjoy this in addition to solving this very specific problem of Yogesh. Detlev, Actually I have ported DFU from openmoko to Denx tree and used it on OMAP3EVM. I hope it should work just fine on Beagle as well. Will it be ok if I submit those patches to Denx's tree? Is there anyone Already working on this? Good news, can you post it? we just start to implement it s5pc110. we hope to use it. Thank you, Kyungmin Park I have seen below page with the same proposal from Mike. http://elinux.org/CELF_Project_Proposal/Add_DFU_support_to_U-Boot Mike, Are you working on this? Regards, Ajay Cheers Detlev -- It's very important that you sleep because that's when your brain is garbage collecting. And a dream is if you are interrupted in the middle and have junk left in the registers. -- Gerald Sussman -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] UBI: initialise update marker
Deal all, Sent. Thank you, Kyungmin Park On Sat, Jun 12, 2010 at 4:32 AM, Wolfgang Denk w...@denx.de wrote: Dear Kyungmin Stefan,K In message aanlktikrmmd7hb6j8veb5xycp5rfy7rswpxxcbp3n...@mail.gmail.com Karl Beldan wrote: I suggest someone apply commit ff99879 from Linux. I think this is a good idea. If you ACK, I can pull in this directly. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de He had quite a powerful intellect, but it was as powerful like a locomotive, and ran on rails and was therefore almost impossible to steer. - Terry Pratchett, _Lords and Ladies_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] UBI: initialise update marker
From: Peter Horton z...@colonel-panic.org UBI: initialise update marker The in kernel copy of a volume's update marker is not initialised from the volume table. This means that volumes where an update was unfinnished will not be treated as forbidden to use. This is basically that the update functionality was broken. Signed-off-by: Peter Horton z...@colonel-panic.org Signed-off-by: Artem Bityutskiy artem.bityuts...@nokia.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c index 1afc61e..4004402 100644 --- a/drivers/mtd/ubi/vtbl.c +++ b/drivers/mtd/ubi/vtbl.c @@ -566,6 +566,7 @@ static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si, vol-reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs); vol-alignment = be32_to_cpu(vtbl[i].alignment); vol-data_pad = be32_to_cpu(vtbl[i].data_pad); + vol-upd_marker = vtbl[i].upd_marker; vol-vol_type = vtbl[i].vol_type == UBI_VID_DYNAMIC ? UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME; vol-name_len = be16_to_cpu(vtbl[i].name_len); ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] UBI: initialise update marker
From: Peter Horton z...@colonel-panic.org UBI: initialise update marker The in kernel copy of a volume's update marker is not initialised from the volume table. This means that volumes where an update was unfinnished will not be treated as forbidden to use. This is basically that the update functionality was broken. Signed-off-by: Peter Horton z...@colonel-panic.org Signed-off-by: Artem Bityutskiy artem.bityuts...@nokia.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c index 1afc61e..4004402 100644 --- a/drivers/mtd/ubi/vtbl.c +++ b/drivers/mtd/ubi/vtbl.c @@ -566,6 +566,7 @@ static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si, vol-reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs); vol-alignment = be32_to_cpu(vtbl[i].alignment); vol-data_pad = be32_to_cpu(vtbl[i].data_pad); + vol-upd_marker = vtbl[i].upd_marker; vol-vol_type = vtbl[i].vol_type == UBI_VID_DYNAMIC ? UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME; vol-name_len = be16_to_cpu(vtbl[i].name_len); ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Support similar boards at same board file?
Hi, My bet is goni. Since it's new GPIO based board. Thank you, Kyungmin Park -Original Message- From: Minkyu Kang [mailto:proms...@gmail.com] Sent: Tuesday, May 25, 2010 12:38 PM To: Wolfgang Denk Cc: u-boot@lists.denx.de; 박경민 Subject: Re: Support similar boards at same board file? Dear Wolfgang Denk, On 25 May 2010 05:50, Wolfgang Denk w...@denx.de wrote: Dear Minkyu Kang, In message AANLkTinxDyzb6NiN8KBFl9V_lmu7mW0G8Kv- c6qga...@mail.gmail.com you wrote: I will post two boards aquila and goni. (s5pc110 soc) These board are very similar and can detect the board by gpio. (at runtime) So, I want to support these two boards at same board file. Thus, I will use same binary at two boards. ... Question... How I can configure the board directory? board/samsung/aquila or board/samsung/goni? or need another naming for two boards? Use either name (but don't invent a third one). Which one to use - that's your choice. I cannot answer this. If one of the two boards is more general or more popular than the other, then use this one. OK. Thanks. Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] RFC: U-Boot OneNAND IPL TEXT_BASE
On Sun, May 2, 2010 at 3:39 PM, Marek Vasut marek.va...@gmail.com wrote:
Dne Ne 2. května 2010 05:54:41 Kyungmin Park napsal(a):
Hi,
Which CPU do you use? In most ARM cpu, CPU load the IPL into its
internal SRAM, and runs at here.
PXA270 ... the BootRAM is mapped to 0x0 and the code runs from there.
But in your case it's not. So you maybe redefine IPL address.
Instead of modifying the config.mk, how about to define IPL_TEXT_BASE.
e.g.,
In OneNAND IPL code,
#ifndef BOARD_IPL_TEXT_BASE
#define ONENAND_IPL_TEXT_BASE BOARD_IPL_TEXT_BASE
#endif
That won't help -- TEXT_BASE is used while compiling start.S (to setup stack
under TEXT_BASE) and the config.mk prepares the gcc options for start.S (the
TEXT_BASE is defined in the gcc options).So modifying config.mk is
unavoidable I
fear.
Sorry my mistake. It's already supported at current drivers. Now I
works on s5pc100 and s5pc110 and each define it's TEXT_BASE at
onenand_ipl/board/samsung/${board_name}/config.mk. and it's used at
start.S
No need to modify config.mk and Makefile. If you need I can't send a
sample files to you.
Thank you,
Kyungmin Park
The thing we can do is define STACK_TOP_BASE and that'd certainly do the
trick!
This would allow me to point stack into SRAM, while running the IPL code from
BootRAM. Of course, in case STACK_TOP_BASE wasn't defined, it'd fall back to
the
old code in start.S. This would of course work without modifying config.mk
and I
start to like such a solution.
Hm?
load IPL code ONENAND_IPL_TEXT_BASE instead of current code.
Thank you,
Kyungmin Park
Thanks!
On Sat, May 1, 2010 at 11:48 AM, Marek Vasut marek.va...@gmail.com wrote:
Hey,
I've been tinkering with OneNAND IPL in uboot. I found out it wan't to
load itself to the address specified in board/$(BOARDDIR)/config.mk .
That's fine in most cases, but in my case that wasn't possible.
In my case, SDRAM init didn't fit into the IPL, so I had to copy U-Boot
into SRAM, then execute it and let it relocate itself into SDRAM. One
more time: IPL: OneNAND-SRAM
U-Boot: SRAM-SDRAM
It all works fine, but when compiling the IPL, I had to alter TEXT_BASE
not to point into SDRAM but SRAM too (because of stack). I introduced a
variable called IPL which allows using config.mk from (for example)
onenand-
ipl/board/$(BOARDDIR)/config.mk rather than the
board/$(BOARDDIR)/config.mk one, which is in my opinion a correct
behaviour.
Any opinions?
Thanks in advance.
diff --git a/config.mk b/config.mk
index 73b5195..8639580 100644
--- a/config.mk
+++ b/config.mk
@@ -130,9 +130,13 @@ BOARDDIR = $(VENDOR)/$(BOARD)
else
BOARDDIR = $(BOARD)
endif
+ifdef IPL
+sinclude $(TOPDIR)/$(IPL)/board/$(BOARDDIR)/config.mk # include IPL
specific rules
+else
ifdef BOARD
sinclude $(TOPDIR)/board/$(BOARDDIR)/config.mk # include board specific
rules endif
+endif
#
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Re: [U-Boot] RFC: U-Boot OneNAND IPL TEXT_BASE
Hi, Which CPU do you use? In most ARM cpu, CPU load the IPL into its internal SRAM, and runs at here. But in your case it's not. So you maybe redefine IPL address. Instead of modifying the config.mk, how about to define IPL_TEXT_BASE. e.g., In OneNAND IPL code, #ifndef BOARD_IPL_TEXT_BASE #define ONENAND_IPL_TEXT_BASE BOARD_IPL_TEXT_BASE #endif load IPL code ONENAND_IPL_TEXT_BASE instead of current code. Thank you, Kyungmin Park On Sat, May 1, 2010 at 11:48 AM, Marek Vasut marek.va...@gmail.com wrote: Hey, I've been tinkering with OneNAND IPL in uboot. I found out it wan't to load itself to the address specified in board/$(BOARDDIR)/config.mk . That's fine in most cases, but in my case that wasn't possible. In my case, SDRAM init didn't fit into the IPL, so I had to copy U-Boot into SRAM, then execute it and let it relocate itself into SDRAM. One more time: IPL: OneNAND-SRAM U-Boot: SRAM-SDRAM It all works fine, but when compiling the IPL, I had to alter TEXT_BASE not to point into SDRAM but SRAM too (because of stack). I introduced a variable called IPL which allows using config.mk from (for example) onenand- ipl/board/$(BOARDDIR)/config.mk rather than the board/$(BOARDDIR)/config.mk one, which is in my opinion a correct behaviour. Any opinions? Thanks in advance. diff --git a/config.mk b/config.mk index 73b5195..8639580 100644 --- a/config.mk +++ b/config.mk @@ -130,9 +130,13 @@ BOARDDIR = $(VENDOR)/$(BOARD) else BOARDDIR = $(BOARD) endif +ifdef IPL +sinclude $(TOPDIR)/$(IPL)/board/$(BOARDDIR)/config.mk # include IPL specific rules +else ifdef BOARD sinclude $(TOPDIR)/board/$(BOARDDIR)/config.mk # include board specific rules endif +endif # ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Custodian for SMDK 6410, 6400, C100 and C110 boards
Hi, We got the several samsung SoC board, just send your patch and can test it with our board And current samsung SoC maintainer for u-boot is Minkyu Kang. Thank you, Kyungmin Park. On Mon, Jan 11, 2010 at 7:50 PM, Naveen Krishna Ch naveenkrishna...@gmail.com wrote: Hi Liakhovetski, I learnt you maintained for SMDK6400 board. Can you give me some pointers of how can i submit patches that would add support for SMDK 6410. 2010/1/11 Wolfgang Denk w...@denx.de Dear Naveen Krishna Ch, In message ef0d8a251001110152y1891bc55l5783116c8a529...@mail.gmail.com you wrote: I need some information. 1) Who is maintaining the U-Boot for above mentioned boards The list of maintainers can be found in the MAINTAINERS file. It contains entries for SMDK6400 and SMDKC100. If no maintainer is listed, the custodian for Samsung processors is the next person in the chain of responsibilites; the custodians are listed here: http://www.denx.de/wiki/U-Boot/Custodians 2) In case if no one is maintaining. Can i submit the patches to this list ? You can always submit patches - no matter if there is an official maintainer or not. All contributions are welcome. 3) I need some time to prepare the patches test (Can't make it before 18th Jan 2010) So, Should i have to wait till the next Merge window is opened Or can i send them so that some one for review fix bugs. Unless your patches are clear and isolated bug fixes they will only be included in the next version if submitted after the merge window was closed. But you can submit patches any time you want. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Like winter snow on summer lawn, time past is time gone. -- Shine bright, (: Naveen Krishna Ch :) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] [OneNAND] Flex-OneNAND driver support
H Scott,
If you you don't mind, I'm okay to this patch. Can you merge it?
Thank you,
Kyungmin Park
On Wed, Nov 4, 2009 at 2:00 PM, Amul Kumar Saha amul.s...@samsung.com wrote:
Hi Scott,
+static loff_t flexonenand_addr(struct onenand_chip *this, int block)
+{
+ loff_t ofs = 0;
+ int die = 0, boundary;
+
+ if (ONENAND_IS_DDP(this) block = this-density_mask) {
+ block -= this-density_mask;
+ die = 1;
+ ofs = this-diesize[0];
+ }
+
+ boundary = this-boundary[die];
+ ofs += block (this-erase_shift - 1);
+ if (block (boundary + 1))
+ ofs += (block - boundary - 1) (this-erase_shift - 1);
+ return ofs;
You're missing some (loff_t) casts that are in Linux, here and elsewhere.
Accepted and corrected
+inline loff_t onenand_addr(struct onenand_chip *this, int block)
This is not a header file; let GCC decide when to inline. Note that this
function is not specified as inline in Linux.
Accepted and corrected
There are some other fairly significant differences with Linux later in
the patch -- is this due to missing functionality that u-boot doesn't
need, or something else?
Yes, there are certain functionalities that OneNAND doesn't need in U-Boot.
Sending the updated patches.
Regards,
Amul Kumar Saha
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Re: [U-Boot] [PATCH] OneNAND partial read/write support
On Wed, Oct 21, 2009 at 7:48 AM, Scott Wood scottw...@freescale.com wrote:
On Mon, Oct 12, 2009 at 04:27:10PM +0900, Kyungmin Park wrote:
Now OneNAND handles block operation only.
With this patch OneNAND handles all read/write size.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c
index 9090940..2b8f01b 100644
--- a/common/cmd_onenand.c
+++ b/common/cmd_onenand.c
@@ -36,7 +36,7 @@ static inline int str2long(char *p, ulong *num)
return (*p != '\0' *endptr == '\0') ? 1 : 0;
}
-static int arg_off_size(int argc, char *argv[], ulong *off, size_t *size)
+static int arg_off_size(int argc, char *argv[], ulong *off, ssize_t *size)
{
if (argc = 1) {
if (!(str2long(argv[0], off))) {
Are you expecting negative sizes?
I don't know why these are implemented. it's existing one.
@@ -69,61 +69,65 @@ static int arg_off_size(int argc, char *argv[], ulong
*off, size_t *size)
return 0;
}
-static int onenand_block_read(loff_t from, size_t len,
- size_t *retlen, u_char *buf, int oob)
+static int onenand_block_read(loff_t from, ssize_t len,
+ ssize_t *retlen, u_char *buf, int oob)
{
Is it still onenand_block_read if you don't have to read a whole block?
struct onenand_chip *this = mtd-priv;
- int blocks = (int) len this-erase_shift;
int blocksize = (1 this-erase_shift);
loff_t ofs = from;
struct mtd_oob_ops ops = {
.retlen = 0,
};
+ ssize_t thislen;
int ret;
- if (oob)
- ops.ooblen = blocksize;
- else
- ops.len = blocksize;
+ while (len 0) {
+ thislen = min_t(ssize_t, len, blocksize);
+ thislen = ALIGN(thislen, mtd-writesize);
- while (blocks) {
ret = mtd-block_isbad(mtd, ofs);
if (ret) {
printk(Bad blocks %d at 0x%x\n,
(u32)(ofs this-erase_shift), (u32)ofs);
- ofs += blocksize;
+ ofs += thislen;
continue;
}
- if (oob)
+ if (oob) {
ops.oobbuf = buf;
- else
+ ops.ooblen = thislen;
+ } else {
ops.datbuf = buf;
+ ops.len = thislen;
thislen can be greater than len, in which case you'll be overflowing buf.
No, len is unsigned int, but thislen is int. and can't overflow since.
it's size down with blocksize at min macro.
If you want to allow partial page reads, you need to allocate a temporary
buffer at some point. If not (I don't see a huge need), the ALIGN()
should be an error check instead.
Does this code handle being given an offset that is not at a block (or
page) boundary? It doesn't look like it (it will try to read across
block boundaries).
Basically it reads/writes data based on block. but last or first
partial read/writes support.
@@ -265,9 +276,10 @@ static int onenand_block_test(u32 start, u32 size)
goto next;
}
- if (memcmp(buf, verify_buf, blocksize))
+ if (memcmp(buf, verify_buf, blocksize)) {
printk(\nRead/Write test failed at 0x%x\n, (u32)ofs);
-
+ break;
+ }
@@ -322,6 +334,7 @@ static int onenand_dump(struct mtd_info *mtd, ulong off,
int only_oob)
p += 16;
}
puts(OOB:\n);
+ p = oobbuf;
i = mtd-oobsize 3;
while (i--) {
printf(\t%02x %02x %02x %02x %02x %02x %02x %02x\n,
@@ -339,7 +352,7 @@ int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc,
char *argv[])
struct onenand_chip *this;
int blocksize;
ulong addr, ofs;
- size_t len, retlen = 0;
+ ssize_t len, retlen = 0;
int ret = 0;
char *cmd, *s;
@@ -385,7 +398,8 @@ int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc,
char *argv[])
int erase;
erase = strcmp(cmd, erase) == 0; /* 1 = erase, 0 =
test */
- printf(\nOneNAND %s: , erase ? erase : test);
+ printf(\nOneNAND %s %s: , erase ? erase : test,
+ force ? force : );
These seem to be unrelated changes.
Right, but it's for exact display for user.
Thank you,
Kyungmin Park
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[U-Boot] [PATCH] OneNAND partial read/write support
Now OneNAND handles block operation only.
With this patch OneNAND handles all read/write size.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c
index 9090940..2b8f01b 100644
--- a/common/cmd_onenand.c
+++ b/common/cmd_onenand.c
@@ -36,7 +36,7 @@ static inline int str2long(char *p, ulong *num)
return (*p != '\0' *endptr == '\0') ? 1 : 0;
}
-static int arg_off_size(int argc, char *argv[], ulong *off, size_t *size)
+static int arg_off_size(int argc, char *argv[], ulong *off, ssize_t *size)
{
if (argc = 1) {
if (!(str2long(argv[0], off))) {
@@ -69,61 +69,65 @@ static int arg_off_size(int argc, char *argv[], ulong *off,
size_t *size)
return 0;
}
-static int onenand_block_read(loff_t from, size_t len,
- size_t *retlen, u_char *buf, int oob)
+static int onenand_block_read(loff_t from, ssize_t len,
+ ssize_t *retlen, u_char *buf, int oob)
{
struct onenand_chip *this = mtd-priv;
- int blocks = (int) len this-erase_shift;
int blocksize = (1 this-erase_shift);
loff_t ofs = from;
struct mtd_oob_ops ops = {
.retlen = 0,
};
+ ssize_t thislen;
int ret;
- if (oob)
- ops.ooblen = blocksize;
- else
- ops.len = blocksize;
+ while (len 0) {
+ thislen = min_t(ssize_t, len, blocksize);
+ thislen = ALIGN(thislen, mtd-writesize);
- while (blocks) {
ret = mtd-block_isbad(mtd, ofs);
if (ret) {
printk(Bad blocks %d at 0x%x\n,
(u32)(ofs this-erase_shift), (u32)ofs);
- ofs += blocksize;
+ ofs += thislen;
continue;
}
- if (oob)
+ if (oob) {
ops.oobbuf = buf;
- else
+ ops.ooblen = thislen;
+ } else {
ops.datbuf = buf;
+ ops.len = thislen;
+ }
ops.retlen = 0;
ret = mtd-read_oob(mtd, ofs, ops);
if (ret) {
printk(Read failed 0x%x, %d\n, (u32)ofs, ret);
- ofs += blocksize;
+ ofs += thislen;
continue;
}
- ofs += blocksize;
- buf += blocksize;
- blocks--;
+ ofs += thislen;
+ buf += thislen;
+ len -= thislen;
*retlen += ops.retlen;
}
return 0;
}
-static int onenand_block_write(loff_t to, size_t len,
- size_t *retlen, const u_char * buf)
+static int onenand_block_write(loff_t to, ssize_t len,
+ ssize_t *retlen, const u_char * buf)
{
struct onenand_chip *this = mtd-priv;
- int blocks = len this-erase_shift;
int blocksize = (1 this-erase_shift);
+ struct mtd_oob_ops ops = {
+ .retlen = 0,
+ .oobbuf = NULL,
+ };
loff_t ofs;
- size_t _retlen = 0;
+ ssize_t thislen;
int ret;
if (to == next_ofs) {
@@ -135,27 +139,34 @@ static int onenand_block_write(loff_t to, size_t len,
}
ofs = to;
- while (blocks) {
+ while (len 0) {
+ thislen = min_t(ssize_t, len, blocksize);
+ thislen = ALIGN(thislen, mtd-writesize);
+
ret = mtd-block_isbad(mtd, ofs);
if (ret) {
printk(Bad blocks %d at 0x%x\n,
(u32)(ofs this-erase_shift), (u32)ofs);
- skip_ofs += blocksize;
+ skip_ofs += thislen;
goto next;
}
- ret = mtd-write(mtd, ofs, blocksize, _retlen, buf);
+
+ ops.datbuf = (u_char *) buf;
+ ops.len = thislen;
+ ops.retlen = 0;
+ ret = mtd-write_oob(mtd, ofs, ops);
if (ret) {
printk(Write failed 0x%x, %d, (u32)ofs, ret);
- skip_ofs += blocksize;
+ skip_ofs += thislen;
goto next;
}
- buf += blocksize;
- blocks--;
- *retlen += _retlen;
+ buf += thislen;
+ len -= thislen;
+ *retlen += ops.retlen;
next:
- ofs += blocksize;
+ ofs += thislen;
}
return 0;
@@ -234,7 +245,7 @@ static int onenand_block_test(u32 start, u32 size)
end_block = mtd-size this-erase_shift;
blocks = start_block
Re: [U-Boot] [PATCH] Reduce apollon OneNAND IPL code
On Tue, Oct 13, 2009 at 1:48 AM, Scott Wood scottw...@freescale.com wrote: On Mon, Oct 12, 2009 at 09:17:49AM +0900, Kyungmin Park wrote: After OneNAND IPL updated, apollon boot code exceeds 1KiB size, This patch reduces the apollon boot code Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Should this go through NAND or ARM? anyone, but ARM is proper I think Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OneNAND partial read/write support
Hi,
If you use the gmail, Select the raw message, and copy and paste
Others are similar.
Don't copy html format to your text file.
Thank you,
Kyungmin Park
On Mon, Oct 12, 2009 at 5:51 PM, Tuma chernigovs...@spb.gs.ru wrote:
Hi, Kyungmin Park!
Thank you for patch!
But I have a question - how should I apply it?
Sorry, I'm not very skilled in UNIX/Linux.
I've saved all code from:
diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c
index 9090940..2b8f01b 100644
to:
if (arg_off_size(argc - o, argv + o, ofs, len) != 0)
into 1.patch file. Tryed to
patch -p1 /1.patch
from U-Boot directory, and get:
patching file common/cmd_onenand.c
patch: malformed patch at line 6: return (*p != '\0'
*endptr== '\0') ? 1 : 0;
I use U-Boot2009.08.rc2.
What is wrong?
Or maybe you could send me your full /common/cmd_onenand.c ?
On Monday 12 October 2009 11:27:10 Kyungmin Park wrote:
Now OneNAND handles block operation only.
With this patch OneNAND handles all read/write size.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c
index 9090940..2b8f01b 100644
--- a/common/cmd_onenand.c
+++ b/common/cmd_onenand.c
@@ -36,7 +36,7 @@ static inline int str2long(char *p, ulong *num)
return (*p != '\0' *endptr == '\0') ? 1 : 0;
}
-static int arg_off_size(int argc, char *argv[], ulong *off, size_t *size)
+static int arg_off_size(int argc, char *argv[], ulong *off, ssize_t *size)
{
if (argc = 1) {
if (!(str2long(argv[0], off))) {
@@ -69,61 +69,65 @@ static int arg_off_size(int argc, char *argv[], ulong
*off, size_t *size) return 0;
}
-static int onenand_block_read(loff_t from, size_t len,
- size_t *retlen, u_char *buf, int oob)
+static int onenand_block_read(loff_t from, ssize_t len,
+ ssize_t *retlen, u_char *buf, int oob)
{
struct onenand_chip *this = mtd-priv;
- int blocks = (int) len this-erase_shift;
int blocksize = (1 this-erase_shift);
loff_t ofs = from;
struct mtd_oob_ops ops = {
.retlen = 0,
};
+ ssize_t thislen;
int ret;
- if (oob)
- ops.ooblen = blocksize;
- else
- ops.len = blocksize;
+ while (len 0) {
+ thislen = min_t(ssize_t, len, blocksize);
+ thislen = ALIGN(thislen, mtd-writesize);
- while (blocks) {
ret = mtd-block_isbad(mtd, ofs);
if (ret) {
printk(Bad blocks %d at 0x%x\n,
(u32)(ofs this-erase_shift), (u32)ofs);
- ofs += blocksize;
+ ofs += thislen;
continue;
}
- if (oob)
+ if (oob) {
ops.oobbuf = buf;
- else
+ ops.ooblen = thislen;
+ } else {
ops.datbuf = buf;
+ ops.len = thislen;
+ }
ops.retlen = 0;
ret = mtd-read_oob(mtd, ofs, ops);
if (ret) {
printk(Read failed 0x%x, %d\n, (u32)ofs, ret);
- ofs += blocksize;
+ ofs += thislen;
continue;
}
- ofs += blocksize;
- buf += blocksize;
- blocks--;
+ ofs += thislen;
+ buf += thislen;
+ len -= thislen;
*retlen += ops.retlen;
}
return 0;
}
-static int onenand_block_write(loff_t to, size_t len,
- size_t *retlen, const u_char * buf)
+static int onenand_block_write(loff_t to, ssize_t len,
+ ssize_t *retlen, const u_char * buf)
{
struct onenand_chip *this = mtd-priv;
- int blocks = len this-erase_shift;
int blocksize = (1 this-erase_shift);
+ struct mtd_oob_ops ops = {
+ .retlen = 0,
+ .oobbuf = NULL,
+ };
loff_t ofs;
- size_t _retlen = 0;
+ ssize_t thislen;
int ret;
if (to == next_ofs) {
@@ -135,27 +139,34 @@ static int onenand_block_write(loff_t to, size_t len,
}
ofs = to;
- while (blocks) {
+ while (len 0) {
+ thislen = min_t(ssize_t, len, blocksize);
+ thislen = ALIGN(thislen, mtd-writesize);
+
ret = mtd-block_isbad(mtd, ofs);
if (ret) {
printk(Bad blocks %d at 0x%x\n,
(u32)(ofs this-erase_shift), (u32)ofs);
- skip_ofs += blocksize;
+ skip_ofs += thislen;
goto next;
}
- ret = mtd-write(mtd, ofs, blocksize, _retlen, buf
Re: [U-Boot] OneNAND operations.
Sorry for late reply. At current implementation. only block write supported. Of course, I wrote the partial write. I will post the latest patches. Sorry. Please wait until next Monday Thank you, Kyungmin Park On Thu, Oct 8, 2009 at 6:10 PM, Tuma chernigovs...@spb.gs.ru wrote: Hello, All! My next question is about OneNAND U-Boot operations. I use U-Boot 2009.08.rc2. There is onenand command: onenand read[.oob] addr off size read/write 'size' bytes starting at offset 'off' to/from memory address 'addr', skipping bad blocks. Can someone explain me how should I use it please? I try: onenand read 0x8000 0x0024 1000 0x8000 - is the address where data will be put? off (I use 0x0024 becouse I want to read OMAP3's environments) size is 0x1000 - just for example. And I get: OneNAND read: offset 0x24, size 0x1000 0 bytes read: OK What is wrong? And what is [.oob]? Thank you! -- Software Developer General Satellite Corp. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] [OneNAND IPL] OneNAND board init support
Some Samsung SoCs, s3c64xx, s5pc100 has own OneNAND controller
and different OneNAND access method.
To support this, each board has own init and set onenand_read_page for it.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index 8d0df81..47b60b3 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -110,6 +110,14 @@ static void onenand_generic_init(int *page_is_4KiB, int
*page)
*page_is_4KiB = 1;
}
+static int __onenand_board_init(int *page_is_4KiB, int *page)
+{
+ return 0;
+}
+
+int onenand_board_init(int *page_is_4KiB, int *page)
+ __attribute__((weak, alias(__onenand_board_init)));
+
/**
* onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining
* of OneNAND, skipping bad blocks
@@ -120,11 +128,13 @@ int onenand_read_block(unsigned char *buf)
int block, nblocks;
int page = CONFIG_ONENAND_START_PAGE, offset = 0;
int pagesize, erasesize, erase_shift;
- int page_is_4KiB = 0;
+ int page_is_4KiB = 0, ret;
onenand_read_page = generic_onenand_read_page;
- onenand_generic_init(page_is_4KiB, page);
+ ret = onenand_board_init(page_is_4KiB, page);
+ if (ret)
+ onenand_generic_init(page_is_4KiB, page);
if (page_is_4KiB) {
pagesize = 4096; /* OneNAND has 4KiB pagesize */
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Re: [U-Boot] [PATCH] [OneNAND IPL] OneNAND board init support
Sorry, there's typo.
Here's fixed patch.
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index 8d0df81..47b60b3 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -110,6 +110,14 @@ static void onenand_generic_init(int
*page_is_4KiB, int *page)
*page_is_4KiB = 1;
}
+static int __onenand_board_init(int *page_is_4KiB, int *page)
+{
+ return 0;
+}
+
+int onenand_board_init(int *page_is_4KiB, int *page)
+ __attribute__((weak, alias(__onenand_board_init)));
+
/**
* onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining
* of OneNAND, skipping bad blocks
@@ -120,11 +128,13 @@ int onenand_read_block(unsigned char *buf)
int block, nblocks;
int page = CONFIG_ONENAND_START_PAGE, offset = 0;
int pagesize, erasesize, erase_shift;
- int page_is_4KiB = 0;
+ int page_is_4KiB = 0, ret;
onenand_read_page = generic_onenand_read_page;
- onenand_generic_init(page_is_4KiB, page);
+ ret = onenand_board_init(page_is_4KiB, page);
+ if (!ret)
+ onenand_generic_init(page_is_4KiB, page);
if (page_is_4KiB) {
pagesize = 4096; /* OneNAND has 4KiB pagesize */
On Wed, Oct 7, 2009 at 10:24 AM, Kyungmin Park kmp...@infradead.org wrote:
Some Samsung SoCs, s3c64xx, s5pc100 has own OneNAND controller
and different OneNAND access method.
To support this, each board has own init and set onenand_read_page for it.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index 8d0df81..47b60b3 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -110,6 +110,14 @@ static void onenand_generic_init(int *page_is_4KiB, int
*page)
*page_is_4KiB = 1;
}
+static int __onenand_board_init(int *page_is_4KiB, int *page)
+{
+ return 0;
+}
+
+int onenand_board_init(int *page_is_4KiB, int *page)
+ __attribute__((weak, alias(__onenand_board_init)));
+
/**
* onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining
* of OneNAND, skipping bad blocks
@@ -120,11 +128,13 @@ int onenand_read_block(unsigned char *buf)
int block, nblocks;
int page = CONFIG_ONENAND_START_PAGE, offset = 0;
int pagesize, erasesize, erase_shift;
- int page_is_4KiB = 0;
+ int page_is_4KiB = 0, ret;
onenand_read_page = generic_onenand_read_page;
- onenand_generic_init(page_is_4KiB, page);
+ ret = onenand_board_init(page_is_4KiB, page);
+ if (ret)
+ onenand_generic_init(page_is_4KiB, page);
if (page_is_4KiB) {
pagesize = 4096; /* OneNAND has 4KiB pagesize */
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Re: [U-Boot] [PATCH 4/4 v3] s5pc1xx: add support SMDKC100 board
On Wed, Sep 23, 2009 at 9:05 PM, Tom tom@windriver.com wrote: Minkyu Kang wrote: Dear Tom 2009/9/23 Tom tom@windriver.com: Minkyu Kang wrote: Adds new board SMDKC100 that uses s5pc100 SoC Signed-off-by: Minkyu Kang mk7.k...@samsung.com Signed-off-by: HeungJun, Kim riverful@samsung.com --- snip +#ifndef CONFIG_ONENAND_IPL + /* setting SRAM */ + ldr r0, =S5PC100_SROMC_BASE + ldr r1, =0x9 + str r1, [r0] +#endif Where is CONFIG_ONENAND_IPL defined ? If it is not being used, the #ifndef logic should be reduced. Kyungmin Park sent the patch that is supported onenand_ipl for s5pc1xx. but not yet applied onenand_ipl patch for s5pc1xx. When that patch is applied, we need these logic. If necessary, I'll delete these logic until apply the patch. If the patch already exits, it would be better if it was in this patchset. Can we get the onenand_ipl patch ? To support the s5pc1xx OneNAND IPL. It needs to refactor the current OneNAND IPL. Now I refactor the OneNAND IPL code first and then I will send a OneNAND IPL codes for s5pc1xx. I want to leave current patch as is. Since If we delete the OneNAND IPL codes. No one can refer the codes. I mean OneNAND IPL parts contains clock and memory configuration. These are helpful to someone who use NAND or NOR. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4 v3] s5pc1xx: support onenand driver
On Wed, Sep 23, 2009 at 7:49 PM, Minkyu Kang proms...@gmail.com wrote: Dear Tom. 2009/9/22 Tom tom@windriver.com: Minkyu Kang wrote: This patch includes the onenand driver for s5pc100 Signed-off-by: Minkyu Kang mk7.k...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- Changes since v1: - move samsung_onenand.h to include/linux/mtd/ - make C struct instead of base+offset - Remove the 1 in while loop Changes since v2: - drop blank lines - adds some comments - modify to lower case letter in C struct drivers/mtd/onenand/Makefile | 1 + drivers/mtd/onenand/samsung.c | 622 +++ include/linux/mtd/onenand.h | 1 + include/linux/mtd/onenand_regs.h | 4 + include/linux/mtd/samsung_onenand.h | 131 5 files changed, 759 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/onenand/samsung.c create mode 100644 include/linux/mtd/samsung_onenand.h diff --git a/drivers/mtd/onenand/Makefile b/drivers/mtd/onenand/Makefile index 1d35a57..2571df0 100644 --- a/drivers/mtd/onenand/Makefile +++ b/drivers/mtd/onenand/Makefile @@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libonenand.a COBJS-$(CONFIG_CMD_ONENAND) := onenand_uboot.o onenand_base.o onenand_bbt.o +COBJS-$(CONFIG_SAMSUNG_ONENAND) += samsung.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c new file mode 100644 index 000..5433f19 --- /dev/null +++ b/drivers/mtd/onenand/samsung.c @@ -0,0 +1,622 @@ +/* + * S3C64XX/S5PC100 OneNAND driver at U-Boot + * + * Copyright (C) 2008-2009 Samsung Electronics + * Kyungmin Park kyungmin.p...@samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. Add full GPL 2 copyright. Ok, thanks + * + * Implementation: + * Emulate the pseudo BufferRAM + */ + snip + +#if defined(CONFIG_S3C64XX) +#define MAP_00 (0x0 24) +#define MAP_01 (0x1 24) +#define MAP_10 (0x2 24) +#define MAP_11 (0x3 24) +#elif defined(CONFIG_S5PC1XX) +#define MAP_00 (0x0 26) +#define MAP_01 (0x1 26) +#define MAP_10 (0x2 26) +#define MAP_11 (0x3 26) +#endif This and other struct, #defines may be better handled in a H file. Why did you include them all here? It will be moved H file thanks No, No. Please leave it. User must know that which MAP bit are used. Later I will remove #ifdef. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] [OneNAND IPL] OneNAND board init support
On Tue, Sep 22, 2009 at 1:15 AM, Scott Wood scottw...@freescale.com wrote:
On Sat, Sep 19, 2009 at 10:32:30AM +0900, Kyungmin Park wrote:
On Sat, Sep 19, 2009 at 4:26 AM, Scott Wood scottw...@freescale.com wrote:
On Sat, Aug 29, 2009 at 01:00:59PM +0900, Kyungmin Park wrote:
#define READ_INTERRUPT() \
- onenand_readw(THIS_ONENAND(ONENAND_REG_INTERRUPT))
+ onenand_readw(ONENAND_REG_INTERRUPT)
You could get rid of the newline now...
It exceeds the 80 columns.
No it doesn't, anymore. You'll note that the start of onenand_readw() in to
the right of the end of READ_INTERRUPT, so you're not saving any horizontal
space with the newline.
Right, change it.
+enum {
+ ONENAND_USE_DEFAULT,
+ ONENAND_USE_GENERIC,
+};
What is this? Add a comment, and possibly more specific names.
I see redefine the specific names and comments.
At this time no need to it. remove it.
+extern int (*onenand_read_page)(ulong block, ulong page,
+ u_char *buf, int pagesize);
Maybe use a weak function instead? Or an #ifdef
CONFIG_SYS_ONENAND_BOARD_READ_PAGE that will keep the code for the
generic version from being in the image (it'd be nice if we could
optimize out replaced weak functions). It seems especially odd that you
use one method for init and another for read page.
I tried to use weak function but it produces more than expected.
More than compiling both functions and choosing with a function pointer?
Weak function itself. when using the weak function. it create more
than function pointer.
as you know it got size limitation. When use the weak function. the
apollon board will be broken.
Broken how? Size?
Yes, I'm under pressure of size limitation.
and I don't want to use #ifdef. since Now we support two different CPUs,
s5pc100, s5pc110. these accesses different way. s5pc100 use own OneNAND
controller. but s5pc110 use generic OneNAND method. That's reason to
define the function pointer.
Function pointers make sense if you want to override on a per-device basis
(i.e. multiple controller types in the same system) or dynamically
(different hardware handled by the same binary). Are you trying to generate
one image that works on both s5pc100 and s5pc110? That sounds pretty
luxurious for a space-constrained NAND bootstrap. :-)
Now I used the two different CPUs. s5pc100 and s5pc110. also these
cpus have different interface. Own controller and generic,
respectively. Of course Now it supports both at one image.
That's reason to introduce the onenand_board_init at onenand IPL.
Right. it's some luxurious but need to maintain several boards. It requires it.
/* read a page with ECC */
-static inline int onenand_read_page(ulong block, ulong page,
+static int generic_onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
Is the generic code really generic, or is it just one specific
controller?
The 'generic' means the original OneNAND access method. Use NOR
interface and use OneNAND registers.
Most and Most generic method.
OK, good; it was never clear to me just which hardware the existing onenand
code has been targeting; I had gotten the impression that it was for one of
the chips with a custom controller.
Better, though, would be to still have good separation between that
implementation and the infrastructure that is truly generic even when you
have a special controller. This is something I don't like about the current
NAND code.
+ onenand_board_init(page_is_4KiB, page);
+#else
+ onenand_generic_init(page_is_4KiB, page);
+#endif
- if (onenand_readw(ONENAND_REG_TECHNOLOGY)) {
- pagesize = 4096; /* MLC OneNAND has 4KiB pagesize */
+ if (page_is_4KiB) {
+ pagesize = 4096; /* OneNAND has 4KiB pagesize */
erase_shift = 18;
- } else {
- pagesize = 2048;
- erase_shift = 17;
}
I don't understand why you move the pagesize/erase_shift init before
onenand_board_init, suggesting that the init code change it if it needs
changing -- but then leave the page_is_4KiB stuff in the generic code.
This should probably just be filled in by the init code without anything
here.
No different. basically I assume OneNAND has 2KiB pagesize and
In special case, MLC, and 4KiB pagesize OneNAND set the 4KiB pagesize.
If you want to leave as before. no problem.
Please consider the code size
It seems to me that just having the replaceable init function fill in the
page size would be smaller than having non-replaceable code that passes a
pointer in and then decides on the basis what was written there.
and don't want to break exsiting board support.
I don't see how this additional bit of refactoring would put other boards at
higher risk of breaking that what
[U-Boot] [PATCH] [OneNAND IPL] Refactor OneNAND IPL code
Refactoring the OneNAND IPL code
and some minor fixed:
- Remove unnecessary header file
- Fix wrong access at read interrupt
- The recent OneNAND has 4KiB pagesize
Also Board can override OneNAND IPL image
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
diff --git a/Makefile b/Makefile
index 0b61d05..961c007 100644
--- a/Makefile
+++ b/Makefile
@@ -285,6 +285,7 @@ endif
ifeq ($(CONFIG_ONENAND_U_BOOT),y)
ONENAND_IPL = onenand_ipl
U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
+ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
endif
__OBJS := $(subst $(obj),,$(OBJS))
@@ -378,8 +379,7 @@ $(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE)
$(obj)include/autoconf.mk
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin
- cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin
$(obj)u-boot-onenand.bin
- cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin
$(obj)u-boot-flexonenand.bin
+ cat $(ONENAND_BIN) $(obj)u-boot.bin $(obj)u-boot-onenand.bin
$(VERSION_FILE):
@( printf '#define U_BOOT_VERSION U-Boot %s%s\n'
$(U_BOOT_VERSION) \
@@ -3259,8 +3259,6 @@ zylonite_config :
#
apollon_config : unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)onenand_ipl/board/apollon
@echo #define CONFIG_ONENAND_U_BOOT $(obj)include/config.h
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
@echo CONFIG_ONENAND_U_BOOT = y $(obj)include/config.mk
@@ -3742,7 +3740,8 @@ clean:
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
- @rm -f
$(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
+ @rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
+ @rm -f $(ONENAND_BIN)
@rm -f $(obj)onenand_ipl/u-boot.lds
@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
@find $(OBJTREE) -type f \
diff --git a/onenand_ipl/onenand_boot.c b/onenand_ipl/onenand_boot.c
index 63995ce..22baebb 100644
--- a/onenand_ipl/onenand_boot.c
+++ b/onenand_ipl/onenand_boot.c
@@ -24,7 +24,6 @@
*/
#include common.h
-#include version.h
#include onenand_ipl.h
diff --git a/onenand_ipl/onenand_ipl.h b/onenand_ipl/onenand_ipl.h
index 412572a..7ebb3e3 100644
--- a/onenand_ipl/onenand_ipl.h
+++ b/onenand_ipl/onenand_ipl.h
@@ -28,8 +28,9 @@
#define THIS_ONENAND(a) (CONFIG_SYS_ONENAND_BASE + (a))
-#define READ_INTERRUPT()\
- onenand_readw(THIS_ONENAND(ONENAND_REG_INTERRUPT))
+#define READ_INTERRUPT() onenand_readw(ONENAND_REG_INTERRUPT)
+extern int (*onenand_read_page)(ulong block, ulong page,
+ u_char *buf, int pagesize);
extern int onenand_read_block(unsigned char *buf);
#endif
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index d1a842d..8d0df81 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005-2008 Samsung Electronis
+ * (C) Copyright 2005-2009 Samsung Electronics
* Kyungmin Park kyungmin.p...@samsung.com
*
* See file CREDITS for list of people who contributed to this
@@ -37,8 +37,10 @@
extern void *memcpy32(void *dest, void *src, int size);
#endif
+int (*onenand_read_page)(ulong block, ulong page, u_char *buf, int pagesize);
+
/* read a page with ECC */
-static inline int onenand_read_page(ulong block, ulong page,
+static int generic_onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
{
unsigned long *base;
@@ -89,9 +91,25 @@ static inline int onenand_read_page(ulong block, ulong page,
return 0;
}
-#define ONENAND_START_PAGE 1
+#ifndef CONFIG_ONENAND_START_PAGE
+#define CONFIG_ONENAND_START_PAGE 1
+#endif
#define ONENAND_PAGES_PER_BLOCK64
+static void onenand_generic_init(int *page_is_4KiB, int *page)
+{
+ int dev_id, density;
+
+ if (onenand_readw(ONENAND_REG_TECHNOLOGY))
+ *page_is_4KiB = 1;
+ dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
+ density = dev_id ONENAND_DEVICE_DENSITY_SHIFT;
+ density = ONENAND_DEVICE_DENSITY_MASK;
+ if (density = ONENAND_DEVICE_DENSITY_4Gb
+ !(dev_id ONENAND_DEVICE_IS_DDP))
+ *page_is_4KiB = 1;
+}
+
/**
* onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining
* of OneNAND, skipping bad blocks
@@ -99,24 +117,28 @@ static inline int onenand_read_page(ulong block, ulong
page,
*/
int onenand_read_block(unsigned char *buf)
{
- int block;
- int page = ONENAND_START_PAGE, offset = 0;
- int pagesize = 0, erase_shift = 0;
- int
Re: [U-Boot] [PATCH] [OneNAND] Board can override OneNAND IPL image
On Sat, Sep 19, 2009 at 4:37 AM, Scott Wood scottw...@freescale.com wrote: On Wed, Sep 02, 2009 at 06:05:03PM +0900, Kyungmin Park wrote: Some board use more then 2KiB OneNAND IPL. E.G., S5PC100 loads 16KiB OneNAND IPL Why do we need a different image name based on how large the loader is? Actually, S5PC100 has no problem to use 1KiB IPL. Internal boot ROM code read first 16KiB at OneNAND. We it's enough to use 1KiB. However, S5PC110 is different. It checks the 16KIB checksum located at latest 16KiB - 4 bytes. In compatible issue, we conclude that use 16KiB for both cpus. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] [OneNAND IPL] OneNAND board init support
On Sat, Sep 19, 2009 at 4:26 AM, Scott Wood scottw...@freescale.com wrote:
On Sat, Aug 29, 2009 at 01:00:59PM +0900, Kyungmin Park wrote:
#define READ_INTERRUPT() \
- onenand_readw(THIS_ONENAND(ONENAND_REG_INTERRUPT))
+ onenand_readw(ONENAND_REG_INTERRUPT)
You could get rid of the newline now...
It exceeds the 80 columns.
+enum {
+ ONENAND_USE_DEFAULT,
+ ONENAND_USE_GENERIC,
+};
What is this? Add a comment, and possibly more specific names.
I see redefine the specific names and comments.
+extern int (*onenand_read_page)(ulong block, ulong page,
+ u_char *buf, int pagesize);
Maybe use a weak function instead? Or an #ifdef
CONFIG_SYS_ONENAND_BOARD_READ_PAGE that will keep the code for the
generic version from being in the image (it'd be nice if we could
optimize out replaced weak functions). It seems especially odd that you
use one method for init and another for read page.
I tried to use weak function but it produces more than expected. as
you know it got size limitation.
When use the weak function. the apollon board will be broken.
and I don't want to use #ifdef. since Now we support two different
CPUs, s5pc100, s5pc110. these accesses different way. s5pc100 use own
OneNAND controller. but s5pc110 use generic OneNAND method.
That's reason to define the function pointer.
/* read a page with ECC */
-static inline int onenand_read_page(ulong block, ulong page,
+static int generic_onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
Is the generic code really generic, or is it just one specific
controller?
The 'generic' means the original OneNAND access method. Use NOR
interface and use OneNAND registers.
Most and Most generic method.
Only Samsung SoCs, s3c64xx series, and s5pc100 uses their own OneNAND
controller.
+#ifdef CONFIG_ONENAND_BOARD_INIT
This should probably be CONFIG_SYS_ONENAND_BOARD_INIT -- it's not
tweakable by the end user.
How is this different from the existing CONFIG_USE_ONENAND_BOARD_INIT?
Okay l try to consider how to use same configurations.
+ onenand_board_init(page_is_4KiB, page);
+#else
+ onenand_generic_init(page_is_4KiB, page);
+#endif
- if (onenand_readw(ONENAND_REG_TECHNOLOGY)) {
- pagesize = 4096; /* MLC OneNAND has 4KiB pagesize */
+ if (page_is_4KiB) {
+ pagesize = 4096; /* OneNAND has 4KiB pagesize */
erase_shift = 18;
- } else {
- pagesize = 2048;
- erase_shift = 17;
}
I don't understand why you move the pagesize/erase_shift init before
onenand_board_init, suggesting that the init code change it if it needs
changing -- but then leave the page_is_4KiB stuff in the generic code.
This should probably just be filled in by the init code without anything
here.
No different. basically I assume OneNAND has 2KiB pagesize and
In special case, MLC, and 4KiB pagesize OneNAND set the 4KiB pagesize.
If you want to leave as before. no problem.
Please consider the code size and don't want to break exsiting board support.
That's reason I can't use weak function and use #ifdef at onenand_board_init.
Thank you,
Kyungmin Park
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Re: [U-Boot] Flashing images bigger than ram
Hi, On Wed, Sep 16, 2009 at 6:39 AM, Ben Goska gos...@onid.oregonstate.edu wrote: Is there a standard way to have U-Boot flash really large images? I want to setup rootfs flashing from U-Boot but this requires flashing an image that is bigger than the ram of my system. I thought about breaking the image into chunks, but when flashing to NAND with bad blocks it is difficult to handle skipping the bad blocks. I know I could make this happen with a custom command added to U-Boot but I was wondering if someone else had solved the problem already. My hardware: OMAP3530, 128MB Ram, 256MB NAND. Trying to flash from MMC (fat, or ext2) to NAND. Please see the common/cmd_onenand.c First it got the 32MiB data from USB or others. and then write it's data to OneNAND. Of course if it meets the bad blocks, just skip it and write again. I called it skip write method. Next time it adjust the start offset. of course upper layer don't know it. Upper layer assume it write it exactly it sent. In read side it's similar. If it encounters the bad block. it also skip and read again. (skip read). With this method. we can program flash even though we can't enough memory. you can see the code. it's better to understand. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] RFC: split ARM repo and distribute workload
On Sat, Sep 5, 2009 at 6:57 AM, Wolfgang Denkw...@denx.de wrote: Hello everybody, ARM has always been one of the architectures that generated a big number of different processors and SoCs, but recently the activitiy in this area is literally exploding. This is partially due to the fact that ARM is currently used in many designs, so many new ARM based processors and SoCs and even more new ARM boards show up, but another and at least as important change is that some silicon and board vendors have started to actively pushing their products into the U-Boot (and Linux) mainline source trees (and *welcome* they all are!). It has become evident that this growing complexity has become way too massive to be shouldered by a single custodian, even a very active one like Jean-Christophe. I think we have no other choice but to add more manpower to this task, i. e. split the ARM respository and distribute the workload across a few more custodians. Unline with the Power architecture, where the split can be easily defined by processor lines, with ARM it seems more logical to me to differentiate by silicon vendors. After much thinking I therefor suggest to implement the following change for the ARM architecture: master ARM repository: Tom Rix Atmel (AT91): Jean-Christophe Plagniol-Villard Freescale (i.MX) Magnus Lilja? Or are there any volunteers at Freescale? Marvell (PXA + IXP): Jean-Christophe Plagniol-Villard Marvell (all other): Prafulla Wadaskar Samsung (s3c, s5pc): Are there any volunteers at Samsung? I recommended the Minky Kang. He's working for several years for u-boot from pxa, omap3, s3c6410 and s5pc1xx series. But with our internal security policy it's hard to use ssh on u-boot git. so we want to use u-boot-arm as base. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm_cortexa8: support cache flush to other soc
Hi,
As he goes to home, I reply it instead.
On Fri, Sep 4, 2009 at 5:43 PM, Dirk Behmedirk.be...@googlemail.com wrote:
Dear Minkyu Kang,
Minkyu Kang wrote:
Current code is supported only omap3 soc.
this patch will support s5pc1xx(s5pc100 and s5pc110) soc also.
Thanks for this patch!
How is this patch related to
http://lists.denx.de/pipermail/u-boot/2009-August/058492.html
It's not good idea to move invalidate_cache to omap directory. we need it.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
---
cpu/arm_cortexa8/cpu.c | 24 +++-
1 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c
index 5a5981e..3d430b1 100644
--- a/cpu/arm_cortexa8/cpu.c
+++ b/cpu/arm_cortexa8/cpu.c
@@ -35,9 +35,6 @@
#include command.h
#include asm/system.h
#include asm/cache.h
-#ifndef CONFIG_L2_OFF
-#include asm/arch/sys_proto.h
-#endif
static void cache_flush(void);
@@ -61,17 +58,18 @@ int cleanup_before_linux(void)
cache_flush();
#ifndef CONFIG_L2_OFF
- /* turn off L2 cache */
- l2_cache_disable();
- /* invalidate L2 cache also */
- v7_flush_dcache_all(get_device_type());
-#endif
- i = 0;
- /* mem barrier to sync up things */
- asm(mcr p15, 0, %0, c7, c10, 4: :r(i));
+ if (get_device_type() != 0xC100) {
Hmm, what is this 0xC100 ?
Now we got two cpu, s5pc100 and s5pc110. In case of s5pc100 we don't
need to turn off l2 cache. but s5pc110 needs it.
So first check the device type, actually cpu type. then determine turn
off l2 cache or not.
+ /* turn off L2 cache */
+ l2_cache_disable();
+ /* invalidate L2 cache also */
+ v7_flush_dcache_all(get_device_type());
-#ifndef CONFIG_L2_OFF
- l2_cache_enable();
+ i = 0;
+ /* mem barrier to sync up things */
+ asm(mcr p15, 0, %0, c7, c10, 4: :r(i));
+
+ l2_cache_enable();
+ }
#endif
What's about the order of #ifndef CONFIG_L2_OFF?
While we had before
#ifndef CONFIG_L2_OFF
/* turn off L2 cache */
l2_cache_disable();
/* invalidate L2 cache also */
v7_flush_dcache_all(get_device_type());
#endif
i = 0;
/* mem barrier to sync up things */
asm(mcr p15, 0, %0, c7, c10, 4: :r(i));
#ifndef CONFIG_L2_OFF
l2_cache_enable();
#endif
after this patch we would have
#ifndef CONFIG_L2_OFF
if (get_device_type() != 0xC100) {
/* turn off L2 cache */
l2_cache_disable();
/* invalidate L2 cache also */
v7_flush_dcache_all(get_device_type());
i = 0;
/* mem barrier to sync up things */
asm(mcr p15, 0, %0, c7, c10, 4: :r(i));
l2_cache_enable();
}
#endif
Is this intended?
maybe not. now we only tested the smdkc100 but actual use is internal
board for s5pc100 s5pc110.
He will be modify it.
Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCH] arm_cortexa8: support cache flush to other soc
On Fri, Sep 4, 2009 at 7:45 PM, Dirk Behmedirk.be...@googlemail.com wrote:
Kyungmin Park wrote:
Hi,
As he goes to home, I reply it instead.
Nice weekend then :)
On Fri, Sep 4, 2009 at 5:43 PM, Dirk Behmedirk.be...@googlemail.com
wrote:
Dear Minkyu Kang,
Minkyu Kang wrote:
Current code is supported only omap3 soc.
this patch will support s5pc1xx(s5pc100 and s5pc110) soc also.
Thanks for this patch!
How is this patch related to
http://lists.denx.de/pipermail/u-boot/2009-August/058492.html
It's not good idea to move invalidate_cache to omap directory. we need it.
Well, yes and no ;)
Most probably you (== Samsung) can't use the invalidate_dcache version we
move in above patch to omap directory, because the version we move above is
OMAP3 specific (it has calls to OMAP3 ROM code). So no, it's a good idea to
move OMAP3 specific code to omap directory.
But yes, you might need DCache flush (*). So the idea of above patch was to
have your own (or generic) implementation, but let OMAP3 use the custom one
where needed.
(*) Do you really need DCache flush? It always was Jean-Christophe's
argument that U-Boot doesn't use any DCache at all.
Yes, We really want it. At first development time, we don't know why
the kernel is boot. almost same as s5pc100 but s5pc110 required cache
flush.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
---
cpu/arm_cortexa8/cpu.c | 24 +++-
1 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c
index 5a5981e..3d430b1 100644
--- a/cpu/arm_cortexa8/cpu.c
+++ b/cpu/arm_cortexa8/cpu.c
@@ -35,9 +35,6 @@
#include command.h
#include asm/system.h
#include asm/cache.h
-#ifndef CONFIG_L2_OFF
-#include asm/arch/sys_proto.h
-#endif
static void cache_flush(void);
@@ -61,17 +58,18 @@ int cleanup_before_linux(void)
cache_flush();
#ifndef CONFIG_L2_OFF
- /* turn off L2 cache */
- l2_cache_disable();
- /* invalidate L2 cache also */
- v7_flush_dcache_all(get_device_type());
-#endif
- i = 0;
- /* mem barrier to sync up things */
- asm(mcr p15, 0, %0, c7, c10, 4: :r(i));
+ if (get_device_type() != 0xC100) {
Hmm, what is this 0xC100 ?
Now we got two cpu, s5pc100 and s5pc110. In case of s5pc100 we don't
need to turn off l2 cache. but s5pc110 needs it.
So first check the device type, actually cpu type. then determine turn
off l2 cache or not.
0xC100 is the device type of s5pc100 then? So it should be
if (get_device_type() != S5PC100_DEVICE)
? I hear some people crying please use macro ;)
Agreed. DONT_NEED_CACHE_FLUSH?
But I don't like this selection here. When we get additional similar SoCs,
we will end with something like
if (get_device_type() != 0xC100) ||
(get_device_type() != FOO) ||
(get_device_type() != BAR)) ||
... {
modifying each time cpu/arm_cortexa8/cpu.c.
I would like more that we are able to compile the functionality based on the
config file we use for compilation. E.g. provide emtpy l2_cache_disable();
function for SoCs that don't need it, but have functionality behind it where
needed.
With above patch, this would then become something like
cpu/arm_cortexa8/s5pcxxx/dcache.S
- Implements invalidate_dcache() (or implement a Cortex A8 generic one in
cpu/arm_cortexa8/cache.S)
cpu/arm_cortexa8/s5pcxxx/cache_110.S
- Implements l2_cache_enable()/disable()
cpu/arm_cortexa8/s5pcxxx/cache_100.S
- Implements *empty* l2_cache_enable()/disable()
In cpu/arm_cortexa8/s5pcxxx/Makefile you then could have
SOBJS-y += dcache.o
SOBJS-$(CONFIG_S5PC100) += cache_100.o
SOBJS-$(CONFIG_S5PC110) += cache_110.o
What do you think about this?
Basically agreed, of course we can think weak attribute but now we
have to support both cpu simultaneously.
with this reason. we check the device_type at here.
Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCH 2/4] s5pc1xx: support onenand driver
Hi,
On Fri, Sep 4, 2009 at 7:44 PM, Wolfgang Denkw...@denx.de wrote:
Dear Minkyu Kang,
In message 4aa0ce3f.60...@samsung.com you wrote:
This patch includes the onenand driver for s5pc1xx
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
...
+static int s3c_read_reg(int offset)
+{
+ return readl(onenand-base + offset);
+}
+
+static void s3c_write_reg(int value, int offset)
+{
+ writel(value, onenand-base + offset);
+}
+
+static int s3c_read_cmd(unsigned int cmd)
+{
+ return readl(onenand-ahb_addr + cmd);
+}
+
+static void s3c_write_cmd(int value, unsigned int cmd)
+{
+ writel(value, onenand-ahb_addr + cmd);
+}
PLease see comments to previous patch about usage of register plus
offset versus using proper C structures.
I have different opinion. How much register map is required? I mean in
case of read/write cmd, it has about 256MiB range. then how do you
cast is as C structures.
Only some small range for example. 1K or less. C structures possible.
but more than this. it's too huge to case it.
Please change this code to use structs, too.
+static unsigned int s5pc100_mem_addr(int fba, int fpa, int fsa)
+{
+ return (fba 13) | (fpa 7) | (fsa 5);
+}
This function needs explanation. Please add a comment what it does,
and how.
It's mandatory. no need to shift. It's fixed. with this reason. we
covers alomst 256MiB memory range.
...
+static int s3c_onenand_bbt_wait(struct mtd_info *mtd, int state)
+{
+ unsigned int flags = INT_ACT | LOAD_CMP;
+ unsigned int stat;
+ unsigned long timeout = 0x1;
+
+ while (1 timeout--) {
Please do not add bogus code. Remove the 1
Agreed.
...
+void s3c_onenand_init(struct mtd_info *mtd)
+{
+ struct onenand_chip *this = mtd-priv;
+
+ onenand = malloc(sizeof(struct s3c_onenand));
+ if (!onenand)
+ return;
+
+ onenand-page_buf = malloc(SZ_4K * sizeof(char));
+ if (!onenand-page_buf)
+ return;
+ memset(onenand-page_buf, 0xFF, SZ_4K);
+
+ onenand-oob_buf = malloc(128 * sizeof(char));
+ if (!onenand-oob_buf)
+ return;
+ memset(onenand-oob_buf, 0xFF, 128);
+
+ onenand-mtd = mtd;
+
+#ifdef CONFIG_S5PC1XX
+ /* S5PC100 specific values */
+ onenand-base = (void *) 0xE710;
+ onenand-ahb_addr = (void *) 0xB000;
+ onenand-mem_addr = s5pc100_mem_addr;
+#else
+#error Please fix it at s3c6410
+#endif
What does this mean?
Now we got two version of samsung.c one for s3c6410, another is this
one. No problem to add it for s3c6410
diff --git a/include/samsung_onenand.h b/include/samsung_onenand.h
new file mode 100644
index 000..91b40e1
--- /dev/null
+++ b/include/samsung_onenand.h
...
+/*
+ * OneNAND Controller
+ */
+#define MEM_CFG_OFFSET 0x
+#define BURST_LEN_OFFSET 0x0010
+#define MEM_RESET_OFFSET 0x0020
+#define INT_ERR_STAT_OFFSET 0x0030
+#define INT_ERR_MASK_OFFSET 0x0040
+#define INT_ERR_ACK_OFFSET 0x0050
Please use a C struct instead.
The end address is 0x400. Are you really need it to cast? I don't think so.
Thank you,
Kyungmin Park
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[U-Boot] [PATCH] [OneNAND] Board can override OneNAND IPL image
Some board use more then 2KiB OneNAND IPL.
E.G., S5PC100 loads 16KiB OneNAND IPL
diff --git a/Makefile b/Makefile
index c9727f8..1af42ce 100644
--- a/Makefile
+++ b/Makefile
@@ -285,6 +285,7 @@ endif
ifeq ($(CONFIG_ONENAND_U_BOOT),y)
ONENAND_IPL = onenand_ipl
U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
+ONENAND_BIN ?= $(obj)onenand_ipl/onenand-ipl-2k.bin
endif
__OBJS := $(subst $(obj),,$(OBJS))
@@ -374,8 +375,7 @@ $(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE)
$(obj)include/autoconf.mk
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin
- cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin
$(obj)u-boot-onenand.bin
- cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin
$(obj)u-boot-flexonenand.bin
+ cat $(ONENAND_BIN) $(obj)u-boot.bin $(obj)u-boot-onenand.bin
$(VERSION_FILE):
@( printf '#define U_BOOT_VERSION U-Boot %s%s\n'
$(U_BOOT_VERSION) \
@@ -3229,8 +3229,6 @@ zylonite_config :
#
apollon_config : unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)onenand_ipl/board/apollon
@echo #define CONFIG_ONENAND_U_BOOT $(obj)include/config.h
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
@echo CONFIG_ONENAND_U_BOOT = y $(obj)include/config.mk
@@ -3716,7 +3714,8 @@ clean:
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
- @rm -f
$(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
+ @rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
+ @rm -f $(ONENAND_BIN)
@rm -f $(obj)onenand_ipl/u-boot.lds
@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
@find $(OBJTREE) -type f \
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[U-Boot] [PATCH] [OneNAND IPL] OneNAND board init support
Some CPU has internal OneNAND controller and use it for access OneNAND
To support these CPU, we provide the onenand_board_init
Also we can override the onenand_read_page.
Some minor fixed:
- Remove unnecessary header file
- Fix wrong access at read interrupt
- The recent OneNAND has 4KiB pagesize
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/onenand_ipl/onenand_boot.c b/onenand_ipl/onenand_boot.c
index 63995ce..22baebb 100644
--- a/onenand_ipl/onenand_boot.c
+++ b/onenand_ipl/onenand_boot.c
@@ -24,7 +24,6 @@
*/
#include common.h
-#include version.h
#include onenand_ipl.h
diff --git a/onenand_ipl/onenand_ipl.h b/onenand_ipl/onenand_ipl.h
index 412572a..2257063 100644
--- a/onenand_ipl/onenand_ipl.h
+++ b/onenand_ipl/onenand_ipl.h
@@ -29,7 +29,14 @@
#define THIS_ONENAND(a) (CONFIG_SYS_ONENAND_BASE + (a))
#define READ_INTERRUPT()\
- onenand_readw(THIS_ONENAND(ONENAND_REG_INTERRUPT))
+ onenand_readw(ONENAND_REG_INTERRUPT)
+enum {
+ ONENAND_USE_DEFAULT,
+ ONENAND_USE_GENERIC,
+};
+
+extern int (*onenand_read_page)(ulong block, ulong page,
+ u_char *buf, int pagesize);
extern int onenand_read_block(unsigned char *buf);
#endif
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index d1a842d..7fc0c62 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005-2008 Samsung Electronis
+ * (C) Copyright 2005-2009 Samsung Electronics
* Kyungmin Park kyungmin.p...@samsung.com
*
* See file CREDITS for list of people who contributed to this
@@ -37,8 +37,11 @@
extern void *memcpy32(void *dest, void *src, int size);
#endif
+int (*onenand_read_page)(ulong block, ulong page,
+ u_char *buf, int pagesize);
+
/* read a page with ECC */
-static inline int onenand_read_page(ulong block, ulong page,
+static int generic_onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
{
unsigned long *base;
@@ -89,9 +92,29 @@ static inline int onenand_read_page(ulong block, ulong page,
return 0;
}
-#define ONENAND_START_PAGE 1
+#ifndef CONFIG_ONENAND_START_PAGE
+#define CONFIG_ONENAND_START_PAGE 1
+#endif
#define ONENAND_PAGES_PER_BLOCK64
+#ifndef CONFIG_ONENAND_BOARD_INIT
+static int onenand_generic_init(int *page_is_4KiB, int *page)
+{
+ int dev_id, density;
+
+ if (onenand_readw(ONENAND_REG_TECHNOLOGY))
+ *page_is_4KiB = 1;
+ dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
+ density = dev_id ONENAND_DEVICE_DENSITY_SHIFT;
+ density = ONENAND_DEVICE_DENSITY_MASK;
+ if (density = ONENAND_DEVICE_DENSITY_4Gb
+ !(dev_id ONENAND_DEVICE_IS_DDP))
+ *page_is_4KiB = 1;
+
+ return ONENAND_USE_DEFAULT;
+}
+#endif
+
/**
* onenand_read_block - Read CONFIG_SYS_MONITOR_LEN from begining
* of OneNAND, skipping bad blocks
@@ -99,24 +122,31 @@ static inline int onenand_read_page(ulong block, ulong
page,
*/
int onenand_read_block(unsigned char *buf)
{
- int block;
- int page = ONENAND_START_PAGE, offset = 0;
- int pagesize = 0, erase_shift = 0;
- int erasesize = 0, nblocks = 0;
+ int block, nblocks;
+ int page = CONFIG_ONENAND_START_PAGE, offset = 0;
+ int pagesize, erasesize, erase_shift;
+ int page_is_4KiB = 0, ret;
+
+ pagesize = 2048; /* OneNAND has 2KiB pagesize */
+ erase_shift = 17;
+ onenand_read_page = generic_onenand_read_page;
+
+#ifdef CONFIG_ONENAND_BOARD_INIT
+ onenand_board_init(page_is_4KiB, page);
+#else
+ onenand_generic_init(page_is_4KiB, page);
+#endif
- if (onenand_readw(ONENAND_REG_TECHNOLOGY)) {
- pagesize = 4096; /* MLC OneNAND has 4KiB pagesize */
+ if (page_is_4KiB) {
+ pagesize = 4096; /* OneNAND has 4KiB pagesize */
erase_shift = 18;
- } else {
- pagesize = 2048;
- erase_shift = 17;
}
- erasesize = ONENAND_PAGES_PER_BLOCK * pagesize;
+ erasesize = (1 erase_shift);
nblocks = (CONFIG_SYS_MONITOR_LEN + erasesize - 1) erase_shift;
/* NOTE: you must read page from page 1 of block 0 */
- /* read the block page by page*/
+ /* read the block page by page */
for (block = 0; block nblocks; block++) {
for (; page ONENAND_PAGES_PER_BLOCK; page++) {
if (onenand_read_page(block, page, buf + offset,
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Re: [U-Boot] [PATCH 6/6] S5PC100: Add onenand_ipl for SMDKC100 support
hi On Sat, Aug 1, 2009 at 7:19 AM, Scott Woodscottw...@freescale.com wrote: On Thu, Jun 25, 2009 at 05:21:45PM +0900, HeungJun Kim wrote: +#ifdef CONFIG_S5PC1XX + unsigned int *p = (unsigned int *) buf; + int mem_addr, i; + + mem_addr = MEM_ADDR(block, page, 0); + + pagesize = 2; + + for (i = 0; i pagesize; i++) + *p++ = *(volatile unsigned int *)(CMD_MAP_01(mem_addr)); +#else /* CONFIG_S5PC1XX */ + unsigned long *base; #ifndef __HAVE_ARCH_MEMCPY32 @@ -85,6 +99,7 @@ static inline int onenand_read_page(ulong block, ulong page, *p++ = value; } #endif +#endif /* CONFIG_S5PC1XX */ It should be S5PC100, not used at S5PC110. it uses generic interface with DMA support. Please put each controller implementation in a separate file, with an appropriate name. Do not make anything which is SoC-specific look generic. No problem, One question, how to use use generic s5pc100 read function simultaneously. Since our test board use two cpu, s5pc100 s5pc110. but each cpu has different read function. I want to use it both with only one u-boot image. In this case we have to distinguish and use it properly. Now I add the function pointer and assign it based on cpu id. If onenand_read_block() is not controller-specific (looks like everything except the read of ONENAND_REG_TECHNOLOGY is generic), move it to onenand_boot.c. @@ -114,6 +129,9 @@ int onenand_read_block(unsigned char *buf) erasesize = ONENAND_PAGES_PER_BLOCK * pagesize; nblocks = (CONFIG_SYS_MONITOR_LEN + erasesize - 1) erase_shift; +#ifdef CONFIG_S5PC1XX + nblocks = 1; +#endif Why? It's developer's mistake, no reason to use 1 block. actually internal ROM read 16KiB data to internal RAM in case of s5pc100. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OneNAND: S5PC100 OneNAND IPL support
On Tue, Jul 28, 2009 at 10:42 PM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 07:58 Tue 28 Jul , Kyungmin Park wrote: On Tue, Jul 28, 2009 at 5:09 AM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 14:28 Fri 24 Jul , Kyungmin Park wrote: On Fri, Jul 24, 2009 at 7:42 AM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 09:55 Tue 21 Jul , Kyungmin Park wrote: S5PC100 has own OneNAND controller and has different interface. OneNAND IPL use it to S5PC100 board. Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- is there any better than put soc specific code in generic implementatioN I hope so. only s3c64xx series and s5pc100 use own OneNAND controller. I also don't understand why need these controller. The OneNAND has its own controller at chips already. I known so what do you propose? just commit the patch I sent. It's difficult to remove the ifdef since size limitation. I understand your problem of size but is there any otherway to do ti without the onenand soc controler ? No, no way we should use soc controller. I'll prefer we find a way to not put soc specific code in the generic code maybe we can crete a header which will be soc specific or a generic that we will include depending on the soc something like weak alias? The new problem is now I want to support S5PC100 S5PC110 Samsung SoC simultaneously. But these has different interface. c100 has CMD_MAP method, c110 has similar generic but different. At runtime it detects the cpu id and determine which read function is used. At this case, s5pc100/c110 has no size limitation because of internal ROM code. At boot it loads 16KiB and 8KiB data to internal RAM respectively. Okay I will try to make it generic and resend it after finishing the port s5pc110 works Thank you, Kyungmin Park Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] OneNAND: S5PC100 OneNAND IPL support
On Tue, Jul 28, 2009 at 5:09 AM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 14:28 Fri 24 Jul , Kyungmin Park wrote: On Fri, Jul 24, 2009 at 7:42 AM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 09:55 Tue 21 Jul , Kyungmin Park wrote: S5PC100 has own OneNAND controller and has different interface. OneNAND IPL use it to S5PC100 board. Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- is there any better than put soc specific code in generic implementatioN I hope so. only s3c64xx series and s5pc100 use own OneNAND controller. I also don't understand why need these controller. The OneNAND has its own controller at chips already. I known so what do you propose? just commit the patch I sent. It's difficult to remove the ifdef since size limitation. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ubi attaching error (UBI error: ubi_read_volume_table)
Hi,
I'm not sure you did proper operation.
In current configuration:
onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs),32m(fs),-(ubifs)
you should select the ubi partition I think it's ubifs
So as followings
# onenand erase ${start of ubifs} ${size of ubifs} instead of 0x4 0x20
# ubi part ubifs
Thank you,
Kyungmin Park
On Thu, Jul 23, 2009 at 11:57 PM, naveen yadavyad.nav...@gmail.com wrote:
Hi All,
I am using flex-onenand for my u-boot. i have added the patch for
flex-onenand and UBI and UBIFS published by kyungmin park.
I have done following steps:
1. first command
# onenand erase 0x4 0x20
2. second command
# mtdparts default
3. third commad
# mtdparts
4. forth command
# ubi part u-boot
(i got error
UBI error: ubi_read_volume_table:
the layout volume was not found
attach_by_scanning-4
UBI error: ubi_init: cannot attach mtd1
UBI error: ubi_init: UBI error: cannot initialize UBI, error -22
UBI init error -22 )
a) first command out put
1. # mtdparts default
---mtdparts_init---
last_ids : onenand0=onenand
env_ids : onenand0=onenand
last_parts:
mtdparts=onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs)
,32m(fs),-(ubifs)
env_parts :
mtdparts=onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs)
,32m(fs),-(ubifs)
last_partition : onenand0,0
env_partition : NULL
no partition variable set, setting...
--- current_save ---
= partition onenand0,0
--- index partitions ---
--- mtd_part_info: partition number 0 for device onenand0 (onenand)
= mtddevnum 0,
= mtddevname u-boot
2. second command output
# mtdparts
---mtdparts_init---
last_ids : onenand0=onenand
env_ids : onenand0=onenand
last_parts:
mtdparts=onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs)
,32m(fs),-(ubifs)
env_parts :
mtdparts=onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs)
,32m(fs),-(ubifs)
last_partition : onenand0,0
env_partition : onenand0,0
---list_partitions---
device onenand0 onenand, # parts = 6
#: name size offset mask_flags
0: u-boot 0x0020 0x0004 0
1: params 0x0004 0x0024 0
2: kernel 0x0020 0x0028 0
3: rootfs 0x0100 0x0048 0
4: fs 0x0200 0x0148 0
5: ubifs 0x3c48 0x0348 0
--- mtd_part_info: partition number 0 for device onenand0 (onenand)
active partition: onenand0,0 - (u-boot) 0x0020 @ 0x0004
defaults:
mtdids : onenand0=onenand
mtdparts:
mtdparts=onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs),3
2m(fs),-(ubifs)
3. Third command output
# ubi part u-boot
---mtdparts_init---
last_ids : onenand0=onenand
env_ids : onenand0=onenand
last_parts:
mtdparts=onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs)
,32m(fs),-(ubifs)
env_parts :
mtdparts=onenand:2...@256k(u-boot),256k(params),2m(kernel),16m(rootfs)
,32m(fs),-(ubifs)
last_partition : onenand0,0
env_partition : onenand0,0
448 do_ubi -1454 do_ubi -2466 do_ubi -5--- find_dev_and_part ---
id = u-boot
--- find_dev_and_part ---
id = u-boot
Creating 1 MTD partitions on onenand0:
0x%lx-0x%lx :
UBI: attaching mtd1 to ubi0 ubi_attach_mtd_dev
UBI: min_io_size 2048
UBI: hdrs_min_io_size 512
UBI: ec_hdr_alsize 512
UBI: vid_hdr_alsize 512
UBI: vid_hdr_offset 512
UBI: vid_hdr_aloffset 512
UBI: vid_hdr_shift 0
UBI: leb_start 2048
UBI: physical eraseblock size: 131072 bytes (128 KiB)
UBI: logical eraseblock size: 129024 bytes
UBI: smallest flash I/O unit: 2048
UBI: sub-page size: 512
UBI: VID header offset: 512 (aligned 512)
UBI: data offset: 2048
UBI error: ubi_read_volume_table:
the layout volume was not found
attach_by_scanning-4
UBI error: ubi_init: cannot attach mtd1
UBI error: ubi_init: UBI error: cannot initialize UBI, error -22
UBI init error -22
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Re: [U-Boot] [PATCH] OneNAND: S5PC100 OneNAND IPL support
On Fri, Jul 24, 2009 at 7:42 AM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 09:55 Tue 21 Jul , Kyungmin Park wrote: S5PC100 has own OneNAND controller and has different interface. OneNAND IPL use it to S5PC100 board. Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- is there any better than put soc specific code in generic implementatioN I hope so. only s3c64xx series and s5pc100 use own OneNAND controller. I also don't understand why need these controller. The OneNAND has its own controller at chips already. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] OneNAND: Runtime badblock support
At bootloader, we don't need to read full page. It takes too long time.
Instead it only read pages required for boot.
Of course, this patch reduces the boot time
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/drivers/mtd/onenand/onenand_bbt.c
b/drivers/mtd/onenand/onenand_bbt.c
index c4bdb57..8bc9e8a 100644
--- a/drivers/mtd/onenand/onenand_bbt.c
+++ b/drivers/mtd/onenand/onenand_bbt.c
@@ -48,6 +48,43 @@ static int check_short_pattern(uint8_t * buf, int len, int
paglen,
return 0;
}
+static int read_page_oob(struct mtd_info *mtd, loff_t from, u_char *buf)
+{
+ struct onenand_chip *this = mtd-priv;
+ struct bbm_info *bbm = this-bbm;
+ struct nand_bbt_descr *bd = bbm-badblock_pattern;
+ struct mtd_oob_ops ops;
+ int ret, scanlen, block, j, res;
+
+ scanlen = 0;
+
+ ops.mode = MTD_OOB_PLACE;
+ ops.ooblen = 16;
+ ops.oobbuf = buf;
+ ops.len = ops.ooboffs = ops.retlen = ops.oobretlen = 0;
+
+ /* Get block number * 2 */
+ block = (int)(from (bbm-bbt_erase_shift - 1));
+
+ /* Set as normal block */
+ res = 0x00;
+ bbm-bbt[block 3] |= 0x00 (block 0x6);
+
+ for (j = 0; j 2; j++) {
+ ret = onenand_bbt_read_oob(mtd, from + j * mtd-writesize +
bd-offs, ops);
+ if (ret || check_short_pattern(buf[j * scanlen], scanlen,
mtd-writesize, bd)) {
+ bbm-bbt[block 3] |= 0x03 (block 0x6);
+ res = 0x03;
+ printk(KERN_WARNING Bad eraseblock %d at 0x%08x\n,
+ block 1, (unsigned int) from);
+ mtd-ecc_stats.badblocks++;
+ break;
+ }
+ }
+
+ return ret;
+}
+
/**
* create_bbt - [GENERIC] Create a bad block table by scanning the device
* @param mtd MTD device structure
@@ -155,6 +192,11 @@ static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t
offs, int allowbbt)
block = (int)(offs (bbm-bbt_erase_shift - 1));
res = (bbm-bbt[block 3] (block 0x06)) 0x03;
+ if (this-options ONENAND_RUNTIME_BADBLOCK_CHECK) {
+ if (res == 0x02)
+ res = read_page_oob(mtd, offs, this-oob_buf);
+ }
+
MTDDEBUG (MTD_DEBUG_LEVEL2,
onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d)
0x%02x\n,
(unsigned int)offs, block 1, res);
@@ -210,6 +252,12 @@ int onenand_scan_bbt(struct mtd_info *mtd, struct
nand_bbt_descr *bd)
if (!bbm-isbad_bbt)
bbm-isbad_bbt = onenand_isbad_bbt;
+ if (this-options ONENAND_RUNTIME_BADBLOCK_CHECK) {
+ printk(KERN_INFO Scanning device for bad blocks (skipped)\n);
+ memset(bbm-bbt, 0xaa, len);
+ return 0;
+ }
+
/* Scan the device to build a memory based bad block table */
if ((ret = onenand_memory_bbt(mtd, bd))) {
printk(KERN_ERR
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 4b0c923..76dfce4 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -135,6 +135,7 @@ struct onenand_chip {
#define ONENAND_HAS_CONT_LOCK (0x0001)
#define ONENAND_HAS_UNLOCK_ALL (0x0002)
#define ONENAND_HAS_2PLANE (0x0004)
+#define ONENAND_RUNTIME_BADBLOCK_CHECK (0x0200)
#define ONENAND_PAGEBUF_ALLOC (0x1000)
#define ONENAND_OOBBUF_ALLOC (0x2000)
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Re: [U-Boot] [PATCH] OneNAND: Runtime badblock support
Hi,
On Tue, Jul 21, 2009 at 7:50 PM, Wolfgang Denkw...@denx.de wrote:
Dear Kyungmin Park,
In message 20090721095528.ga23...@july you wrote:
At bootloader, we don't need to read full page. It takes too long time.
Instead it only read pages required for boot.
Of course, this patch reduces the boot time
What does don't need to read full page mean?
It means all blocks at scanning time.
when we read pages, we always read fullpages, don't we?
@@ -155,6 +192,11 @@ static int onenand_isbad_bbt(struct mtd_info *mtd,
loff_t offs, int allowbbt)
block = (int)(offs (bbm-bbt_erase_shift - 1));
res = (bbm-bbt[block 3] (block 0x06)) 0x03;
+ if (this-options ONENAND_RUNTIME_BADBLOCK_CHECK) {
+ if (res == 0x02)
+ res = read_page_oob(mtd, offs, this-oob_buf);
+ }
+
ONENAND_RUNTIME_BADBLOCK_CHECK is a new #define, right? It should be
documented (for example in the README, or even better in
doc/README.OneNand or so).
It's OneNAND specific option. Umm I'll try to describe it
Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCH] OneNAND IPL: Move u-boot-onenand linker script to common use
Hi, On Sun, Jul 12, 2009 at 9:58 PM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 17:10 Sat 11 Jul , Kyungmin Park wrote: Use the common OneNAND linker script. Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- diff --git a/onenand_ipl/board/apollon/u-boot.onenand.lds b/onenand_ipl/u-boot-onenand.lds similarity index 100% rename from onenand_ipl/board/apollon/u-boot.onenand.lds rename to onenand_ipl/u-boot-onenand.lds this is arch specific please move it to lib_arm/ I want to make a conclusion. Don't you change your mind? Please give your opinion. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] OneNAND: S5PC100 OneNAND IPL support
S5PC100 has own OneNAND controller and has different interface.
OneNAND IPL use it to S5PC100 board.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/onenand_ipl/onenand_ipl.h b/onenand_ipl/onenand_ipl.h
index 412572a..b43ddfb 100644
--- a/onenand_ipl/onenand_ipl.h
+++ b/onenand_ipl/onenand_ipl.h
@@ -31,5 +31,14 @@
#define READ_INTERRUPT()\
onenand_readw(THIS_ONENAND(ONENAND_REG_INTERRUPT))
+#ifdef CONFIG_S5PC1XX
+#define AHB_ADDR 0xB000
+#define MEM_ADDR(fba, fpa, fsa)((fba) 13 | (fpa) 7 |
(fsa) 5)
+#define CMD_MAP_01(mem_addr) (AHB_ADDR | (1 26) | (mem_addr))
+#define CMD_MAP_11(addr) (AHB_ADDR | (3 26) | ((addr) 2))
+#undef onenand_readw
+#define onenand_readw(a) (readl(CMD_MAP_11((a) 1)) 0x)
+#endif
+
extern int onenand_read_block(unsigned char *buf);
#endif
diff --git a/onenand_ipl/onenand_read.c b/onenand_ipl/onenand_read.c
index d1a842d..7ffc9a9 100644
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -37,6 +37,23 @@
extern void *memcpy32(void *dest, void *src, int size);
#endif
+#ifdef CONFIG_S5PC1XX
+static inline int onenand_read_page(ulong block, ulong page,
+ u_char * buf, int pagesize)
+{
+ unsigned int *p = (unsigned int *) buf;
+ int mem_addr, i;
+
+ mem_addr = MEM_ADDR(block, page, 0);
+
+ pagesize = 2;
+
+ for (i = 0; i pagesize; i++)
+ *p++ = readl(CMD_MAP_01(mem_addr));
+
+ return 0;
+}
+#else
/* read a page with ECC */
static inline int onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
@@ -88,6 +105,7 @@ static inline int onenand_read_page(ulong block, ulong page,
return 0;
}
+#endif
#define ONENAND_START_PAGE 1
#define ONENAND_PAGES_PER_BLOCK64
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Re: [U-Boot] [PATCH 6/6] S5PC100: Add onenand_ipl for SMDKC100 support
On Tue, Jul 21, 2009 at 6:18 AM, Wolfgang Denkw...@denx.de wrote:
Dear Kyungmin Park,
In message 9c9fda240907192016i32c7312dh490629f2f2bb3...@mail.gmail.com you
wrote:
/* read a page with ECC */
static inline int onenand_read_page(ulong block, ulong page,
u_char * buf , int pagesize)
{
+#ifdef CONFIG_S5PC1XX
+ unsigned int *p = (unsigned int *) buf;
+ int mem_addr, i;
+
+ mem_addr = MEM_ADDR(block, page, 0);
+
+ pagesize = 2;
+
+ for (i = 0; i pagesize; i++)
+ *p++ = *(volatile unsigned int *)(CMD_MAP_01 (mem_addr));
+#else /* CONFIG_S5PC1XX */
+
unsigned long *base;
I don't like to see such board specific code in global files.
I think it's not board specific code. S3C64XX and S5PC1XX series have
own OneNAND controller and to access the OneNAND, it should use the
this controller.
OK, so it is SoC specific code in a common file - that's just
marginally better.
If you don't like the ifdef. we can separate the function but I'm not
sure it's really required.
It would be great if we can get rid of the #ifdef.
As you know, OneNAND IPL has size limitation, 1KiB. So it's difficult
to co-exist two different function.
Thank you,
Kyungmin Park
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[U-Boot] [PATCH] OneNAND: Remove unused read_spareram
Remove unused read_spareram and add unlock_all as kernel does
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/drivers/mtd/onenand/onenand_base.c
b/drivers/mtd/onenand/onenand_base.c
index d482437..368fa6e 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -1010,7 +1010,7 @@ int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t
from,
if (ret)
break;
- this-read_spareram(mtd, 0, ONENAND_SPARERAM, buf, column,
thislen);
+ this-read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column,
thislen);
read += thislen;
if (read == len)
break;
@@ -2104,8 +2104,6 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
if (!this-read_bufferram)
this-read_bufferram = onenand_read_bufferram;
- if (!this-read_spareram)
- this-read_spareram = onenand_read_bufferram;
if (!this-write_bufferram)
this-write_bufferram = onenand_write_bufferram;
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index 2597e34..06f7baf 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -83,10 +83,9 @@ struct onenand_chip {
size_t len);
int (*wait) (struct mtd_info *mtd, int state);
int (*bbt_wait) (struct mtd_info *mtd, int state);
+ void (*unlock_all)(struct mtd_info *mtd);
int (*read_bufferram) (struct mtd_info *mtd, loff_t addr, int area,
unsigned char *buffer, int offset, size_t count);
- int (*read_spareram) (struct mtd_info *mtd, loff_t addr, int area,
- unsigned char *buffer, int offset, size_t count);
int (*write_bufferram) (struct mtd_info *mtd, loff_t addr, int area,
const unsigned char *buffer, int offset,
size_t count);
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[U-Boot] [PATCH] [OneNAND] Fix compiler warnings after loff_t change
Now 'env_addr' type is loff_t so use correct field type.
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/common/env_onenand.c b/common/env_onenand.c
index 476fdbc..dcf09de 100644
--- a/common/env_onenand.c
+++ b/common/env_onenand.c
@@ -101,7 +101,7 @@ int saveenv(void)
instr.addr = env_addr;
instr.mtd = mtd;
if (mtd-erase(mtd, instr)) {
- printf(OneNAND: erase failed at 0x%08lx\n, env_addr);
+ printf(OneNAND: erase failed at 0x%08llx\n, env_addr);
return 1;
}
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Re: [U-Boot] env_onenand compiler warning
Hi, Thank you for pointing compiler warning. I post the patch. Thank you, Kyungmin Park On Sun, Jul 19, 2009 at 3:47 PM, Dirk Behmedirk.be...@googlemail.com wrote: Testing recent mainline git head for omap3_evm_config I get compiler warning env_onenand.c: In function 'saveenv': env_onenand.c:104: warning: format '%08lx' expects type 'long unsigned int', but argument 2 has type 'loff_t' Is there already a fix available? Thanks Dirk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM Cortex A8: Move OMAP3 specific reset handler
Hi,
It's already discussed. Actually it's required for adding new S5PC1xx
series based on arm cortext8.
Please apply it.
Thank you,
Kyungmin Park
On Mon, Jul 20, 2009 at 11:40 AM, Minkyu Kangmk7.k...@samsung.com wrote:
Because of the reset_cpu is soc specific, should be move to soc
Cc: Dirk Behme dirk.be...@googlemail.com
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
---
cpu/arm_cortexa8/omap3/Makefile | 1 +
cpu/arm_cortexa8/omap3/reset.S | 36
cpu/arm_cortexa8/start.S | 14 --
3 files changed, 37 insertions(+), 14 deletions(-)
create mode 100644 cpu/arm_cortexa8/omap3/reset.S
diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile
index 1fbd0dc..eef165c 100644
--- a/cpu/arm_cortexa8/omap3/Makefile
+++ b/cpu/arm_cortexa8/omap3/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
SOBJS := lowlevel_init.o
+SOBJS += reset.o
COBJS += board.o
COBJS += cache.o
diff --git a/cpu/arm_cortexa8/omap3/reset.S b/cpu/arm_cortexa8/omap3/reset.S
new file mode 100644
index 000..a53c408
--- /dev/null
+++ b/cpu/arm_cortexa8/omap3/reset.S
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2009 Samsung Electronics.
+ * Minkyu Kang mk7.k...@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include config.h
+
+.global reset_cpu
+reset_cpu:
+ ldr r1, rstctl @ get addr for global reset
+ @ reg
+ mov r3, #0x2 @ full reset pll + mpu
+ str r3, [r1] @ force reset
+ mov r0, r0
+_loop_forever:
+ b _loop_forever
+rstctl:
+ .word PRM_RSTCTRL
diff --git a/cpu/arm_cortexa8/start.S b/cpu/arm_cortexa8/start.S
index 66b4820..6bd6552 100644
--- a/cpu/arm_cortexa8/start.S
+++ b/cpu/arm_cortexa8/start.S
@@ -500,17 +500,3 @@ finished_inval:
@ but we compile with armv5
ldmfd r13!, {r0 - r5, r7, r9 - r12, pc}
-
-
- .align 5
-.global reset_cpu
-reset_cpu:
- ldr r1, rstctl @ get addr for global reset
- @ reg
- mov r3, #0x2 @ full reset pll + mpu
- str r3, [r1] @ force reset
- mov r0, r0
-_loop_forever:
- b _loop_forever
-rstctl:
- .word PRM_RSTCTRL
--
1.5.4.3
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Re: [U-Boot] [PATCH 6/6] S5PC100: Add onenand_ipl for SMDKC100 support
Hi,
On Mon, Jul 20, 2009 at 5:04 AM, Wolfgang Denkw...@denx.de wrote:
Dear HeungJun Kim,
In message 350d1ec30906250121q4e860812s35054aaee8c20...@mail.gmail.com you
wrote:
The SMDKC100 Board has 256MB onenand.
So, It's bootable, if this patch is adapted thus the board use onenand_ipl.
Signed-off-by: HeungJun, Kim riverful@samsung.com
---
This patch support onenand boot on SMDKC100 Board.
...
diff --git a/onenand_ipl/board/samsung/smdkc100/Makefile
b/onenand_ipl/board/samsung/smdkc100/Makefile
new file mode 100644
index 000..4301938
--- /dev/null
+++ b/onenand_ipl/board/samsung/smdkc100/Makefile
...
+ALL = $(onenandobj)onenand-ipl $(onenandobj)onenand-ipl.bin
$(onenandobj)onenand-ipl-2k.bin $(onenandobj)onenand-ipl-4k.bin
This patch is white-space corrupted. I gues this happened here because
the line was way too long.
--- a/onenand_ipl/onenand_read.c
+++ b/onenand_ipl/onenand_read.c
@@ -37,10 +37,24 @@
extern void *memcpy32(void *dest, void *src, int size);
#endif
+
+
Please do not arbitrary empty lines.
/* read a page with ECC */
static inline int onenand_read_page(ulong block, ulong page,
u_char * buf, int pagesize)
{
+#ifdef CONFIG_S5PC1XX
+ unsigned int *p = (unsigned int *) buf;
+ int mem_addr, i;
+
+ mem_addr = MEM_ADDR(block, page, 0);
+
+ pagesize = 2;
+
+ for (i = 0; i pagesize; i++)
+ *p++ = *(volatile unsigned int *)(CMD_MAP_01(mem_addr));
+#else /* CONFIG_S5PC1XX */
+
unsigned long *base;
I don't like to see such board specific code in global files.
I think it's not board specific code. S3C64XX and S5PC1XX series have
own OneNAND controller and to access the OneNAND, it should use the
this controller.
If you don't like the ifdef. we can separate the function but I'm not
sure it's really required.
Also, please use I/O accessor functions instead of register accesses.
readl(...)? If yes, I agree it.
@@ -114,6 +129,9 @@ int onenand_read_block(unsigned char *buf)
erasesize = ONENAND_PAGES_PER_BLOCK * pagesize;
nblocks = (CONFIG_SYS_MONITOR_LEN + erasesize - 1) erase_shift;
+#ifdef CONFIG_S5PC1XX
+ nblocks = 1;
+#endif
Again: why do we need such board specific code here?
It should be fixed.
Thank you,
Kyungmin Park
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Re: [U-Boot] [PATCH] OneNAND IPL: Move u-boot-onenand linker script to common use
Hi, On Sun, Jul 12, 2009 at 9:58 PM, Jean-Christophe PLAGNIOL-VILLARDplagn...@jcrosoft.com wrote: On 17:10 Sat 11 Jul , Kyungmin Park wrote: Use the common OneNAND linker script. Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- diff --git a/onenand_ipl/board/apollon/u-boot.onenand.lds b/onenand_ipl/u-boot-onenand.lds similarity index 100% rename from onenand_ipl/board/apollon/u-boot.onenand.lds rename to onenand_ipl/u-boot-onenand.lds this is arch specific please move it to lib_arm/ Basically I agree your opinion, however do see the other arch OneNAND usage? I mean I can't see the other arch patches. I think until other arch uses it, I want to place it at onenand_ipl directory. How do you think? Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] MTD: OneNAND: Increase the environment size to 4KiB
Also use mtd operatoin instead of onenand functions
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
diff --git a/common/env_onenand.c b/common/env_onenand.c
index 48089a9..476fdbc 100644
--- a/common/env_onenand.c
+++ b/common/env_onenand.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005-2007 Samsung Electronics
+ * (C) Copyright 2005-2009 Samsung Electronics
* Kyungmin Park kyungmin.p...@samsung.com
*
* See file CREDITS for list of people who contributed to this
@@ -37,15 +37,16 @@ extern struct onenand_chip onenand_chip;
/* References to names in env_common.c */
extern uchar default_environment[];
-#define ONENAND_ENV_SIZE(mtd) (mtd.writesize - ENV_HEADER_SIZE)
-
char *env_name_spec = OneNAND;
+#define ONENAND_MAX_ENV_SIZE 4096
+#define ONENAND_ENV_SIZE(mtd) (ONENAND_MAX_ENV_SIZE - ENV_HEADER_SIZE)
+
#ifdef ENV_IS_EMBEDDED
extern uchar environment[];
env_t *env_ptr = (env_t *) (environment[0]);
#else /* ! ENV_IS_EMBEDDED */
-static unsigned char onenand_env[MAX_ONENAND_PAGESIZE];
+static unsigned char onenand_env[ONENAND_MAX_ENV_SIZE];
env_t *env_ptr = (env_t *) onenand_env;
#endif /* ENV_IS_EMBEDDED */
@@ -58,6 +59,7 @@ uchar env_get_char_spec(int index)
void env_relocate_spec(void)
{
+ struct mtd_info *mtd = onenand_mtd;
loff_t env_addr;
int use_default = 0;
size_t retlen;
@@ -65,22 +67,21 @@ void env_relocate_spec(void)
env_addr = CONFIG_ENV_ADDR;
/* Check OneNAND exist */
- if (onenand_mtd.writesize)
+ if (mtd-writesize)
/* Ignore read fail */
- onenand_read(onenand_mtd, env_addr, onenand_mtd.writesize,
+ mtd-read(mtd, env_addr, ONENAND_MAX_ENV_SIZE,
retlen, (u_char *) env_ptr);
else
- onenand_mtd.writesize = MAX_ONENAND_PAGESIZE;
+ mtd-writesize = MAX_ONENAND_PAGESIZE;
- if (crc32(0, env_ptr-data, ONENAND_ENV_SIZE(onenand_mtd)) !=
- env_ptr-crc)
+ if (crc32(0, env_ptr-data, ONENAND_ENV_SIZE(mtd)) != env_ptr-crc)
use_default = 1;
if (use_default) {
memcpy(env_ptr-data, default_environment,
- ONENAND_ENV_SIZE(onenand_mtd));
+ ONENAND_ENV_SIZE(mtd));
env_ptr-crc =
- crc32(0, env_ptr-data, ONENAND_ENV_SIZE(onenand_mtd));
+ crc32(0, env_ptr-data, ONENAND_ENV_SIZE(mtd));
}
gd-env_addr = (ulong) env_ptr-data;
@@ -89,7 +90,8 @@ void env_relocate_spec(void)
int saveenv(void)
{
- unsigned long env_addr = CONFIG_ENV_ADDR;
+ struct mtd_info *mtd = onenand_mtd;
+ loff_t env_addr = CONFIG_ENV_ADDR;
struct erase_info instr = {
.callback = NULL,
};
@@ -97,17 +99,16 @@ int saveenv(void)
instr.len = CONFIG_ENV_SIZE;
instr.addr = env_addr;
- instr.mtd = onenand_mtd;
- if (onenand_erase(onenand_mtd, instr)) {
+ instr.mtd = mtd;
+ if (mtd-erase(mtd, instr)) {
printf(OneNAND: erase failed at 0x%08lx\n, env_addr);
return 1;
}
/* update crc */
- env_ptr-crc =
- crc32(0, env_ptr-data, ONENAND_ENV_SIZE(onenand_mtd));
+ env_ptr-crc = crc32(0, env_ptr-data, ONENAND_ENV_SIZE(mtd));
- if (onenand_write(onenand_mtd, env_addr, onenand_mtd.writesize,
retlen,
+ if (mtd-write(mtd, env_addr, ONENAND_MAX_ENV_SIZE, retlen,
(u_char *) env_ptr)) {
printf(OneNAND: write failed at 0x%llx\n, instr.addr);
return 2;
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[U-Boot] [PATCH] OneNAND IPL: Move u-boot-onenand linker script to common use
Use the common OneNAND linker script. Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- diff --git a/onenand_ipl/board/apollon/u-boot.onenand.lds b/onenand_ipl/u-boot-onenand.lds similarity index 100% rename from onenand_ipl/board/apollon/u-boot.onenand.lds rename to onenand_ipl/u-boot-onenand.lds ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Apollon board use common OneNAND IPL linker
Use common OneNAND IPL linker script. Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile index 49a8e90..f0744f6 100644 --- a/onenand_ipl/board/apollon/Makefile +++ b/onenand_ipl/board/apollon/Makefile @@ -2,7 +2,7 @@ include $(TOPDIR)/config.mk include $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/config.mk -LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot.onenand.lds +LDSCRIPT= $(TOPDIR)/onenand_ipl/u-boot-onenand.lds LDFLAGS= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL CFLAGS += -DCONFIG_PRELOADER -DCONFIG_ONENAND_IPL ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/6] S5PC100: onenand driver for SMDKC100 support
Hi,
On Sat, Jun 27, 2009 at 2:54 AM, Scott Woodscottw...@freescale.com wrote:
On Thu, Jun 25, 2009 at 05:10:37PM +0900, HeungJun Kim wrote:
This patch includes the onenand driver for SMDKC100 Board.
Signed-off-by: HeungJun, Kim riverful@samsung.com
---
drivers/mtd/onenand/Makefile | 8 +-
drivers/mtd/onenand/s5p_onenand.c | 2034
+
include/linux/mtd/onenand_regs.h | 5 +
include/linux/mtd/s5p_onenand.h | 425
Please try to refactor the existing onenand code to support controller
variations, rather than duplicating parts of it.
Or if you can find absolutely no common ground (but I hope you can), at
least change the names so they don't conflict. Are you planning on
supporting this in Linux? What is it going to look like there?
Kyungmin, any thoughts? Why do we have a specific controller
implementation in something generically named onenand_base.c? Or is
this different because of a different type of onenand chip?
Right, I wrote the OneNAND drivers for s3c64xx/s5pc100 but now only
interface part are release at mtd arm list.
The current status of this patch only *working* version. So I NAKed
this patch. next time Mr Kim will post the new OneNAND drivers
Thank you,
Kyungmin Park
I don't understand OneNAND very well (and google doesn't turn up much but
marketing), which makes including it under the same custodianship as NAND
somewhat awkward. :-(
diff --git a/drivers/mtd/onenand/Makefile b/drivers/mtd/onenand/Makefile
index 1d35a57..aad1362 100644
--- a/drivers/mtd/onenand/Makefile
+++ b/drivers/mtd/onenand/Makefile
@@ -25,7 +25,13 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libonenand.a
-COBJS-$(CONFIG_CMD_ONENAND) := onenand_uboot.o onenand_base.o onenand_bbt.o
+COBJS-$(CONFIG_CMD_ONENAND) := onenand_uboot.o
+
+ifdef CONFIG_S5PC1XX
+COBJS-$(CONFIG_CMD_ONENAND) += s5p_onenand.o
+else
+COBJS-$(CONFIG_CMD_ONENAND) += onenand_base.o onenand_bbt.o
+endif
Why no bbt?
This driver checks the bad block at runtime at every access. :)
+/**
+ * onenand_read_burst
+ *
+ * 16 Burst read: performance is improved up to 40%.
+ */
+static void onenand_read_burst(void *dest, const void *src, size_t len)
+{
+ int count;
+
+ if (len % 16 != 0)
+ return;
+
+ count = len / 16;
+
+ __asm__ __volatile__(
+ stmdb r13!, {r0-r3,r9-r12}\n
+ mov r2, %0\n
+ 1:\n
+ ldmia r1, {r9-r12}\n
+ stmia r0!, {r9-r12}\n
+ subs r2, r2, #0x1\n
+ bne 1b\n
+ ldmia r13!, {r0-r3,r9-r12}\n::r (count));
+}
What is this doing that we couldn't generically make memcpy do?
Even though It looks some strange. it has some performance gain. but
not general.
-Scott
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Re: [U-Boot] [PATCH 5/6] S5PC100: MTD: change env_address type
On Thu, Jun 25, 2009 at 5:18 PM, HeungJun Kimriverful@gmail.com wrote: This patch changed the type from unsigned long to loff_t in the common/env_onenand.c. The address type is changed from unsigned long to loff_t, but common/env_onenand.c is not yet. So, this patch is needed to get the accurate value of env_addr. Signed-off-by: HeungJun, Kim riverful@samsung.com Acked-by: Kyungmin Park kyungmin.p...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] apollon: Fix a OBJCFLAGS typo
Acked-by: Kyungmin Park kyungmin.p...@samsung.com -Original Message- From: Shinya Kuribayashi [mailto:skuri...@ruby.dti.ne.jp] Sent: Sunday, June 07, 2009 9:45 PM To: kyungmin.p...@samsung.com Cc: u-boot@lists.denx.de Subject: apollon: Fix a OBJCFLAGS typo Signed-off-by: Shinya Kuribayashi skuri...@pobox.com --- Hi, I happened to find this typo with the help of vim highlight. onenand_ipl/board/apollon/Makefile |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile index 1f996a4..f6c36ec 100644 --- a/onenand_ipl/board/apollon/Makefile +++ b/onenand_ipl/board/apollon/Makefile @@ -6,7 +6,7 @@ LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u- boot.onenand.lds LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) AFLAGS += -DCONFIG_ONENAND_IPL CFLAGS += -DCONFIG_ONENAND_IPL -OBJCLFAGS += --gap-fill=0x00 +OBJCFLAGS += --gap-fill=0x00 SOBJS:= low_levelinit.o SOBJS+= start.o ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] Fix OneNAND ipl to read CONFIG_SYS_MONITOR_LEN
Hi, Please apply this patch for fixing broken apollon build. Acked-by: Kyungmin Park kyungmin.p...@samsung.com On Mon, Mar 9, 2009 at 11:15 PM, Rohit Hagargundgi h.ro...@samsung.com wrote: Add CONFIG_SYS_MONITOR_LEN macro to apollon board config. CONFIG_SYS_MONITOR_LEN defines the U-Boot image size. and is used by OneNAND ipl when reading U-Boot image. Signed-off-by: Rohit Hagargundgi h.rohit at samsung.com --- include/configs/apollon.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/apollon.h b/include/configs/apollon.h index dff47fc..2e8198f 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -254,6 +254,7 @@ /* OneNAND boot, OneNAND has CS0, NOR boot ONeNAND has CS2 */ #define CONFIG_SYS_ONENAND_BASE 0x +#define CONFIG_SYS_MONITOR_LEN SZ_256K /* U-Boot image size */ #define CONFIG_ENV_IS_IN_ONENAND 1 #define CONFIG_ENV_ADDR 0x0002 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] Fix OneNAND ipl to read CONFIG_SYS_MONITOR_LEN
Hi, On Fri, Apr 24, 2009 at 2:28 PM, AYYANARPONNUSAMY GANGHEYAMOORTHY moorthy@samsung.com wrote: Hi Scott, On Apr 24, 2009 07:39 (GMT+09:00) Scott Woodscottw...@freescale.com wrote apgmoorthy wrote: This is done by the Post : [U-Boot] [PATCH 2/2] Fix OneNAND ipl to read CONFIG_SYS_MONITOR_LEN What do you feel about getting this one inside u-boot-nand-flash ? Such a change should go through the board maintainer, who knows better what the actual length is. - Correct , I got your point. Hi Kyungmin, Can you please make a call on this , for apollon and get CONFIG_SYS_MONITOR_LEN in. Actually, I don't like the CONFIG_SYS_MONITOR_LEN approaches, now you are consider the bad block at 1. But we can also consider the bad block 2, if there two consecutive 2 bad block at block 1, 2, we should define the CONFIG_SYS_MONITOR_LEN as 128KiB * 4 and reserved block block 4 always even though we use 2 blocks. Right, we should consider bad block at IPL, so my recommendation is IPL + u-boot should be fit at block 0 128KiB at OneNAND, 256KiB at Flex-OneNAND. In case of apollon. we should reduce the size as 128KiB for OneNAND side. If the IPL + u-boot size under 128KiB, Flex-OneNAND also can boot it. For simplicity How about to use block scheme? we always use block 0 for boot (IPL + u-boot) whatever block size. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] [ARM] Move machine specific code to board at s3c64xx (v2)
On Thu, Apr 2, 2009 at 2:18 PM, Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com wrote: On 13:43 Thu 02 Apr , Kyungmin Park wrote: Hi, If there's no objection, could you apply this patch to ARM git tree? Just one question is the OneNand always 16bits? Sure as I know, there's no exception. Thank you, Kyungmin Park ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
