Re: [U-Boot] [PATCH 1/1] board/ls2080ardb: Remove CONFIG_DISPLAY_BOARDINFO_LATE
> -Original Message- > From: Poonam Aggrwal > Sent: Friday, August 18, 2017 4:17 PM > To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; Santan Kumar > <santan.ku...@nxp.com>; u-boot@lists.denx.de; York Sun > <york@nxp.com> > Cc: Priyanka Jain <priyanka.j...@nxp.com> > Subject: RE: [U-Boot] [PATCH 1/1] board/ls2080ardb: Remove > CONFIG_DISPLAY_BOARDINFO_LATE > > > > -Original Message- > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of > Prabhakar Kushwaha > Sent: Friday, August 18, 2017 3:53 PM > To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de; York > Sun <york@nxp.com> > Cc: Priyanka Jain <priyanka.j...@nxp.com> > Subject: Re: [U-Boot] [PATCH 1/1] board/ls2080ardb: Remove > CONFIG_DISPLAY_BOARDINFO_LATE > > > > -Original Message- > > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Santan > > Kumar > > Sent: Friday, August 18, 2017 3:21 PM > > To: u-boot@lists.denx.de; York Sun <york@nxp.com> > > Cc: Priyanka Jain <priyanka.j...@nxp.com> > > Subject: [U-Boot] [PATCH 1/1] board/ls2080ardb: Remove > > CONFIG_DISPLAY_BOARDINFO_LATE > > > > CONFIG_DISPLAY_BOARDINFO_LATE config is used to delay the prints of > > boardinfo late in cycle during uboot boot. > > This feature is not required in case of QSPI_BOOT. > > > I am not aware of the history of the change, but the patch description does > not sufficiently describe why this change has been done. Why in case of QSPI > Boot BOARD information is not required to be printed late. [Santan] We can use any of one flag CONFIG_DISPLAY_BOARDINFO_LATE or CONFIG_DISPLAY_BOARDINFO to display board info during boot. Since we are using CONFIG_DISPLAY_BOARDINFO in case of QSPI boot that's why this flag is removed. In some specific cases in which information was not ready at start we can should use CONFIG_DISPLAY_BOARDINFO_LATE. > > Signed-off-by: Santan Kumar <santan.ku...@nxp.com> > > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> > > --- > > Reviewed-by : Prabhakar Kushwaha <prabhakar.kushw...@nxp.com> > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] board/ls2081ardb: Update QSPI flash type from n25q512a to s25fs512s
> -Original Message- > From: Prabhakar Kushwaha > Sent: Friday, August 18, 2017 3:52 PM > To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de; York > Sun <york@nxp.com> > Cc: Priyanka Jain <priyanka.j...@nxp.com> > Subject: RE: [U-Boot] [PATCH 1/1] board/ls2081ardb: Update QSPI flash type > from n25q512a to s25fs512s > > > > -Original Message- > > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Santan > > Kumar > > Sent: Friday, August 18, 2017 3:21 PM > > To: u-boot@lists.denx.de; York Sun <york@nxp.com> > > Cc: Priyanka Jain <priyanka.j...@nxp.com> > > Subject: [U-Boot] [PATCH 1/1] board/ls2081ardb: Update QSPI flash type > > from n25q512a to s25fs512s > > > > As per updated board design, different QSPI flash is connected on > > boards, hence change QSPI flash type from Micron n25q512a device to > > spansion s25fs512s device in dts and config. > > How backward compatibility with older boards being managed? > > > --prabhakar >>[Santan] All older board are using Spansion flash. Initially Micron flash was >>planned to place in LS2081ARDB board but at last moment flash was changed. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] board/ls2081ardb: Update QSPI flash type from n25q512a to s25fs512s
As per updated board design, different QSPI flash
is connected on boards, hence change QSPI flash type
from Micron n25q512a device to spansion s25fs512s
device in dts and config.
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.g...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
This patch is split version of another patch
https://patchwork.ozlabs.org/patch/779931/
arch/arm/dts/fsl-ls2081a-rdb.dts | 4 ++--
include/configs/ls2080ardb.h | 6 +-
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-rdb.dts
index 6489362..aa4aa68 100644
--- a/arch/arm/dts/fsl-ls2081a-rdb.dts
+++ b/arch/arm/dts/fsl-ls2081a-rdb.dts
@@ -41,7 +41,7 @@
bus-num = <0>;
status = "okay";
- qflash0: n25q512a@0 {
+ qflash0: s25fs512s@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
@@ -49,7 +49,7 @@
reg = <0>;
};
- qflash1: n25q512a@1 {
+ qflash1: s25fs512s@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2dab065..9b9a710 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -293,19 +293,15 @@ unsigned long get_board_sys_clk(void);
/* SPI */
#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
#define CONFIG_SPI_FLASH
-#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO
#endif
#ifdef CONFIG_FSL_QSPI
-#ifdef CONFIG_TARGET_LS2081ARDB
-#define CONFIG_SPI_FLASH_STMICRO
-#else
#define CONFIG_SPI_FLASH_SPANSION
#endif
#define FSL_QSPI_FLASH_SIZESZ_64M /* 64MB */
#define FSL_QSPI_FLASH_NUM 2
#endif
-#endif
/*
* RTC configuration
--
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[U-Boot] [PATCH 1/1] board/ls2080ardb: Remove CONFIG_DISPLAY_BOARDINFO_LATE
CONFIG_DISPLAY_BOARDINFO_LATE config is used to delay the prints of boardinfo late in cycle during uboot boot. This feature is not required in case of QSPI_BOOT. Signed-off-by: Santan Kumar <santan.ku...@nxp.com> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> --- This patch is split version of another patch https://patchwork.ozlabs.org/patch/779931/ include/configs/ls2080ardb.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 9b9a710..a5f7eea 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -18,7 +18,6 @@ #define CONFIG_QIXIS_I2C_ACCESS #endif #define CONFIG_SYS_I2C_EARLY_INIT -#define CONFIG_DISPLAY_BOARDINFO_LATE #endif #define I2C_MUX_CH_VOL_MONITOR 0xa -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] board/ls2081ardb: Update display information during boot
This patch modifies checkboard() for below changes:
-Remove Board Arch print
Arch contains Qixis architecture version
This field is more relevant for QDS boards.
For RDB boards it is always constant as '1'.
-Correct the QMAP information.
QMAP controls hows QSPI_A chip-selects are connected to
various peripherals. And this information are saved in
rightmost three bits. Hence, need to use only these three bits.
-Add print to display FPGA information.
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
This patch is split version of another patch
https://patchwork.ozlabs.org/patch/779931/
board/freescale/ls2080ardb/ls2080ardb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 0017f60..bae4b6f 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -71,11 +71,10 @@ int checkboard(void)
#ifdef CONFIG_TARGET_LS2081ARDB
#ifdef CONFIG_FSL_QIXIS
sw = QIXIS_READ(arch);
- printf("Board Arch: V%d, ", sw >> 4);
printf("Board version: %c, ", (sw & 0xf) + 'A');
sw = QIXIS_READ(brdcfg[0]);
- sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT;
+ sw = ((sw >> QIXIS_QMAP_SHIFT) & QIXIS_QMAP_MASK);
switch (sw) {
case 0:
puts("boot from QSPI DEV#0\n");
@@ -101,6 +100,7 @@ int checkboard(void)
printf("invalid setting of SW%u\n", sw);
break;
}
+ printf("FPGA: v%d.%d\n", QIXIS_READ(scver), QIXIS_READ(tagdata));
#endif
puts("SERDES1 Reference : ");
printf("Clock1 = 100MHz ");
--
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[U-Boot] [PATCH 1/1][v2] armv8: ls2080a: Increase env sector size for qspi boot
Increase env sector size from 64kb to 256kb for qspi boot Signed-off-by: Santan Kumar <santan.ku...@nxp.com> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> --- Changes for v2: -Change the commit message include/configs/ls2080a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e311d0b..68191f2 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -34,7 +34,7 @@ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x30/* 3MB */ -#define CONFIG_ENV_SECT_SIZE 0x1 +#define CONFIG_ENV_SECT_SIZE 0x4 #endif #define CONFIG_SUPPORT_RAW_INITRD -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] armv8: ls2080a: Increase env size for qspi boot
> -Original Message- > From: York Sun > Sent: Tuesday, August 08, 2017 11:26 PM > To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de > Cc: Priyanka Jain <priyanka.j...@nxp.com> > Subject: Re: [PATCH 1/1] armv8: ls2080a: Increase env size for qspi boot > > On 06/23/2017 03:07 AM, Santan Kumar wrote: > > Increase env size from 64kb to 256kb for qspi boot > > > > Signed-off-by: Santan Kumar <santan.ku...@nxp.com> > > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> > > --- > > This patch is split version of another patch > > > > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat > > > chwork.ozlabs.org%2Fpatch%2F773670%2F=01%7C01%7Cyork.sun%40 > nxp.co > > > m%7Cf71f395a0cb94adb322b08d4ba1fb900%7C686ea1d3bc2b4c6fa92cd99c5c > 30163 > > > 5%7C0=%2FvMEmB84i5peyUh4JMHi6k%2Fc5cm76x1JMftBeLSANWc% > 3D > > d=0 > > > > include/configs/ls2080a_common.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/include/configs/ls2080a_common.h > > b/include/configs/ls2080a_common.h > > index e311d0b..68191f2 100644 > > --- a/include/configs/ls2080a_common.h > > +++ b/include/configs/ls2080a_common.h > > @@ -34,7 +34,7 @@ > > #define CONFIG_ENV_IS_IN_SPI_FLASH > > #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ > > #define CONFIG_ENV_OFFSET 0x30/* 3MB */ > > -#define CONFIG_ENV_SECT_SIZE 0x1 > > +#define CONFIG_ENV_SECT_SIZE 0x4 > > #endif > > > > #define CONFIG_SUPPORT_RAW_INITRD > > > > > Santan, > > You are increasing the sector size, not the env size. Is this what you intend > to > do? > > York [Santan] Yes, my intent is to increase the sector size, because the env erase will work in the multiple of 256kb. If you want I can change the commit message. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] board: ls2080ardb: Add fsl_fdt_fixup_flash
IFC and QSPI are muxed on board.
Add fsl_fdt_fixup_flash()
-To disable IFC node in dts if QSPI is enabled.
-Or disable QSPI node in dts if IFC is enabled.
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
board/freescale/ls2080ardb/ls2080ardb.c | 28
1 file changed, 28 insertions(+)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index df2d768..0017f60 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -341,6 +341,32 @@ void board_quiesce_devices(void)
#endif
#ifdef CONFIG_OF_BOARD_SETUP
+void fsl_fdt_fixup_flash(void *fdt)
+{
+ int offset;
+
+/*
+ * IFC and QSPI are muxed on board.
+ * So disable IFC node in dts if QSPI is enabled or
+ * disable QSPI node in dts in case QSPI is not enabled.
+ */
+#ifdef CONFIG_FSL_QSPI
+ offset = fdt_path_offset(fdt, "/soc/ifc");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/ifc");
+#else
+ offset = fdt_path_offset(fdt, "/soc/quadspi");
+
+ if (offset < 0)
+ offset = fdt_path_offset(fdt, "/quadspi");
+#endif
+ if (offset < 0)
+ return;
+
+ fdt_status_disabled(fdt, offset);
+}
+
int ft_board_setup(void *blob, bd_t *bd)
{
u64 base[CONFIG_NR_DRAM_BANKS];
@@ -368,6 +394,8 @@ int ft_board_setup(void *blob, bd_t *bd)
fsl_fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_flash(blob);
+
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
#endif
--
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[U-Boot] [PATCH 1/1] driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier if dpl applied
In fsl_mc_ldpaa_exit(), in case of mc is booted and
dpl is applied, it should return earlier without executing
dpbp_exit()
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
---
This piece of code is mistakenly removed in below patch.
https://patchwork.ozlabs.org/patch/756038/
drivers/net/fsl-mc/mc.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 8bf25c7..3a30c03 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1336,14 +1336,18 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
{
int err = 0;
bool is_dpl_apply_status = false;
+ bool mc_boot_status = false;
if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
mc_apply_dpl(mc_lazy_dpl_addr);
mc_lazy_dpl_addr = 0;
}
+ if (!get_mc_boot_status())
+ mc_boot_status = true;
+
/* MC is not loaded intentionally, So return success. */
- if (bd && get_mc_boot_status() != 0)
+ if (bd && !mc_boot_status)
return 0;
/* If DPL is deployed, set is_dpl_apply_status as TRUE. */
@@ -1354,11 +1358,14 @@ int fsl_mc_ldpaa_exit(bd_t *bd)
* For case MC is loaded but DPL is not deployed, return success and
* print message on console. Else FDT fix-up code execution hanged.
*/
- if (bd && !get_mc_boot_status() && !is_dpl_apply_status) {
+ if (bd && mc_boot_status && !is_dpl_apply_status) {
printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
return 0;
}
+ if (bd && mc_boot_status && is_dpl_apply_status)
+ return 0;
+
err = dpbp_exit();
if (err < 0) {
printf("dpbp_exit() failed: %d\n", err);
--
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[U-Boot] [PATCH 1/1] board/ls2081ardb: Some updates like flash type
Patch makes below changes:
-Update QSPI flash type
As per updated board design,
different QSPI flash is connected on boards,
hence change QSPI flash type from
Micron n25q512a device to spansion s25fs512s
device in dts and config.
-Update QIXIS_QMAP_MASK value from 0x07 to 0x70
-Update checkboard()
display of boot source and board information
-Correct DSPI flash config selection
-Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.g...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
This patch is split version of another patch
https://patchwork.ozlabs.org/patch/773670/
arch/arm/dts/fsl-ls2081a-rdb.dts| 4 ++--
board/freescale/ls2080ardb/ls2080ardb.c | 13 ++---
include/configs/ls2080ardb.h| 9 ++---
3 files changed, 6 insertions(+), 20 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-rdb.dts
index 6489362..aa4aa68 100644
--- a/arch/arm/dts/fsl-ls2081a-rdb.dts
+++ b/arch/arm/dts/fsl-ls2081a-rdb.dts
@@ -41,7 +41,7 @@
bus-num = <0>;
status = "okay";
- qflash0: n25q512a@0 {
+ qflash0: s25fs512s@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
@@ -49,7 +49,7 @@
reg = <0>;
};
- qflash1: n25q512a@1 {
+ qflash1: s25fs512s@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 210142c..30398fc 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -71,36 +71,27 @@ int checkboard(void)
#ifdef CONFIG_TARGET_LS2081ARDB
#ifdef CONFIG_FSL_QIXIS
sw = QIXIS_READ(arch);
- printf("Board Arch: V%d, ", sw >> 4);
printf("Board version: %c, ", (sw & 0xf) + 'A');
sw = QIXIS_READ(brdcfg[0]);
sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT;
switch (sw) {
case 0:
+ case 4:
puts("boot from QSPI DEV#0\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
break;
case 1:
puts("boot from QSPI DEV#1\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
break;
case 2:
- puts("boot from QSPI EMU\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
- break;
case 3:
puts("boot from QSPI EMU\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
- break;
- case 4:
- puts("boot from QSPI DEV#0\n");
- puts("QSPI_CSA_1 mapped to QSPI EMU\n");
break;
default:
printf("invalid setting of SW%u\n", sw);
break;
}
+ printf("FPGA: v%d.%d\n", QIXIS_READ(scver), QIXIS_READ(tagdata));
#endif
puts("SERDES1 Reference : ");
printf("Clock1 = 100MHz ");
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2dab065..d438f9c 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -18,7 +18,6 @@
#define CONFIG_QIXIS_I2C_ACCESS
#endif
#define CONFIG_SYS_I2C_EARLY_INIT
-#define CONFIG_DISPLAY_BOARDINFO_LATE
#endif
#define I2C_MUX_CH_VOL_MONITOR 0xa
@@ -264,7 +263,7 @@ unsigned long get_board_sys_clk(void);
#ifdef CONFIG_TARGET_LS2081ARDB
#define CONFIG_FSL_QIXIS /* use common QIXIS code */
-#define QIXIS_QMAP_MASK0x07
+#define QIXIS_QMAP_MASK0x70
#define QIXIS_QMAP_SHIFT 5
#define QIXIS_LBMAP_DFLTBANK 0x00
#define QIXIS_LBMAP_QSPI 0x00
@@ -293,19 +292,15 @@ unsigned long get_board_sys_clk(void);
/* SPI */
#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
#define CONFIG_SPI_FLASH
-#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO
#endif
#ifdef CONFIG_FSL_QSPI
-#ifdef CONFIG_TARGET_LS2081ARDB
-#define CONFIG_SPI_FLASH_STMICRO
-#else
#define CONFIG_SPI_FLASH_SPANSION
#endif
#define FSL_QSPI_FLASH_SIZESZ_64M /* 64MB */
#define FSL_QSPI_FLASH_NUM 2
#endif
-#endif
/*
* RTC configuration
--
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[U-Boot] [PATCH 1/1] armv8: ls2080a: Increase env size for qspi boot
Increase env size from 64kb to 256kb for qspi boot Signed-off-by: Santan Kumar <santan.ku...@nxp.com> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> --- This patch is split version of another patch https://patchwork.ozlabs.org/patch/773670/ include/configs/ls2080a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e311d0b..68191f2 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -34,7 +34,7 @@ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x30/* 3MB */ -#define CONFIG_ENV_SECT_SIZE 0x1 +#define CONFIG_ENV_SECT_SIZE 0x4 #endif #define CONFIG_SUPPORT_RAW_INITRD -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] board:ls2080ardb: Update execution of config_board_mux
config_board_mux() is dependent on 'hwconfig' env read value.
For some bootloaders like QSPI, env is ready only after
relocation. So delay execution of config_board_mux()
to misc_init_r().
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
---
board/freescale/ls2080ardb/ls2080ardb.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 9d21d1e..c398844 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -195,25 +195,12 @@ int config_board_mux(int ctrl_type)
int board_init(void)
{
- char *env_hwconfig;
- u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
#ifdef CONFIG_FSL_MC_ENET
u32 __iomem *irq_ccsr = (u32 __iomem *)ISC_BASE;
#endif
- u32 val;
init_final_memctl_regs();
- val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
-
- env_hwconfig = getenv("hwconfig");
-
- if (hwconfig_f("dspi", env_hwconfig) &&
- DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
- config_board_mux(MUX_TYPE_DSPI);
- else
- config_board_mux(MUX_TYPE_SDHC);
-
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)_environment[0];
#endif
@@ -248,6 +235,20 @@ int board_early_init_f(void)
int misc_init_r(void)
{
+ char *env_hwconfig;
+ u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
+ u32 val;
+
+ val = in_le32(dcfg_ccsr + DCFG_RCWSR13 / 4);
+
+ env_hwconfig = getenv("hwconfig");
+
+ if (hwconfig_f("dspi", env_hwconfig) &&
+ DCFG_RCWSR13_DSPI == (val & (u32)(0xf << 8)))
+ config_board_mux(MUX_TYPE_DSPI);
+ else
+ config_board_mux(MUX_TYPE_SDHC);
+
/*
* LS2081ARDB RevF board has smart voltage translator
* which needs to be programmed to enable high speed SD interface
--
1.9.1
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[U-Boot] [PATCH 1/1] fsl/usb: enable errata-a010151 for ls2088a and ls2081a
Signed-off-by: Santan Kumar <santan.ku...@nxp.com> --- drivers/usb/common/fsl-errata.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c index 338ac08..383a433 100644 --- a/drivers/usb/common/fsl-errata.c +++ b/drivers/usb/common/fsl-errata.c @@ -198,6 +198,10 @@ bool has_erratum_a010151(void) #ifdef CONFIG_ARM64 case SVR_LS2080A: case SVR_LS2085A: + /* fallthrough */ + case SVR_LS2088A: + /* fallthrough */ + case SVR_LS2081A: case SVR_LS1046A: case SVR_LS1012A: return IS_SVR_REV(svr, 1, 0); -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A
Update SVR as per the SOC document.
-LS2081A: 0x870919 -> 0x870918
-LS2041A: 0x870915 -> 0x870914
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Hou Zhiqiang <zhiqiang@nxp.com>
---
arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++--
drivers/pci/pcie_layerscape.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index cc3b079..fae5730 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -55,8 +55,8 @@ struct cpu_type {
#define SVR_LS2084A0x870910
#define SVR_LS2048A0x870920
#define SVR_LS2044A0x870930
-#define SVR_LS2081A0x870919
-#define SVR_LS2041A0x870915
+#define SVR_LS2081A0x870918
+#define SVR_LS2041A0x870914
#define SVR_DEV_LS2080A0x8701
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 308b073..782e3ab 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -118,8 +118,8 @@
#define SVR_LS2084A0x870910
#define SVR_LS2048A0x870920
#define SVR_LS2044A0x870930
-#define SVR_LS2081A0x870919
-#define SVR_LS2041A0x870915
+#define SVR_LS2081A0x870918
+#define SVR_LS2041A0x870914
/* LS1021a PCIE space */
#define LS1021_PCIE_SPACE_OFFSET 0x40ULL
--
1.9.1
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[U-Boot] [PATCH 1/1] board/ls2080ardb: Disable SD-related GPIO programming
LS2080ARDB/LS2088ARDB updated RevF boards do not have
smart voltage translator, so no need to program GPIO
for LS2088ARDB boards
The GPIO programming is required only for LS2081ARDB.
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
board/freescale/ls2080ardb/ls2080ardb.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index df2d768..210142c 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -257,31 +257,17 @@ int board_early_init_f(void)
int misc_init_r(void)
{
-#ifdef CONFIG_FSL_QIXIS
- /*
-* LS2081ARDB has smart voltage translator which needs
-* to be programmed as below
-*/
-#ifndef CONFIG_TARGET_LS2081ARDB
- u8 sw;
-
- sw = QIXIS_READ(arch);
/*
-* LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
+* LS2081ARDB RevF board has smart voltage translator
* which needs to be programmed to enable high speed SD interface
* by setting GPIO4_10 output to zero
*/
- if ((sw & 0xf) == 0x5) {
-#endif
+#ifdef CONFIG_TARGET_LS2081ARDB
out_le32(GPIO4_GPDIR_ADDR, (1 << 21 |
in_le32(GPIO4_GPDIR_ADDR)));
out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) &
in_le32(GPIO4_GPDAT_ADDR)));
-#ifndef CONFIG_TARGET_LS2081ARDB
- }
-#endif
#endif
-
if (hwconfig("sdhc"))
config_board_mux(MUX_TYPE_SDHC);
--
1.9.1
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[U-Boot] [PATCH 1/1] board/ls2081ardb: Update qspi flash type and checkboard
Patch makes below changes:
-As per updated board design, different QSPI flash is connected on boards,
hence change QSPI flash type from n25q512a to s25fs512ss
-Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE
-Increase env size from 64kb to 256kb for qspi boot
-Update checkboard() to detect boot source and display message
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.g...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
arch/arm/dts/fsl-ls2081a-rdb.dts| 4 ++--
board/freescale/ls2080ardb/ls2080ardb.c | 15 +++
include/configs/ls2080a_common.h| 2 +-
include/configs/ls2080ardb.h| 7 +--
4 files changed, 7 insertions(+), 21 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2081a-rdb.dts b/arch/arm/dts/fsl-ls2081a-rdb.dts
index 6489362..aa4aa68 100644
--- a/arch/arm/dts/fsl-ls2081a-rdb.dts
+++ b/arch/arm/dts/fsl-ls2081a-rdb.dts
@@ -41,7 +41,7 @@
bus-num = <0>;
status = "okay";
- qflash0: n25q512a@0 {
+ qflash0: s25fs512s@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
@@ -49,7 +49,7 @@
reg = <0>;
};
- qflash1: n25q512a@1 {
+ qflash1: s25fs512s@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb/ls2080ardb.c
index 210142c..9d21d1e 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -71,36 +71,27 @@ int checkboard(void)
#ifdef CONFIG_TARGET_LS2081ARDB
#ifdef CONFIG_FSL_QIXIS
sw = QIXIS_READ(arch);
- printf("Board Arch: V%d, ", sw >> 4);
printf("Board version: %c, ", (sw & 0xf) + 'A');
sw = QIXIS_READ(brdcfg[0]);
- sw = (sw & QIXIS_QMAP_MASK) >> QIXIS_QMAP_SHIFT;
+ sw = sw >> QIXIS_QMAP_SHIFT;
switch (sw) {
case 0:
+ case 4:
puts("boot from QSPI DEV#0\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
break;
case 1:
puts("boot from QSPI DEV#1\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
break;
case 2:
- puts("boot from QSPI EMU\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#0\n");
- break;
case 3:
puts("boot from QSPI EMU\n");
- puts("QSPI_CSA_1 mapped to QSPI DEV#1\n");
- break;
- case 4:
- puts("boot from QSPI DEV#0\n");
- puts("QSPI_CSA_1 mapped to QSPI EMU\n");
break;
default:
printf("invalid setting of SW%u\n", sw);
break;
}
+ printf("FPGA: v%d.%d\n", QIXIS_READ(scver), QIXIS_READ(tagdata));
#endif
puts("SERDES1 Reference : ");
printf("Clock1 = 100MHz ");
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index e311d0b..68191f2 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -34,7 +34,7 @@
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x30/* 3MB */
-#define CONFIG_ENV_SECT_SIZE 0x1
+#define CONFIG_ENV_SECT_SIZE 0x4
#endif
#define CONFIG_SUPPORT_RAW_INITRD
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 2dab065..a5f7eea 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -18,7 +18,6 @@
#define CONFIG_QIXIS_I2C_ACCESS
#endif
#define CONFIG_SYS_I2C_EARLY_INIT
-#define CONFIG_DISPLAY_BOARDINFO_LATE
#endif
#define I2C_MUX_CH_VOL_MONITOR 0xa
@@ -293,19 +292,15 @@ unsigned long get_board_sys_clk(void);
/* SPI */
#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
#define CONFIG_SPI_FLASH
-#ifdef CONFIG_FSL_QSPI
+#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO
#endif
#ifdef CONFIG_FSL_QSPI
-#ifdef CONFIG_TARGET_LS2081ARDB
-#define CONFIG_SPI_FLASH_STMICRO
-#else
#define CONFIG_SPI_FLASH_SPANSION
#endif
#define FSL_QSPI_FLASH_SIZESZ_64M /* 64MB */
#define FSL_QSPI_FLASH_NUM 2
#endif
-#endif
/*
* RTC configuration
--
1.9.1
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[U-Boot] [PATCH 1/1] board/ls2080aqds, SD-boot: Update env offset
As per new memory layout, Update env offset from 0x20 to 0x30 Signed-off-by: Santan Kumar <santan.ku...@nxp.com> --- include/configs/ls2080aqds.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 8a8ee9d..c32c184 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -238,7 +238,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_U_BOOT_OFFS(256 * 1024) #define CONFIG_SYS_NAND_U_BOOT_SIZE(640 * 1024) #elif defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET 0x20 +#define CONFIG_ENV_OFFSET 0x30 #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE0x2 -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Friday, May 12, 2017 9:31 PM
> To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de
> Cc: Priyanka Jain <priyanka.j...@nxp.com>; Abhimanyu Saini
> <abhimanyu.sa...@nxp.com>
> Subject: Re: [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot
>
> On 05/05/2017 03:10 AM, Santan Kumar wrote:
> > Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
> > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
> > Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
> > ---
> > Changes in v5:
> > 1. Update MAINTAINERS file
> > 2. Updated the memory layout
> >
> > arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 6 +--
> > .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 6 +--
> > board/freescale/ls2080a/ls2080a.c | 6 +--
> > board/freescale/ls2080aqds/MAINTAINERS | 1 +
> > board/freescale/ls2080aqds/README | 13 +
> > board/freescale/ls2080aqds/eth.c | 8 +---
> > board/freescale/ls2080aqds/ls2080aqds.c| 4 +-
> > configs/ls2080aqds_sdcard_defconfig| 55
> ++
> > include/configs/ls2080a_common.h | 9 +++-
> > include/configs/ls2080aqds.h | 27 ++-
> > 10 files changed, 116 insertions(+), 19 deletions(-) create mode
> > 100644 configs/ls2080aqds_sdcard_defconfig
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > index bb02960..e5da7a2 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > @@ -462,7 +462,7 @@ int cpu_eth_init(bd_t *bis) {
> > int error = 0;
> >
> > -#ifdef CONFIG_FSL_MC_ENET
> > +#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
>
> You have many changes like this in this patch. Why don't you change the
> Kconfig
>
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -96,7 +96,7 @@ config FSL_LSCH3
> config FSL_MC_ENET
> bool "Management Complex network"
> depends on ARCH_LS2080A
> - default y
> + default y if !SPL_BUILD
> select RESV_RAM
> help
>Enable Management Complex (MC) network
>
> Please try it.
>
> York
[Santan Kumar] I have already tried it. SPL_BUILD flag was not enabled when we
this code is executing. That's why I haven't added it in Kconfig.
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[U-Boot] [PATCH 2/2][v5] armv8: ls2080aqds: Add support for SD boot
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes in v5:
1. Update MAINTAINERS file
2. Updated the memory layout
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 6 +--
.../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 6 +--
board/freescale/ls2080a/ls2080a.c | 6 +--
board/freescale/ls2080aqds/MAINTAINERS | 1 +
board/freescale/ls2080aqds/README | 13 +
board/freescale/ls2080aqds/eth.c | 8 +---
board/freescale/ls2080aqds/ls2080aqds.c| 4 +-
configs/ls2080aqds_sdcard_defconfig| 55 ++
include/configs/ls2080a_common.h | 9 +++-
include/configs/ls2080aqds.h | 27 ++-
10 files changed, 116 insertions(+), 19 deletions(-)
create mode 100644 configs/ls2080aqds_sdcard_defconfig
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index bb02960..e5da7a2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -462,7 +462,7 @@ int cpu_eth_init(bd_t *bis)
{
int error = 0;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = fsl_mc_ldpaa_init(bis);
#endif
#ifdef CONFIG_FMAN_ENET
@@ -606,7 +606,7 @@ phys_size_t board_reserve_ram_top(phys_size_t ram_size)
{
phys_size_t ram_top = ram_size;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* The start address of MC reserved memory needs to be aligned. */
ram_top -= mc_get_dram_block_size();
ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1);
@@ -721,7 +721,7 @@ int dram_init_banksize(void)
}
#endif /* CONFIG_SYS_MEM_RESERVE_SECURE */
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* Assign memory for MC */
#ifdef CONFIG_SYS_DDR_BLOCK3_BASE
if (gd->bd->bi_dram[2].size >=
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 955e0b7..ef97556 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -18,7 +18,7 @@ static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int xfi_dpmac[XFI8 + 1];
int sgmii_dpmac[SGMII16 + 1];
#endif
@@ -110,7 +110,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32
sd_prctl_mask,
debug("Unknown SerDes lane protocol %d\n", lane_prtcl);
else {
serdes_prtcl_map[lane_prtcl] = 1;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
switch (lane_prtcl) {
case QSGMII_A:
case QSGMII_B:
@@ -141,7 +141,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32
sd_prctl_mask,
void fsl_serdes_init(void)
{
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int i , j;
for (i = XFI1, j = 1; i <= XFI8; i++, j++)
diff --git a/board/freescale/ls2080a/ls2080a.c
b/board/freescale/ls2080a/ls2080a.c
index 9e7701d..b357eaa 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -64,13 +64,13 @@ int board_eth_init(bd_t *bis)
error = smc9_initialize(0, CONFIG_SMC9_BASE);
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = cpu_eth_init(bis);
#endif
return error;
}
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
void fdt_fixup_board_enet(void *fdt)
{
int offset;
@@ -128,7 +128,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
fdt_fixup_board_enet(blob);
#endif
diff --git a/board/freescale/ls2080aqds/MAINTAINERS
b/board/freescale/ls2080aqds/MAINTAINERS
index 79877d7..62c8fac 100644
--- a/board/freescale/ls2080aqds/MAINTAINERS
+++ b/board/freescale/ls2080aqds/MAINTAINERS
@@ -7,6 +7,7 @@ F: include/configs/ls2080aqds.h
F: configs/ls2080aqds_defconfig
F: configs/ls2080aqds_nand_defconfig
F: configs/ls2080aqds_qspi_defconfig
+F: configs/ls2080aqds_sdcard_defconfig
LS2080A_SECURE_BOOT BOARD
M: Saksham Jain <saksham.j...@nxp.freescale.com>
diff --git a/board/freescale/ls2080aqds/REA
[U-Boot] [PATCH 1/2][v5] armv8: ls2080a: Reorganise NAND_BOOT code in config flag
Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes in v5:
Rebase in latest code base
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
configs/ls2080aqds_nand_defconfig | 1 +
include/configs/ls2080a_common.h| 2 ++
include/configs/ls2080aqds.h| 4 +++-
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 9e3cdd7..76e3af0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -134,7 +134,7 @@ void erratum_a009635(void)
static void erratum_rcw_src(void)
{
-#if defined(CONFIG_SPL)
+#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
u32 val;
diff --git a/configs/ls2080aqds_nand_defconfig
b/configs/ls2080aqds_nand_defconfig
index aa4f134..2797e43 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -10,6 +10,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 427f623..12078c3 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -222,8 +222,10 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x1800a000
+#ifdef CONFIG_NAND_BOOT
#define CONFIG_SYS_NAND_U_BOOT_DST 0x8040
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+#endif
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0010
#define CONFIG_SYS_SPL_MALLOC_START0x8020
#define CONFIG_SYS_MONITOR_LEN (640 * 1024)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index beacb99..4c48562 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -197,7 +197,8 @@ unsigned long get_board_ddr_clk(void);
FTIM2_GPCM_TWP(0x3E))
#define CONFIG_SYS_CS3_FTIM3 0x0
-#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
+#if defined(CONFIG_SPL)
+#if defined(CONFIG_NAND_BOOT)
#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY
#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR
@@ -233,6 +234,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SPL_PAD_TO 0x2
#define CONFIG_SYS_NAND_U_BOOT_OFFS(256 * 1024)
#define CONFIG_SYS_NAND_U_BOOT_SIZE(640 * 1024)
+#endif
#else
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
--
1.9.1
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Re: [U-Boot] [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot
-Original Message- From: Sumit Garg Sent: Monday, May 01, 2017 11:23 AM To: Priyanka Jain <priyanka.j...@nxp.com>; u-boot@lists.denx.de Cc: york sun <york@nxp.com>; Santan Kumar <santan.ku...@nxp.com> Subject: RE: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot > -Original Message- > From: Priyanka Jain > Sent: Monday, May 01, 2017 11:00 AM > To: york sun <york@nxp.com>; Santan Kumar <santan.ku...@nxp.com>; > u-boot@lists.denx.de > Cc: Sumit Garg <sumit.g...@nxp.com> > Subject: RE: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory > map for NOR-boot > > > > > -Original Message- > > From: York Sun [mailto:york@nxp.com] > > Sent: Friday, April 28, 2017 9:25 PM > > To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de > > Cc: Priyanka Jain <priyanka.j...@nxp.com> > > Subject: Re: [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust > > memory map for NOR-boot > > > > On 04/28/2017 12:14 AM, Santan Kumar wrote: > > > This patch adjusts memory map for images on LS2080ARDB, LS2080AQDS > > > as per below memory map for NOR flash: > > > Image Flash Offset > > > RCW+PBI 0x > > > Boot firmware (U-Boot)0x0010 > > > Boot firmware Environment 0x0030 > > > PPA firmware 0x0040 > > > PHY firmware 0x0098 > > > DPAA2 MC 0x00A0 > > > DPAA2 DPL 0x00D0 > > > DPAA2 DPC 0x00E0 > > > Kernel.itb0x0100 > > > > How about secure boot header files? > > > > York > Secure header is expected at 0x60 offset. > Secure boot team will send additional patch on top of this for secure > header related change. > Priyanka Can you please add Secure boot headers at 0x60 offset as part of this patch only? As space at 0x60 offset is reserved for Secure boot headers as per new memory map. Sumit Secure header has been added by secure boot team with a follow up patch. https://patchwork.ozlabs.org/patch/757572/ Santan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH][v2] board: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot
This patch adjusts memory map for images on LS2080ARDB, LS2080AQDS as per below memory map for NOR flash: Image Flash Offset RCW+PBI 0x Boot firmware (U-Boot) 0x0010 Boot firmware Environment 0x0030 PPA firmware0x0040 PHY firmware0x0098 DPAA2 MC0x00A0 DPAA2 DPL 0x00D0 DPAA2 DPC 0x00E0 Kernel.itb 0x0100 Signed-off-by: Santan Kumar <santan.ku...@nxp.com> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> --- Changes for v2: 1. Rebase on the top of Priyanka's QSPI patch https://patchwork.ozlabs.org/patch/756222/ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 +- board/freescale/ls2080aqds/README | 12 board/freescale/ls2080ardb/README | 13 + include/configs/ls2080a_common.h | 8 include/configs/ls2080aqds.h | 8 include/configs/ls2080ardb.h | 12 ++-- 6 files changed, 40 insertions(+), 15 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index d0770c0..4d82257 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -162,7 +162,7 @@ config SYS_LS_PPA_FW_ADDR depends on FSL_LS_PPA default 0x2040 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A default 0x4050 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x580a0 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A + default 0x58040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A default 0x6050 if SYS_LS_PPA_FW_IN_XIP default 0x50 if SYS_LS_PPA_FW_IN_MMC default 0x50 if SYS_LS_PPA_FW_IN_NAND diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index 2808bd5..fd0e25a 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -89,6 +89,18 @@ c) NAND boot d) SD boot e) QSPI boot +Memory map for NOR boot +- +Image Flash Offset +RCW+PBI0x +Boot firmware (U-Boot) 0x0010 +Boot firmware Environment 0x0030 +PPA firmware 0x0040 +DPAA2 MC 0x00A0 +DPAA2 DPL 0x00D0 +DPAA2 DPC 0x00E0 +Kernel.itb 0x0100 + Environment Variables - - mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index 873aadf..0003b45 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -71,6 +71,19 @@ a) NOR boot b) NAND boot c) QSPI boot +Memory map for NOR boot +- +Image Flash Offset +RCW+PBI0x +Boot firmware (U-Boot) 0x0010 +Boot firmware Environment 0x0030 +PPA firmware 0x0040 +Cortina PHY firmware 0x0098 +DPAA2 MC 0x00A0 +DPAA2 DPL 0x00D0 +DPAA2 DPC 0x00E0 +Kernel.itb 0x0100 + cfg_rcw_src switches needs to be changed for booting from different option. Refer to board documentation for correct switch setting. diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index cc61af8..dd56114 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -193,18 +193,18 @@ unsigned long long get_qixis_addr(void); "ramdisk_size=0x200\0" \ "fdt_high=0xa000\0" \ "initrd_high=0x\0" \ - "kernel_start=0x58120\0"\ + "kernel_start=0x58100\0"\ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ "console=ttyAMA0,38400n8\0" \ - "mcinitcmd=fsl_mc start mc 0x58030" \ - " 0x58080 \0" + "mcinitcmd=fsl_mc start mc 0x580a0" \ + " 0x580e0 \0" #define CONFIG_BOOTARGS"console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500 " \ "ramdisk_size=0x200 default_hugepagesz=2m" \ " hugepagesz=2m hugepages=256" -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x5807
[U-Boot] [PATCH] board: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot
This patch adjusts memory map for images on LS2080ARDB, LS2080AQDS as per below memry map: Image Flash Offset RCW+PBI 0x Boot firmware (U-Boot) 0x0010 Boot firmware Environment 0x0030 PPA firmware0x0040 PHY firmware0x0098 DPAA2 MC0x00A0 DPAA2 DPL 0x00D0 DPAA2 DPC 0x00E0 Kernel.itb 0x0100 Signed-off-by: Santan Kumar <santan.ku...@nxp.com> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 +- board/freescale/ls2080aqds/README | 13 + board/freescale/ls2080ardb/README | 14 ++ include/configs/ls2080a_common.h | 8 include/configs/ls2080aqds.h | 8 include/configs/ls2080ardb.h | 12 ++-- 6 files changed, 42 insertions(+), 15 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index b24462b..22cb6e0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -161,7 +161,7 @@ config SYS_LS_PPA_FW_ADDR hex "Address of PPA firmware loading from" depends on FSL_LS_PPA default 0x4050 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x580a0 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A + default 0x58040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A default 0x6050 if SYS_LS_PPA_FW_IN_XIP default 0x50 if SYS_LS_PPA_FW_IN_MMC default 0x50 if SYS_LS_PPA_FW_IN_NAND diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index 2808bd5..fe6b2ac 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -88,6 +88,19 @@ b) NOR boot c) NAND boot d) SD boot e) QSPI boot +f) Memory map for NOR boot + +Memory map for NOR boot +- +Image Flash Offset +RCW+PBI0x +Boot firmware (U-Boot) 0x0010 +Boot firmware Environment 0x0030 +PPA firmware 0x0040 +DPAA2 MC 0x00A0 +DPAA2 DPL 0x00D0 +DPAA2 DPC 0x00E0 +Kernel.itb 0x0100 Environment Variables - diff --git a/board/freescale/ls2080ardb/README b/board/freescale/ls2080ardb/README index 0c9c574..f280595 100644 --- a/board/freescale/ls2080ardb/README +++ b/board/freescale/ls2080ardb/README @@ -68,6 +68,20 @@ Booting Options --- a) NOR boot b) NAND boot +c) Memory map for NOR boot + +Memory map for NOR boot +- +Image Flash Offset +RCW+PBI0x +Boot firmware (U-Boot) 0x0010 +Boot firmware Environment 0x0030 +PPA firmware 0x0040 +Cortina PHY firmware 0x0098 +DPAA2 MC 0x00A0 +DPAA2 DPL 0x00D0 +DPAA2 DPC 0x00E0 +Kernel.itb 0x0100 Booting Linux flavors which do not support 48-bit VA (< Linux 3.18) --- diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 12078c3..dba9899 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -186,18 +186,18 @@ unsigned long long get_qixis_addr(void); "ramdisk_size=0x200\0" \ "fdt_high=0xa000\0" \ "initrd_high=0x\0" \ - "kernel_start=0x58120\0"\ + "kernel_start=0x58100\0"\ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ "console=ttyAMA0,38400n8\0" \ - "mcinitcmd=fsl_mc start mc 0x58030" \ - " 0x58080 \0" + "mcinitcmd=fsl_mc start mc 0x580a0" \ + " 0x580e0 \0" #define CONFIG_BOOTARGS"console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500 " \ "ramdisk_size=0x200 default_hugepagesz=2m" \ " hugepagesz=2m hugepages=256" -#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x58070 &&" \ +#define CONFIG_BOOTCOMMAND "fsl_mc apply dpl 0x580d0 &&" \ " cp.b $ke
[U-Boot] [PATCH][v2] board: ls2080ardb: Add phy number for serdes1 protocol 0x4b
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
Changes for v2:
Changed the subject
board/freescale/ls2080ardb/eth_ls2080rdb.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c
b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 799799c..ba584c8 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -62,6 +62,13 @@ int board_eth_init(bd_t *bis)
wriop_set_phy_address(WRIOP1_DPMAC8, AQ_PHY_ADDR4);
break;
+ case 0x4B:
+ wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2);
+ wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3);
+ wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4);
+
+ break;
default:
printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n",
srds_s1);
--
1.9.1
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Re: [U-Boot] [PATCH 2/2][v4] armv8: ls2080aqds: Add support for SD boot
> -Original Message- > From: York Sun [mailto:york@nxp.com] > Sent: Wednesday, April 12, 2017 9:13 PM > To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de > Cc: Priyanka Jain <priyanka.j...@nxp.com>; Abhimanyu Saini > <abhimanyu.sa...@nxp.com> > Subject: Re: [PATCH 2/2][v4] armv8: ls2080aqds: Add support for SD boot > > On 04/03/2017 03:58 AM, Santan Kumar wrote: > > Signed-off-by: Santan Kumar <santan.ku...@nxp.com> > > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> > > Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com> > > --- > > Changes for v4: > > Rebased to latest codebase > > Incorporated York's comments to move CONFIG_SPL_MMC_SUPPORT to > > kconfig > > > > Depends on > > York MMU patches: > > > > > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatc > > > hwork.ozlabs.org%2Fbundle%2Fyorksun%2FRewrite_MMU%2F=01%7 > C01%7Cyo > > > rk.sun%40nxp.com%7Cb6b2df7806744cde8d4508d47a8065e0%7C686ea1d3bc > 2b4c6f > > > a92cd99c5c301635%7C0=AvZVek9YBqogA8SDUuILS1EFkubGSxa7Uqh > QY9cYi7s > > %3D=0 > > For correct type of image creation: > > > > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat > > > chwork.ozlabs.org%2Fpatch%2F671466%2F=01%7C01%7Cyork.sun%40 > nxp.co > > > m%7Cb6b2df7806744cde8d4508d47a8065e0%7C686ea1d3bc2b4c6fa92cd99c5 > c30163 > > > 5%7C0=i7xPTeYu4AGy%2BzGCeGvptGmTTR8H8roYkWk46%2FiibRM% > 3D > > d=0 > > > > arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 6 +-- > > .../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 6 +-- > > board/freescale/ls2080a/ls2080a.c | 6 +-- > > board/freescale/ls2080aqds/eth.c | 8 +--- > > board/freescale/ls2080aqds/ls2080aqds.c| 4 +- > > configs/ls2080aqds_sdcard_defconfig| 54 > ++ > > include/configs/ls2080aqds.h | 9 +++- > > 7 files changed, 75 insertions(+), 18 deletions(-) create mode > > 100644 configs/ls2080aqds_sdcard_defconfig > > > > Please update MAINTAINERS file and add commit message. Please squash > your patch which enables PPA for this boot config > http://patchwork.ozlabs.org/patch/741504/ > > York [Santan Kumar] Ok, I will update the MAINTAINERS file and PPA patch. In commit message: This patch adds SD boot support for LS2080aqds board. The SD boot image need to be programmed into the sdcard first. Then the booting will start from sd card. Is it ok or do you want me to add any specific information? ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2][v4] armv8: ls2080a: Reorganise NAND_BOOT code in config flag
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Monday, April 10, 2017 10:15 PM
> To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de
> Cc: Priyanka Jain <priyanka.j...@nxp.com>; Abhimanyu Saini
> <abhimanyu.sa...@nxp.com>
> Subject: Re: [PATCH 1/2][v4] armv8: ls2080a: Reorganise NAND_BOOT code
> in config flag
>
> On 04/03/2017 03:58 AM, Santan Kumar wrote:
> > Add CONFIG_NAND_BOOT config flag to organise NAND_BOOT specific
> code
> > in config flag like -nand-boot specfic errata errata_rcw_src()
> > -CONFIG_SYS_NAND_U_BOOT_DST,etc
> >
> > Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
> > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
> > Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
> > ---
> > Changes for v4:
> > Rebased to latest codebase
> > Incorporated York's comments to remove CONFIG_SPL and move
> > CONFIG_SPL_NAND_SUPPORT to kconfig
> >
> > arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
> > configs/ls2080aqds_nand_defconfig | 1 +
> > configs/ls2080ardb_nand_defconfig | 1 +
> > include/configs/ls2080a_common.h| 2 ++
> > include/configs/ls2080aqds.h| 4 +++-
> > 5 files changed, 8 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > index 9e3cdd7..76e3af0 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > @@ -134,7 +134,7 @@ void erratum_a009635(void)
> >
> > static void erratum_rcw_src(void)
> > {
> > -#if defined(CONFIG_SPL)
> > +#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
> > u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
> > u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
> > u32 val;
> > diff --git a/configs/ls2080aqds_nand_defconfig
> > b/configs/ls2080aqds_nand_defconfig
> > index 2a649c5..7fe4262 100644
> > --- a/configs/ls2080aqds_nand_defconfig
> > +++ b/configs/ls2080aqds_nand_defconfig
> > @@ -10,6 +10,7 @@ CONFIG_FIT=y
> > CONFIG_FIT_VERBOSE=y
> > CONFIG_OF_BOARD_SETUP=y
> > CONFIG_OF_STDOUT_VIA_ALIAS=y
> > +CONFIG_NAND_BOOT=y
> > CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
>
> Can we get rid of the extra options for NAND? I think it can be replaced by
> CONFIG_NAND_BOOT, can't it?
[Santan Kumar] CONFIG_NAND_BOOT has been added for the requirements of NAND
boot specification
While NAND is being used for NAND support specification both are using for
difference purpose.
>
> I have sent a patch to get rid of the LS2080A do you don't have to worry
> about that. http://patchwork.ozlabs.org/patch/746782/
[Santan Kumar] yes, After this patch I don't need LS2080A in extra option.
Do I need to send next version to remove this or you will take care in your
patch?
>
> > CONFIG_BOOTDELAY=10
> > CONFIG_SPL=y
> > diff --git a/configs/ls2080ardb_nand_defconfig
> > b/configs/ls2080ardb_nand_defconfig
> > index 81987fe..7c45541 100644
> > --- a/configs/ls2080ardb_nand_defconfig
> > +++ b/configs/ls2080ardb_nand_defconfig
> > @@ -10,6 +10,7 @@ CONFIG_FIT=y
> > CONFIG_FIT_VERBOSE=y
> > CONFIG_OF_BOARD_SETUP=y
> > CONFIG_OF_STDOUT_VIA_ALIAS=y
> > +CONFIG_NAND_BOOT=y
> > CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
> > CONFIG_BOOTDELAY=10
> > CONFIG_SPL=y
> > diff --git a/include/configs/ls2080a_common.h
> > b/include/configs/ls2080a_common.h
> > index 427f623..12078c3 100644
> > --- a/include/configs/ls2080a_common.h
> > +++ b/include/configs/ls2080a_common.h
> > @@ -222,8 +222,10 @@ unsigned long long get_qixis_addr(void);
> > #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
> > #define CONFIG_SPL_TEXT_BASE 0x1800a000
> >
> > +#ifdef CONFIG_NAND_BOOT
> > #define CONFIG_SYS_NAND_U_BOOT_DST 0x8040
> > #define CONFIG_SYS_NAND_U_BOOT_START
> CONFIG_SYS_NAND_U_BOOT_DST
> > +#endif
> > #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0010
> > #define CONFIG_SYS_SPL_MALLOC_START0x8020
> > #define CONFIG_SYS_MONITOR_LEN (640 * 1024)
> > diff --git a/include/configs/ls2080aqds.h
> > b/include/configs/ls2080aqds.h index beacb99..4c48562 100644
> > --- a/include/configs/ls2080aqds.h
> > +++ b/include/configs/ls2080aqds.h
> > @@ -197,7 +197,8 @@ unsigned long get_board_ddr_clk(void);
> > FTIM2_GPCM_TWP(0x3E))
> > #define CONFIG_SYS_CS3_FTIM3 0x0
> >
> > -#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
> > +#if defined(CONFIG_SPL)
> > +#if defined(CONFIG_NAND_BOOT)
>
> This is exactly what I was thinking. So we don't need the CONFIG_NAND
> macro. After this patch, can you sent another clean up patch to remove other
> CONFIG_NAND macros? You don't have to respin this patch.
>
> York
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[U-Boot] [PATCH] board: ls2080ardb: Add serdes1 protocol 0x4b support
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
board/freescale/ls2080ardb/eth_ls2080rdb.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c
b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 799799c..ba584c8 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -62,6 +62,13 @@ int board_eth_init(bd_t *bis)
wriop_set_phy_address(WRIOP1_DPMAC8, AQ_PHY_ADDR4);
break;
+ case 0x4B:
+ wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1);
+ wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2);
+ wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3);
+ wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4);
+
+ break;
default:
printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n",
srds_s1);
--
1.9.1
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Re: [U-Boot] [PATCH] armv8: ls2081a: Add serdes2 protocol 0x51 support
it is superseded. I have sent another patch with subject changed.
> -Original Message-
> From: Santan Kumar [mailto:santan.ku...@nxp.com]
> Sent: Wednesday, April 5, 2017 10:25 AM
> To: u-boot@lists.denx.de; york sun <york@nxp.com>
> Cc: Santan Kumar <santan.ku...@nxp.com>; Priyanka Jain
> <priyanka.j...@nxp.com>
> Subject: [PATCH] armv8: ls2081a: Add serdes2 protocol 0x51 support
>
> Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
> ---
> arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> index ab83e85..4db3c76 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
> SATA2 } },
> {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
> SATA2 } },
> + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
> {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } },
> {}
> };
> --
> 1.9.1
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Re: [U-Boot] [PATCH] armv8: ls2080a: Add serdes2 protocol 0x51 support
> -Original Message-
> From: york sun
> Sent: Wednesday, April 5, 2017 9:13 PM
> To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de
> Cc: Priyanka Jain <priyanka.j...@nxp.com>
> Subject: Re: [PATCH] armv8: ls2080a: Add serdes2 protocol 0x51 support
>
> On 04/05/2017 02:01 AM, Santan Kumar wrote:
> > Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
> > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
> > ---
> > arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> > index ab83e85..4db3c76 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
> > @@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
> > SATA2 } },
> > {0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
> > SATA2 } },
> > + {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
> > {0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } },
> > {}
> > };
> >
>
> Santan,
>
> Does this patch replace another one with subject "armv8: ls2081a: Add
> serdes2 protocol 0x51 support"? It changes the same file the same way.
> For future update, you are required to put version number and change log to
> it.
>
> York
[Santan Kumar] yes, this patch replaces the earlier one. What should I do now?
Should I send another patch with version number 3?
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[U-Boot] [PATCH] armv8: ls2080a: Add serdes2 protocol 0x51 support
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
index ab83e85..4db3c76 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
@@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
SATA2 } },
{0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
SATA2 } },
+ {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
{0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } },
{}
};
--
1.9.1
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[U-Boot] [PATCH] armv8: ls2081a: Add serdes2 protocol 0x51 support
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
index ab83e85..4db3c76 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
@@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
SATA2 } },
{0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
SATA2 } },
+ {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
{0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } },
{}
};
--
1.9.1
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[U-Boot] [PATCH 2/2][v4] armv8: ls2080aqds: Add support for SD boot
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes for v4:
Rebased to latest codebase
Incorporated York's comments to move CONFIG_SPL_MMC_SUPPORT
to kconfig
Depends on
York MMU patches:
http://patchwork.ozlabs.org/bundle/yorksun/Rewrite_MMU/
For correct type of image creation:
https://patchwork.ozlabs.org/patch/671466/
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 6 +--
.../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 6 +--
board/freescale/ls2080a/ls2080a.c | 6 +--
board/freescale/ls2080aqds/eth.c | 8 +---
board/freescale/ls2080aqds/ls2080aqds.c| 4 +-
configs/ls2080aqds_sdcard_defconfig| 54 ++
include/configs/ls2080aqds.h | 9 +++-
7 files changed, 75 insertions(+), 18 deletions(-)
create mode 100644 configs/ls2080aqds_sdcard_defconfig
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index cebbb0f..58d63df 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -465,7 +465,7 @@ int cpu_eth_init(bd_t *bis)
{
int error = 0;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = fsl_mc_ldpaa_init(bis);
#endif
#ifdef CONFIG_FMAN_ENET
@@ -608,7 +608,7 @@ phys_size_t board_reserve_ram_top(phys_size_t ram_size)
{
phys_size_t ram_top = ram_size;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* The start address of MC reserved memory needs to be aligned. */
ram_top -= mc_get_dram_block_size();
ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1);
@@ -723,7 +723,7 @@ void dram_init_banksize(void)
}
#endif /* CONFIG_SYS_MEM_RESERVE_SECURE */
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* Assign memory for MC */
#ifdef CONFIG_SYS_DDR_BLOCK3_BASE
if (gd->bd->bi_dram[2].size >=
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 955e0b7..ef97556 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -18,7 +18,7 @@ static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int xfi_dpmac[XFI8 + 1];
int sgmii_dpmac[SGMII16 + 1];
#endif
@@ -110,7 +110,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32
sd_prctl_mask,
debug("Unknown SerDes lane protocol %d\n", lane_prtcl);
else {
serdes_prtcl_map[lane_prtcl] = 1;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
switch (lane_prtcl) {
case QSGMII_A:
case QSGMII_B:
@@ -141,7 +141,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32
sd_prctl_mask,
void fsl_serdes_init(void)
{
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int i , j;
for (i = XFI1, j = 1; i <= XFI8; i++, j++)
diff --git a/board/freescale/ls2080a/ls2080a.c
b/board/freescale/ls2080a/ls2080a.c
index 9e7701d..b357eaa 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -64,13 +64,13 @@ int board_eth_init(bd_t *bis)
error = smc9_initialize(0, CONFIG_SMC9_BASE);
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = cpu_eth_init(bis);
#endif
return error;
}
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
void fdt_fixup_board_enet(void *fdt)
{
int offset;
@@ -128,7 +128,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
fdt_fixup_board_enet(blob);
#endif
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 59361e9..302ff76 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -22,7 +22,7 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
* Bank 1 -> Lanes A, B, C, D, E, F, G, H
* Bank 2 -> Lanes A,B, C, D, E, F
[U-Boot] [PATCH 1/2][v4] armv8: ls2080a: Reorganise NAND_BOOT code in config flag
Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes for v4:
Rebased to latest codebase
Incorporated York's comments to remove CONFIG_SPL
and move CONFIG_SPL_NAND_SUPPORT to kconfig
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
configs/ls2080aqds_nand_defconfig | 1 +
configs/ls2080ardb_nand_defconfig | 1 +
include/configs/ls2080a_common.h| 2 ++
include/configs/ls2080aqds.h| 4 +++-
5 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 9e3cdd7..76e3af0 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -134,7 +134,7 @@ void erratum_a009635(void)
static void erratum_rcw_src(void)
{
-#if defined(CONFIG_SPL)
+#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
u32 val;
diff --git a/configs/ls2080aqds_nand_defconfig
b/configs/ls2080aqds_nand_defconfig
index 2a649c5..7fe4262 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -10,6 +10,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/configs/ls2080ardb_nand_defconfig
b/configs/ls2080ardb_nand_defconfig
index 81987fe..7c45541 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -10,6 +10,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 427f623..12078c3 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -222,8 +222,10 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x1800a000
+#ifdef CONFIG_NAND_BOOT
#define CONFIG_SYS_NAND_U_BOOT_DST 0x8040
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+#endif
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0010
#define CONFIG_SYS_SPL_MALLOC_START0x8020
#define CONFIG_SYS_MONITOR_LEN (640 * 1024)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index beacb99..4c48562 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -197,7 +197,8 @@ unsigned long get_board_ddr_clk(void);
FTIM2_GPCM_TWP(0x3E))
#define CONFIG_SYS_CS3_FTIM3 0x0
-#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
+#if defined(CONFIG_SPL)
+#if defined(CONFIG_NAND_BOOT)
#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY
#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR
@@ -233,6 +234,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SPL_PAD_TO 0x2
#define CONFIG_SYS_NAND_U_BOOT_OFFS(256 * 1024)
#define CONFIG_SYS_NAND_U_BOOT_SIZE(640 * 1024)
+#endif
#else
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
--
1.9.1
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Re: [U-Boot] [PATCH 1/2][v3] armv8: ls2080a: Reorganise NAND_BOOT code in config flag
> -Original Message-
> From: york sun
> Sent: Saturday, March 25, 2017 10:30 PM
> To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de
> Cc: Priyanka Jain <priyanka.j...@nxp.com>; Abhimanyu Saini
> <abhimanyu.sa...@nxp.com>
> Subject: Re: [PATCH 1/2][v3] armv8: ls2080a: Reorganise NAND_BOOT code
> in config flag
>
> On 03/02/2017 03:41 AM, Santan Kumar wrote:
> > Add CONFIG_NAND_BOOT config flag to organise NAND_BOOT specific
> code
> > in config flag like -nand-boot specfic errata errata_rcw_src()
> > -CONFIG_SYS_NAND_U_BOOT_DST,etc
> >
> > Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
> > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
> > Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
> > ---
> > Changes for v3:
> > Rebased to latest codebase
> > Incorporated York's comments to defined CONFIG_NAND_BOOT in new
> line
> >
> > arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
> > configs/ls2080aqds_nand_defconfig | 1 +
> > configs/ls2080ardb_nand_defconfig | 1 +
> > include/configs/ls2080a_common.h| 5 +
> > include/configs/ls2080aqds.h| 4 +++-
> > 5 files changed, 11 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > index 9489f85..fa68baf 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> > @@ -134,7 +134,7 @@ void erratum_a009635(void)
> >
> > static void erratum_rcw_src(void)
> > {
> > -#if defined(CONFIG_SPL)
> > +#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
> > u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
> > u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
> > u32 val;
> > diff --git a/configs/ls2080aqds_nand_defconfig
> > b/configs/ls2080aqds_nand_defconfig
> > index 8910938..bc0b9b1 100644
> > --- a/configs/ls2080aqds_nand_defconfig
> > +++ b/configs/ls2080aqds_nand_defconfig
> > @@ -12,6 +12,7 @@ CONFIG_FIT=y
> > CONFIG_FIT_VERBOSE=y
> > CONFIG_OF_BOARD_SETUP=y
> > CONFIG_OF_STDOUT_VIA_ALIAS=y
> > +CONFIG_NAND_BOOT=y
> > CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
> > CONFIG_BOOTDELAY=10
> > CONFIG_SPL=y
> > diff --git a/configs/ls2080ardb_nand_defconfig
> > b/configs/ls2080ardb_nand_defconfig
> > index 8223111..d449190 100644
> > --- a/configs/ls2080ardb_nand_defconfig
> > +++ b/configs/ls2080ardb_nand_defconfig
> > @@ -12,6 +12,7 @@ CONFIG_FIT=y
> > CONFIG_FIT_VERBOSE=y
> > CONFIG_OF_BOARD_SETUP=y
> > CONFIG_OF_STDOUT_VIA_ALIAS=y
> > +CONFIG_NAND_BOOT=y
> > CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
> > CONFIG_BOOTDELAY=10
> > CONFIG_SPL=y
> > diff --git a/include/configs/ls2080a_common.h
> > b/include/configs/ls2080a_common.h
> > index 4173d9a..ae72939 100644
> > --- a/include/configs/ls2080a_common.h
> > +++ b/include/configs/ls2080a_common.h
> > @@ -216,6 +216,7 @@ unsigned long long get_qixis_addr(void);
> >
> > #define CONFIG_PANIC_HANG /* do not reset board on panic */
> >
> > +#ifdef CONFIG_SPL
>
> Why this?
[Santan Kumar] yes we don't required this I will remove it.
>
> > #define CONFIG_SPL_BSS_START_ADDR 0x8010
> > #define CONFIG_SPL_BSS_MAX_SIZE0x0010
> > #define CONFIG_SPL_FRAMEWORK
> > @@ -225,11 +226,15 @@ unsigned long long get_qixis_addr(void);
> > #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
> > #define CONFIG_SPL_TEXT_BASE 0x1800a000
> >
> > +#ifdef CONFIG_NAND_BOOT
> > +#define CONFIG_SPL_NAND_SUPPORT
>
> This is a Kconfig option. Please select it properly.
[Santan Kumar] I will remove it since it is there in kconfig.
>
> > #define CONFIG_SYS_NAND_U_BOOT_DST 0x8040
> > #define CONFIG_SYS_NAND_U_BOOT_START
> CONFIG_SYS_NAND_U_BOOT_DST
> > +#endif
> > #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0010
> > #define CONFIG_SYS_SPL_MALLOC_START0x8020
> > #define CONFIG_SYS_MONITOR_LEN (640 * 1024)
> > +#endif
> >
> > #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip
> size */
> >
> > diff --git a/include/configs/ls2080aqds.h
> > b/include/configs/ls2080aqds.h index 08d1586..93f6b51 100644
> > --- a/include/configs/ls2080aqds.h
> > +++ b/include/configs/ls2080aqds.h
> > @@ -197,7 +197,8 @@ unsigned long get_board
Re: [U-Boot] [PATCH][v2]board: freescale: ls2080a/ls2088a: Enable PPA
> -Original Message- > From: york sun > Sent: Saturday, March 25, 2017 11:05 PM > To: Santan Kumar <santan.ku...@nxp.com>; u-boot@lists.denx.de > Cc: Abhimanyu Saini <abhimanyu.sa...@nxp.com>; Priyanka Jain > <priyanka.j...@nxp.com> > Subject: Re: [PATCH][v2]board: freescale: ls2080a/ls2088a: Enable PPA > > On 03/06/2017 09:48 PM, Santan Kumar wrote: > > Enable PPA on LS2080A, LS2088A boards: > > -LS2080ARDB, LS2080AQDS > > -LS2088ARDB, LS2088AQDS > > > > Signed-off-by: Santan Kumar <santan.ku...@nxp.com> > > Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com> > > Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> > > --- > > Changes for v2: > > Changed the subject > > Made changes based on latest ppa config > > > > arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + > > board/freescale/ls2080aqds/ls2080aqds.c | 8 > > board/freescale/ls2080ardb/ls2080ardb.c | 7 +++ > > configs/ls2080aqds_defconfig | 1 + > > configs/ls2080ardb_defconfig | 1 + > > 5 files changed, 18 insertions(+) > > > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > index adccdf1..bbbe2de 100644 > > --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > @@ -136,6 +136,7 @@ config SYS_LS_PPA_FW_ADDR > > hex "Address of PPA firmware loading from" > > depends on FSL_LS_PPA > > default 0x4050 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT > > + default 0x580a0 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A > > default 0x6050 if SYS_LS_PPA_FW_IN_XIP > > help > > If the PPA firmware locate at XIP flash, such as NOR or diff --git > > a/board/freescale/ls2080aqds/ls2080aqds.c > > b/board/freescale/ls2080aqds/ls2080aqds.c > > index 73a61fd..894dc74 100644 > > --- a/board/freescale/ls2080aqds/ls2080aqds.c > > +++ b/board/freescale/ls2080aqds/ls2080aqds.c > > @@ -19,6 +19,10 @@ > > #include > > #include > > #include > > +#ifdef CONFIG_FSL_LS_PPA > > +#include > > +#endif > > + > > > > #include "../common/qixis.h" > > #include "ls2080aqds_qixis.h" > > @@ -224,6 +228,10 @@ int board_init(void) > > select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); > > rtc_enable_32khz_output(); > > > > +#ifdef CONFIG_FSL_LS_PPA > > + ppa_init(); > > +#endif > > + > > Does it matter if ppa_init() runs first, or sec_init() runs first? I am > trying to > resolve a conflict. > > York [Santan Kumar] sec_init() needs to run first then ppa_init() will run. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] armv8: ls2080aqds: enable PPA support for SD boot
Signed-off-by: Santan Kumar <santan.ku...@nxp.com> --- Depends on Add support for SD boot https://patchwork.ozlabs.org/patch/734572/ Zhiqiang Hou's patch https://patchwork.ozlabs.org/patch/740194/ configs/ls2080aqds_sdcard_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 874d49e..5667072 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y +CONFIG_FSL_LS_PPA=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH][v2]board: freescale: ls2080a/ls2088a: Enable PPA
Enable PPA on LS2080A, LS2088A boards: -LS2080ARDB, LS2080AQDS -LS2088ARDB, LS2088AQDS Signed-off-by: Santan Kumar <santan.ku...@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> --- Changes for v2: Changed the subject Made changes based on latest ppa config arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + board/freescale/ls2080aqds/ls2080aqds.c | 8 board/freescale/ls2080ardb/ls2080ardb.c | 7 +++ configs/ls2080aqds_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + 5 files changed, 18 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index adccdf1..bbbe2de 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -136,6 +136,7 @@ config SYS_LS_PPA_FW_ADDR hex "Address of PPA firmware loading from" depends on FSL_LS_PPA default 0x4050 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT + default 0x580a0 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A default 0x6050 if SYS_LS_PPA_FW_IN_XIP help If the PPA firmware locate at XIP flash, such as NOR or diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c index 73a61fd..894dc74 100644 --- a/board/freescale/ls2080aqds/ls2080aqds.c +++ b/board/freescale/ls2080aqds/ls2080aqds.c @@ -19,6 +19,10 @@ #include #include #include +#ifdef CONFIG_FSL_LS_PPA +#include +#endif + #include "../common/qixis.h" #include "ls2080aqds_qixis.h" @@ -224,6 +228,10 @@ int board_init(void) select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); rtc_enable_32khz_output(); +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif + return 0; } diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 02954ef..917f214 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -19,6 +19,9 @@ #include #include #include +#ifdef CONFIG_FSL_LS_PPA +#include +#endif #include "../common/qixis.h" #include "ls2080ardb_qixis.h" @@ -180,6 +183,10 @@ int board_init(void) QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN); +#ifdef CONFIG_FSL_LS_PPA + ppa_init(); +#endif + #ifdef CONFIG_FSL_MC_ENET /* invert AQR405 IRQ pins polarity */ out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index c889845..5a6b20d 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y +CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 2efb313..daa90ae 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y +CONFIG_FSL_LS_PPA=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/2][v3] armv8: ls2080aqds: Add support for SD boot
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes for v3:
Rebased to latest codebase
Depends on
York MMU patches:
http://patchwork.ozlabs.org/bundle/yorksun/Rewrite_MMU/
For correct type of image creation:
https://patchwork.ozlabs.org/patch/671466/
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 6 +--
.../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 6 +--
board/freescale/ls2080a/ls2080a.c | 6 +--
board/freescale/ls2080aqds/eth.c | 8 +---
board/freescale/ls2080aqds/ls2080aqds.c| 4 +-
configs/ls2080aqds_sdcard_defconfig| 53 ++
include/configs/ls2080a_common.h | 9
include/configs/ls2080aqds.h | 33 --
8 files changed, 105 insertions(+), 20 deletions(-)
create mode 100644 configs/ls2080aqds_sdcard_defconfig
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 17258a7..d9e2a90 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -435,7 +435,7 @@ int cpu_eth_init(bd_t *bis)
{
int error = 0;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = fsl_mc_ldpaa_init(bis);
#endif
#ifdef CONFIG_FMAN_ENET
@@ -571,7 +571,7 @@ phys_size_t board_reserve_ram_top(phys_size_t ram_size)
{
phys_size_t ram_top = ram_size;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* The start address of MC reserved memory needs to be aligned. */
ram_top -= mc_get_dram_block_size();
ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1);
@@ -686,7 +686,7 @@ void dram_init_banksize(void)
}
#endif /* CONFIG_SYS_MEM_RESERVE_SECURE */
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* Assign memory for MC */
#ifdef CONFIG_SYS_DDR_BLOCK3_BASE
if (gd->bd->bi_dram[2].size >=
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 7faa86c..10d7f47 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -18,7 +18,7 @@ static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int xfi_dpmac[XFI8 + 1];
int sgmii_dpmac[SGMII16 + 1];
#endif
@@ -103,7 +103,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask,
u32 sd_prctl_shift,
debug("Unknown SerDes lane protocol %d\n", lane_prtcl);
else {
serdes_prtcl_map[lane_prtcl] = 1;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
switch (lane_prtcl) {
case QSGMII_A:
wriop_init_dpmac(sd, 5, (int)lane_prtcl);
@@ -152,7 +152,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask,
u32 sd_prctl_shift,
void fsl_serdes_init(void)
{
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int i , j;
for (i = XFI1, j = 1; i <= XFI8; i++, j++)
diff --git a/board/freescale/ls2080a/ls2080a.c
b/board/freescale/ls2080a/ls2080a.c
index ace5bf6..cff468b 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -64,13 +64,13 @@ int board_eth_init(bd_t *bis)
error = smc9_initialize(0, CONFIG_SMC9_BASE);
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = cpu_eth_init(bis);
#endif
return error;
}
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
void fdt_fixup_board_enet(void *fdt)
{
int offset;
@@ -128,7 +128,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
fdt_fixup_board_enet(blob);
#endif
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 59361e9..302ff76 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -22,7 +22,7 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
* Bank 1 -> Lanes A,
[U-Boot] [PATCH 1/2][v3] armv8: ls2080a: Reorganise NAND_BOOT code in config flag
Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes for v3:
Rebased to latest codebase
Incorporated York's comments to defined CONFIG_NAND_BOOT
in new line
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
configs/ls2080aqds_nand_defconfig | 1 +
configs/ls2080ardb_nand_defconfig | 1 +
include/configs/ls2080a_common.h| 5 +
include/configs/ls2080aqds.h| 4 +++-
5 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 9489f85..fa68baf 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -134,7 +134,7 @@ void erratum_a009635(void)
static void erratum_rcw_src(void)
{
-#if defined(CONFIG_SPL)
+#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
u32 val;
diff --git a/configs/ls2080aqds_nand_defconfig
b/configs/ls2080aqds_nand_defconfig
index 8910938..bc0b9b1 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -12,6 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/configs/ls2080ardb_nand_defconfig
b/configs/ls2080ardb_nand_defconfig
index 8223111..d449190 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -12,6 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 4173d9a..ae72939 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -216,6 +216,7 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_PANIC_HANG /* do not reset board on panic */
+#ifdef CONFIG_SPL
#define CONFIG_SPL_BSS_START_ADDR 0x8010
#define CONFIG_SPL_BSS_MAX_SIZE0x0010
#define CONFIG_SPL_FRAMEWORK
@@ -225,11 +226,15 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x1800a000
+#ifdef CONFIG_NAND_BOOT
+#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_DST 0x8040
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+#endif
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0010
#define CONFIG_SYS_SPL_MALLOC_START0x8020
#define CONFIG_SYS_MONITOR_LEN (640 * 1024)
+#endif
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 08d1586..93f6b51 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -197,7 +197,8 @@ unsigned long get_board_ddr_clk(void);
FTIM2_GPCM_TWP(0x3E))
#define CONFIG_SYS_CS3_FTIM3 0x0
-#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
+#if defined(CONFIG_SPL)
+#if defined(CONFIG_NAND_BOOT)
#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY
#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR
@@ -233,6 +234,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SPL_PAD_TO 0x2
#define CONFIG_SYS_NAND_U_BOOT_OFFS(256 * 1024)
#define CONFIG_SYS_NAND_U_BOOT_SIZE(640 * 1024)
+#endif
#else
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
--
1.9.1
___
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[U-Boot] [PATCH][v2] armv8: ls2080aqds: Add support for SD boot
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes for v2:
Rebased to latest codebase
Depends on
York MMU patches:
http://patchwork.ozlabs.org/bundle/yorksun/Rewrite_MMU/
For correct type of image creation:
https://patchwork.ozlabs.org/patch/671466/
arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 6 +--
.../cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c| 6 +--
board/freescale/ls2080a/ls2080a.c | 6 +--
board/freescale/ls2080aqds/eth.c | 8 +---
board/freescale/ls2080aqds/ls2080aqds.c| 4 +-
configs/ls2080aqds_sdcard_defconfig| 53 ++
include/configs/ls2080a_common.h | 2 +
include/configs/ls2080aqds.h | 13 +-
8 files changed, 80 insertions(+), 18 deletions(-)
create mode 100644 configs/ls2080aqds_sdcard_defconfig
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 17258a7..d9e2a90 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -435,7 +435,7 @@ int cpu_eth_init(bd_t *bis)
{
int error = 0;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = fsl_mc_ldpaa_init(bis);
#endif
#ifdef CONFIG_FMAN_ENET
@@ -571,7 +571,7 @@ phys_size_t board_reserve_ram_top(phys_size_t ram_size)
{
phys_size_t ram_top = ram_size;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* The start address of MC reserved memory needs to be aligned. */
ram_top -= mc_get_dram_block_size();
ram_top &= ~(CONFIG_SYS_MC_RSV_MEM_ALIGN - 1);
@@ -686,7 +686,7 @@ void dram_init_banksize(void)
}
#endif /* CONFIG_SYS_MEM_RESERVE_SECURE */
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* Assign memory for MC */
#ifdef CONFIG_SYS_DDR_BLOCK3_BASE
if (gd->bd->bi_dram[2].size >=
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index 7faa86c..10d7f47 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -18,7 +18,7 @@ static u8 serdes1_prtcl_map[SERDES_PRCTL_COUNT];
static u8 serdes2_prtcl_map[SERDES_PRCTL_COUNT];
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int xfi_dpmac[XFI8 + 1];
int sgmii_dpmac[SGMII16 + 1];
#endif
@@ -103,7 +103,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask,
u32 sd_prctl_shift,
debug("Unknown SerDes lane protocol %d\n", lane_prtcl);
else {
serdes_prtcl_map[lane_prtcl] = 1;
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
switch (lane_prtcl) {
case QSGMII_A:
wriop_init_dpmac(sd, 5, (int)lane_prtcl);
@@ -152,7 +152,7 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask,
u32 sd_prctl_shift,
void fsl_serdes_init(void)
{
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
int i , j;
for (i = XFI1, j = 1; i <= XFI8; i++, j++)
diff --git a/board/freescale/ls2080a/ls2080a.c
b/board/freescale/ls2080a/ls2080a.c
index ace5bf6..cff468b 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -64,13 +64,13 @@ int board_eth_init(bd_t *bis)
error = smc9_initialize(0, CONFIG_SMC9_BASE);
#endif
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
error = cpu_eth_init(bis);
#endif
return error;
}
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
void fdt_fixup_board_enet(void *fdt)
{
int offset;
@@ -128,7 +128,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
fdt_fixup_board_enet(blob);
#endif
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 59361e9..302ff76 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -22,7 +22,7 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
-#ifdef CONFIG_FSL_MC_ENET
+#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
/* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
* Bank 1 -> Lanes A, B, C, D, E, F, G, H
[U-Boot] [PATCH][v2] armv8:ls2080a: Reorganise NAND_BOOT code in config flag
Add CONFIG_NAND_BOOT config flag to organise
NAND_BOOT specific code in config flag like
-nand-boot specfic errata errata_rcw_src()
-CONFIG_SYS_NAND_U_BOOT_DST,etc
Signed-off-by: Santan Kumar <santan.ku...@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
---
Changes for v2:
Rebased to latest codebase
Incorporated York's comments to defined CONFIG_NAND_BOOT
in new line
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
configs/ls2080aqds_nand_defconfig | 1 +
configs/ls2080ardb_nand_defconfig | 1 +
include/configs/ls2080a_common.h| 5 +
include/configs/ls2080aqds.h| 4 +++-
5 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 9489f85..fa68baf 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -134,7 +134,7 @@ void erratum_a009635(void)
static void erratum_rcw_src(void)
{
-#if defined(CONFIG_SPL)
+#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
u32 val;
diff --git a/configs/ls2080aqds_nand_defconfig
b/configs/ls2080aqds_nand_defconfig
index 8910938..bc0b9b1 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -12,6 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/configs/ls2080ardb_nand_defconfig
b/configs/ls2080ardb_nand_defconfig
index 8223111..d449190 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -12,6 +12,7 @@ CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_NAND_BOOT=y
CONFIG_SYS_EXTRA_OPTIONS="NAND, LS2080A"
CONFIG_BOOTDELAY=10
CONFIG_SPL=y
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 4173d9a..ae72939 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -216,6 +216,7 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_PANIC_HANG /* do not reset board on panic */
+#ifdef CONFIG_SPL
#define CONFIG_SPL_BSS_START_ADDR 0x8010
#define CONFIG_SPL_BSS_MAX_SIZE0x0010
#define CONFIG_SPL_FRAMEWORK
@@ -225,11 +226,15 @@ unsigned long long get_qixis_addr(void);
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#define CONFIG_SPL_TEXT_BASE 0x1800a000
+#ifdef CONFIG_NAND_BOOT
+#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_DST 0x8040
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+#endif
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0010
#define CONFIG_SYS_SPL_MALLOC_START0x8020
#define CONFIG_SYS_MONITOR_LEN (640 * 1024)
+#endif
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 08d1586..93f6b51 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -197,7 +197,8 @@ unsigned long get_board_ddr_clk(void);
FTIM2_GPCM_TWP(0x3E))
#define CONFIG_SYS_CS3_FTIM3 0x0
-#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
+#if defined(CONFIG_SPL)
+#if defined(CONFIG_NAND_BOOT)
#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY
#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR
@@ -233,6 +234,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SPL_PAD_TO 0x2
#define CONFIG_SYS_NAND_U_BOOT_OFFS(256 * 1024)
#define CONFIG_SYS_NAND_U_BOOT_SIZE(640 * 1024)
+#endif
#else
#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
--
1.9.1
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[U-Boot] [PATCH] ls2080ardb, ls2080aqds: Add mcmemsize in default env setting
Initialize mcmemsize to 0x4000 Signed-off-by: Santan Kumar <santan.ku...@nxp.com> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com> --- include/configs/ls2080aqds.h | 2 ++ include/configs/ls2080ardb.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 9ad8486..177a9bd 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -369,6 +369,7 @@ unsigned long get_board_ddr_clk(void); "kernel_start=0x58110\0"\ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ + "mcmemsize=0x4000\0"\ "mcinitcmd=esbc_validate 0x580c8;" \ "esbc_validate 0x580cc;"\ "fsl_mc start mc 0x58030" \ @@ -385,6 +386,7 @@ unsigned long get_board_ddr_clk(void); "kernel_start=0x58110\0"\ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ + "mcmemsize=0x4000\0"\ "mcinitcmd=fsl_mc start mc 0x58030" \ " 0x58080 \0" #endif /* CONFIG_SECURE_BOOT */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index db9ad15..e8487e1 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -339,6 +339,7 @@ unsigned long get_board_sys_clk(void); "kernel_start=0x58110\0"\ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ + "mcmemsize=0x4000\0"\ "fdtfile=fsl-ls2080a-rdb.dtb\0" \ "mcinitcmd=esbc_validate 0x580c8;" \ "esbc_validate 0x580cc;"\ @@ -362,6 +363,7 @@ unsigned long get_board_sys_clk(void); "kernel_start=0x58110\0"\ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ + "mcmemsize=0x4000\0"\ "fdtfile=fsl-ls2080a-rdb.dtb\0" \ "mcinitcmd=fsl_mc start mc 0x58030" \ " 0x58080 \0" \ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
