[PATCH 05/18] stm32mp: stm32prog: add flash layout parsing
Build the list of device and of partition with
a tab separated value file with a stm32 header: the FlashLayout.tsv
(https://wiki.st.com/stm32mpu/wiki/STM32CubeProgrammer_flashlayout)
Signed-off-by: Patrick Delaunay
---
.../mach-stm32mp/cmd_stm32prog/stm32prog.c| 372 +-
1 file changed, 371 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index e2c6c43d88..11fe479072 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -24,6 +24,17 @@
DECLARE_GLOBAL_DATA_PTR;
+/* order of column in flash layout file */
+enum stm32prog_col_t {
+ COL_OPTION,
+ COL_ID,
+ COL_NAME,
+ COL_TYPE,
+ COL_IP,
+ COL_OFFSET,
+ COL_NB_STM32
+};
+
char *stm32prog_get_error(struct stm32prog_data *data)
{
static const char error_msg[] = "Unspecified";
@@ -34,11 +45,370 @@ char *stm32prog_get_error(struct stm32prog_data *data)
return data->error;
}
+u8 stm32prog_header_check(struct raw_header_s *raw_header,
+ struct image_header_s *header)
+{
+ unsigned int i;
+
+ header->present = 0;
+ header->image_checksum = 0x0;
+ header->image_length = 0x0;
+
+ if (!raw_header || !header) {
+ pr_debug("%s:no header data\n", __func__);
+ return -1;
+ }
+ if (raw_header->magic_number !=
+ (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
+ pr_debug("%s:invalid magic number : 0x%x\n",
+__func__, raw_header->magic_number);
+ return -2;
+ }
+ /* only header v1.0 supported */
+ if (raw_header->header_version != 0x0001) {
+ pr_debug("%s:invalid header version : 0x%x\n",
+__func__, raw_header->header_version);
+ return -3;
+ }
+ if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
+ pr_debug("%s:invalid reserved field\n", __func__);
+ return -4;
+ }
+ for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
+ if (raw_header->padding[i] != 0) {
+ pr_debug("%s:invalid padding field\n", __func__);
+ return -5;
+ }
+ }
+ header->present = 1;
+ header->image_checksum = le32_to_cpu(raw_header->image_checksum);
+ header->image_length = le32_to_cpu(raw_header->image_length);
+
+ return 0;
+}
+
+static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
+{
+ u32 i, checksum;
+ u8 *payload;
+
+ /* compute checksum on payload */
+ payload = (u8 *)addr;
+ checksum = 0;
+ for (i = header->image_length; i > 0; i--)
+ checksum += *(payload++);
+
+ return checksum;
+}
+
+/* FLASHLAYOUT PARSING */
+static int parse_option(struct stm32prog_data *data,
+ int i, char *p, struct stm32prog_part_t *part)
+{
+ int result = 0;
+ char *c = p;
+
+ part->option = 0;
+ if (!strcmp(p, "-"))
+ return 0;
+
+ while (*c) {
+ switch (*c) {
+ case 'P':
+ part->option |= OPT_SELECT;
+ break;
+ case 'E':
+ part->option |= OPT_EMPTY;
+ break;
+ default:
+ result = -EINVAL;
+ stm32prog_err("Layout line %d: invalid option '%c' in
%s)",
+ i, *c, p);
+ return -EINVAL;
+ }
+ c++;
+ }
+ if (!(part->option & OPT_SELECT)) {
+ stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
+ return -EINVAL;
+ }
+
+ return result;
+}
+
+static int parse_id(struct stm32prog_data *data,
+ int i, char *p, struct stm32prog_part_t *part)
+{
+ int result = 0;
+ unsigned long value;
+
+ result = strict_strtoul(p, 0, );
+ part->id = value;
+ if (result || value > PHASE_LAST_USER) {
+ stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
+ result = -EINVAL;
+ }
+
+ return result;
+}
+
+static int parse_name(struct stm32prog_data *data,
+ int i, char *p, struct stm32prog_part_t *part)
+{
+ int result = 0;
+
+ if (strlen(p) < sizeof(part->name)) {
+ strcpy(part->name, p);
+ } else {
+ stm32prog_err("Layout line %d: partition name too long [%d]:
%s",
+ i, strlen(p), p);
+ result = -EINVAL;
+ }
+
+ return result;
+}
+
+static int parse_type(struct stm32prog_data
[PATCH 01/18] usb: gadget: g_dnl: add function g_dnl_set_product
Add a function g_dnl_set_product to change the Product string used in USB
enumeration in any command based on download gadget.
If the function is called with NULL pointer, the product string is set to
the default value (product[] = "USB download gadget").
Signed-off-by: Patrick Delaunay
---
drivers/usb/gadget/g_dnl.c | 8
include/g_dnl.h| 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
index e9e1600a1a..7a51b53f24 100644
--- a/drivers/usb/gadget/g_dnl.c
+++ b/drivers/usb/gadget/g_dnl.c
@@ -89,6 +89,14 @@ static struct usb_gadget_strings *g_dnl_composite_strings[]
= {
NULL,
};
+void g_dnl_set_product(const char *s)
+{
+ if (s)
+ g_dnl_string_defs[1].s = s;
+ else
+ g_dnl_string_defs[1].s = product;
+}
+
static int g_dnl_unbind(struct usb_composite_dev *cdev)
{
struct usb_gadget *gadget = cdev->gadget;
diff --git a/include/g_dnl.h b/include/g_dnl.h
index 6d461c73d3..836ee602c8 100644
--- a/include/g_dnl.h
+++ b/include/g_dnl.h
@@ -38,6 +38,7 @@ int g_dnl_board_usb_cable_connected(void);
int g_dnl_register(const char *s);
void g_dnl_unregister(void);
void g_dnl_set_serialnumber(char *);
+void g_dnl_set_product(const char *s);
bool g_dnl_detach(void);
void g_dnl_trigger_detach(void);
--
2.17.1
[PATCH 03/18] stm32mp: add function get_cpu_dev
Add a function get_cpu_dev to get the DEV_ID present
in DBGMCU_IDC register.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cpu.c| 11 ++-
arch/arm/mach-stm32mp/include/mach/sys_proto.h | 5 +
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index e14e3e47f2..36a9205819 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -236,6 +236,11 @@ static u32 read_idc(void)
return readl(DBGMCU_IDC);
}
+u32 get_cpu_dev(void)
+{
+ return (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
+}
+
u32 get_cpu_rev(void)
{
return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
@@ -266,11 +271,7 @@ static u32 get_cpu_rpn(void)
u32 get_cpu_type(void)
{
- u32 id;
-
- id = (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
-
- return (id << 16) | get_cpu_rpn();
+ return (get_cpu_dev() << 16) | get_cpu_rpn();
}
/* Get Package options from OTP */
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 1617126bea..4b6c7b8bdd 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -20,6 +20,11 @@
/* return CPU_STMP32MP...Xxx constants */
u32 get_cpu_type(void);
+#define CPU_DEV_STM32MP15 0x500
+
+/* return CPU_DEV constants */
+u32 get_cpu_dev(void);
+
#define CPU_REVA 0x1000
#define CPU_REVB 0x2000
#define CPU_REVZ 0x2001
--
2.17.1
[PATCH 01/11] board: stm32mp1: move board_get_mtdparts in st common directory
Move the stm32mp1 common code board_get_mtdparts() in common directory,
this patch reduce the maintenance effort on this generic part (not board
dependent).
Signed-off-by: Patrick Delaunay
---
board/dhelectronics/dh_stm32mp1/Makefile | 1 +
board/dhelectronics/dh_stm32mp1/board.c | 89 --
board/st/common/Makefile | 4 +
board/st/common/stm32mp_mtdparts.c | 115 +++
board/st/stm32mp1/stm32mp1.c | 102
5 files changed, 120 insertions(+), 191 deletions(-)
create mode 100644 board/st/common/stm32mp_mtdparts.c
diff --git a/board/dhelectronics/dh_stm32mp1/Makefile
b/board/dhelectronics/dh_stm32mp1/Makefile
index b42c4e4c04..c77a1e3a84 100644
--- a/board/dhelectronics/dh_stm32mp1/Makefile
+++ b/board/dhelectronics/dh_stm32mp1/Makefile
@@ -8,3 +8,4 @@ obj-y += ../../st/stm32mp1/spl.o
endif
obj-y += ../../st/stm32mp1/board.o board.o
+obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += ../../st/common/stm32mp_mtdparts.o
diff --git a/board/dhelectronics/dh_stm32mp1/board.c
b/board/dhelectronics/dh_stm32mp1/board.c
index b663696983..2baa36278c 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -519,95 +519,6 @@ enum env_location env_get_location(enum env_operation op,
int prio)
#endif
}
-#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
-
-#define MTDPARTS_LEN 256
-#define MTDIDS_LEN 128
-
-/**
- * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
- * If we need to access it before the env is relocated, then we need
- * to use our own stack buffer. gd->env_buf will be too small.
- *
- * @param buf temporary buffer pointer MTDPARTS_LEN long
- * @return mtdparts variable string, NULL if not found
- */
-static const char *env_get_mtdparts(const char *str, char *buf)
-{
- if (gd->flags & GD_FLG_ENV_READY)
- return env_get(str);
- if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
- return buf;
-
- return NULL;
-}
-
-/**
- * update the variables "mtdids" and "mtdparts" with content of mtdparts_
- */
-static void board_get_mtdparts(const char *dev,
- char *mtdids,
- char *mtdparts)
-{
- char env_name[32] = "mtdparts_";
- char tmp_mtdparts[MTDPARTS_LEN];
- const char *tmp;
-
- /* name of env variable to read = mtdparts_ */
- strcat(env_name, dev);
- tmp = env_get_mtdparts(env_name, tmp_mtdparts);
- if (tmp) {
- /* mtdids: "=, " */
- if (mtdids[0] != '\0')
- strcat(mtdids, ",");
- strcat(mtdids, dev);
- strcat(mtdids, "=");
- strcat(mtdids, dev);
-
- /* mtdparts: "mtdparts=:>;..." */
- if (mtdparts[0] != '\0')
- strncat(mtdparts, ";", MTDPARTS_LEN);
- else
- strcat(mtdparts, "mtdparts=");
- strncat(mtdparts, dev, MTDPARTS_LEN);
- strncat(mtdparts, ":", MTDPARTS_LEN);
- strncat(mtdparts, tmp, MTDPARTS_LEN);
- }
-}
-
-void board_mtdparts_default(const char **mtdids, const char **mtdparts)
-{
- struct udevice *dev;
- static char parts[3 * MTDPARTS_LEN + 1];
- static char ids[MTDIDS_LEN + 1];
- static bool mtd_initialized;
-
- if (mtd_initialized) {
- *mtdids = ids;
- *mtdparts = parts;
- return;
- }
-
- memset(parts, 0, sizeof(parts));
- memset(ids, 0, sizeof(ids));
-
- /* probe all MTD devices */
- for (uclass_first_device(UCLASS_MTD, );
-dev;
-uclass_next_device()) {
- pr_debug("mtd device = %s\n", dev->name);
- }
-
- if (!uclass_get_device(UCLASS_SPI_FLASH, 0, ))
- board_get_mtdparts("nor0", ids, parts);
-
- mtd_initialized = true;
- *mtdids = ids;
- *mtdparts = parts;
- debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
-}
-#endif
-
#if defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, bd_t *bd)
{
diff --git a/board/st/common/Makefile b/board/st/common/Makefile
index 8553606b90..4bb8b49867 100644
--- a/board/st/common/Makefile
+++ b/board/st/common/Makefile
@@ -4,3 +4,7 @@
#
obj-$(CONFIG_CMD_STBOARD) += cmd_stboard.o
+
+ifeq ($(CONFIG_ARCH_STM32MP),y)
+obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += stm32mp_mtdparts.o
+endif
diff --git a/board/st/common/stm32mp_mtdparts.c
b/board/st/common/stm32mp_mtdparts.c
new file mode 100644
index 00..d77e075864
--- /dev/null
+++ b/board/st/common/stm32mp_mtdparts.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MTDPARTS_LEN 256
+#define MTDIDS_LEN
[PATCH 06/18] stm32mp: stm32prog: add MMC device
Add support of MMC device (based on DFU_MMC backend)
for SD card and eMMC update.
Create a GPT partitioning on the device.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/Kconfig | 3 +
.../mach-stm32mp/cmd_stm32prog/stm32prog.c| 204 +-
.../mach-stm32mp/cmd_stm32prog/stm32prog.h| 3 +
configs/stm32mp15_basic_defconfig | 2 -
configs/stm32mp15_trusted_defconfig | 2 -
5 files changed, 209 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 61466f6125..39504e8540 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -119,6 +119,9 @@ config CMD_STM32PROG
select DFU
select DFU_RAM
select DFU_VIRT
+ select PARTITION_TYPE_GUID
+ imply CMD_GPT if MMC
+ imply DFU_MMC if MMC
help
activate a specific command stm32prog for STM32MP soc family
witch update the device with the tools STM32CubeProgrammer,
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index 11fe479072..feb83670b5 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -14,6 +15,9 @@
#include "stm32prog.h"
+/* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
+#define GPT_HEADER_SZ 34
+
#define OPT_SELECT BIT(0)
#define OPT_EMPTY BIT(1)
@@ -22,6 +26,32 @@
#define ALT_BUF_LENSZ_1K
+#define ROOTFS_MMC0_UUID \
+ EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
+0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
+
+#define ROOTFS_MMC1_UUID \
+ EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
+0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
+
+#define ROOTFS_MMC2_UUID \
+ EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
+0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
+
+/* RAW parttion (binary / bootloader) used Linux - reserved UUID */
+#define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
+
+/*
+ * unique partition guid (uuid) for partition named "rootfs"
+ * on each MMC instance = SD Card or eMMC
+ * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
+ */
+static const efi_guid_t uuid_mmc[3] = {
+ ROOTFS_MMC0_UUID,
+ ROOTFS_MMC1_UUID,
+ ROOTFS_MMC2_UUID
+};
+
DECLARE_GLOBAL_DATA_PTR;
/* order of column in flash layout file */
@@ -200,6 +230,9 @@ static int parse_ip(struct stm32prog_data *data,
part->dev_id = 0;
if (!strcmp(p, "none")) {
part->target = STM32PROG_NONE;
+ } else if (!strncmp(p, "mmc", 3)) {
+ part->target = STM32PROG_MMC;
+ len = 3;
} else {
result = -EINVAL;
}
@@ -424,16 +457,50 @@ static int __init part_cmp(void *priv, struct list_head
*a, struct list_head *b)
static int init_device(struct stm32prog_data *data,
struct stm32prog_dev_t *dev)
{
+ struct mmc *mmc = NULL;
struct blk_desc *block_dev = NULL;
int part_id;
u64 first_addr = 0, last_addr = 0;
struct stm32prog_part_t *part, *next_part;
switch (dev->target) {
+#ifdef CONFIG_MMC
+ case STM32PROG_MMC:
+ mmc = find_mmc_device(dev->dev_id);
+ if (mmc_init(mmc)) {
+ stm32prog_err("mmc device %d not found", dev->dev_id);
+ return -ENODEV;
+ }
+ block_dev = mmc_get_blk_desc(mmc);
+ if (!block_dev) {
+ stm32prog_err("mmc device %d not probed", dev->dev_id);
+ return -ENODEV;
+ }
+ dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
+ dev->mmc = mmc;
+
+ /* reserve a full erase group for each GTP headers */
+ if (mmc->erase_grp_size > GPT_HEADER_SZ) {
+ first_addr = dev->erase_size;
+ last_addr = (u64)(block_dev->lba -
+ mmc->erase_grp_size) *
+ block_dev->blksz;
+ } else {
+ first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
+ last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
+ block_dev->blksz;
+ }
+ pr_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
+block_dev->lba, block_dev->blksz);
+ pr_debug(" available address = 0x%llx..0x%llx\n",
+first_addr, last_addr);
+ break;
+#endif
default:
stm32prog_err("unknown device type = %d", dev->target);
[PATCH 07/18] stm32mp: stm32prog: add support of boot partition for eMMC device
Add support of eMMC device boot partition with
part_id = -1 for offset="boot1"
or = -2 for offset="boot2"
The stm32prog command configures the MMC DFU backend with "mmcpart"
and configure the eMMC (command "mmc bootbus" and "mmc partconf")
when the update is done.
Signed-off-by: Patrick Delaunay
---
.../mach-stm32mp/cmd_stm32prog/stm32prog.c| 124 +-
.../mach-stm32mp/cmd_stm32prog/stm32prog.h| 2 +-
2 files changed, 90 insertions(+), 36 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index feb83670b5..f63036606e 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -259,12 +259,30 @@ static int parse_offset(struct stm32prog_data *data,
char *tail;
part->part_id = 0;
+ part->addr = 0;
part->size = 0;
- part->addr = simple_strtoull(p, , 0);
- if (tail == p || *tail != '\0') {
- stm32prog_err("Layout line %d: invalid offset '%s'",
- i, p);
- result = -EINVAL;
+ /* eMMC boot parttion */
+ if (!strncmp(p, "boot", 4)) {
+ if (strlen(p) != 5) {
+ result = -EINVAL;
+ } else {
+ if (p[4] == '1')
+ part->part_id = -1;
+ else if (p[4] == '2')
+ part->part_id = -2;
+ else
+ result = -EINVAL;
+ }
+ if (result)
+ stm32prog_err("Layout line %d: invalid part '%s'",
+ i, p);
+ } else {
+ part->addr = simple_strtoull(p, , 0);
+ if (tail == p || *tail != '\0') {
+ stm32prog_err("Layout line %d: invalid offset '%s'",
+ i, p);
+ result = -EINVAL;
+ }
}
return result;
@@ -451,7 +469,10 @@ static int __init part_cmp(void *priv, struct list_head
*a, struct list_head *b)
parta = container_of(a, struct stm32prog_part_t, list);
partb = container_of(b, struct stm32prog_part_t, list);
- return parta->addr > partb->addr ? 1 : -1;
+ if (parta->part_id != partb->part_id)
+ return parta->part_id - partb->part_id;
+ else
+ return parta->addr > partb->addr ? 1 : -1;
}
static int init_device(struct stm32prog_data *data,
@@ -520,44 +541,53 @@ static int init_device(struct stm32prog_data *data,
part->dev_id, part->addr, part->size);
continue;
}
-
- part->part_id = part_id++;
-
- /* last partition : size to the end of the device */
- if (part->list.next != >part_list) {
- next_part =
- container_of(part->list.next,
-struct stm32prog_part_t,
-list);
- if (part->addr < next_part->addr) {
- part->size = next_part->addr -
-part->addr;
+ if (part->part_id < 0) { /* boot hw partition for eMMC */
+ if (mmc) {
+ part->size = mmc->capacity_boot;
} else {
- stm32prog_err("%s (0x%x): same address : 0x%llx
== %s (0x%x): 0x%llx",
+ stm32prog_err("%s (0x%x): hw partition not
expected : %d",
part->name, part->id,
- part->addr,
- next_part->name,
- next_part->id,
- next_part->addr);
- return -EINVAL;
+ part->part_id);
+ return -ENODEV;
}
} else {
- if (part->addr <= last_addr) {
- part->size = last_addr - part->addr;
+ part->part_id = part_id++;
+
+ /* last partition : size to the end of the device */
+ if (part->list.next != >part_list) {
+ next_part =
+ container_of(part->list.next,
+struct stm32prog_part_t,
+list);
+ if (part->addr < next_part->addr) {
+ part->size =
[PATCH 08/18] stm32mp: stm32prog: add upport of partial update
Add support of partial update, update only some partitions,
and check the coherence of the layout with the existing GPT
partitions (offset and size).
Signed-off-by: Patrick Delaunay
---
.../mach-stm32mp/cmd_stm32prog/stm32prog.c| 69 +++
.../mach-stm32mp/cmd_stm32prog/stm32prog.h| 1 +
2 files changed, 70 insertions(+)
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
index f63036606e..787bcdef7d 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -481,8 +481,12 @@ static int init_device(struct stm32prog_data *data,
struct mmc *mmc = NULL;
struct blk_desc *block_dev = NULL;
int part_id;
+ int ret;
u64 first_addr = 0, last_addr = 0;
struct stm32prog_part_t *part, *next_part;
+ u64 part_addr, part_size;
+ bool part_found;
+ const char *part_name;
switch (dev->target) {
#ifdef CONFIG_MMC
@@ -515,6 +519,7 @@ static int init_device(struct stm32prog_data *data,
block_dev->lba, block_dev->blksz);
pr_debug(" available address = 0x%llx..0x%llx\n",
first_addr, last_addr);
+ pr_debug(" full_update = %d\n", dev->full_update);
break;
#endif
default:
@@ -522,6 +527,7 @@ static int init_device(struct stm32prog_data *data,
return -ENODEV;
}
pr_debug(" erase size = 0x%x\n", dev->erase_size);
+ pr_debug(" full_update = %d\n", dev->full_update);
/* order partition list in offset order */
list_sort(NULL, >part_list, _cmp);
@@ -598,6 +604,61 @@ static int init_device(struct stm32prog_data *data,
part->part_id, part->option, part->id, part->name,
part->part_type, part->target,
part->dev_id, part->addr, part->size);
+
+ part_addr = 0;
+ part_size = 0;
+ part_found = false;
+
+ /* check coherency with existing partition */
+ if (block_dev) {
+ /*
+* block devices with GPT: check user partition size
+* only for partial update, the GPT partions are be
+* created for full update
+*/
+ if (dev->full_update || part->part_id < 0) {
+ pr_debug("\n");
+ continue;
+ }
+ disk_partition_t partinfo;
+
+ ret = part_get_info(block_dev, part->part_id,
+ );
+
+ if (ret) {
+ stm32prog_err("%s (0x%x):Couldn't find part %d
on device mmc %d",
+ part->name, part->id,
+ part_id, part->dev_id);
+ return -ENODEV;
+ }
+ part_addr = (u64)partinfo.start * partinfo.blksz;
+ part_size = (u64)partinfo.size * partinfo.blksz;
+ part_name = (char *)partinfo.name;
+ part_found = true;
+ }
+
+ if (!part_found) {
+ stm32prog_err("%s (0x%x): Invalid partition",
+ part->name, part->id);
+ pr_debug("\n");
+ continue;
+ }
+
+ pr_debug(" %08llx %08llx\n", part_addr, part_size);
+
+ if (part->addr != part_addr) {
+ stm32prog_err("%s (0x%x): Bad address for partition %d
(%s) = 0x%llx <> 0x%llx expected",
+ part->name, part->id, part->part_id,
+ part_name, part->addr, part_addr);
+ return -ENODEV;
+ }
+ if (part->size != part_size) {
+ stm32prog_err("%s (0x%x): Bad size for partition %d
(%s) at 0x%llx = 0x%llx <> 0x%llx expected",
+ part->name, part->id, part->part_id,
+ part_name, part->addr, part->size,
+ part_size);
+ return -ENODEV;
+ }
}
return 0;
}
@@ -644,6 +705,7 @@ static int treat_partition_list(struct stm32prog_data *data)
/* new device found */
data->dev[j].target = part->target;
data->dev[j].dev_id = part->dev_id;
+ data->dev[j].full_update = true;
data->dev_nb++;
break;
[PATCH 02/18] dfu: add prototype for dfu_transaction_initiate/cleanup
Add prototype for function dfu_transaction_initiate and dfu_transaction_cleanup to avoid warning with W=1. Signed-off-by: Patrick Delaunay --- include/dfu.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dfu.h b/include/dfu.h index fb5260d903..2f0e335ec0 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -209,6 +209,9 @@ void dfu_initiated_callback(struct dfu_entity *dfu); */ void dfu_flush_callback(struct dfu_entity *dfu); +int dfu_transaction_initiate(struct dfu_entity *dfu, bool read); +void dfu_transaction_cleanup(struct dfu_entity *dfu); + /* * dfu_defer_flush - pointer to store dfu_entity for deferred flashing. * It should be NULL when not used. -- 2.17.1
Re: [RFC 06/14] efi_loader: capsule: add capsule_on_disk support
On 3/17/20 3:12 AM, AKASHI Takahiro wrote:
Capsule data can be loaded into the system either via UpdateCapsule
runtime service or files on a file system (of boot device).
The latter case is called "capsules on disk", and actual updates will
take place at the next boot time.
In this commit, we will support capsule on disk mechanism.
Please note that U-Boot itself has no notion of "boot device" and
all the capsule files to be executed will be identified only if they
are located in a specific directory on a device that is determined
by "Boot" variables.
We have efi_set_bootdev() defining the boot device. So why do you refer
to Boot?
Please, add Sphinx style comments to the functions describing
functionality and parameters.
Signed-off-by: AKASHI Takahiro
---
include/efi_loader.h | 18 ++
lib/efi_loader/Kconfig| 7 +
lib/efi_loader/efi_boottime.c | 3 +
lib/efi_loader/efi_capsule.c | 548 ++
lib/efi_loader/efi_setup.c| 6 +
5 files changed, 582 insertions(+)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index c3cb7735bf50..c701672e18db 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -178,6 +178,8 @@ extern const efi_guid_t
efi_guid_hii_config_routing_protocol;
extern const efi_guid_t efi_guid_hii_config_access_protocol;
extern const efi_guid_t efi_guid_hii_database_protocol;
extern const efi_guid_t efi_guid_hii_string_protocol;
+/* GUID of capsule update result */
+extern const efi_guid_t efi_guid_capsule_report;
/* GUID of RNG protocol */
extern const efi_guid_t efi_guid_rng_protocol;
@@ -690,6 +692,22 @@ efi_status_t EFIAPI efi_query_capsule_caps(
u64 *maximum_capsule_size,
u32 *reset_type);
+#ifdef CONFIG_EFI_CAPSULE_ON_DISK
+#define EFI_CAPSULE_DIR L"\\EFI\\UpdateCapsule\\"
+
+/* Hook at initialization */
+efi_status_t efi_launch_capsules(void);
+/* Notify ExitBootServices() is called */
+void efi_capsule_boot_exit_notify(void);
+#else
+static inline efi_status_t efi_launch_capsules(void)
+{
+ return EFI_SUCCESS;
+}
+
+static inline efi_capsule_boot_exit_notify(void) {}
+#endif /* CONFIG_EFI_CAPSULE_ON_DISK */
+
#else /* CONFIG_IS_ENABLED(EFI_LOADER) */
/* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 2ef6cb124f3a..95e10f7d981b 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -97,6 +97,13 @@ config EFI_CAPSULE_UPDATE
Select this option if you want to use capsule update feature,
including firmware updates and variable updates.
+config EFI_CAPSULE_ON_DISK
+ bool "Enable capsule-on-disk support"
+ depends on EFI_CAPSULE_UPDATE
+ default n
+ help
+ Select this option if you want to use capsule-on-disk feature.
+
config EFI_LOADER_BOUNCE_BUFFER
bool "EFI Applications use bounce buffers for DMA operations"
depends on ARM64
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 9860d5047502..c2a789b4f910 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -1981,6 +1981,9 @@ static efi_status_t EFIAPI
efi_exit_boot_services(efi_handle_t image_handle,
/* Notify variable services */
efi_variables_boot_exit_notify();
+ /* Notify capsule services */
+ efi_capsule_boot_exit_notify();
+
/* Remove all events except EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE */
list_for_each_entry_safe(evt, next_event, _events, link) {
if (evt->type != EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE)
diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index d3f931910d10..f3e2a555a6b9 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -10,8 +10,14 @@
#include
#include
#include
+#include
#include
+const efi_guid_t efi_guid_capsule_report = EFI_CAPSULE_REPORT_GUID;
+
+/* for file system access */
+static struct efi_file_handle *bootdev_root;
+
/*
* Launch a capsule
*/
@@ -96,3 +102,545 @@ efi_status_t EFIAPI efi_query_capsule_caps(
out:
return EFI_EXIT(ret);
}
+
+#ifdef CONFIG_EFI_CAPSULE_ON_DISK
+static void efi_capsule_result_variable(int num,
+ struct efi_capsule_header *capsule,
+ efi_status_t return_status)
+{
+ char variable_name[12];
+ u16 variable_name16[12], *p;
+ struct efi_capsule_result_variable_header result;
+ struct efi_time time;
+ efi_status_t ret;
+
+ sprintf(variable_name, "Capsule%04X", num);
+ p = variableame16;
+ utf8_utf16_strncpy(, variable_name, 11);
+ result.variable_total_size = sizeof(result);
+ result.capsule_guid = capsule->capsule_guid;
+ ret = EFI_CALL((*efi_runtime_services.get_time)(, NULL));
+ if (ret == EFI_SUCCESS)
+
Re: [RFC 09/14] efi_loader: add simple firmware management protocol for FIT image
On 3/18/20 9:17 AM, AKASHI Takahiro wrote: On Wed, Mar 18, 2020 at 09:04:44AM +0100, Heinrich Schuchardt wrote: On 3/17/20 3:12 AM, AKASHI Takahiro wrote: In this commit, a very simple firmware management protocol driver is implemented. It will take a single FIT image firmware in a capsule and apply the data using an existing update_tftp() interface. To specify a device and location to be updated, CONFIG_EFI_CAPSULE_FIT_INTERFACE, and CONFIG_EFI_CAPSULE_FIT_DEVICE are used. Signed-off-by: AKASHI Takahiro --- include/efi_loader.h | 3 + lib/efi_loader/Kconfig| 24 - lib/efi_loader/Makefile | 1 + lib/efi_loader/efi_firmware.c | 191 ++ 4 files changed, 218 insertions(+), 1 deletion(-) create mode 100644 lib/efi_loader/efi_firmware.c diff --git a/include/efi_loader.h b/include/efi_loader.h index c701672e18db..79bdf9586d24 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -134,6 +134,7 @@ extern const struct efi_hii_config_access_protocol efi_hii_config_access; extern const struct efi_hii_database_protocol efi_hii_database; extern const struct efi_hii_string_protocol efi_hii_string; extern const struct efi_rng_protocol efi_rng_protocol; +extern const struct efi_firmware_management_protocol efi_fmp_fit; uint16_t *efi_dp_str(struct efi_device_path *dp); @@ -180,6 +181,8 @@ extern const efi_guid_t efi_guid_hii_database_protocol; extern const efi_guid_t efi_guid_hii_string_protocol; /* GUID of capsule update result */ extern const efi_guid_t efi_guid_capsule_report; +/* GUID of firmware management protocol */ +extern const efi_guid_t efi_guid_firmware_management_protocol; /* GUID of RNG protocol */ extern const efi_guid_t efi_guid_rng_protocol; diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index 43d6f75d557a..41b1e9b5543c 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -97,7 +97,6 @@ config EFI_CAPSULE_UPDATE Select this option if you want to use capsule update feature, including firmware updates and variable updates. - if EFI_CAPSULE_UPDATE config EFI_CAPSULE_UPDATE_FIRMWARE @@ -107,6 +106,29 @@ config EFI_CAPSULE_UPDATE_FIRMWARE Select this option if you want to enable capsule-based firmware update +config EFI_CAPSULE_FIT_SIMPLE + bool "Firmware management protocol for simple FIT image" + depends on EFI_CAPSULE_UPDATE_FIRMWARE + depends on FIT + select UPDATE_TFTP UPDATE_TFTP is a very unsecure setting. A rogue DHCP and tFTP server can be used to compromise a device where this is enabled. Why should we need to enable an insecure network protocol to have capsule updates? 1. This is a sample FMP driver to demonstrate a power of capsule 2. update_tftp() is called *only* against the interface and device that are specified by configuration. It's up to the developer. I am concerned about the dhcp or tftp command becoming insecure with CONFIG_UPDATE_TFTP=y. I would prefer a CONFIG_UPDATE controlling if common/update.c is compiled and a separate CONFIG_UPDATE_TFTP which enables what is tFTP specific. Best regards Heinrich 3. Later on, capsule authentication support will be implemented. So I believe that my approach here makes good sense. -Takahiro Akashi Best regards Heinrich + select DFU + default n + help + Select this option if you want to enable firmware management protocol + for simple FIT image + +config EFI_CAPSULE_FIT_INTERFACE + string "Storage interface for storing FIT image" + depends on EFI_CAPSULE_FIT_SIMPLE + help + Define storage interface for storing FIT image + +config EFI_CAPSULE_FIT_DEVICE + string "Storage device for storing FIT image" + depends on EFI_CAPSULE_FIT_SIMPLE + help + Define storage device for storing FIT image + endif config EFI_CAPSULE_ON_DISK diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile index f19096924bef..50da10e0e3d9 100644 --- a/lib/efi_loader/Makefile +++ b/lib/efi_loader/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o obj-y += efi_bootmgr.o obj-y += efi_boottime.o obj-$(CONFIG_EFI_CAPSULE_UPDATE) += efi_capsule.o +obj-$(CONFIG_EFI_CAPSULE_FIT_SIMPLE) += efi_firmware.o obj-y += efi_console.o obj-y += efi_device_path.o obj-$(CONFIG_EFI_DEVICE_PATH_TO_TEXT) += efi_device_path_to_text.o diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c new file mode 100644 index ..021c93196242 --- /dev/null +++ b/lib/efi_loader/efi_firmware.c @@ -0,0 +1,191 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * EFI Firmware management protocol for FIT image + * + * Copyright (c) 2018 Linaro Limited + * Author: AKASHI Takahiro + */ + +#include +#include +#include + +/* + * This FIMRWARE_MANAGEMENT_PROTOCOL driver provides a
Re: [PATCH 1/9] ram: stm32mp1: increase vdd2_ddr: buck2 for 32bits LPDDR
On 3/6/20 11:14 AM, Patrick Delaunay wrote:
> Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2
> form 1.2V to 1.25V for 32bits configuration.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/include/mach/ddr.h | 6 +++--
> board/st/stm32mp1/board.c| 23 ++
> drivers/ram/stm32mp1/stm32mp1_ddr.c | 30
> include/power/stpmic1.h | 1 +
> 4 files changed, 49 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/include/mach/ddr.h
> b/arch/arm/mach-stm32mp/include/mach/ddr.h
> index b8a17cfbdd..bfc42a7c48 100644
> --- a/arch/arm/mach-stm32mp/include/mach/ddr.h
> +++ b/arch/arm/mach-stm32mp/include/mach/ddr.h
> @@ -9,8 +9,10 @@
> /* DDR power initializations */
> enum ddr_type {
> STM32MP_DDR3,
> - STM32MP_LPDDR2,
> - STM32MP_LPDDR3,
> + STM32MP_LPDDR2_16,
> + STM32MP_LPDDR2_32,
> + STM32MP_LPDDR3_16,
> + STM32MP_LPDDR3_32,
> };
>
> int board_ddr_power_init(enum ddr_type ddr_type);
> diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c
> index c3d832f584..4e35d36c76 100644
> --- a/board/st/stm32mp1/board.c
> +++ b/board/st/stm32mp1/board.c
> @@ -43,6 +43,7 @@ int board_ddr_power_init(enum ddr_type ddr_type)
> struct udevice *dev;
> bool buck3_at_180v = false;
> int ret;
> + u32 buck2;
>
> ret = uclass_get_device_by_driver(UCLASS_PMIC,
> DM_GET_DRIVER(pmic_stpmic1), );
> @@ -102,8 +103,10 @@ int board_ddr_power_init(enum ddr_type ddr_type)
>
> break;
>
> - case STM32MP_LPDDR2:
> - case STM32MP_LPDDR3:
> + case STM32MP_LPDDR2_16:
> + case STM32MP_LPDDR2_32:
> + case STM32MP_LPDDR3_16:
> + case STM32MP_LPDDR3_32:
> /*
>* configure VDD_DDR1 = LDO3
>* Set LDO3 to 1.8V
> @@ -133,11 +136,23 @@ int board_ddr_power_init(enum ddr_type ddr_type)
> if (ret < 0)
> return ret;
>
> - /* VDD_DDR2 : Set BUCK2 to 1.2V */
> + /* VDD_DDR2 : Set BUCK2 to 1.2V (16bits) or 1.25V (32 bits)*/
> + switch (ddr_type) {
> + case STM32MP_LPDDR2_32:
> + case STM32MP_LPDDR3_32:
> + buck2 = STPMIC1_BUCK2_125V;
> + break;
> + default:
> + case STM32MP_LPDDR2_16:
> + case STM32MP_LPDDR3_16:
> + buck2 = STPMIC1_BUCK2_120V;
> + break;
> + }
> +
> ret = pmic_clrsetbits(dev,
> STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2),
> STPMIC1_BUCK_VOUT_MASK,
> - STPMIC1_BUCK2_120V);
> + buck2);
> if (ret < 0)
> return ret;
>
> diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c
> b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> index d765a46f7c..a87914f2d5 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> @@ -668,14 +668,34 @@ void stm32mp1_ddr_init(struct ddr_info *priv,
> {
> u32 pir;
> int ret = -EINVAL;
> + char bus_width;
> +
> + switch (config->c_reg.mstr & DDRCTRL_MSTR_DATA_BUS_WIDTH_MASK) {
> + case DDRCTRL_MSTR_DATA_BUS_WIDTH_QUARTER:
> + bus_width = 8;
> + break;
> + case DDRCTRL_MSTR_DATA_BUS_WIDTH_HALF:
> + bus_width = 16;
> + break;
> + default:
> + bus_width = 32;
> + break;
> + }
> +
>
> if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3)
> ret = board_ddr_power_init(STM32MP_DDR3);
> - else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2)
> - ret = board_ddr_power_init(STM32MP_LPDDR2);
> - else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3)
> - ret = board_ddr_power_init(STM32MP_LPDDR3);
> -
> + else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR2) {
> + if (bus_width == 32)
> + ret = board_ddr_power_init(STM32MP_LPDDR2_32);
> + else
> + ret = board_ddr_power_init(STM32MP_LPDDR2_16);
> + } else if (config->c_reg.mstr & DDRCTRL_MSTR_LPDDR3) {
> + if (bus_width == 32)
> + ret = board_ddr_power_init(STM32MP_LPDDR3_32);
> + else
> + ret = board_ddr_power_init(STM32MP_LPDDR3_16);
> + }
> if (ret)
> panic("ddr power init failed\n");
>
> diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h
> index dc8b5a7459..1493a677f0 100644
> --- a/include/power/stpmic1.h
> +++ b/include/power/stpmic1.h
> @@ -37,6 +37,7 @@
> #define STPMIC1_BUCK_VOUT(sel) (sel << STPMIC1_BUCK_VOUT_SHIFT)
>
> #define STPMIC1_BUCK2_120V
Re: [PATCH 3/9] ram: stm32mp1: don't display the prompt two times
On 3/6/20 11:14 AM, Patrick Delaunay wrote:
> Remove one "DDR>" display on command
> - next
> - step
> - go
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/ram/stm32mp1/stm32mp1_interactive.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c
> b/drivers/ram/stm32mp1/stm32mp1_interactive.c
> index cc9b2e7c96..cedf92cb5f 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_interactive.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c
> @@ -367,7 +367,6 @@ bool stm32mp1_ddr_interactive(void *priv,
> enum stm32mp1_ddr_interact_step step,
> const struct stm32mp1_ddr_config *config)
> {
> - const char *prompt = "DDR>";
> char buffer[CONFIG_SYS_CBSIZE];
> char *argv[CONFIG_SYS_MAXARGS + 1]; /* NULL terminated */
> int argc;
> @@ -403,13 +402,12 @@ bool stm32mp1_ddr_interactive(void *priv,
> }
>
> printf("%d:%s\n", step, step_str[step]);
> - printf("%s\n", prompt);
>
> if (next_step > step)
> return false;
>
> while (next_step == step) {
> - cli_readline_into_buffer(prompt, buffer, 0);
> + cli_readline_into_buffer("DDR>", buffer, 0);
> argc = cli_simple_parse_line(buffer, argv);
> if (!argc)
> continue;
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 4/9] ram: stm32mp1: tuning: add timeout for polling BISTGSR.BDDONE
On 3/6/20 11:14 AM, Patrick Delaunay wrote:
> Avoid to block the tuning procedure on BIST error (not finished
> BIST procedure) by adding a 1000us timeout on the polling of
> BISTGSR.BDDONE executed to detect the end of BIST.
>
> The normal duration of the BIST test is around 5us.
>
> This patch also cleanup comments.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/ram/stm32mp1/stm32mp1_tuning.c | 45 ++
> 1 file changed, 25 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/ram/stm32mp1/stm32mp1_tuning.c
> b/drivers/ram/stm32mp1/stm32mp1_tuning.c
> index e3e6f0f79c..cab6cf087a 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_tuning.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_tuning.c
> @@ -8,6 +8,7 @@
> #include
> #include
> #include
> +#include
>
> #include "stm32mp1_ddr_regs.h"
> #include "stm32mp1_ddr.h"
> @@ -246,6 +247,8 @@ static void BIST_test(struct stm32mp1_ddrphy *phy, u8
> byte,
> bool result = true; /* BIST_SUCCESS */
> u32 cnt = 0;
> u32 error = 0;
> + u32 val;
> + int ret;
>
> bist->test_result = true;
>
> @@ -274,27 +277,29 @@ run:
> 0x0001);
> /* Write BISTRR.BINST = 3?b001; */
>
> - /* Wait for a number of CTL clocks before reading BIST register*/
> - /* Wait 300 ctl_clk cycles; ... IS it really needed?? */
> - /* Perform BIST Instruction Stop*/
> - /* Write BISTRR.BINST = 3?b010;*/
> -
> - /* poll on BISTGSR.BDONE. If 0, wait. ++TODO Add timeout */
> - while (!(readl(>bistgsr) & DDRPHYC_BISTGSR_BDDONE))
> - ;
> -
> - /*Check if received correct number of words*/
> - /* if (Read BISTWCSR.DXWCNT = Read BISTWCR.BWCNT) */
> - if (((readl(>bistwcsr)) >> DDRPHYC_BISTWCSR_DXWCNT_SHIFT) ==
> - readl(>bistwcr)) {
> - /*Determine if there is a data comparison error*/
> - /* if (Read BISTGSR.BDXERR = 1?b0) */
> - if (readl(>bistgsr) & DDRPHYC_BISTGSR_BDXERR)
> - result = false; /* BIST_FAIL; */
> - else
> - result = true; /* BIST_SUCCESS; */
> - } else {
> + /* poll on BISTGSR.BDONE and wait max 1000 us */
> + ret = readl_poll_timeout(>bistgsr, val,
> + val & DDRPHYC_BISTGSR_BDDONE, 1000);
> +
> + if (ret < 0) {
> + printf("warning: BIST timeout\n");
> result = false; /* BIST_FAIL; */
> + /*Perform BIST Stop */
> + clrsetbits_le32(>bistrr, 0x0007, 0x0002);
> + } else {
> + /*Check if received correct number of words*/
> + /* if (Read BISTWCSR.DXWCNT = Read BISTWCR.BWCNT) */
> + if (((readl(>bistwcsr)) >> DDRPHYC_BISTWCSR_DXWCNT_SHIFT)
> + == readl(>bistwcr)) {
> + /*Determine if there is a data comparison error*/
> + /* if (Read BISTGSR.BDXERR = 1?b0) */
> + if (readl(>bistgsr) & DDRPHYC_BISTGSR_BDXERR)
> + result = false; /* BIST_FAIL; */
> + else
> + result = true; /* BIST_SUCCESS; */
> + } else {
> + result = false; /* BIST_FAIL; */
> + }
> }
>
> /* loop while success */
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 6/9] ram: stm32mp1: update BIST config for tuning
On 3/6/20 11:14 AM, Patrick Delaunay wrote:
> Update the BIST config to compute the real use mask for the real
> bank, row and col of the used DDR. The values are get from addrmap
> register value.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/ram/stm32mp1/stm32mp1_tuning.c | 151 +++--
> 1 file changed, 142 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/ram/stm32mp1/stm32mp1_tuning.c
> b/drivers/ram/stm32mp1/stm32mp1_tuning.c
> index 37d3ec8fef..07d57d496c 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_tuning.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_tuning.c
> @@ -8,6 +8,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #include "stm32mp1_ddr_regs.h"
> @@ -76,6 +77,133 @@ static u8 get_nb_bytes(struct stm32mp1_ddrctl *ctl)
> return nb_bytes;
> }
>
> +static u8 get_nb_bank(struct stm32mp1_ddrctl *ctl)
> +{
> + /* Count bank address bits */
> + u8 bits = 0;
> + u32 reg, val;
> +
> + reg = readl(>addrmap1);
> + /* addrmap1.addrmap_bank_b1 */
> + val = (reg & GENMASK(5, 0)) >> 0;
> + if (val <= 31)
> + bits++;
> + /* addrmap1.addrmap_bank_b2 */
> + val = (reg & GENMASK(13, 8)) >> 8;
> + if (val <= 31)
> + bits++;
> + /* addrmap1.addrmap_bank_b3 */
> + val = (reg & GENMASK(21, 16)) >> 16;
> + if (val <= 31)
> + bits++;
> +
> + return bits;
> +}
> +
> +static u8 get_nb_col(struct stm32mp1_ddrctl *ctl)
> +{
> + u8 bits;
> + u32 reg, val;
> +
> + /* Count column address bits, start at 2 for b0 and b1 (fixed) */
> + bits = 2;
> +
> + reg = readl(>addrmap2);
> + /* addrmap2.addrmap_col_b2 */
> + val = (reg & GENMASK(3, 0)) >> 0;
> + if (val <= 7)
> + bits++;
> + /* addrmap2.addrmap_col_b3 */
> + val = (reg & GENMASK(11, 8)) >> 8;
> + if (val <= 7)
> + bits++;
> + /* addrmap2.addrmap_col_b4 */
> + val = (reg & GENMASK(19, 16)) >> 16;
> + if (val <= 7)
> + bits++;
> + /* addrmap2.addrmap_col_b5 */
> + val = (reg & GENMASK(27, 24)) >> 24;
> + if (val <= 7)
> + bits++;
> +
> + reg = readl(>addrmap3);
> + /* addrmap3.addrmap_col_b6 */
> + val = (reg & GENMASK(3, 0)) >> 0;
> + if (val <= 7)
> + bits++;
> + /* addrmap3.addrmap_col_b7 */
> + val = (reg & GENMASK(11, 8)) >> 8;
> + if (val <= 7)
> + bits++;
> + /* addrmap3.addrmap_col_b8 */
> + val = (reg & GENMASK(19, 16)) >> 16;
> + if (val <= 7)
> + bits++;
> + /* addrmap3.addrmap_col_b9 */
> + val = (reg & GENMASK(27, 24)) >> 24;
> + if (val <= 7)
> + bits++;
> +
> + reg = readl(>addrmap4);
> + /* addrmap4.addrmap_col_b10 */
> + val = (reg & GENMASK(3, 0)) >> 0;
> + if (val <= 7)
> + bits++;
> + /* addrmap4.addrmap_col_b11 */
> + val = (reg & GENMASK(11, 8)) >> 8;
> + if (val <= 7)
> + bits++;
> +
> + return bits;
> +}
> +
> +static u8 get_nb_row(struct stm32mp1_ddrctl *ctl)
> +{
> + /* Count row address bits */
> + u8 bits = 0;
> + u32 reg, val;
> +
> + reg = readl(>addrmap5);
> + /* addrmap5.addrmap_row_b0 */
> + val = (reg & GENMASK(3, 0)) >> 0;
> + if (val <= 11)
> + bits++;
> + /* addrmap5.addrmap_row_b1 */
> + val = (reg & GENMASK(11, 8)) >> 8;
> + if (val <= 11)
> + bits++;
> + /* addrmap5.addrmap_row_b2_10 */
> + val = (reg & GENMASK(19, 16)) >> 16;
> + if (val <= 11)
> + bits += 9;
> + else
> + printf("warning: addrmap5.addrmap_row_b2_10 not supported\n");
> + /* addrmap5.addrmap_row_b11 */
> + val = (reg & GENMASK(27, 24)) >> 24;
> + if (val <= 11)
> + bits++;
> +
> + reg = readl(>addrmap6);
> + /* addrmap6.addrmap_row_b12 */
> + val = (reg & GENMASK(3, 0)) >> 0;
> + if (val <= 7)
> + bits++;
> + /* addrmap6.addrmap_row_b13 */
> + val = (reg & GENMASK(11, 8)) >> 8;
> + if (val <= 7)
> + bits++;
> + /* addrmap6.addrmap_row_b14 */
> + val = (reg & GENMASK(19, 16)) >> 16;
> + if (val <= 7)
> + bits++;
> + /* addrmap6.addrmap_row_b15 */
> + val = (reg & GENMASK(27, 24)) >> 24;
> + if (val <= 7)
> + bits++;
> +
> + return bits;
> +}
> +
> static void itm_soft_reset(struct stm32mp1_ddrphy *phy)
> {
> stm32mp1_ddrphy_init(phy, DDRPHYC_PIR_ITMSRST);
> @@ -170,8 +298,13 @@ static void set_r0dgps_delay(struct stm32mp1_ddrphy *phy,
> }
>
> /* Basic BIST configuration for data lane tests. */
> -static void config_BIST(struct stm32mp1_ddrphy *phy)
> +static void config_BIST(struct stm32mp1_ddrctl *ctl,
> + struct stm32mp1_ddrphy *phy)
> {
> + u8 nb_bank = get_nb_bank(ctl);
> + u8 nb_row = get_nb_row(ctl);
> + u8 nb_col = get_nb_col(ctl);
> +
> /* Selects the SDRAM
[PATCH 5/5] rockchip: spl: Move board_early_init_f after cpu timer
Custom board_early_init_f not only deal with simple gpio
configuration but also have a possibility to access clocks
to process any clock related operations like checking reset
cause state and etc.
So, call it once the rockchip timer initialization done instead
of calling first place of board_init_f which doesn't have any
rockchip init code before.
This specific concern was tested with checking reset reason
via board_early_init_f, which indeed require a clk probe.
Signed-off-by: Jagan Teki
---
arch/arm/mach-rockchip/spl.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 48ab0e60c6..4b4e756247 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -120,8 +120,6 @@ void board_init_f(ulong dummy)
debug("\nspl:debug uart enabled in %s\n", __func__);
#endif
- board_early_init_f();
-
ret = spl_early_init();
if (ret) {
printf("spl_early_init() failed: %d\n", ret);
@@ -135,6 +133,9 @@ void board_init_f(ulong dummy)
/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
timer_init();
#endif
+
+ board_early_init_f();
+
#if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
debug("\nspl:init dram\n");
ret = uclass_get_device(UCLASS_RAM, 0, );
--
2.17.1
[PATCH 4/5] rockchip: tpl: Print TPL banner at end-of board_init_f
Usually printing the TPL banner various between architecture
or board codes.
- Some of them would print at the end of board_init_f for
making sure all initialization prior to this would happen
properly. if at all there is a requirement for serial init,
that happen properly since it prints all after that.
- Some of them would print at the beginning once the debug
uart done. assuming this particular banner wouldn't require
any serial setup code.
Rockchip TPL is following later one and printing early in
board_init_f.
But, sometimes there is a use case where we can print the banner
only when the board_init_early_f done.
It is because board_init_early_f has gpio configuration required
for non-standard board design to glow the specific LEDs upon
user interaction. These board design wouldn't recommend to
print any console logs unless user interact with board via
some kind of power button.
This look specific to board but since all rockchip boards use
common tpl code, this seems to the desired solution. and also
it is following similar initialization as rockchip SPL like
- printing banner at end of board_init_f
- debug print at early board_init_f in debug_uart_init block.
Signed-off-by: Jagan Teki
---
arch/arm/mach-rockchip/tpl.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index fab85dff7d..a9eb27d788 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -60,10 +60,7 @@ void board_init_f(ulong dummy)
* printascii("string");
*/
debug_uart_init();
-#ifdef CONFIG_TPL_BANNER_PRINT
- printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
- U_BOOT_TIME ")\n");
-#endif
+ debug("\ntpl:debug uart enabled in %s\n", __func__);
#endif
ret = spl_early_init();
if (ret) {
@@ -84,6 +81,11 @@ void board_init_f(ulong dummy)
printf("DRAM init failed: %d\n", ret);
return;
}
+
+#ifdef CONFIG_TPL_BANNER_PRINT
+ printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+ U_BOOT_TIME ")\n");
+#endif
}
int board_return_to_bootrom(struct spl_image_info *spl_image,
--
2.17.1
Re: [PATCH 7/9] ram: stm32mp1_ddr: fix self refresh disable during DQS training
On 3/6/20 11:14 AM, Patrick Delaunay wrote:
> DDRCTRL_PWRCTL.SELFREF_EN needs to be reset before DQS training step, not
> to enter in self refresh mode during the execution of this phase.
> Depending on settings, it can be set after the DQS training.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/ram/stm32mp1/stm32mp1_ddr.c | 5 -
> drivers/ram/stm32mp1/stm32mp1_ddr_regs.h | 1 +
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c
> b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> index a87914f2d5..b9300dd6d1 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> @@ -639,7 +639,8 @@ void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl)
> start_sw_done(ctl);
> /* quasi-dynamic register update*/
> setbits_le32(>rfshctl3, DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH);
> - clrbits_le32(>pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN);
> + clrbits_le32(>pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN |
> +DDRCTRL_PWRCTL_SELFREF_EN);
> clrbits_le32(>dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN);
> wait_sw_done_ack(ctl);
> }
> @@ -652,6 +653,8 @@ void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl,
> clrbits_le32(>rfshctl3, DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH);
> if (pwrctl & DDRCTRL_PWRCTL_POWERDOWN_EN)
> setbits_le32(>pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN);
> + if ((pwrctl & DDRCTRL_PWRCTL_SELFREF_EN))
> + setbits_le32(>pwrctl, DDRCTRL_PWRCTL_SELFREF_EN);
> setbits_le32(>dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN);
> wait_sw_done_ack(ctl);
> }
> diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h
> b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h
> index 9d33186b3a..afd93c518e 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h
> +++ b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h
> @@ -260,6 +260,7 @@ struct stm32mp1_ddrphy {
>
> #define DDRCTRL_MRSTAT_MR_WR_BUSYBIT(0)
>
> +#define DDRCTRL_PWRCTL_SELFREF_ENBIT(0)
> #define DDRCTRL_PWRCTL_POWERDOWN_EN BIT(1)
> #define DDRCTRL_PWRCTL_SELFREF_SWBIT(5)
>
Acked-by: Patrice Chotard
Thanks
Patrice
Acked-by: Patrice Chotard
Thanks
Patrice
[PATCH 3/5] rockchip: tpl: Move board_early_init_f after cpu timer
Custom board_early_init_f not only deal with simple gpio
configuration but also have a possibility to access clocks
to process any clock related operations like checking reset
cause state and etc.
So, call it once the rockchip timer initialization done instead
of calling first place of board_init_f which doesn't have any
rockchip init code before.
This specific concern was tested with checking reset reason
via board_early_init_f, which indeed require a clk probe.
Signed-off-by: Jagan Teki
---
arch/arm/mach-rockchip/tpl.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index a2b8d31cbd..fab85dff7d 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -50,8 +50,6 @@ void board_init_f(ulong dummy)
struct udevice *dev;
int ret;
- board_early_init_f();
-
#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
/*
* Debug UART can be used from here if required:
@@ -78,6 +76,9 @@ void board_init_f(ulong dummy)
/* Init ARM arch timer in arch/arm/cpu/ */
timer_init();
+ /* custom board early initialization */
+ board_early_init_f();
+
ret = uclass_get_device(UCLASS_RAM, 0, );
if (ret) {
printf("DRAM init failed: %d\n", ret);
--
2.17.1
[PATCH 1/2] net: dwc_eth_qos: implement reset-gpios for stm32
From: Christophe Roullier
Add management of property "reset-gpios" in the node identified by
"phy-handle" to configure any GPIO used to reset the PHY.
Signed-off-by: Christophe Roullier
Reviewed-by: Patrice CHOTARD
Reviewed-by: Patrick DELAUNAY
Signed-off-by: Patrick Delaunay
---
drivers/net/dwc_eth_qos.c | 53 +++
1 file changed, 53 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 0564bebf76..4796659216 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -694,6 +694,29 @@ static int eqos_start_resets_tegra186(struct udevice *dev)
static int eqos_start_resets_stm32(struct udevice *dev)
{
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ int ret;
+
+ debug("%s(dev=%p):\n", __func__, dev);
+ if (dm_gpio_is_valid(>phy_reset_gpio)) {
+ ret = dm_gpio_set_value(>phy_reset_gpio, 1);
+ if (ret < 0) {
+ pr_err("dm_gpio_set_value(phy_reset, assert) failed:
%d",
+ ret);
+ return ret;
+ }
+
+ udelay(2);
+
+ ret = dm_gpio_set_value(>phy_reset_gpio, 0);
+ if (ret < 0) {
+ pr_err("dm_gpio_set_value(phy_reset, deassert) failed:
%d",
+ ret);
+ return ret;
+ }
+ }
+ debug("%s: OK\n", __func__);
+
return 0;
}
@@ -709,6 +732,18 @@ static int eqos_stop_resets_tegra186(struct udevice *dev)
static int eqos_stop_resets_stm32(struct udevice *dev)
{
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ int ret;
+
+ if (dm_gpio_is_valid(>phy_reset_gpio)) {
+ ret = dm_gpio_set_value(>phy_reset_gpio, 1);
+ if (ret < 0) {
+ pr_err("dm_gpio_set_value(phy_reset, assert) failed:
%d",
+ ret);
+ return ret;
+ }
+ }
+
return 0;
}
@@ -1604,6 +1639,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
struct eqos_priv *eqos = dev_get_priv(dev);
int ret;
phy_interface_t interface;
+ struct ofnode_phandle_args phandle_args;
debug("%s(dev=%p):\n", __func__, dev);
@@ -1641,6 +1677,20 @@ static int eqos_probe_resources_stm32(struct udevice
*dev)
if (ret)
pr_warn("No phy clock provided %d", ret);
+ ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+_args);
+ if (!ret) {
+ /* search "reset-gpios" in phy node */
+ ret = gpio_request_by_name_nodev(phandle_args.node,
+"reset-gpios", 0,
+>phy_reset_gpio,
+GPIOD_IS_OUT |
+GPIOD_IS_OUT_ACTIVE);
+ if (ret)
+ pr_warn("gpio_request_by_name(phy reset) not provided
%d",
+ ret);
+ }
+
debug("%s: OK\n", __func__);
return 0;
@@ -1704,6 +1754,9 @@ static int eqos_remove_resources_stm32(struct udevice
*dev)
if (clk_valid(>clk_ck))
clk_free(>clk_ck);
+ if (dm_gpio_is_valid(>phy_reset_gpio))
+ dm_gpio_free(dev, >phy_reset_gpio);
+
debug("%s: OK\n", __func__);
return 0;
}
--
2.17.1
[PATCH 2/2] net: dwc_eth_qos: implement phy reg and max-speed for stm32
Add management of property "reg" to configure @ of phy and
also "max-speed" property to specify maximum speed in Mbit/s
supported by the device
Signed-off-by: Christophe Roullier
Reviewed-by: Patrick DELAUNAY
Signed-off-by: Patrick Delaunay
---
drivers/net/dwc_eth_qos.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 4796659216..63f2086dec 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -306,6 +306,8 @@ struct eqos_priv {
struct clk clk_slave_bus;
struct mii_dev *mii;
struct phy_device *phy;
+ int phyaddr;
+ u32 max_speed;
void *descs;
struct eqos_desc *tx_descs;
struct eqos_desc *rx_descs;
@@ -1081,12 +1083,21 @@ static int eqos_start(struct udevice *dev)
* don't need to reconnect/reconfigure again
*/
if (!eqos->phy) {
- eqos->phy = phy_connect(eqos->mii, -1, dev,
+ eqos->phy = phy_connect(eqos->mii, eqos->phyaddr, dev,
eqos->config->interface(dev));
if (!eqos->phy) {
pr_err("phy_connect() failed");
goto err_stop_resets;
}
+
+ if (eqos->max_speed) {
+ ret = phy_set_supported(eqos->phy, eqos->max_speed);
+ if (ret) {
+ pr_err("phy_set_supported() failed: %d", ret);
+ goto err_shutdown_phy;
+ }
+ }
+
ret = phy_config(eqos->phy);
if (ret < 0) {
pr_err("phy_config() failed: %d", ret);
@@ -1654,6 +1665,8 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
if (ret)
return -EINVAL;
+ eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0);
+
ret = clk_get_by_name(dev, "stmmaceth", >clk_master_bus);
if (ret) {
pr_err("clk_get_by_name(master_bus) failed: %d", ret);
@@ -1677,6 +1690,7 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
if (ret)
pr_warn("No phy clock provided %d", ret);
+ eqos->phyaddr = -1;
ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
_args);
if (!ret) {
@@ -1689,6 +1703,9 @@ static int eqos_probe_resources_stm32(struct udevice *dev)
if (ret)
pr_warn("gpio_request_by_name(phy reset) not provided
%d",
ret);
+
+ eqos->phyaddr = ofnode_read_u32_default(phandle_args.node,
+ "reg", -1);
}
debug("%s: OK\n", __func__);
--
2.17.1
Re: [PATCH 9/9] ram: stm32mp1: the property st,phy-cal becomes optional
On 3/6/20 11:14 AM, Patrick Delaunay wrote:
> This parameter "st,phy-cal" becomes optional and when it is
> absent the built-in PHY calibration is done.
>
> It is the case in the helper dtsi file "stm32mp15-ddr.dtsi"
> except if DDR_PHY_CAL_SKIP is defined.
>
> This patch also impact the ddr interactive mode
> - the registers of the param 'phy.cal' are initialized to 0 when
> "st,phy-cal" is not present in device tree (default behavior when
> DDR_PHY_CAL_SKIP is not activated)
> - the info 'cal' field can be use to change the calibration behavior
> - cal=1 => use param phy.cal to initialize the PHY, built-in training
> is skipped
> - cal=0 => param phy.cal is absent, built-in training is used (default)
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/dts/stm32mp15-ddr.dtsi | 3 ++
> .../memory-controllers/st,stm32mp1-ddr.txt| 2 ++
> drivers/ram/stm32mp1/stm32mp1_ddr.c | 19 +++
> drivers/ram/stm32mp1/stm32mp1_ddr.h | 1 +
> drivers/ram/stm32mp1/stm32mp1_interactive.c | 13 ++-
> drivers/ram/stm32mp1/stm32mp1_ram.c | 34 ++-
> 6 files changed, 56 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/dts/stm32mp15-ddr.dtsi b/arch/arm/dts/stm32mp15-ddr.dtsi
> index 38f29bb789..8b20b5e173 100644
> --- a/arch/arm/dts/stm32mp15-ddr.dtsi
> +++ b/arch/arm/dts/stm32mp15-ddr.dtsi
> @@ -133,6 +133,7 @@
> DDR_MR3
> >;
>
> +#ifdef DDR_PHY_CAL_SKIP
> st,phy-cal = <
> DDR_DX0DLLCR
> DDR_DX0DQTR
> @@ -148,6 +149,8 @@
> DDR_DX3DQSTR
> >;
>
> +#endif
> +
> status = "okay";
> };
> };
> diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> index ee708ce92c..ac6a7df432 100644
> --- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> +++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> @@ -129,6 +129,8 @@ phyc attributes:
> MR3
>
> - st,phy-cal : phy cal depending of calibration or tuning of DDR
> + This parameter is optional; when it is absent the built-in PHY
> + calibration is done.
> for STM32MP15x: 12 values are requested in this order
> DX0DLLCR
> DX0DQTR
> diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c
> b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> index b9300dd6d1..11b14ae652 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
> @@ -769,7 +769,8 @@ start:
> */
> set_reg(priv, REGPHY_REG, >p_reg);
> set_reg(priv, REGPHY_TIMING, >p_timing);
> - set_reg(priv, REGPHY_CAL, >p_cal);
> + if (config->p_cal_present)
> + set_reg(priv, REGPHY_CAL, >p_cal);
>
> if (INTERACTIVE(STEP_PHY_INIT))
> goto start;
> @@ -804,13 +805,16 @@ start:
>
> wait_operating_mode(priv, DDRCTRL_STAT_OPERATING_MODE_NORMAL);
>
> - debug("DDR DQS training : ");
> + if (config->p_cal_present) {
> + debug("DDR DQS training skipped.\n");
> + } else {
> + debug("DDR DQS training : ");
> /* 8. Disable Auto refresh and power down by setting
> *- RFSHCTL3.dis_au_refresh = 1
> *- PWRCTL.powerdown_en = 0
> *- DFIMISC.dfiinit_complete_en = 0
> */
> - stm32mp1_refresh_disable(priv->ctl);
> + stm32mp1_refresh_disable(priv->ctl);
>
> /* 9. Program PUBL PGCR to enable refresh during training and rank to train
> * not done => keep the programed value in PGCR
> @@ -818,14 +822,15 @@ start:
>
> /* 10. configure PUBL PIR register to specify which training step to run */
> /* warning : RVTRN is not supported by this PUBL */
> - stm32mp1_ddrphy_init(priv->phy, DDRPHYC_PIR_QSTRN);
> + stm32mp1_ddrphy_init(priv->phy, DDRPHYC_PIR_QSTRN);
>
> /* 11. monitor PUB PGSR.IDONE to poll cpmpletion of training sequence */
> - ddrphy_idone_wait(priv->phy);
> + ddrphy_idone_wait(priv->phy);
>
> /* 12. set back registers in step 8 to the orginal values if desidered */
> - stm32mp1_refresh_restore(priv->ctl, config->c_reg.rfshctl3,
> - config->c_reg.pwrctl);
> + stm32mp1_refresh_restore(priv->ctl, config->c_reg.rfshctl3,
> + config->c_reg.pwrctl);
> + } /* if (config->p_cal_present) */
>
> /* enable uMCTL2 AXI port 0 and 1 */
> setbits_le32(>ctl->pctrl_0, DDRCTRL_PCTRL_N_PORT_EN);
> diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.h
> b/drivers/ram/stm32mp1/stm32mp1_ddr.h
> index 52b748f3ca..4998f04439 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_ddr.h
> +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.h
> @@ -170,6 +170,7 @@ struct
Re: [PATCH] i2c: stm32f7_i2c: allows for any bus frequency
On 3/6/20 11:09 AM, Patrick Delaunay wrote:
> From: Alain Volmat
>
> Do not limit to 3 (100KHz, 400KHz, 1MHz) bus frequencies, but
> instead allow for any frequency. Depending on the requested
> frequency (via the clock-frequency DT entry), use the spec
> data from either Standard, Fast or Fast Plus mode.
>
> In order to do so, the driver do not use anymore spec identifier
> by directly handle the requested frequency and from it retrieve
> the corresponding spec data to be used for the computation
> of the timing register.
>
> Signed-off-by: Alain Volmat
> Reviewed-by: Patrick DELAUNAY
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/i2c/stm32f7_i2c.c | 105 +-
> 1 file changed, 59 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
> index 7d046c1a1e..fc5c1221e1 100644
> --- a/drivers/i2c/stm32f7_i2c.c
> +++ b/drivers/i2c/stm32f7_i2c.c
> @@ -7,10 +7,10 @@
> #include
> #include
> #include
> -#include
> #include
>
> #include
> +#include
> #include
>
> /* STM32 I2C registers */
> @@ -145,7 +145,6 @@ struct stm32_i2c_spec {
>
> /**
> * struct stm32_i2c_setup - private I2C timing setup parameters
> - * @speed: I2C speed mode (standard, Fast Plus)
> * @speed_freq: I2C speed frequency (Hz)
> * @clock_src: I2C clock source frequency (Hz)
> * @rise_time: Rise time (ns)
> @@ -154,7 +153,6 @@ struct stm32_i2c_spec {
> * @analog_filter: Analog filter delay (On/Off)
> */
> struct stm32_i2c_setup {
> - enum i2c_speed_mode speed;
> u32 speed_freq;
> u32 clock_src;
> u32 rise_time;
> @@ -184,10 +182,11 @@ struct stm32_i2c_priv {
> struct stm32_i2c_regs *regs;
> struct clk clk;
> struct stm32_i2c_setup *setup;
> - int speed;
> + u32 speed;
> };
>
> static const struct stm32_i2c_spec i2c_specs[] = {
> + /* Standard speed - 100 KHz */
> [IC_SPEED_MODE_STANDARD] = {
> .rate = I2C_SPEED_STANDARD_RATE,
> .rate_min = 8000,
> @@ -200,6 +199,7 @@ static const struct stm32_i2c_spec i2c_specs[] = {
> .l_min = 4700,
> .h_min = 4000,
> },
> + /* Fast speed - 400 KHz */
> [IC_SPEED_MODE_FAST] = {
> .rate = I2C_SPEED_FAST_RATE,
> .rate_min = 32,
> @@ -212,6 +212,7 @@ static const struct stm32_i2c_spec i2c_specs[] = {
> .l_min = 1300,
> .h_min = 600,
> },
> + /* Fast Plus Speed - 1 MHz */
> [IC_SPEED_MODE_FAST_PLUS] = {
> .rate = I2C_SPEED_FAST_PLUS_RATE,
> .rate_min = 80,
> @@ -474,6 +475,7 @@ static int stm32_i2c_xfer(struct udevice *bus, struct
> i2c_msg *msg,
> }
>
> static int stm32_i2c_compute_solutions(struct stm32_i2c_setup *setup,
> +const struct stm32_i2c_spec *specs,
> struct list_head *solutions)
> {
> struct stm32_i2c_timings *v;
> @@ -490,13 +492,13 @@ static int stm32_i2c_compute_solutions(struct
> stm32_i2c_setup *setup,
> af_delay_max = setup->analog_filter ?
> STM32_I2C_ANALOG_FILTER_DELAY_MAX : 0;
>
> - sdadel_min = i2c_specs[setup->speed].hddat_min + setup->fall_time -
> + sdadel_min = specs->hddat_min + setup->fall_time -
>af_delay_min - (setup->dnf + 3) * i2cclk;
>
> - sdadel_max = i2c_specs[setup->speed].vddat_max - setup->rise_time -
> + sdadel_max = specs->vddat_max - setup->rise_time -
>af_delay_max - (setup->dnf + 4) * i2cclk;
>
> - scldel_min = setup->rise_time + i2c_specs[setup->speed].sudat_min;
> + scldel_min = setup->rise_time + specs->sudat_min;
>
> if (sdadel_min < 0)
> sdadel_min = 0;
> @@ -548,6 +550,7 @@ static int stm32_i2c_compute_solutions(struct
> stm32_i2c_setup *setup,
> }
>
> static int stm32_i2c_choose_solution(struct stm32_i2c_setup *setup,
> + const struct stm32_i2c_spec *specs,
>struct list_head *solutions,
>struct stm32_i2c_timings *s)
> {
> @@ -570,8 +573,8 @@ static int stm32_i2c_choose_solution(struct
> stm32_i2c_setup *setup,
> dnf_delay = setup->dnf * i2cclk;
>
> tsync = af_delay_min + dnf_delay + (2 * i2cclk);
> - clk_max = STM32_NSEC_PER_SEC / i2c_specs[setup->speed].rate_min;
> - clk_min = STM32_NSEC_PER_SEC / i2c_specs[setup->speed].rate_max;
> + clk_max = STM32_NSEC_PER_SEC / specs->rate_min;
> + clk_min = STM32_NSEC_PER_SEC / specs->rate_max;
>
> /*
>* Among Prescaler possibilities discovered above figures out SCL Low
> @@ -589,7 +592,7 @@ static int stm32_i2c_choose_solution(struct
> stm32_i2c_setup *setup,
> for (l = 0; l < STM32_SCLL_MAX; l++) {
> u32 tscl_l = (l + 1) * prescaler + tsync;
>
> -
[RFC PATCH 3/9] mksunxi_fit_atf.sh: produce working binaries by default
At this moment unusable binaries are produced if bl31.bin file is missing in order to allow passing of various CI tests. This intention of broken binaries has to be now explicitly confirmed via new BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced by default from now on. Signed-off-by: Petr Štetiar --- board/sunxi/mksunxi_fit_atf.sh | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/board/sunxi/mksunxi_fit_atf.sh b/board/sunxi/mksunxi_fit_atf.sh index 88ad71974706..708b4248549d 100755 --- a/board/sunxi/mksunxi_fit_atf.sh +++ b/board/sunxi/mksunxi_fit_atf.sh @@ -8,9 +8,13 @@ [ -z "$BL31" ] && BL31="bl31.bin" if [ ! -f $BL31 ]; then - echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 - echo "Please read the section on ARM Trusted Firmware (ATF) in board/sunxi/README.sunxi64" >&2 - BL31=/dev/null + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + BL31=/dev/null + else + echo "ERROR: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 + echo "Please read the section on ARM Trusted Firmware (ATF) in board/sunxi/README.sunxi64" >&2 + exit 1 + fi fi if grep -q "^CONFIG_MACH_SUN50I_H6=y" .config; then
[RFC PATCH 2/9] Makefile: export config options for automatic builds
Make config options related to build bots accessible within the scripts. Signed-off-by: Petr Štetiar --- Makefile | 5 + 1 file changed, 5 insertions(+) diff --git a/Makefile b/Makefile index fa687f13a588..44776b8efcc4 100644 --- a/Makefile +++ b/Makefile @@ -426,6 +426,11 @@ KBUILD_AFLAGS += $(call cc-option,-fno-PIE) UBOOTRELEASE = $(shell cat include/config/uboot.release 2> /dev/null) UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) +BUILDBOT = $(CONFIG_BUILDBOT) +BUILDBOT_BROKEN_BINARIES = $(CONFIG_BUILDBOT_BROKEN_BINARIES) + +export BUILDBOT BUILDBOT_BROKEN_BINARIES + export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC
[RFC PATCH 5/9] fit_spl_optee.sh: produce working binaries by default
At this moment unusable binaries are produced if tee.bin file is missing in order to allow passing of various CI tests. This intention of broken images has to be now explicitly confirmed via new BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced by default from now on. Signed-off-by: Petr Štetiar --- arch/arm/mach-rockchip/fit_spl_optee.sh | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-rockchip/fit_spl_optee.sh b/arch/arm/mach-rockchip/fit_spl_optee.sh index 4118472d9f22..bdf61c4ba16d 100755 --- a/arch/arm/mach-rockchip/fit_spl_optee.sh +++ b/arch/arm/mach-rockchip/fit_spl_optee.sh @@ -11,9 +11,13 @@ [ -z "$TEE" ] && TEE="tee.bin" if [ ! -f $TEE ]; then - echo "WARNING: TEE file $TEE NOT found, U-Boot.itb is non-functional" >&2 - echo "Please export path for TEE or copy tee.bin to U-Boot folder" >&2 - TEE=/dev/null + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + TEE=/dev/null + else + echo "ERROR: TEE file $TEE NOT found, U-Boot.itb is non-functional" >&2 + echo "Please export path for TEE or copy tee.bin to U-Boot folder" >&2 + exit 1 + fi fi dtname=$1
[RFC PATCH 0/9] produce working binaries by default
Currently its not possible to distinguish between normal builds and
builds performed by the build bots/CI, thus leading to a workarounds
like for example in 4c78028737c3 ("mksunxi_fit_atf.sh: Allow for this to
complete when bl31.bin is missing"), where producing unusable binaries
is prefered in favor of a green automatic builds.
So lets try to fix this properly, add BUILDBOT config options which
could be set on the build bots/CI and the codebase can use this new
config option to workaround the issues in more clear manner.
Petr Štetiar (9):
Kconfig: add config options for automatic builds
Makefile: export config options for automatic builds
mksunxi_fit_atf.sh: produce working binaries by default
make_fit_atf.py: produce working binaries by default
fit_spl_optee.sh: produce working binaries by default
mkimage_fit_atf.sh: produce working binaries by default
fit_spl_atf.sh: produce working binaries by default
k3_fit_atf.sh: produce working binaries by default
mkimage_fit_opensbi.sh: produce working binaries by default
Kconfig | 12 +++
Makefile | 5 +
arch/arm/mach-rockchip/fit_spl_optee.sh | 10 +++---
arch/arm/mach-rockchip/make_fit_atf.py| 9 ++---
arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 14 -
arch/riscv/lib/mkimage_fit_opensbi.sh | 8 ++--
board/sunxi/mksunxi_fit_atf.sh| 10 +++---
.../puma_rk3399/fit_spl_atf.sh| 20 +--
tools/k3_fit_atf.sh | 16 +++
9 files changed, 78 insertions(+), 26 deletions(-)
[RFC PATCH 1/9] Kconfig: add config options for automatic builds
Currently its not possible to distinguish between normal builds and
builds performed by the build bots/CI, thus leading to a workarounds
like for example in 4c78028737c3 ("mksunxi_fit_atf.sh: Allow for this to
complete when bl31.bin is missing"), where producing unusable binaries
is prefered in favor of a green automatic builds.
So lets try to fix this properly, add BUILDBOT config options which
could be set on the build bots/CI and the codebase can use this new
config option to workaround the issues in more clear manner.
Signed-off-by: Petr Štetiar
---
Kconfig | 12
1 file changed, 12 insertions(+)
diff --git a/Kconfig b/Kconfig
index 66148ce47790..24960cf7abbf 100644
--- a/Kconfig
+++ b/Kconfig
@@ -20,6 +20,18 @@ config BROKEN
This option cannot be enabled. It is used as dependency
for broken and incomplete features.
+config BUILDBOT
+ bool "Set build defaults for automatic builds"
+ help
+ This option allows setting of usable defaults for automatic builds.
+
+config BUILDBOT_BROKEN_BINARIES
+ bool "Allow building of broken binaries"
+ depends on BUILDBOT
+ help
+ Resulting images wont be used for runtime testing, thus completition
+ of build is preferred.
+
config DEPRECATED
bool
help
[RFC PATCH 6/9] mkimage_fit_atf.sh: produce working binaries by default
At this moment unusable binaries are produced if bl31.bin file is missing in order to allow passing of various CI tests. This intention of broken binaries has to be now explicitly confirmed via new BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced by default from now on. Signed-off-by: Petr Štetiar --- arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh index 1e770ba111d3..5effe05abdee 100755 --- a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh +++ b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh @@ -29,11 +29,15 @@ else fi if [ ! -f $BL31 ]; then - echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 - BL31=/dev/null - # But U-Boot proper could be loaded in EL3 by specifying - # firmware = "uboot"; - # instead of "atf" in config node + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + BL31=/dev/null + # But U-Boot proper could be loaded in EL3 by specifying + # firmware = "uboot"; + # instead of "atf" in config node + else + echo "ERROR: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 + exit 1 + fi fi cat << __HEADER_EOF
[RFC PATCH 4/9] make_fit_atf.py: produce working binaries by default
At this moment unusable binaries are produced if bl31.elf file is
missing in order to allow passing of various CI tests. This intention of
broken binaries has to be now explicitly confirmed via new
BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced
by default from now on.
Signed-off-by: Petr Štetiar
---
arch/arm/mach-rockchip/make_fit_atf.py | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py
b/arch/arm/mach-rockchip/make_fit_atf.py
index d15c32b30329..4c55a87b51f2 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -196,17 +196,20 @@ def unpack_elf(filename):
def main():
uboot_elf = "./u-boot"
fit_its = sys.stdout
+broken_binaries = os.getenv("BUILDBOT_BROKEN_BINARIES") == "y"
if "BL31" in os.environ:
bl31_elf=os.getenv("BL31");
elif os.path.isfile("./bl31.elf"):
bl31_elf = "./bl31.elf"
-else:
+elif broken_binaries:
os.system("echo 'int main(){}' > bl31.c")
os.system("${CROSS_COMPILE}gcc -c bl31.c -o bl31.elf")
bl31_elf = "./bl31.elf"
+else:
logging.basicConfig(format='%(levelname)s:%(message)s',
level=logging.DEBUG)
-logging.warning(' BL31 file bl31.elf NOT found, resulting binary is
non-functional')
-logging.warning(' Please read Building section in doc/README.rockchip')
+logging.error(' BL31 file bl31.elf NOT found, resulting binary would
be non-functional')
+logging.error(' Please read Building section in doc/README.rockchip')
+sys.exit(1)
if "TEE" in os.environ:
tee_elf = os.getenv("TEE")
[RFC PATCH 9/9] mkimage_fit_opensbi.sh: produce working binaries by default
At this moment unusable binaries are produced if bl31.bin file is missing in order to allow passing of various CI tests. This intention of broken binaries has to be now explicitly confirmed via new BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced by default from now on. Signed-off-by: Petr Štetiar --- arch/riscv/lib/mkimage_fit_opensbi.sh | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/riscv/lib/mkimage_fit_opensbi.sh b/arch/riscv/lib/mkimage_fit_opensbi.sh index d6f95e5bfd2c..bf0968e683d2 100755 --- a/arch/riscv/lib/mkimage_fit_opensbi.sh +++ b/arch/riscv/lib/mkimage_fit_opensbi.sh @@ -17,8 +17,12 @@ if [ -z "$OPENSBI_LOAD_ADDR" ]; then fi if [ ! -f $OPENSBI ]; then - echo "WARNING: OpenSBI binary \"$OPENSBI\" not found, resulting binary is not functional." >&2 - OPENSBI=/dev/null + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + OPENSBI=/dev/null + else + echo "ERROR: OpenSBI binary \"$OPENSBI\" not found, resulting binary would be non-functional." >&2 + exit 1 + fi fi cat << __HEADER_EOF
[RFC PATCH 7/9] fit_spl_atf.sh: produce working binaries by default
At this moment unusable binaries are produced if either bl31.bin or rk3399m0.bin files are missing in order to allow passing of various CI tests. This intention of broken binaries has to be now explicitly confirmed via new BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced by default from now on. Signed-off-by: Petr Štetiar --- .../puma_rk3399/fit_spl_atf.sh| 20 +-- 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh b/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh index 420e7daf4ceb..b53cd5f3de30 100755 --- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh +++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh @@ -14,17 +14,25 @@ [ -z "$BL31" ] && BL31="bl31.bin" if [ ! -f $BL31 ]; then - echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 - echo "Please read Building section in doc/README.rockchip" >&2 - BL31=/dev/null + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + BL31=/dev/null + else + echo "ERROR: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 + echo "Please read Building section in doc/README.rockchip" >&2 + exit 1 + fi fi [ -z "$PMUM0" ] && PMUM0="rk3399m0.bin" if [ ! -f $PMUM0 ]; then - echo "WARNING: PMUM0 file $PMUM0 NOT found, resulting binary is non-functional" >&2 - echo "Please read Building section in doc/README.rockchip" >&2 - PMUM0=/dev/null + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + PMUM0=/dev/null + else + echo "ERROR: PMUM0 file $PMUM0 NOT found, resulting binary is non-functional" >&2 + echo "Please read Building section in doc/README.rockchip" >&2 + exit 1 + fi fi cat << __HEADER_EOF
[RFC PATCH 8/9] k3_fit_atf.sh: produce working binaries by default
At this moment unusable binaries are produced if either bl31.bin or bl32.bin files are missing in order to allow passing of various CI tests. This intention of broken binaries has to be now explicitly confirmed via new BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced by default from now on. Signed-off-by: Petr Štetiar --- tools/k3_fit_atf.sh | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/tools/k3_fit_atf.sh b/tools/k3_fit_atf.sh index 4e9f69c08789..8e342b46c97b 100755 --- a/tools/k3_fit_atf.sh +++ b/tools/k3_fit_atf.sh @@ -10,15 +10,23 @@ [ -z "$ATF" ] && ATF="bl31.bin" if [ ! -f $ATF ]; then - echo "WARNING ATF file $ATF NOT found, resulting binary is non-functional" >&2 - ATF=/dev/null + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + ATF=/dev/null + else + echo "ERROR: ATF file $ATF NOT found, resulting binary is non-functional" >&2 + exit 1 + fi fi [ -z "$TEE" ] && TEE="bl32.bin" if [ ! -f $TEE ]; then - echo "WARNING OPTEE file $TEE NOT found, resulting might be non-functional" >&2 - TEE=/dev/null + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then + TEE=/dev/null + else + echo "ERROR: OPTEE file $TEE NOT found, resulting might be non-functional" >&2 + exit 1 + fi fi if [ ! -z "$IS_HS" ]; then
Re: [PATCH] stm32mp: psci: set cntfrq register of cpu on
On 3/2/20 11:27 AM, Patrick Delaunay wrote:
> From: Ludovic Barre
>
> This path allows to set the cntfrq register of targeted cpu.
>
> Signed-off-by: Ludovic Barre
> Reviewed-by: Patrick DELAUNAY
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/psci.c | 22 ++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c
> index 1d91b2d324..3fb038d3e7 100644
> --- a/arch/arm/mach-stm32mp/psci.c
> +++ b/arch/arm/mach-stm32mp/psci.c
> @@ -30,6 +30,22 @@ u8 psci_state[STM32MP1_PSCI_NR_CPUS] __secure_data = {
>PSCI_AFFINITY_LEVEL_ON,
>PSCI_AFFINITY_LEVEL_OFF};
>
> +static u32 __secure_data cntfrq;
> +
> +static u32 __secure cp15_read_cntfrq(void)
> +{
> + u32 frq;
> +
> + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
> +
> + return frq;
> +}
> +
> +static void __secure cp15_write_cntfrq(u32 frq)
> +{
> + asm volatile ("mcr p15, 0, %0, c14, c0, 0" : : "r" (frq));
> +}
> +
> static inline void psci_set_state(int cpu, u8 state)
> {
> psci_state[cpu] = state;
> @@ -63,6 +79,9 @@ void __secure psci_arch_cpu_entry(void)
>
> psci_set_state(cpu, PSCI_AFFINITY_LEVEL_ON);
>
> + /* write the saved cntfrq */
> + cp15_write_cntfrq(cntfrq);
> +
> /* reset magic in TAMP register */
> writel(0x, TAMP_BACKUP_MAGIC_NUMBER);
> }
> @@ -130,6 +149,9 @@ s32 __secure psci_cpu_on(u32 function_id, u32 target_cpu,
> u32 pc,
> if (psci_state[cpu] == PSCI_AFFINITY_LEVEL_ON)
> return ARM_PSCI_RET_ALREADY_ON;
>
> + /* read and save cntfrq of current cpu to write on target cpu */
> + cntfrq = cp15_read_cntfrq();
> +
> /* reset magic in TAMP register */
> if (readl(TAMP_BACKUP_MAGIC_NUMBER))
> writel(0x, TAMP_BACKUP_MAGIC_NUMBER);
Acked-by: Patrice Chotard
Thanks
PAtrice
Re: [PATCH] stm32mp1: add 800 MHz profile support
On 2/26/20 11:26 AM, Patrick Delaunay wrote:
> The STM32MP1 series is available in 3 different lines which are pin-to-pin
> compatible:
> - STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
> 3D GPU, DSI display interface and CAN FD
> - STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
> and CAN FD
> - STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz
>
> Each line comes with a security option (cryptography & secure boot)
> & a Cortex-A frequency option :
>
> - A : Cortex-A7 @ 650 MHz
> - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
> - D : Cortex-A7 @ 800 MHz
> - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
>
> This patch adds the support of STM32MP15xD and STM32MP15xF in U-Boot.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cpu.c| 18 ++
> arch/arm/mach-stm32mp/fdt.c| 7 +++
> arch/arm/mach-stm32mp/include/mach/sys_proto.h | 8 +++-
> doc/board/st/stm32mp1.rst | 8
> 4 files changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
> index 9c5e0448ce..9aa5794334 100644
> --- a/arch/arm/mach-stm32mp/cpu.c
> +++ b/arch/arm/mach-stm32mp/cpu.c
> @@ -285,18 +285,36 @@ void get_soc_name(char name[SOC_NAME_SIZE])
>
> /* MPUs Part Numbers */
> switch (get_cpu_type()) {
> + case CPU_STM32MP157Fxx:
> + cpu_s = "157F";
> + break;
> + case CPU_STM32MP157Dxx:
> + cpu_s = "157D";
> + break;
> case CPU_STM32MP157Cxx:
> cpu_s = "157C";
> break;
> case CPU_STM32MP157Axx:
> cpu_s = "157A";
> break;
> + case CPU_STM32MP153Fxx:
> + cpu_s = "153F";
> + break;
> + case CPU_STM32MP153Dxx:
> + cpu_s = "153D";
> + break;
> case CPU_STM32MP153Cxx:
> cpu_s = "153C";
> break;
> case CPU_STM32MP153Axx:
> cpu_s = "153A";
> break;
> + case CPU_STM32MP151Fxx:
> + cpu_s = "151F";
> + break;
> + case CPU_STM32MP151Dxx:
> + cpu_s = "151D";
> + break;
> case CPU_STM32MP151Cxx:
> cpu_s = "151C";
> break;
> diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c
> index a3db86dc46..3ee7d6a833 100644
> --- a/arch/arm/mach-stm32mp/fdt.c
> +++ b/arch/arm/mach-stm32mp/fdt.c
> @@ -244,6 +244,8 @@ int ft_system_setup(void *blob, bd_t *bd)
> get_soc_name(name);
>
> switch (cpu) {
> + case CPU_STM32MP151Fxx:
> + case CPU_STM32MP151Dxx:
> case CPU_STM32MP151Cxx:
> case CPU_STM32MP151Axx:
> stm32_fdt_fixup_cpu(blob, name);
> @@ -251,6 +253,8 @@ int ft_system_setup(void *blob, bd_t *bd)
> soc = fdt_path_offset(blob, "/soc");
> stm32_fdt_disable(blob, soc, STM32_FDCAN_BASE, "can", name);
> /* fall through */
> + case CPU_STM32MP153Fxx:
> + case CPU_STM32MP153Dxx:
> case CPU_STM32MP153Cxx:
> case CPU_STM32MP153Axx:
> stm32_fdt_disable(blob, soc, STM32_GPU_BASE, "gpu", name);
> @@ -261,8 +265,11 @@ int ft_system_setup(void *blob, bd_t *bd)
> }
>
> switch (cpu) {
> + case CPU_STM32MP157Dxx:
> case CPU_STM32MP157Axx:
> + case CPU_STM32MP153Dxx:
> case CPU_STM32MP153Axx:
> + case CPU_STM32MP151Dxx:
> case CPU_STM32MP151Axx:
> stm32_fdt_disable(blob, soc, STM32_CRYP1_BASE, "cryp", name);
> stm32_fdt_disable(blob, soc, STM32_CRYP2_BASE, "cryp", name);
> diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> index 065b7b2856..1617126bea 100644
> --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> @@ -3,13 +3,19 @@
> * Copyright (C) 2015-2017, STMicroelectronics - All Rights Reserved
> */
>
> -/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit15:0)*/
> +/* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) */
> #define CPU_STM32MP157Cxx0x0500
> #define CPU_STM32MP157Axx0x0501
> #define CPU_STM32MP153Cxx0x0524
> #define CPU_STM32MP153Axx0x0525
> #define CPU_STM32MP151Cxx0x052E
> #define CPU_STM32MP151Axx0x052F
> +#define CPU_STM32MP157Fxx0x0580
> +#define CPU_STM32MP157Dxx0x0581
> +#define CPU_STM32MP153Fxx0x05A4
> +#define CPU_STM32MP153Dxx0x05A5
> +#define CPU_STM32MP151Fxx0x05AE
> +#define CPU_STM32MP151Dxx0x05AF
>
> /* return CPU_STMP32MP...Xxx constants */
> u32 get_cpu_type(void);
> diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
> index ee42af6579..b7a0fbfd03 100644
> ---
Re: [PATCH 03/10] arm: stm32mp: bsec: remove unneeded test
On 2/12/20 7:37 PM, Patrick Delaunay wrote: > Remove the test offs < 0 , as offs is unsigned. > > This patch solves the warnings when compiling with W=1 > on stm32mp1 board: > > In function ‘stm32mp_bsec_read’: > arch/arm/mach-stm32mp/bsec.c:368:11: warning: > comparison of unsigned expression < 0 is always false [-Wtype-limits] > 368 | if (offs < 0 || (offs % 4) || (size % 4)) > | ^ > In function ‘stm32mp_bsec_write’: > arch/arm/mach-stm32mp/bsec.c:405:11: warning: > comparison of unsigned expression < 0 is always false [-Wtype-limits] > 405 | if (offs < 0 || (offs % 4) || (size % 4)) > | ^ > > Signed-off-by: Patrick Delaunay > --- > > arch/arm/mach-stm32mp/bsec.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c > index a77c706a1a..1d904caae1 100644 > --- a/arch/arm/mach-stm32mp/bsec.c > +++ b/arch/arm/mach-stm32mp/bsec.c > @@ -365,7 +365,7 @@ static int stm32mp_bsec_read(struct udevice *dev, int > offset, > shadow = false; > } > > - if (offs < 0 || (offs % 4) || (size % 4)) > + if ((offs % 4) || (size % 4)) > return -EINVAL; > > otp = offs / sizeof(u32); > @@ -402,7 +402,7 @@ static int stm32mp_bsec_write(struct udevice *dev, int > offset, > shadow = false; > } > > - if (offs < 0 || (offs % 4) || (size % 4)) > + if ((offs % 4) || (size % 4)) > return -EINVAL; > > otp = offs / sizeof(u32); Acked-by: Patrice Chotard Thanks Patrice
Re: [Uboot-stm32] [PATCH 02/10] board: stm32mp1: read OTP in command stboard
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Read the value directly from the OTP and no more of the shadows
> to avoid the need of reboot after stboard command to have correct value.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/common/cmd_stboard.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
> index b740f4510e..c7ca773b1c 100644
> --- a/board/st/common/cmd_stboard.c
> +++ b/board/st/common/cmd_stboard.c
> @@ -58,7 +58,7 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int argc,
> DM_GET_DRIVER(stm32mp_bsec),
> );
>
> - ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
> + ret = misc_read(dev, STM32_BSEC_OTP(BSEC_OTP_BOARD),
> , sizeof(otp));
>
> if (ret < 0) {
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [Uboot-stm32] [PATCH 01/10] board: stm32mp1: update command stboard on misc_write result
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Update management of misc_write, which now return length of data
> after the commit 8729b1ae2cbd ("misc: Update read() and write()
> methods to return bytes xfered")
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/common/cmd_stboard.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
> index e994a88e71..b740f4510e 100644
> --- a/board/st/common/cmd_stboard.c
> +++ b/board/st/common/cmd_stboard.c
> @@ -125,7 +125,7 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int
> argc,
> ret = misc_write(dev, STM32_BSEC_OTP(BSEC_OTP_BOARD),
>, sizeof(otp));
>
> - if (ret) {
> + if (ret < 0) {
> puts("BOARD programming error\n");
> return CMD_RET_FAILURE;
> }
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 04/10] arm: stm32mp: bsec: add permanent lock support in bsec driver
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Add BSEC lock access (read / write) at 0xC000 offset of misc driver.
> The write access only available for Trusted boot mode, based on new
> SMC STM32_SMC_WRLOCK_OTP.
>
> With the fuse command, the permanent lock status is accessed with
> 0x1000 offset (0xC000 - 0x800 for OTP sense/program
> divided by u32 size), for example:
>
> Read lock status of fuse 57 (0x39)
>
> STM32MP> fuse sense 0 0x1039 1
>
> Sensing bank 0:
>
> Word 0x1039:
>
> Set permanent lock of fuse 57 (0x39)
>
> STM32MP> fuse prog 0 0x1039 1
>
> Sensing bank 0:
>
> Word 0x1039:
>
> WARNING: the OTP lock is updated only after reboot
>
> WARING: Programming lock or fuses is an irreversible operation!
> This may brick your system.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/bsec.c | 88 +--
> arch/arm/mach-stm32mp/cpu.c | 6 --
> arch/arm/mach-stm32mp/include/mach/stm32.h| 9 +-
> .../mach-stm32mp/include/mach/stm32mp1_smc.h | 1 +
> doc/board/st/stm32mp1.rst | 34 ---
> 5 files changed, 95 insertions(+), 43 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
> index 1d904caae1..3b923f088e 100644
> --- a/arch/arm/mach-stm32mp/bsec.c
> +++ b/arch/arm/mach-stm32mp/bsec.c
> @@ -12,8 +12,6 @@
> #include
>
> #define BSEC_OTP_MAX_VALUE 95
> -
> -#ifndef CONFIG_STM32MP1_TRUSTED
> #define BSEC_TIMEOUT_US 1
>
> /* BSEC REGISTER OFFSET (base relative) */
> @@ -24,9 +22,10 @@
> #define BSEC_OTP_LOCK_OFF0x010
> #define BSEC_DISTURBED_OFF 0x01C
> #define BSEC_ERROR_OFF 0x034
> -#define BSEC_SPLOCK_OFF 0x064 /* Program safmem sticky
> lock */
> -#define BSEC_SWLOCK_OFF 0x07C /* write in OTP sticky
> lock */
> -#define BSEC_SRLOCK_OFF 0x094 /* shadowing sticky lock
> */
> +#define BSEC_WRLOCK_OFF 0x04C /* OTP write permananet
> lock */
> +#define BSEC_SPLOCK_OFF 0x064 /* OTP write sticky lock
> */
> +#define BSEC_SWLOCK_OFF 0x07C /* shadow write sticky
> lock */
> +#define BSEC_SRLOCK_OFF 0x094 /* shadow read sticky
> lock */
> #define BSEC_OTP_DATA_OFF0x200
>
> /* BSEC_CONFIGURATION Register MASK */
> @@ -53,12 +52,12 @@
> #define BSEC_LOCK_PROGRAM0x04
>
> /**
> - * bsec_check_error() - Check status of one otp
> - * @base: base address of bsec IP
> + * bsec_lock() - manage lock for each type SR/SP/SW
> + * @address: address of bsec IP register
> * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
> - * Return: 0 if no error, -EAGAIN or -ENOTSUPP
> + * Return: true if locked else false
> */
> -static u32 bsec_check_error(u32 base, u32 otp)
> +static bool bsec_read_lock(u32 address, u32 otp)
> {
> u32 bit;
> u32 bank;
> @@ -66,21 +65,17 @@ static u32 bsec_check_error(u32 base, u32 otp)
> bit = 1 << (otp & OTP_LOCK_MASK);
> bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
>
> - if (readl(base + BSEC_DISTURBED_OFF + bank) & bit)
> - return -EAGAIN;
> - else if (readl(base + BSEC_ERROR_OFF + bank) & bit)
> - return -ENOTSUPP;
> -
> - return 0;
> + return !!(readl(address + bank) & bit);
> }
>
> +#ifndef CONFIG_STM32MP1_TRUSTED
> /**
> - * bsec_lock() - manage lock for each type SR/SP/SW
> - * @address: address of bsec IP register
> + * bsec_check_error() - Check status of one otp
> + * @base: base address of bsec IP
> * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
> - * Return: true if locked else false
> + * Return: 0 if no error, -EAGAIN or -ENOTSUPP
> */
> -static bool bsec_read_lock(u32 address, u32 otp)
> +static u32 bsec_check_error(u32 base, u32 otp)
> {
> u32 bit;
> u32 bank;
> @@ -88,7 +83,12 @@ static bool bsec_read_lock(u32 address, u32 otp)
> bit = 1 << (otp & OTP_LOCK_MASK);
> bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
>
> - return !!(readl(address + bank) & bit);
> + if (readl(base + BSEC_DISTURBED_OFF + bank) & bit)
> + return -EAGAIN;
> + else if (readl(base + BSEC_ERROR_OFF + bank) & bit)
> + return -ENOTSUPP;
> +
> + return 0;
> }
>
> /**
> @@ -324,6 +324,16 @@ static int stm32mp_bsec_read_shadow(struct udevice *dev,
> u32 *val, u32 otp)
> #endif
> }
>
> +static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp)
> +{
> + struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev);
> +
> + /* return OTP permanent write lock status */
> + *val = bsec_read_lock(plat->base + BSEC_WRLOCK_OFF, otp);
> +
> + return 0;
> +}
> +
> static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp)
Re: [RFC PATCH 3/9] mksunxi_fit_atf.sh: produce working binaries by default
Hi, On Wed, 2020-03-18 at 10:57 +0100, Petr Štetiar wrote: > At this moment unusable binaries are produced if bl31.bin file is > missing in order to allow passing of various CI tests. This intention of > broken binaries has to be now explicitly confirmed via new > BUILDBOT_BROKEN_BINARIES config option, so usable binaries are produced > by default from now on. > > Signed-off-by: Petr Štetiar > --- > board/sunxi/mksunxi_fit_atf.sh | 10 +++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/board/sunxi/mksunxi_fit_atf.sh b/board/sunxi/mksunxi_fit_atf.sh > index 88ad71974706..708b4248549d 100755 > --- a/board/sunxi/mksunxi_fit_atf.sh > +++ b/board/sunxi/mksunxi_fit_atf.sh > @@ -8,9 +8,13 @@ > [ -z "$BL31" ] && BL31="bl31.bin" > > if [ ! -f $BL31 ]; then > - echo "WARNING: BL31 file $BL31 NOT found, resulting binary is > non-functional" >&2 > - echo "Please read the section on ARM Trusted Firmware (ATF) in > board/sunxi/README.sunxi64" >&2 > - BL31=/dev/null > + if [ "$BUILDBOT_BROKEN_BINARIES" = "y" ]; then > + BL31=/dev/null > + else > + echo "ERROR: BL31 file $BL31 NOT found, resulting binary is > non-functional" >&2 This error message is not quite correct anymore because no binary is built now. > + echo "Please read the section on ARM Trusted Firmware (ATF) in > board/sunxi/README.sunxi64" >&2 Not only relevant to this patch, but to the following ones as well: Maybe it makes sense to mention CONFIG_BUILDBOT_BROKEN_BINARIES in the error message so people who are not aware of this change and want to continue building broken binaries don't have to search the list archive to find out what to do? For example: + echo "ERROR: BL31 file $BL31 NOT found." >&2 + echo "Please read the section on ARM Trusted Firmware (ATF) in board/sunxi/README.sunxi64" >&2 + echo "" >&2 + echo "If you want to build without a BL31 file (creating a NON-FUNCTIONAL binary), please" >&2 + echo "enable CONFIG_BUILDBOT_BROKEN_BINARIES." >&2 > + exit 1 > + fi > fi > > if grep -q "^CONFIG_MACH_SUN50I_H6=y" .config; then -- Harald
Re: [Uboot-stm32] [PATCH 05/10] board: stm32mp1: stboard: lock the OTP after programming
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Lock the OTP used for board identification for the ST boards after
> programming.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/common/cmd_stboard.c | 21 -
> 1 file changed, 20 insertions(+), 1 deletion(-)
>
> diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
> index c7ca773b1c..1573e35410 100644
> --- a/board/st/common/cmd_stboard.c
> +++ b/board/st/common/cmd_stboard.c
> @@ -42,7 +42,7 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int argc,
> char * const argv[])
> {
> int ret;
> - u32 otp;
> + u32 otp, lock;
> u8 revision;
> unsigned long board, variant, bom;
> struct udevice *dev;
> @@ -66,11 +66,20 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int
> argc,
> return CMD_RET_FAILURE;
> }
>
> + ret = misc_read(dev, STM32_BSEC_LOCK(BSEC_OTP_BOARD),
> + , sizeof(lock));
> + if (ret < 0) {
> + puts("LOCK read error");
> + return CMD_RET_FAILURE;
> + }
> +
> if (argc == 0) {
> if (!otp)
> puts("Board : OTP board FREE\n");
> else
> display_stboard(otp);
> + printf(" OTP %d %s locked !\n", BSEC_OTP_BOARD,
> +lock == 1 ? "" : "NOT");
> return CMD_RET_SUCCESS;
> }
>
> @@ -129,6 +138,16 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int
> argc,
> puts("BOARD programming error\n");
> return CMD_RET_FAILURE;
> }
> +
> + /* write persistent lock */
> + otp = 1;
> + ret = misc_write(dev, STM32_BSEC_LOCK(BSEC_OTP_BOARD),
> + , sizeof(otp));
> + if (ret < 0) {
> + puts("BOARD lock error\n");
> + return CMD_RET_FAILURE;
> + }
> +
> puts("BOARD programming done\n");
>
> return CMD_RET_SUCCESS;
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 06/10] arm: stm32mp: improve the error message for smc
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Add the SMC code and operation for trace on errors.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h
> b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h
> index 7b9167c356..4ad14f963b 100644
> --- a/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h
> +++ b/arch/arm/mach-stm32mp/include/mach/stm32mp1_smc.h
> @@ -46,8 +46,8 @@ static inline u32 stm32_smc(u32 svc, u8 op, u32 data1, u32
> data2, u32 *result)
> arm_smccc_smc(svc, op, data1, data2, 0, 0, 0, 0, );
>
> if (res.a0) {
> - pr_err("%s: Failed to exec in secure mode (err = %ld)\n",
> -__func__, res.a0);
> + pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err =
> %ld)\n",
> +__func__, svc, op, res.a0);
> return -EINVAL;
> }
> if (result)
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [Uboot-stm32] [PATCH 07/10] board: stm32mp1: add finished good in board identifier OTP
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Update the command stboard to support the coding of OTP 59 with
> finished good:
>
> bit [31:16] (hex) => MB
> bit [15:12] (dec) => Variant CPN (115)
> bit [11:8] (dec) => Revision board (index with A = 1, Z = 26)
> bit [7:4] (dec) => Variant FG : finished good (NEW)
> bit [3:0] (dec) => BOM (01, 255)
>
> the command is:
> stboard [-y]
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/common/cmd_stboard.c | 31 ---
> board/st/stm32mp1/stm32mp1.c | 3 ++-
> 2 files changed, 22 insertions(+), 12 deletions(-)
>
> diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
> index 1573e35410..3ead1edecd 100644
> --- a/board/st/common/cmd_stboard.c
> +++ b/board/st/common/cmd_stboard.c
> @@ -31,9 +31,10 @@ static bool check_stboard(u16 board)
>
> static void display_stboard(u32 otp)
> {
> - printf("Board: MB%04x Var%d Rev.%c-%02d\n",
> + printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
> otp >> 16,
> (otp >> 12) & 0xF,
> +(otp >> 4) & 0xF,
> ((otp >> 8) & 0xF) - 1 + 'A',
> otp & 0xF);
> }
> @@ -44,14 +45,14 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int
> argc,
> int ret;
> u32 otp, lock;
> u8 revision;
> - unsigned long board, variant, bom;
> + unsigned long board, var_cpn, var_fg, bom;
> struct udevice *dev;
> - int confirmed = argc == 6 && !strcmp(argv[1], "-y");
> + int confirmed = argc == 7 && !strcmp(argv[1], "-y");
>
> argc -= 1 + confirmed;
> argv += 1 + confirmed;
>
> - if (argc != 0 && argc != 4)
> + if (argc != 0 && argc != 5)
> return CMD_RET_USAGE;
>
> ret = uclass_get_device_by_driver(UCLASS_MISC,
> @@ -95,8 +96,8 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int argc,
> return CMD_RET_USAGE;
> }
>
> - if (strict_strtoul(argv[1], 10, ) < 0 ||
> - variant == 0 || variant > 15) {
> + if (strict_strtoul(argv[1], 10, _cpn) < 0 ||
> + var_cpn == 0 || var_cpn > 15) {
> printf("argument %d invalid: %s\n", 2, argv[1]);
> return CMD_RET_USAGE;
> }
> @@ -107,13 +108,20 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int
> argc,
> return CMD_RET_USAGE;
> }
>
> - if (strict_strtoul(argv[3], 10, ) < 0 ||
> + if (strict_strtoul(argv[3], 10, _fg) < 0 ||
> + var_fg > 15) {
> + printf("argument %d invalid: %s\n", 4, argv[3]);
> + return CMD_RET_USAGE;
> + }
> +
> + if (strict_strtoul(argv[4], 10, ) < 0 ||
> bom == 0 || bom > 15) {
> printf("argument %d invalid: %s\n", 4, argv[3]);
> return CMD_RET_USAGE;
> }
>
> - otp = (board << 16) | (variant << 12) | (revision << 8) | bom;
> + otp = (board << 16) | (var_cpn << 12) | (revision << 8) |
> + (var_fg << 4) | bom;
> display_stboard(otp);
> printf("=> OTP[%d] = %08X\n", BSEC_OTP_BOARD, otp);
>
> @@ -153,15 +161,16 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int
> argc,
> return CMD_RET_SUCCESS;
> }
>
> -U_BOOT_CMD(stboard, 6, 0, do_stboard,
> +U_BOOT_CMD(stboard, 7, 0, do_stboard,
> "read/write board reference in OTP",
> "\n"
> " Print current board information\n"
> -"stboard [-y]\n"
> +"stboard [-y] \n"
> " Write board information\n"
> " - Board: , example 1264 for MB1264\n"
> -" - Variant: 1 ... 15\n"
> +" - VarCPN: 1...15\n"
> " - Revision: A...O\n"
> +" - VarFG: 0...15\n"
> " - BOM: 1...15\n");
>
> #endif
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index e82a43074f..76399e2d62 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -109,9 +109,10 @@ int checkboard(void)
> ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
> , sizeof(otp));
> if (ret > 0 && otp) {
> - printf("Board: MB%04x Var%d Rev.%c-%02d\n",
> + printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
> otp >> 16,
> (otp >> 12) & 0xF,
> +(otp >> 4) & 0xF,
> ((otp >> 8) & 0xF) - 1 + 'A',
> otp & 0xF);
> }
Acked-by: Patrice Chotard
Thanks
Patrice
Pull request: u-boot-sunxi/master
Hi Tom, Please pull this PR. thanks, Jagan. The following changes since commit a4df9d8ab848ea4ff10b247ae435b0a14bbbd066: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-03-16 12:33:24 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi master for you to fetch changes up to 3586cb82277e8af9eae38b354bb8b2aee38ee377: Revert "sunxi: psci: avoid error address-of-packed-member" (2020-03-18 15:37:08 +0530) Tomasz Duszynski (1): Revert "sunxi: psci: avoid error address-of-packed-member" arch/arm/cpu/armv7/sunxi/psci.c | 16 +--- 1 file changed, 5 insertions(+), 11 deletions(-)
Re: [Uboot-stm32] [PATCH 08/10] board: stm32mp1: display reference only for STMicroelectronics board
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Display the reference MB found in OTP49
> only for STMicroelectronics boards when CONFIG_CMD_STBOARD
> is activated.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/stm32mp1/stm32mp1.c | 27 ++-
> 1 file changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index 76399e2d62..463248bcd7 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -101,20 +101,21 @@ int checkboard(void)
> printf(" (%s)", fdt_compat);
> puts("\n");
>
> - ret = uclass_get_device_by_driver(UCLASS_MISC,
> - DM_GET_DRIVER(stm32mp_bsec),
> - );
> + if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
> + ret = uclass_get_device_by_driver(UCLASS_MISC,
> + DM_GET_DRIVER(stm32mp_bsec),
> + );
>
> - if (!ret)
> - ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
> - , sizeof(otp));
> - if (ret > 0 && otp) {
> - printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
> -otp >> 16,
> -(otp >> 12) & 0xF,
> -(otp >> 4) & 0xF,
> -((otp >> 8) & 0xF) - 1 + 'A',
> -otp & 0xF);
> + if (!ret)
> + ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
> + , sizeof(otp));
> + if (ret > 0 && otp)
> + printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
> +otp >> 16,
> +(otp >> 12) & 0xF,
> +(otp >> 4) & 0xF,
> +((otp >> 8) & 0xF) - 1 + 'A',
> +otp & 0xF);
> }
>
> return 0;
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 09/10] arm: stm32mp: add function get_soc_name
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Add a function get_soc_name to get a string with the full name
> of the SOC "STM32MP15xxx Rev.x"
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/cpu.c| 14 +++---
> arch/arm/mach-stm32mp/include/mach/sys_proto.h | 4
> 2 files changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
> index 5febed735c..9c5e0448ce 100644
> --- a/arch/arm/mach-stm32mp/cpu.c
> +++ b/arch/arm/mach-stm32mp/cpu.c
> @@ -279,8 +279,7 @@ u32 get_cpu_package(void)
> return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
> }
>
> -#if defined(CONFIG_DISPLAY_CPUINFO)
> -int print_cpuinfo(void)
> +void get_soc_name(char name[SOC_NAME_SIZE])
> {
> char *cpu_s, *cpu_r, *pkg;
>
> @@ -344,7 +343,16 @@ int print_cpuinfo(void)
> break;
> }
>
> - printf("CPU: STM32MP%s%s Rev.%s\n", cpu_s, pkg, cpu_r);
> + snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", cpu_s, pkg, cpu_r);
> +}
> +
> +#if defined(CONFIG_DISPLAY_CPUINFO)
> +int print_cpuinfo(void)
> +{
> + char name[SOC_NAME_SIZE];
> +
> + get_soc_name(name);
> + printf("CPU: %s\n", name);
>
> return 0;
> }
> diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> index da46c11573..065b7b2856 100644
> --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> @@ -29,6 +29,10 @@ u32 get_cpu_package(void);
> #define PKG_AC_TFBGA361 2
> #define PKG_AD_TFBGA257 1
>
> +/* Get SOC name */
> +#define SOC_NAME_SIZE 20
> +void get_soc_name(char name[SOC_NAME_SIZE]);
> +
> /* return boot mode */
> u32 get_bootmode(void);
>
Acked-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 10/10] arm: stm32mp: fdt: update kernel device tree according the part number
On 2/12/20 7:37 PM, Patrick Delaunay wrote:
> Update the kernel device tree for STM32MP15x product lines according
> the used soc and its part number, when CONFIG_OF_SYSTEM_SETUP is activated:
> - STM32MP15XA hasn't Crypto (cryp1/2)
> - STM32M151 and STM32M153 hasn't 3D GPU and DSI host
> - STM32M151 hasn't CAN FD and has single A7
>
> For example:
>
> FDT: cpu 1 node remove for STM32MP151AAA Rev.B
> FDT: can@4400e000 node disabled for STM32MP151AAA Rev.B
> FDT: gpu@5900 node disabled for STM32MP151AAA Rev.B
> FDT: dsi@5a00 node disabled for STM32MP151AAA Rev.B
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/fdt.c | 100 +++-
> 1 file changed, 88 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c
> index 82c430b7c7..a3db86dc46 100644
> --- a/arch/arm/mach-stm32mp/fdt.c
> +++ b/arch/arm/mach-stm32mp/fdt.c
> @@ -23,6 +23,12 @@
>
> #define ETZPC_RESERVED 0x
>
> +#define STM32_FDCAN_BASE 0x4400e000
> +#define STM32_CRYP2_BASE 0x4c005000
> +#define STM32_CRYP1_BASE 0x54001000
> +#define STM32_GPU_BASE 0x5900
> +#define STM32_DSI_BASE 0x5a00
> +
> static const u32 stm32mp1_ip_addr[] = {
> 0x5c008000, /* 00 stgenc */
> 0x5400, /* 01 bkpsram */
> @@ -33,7 +39,7 @@ static const u32 stm32mp1_ip_addr[] = {
> ETZPC_RESERVED, /* 06 reserved */
> 0x54003000, /* 07 rng1 */
> 0x54002000, /* 08 hash1 */
> - 0x54001000, /* 09 cryp1 */
> + STM32_CRYP1_BASE, /* 09 cryp1 */
> 0x5a003000, /* 0A ddrctrl */
> 0x5a004000, /* 0B ddrphyc */
> 0x5c009000, /* 0C i2c6 */
> @@ -86,7 +92,7 @@ static const u32 stm32mp1_ip_addr[] = {
> 0x4400b000, /* 3B sai2 */
> 0x4400c000, /* 3C sai3 */
> 0x4400d000, /* 3D dfsdm */
> - 0x4400e000, /* 3E tt_fdcan */
> + STM32_FDCAN_BASE, /* 3E tt_fdcan */
> ETZPC_RESERVED, /* 3F reserved */
> 0x50021000, /* 40 lptim2 */
> 0x50022000, /* 41 lptim3 */
> @@ -99,7 +105,7 @@ static const u32 stm32mp1_ip_addr[] = {
> 0x48003000, /* 48 adc */
> 0x4c002000, /* 49 hash2 */
> 0x4c003000, /* 4A rng2 */
> - 0x4c005000, /* 4B cryp2 */
> + STM32_CRYP2_BASE, /* 4B cryp2 */
> ETZPC_RESERVED, /* 4C reserved */
> ETZPC_RESERVED, /* 4D reserved */
> ETZPC_RESERVED, /* 4E reserved */
> @@ -126,11 +132,13 @@ static const u32 stm32mp1_ip_addr[] = {
> static bool fdt_disable_subnode_by_address(void *fdt, int offset, u32 addr)
> {
> int node;
> + fdt_addr_t regs;
>
> for (node = fdt_first_subnode(fdt, offset);
>node >= 0;
>node = fdt_next_subnode(fdt, node)) {
> - if (addr == (u32)fdt_getprop(fdt, node, "reg", 0)) {
> + regs = fdtdec_get_addr(fdt, node, "reg");
> + if (addr == regs) {
> if (fdtdec_get_is_enabled(fdt, node)) {
> fdt_status_disabled(fdt, node);
>
> @@ -143,11 +151,11 @@ static bool fdt_disable_subnode_by_address(void *fdt,
> int offset, u32 addr)
> return false;
> }
>
> -static int stm32_fdt_fixup_etzpc(void *fdt)
> +static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node)
> {
> const u32 *array;
> int array_size, i;
> - int soc_node, offset, shift;
> + int offset, shift;
> u32 addr, status, decprot[ETZPC_DECPROT_NB];
>
> array = stm32mp1_ip_addr;
> @@ -156,10 +164,6 @@ static int stm32_fdt_fixup_etzpc(void *fdt)
> for (i = 0; i < ETZPC_DECPROT_NB; i++)
> decprot[i] = readl(ETZPC_DECPROT(i));
>
> - soc_node = fdt_path_offset(fdt, "/soc");
> - if (soc_node < 0)
> - return soc_node;
> -
> for (i = 0; i < array_size; i++) {
> offset = i / NB_PROT_PER_REG;
> shift = (i % NB_PROT_PER_REG) * DECPROT_NB_BITS;
> @@ -180,6 +184,40 @@ static int stm32_fdt_fixup_etzpc(void *fdt)
> return 0;
> }
>
> +/* deactivate all the cpu except core 0 */
> +static void stm32_fdt_fixup_cpu(void *blob, char *name)
> +{
> + int off;
> + u32 reg;
> +
> + off = fdt_path_offset(blob, "/cpus");
> + if (off < 0) {
> + printf("%s: couldn't find /cpus node\n", __func__);
> + return;
> + }
> +
> + off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
> + while (off != -FDT_ERR_NOTFOUND) {
> + reg = fdtdec_get_addr(blob, off, "reg");
> + if (reg != 0) {
> + fdt_del_node(blob, off);
> + printf("FDT: cpu %d node remove for %s\n", reg, name);
> + /* after delete we can't trust the offsets anymore */
> + off = -1;
> + }
> + off = fdt_node_offset_by_prop_value(blob, off,
> +
Re: [PATCH v3 2/4] arm: sunxi: add a config option to fixup a Bluetooth address
On Tue, Jan 21, 2020 at 4:35 PM Ondřej Jirman wrote: > > On Tue, Jan 21, 2020 at 01:12:47PM +0530, Jagan Teki wrote: > > On Tue, Dec 3, 2019 at 2:15 PM Andre Heider wrote: > > > > > > Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3, > > > ship with the controller default address. > > > > > > Add a config option to fix it up so it can function properly. > > > > You mean that the default factory address can't make functioning? also > > does it affect the boot process? > > Yes. With the default address, bluetooth functionality is disabled in the > controller, unless some other address is set. What about adding u-boot property instead of CONFIG macro. it would be easy to add it on board spec -u-boot.dtsi.
RE: [Patch v3 1/2] configs: ls2080ardb: Make MC_INIT access flash memory as per spi-mem
>-Original Message- >From: U-Boot On Behalf Of Kuldeep Singh >Sent: Wednesday, March 18, 2020 11:57 AM >To: Priyanka Jain ; u-boot@lists.denx.de >Cc: Kuldeep Singh >Subject: [Patch v3 1/2] configs: ls2080ardb: Make MC_INIT access flash >memory as per spi-mem > >MC_INIT command currently access spi-nor flash memory directly. As per spi- >mem framework, flash memory access via absolute addresses is no more >possible. Use flash APIs to access memory instead of directly using it. > >Signed-off-by: Kuldeep Singh >--- >v3: >-Use complete MC size, 1M works but MC has 3M assigned space. >-Rebase to top > >v2: >-Rebase to top >-reword commit message > > include/configs/ls2080ardb.h | 28 ++-- > 1 file changed, 18 insertions(+), 10 deletions(-) > >diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index >c1819d2..d36e928 100644 >--- a/include/configs/ls2080ardb.h >+++ b/include/configs/ls2080ardb.h >@@ -321,11 +321,15 @@ unsigned long get_board_sys_clk(void); #include > > > #ifdef CONFIG_TFABOOT >-#define QSPI_MC_INIT_CMD \ >- "env exists secureboot && " \ >- "esbc_validate 0x2064 && " \ >- "esbc_validate 0x2068;" \ >- "fsl_mc start mc 0x20a0 0x20e0 \0" >+#define QSPI_MC_INIT_CMD \ >+ "sf probe 0:0; "\ >+ "sf read 0x8064 0x64 0x8; " \ >+ "env exists secureboot && " \ >+ "esbc_validate 0x8064 && " \ >+ "esbc_validate 0x8068; "\ >+ "sf read 0x80a0 0xa0 0x30; "\ >+ "sf read 0x80e0 0xe0 0x10; "\ >+ "fsl_mc start mc 0x80a0 0x80e0 \0" > #define SD_MC_INIT_CMD\ > "mmcinfo;mmc read 0x80a0 0x5000 0x1200;" \ > "mmc read 0x80e0 0x7000 0x800;" \ >@@ -342,11 +346,15 @@ unsigned long get_board_sys_clk(void); > "fsl_mc start mc 0x580a0 0x580e0 \0" > #else > #ifdef CONFIG_QSPI_BOOT >-#define MC_INIT_CMD \ >- "mcinitcmd=env exists secureboot && " \ >- "esbc_validate 0x2064 && " \ >- "esbc_validate 0x2068;" \ >- "fsl_mc start mc 0x20a0 0x20e0 \0" >+#define MC_INIT_CMD \ >+ "mcinitcmd=sf probe 0:0; " \ >+ "sf read 0x8064 0x64 0x8; " \ >+ "env exists secureboot && " \ >+ "esbc_validate 0x8064 && " \ >+ "esbc_validate 0x8068; "\ >+ "sf read 0x80a0 0xa0 0x30; "\ >+ "sf read 0x80e0 0xe0 0x10; "\ >+ "fsl_mc start mc 0x80a0 0x80e0 \0" > #elif defined(CONFIG_SD_BOOT) > #define MC_INIT_CMD \ > "mcinitcmd=mmcinfo;mmc read 0x8000 0x5000 0x800;" \ >-- >2.7.4 Please confirm if you tested this change for both secure and non-secure boot Regards Priyanka
RE: [Patch v3 2/2] configs: ls2080ardb: Make BOOT command access flash memory as per spi-mem
>-Original Message- >From: U-Boot On Behalf Of Kuldeep Singh >Sent: Wednesday, March 18, 2020 11:57 AM >To: Priyanka Jain ; u-boot@lists.denx.de >Cc: Kuldeep Singh >Subject: [Patch v3 2/2] configs: ls2080ardb: Make BOOT command access flash >memory as per spi-mem > >BOOT command currently access spi-nor flash memory directly. As per spi- >mem framework, flash memory access via absolute addresses is no more >possible. >Use flash APIs to access memory instead of directly using it. > >Signed-off-by: Kuldeep Singh >--- >v3: >-Rebase > >v2: >-Rebase to top >-Reword commit message > > include/configs/ls2080ardb.h | 14 ++ > 1 file changed, 10 insertions(+), 4 deletions(-) > >diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index >d36e928..b8e5dd3 100644 >--- a/include/configs/ls2080ardb.h >+++ b/include/configs/ls2080ardb.h >@@ -508,10 +508,13 @@ unsigned long get_board_sys_clk(void); > > #ifdef CONFIG_TFABOOT > #define QSPI_NOR_BOOTCOMMAND > \ >+ "sf probe 0:0; "\ >+ "sf read 0x806c 0x6c 0x4; " > \ > "env exists mcinitcmd && env exists secureboot "\ >- "&& esbc_validate 0x206C; " > \ >+ "&& esbc_validate 0x806c; " > \ >+ "sf read 0x80d0 0xd0 0x10; "\ > "env exists mcinitcmd && " \ >- "fsl_mc lazyapply dpl 0x20d0; " \ >+ "fsl_mc lazyapply dpl 0x80d0; " \ > "run distro_bootcmd;run qspi_bootcmd; " > \ > "env exists secureboot && esbc_halt;" > >@@ -538,10 +541,13 @@ unsigned long get_board_sys_clk(void); #ifdef >CONFIG_QSPI_BOOT > /* Try to boot an on-QSPI kernel first, then do normal distro boot */ > #define CONFIG_BOOTCOMMAND > \ >+ "sf probe 0:0; "\ >+ "sf read 0x806c 0x6c 0x4; " > \ > "env exists mcinitcmd && env exists secureboot "\ >- "&& esbc_validate 0x206C; " > \ >+ "&& esbc_validate 0x806C; " > \ >+ "sf read 0x80d0 0xd0 0x10; "\ > "env exists mcinitcmd && " \ >- "fsl_mc lazyapply dpl 0x20d0; " \ >+ "fsl_mc lazyapply dpl 0x80d0; " \ > "run distro_bootcmd;run qspi_bootcmd; " > \ > "env exists secureboot && esbc_halt;" > #elif defined(CONFIG_SD_BOOT) >-- >2.7.4 Same comment as previous, please provide testing status for both secure and non-secure boot Regards Priyanka
RE: [v2, PATCH] include/configs: ls1012afrwy: support dhcp boot
>-Original Message- >From: U-Boot On Behalf Of Biwen Li >Sent: Wednesday, March 18, 2020 11:10 AM >To: Jagdish Gediya ; Priyanka Jain >; Pramod Kumar >Cc: Alison Wang ; u-boot@lists.denx.de; Jiafei Pan >; Biwen Li >Subject: [v2, PATCH] include/configs: ls1012afrwy: support dhcp boot > >This supports dhcp boot for ls1012afrwy please update description to something like "Add support of dhcp boot for ls1012afrwy" > >Signed-off-by: Biwen Li >--- >Change in v2: > - update subject > - recover original macro > - add dhcp boot > > include/configs/ls1012afrwy.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > >diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h >index dde4369c97..5fc00a9d93 100644 >--- a/include/configs/ls1012afrwy.h >+++ b/include/configs/ls1012afrwy.h >@@ -30,7 +30,8 @@ > #undef BOOT_TARGET_DEVICES > #define BOOT_TARGET_DEVICES(func) \ > func(MMC, mmc, 0) \ >- func(USB, usb, 0) >+ func(USB, usb, 0) \ >+ func(DHCP, dhcp, na) > #endif > > #undef FSL_QSPI_FLASH_SIZE >-- >2.17.1 Regards Priyanka
RE: [PATCH] include/configs: ls1012afrwy: delete duplicate environment variable BOOT_TARGET_DEVICES
>-Original Message- >From: U-Boot On Behalf Of Biwen Li >Sent: Wednesday, March 18, 2020 9:12 AM >To: Jagdish Gediya ; Priyanka Jain >; Pramod Kumar >Cc: Alison Wang ; u-boot@lists.denx.de; Jiafei Pan >; Biwen Li >Subject: [PATCH] include/configs: ls1012afrwy: delete duplicate environment >variable BOOT_TARGET_DEVICES Please trim subject to <= 70char > >The BOOT_TARGET_DEVICES has defined in >include/configs/ls1012a_common.h, so delete duplicate environment variable >for ls1012afrwy > >Signed-off-by: Biwen Li >--- > include/configs/ls1012afrwy.h | 7 --- > 1 file changed, 7 deletions(-) > >diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h >index dde4369c97..fc68fb196c 100644 >--- a/include/configs/ls1012afrwy.h >+++ b/include/configs/ls1012afrwy.h >@@ -26,13 +26,6 @@ > /* ENV */ > #define CONFIG_SYS_FSL_QSPI_BASE 0x4000 > >-#ifndef CONFIG_SPL_BUILD >-#undef BOOT_TARGET_DEVICES >-#define BOOT_TARGET_DEVICES(func) \ >- func(MMC, mmc, 0) \ >- func(USB, usb, 0) >-#endif >- > #undef FSL_QSPI_FLASH_SIZE > #define FSL_QSPI_FLASH_SIZESZ_16M > >-- >2.17.1 Priyanka
RE: [v2, PATCH] include/configs: ls1012aqds: add default environment variable
>-Original Message-
>From: U-Boot On Behalf Of Biwen Li
>Sent: Monday, March 16, 2020 7:12 PM
>To: Jagdish Gediya ; Priyanka Jain
>; Shengzhou Liu
>Cc: Alison Wang ; u-boot@lists.denx.de; Biwen Li
>
>Subject: [v2, PATCH] include/configs: ls1012aqds: add default environment
>variable
>
>This adds default environment variable for ls1012aqds
>
>Signed-off-by: Biwen Li
>---
>Change in v2:
> - delete environment variable installer
>
> include/configs/ls1012aqds.h | 64
> 1 file changed, 64 insertions(+)
>
>diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index
>fb0d1ba6b2..063d1a8ac7 100644
>--- a/include/configs/ls1012aqds.h
>+++ b/include/configs/ls1012aqds.h
>@@ -110,5 +110,69 @@
> #define CONFIG_SYS_MEMTEST_START 0x8000
> #define CONFIG_SYS_MEMTEST_END0x9fff
>
>+#undef CONFIG_EXTRA_ENV_SETTINGS
>+#define CONFIG_EXTRA_ENV_SETTINGS \
>+ "verify=no\0" \
>+ "fdt_high=0x\0" \
>+ "initrd_high=0x\0" \
>+ "fdt_addr=0x00f0\0" \
>+ "kernel_addr=0x0100\0" \
>+ "kernelheader_addr=0x60\0" \
>+ "scriptaddr=0x8000\0" \
>+ "scripthdraddr=0x8008\0"\
>+ "fdtheader_addr_r=0x8010\0" \
>+ "kernelheader_addr_r=0x8020\0" \
>+ "kernel_addr_r=0x9600\0"\
>+ "fdt_addr_r=0x9000\0" \
>+ "load_addr=0xa000\0"\
>+ "kernel_size=0x280\0" \
>+ "kernelheader_size=0x4\0" \
>+ "console=ttyS0,115200\0"\
>+ BOOTENV \
>+ "boot_scripts=ls1012aqds_boot.scr\0"\
>+ "boot_script_hdr=hdr_ls1012aqds_bs.out\0" \
>+ "scan_dev_for_boot_part=" \
>+ "part list ${devtype} ${devnum} devplist; "\
>+ "env exists devplist || setenv devplist 1; " \
>+ "for distro_bootpart in ${devplist}; do " \
>+"if fstype ${devtype} " \
>+"${devnum}:${distro_bootpart} " \
>+"bootfstype; then " \
>+"run scan_dev_for_boot; " \
>+"fi; "\
>+"done\0" \
>+ "scan_dev_for_boot=" \
>+ "echo Scanning ${devtype} " \
>+ "${devnum}:${distro_bootpart}...; " \
>+ "for prefix in ${boot_prefixes}; do " \
>+ "run scan_dev_for_scripts; " \
>+ "done;" \
>+ "\0" \
>+ "boot_a_script=" \
>+ "load ${devtype} ${devnum}:${distro_bootpart} " \
>+ "${scriptaddr} ${prefix}${script}; "\
>+ "env exists secureboot && load ${devtype} " \
>+ "${devnum}:${distro_bootpart} " \
>+ "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
>+ "env exists secureboot "\
>+ "&& esbc_validate ${scripthdraddr};"\
>+ "source ${scriptaddr}\0" \
>+ "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \
>+ "sf probe 0:0 && sf read $load_addr " \
>+ "$kernel_addr $kernel_size; env exists secureboot " \
>+ "&& sf read $kernelheader_addr_r $kernelheader_addr "
> \
>+ "$kernelheader_size && esbc_validate
>${kernelheader_addr_r}; " \
>+ "bootm $load_addr#$board\0"
>+
>+#undef CONFIG_BOOTCOMMAND
>+#ifdef CONFIG_TFABOOT
>+#undef QSPI_NOR_BOOTCOMMAND
>+#define QSPI_NOR_BOOTCOMMAND "pfe stop; run distro_bootcmd; run
>qspi_bootcmd; "\
You mentioned qspi_bootcmd in QSPI_NOR_BOOTCOMMAND. Is this correct ?
Please confirm that you have tested the change for combinations of boot,
secure/non-secure boot
While testing do ensure to erase env and then test this change
>+ "env exists secureboot && esbc_halt;"
>+#else
>+#define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run
>qspi_bootcmd; "\
>+ "env exists secureboot && esbc_halt;"
>+#endif
>+
> #include
> #endif /* __LS1012AQDS_H__ */
>--
>2.17.1
Priyanka
Re: [PATCH 07/10] board: stm32mp1: add finished good in board identifier OTP
Dear Patrick, In message <20200212183744.5309-8-patrick.delau...@st.com> you wrote: > Update the command stboard to support the coding of OTP 59 with > finished good: Can you please explain what "finished good" means? I can't parse the sentence above, sorry. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Prof:So the American government went to IBM to come up with a data encryption standard and they came up with ... Student: EBCDIC!
RE: [PATCH] configs: ls1021a: Append othbootargs to bootargs
>-Original Message- >From: U-Boot On Behalf Of Alison Wang >Sent: Monday, March 16, 2020 1:29 PM >To: u-boot@lists.denx.de; Priyanka Jain ; Jagdish >Gediya >Cc: Alison Wang >Subject: [PATCH] configs: ls1021a: Append othbootargs to bootargs > >This patch appends othbootargs to bootargs for LS1021ATWR board. > >Signed-off-by: Alison Wang >--- > include/configs/ls1021atwr.h | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > >diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index >8e2784b..266107c 100644 >--- a/include/configs/ls1021atwr.h >+++ b/include/configs/ls1021atwr.h >@@ -297,7 +297,7 @@ > > #ifdef CONFIG_LPUART > #define CONFIG_EXTRA_ENV_SETTINGS \ >- "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \ >+ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200 >$othbootargs\0" \ > "initrd_high=0x\0" \ > "fdt_high=0x\0" \ > "fdt_addr=0x64f0\0" \ >@@ -313,7 +313,6 @@ > "kernel_size=0x280\0" \ > "kernel_addr_sd=0x8000\0" \ > "kernel_size_sd=0x14000\0" \ >- "$othbootargs\0"\ > "othbootargs=cma=64M@0x0-0xb000\0" \ > BOOTENV \ > "boot_scripts=ls1021atwr_boot.scr\0"\ >@@ -355,7 +354,7 @@ > "$kernel_size && bootm $load_addr#$board\0" > #else > #define CONFIG_EXTRA_ENV_SETTINGS \ >- "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ >+ "bootargs=root=/dev/ram0 rw console=ttyS0,115200 $othbootargs\0" >\ > "initrd_high=0x\0" \ > "fdt_high=0x\0" \ > "fdt_addr=0x64f0\0" \ >@@ -375,7 +374,6 @@ > "kernel_size_sd=0x14000\0" \ > "kernelhdr_addr_sd=0x4000\0"\ > "kernelhdr_size_sd=0x10\0" \ >- "$othbootargs\0"\ > "othbootargs=cma=64M@0x0-0xb000\0" \ > BOOTENV \ > "boot_scripts=ls1021atwr_boot.scr\0"\ >-- >2.9.5 Reviewed-by: Priyanka Jain
RE: [RESEND Patch v2] configs: lx2160a: Enable FSPI support
>-Original Message- >From: U-Boot On Behalf Of Kuldeep Singh >Sent: Saturday, March 14, 220 6:44 PM >To: Priyanka Jain ; u-boot@lists.denx.de >Cc: Kuldeep Singh >Subject: [RESEND Patch v2] configs: lx2160a: Enable FSPI support > >Enable FSPI controller support. So, flash environment can now be used. > >Signed-off-by: Kuldeep Singh >--- >v2: >-Rebased to top. >-Drop other patches from series as already accepted. >-Add ENV_SECT_SIZE value as 0x2 > > configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + > configs/lx2160aqds_tfa_defconfig | 3 +++ > configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + > configs/lx2160ardb_tfa_defconfig | 3 +++ > 4 files changed, 8 insertions(+) > >diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig >b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig >index 7c3b827..92fac5d 100644 >--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig >+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig >@@ -65,6 +65,7 @@ CONFIG_DM_SERIAL=y > CONFIG_SPI=y > CONFIG_DM_SPI=y > CONFIG_FSL_DSPI=y >+CONFIG_NXP_FSPI=y > CONFIG_USB=y > CONFIG_DM_USB=y > CONFIG_USB_XHCI_HCD=y >diff --git a/configs/lx2160aqds_tfa_defconfig >b/configs/lx2160aqds_tfa_defconfig >index 449b3cb..e472c12 100644 >--- a/configs/lx2160aqds_tfa_defconfig >+++ b/configs/lx2160aqds_tfa_defconfig >@@ -4,6 +4,7 @@ CONFIG_TFABOOT=y > CONFIG_SYS_TEXT_BASE=0x8200 > CONFIG_SYS_MALLOC_F_LEN=0x6000 > CONFIG_ENV_SIZE=0x2000 >+CONFIG_ENV_SECT_SIZE=0x2 > CONFIG_ENV_OFFSET=0x50 > CONFIG_DM_GPIO=y > CONFIG_FSPI_AHB_EN_4BYTE=y >@@ -32,6 +33,7 @@ CONFIG_OF_CONTROL=y > CONFIG_OF_BOARD_FIXUP=y > CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds" > CONFIG_ENV_IS_IN_MMC=y >+CONFIG_ENV_IS_IN_SPI_FLASH=y > CONFIG_NET_RANDOM_ETHADDR=y > CONFIG_DM=y > CONFIG_SATA_CEVA=y >@@ -65,6 +67,7 @@ CONFIG_DM_SCSI=y > CONFIG_DM_SERIAL=y > CONFIG_SPI=y > CONFIG_DM_SPI=y >+CONFIG_NXP_FSPI=y > CONFIG_USB=y > CONFIG_DM_USB=y > CONFIG_USB_XHCI_HCD=y >diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig >b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig >index d1fffb3..e754eb7 100644 >--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig >+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig >@@ -60,6 +60,7 @@ CONFIG_DM_SCSI=y > CONFIG_DM_SERIAL=y > CONFIG_SPI=y > CONFIG_DM_SPI=y >+CONFIG_NXP_FSPI=y > CONFIG_USB=y > CONFIG_DM_USB=y > CONFIG_USB_XHCI_HCD=y >diff --git a/configs/lx2160ardb_tfa_defconfig >b/configs/lx2160ardb_tfa_defconfig >index 93f3e20..5d4580e 100644 >--- a/configs/lx2160ardb_tfa_defconfig >+++ b/configs/lx2160ardb_tfa_defconfig >@@ -4,6 +4,7 @@ CONFIG_TFABOOT=y > CONFIG_SYS_TEXT_BASE=0x8200 > CONFIG_SYS_MALLOC_F_LEN=0x6000 > CONFIG_ENV_SIZE=0x2000 >+CONFIG_ENV_SECT_SIZE=0x2 > CONFIG_ENV_OFFSET=0x50 > CONFIG_DM_GPIO=y > CONFIG_EMC2305=y >@@ -33,6 +34,7 @@ CONFIG_OF_CONTROL=y > CONFIG_OF_BOARD_FIXUP=y > CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" > CONFIG_ENV_IS_IN_MMC=y >+CONFIG_ENV_IS_IN_SPI_FLASH=y > CONFIG_NET_RANDOM_ETHADDR=y > CONFIG_DM=y > CONFIG_SATA_CEVA=y >@@ -64,6 +66,7 @@ CONFIG_DM_SCSI=y > CONFIG_DM_SERIAL=y > CONFIG_SPI=y > CONFIG_DM_SPI=y >+CONFIG_NXP_FSPI=y > CONFIG_USB=y > CONFIG_DM_USB=y > CONFIG_USB_XHCI_HCD=y >-- >2.7.4 Reviewed-by: Priyanka Jain Please confirm that all dependent patches are now available in main master branch Regards Priyanka
