Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Guennadi Liakhovetski]

On Sat, 9 Aug 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:

  +
  +void dcache_disable (void)
  +{
  +   ulong reg;
  +
  +   reg = read_p15_c1 ();
  +   cp_delay ();
  +   reg = ~C1_DC;
  +   write_p15_c1 (reg);
 why not  as the other implementation?

ok

  +   /*printf(Calculated %lu timer_load_val\n, timer_load_val);*/
 please remove if not need

ok

 please add some empty line to be more readable
  +   /* load value for 10 ms timeout */
  +   lastdec = timers-TCNTB4 = timer_load_val;
  +   /* auto load, manual update of Timer 4 */
  +   timers-TCON = (timers-TCON  ~0x0070) | TCON_4_AUTO |
  +   TCON_4_UPDATE;
  +   /* auto load, start Timer 4 */
  +   timers-TCON = (timers-TCON  ~0x0070) | TCON_4_AUTO | COUNT_4_ON;
  +   timestamp = 0;

ok

  +static ulong get_PLLCLK(int pllreg)
 please not uppercase

These are s3c* common functions declared in include/common.h, chenging 
their declarations is outside of the scope of this patchset (see below)

  +   if (pllreg == APLL)
  +   r = APLL_CON_REG;
  +   else if (pllreg == MPLL)
  +   r = MPLL_CON_REG;
  +   else if (pllreg == EPLL)
  +   r = EPLL_CON0_REG;
  +   else
  +   hang();
 please move to switch implementation

ok

  +   printf(\nCPU: [EMAIL PROTECTED], get_ARMCLK() / 100);
  +   printf( Fclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz ,
  +  get_FCLK() / 100, get_HCLK() / 100,
  +  get_PCLK() / 100);
 maybe a macro like HZ_TO_MHZ(x) could be helpfull to avoid typo

Don't think such metric conversions deserve a macro.

 please add space between parameter
  +   mrs r0,cpsr
  +   bic r0,r0,#0x3f
  +   orr r0,r0,#0xd3
  +   msr cpsr,r0

ok

  diff --git a/include/common.h b/include/common.h
  index 06ed278..ba87322 100644
  --- a/include/common.h
  +++ b/include/common.h
  @@ -491,7 +491,8 @@ int prt_mpc8220_clks (void);
   ulong  get_OPB_freq (void);
   ulong  get_PCI_freq (void);
   #endif
  -#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || 
  defined(CONFIG_LH7A40X)
  +#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || \
  +   defined(CONFIG_LH7A40X) || defined(CONFIG_S3C6400)
 Is it possible to have a better and simpler ifdef?

It is possible and desirable to remove these declarations

   void   s3c2410_irq(void);
   #define ARM920_IRQ_CALLBACK s3c2410_irq
   ulong  get_FCLK (void);

from this header completely. Don't understand what they are doing in 
include/common.h. However, this is outside of the scope of this patchset. 
Please, if you will be fixing this, do this after this patchset.

  +#define NFADDR (ELFIN_NAND_BASE+NFADDR_OFFSET)
  ^^^
 please remove whitesapce

ok

 btw on all macro please add space beetwen operator like
  +#define NFCONF_REG __REG(ELFIN_NAND_BASE+NFCONF_OFFSET)
 to
 #define NFCONF_REG__REG(ELFIN_NAND_BASE + NFCONF_OFFSET)

ok

  +#define Startup_AMDIV  400
 for macro I'll prefer upercase
  +#define Startup_MDIV   400
  +#define Startup_PDIV   6
  +#define Startup_SDIV   1

ok

  +typedef vu_charS3C64XX_REG8;
  +typedef vu_short   S3C64XX_REG16;
  +typedef vu_longS3C64XX_REG32;
 I'll prefer you use the type directly

ok

  +} /*__attribute__((__packed__))*/ s3c64xx_uart;
 why do you remove the packed attribute?

put it back. Makes no _practical_ difference in this case.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

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Re: [U-Boot-Users] [PATCH 5/7 v6] serial: add S3C64XX serial driver

[Guennadi Liakhovetski]

On Sat, 9 Aug 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:

  +   u32 reg;
  +   u32 pclk_ratio = get_PCLK() / gd-baudrate;
  +   int i;
  +
 IMHO it's still obscur
  +   /* PCLK / (16 * baudrate) - 1 */
  +   reg = pclk_ratio / 16 - 1;
  +   /* i = pclk_ratio % 16 */
  +   i = pclk_ratio - (reg + 1) * 16;

Sorry, I don't understand how this can be made clearer yet. If you have 
any specific ideas, please let me know now, before v7 appears, because I 
would really like to make it final.

Thanks
Guennadi
---
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Re: [U-Boot-Users] [PATCH 2/7 v6] nand_spl: Support page-aligned read in nand_load, use chipselect

[Guennadi Liakhovetski]

On Wed, 6 Aug 2008, Scott Wood wrote:

 On Wed, Aug 06, 2008 at 09:42:07PM +0200, Guennadi Liakhovetski wrote:
  block = offs / CFG_NAND_BLOCK_SIZE;
  +   blocks = (uboot_size + offs - ((block - 1) * CFG_NAND_BLOCK_SIZE) - 1) /
  +   CFG_NAND_BLOCK_SIZE;
  blockcopy_count = 0;
   
  -   while (blockcopy_count  (uboot_size / CFG_NAND_BLOCK_SIZE)) {
  +   while (blockcopy_count  blocks) {
  if (!nand_is_bad_block(mtd, block)) {
  /*
   * Skip bad blocks
   */
  for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
  nand_read_page(mtd, block, page, dst);
  -   dst += CFG_NAND_PAGE_SIZE;
  +   /* Overwrite skipped pages */
  +   if (read = offs)
  +   dst += CFG_NAND_PAGE_SIZE;
  +   read += CFG_NAND_PAGE_SIZE;
 
 This looks wrong if offs isn't within the first block.

Arrrgh, during the merge the following two lines went missing from the 
patch:

+   /* Recalculate offs as an offset inside a block */
+   offs -= CFG_NAND_BLOCK_SIZE * block;

which were there, for example, in v5.

 I've pushed a fixed and simplified version to nand-flash/testing -- can
 you test it?

Yes, it works. Your version is also better, since it skips unneeded pages 
instead of reading them in and overwriting, as mine did.

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
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Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Guennadi Liakhovetski]

On Thu, 7 Aug 2008, Andreas Engel wrote:

  diff --git a/cpu/arm1176/s3c64xx/interrupts.c 
  b/cpu/arm1176/s3c64xx/interrupts.c
  new file mode 100644
  index 000..4233e8c
  --- /dev/null
  +++ b/cpu/arm1176/s3c64xx/interrupts.c
 
 You can remove anything from enable_interrupts() to do_irq() here. It's
 already in lib_arm/interrupts.c.

It must be the library-linking procedure, that prevented the linker from 
complaining about duplicate symbols... Yes, will remove them, thanks. Just 
let's wait a bit if there are more comments.

Thanks
Guennadi
---
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[U-Boot-Users] [PATCH] NAND: fix scrub help description

[Guennadi Liakhovetski]

nand scrub takes two optional parameters, which are not mentioned in the 
help. Also use tabs instead of spaces for indentation.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---

diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 520c152..2edcee1 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -469,23 +469,24 @@ usage:
 }
 
 U_BOOT_CMD(nand, 5, 1, do_nand,
-   nand - NAND sub-system\n,
-   info - show available NAND devices\n
-   nand device [dev] - show or set current device\n
-   nand read - addr off|partition size\n
-   nand write - addr off|partition size\n
-   read/write 'size' bytes starting at offset 'off'\n
-   to/from memory address 'addr', skipping bad blocks.\n
-   nand erase [clean] [off size] - erase 'size' bytes from\n
-   offset 'off' (entire device if not specified)\n
-   nand bad - show bad blocks\n
-   nand dump[.oob] off - dump page\n
-   nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n
-   nand markbad off - mark bad block at offset (UNSAFE)\n
-   nand biterr off - make a bit error at offset (UNSAFE)\n
-   nand lock [tight] [status]\n
-   bring nand to lock state or display locked pages\n
-   nand unlock [offset] [size] - unlock section\n);
+  nand - NAND sub-system\n,
+  info - show available NAND devices\n
+  nand device [dev] - show or set current device\n
+  nand read - addr off|partition size\n
+  nand write - addr off|partition size\n
+  read/write 'size' bytes starting at offset 'off'\n
+  to/from memory address 'addr', skipping bad blocks.\n
+  nand erase [clean] [off size] - erase 'size' bytes from\n
+  offset 'off' (entire device if not specified)\n
+  nand bad - show bad blocks\n
+  nand dump[.oob] off - dump page\n
+  nand scrub [off size] - really clean NAND erasing\n
+  bad blocks (UNSAFE)\n
+  nand markbad off - mark bad block at offset (UNSAFE)\n
+  nand biterr off - make a bit error at offset (UNSAFE)\n
+  nand lock [tight] [status]\n
+  bring nand to lock state or display locked pages\n
+  nand unlock [offset] [size] - unlock section\n);
 
 static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand,
ulong offset, ulong addr, char *cmd)

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Re: [U-Boot-Users] [PATCH 3/7 v6] ARM: Add arm1176 core with S3C6400 SoC

[Guennadi Liakhovetski]

On Thu, 7 Aug 2008, Jens Gehrlein wrote:

 Hi Guennadi,
 
 Guennadi Liakhovetski schrieb:
 
  diff --git a/cpu/arm1176/s3c64xx/interrupts.c
  b/cpu/arm1176/s3c64xx/interrupts.c
 [snip]
  +void udelay(unsigned long usec)
  +{
  +   unsigned long long tmp;
  +   ulong tmo;
  +
  +   tmo = (usec + 9) / 10;
  +   tmp = get_ticks() + tmo;/* get current timestamp */
  +
  +   while (get_ticks()  tmp)/* loop till event */
  +/*NOP*/;
  +}
 
 I tried to follow the interrupt init function, but it's difficult.
 What is the least possible delay with the udelay function?
 I remember that i.mx31 udelay cannot currently be below 30 microsseconds due
 to the low input clock. If someone uses udelay(1) in polling loops with
 timeout, the actual duration is much more longer than assumed.

Actually, the / 10 and this comment

/*
 * We use the following scheme for the timer:
 * Prescaler is hard fixed at 167, divider at 1/4.
 * This gives at PCLK frequency 66MHz approx. 10us ticks
 * The timer is set to wrap after 100s, at 66MHz this obviously
 * happens after 10,000,000 ticks. A long variable can thus
 * keep values up to 40,000s, i.e., 11 hours. This should be
 * enough for most uses:-) Possible optimizations: select a
 * binary-friendly frequency, e.g., 1ms / 128. Also calculate
 * the prescaler automatically for other PCLK frequencies.
 */

shall make it clear, that the timer resolution is configured to 10us, 
which is also the minimum udelay. The timer could also do better, but then 
we get other disadvantages, e.g., shorter wrap-around time.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
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Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH] NAND boot: Update large page support for current API.

[Guennadi Liakhovetski]

On Tue, 5 Aug 2008, Scott Wood wrote:

 Also, remove the ctrl variable in favor of passing the constants
 directly, and remove redundant (u8) casts.
 
 Signed-off-by: Scott Wood [EMAIL PROTECTED]

Tested-by: Guennadi Liakhovetski [EMAIL PROTECTED]

It works.

Thanks
Guennadi

 ---
 This patch is untested, as I don't have the hardware.
 Applied to u-boot-nand-flash/testing.
 
  nand_spl/nand_boot.c |   50 
 --
  1 files changed, 20 insertions(+), 30 deletions(-)
 
 diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
 index 0f56ba5..81b4dfc 100644
 --- a/nand_spl/nand_boot.c
 +++ b/nand_spl/nand_boot.c
 @@ -37,7 +37,6 @@ static int nand_command(struct mtd_info *mtd, int block, 
 int page, int offs, u8
  {
   struct nand_chip *this = mtd-priv;
   int page_addr = page + block * CFG_NAND_PAGE_COUNT;
 - int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
  
   if (this-dev_ready)
   while (!this-dev_ready(mtd))
 @@ -46,18 +45,15 @@ static int nand_command(struct mtd_info *mtd, int block, 
 int page, int offs, u8
   CFG_NAND_READ_DELAY;
  
   /* Begin command latch cycle */
 - this-cmd_ctrl(mtd, cmd, ctrl);
 + this-cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
   /* Set ALE and clear CLE to start address cycle */
 - ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
   /* Column address */
 - this-cmd_ctrl(mtd, offs, ctrl);
 - ctrl = ~NAND_CTRL_CHANGE;
 - this-cmd_ctrl(mtd, (u8)(page_addr  0xff), ctrl);  /* A[16:9] */
 - ctrl = ~NAND_CTRL_CHANGE;
 - this-cmd_ctrl(mtd, (u8)((page_addr  8)  0xff), ctrl); /* A[24:17] */
 + this-cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
 + this-cmd_ctrl(mtd, page_addr  0xff, 0); /* A[16:9] */
 + this-cmd_ctrl(mtd, (page_addr  8)  0xff, 0); /* A[24:17] */
  #ifdef CFG_NAND_4_ADDR_CYCLE
   /* One more address cycle for devices  32MiB */
 - this-cmd_ctrl(mtd, (u8)((page_addr  16)  0x0f), ctrl); /* A[xx:25] 
 */
 + this-cmd_ctrl(mtd, (page_addr  16)  0x0f, 0); /* A[28:25] */
  #endif
   /* Latch in address */
   this-cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
 @@ -80,51 +76,45 @@ static int nand_command(struct mtd_info *mtd, int block, 
 int page, int offs, u8
  static int nand_command(struct mtd_info *mtd, int block, int page, int offs, 
 u8 cmd)
  {
   struct nand_chip *this = mtd-priv;
 - int page_offs = offs;
   int page_addr = page + block * CFG_NAND_PAGE_COUNT;
  
   if (this-dev_ready)
 - this-dev_ready(mtd);
 + while (!this-dev_ready(mtd))
 + ;
   else
   CFG_NAND_READ_DELAY;
  
   /* Emulate NAND_CMD_READOOB */
   if (cmd == NAND_CMD_READOOB) {
 - page_offs += CFG_NAND_PAGE_SIZE;
 + offs += CFG_NAND_PAGE_SIZE;
   cmd = NAND_CMD_READ0;
   }
  
   /* Begin command latch cycle */
 - this-hwcontrol(mtd, NAND_CTL_SETCLE);
 - this-write_byte(mtd, cmd);
 + this-cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
   /* Set ALE and clear CLE to start address cycle */
 - this-hwcontrol(mtd, NAND_CTL_CLRCLE);
 - this-hwcontrol(mtd, NAND_CTL_SETALE);
   /* Column address */
 - this-write_byte(mtd, page_offs  0xff);/* 
 A[7:0] */
 - this-write_byte(mtd, (uchar)((page_offs  8)  0xff));/* 
 A[11:9] */
 + this-cmd_ctrl(mtd, offs  0xff,
 +NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
 + this-cmd_ctrl(mtd, (offs  8)  0xff, 0); /* A[11:9] */
   /* Row address */
 - this-write_byte(mtd, (uchar)(page_addr  0xff));   /* 
 A[19:12] */
 - this-write_byte(mtd, (uchar)((page_addr  8)  0xff));/* 
 A[27:20] */
 + this-cmd_ctrl(mtd, (page_addr  0xff), 0); /* A[19:12] */
 + this-cmd_ctrl(mtd, ((page_addr  8)  0xff), 0); /* A[27:20] */
  #ifdef CFG_NAND_5_ADDR_CYCLE
   /* One more address cycle for devices  128MiB */
 - this-write_byte(mtd, (uchar)((page_addr  16)  0x0f));   /* 
 A[xx:28] */
 + this-cmd_ctrl(mtd, (page_addr  16)  0x0f, 0); /* A[31:28] */
  #endif
   /* Latch in address */
 - this-hwcontrol(mtd, NAND_CTL_CLRALE);
 -
 - /* Begin command latch cycle */
 - this-hwcontrol(mtd, NAND_CTL_SETCLE);
 - /* Write out the start read command */
 - this-write_byte(mtd, NAND_CMD_READSTART);
 - /* End command latch cycle */
 - this-hwcontrol(mtd, NAND_CTL_CLRCLE);
 + this-cmd_ctrl(mtd, NAND_CMD_READSTART,
 +NAND_CTRL_CLE | NAND_CTRL_CHANGE);
 + this-cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  
   /*
* Wait a while for the data to be ready
*/
   if (this-dev_ready)
 - this-dev_ready(mtd);
 + while (!this-dev_ready(mtd))
 + ;
   else
   CFG_NAND_READ_DELAY;
  
 -- 
 1.5.6.rc1.6.gc53ad

[U-Boot-Users] [PATCH 0/7 v6] SMDK6400 support

[Guennadi Liakhovetski]

Version 6: this time, based on the updated nand-testing branch with the 
latest patch from Scott Wood - thanks again, run-tested. Updates since 
version 5: restored original bad-block detection in nand_spl/nand_boot.c 
with only necessary changes to support non block-aligned images, use the 
chipselect and compile on ARM. Patch 1/7 is gone, as Stefan accepted 
version 5 (he's had enough of these cc's probably:-))

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH 2/7 v6] nand_spl: Support page-aligned read in nand_load, use chipselect

[Guennadi Liakhovetski]

Supporting page-aligned reads doesn't incure any sinificant overhead, just 
a small change in the algorithm. Also replace in_8 with readb, since there 
is no in_8 on ARM.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 nand_spl/nand_boot.c |   22 +-
 1 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 81b4dfc..02ccfa8 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -131,7 +131,7 @@ static int nand_is_bad_block(struct mtd_info *mtd, int 
block)
/*
 * Read one byte
 */
-   if (in_8(this-IO_ADDR_R) != 0xff)
+   if (readb(this-IO_ADDR_R) != 0xff)
return 1;
 
return 0;
@@ -186,24 +186,30 @@ static int nand_read_page(struct mtd_info *mtd, int 
block, int page, uchar *dst)
 
 static int nand_load(struct mtd_info *mtd, int offs, int uboot_size, uchar 
*dst)
 {
-   int block;
+   int block, blocks;
int blockcopy_count;
int page;
+   unsigned int read = 0;
 
/*
-* offs has to be aligned to a block address!
+* offs has to be aligned to a page address!
 */
block = offs / CFG_NAND_BLOCK_SIZE;
+   blocks = (uboot_size + offs - ((block - 1) * CFG_NAND_BLOCK_SIZE) - 1) /
+   CFG_NAND_BLOCK_SIZE;
blockcopy_count = 0;
 
-   while (blockcopy_count  (uboot_size / CFG_NAND_BLOCK_SIZE)) {
+   while (blockcopy_count  blocks) {
if (!nand_is_bad_block(mtd, block)) {
/*
 * Skip bad blocks
 */
for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
nand_read_page(mtd, block, page, dst);
-   dst += CFG_NAND_PAGE_SIZE;
+   /* Overwrite skipped pages */
+   if (read = offs)
+   dst += CFG_NAND_PAGE_SIZE;
+   read += CFG_NAND_PAGE_SIZE;
}
 
blockcopy_count++;
@@ -235,12 +241,18 @@ void nand_boot(void)
nand_chip.dev_ready = NULL; /* preset to NULL */
board_nand_init(nand_chip);
 
+   if (nand_chip.select_chip)
+   nand_chip.select_chip(nand_info, 0);
+
/*
 * Load U-Boot image from NAND into RAM
 */
ret = nand_load(nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
(uchar *)CFG_NAND_U_BOOT_DST);
 
+   if (nand_chip.select_chip)
+   nand_chip.select_chip(nand_info, -1);
+
/*
 * Jump to U-Boot image
 */
-- 
1.5.4


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[U-Boot-Users] [PATCH 4/7 v6] USB: Add support for OHCI controller on S3C6400

[Guennadi Liakhovetski]

Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 cpu/arm1176/s3c64xx/Makefile |1 +
 cpu/arm1176/s3c64xx/usb.c|   45 ++
 drivers/usb/usb_ohci.c   |1 +
 3 files changed, 47 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm1176/s3c64xx/usb.c

diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile
index fa4ee3f..4ab1811 100644
--- a/cpu/arm1176/s3c64xx/Makefile
+++ b/cpu/arm1176/s3c64xx/Makefile
@@ -30,6 +30,7 @@ LIB   = $(obj)lib$(SOC).a
 
 COBJS-y= interrupts.o
 COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
+COBJS-$(CONFIG_USB_OHCI_NEW) += usb.o
 
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
 
diff --git a/cpu/arm1176/s3c64xx/usb.c b/cpu/arm1176/s3c64xx/usb.c
new file mode 100644
index 000..274a4ed
--- /dev/null
+++ b/cpu/arm1176/s3c64xx/usb.c
@@ -0,0 +1,45 @@
+/*
+ * URB OHCI HCD (Host Controller Driver) initialization for USB on the S3C64XX.
+ *
+ * Copyright (C) 2008,
+ * Guennadi Liakhovetski, DENX Software Engineering [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include s3c6400.h
+
+int usb_cpu_init(void)
+{
+   OTHERS_REG |= 0x1;
+   return 0;
+}
+
+int usb_cpu_stop(void)
+{
+   OTHERS_REG = ~0x1;
+   return 0;
+}
+
+void usb_cpu_init_fail(void)
+{
+   OTHERS_REG = ~0x1;
+}
diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c
index fd60edb..0bfa4d7 100644
--- a/drivers/usb/usb_ohci.c
+++ b/drivers/usb/usb_ohci.c
@@ -69,6 +69,7 @@
 #if defined(CONFIG_ARM920T) || \
 defined(CONFIG_S3C2400) || \
 defined(CONFIG_S3C2410) || \
+defined(CONFIG_S3C6400) || \
 defined(CONFIG_440EP) || \
 defined(CONFIG_PCI_OHCI) || \
 defined(CONFIG_MPC5200) || \
-- 
1.5.4


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[U-Boot-Users] [PATCH 5/7 v6] serial: add S3C64XX serial driver

[Guennadi Liakhovetski]

Based on the original S3C64XX UART driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/serial/Makefile  |1 +
 drivers/serial/s3c64xx.c |  197 ++
 2 files changed, 198 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/s3c64xx.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index de6fbab..b1458f2 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -30,6 +30,7 @@ COBJS-$(CONFIG_MCFUART) += mcfuart.o
 COBJS-y += ns9750_serial.o
 COBJS-y += ns16550.o
 COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
+COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
 COBJS-y += serial.o
 COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
 COBJS-y += serial_pl010.o
diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c
new file mode 100644
index 000..ce0fb91
--- /dev/null
+++ b/drivers/serial/s3c64xx.c
@@ -0,0 +1,197 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include common.h
+
+#include s3c6400.h
+
+#ifdef CONFIG_SERIAL1
+#define UART_NRS3C64XX_UART0
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C64XX_UART1
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C64XX_UART2
+
+#else
+#error Bad: you didn't configure serial ...
+#endif
+
+#define barrier() asm volatile( ::: memory)
+
+/*
+ * The coefficient, used to calculate the baudrate on S3C6400 UARTs is
+ * calculated as
+ * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
+ * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
+ * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
+ */
+static const int udivslot[] = {
+   0,
+   0x0080,
+   0x0808,
+   0x0888,
+   0x,
+   0x4924,
+   0x4a52,
+   0x54aa,
+   0x,
+   0xd555,
+   0xd5d5,
+   0xddd5,
+   0x,
+   0xdfdd,
+   0xdfdf,
+   0xffdf,
+};
+
+void serial_setbrg(void)
+{
+   DECLARE_GLOBAL_DATA_PTR;
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+   u32 reg;
+   u32 pclk_ratio = get_PCLK() / gd-baudrate;
+   int i;
+
+   /* PCLK / (16 * baudrate) - 1 */
+   reg = pclk_ratio / 16 - 1;
+   /* i = pclk_ratio % 16 */
+   i = pclk_ratio - (reg + 1) * 16;
+
+   uart-UBRDIV = reg;
+   uart-UDIVSLOT = udivslot[i];
+
+   for (i = 0; i  100; i++)
+   barrier();
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ *
+ */
+int serial_init(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* reset and enable FIFOs, set triggers to the maximum */
+   uart-UFCON = 0xff;
+   uart-UMCON = 0;
+   /* 8N1 */
+   uart-ULCON = 3;
+   /* No interrupts, no DMA, pure polling */
+   uart-UCON = 5;
+
+   serial_setbrg();
+
+   return 0;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+int serial_getc(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* wait for character to arrive */
+   while (!(uart-UTRSTAT  0x1));
+
+   return uart-URXH  0xff;
+}
+
+#ifdef CONFIG_HWFLOW
+static int hwflow; /* turned off by default */
+int hwflow_onoff(int on)
+{
+   switch (on) {
+   case 1:
+   hwflow = 1; /* turn on */
+   break;
+   case -1:
+   hwflow = 0; /* turn off */
+   break;
+   }
+   return hwflow;
+}
+#endif
+
+#ifdef CONFIG_MODEM_SUPPORT
+static int be_quiet;
+void disable_putc(void)
+{
+   be_quiet = 1;
+}
+
+void enable_putc(void)
+{
+   be_quiet = 0;
+}
+#endif
+
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc(const char c)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+#ifdef CONFIG_MODEM_SUPPORT

[U-Boot-Users] [PATCH 6/7 v6] NAND: add NAND driver for S3C64XX

[Guennadi Liakhovetski]

Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---

Changes since v5: now it actually works with nand-testing

 drivers/mtd/nand/Makefile  |1 +
 drivers/mtd/nand/s3c64xx.c |  309 
 2 files changed, 310 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/s3c64xx.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index ffb3169..268a758 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -34,6 +34,7 @@ COBJS-y += nand_util.o
 
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-y += fsl_upm.o
+COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
new file mode 100644
index 000..57a3b18
--- /dev/null
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -0,0 +1,309 @@
+/*
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * Implementation for U-Boot 1.1.6 by Samsung
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#include nand.h
+#include s3c6400.h
+
+#include asm/io.h
+
+#ifdef CONFIG_NAND_SPL
+#define printf(arg...) do {} while (0)
+#endif
+
+/* Nand flash definition values by jsgood */
+#ifdef S3C_NAND_DEBUG
+/*
+ * Function to print out oob buffer for debugging
+ * Written by jsgood
+ */
+static void print_oob(const char *header, struct mtd_info *mtd)
+{
+   int i;
+   struct nand_chip *chip = mtd-priv;
+
+   printf(%s:\t, header);
+
+   for (i = 0; i  64; i++)
+   printf(%02x , chip-oob_poi[i]);
+
+   printf(\n);
+}
+#endif /* S3C_NAND_DEBUG */
+
+#ifdef CONFIG_NAND_SPL
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+   struct nand_chip *this = mtd-priv;
+   return readb(this-IO_ADDR_R);
+}
+
+static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+{
+   int i;
+   struct nand_chip *this = mtd-priv;
+
+   for (i = 0; i  len; i++)
+   writeb(buf[i], this-IO_ADDR_W);
+}
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+   int i;
+   struct nand_chip *this = mtd-priv;
+
+   for (i = 0; i  len; i++)
+   buf[i] = readb(this-IO_ADDR_R);
+}
+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   int ctrl = readl(NFCONT);
+
+   switch (chip) {
+   case -1:
+   ctrl |= 6;
+   break;
+   case 0:
+   ctrl = ~2;
+   break;
+   case 1:
+   ctrl = ~4;
+   break;
+   default:
+   return;
+   }
+
+   writel(ctrl, NFCONT);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ * Written by jsgood
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = (void __iomem *)NFCMMD;
+   else if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = (void __iomem *)NFADDR;
+   else
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   if (ctrl  NAND_NCE)
+   s3c_nand_select_chip(mtd, 0);
+   else
+   s3c_nand_select_chip(mtd, -1);
+   }
+
+   if (cmd != NAND_CMD_NONE)
+   writeb(cmd, this-IO_ADDR_W);
+}
+
+/*
+ * Function for checking device ready pin
+ * Written by jsgood
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   while (!(readl(NFSTAT)  NFSTAT_RnB)) {}
+   return 1;
+}
+
+#ifdef CFG_S3C_NAND_HWECC
+/*
+ * This function is called before encoding ecc codes to ready ecc engine.
+ * Written by jsgood
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   u_long nfcont, nfconf;
+
+   /*
+* The original driver used 4-bit ECC for new MLC chips, i.e., for
+* those with non-zero ID[3][3:2

[U-Boot-Users] [PATCH 7/7 v6] ARM: Add support for S3C6400 based SMDK6400 board

[Guennadi Liakhovetski]

SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---

Changes since v5: adjust the configuration to more precisely desribe NAND 
ECC layout.

 MAKEALL|1 +
 Makefile   |   17 ++
 board/samsung/smdk6400/Makefile|   54 +
 board/samsung/smdk6400/config.mk   |   30 +++
 board/samsung/smdk6400/lowlevel_init.S |  316 
 board/samsung/smdk6400/smdk6400.c  |  130 
 board/samsung/smdk6400/u-boot-nand.lds |   62 ++
 include/configs/smdk6400.h |  306 +++
 nand_spl/board/samsung/smdk6400/Makefile   |  106 ++
 nand_spl/board/samsung/smdk6400/config.mk  |   40 
 nand_spl/board/samsung/smdk6400/u-boot.lds |   61 ++
 11 files changed, 1123 insertions(+), 0 deletions(-)
 create mode 100644 board/samsung/smdk6400/Makefile
 create mode 100644 board/samsung/smdk6400/config.mk
 create mode 100644 board/samsung/smdk6400/lowlevel_init.S
 create mode 100644 board/samsung/smdk6400/smdk6400.c
 create mode 100644 board/samsung/smdk6400/u-boot-nand.lds
 create mode 100644 include/configs/smdk6400.h
 create mode 100644 nand_spl/board/samsung/smdk6400/Makefile
 create mode 100644 nand_spl/board/samsung/smdk6400/config.mk
 create mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds

diff --git a/MAKEALL b/MAKEALL
index ee83cca..a3ed47d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -515,6 +515,7 @@ LIST_ARM11=\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   smdk6400\
 
 
 #
diff --git a/Makefile b/Makefile
index cb8c0f5..898b3f6 100644
--- a/Makefile
+++ b/Makefile
@@ -2686,6 +2686,23 @@ mx31ads_config   : unconfig
 omap2420h4_config  : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
+#
+## ARM1176 Systems
+#
+smdk6400_noUSB_config  \
+smdk6400_config:   unconfig
+   @mkdir -p $(obj)include $(obj)board/samsung/smdk6400
+   @mkdir -p $(obj)nand_spl/board/samsung/smdk6400
+   @echo #define CONFIG_NAND_U_BOOT  $(obj)include/config.h
+   @if [ -z $(findstring smdk6400_noUSB_config,$@) ]; then   
\
+   echo RAM_TEXT = 0x57e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx; 
\
+   else
\
+   echo RAM_TEXT = 0xc7e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung 
s3c64xx;   \
+   fi
+   @echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
+
 #
 # i386
 #
diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile
new file mode 100644
index 000..d35dc8b
--- /dev/null
+++ b/board/samsung/smdk6400/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# (C) Copyright 2008
+# Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := smdk6400.o
+SOBJS  := lowlevel_init.o
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(AR) crv $@ $(OBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend

Re: [U-Boot-Users] [PATCH 2/7 v3] NAND_CMD_READOOB is not supported by all chips, read OOB with the page instead

[Guennadi Liakhovetski]

On Mon, 4 Aug 2008, Scott Wood wrote:

 On Mon, Aug 04, 2008 at 02:45:33PM +0200, Guennadi Liakhovetski wrote:
  I _think_ this should work with all NAND chips. Otherwise we might have to 
  introduce a configuration variable.
 
 Which small-page NAND chips can't handle READOOB?  On large page devices,
 nand_command changes it to READ0.

It's a large-page device. And, as far as I understand the datasheet, to 
read data at arbitrary offset in a page, you first have to issue a READ 
PAGE (READ0) for _the_ _whole_ page, then you can use RANDOM DATA READ to 
read arbitrary data within this page. Whereas, the driver attempts to use 
READ0 to read the bad-block marker directly, which doesn't work with this 
chip. At least this is my understanding.

 That said, doing it all at once could result in smaller, faster, and
 simpler code.
 
  @@ -150,8 +135,6 @@ static int nand_read_page(struct mtd_info *mtd, int 
  block, int page, uchar *dst)
  u_char *ecc_code;
  u_char *oob_data;
  int i;
  -   int eccsize = CFG_NAND_ECCSIZE;
  -   int eccbytes = CFG_NAND_ECCBYTES;
 
 Any particular reason for this change?  It's more readable as is, IMHO.

Acually, it was to improve readability:-) First, this way you can easier 
grep. Secondly, when I see an assignment to a _variable_, I expect, that 
this variable's value can indeed _vary_. So, it makes extra work looking 
through the code and verifying what other values this variable takes. 
Thus, at the very least I would add const to the definition. And, I do 
think using constants directly makes it clearer...

  @@ -195,6 +180,7 @@ static int nand_load(struct mtd_info *mtd, int offs, 
  int uboot_size, uchar *dst)
  int block;
  int blockcopy_count;
  int page;
  +   unsigned read = 0;
 
 unsigned int, please.

Ok...

  +   int badblock = 0;
  +   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
  +   nand_read_page(mtd, block, page, dst);
  +   if ((!page
  +#ifdef CFG_NAND_BBT_2NDPAGE
  +|| page == 1
  +#endif
 
 Please use page == 0 rather than !page when checking for an actual value
 of zero as opposed to a zero that means not valid or similar.

Ok...

  +   )  dst[CFG_NAND_PAGE_SIZE] != 0xff) {
  +   badblock = 1;
  +   break;
  }
  +   /* Overwrite skipped pages */
  +   if (read = offs)
  +   dst += CFG_NAND_PAGE_SIZE;
  +   read += CFG_NAND_PAGE_SIZE;
  +   }
 
 I don't follow the logic here -- you're discarding a number of good
 blocks equal to the offset?  That might make sense if we were starting at
 block zero, and defining the offset as not including any bad blocks
 before the image -- but the first block we read is at the start of the
 image, not the start of flash.

Right, that's a bug. Hope, it's fixed now.

  @@ -241,12 +239,18 @@ void nand_boot(void)
  nand_chip.dev_ready = NULL; /* preset to NULL */
  board_nand_init(nand_chip);
   
  +   if (nand_chip.select_chip)
  +   nand_chip.select_chip(nand_info, 0);
  +
  /*
   * Load U-Boot image from NAND into RAM
   */
  ret = nand_load(nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
  (uchar *)CFG_NAND_U_BOOT_DST);
   
  +   if (nand_chip.select_chip)
  +   nand_chip.select_chip(nand_info, -1);
  +
 
 This seems like an unrelated change, that wasn't described in the
 changelog.

Ok, will describe in the changelog.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH 0/7 v5] SMDK6400 support

[Guennadi Liakhovetski]

Version 5: This time based on nand-flash/testing head. Therefore it 
couldn't be runtime-tested: largepage support in nand_spl is broken there 
ATM. Otherwise all comments have been taken care of. After nand_spl is 
fixed for largepage NAND devices, this will be tested, if needed, v6 will 
be submitted.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH 1/7 v5] Add definition for the AM29LV800BB AMD NOR-flash

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/jedec_flash.c |   17 +
 1 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 9845e93..020647a 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -234,6 +234,23 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x1,7),
}
},
+   {
+   .mfr_id = MANUFACTURER_AMD,
+   .dev_id = AM29LV800BB,
+   .name   = AMD AM29LV800BB,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x04000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x1, 15),
+   }
+   },
 #endif
 };
 
-- 
1.5.4


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[U-Boot-Users] [PATCH 2/7 v5] Simplify reading of the bad-block marker, use chipselect

[Guennadi Liakhovetski]

We have to read a whole page on large-page NAND chips, at least the chip
installed on SMDK6400 can only read whole pages with READ0. Also activate
chipselect before using the chip, and deactivate it afterwards.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 nand_spl/nand_boot.c |   69 +++--
 1 files changed, 38 insertions(+), 31 deletions(-)

diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 0f56ba5..8cd0046 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -132,21 +132,6 @@ static int nand_command(struct mtd_info *mtd, int block, 
int page, int offs, u8
 }
 #endif
 
-static int nand_is_bad_block(struct mtd_info *mtd, int block)
-{
-   struct nand_chip *this = mtd-priv;
-
-   nand_command(mtd, block, 0, CFG_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
-
-   /*
-* Read one byte
-*/
-   if (in_8(this-IO_ADDR_R) != 0xff)
-   return 1;
-
-   return 0;
-}
-
 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar 
*dst)
 {
struct nand_chip *this = mtd-priv;
@@ -154,8 +139,6 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
u_char *ecc_code;
u_char *oob_data;
int i;
-   int eccsize = CFG_NAND_ECCSIZE;
-   int eccbytes = CFG_NAND_ECCBYTES;
int eccsteps = CFG_NAND_ECCSTEPS;
uint8_t *p = dst;
int stat;
@@ -167,11 +150,12 @@ static int nand_read_page(struct mtd_info *mtd, int 
block, int page, uchar *dst)
 */
ecc_calc = (u_char *)(CFG_SDRAM_BASE + 0x1);
ecc_code = ecc_calc + 0x100;
-   oob_data = ecc_calc + 0x200;
+   oob_data = p + CFG_NAND_PAGE_SIZE; /* Append OOB to the page data */
 
-   for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps;
+eccsteps--, i += CFG_NAND_ECCBYTES, p += CFG_NAND_ECCSIZE) {
this-ecc.hwctl(mtd, NAND_ECC_READ);
-   this-read_buf(mtd, p, eccsize);
+   this-read_buf(mtd, p, CFG_NAND_ECCSIZE);
this-ecc.calculate(mtd, p, ecc_calc[i]);
}
this-read_buf(mtd, oob_data, CFG_NAND_OOBSIZE);
@@ -183,7 +167,8 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
eccsteps = CFG_NAND_ECCSTEPS;
p = dst;
 
-   for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps;
+eccsteps--, i += CFG_NAND_ECCBYTES, p += CFG_NAND_ECCSIZE) {
/* No chance to do something with the possible error message
 * from correct_data(). We just hope that all possible errors
 * are corrected by this routine.
@@ -199,25 +184,41 @@ static int nand_load(struct mtd_info *mtd, int offs, int 
uboot_size, uchar *dst)
int block;
int blockcopy_count;
int page;
+   unsigned int read = 0;
 
/*
-* offs has to be aligned to a block address!
+* offs has to be aligned to a page address!
 */
block = offs / CFG_NAND_BLOCK_SIZE;
+   /* Recalculate offs as an offset inside a block */
+   offs -= CFG_NAND_BLOCK_SIZE * block;
blockcopy_count = 0;
 
-   while (blockcopy_count  (uboot_size / CFG_NAND_BLOCK_SIZE)) {
-   if (!nand_is_bad_block(mtd, block)) {
-   /*
-* Skip bad blocks
-*/
-   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
-   nand_read_page(mtd, block, page, dst);
-   dst += CFG_NAND_PAGE_SIZE;
+   while (blockcopy_count  ((uboot_size + CFG_NAND_BLOCK_SIZE - 1) /
+ CFG_NAND_BLOCK_SIZE)) {
+   /*
+* Skip bad blocks
+*/
+   int badblock = 0;
+   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
+   nand_read_page(mtd, block, page, dst);
+   if ((page == 0
+#ifdef CFG_NAND_BBT_2NDPAGE
+|| page == 1
+#endif
+   )  dst[CFG_NAND_PAGE_SIZE +
+CFG_NAND_BAD_BLOCK_POS] != 0xff) {
+   badblock = 1;
+   break;
}
+   /* Overwrite skipped pages */
+   if (read = offs)
+   dst += CFG_NAND_PAGE_SIZE;
+   read += CFG_NAND_PAGE_SIZE;
+   }
 
+   if (!badblock)
blockcopy_count++;
-   }
 
block++;
}
@@ -245,12 +246,18 @@ void nand_boot(void)
nand_chip.dev_ready = NULL; /* preset to NULL */
board_nand_init(nand_chip);
 
+   if (nand_chip.select_chip

[U-Boot-Users] [PATCH 4/7 v5] USB: Add support for OHCI controller on S3C6400

[Guennadi Liakhovetski]

Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 cpu/arm1176/s3c64xx/Makefile |1 +
 cpu/arm1176/s3c64xx/usb.c|   45 ++
 drivers/usb/usb_ohci.c   |1 +
 3 files changed, 47 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm1176/s3c64xx/usb.c

diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile
index fa4ee3f..4ab1811 100644
--- a/cpu/arm1176/s3c64xx/Makefile
+++ b/cpu/arm1176/s3c64xx/Makefile
@@ -30,6 +30,7 @@ LIB   = $(obj)lib$(SOC).a
 
 COBJS-y= interrupts.o
 COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
+COBJS-$(CONFIG_USB_OHCI_NEW) += usb.o
 
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
 
diff --git a/cpu/arm1176/s3c64xx/usb.c b/cpu/arm1176/s3c64xx/usb.c
new file mode 100644
index 000..274a4ed
--- /dev/null
+++ b/cpu/arm1176/s3c64xx/usb.c
@@ -0,0 +1,45 @@
+/*
+ * URB OHCI HCD (Host Controller Driver) initialization for USB on the S3C64XX.
+ *
+ * Copyright (C) 2008,
+ * Guennadi Liakhovetski, DENX Software Engineering [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include s3c6400.h
+
+int usb_cpu_init(void)
+{
+   OTHERS_REG |= 0x1;
+   return 0;
+}
+
+int usb_cpu_stop(void)
+{
+   OTHERS_REG = ~0x1;
+   return 0;
+}
+
+void usb_cpu_init_fail(void)
+{
+   OTHERS_REG = ~0x1;
+}
diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c
index fd60edb..0bfa4d7 100644
--- a/drivers/usb/usb_ohci.c
+++ b/drivers/usb/usb_ohci.c
@@ -69,6 +69,7 @@
 #if defined(CONFIG_ARM920T) || \
 defined(CONFIG_S3C2400) || \
 defined(CONFIG_S3C2410) || \
+defined(CONFIG_S3C6400) || \
 defined(CONFIG_440EP) || \
 defined(CONFIG_PCI_OHCI) || \
 defined(CONFIG_MPC5200) || \
-- 
1.5.4


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[U-Boot-Users] [PATCH 5/7 v5] serial: add S3C64XX serial driver

[Guennadi Liakhovetski]

Based on the original S3C64XX UART driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/serial/Makefile  |1 +
 drivers/serial/s3c64xx.c |  197 ++
 2 files changed, 198 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/s3c64xx.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index de6fbab..b1458f2 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -30,6 +30,7 @@ COBJS-$(CONFIG_MCFUART) += mcfuart.o
 COBJS-y += ns9750_serial.o
 COBJS-y += ns16550.o
 COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
+COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
 COBJS-y += serial.o
 COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
 COBJS-y += serial_pl010.o
diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c
new file mode 100644
index 000..ce0fb91
--- /dev/null
+++ b/drivers/serial/s3c64xx.c
@@ -0,0 +1,197 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include common.h
+
+#include s3c6400.h
+
+#ifdef CONFIG_SERIAL1
+#define UART_NRS3C64XX_UART0
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C64XX_UART1
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C64XX_UART2
+
+#else
+#error Bad: you didn't configure serial ...
+#endif
+
+#define barrier() asm volatile( ::: memory)
+
+/*
+ * The coefficient, used to calculate the baudrate on S3C6400 UARTs is
+ * calculated as
+ * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
+ * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
+ * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
+ */
+static const int udivslot[] = {
+   0,
+   0x0080,
+   0x0808,
+   0x0888,
+   0x,
+   0x4924,
+   0x4a52,
+   0x54aa,
+   0x,
+   0xd555,
+   0xd5d5,
+   0xddd5,
+   0x,
+   0xdfdd,
+   0xdfdf,
+   0xffdf,
+};
+
+void serial_setbrg(void)
+{
+   DECLARE_GLOBAL_DATA_PTR;
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+   u32 reg;
+   u32 pclk_ratio = get_PCLK() / gd-baudrate;
+   int i;
+
+   /* PCLK / (16 * baudrate) - 1 */
+   reg = pclk_ratio / 16 - 1;
+   /* i = pclk_ratio % 16 */
+   i = pclk_ratio - (reg + 1) * 16;
+
+   uart-UBRDIV = reg;
+   uart-UDIVSLOT = udivslot[i];
+
+   for (i = 0; i  100; i++)
+   barrier();
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ *
+ */
+int serial_init(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* reset and enable FIFOs, set triggers to the maximum */
+   uart-UFCON = 0xff;
+   uart-UMCON = 0;
+   /* 8N1 */
+   uart-ULCON = 3;
+   /* No interrupts, no DMA, pure polling */
+   uart-UCON = 5;
+
+   serial_setbrg();
+
+   return 0;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+int serial_getc(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* wait for character to arrive */
+   while (!(uart-UTRSTAT  0x1));
+
+   return uart-URXH  0xff;
+}
+
+#ifdef CONFIG_HWFLOW
+static int hwflow; /* turned off by default */
+int hwflow_onoff(int on)
+{
+   switch (on) {
+   case 1:
+   hwflow = 1; /* turn on */
+   break;
+   case -1:
+   hwflow = 0; /* turn off */
+   break;
+   }
+   return hwflow;
+}
+#endif
+
+#ifdef CONFIG_MODEM_SUPPORT
+static int be_quiet;
+void disable_putc(void)
+{
+   be_quiet = 1;
+}
+
+void enable_putc(void)
+{
+   be_quiet = 0;
+}
+#endif
+
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc(const char c)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+#ifdef CONFIG_MODEM_SUPPORT

[U-Boot-Users] [PATCH 6/7 v5] NAND: add NAND driver for S3C64XX

[Guennadi Liakhovetski]

Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/nand/Makefile  |1 +
 drivers/mtd/nand/s3c64xx.c |  305 
 2 files changed, 306 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/s3c64xx.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index ffb3169..268a758 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -34,6 +34,7 @@ COBJS-y += nand_util.o
 
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-y += fsl_upm.o
+COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
new file mode 100644
index 000..f5125af
--- /dev/null
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -0,0 +1,305 @@
+/*
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * Implementation for U-Boot 1.1.6 by Samsung
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#include nand.h
+#include s3c6400.h
+
+#include asm/io.h
+
+#ifdef CONFIG_NAND_SPL
+#define printf(arg...) do {} while (0)
+#endif
+
+/* Nand flash definition values by jsgood */
+#ifdef S3C_NAND_DEBUG
+/*
+ * Function to print out oob buffer for debugging
+ * Written by jsgood
+ */
+static void print_oob(const char *header, struct mtd_info *mtd)
+{
+   int i;
+   struct nand_chip *chip = mtd-priv;
+
+   printf(%s:\t, header);
+
+   for (i = 0; i  64; i++)
+   printf(%02x , chip-oob_poi[i]);
+
+   printf(\n);
+}
+#endif /* S3C_NAND_DEBUG */
+
+#ifdef CONFIG_NAND_SPL
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+   struct nand_chip *this = mtd-priv;
+   return readb(this-IO_ADDR_R);
+}
+
+static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+{
+   int i;
+   struct nand_chip *this = mtd-priv;
+
+   for (i = 0; i  len; i++)
+   writeb(buf[i], this-IO_ADDR_W);
+}
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+   int i;
+   struct nand_chip *this = mtd-priv;
+
+   for (i = 0; i  len; i++)
+   buf[i] = readb(this-IO_ADDR_R);
+}
+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   int ctrl = readl(NFCONT);
+
+   switch (chip) {
+   case -1:
+   ctrl |= 6;
+   break;
+   case 0:
+   ctrl = ~2;
+   break;
+   case 1:
+   ctrl = ~4;
+   break;
+   default:
+   return;
+   }
+
+   writel(ctrl, NFCONT);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ * Written by jsgood
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = (void __iomem *)NFCMMD;
+   else
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = (void __iomem *)NFADDR;
+   else
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   if (ctrl  NAND_NCE)
+   s3c_nand_select_chip(mtd, 0);
+   else
+   s3c_nand_select_chip(mtd, -1);
+   }
+
+   if (cmd != NAND_CMD_NONE)
+   writeb(cmd, this-IO_ADDR_W);
+}
+
+/*
+ * Function for checking device ready pin
+ * Written by jsgood
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   while (!(readl(NFSTAT)  NFSTAT_RnB)) {}
+   return 1;
+}
+
+#ifdef CFG_S3C_NAND_HWECC
+/*
+ * This function is called before encoding ecc codes to ready ecc engine.
+ * Written by jsgood
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   u_long nfcont, nfconf;
+
+   /*
+* The original driver used 4-bit ECC for new MLC chips, i.e., for
+* those

[U-Boot-Users] [PATCH 7/7 v5] ARM: Add support for S3C6400 based SMDK6400 board

[Guennadi Liakhovetski]

SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 MAKEALL|1 +
 Makefile   |   17 ++
 board/samsung/smdk6400/Makefile|   54 +
 board/samsung/smdk6400/config.mk   |   30 +++
 board/samsung/smdk6400/lowlevel_init.S |  316 
 board/samsung/smdk6400/smdk6400.c  |  130 
 board/samsung/smdk6400/u-boot-nand.lds |   62 ++
 include/configs/smdk6400.h |  304 ++
 nand_spl/board/samsung/smdk6400/Makefile   |  106 ++
 nand_spl/board/samsung/smdk6400/config.mk  |   40 
 nand_spl/board/samsung/smdk6400/u-boot.lds |   61 ++
 11 files changed, 1121 insertions(+), 0 deletions(-)
 create mode 100644 board/samsung/smdk6400/Makefile
 create mode 100644 board/samsung/smdk6400/config.mk
 create mode 100644 board/samsung/smdk6400/lowlevel_init.S
 create mode 100644 board/samsung/smdk6400/smdk6400.c
 create mode 100644 board/samsung/smdk6400/u-boot-nand.lds
 create mode 100644 include/configs/smdk6400.h
 create mode 100644 nand_spl/board/samsung/smdk6400/Makefile
 create mode 100644 nand_spl/board/samsung/smdk6400/config.mk
 create mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds

diff --git a/MAKEALL b/MAKEALL
index ee83cca..a3ed47d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -515,6 +515,7 @@ LIST_ARM11=\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   smdk6400\
 
 
 #
diff --git a/Makefile b/Makefile
index cb8c0f5..898b3f6 100644
--- a/Makefile
+++ b/Makefile
@@ -2686,6 +2686,23 @@ mx31ads_config   : unconfig
 omap2420h4_config  : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
+#
+## ARM1176 Systems
+#
+smdk6400_noUSB_config  \
+smdk6400_config:   unconfig
+   @mkdir -p $(obj)include $(obj)board/samsung/smdk6400
+   @mkdir -p $(obj)nand_spl/board/samsung/smdk6400
+   @echo #define CONFIG_NAND_U_BOOT  $(obj)include/config.h
+   @if [ -z $(findstring smdk6400_noUSB_config,$@) ]; then   
\
+   echo RAM_TEXT = 0x57e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx; 
\
+   else
\
+   echo RAM_TEXT = 0xc7e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung 
s3c64xx;   \
+   fi
+   @echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
+
 #
 # i386
 #
diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile
new file mode 100644
index 000..d35dc8b
--- /dev/null
+++ b/board/samsung/smdk6400/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# (C) Copyright 2008
+# Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := smdk6400.o
+SOBJS  := lowlevel_init.o
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(AR) crv $@ $(OBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+#.depend:  Makefile

Re: [U-Boot-Users] [PATCH 0/7 v5] SMDK6400 support

[Guennadi Liakhovetski]

On Tue, 5 Aug 2008, Scott Wood wrote:

 On Tue, Aug 05, 2008 at 03:36:33PM +0200, Guennadi Liakhovetski wrote:
  Version 5: This time based on nand-flash/testing head. Therefore it 
  couldn't be runtime-tested: largepage support in nand_spl is broken there 
  ATM.
 
 Hmm, so it is.  I don't have hardware that uses the cmd_ctrl interface to
 test on, so can you either fix it, or test my attempt at doing so (let me
 know which you prefer)?

I can test it, sure.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH 2/7 v3] NAND_CMD_READOOB is not supported by all chips, read OOB with the page instead

[Guennadi Liakhovetski]

On Tue, 5 Aug 2008, Scott Wood wrote:

 On Tue, Aug 05, 2008 at 03:08:04PM +0200, Guennadi Liakhovetski wrote:
  It's a large-page device. And, as far as I understand the datasheet, to 
  read data at arbitrary offset in a page, you first have to issue a READ 
  PAGE (READ0) for _the_ _whole_ page, then you can use RANDOM DATA READ to 
  read arbitrary data within this page. Whereas, the driver attempts to use 
  READ0 to read the bad-block marker directly, which doesn't work with this 
  chip. At least this is my understanding.
 
 Are you saying that your NAND chip can't read the OOB by issuing READ0
 with the appropriate column address?  Which chip is this, and where can I
 find a manual?

At least, this is how I understood it, I might be wrong though:

http://download.micron.com/pdf/datasheets/flash/nand/2_4_8gb_nand_m49a.pdf

pages 21, 22.

@@ -150,8 +135,6 @@ static int nand_read_page(struct mtd_info *mtd, int 
block, int page, uchar *dst)
u_char *ecc_code;
u_char *oob_data;
int i;
-   int eccsize = CFG_NAND_ECCSIZE;
-   int eccbytes = CFG_NAND_ECCBYTES;
   
   Any particular reason for this change?  It's more readable as is, IMHO.
  
  Acually, it was to improve readability:-) First, this way you can easier 
  grep.
 
 Grep will find the initialization.
 
  Secondly, when I see an assignment to a _variable_, I expect, that this
  variable's value can indeed _vary_. So, it makes extra work looking
  through the code and verifying what other values this variable takes. 
  Thus, at the very least I would add const to the definition. And, I
  do think using constants directly makes it clearer...
 
 It replaces a short lower-case name with a longer all-caps name that
 forces line breaks.  I'm fine with adding const.

Ok...

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH] NAND boot: Update large page support for current API.

[Guennadi Liakhovetski]

On Tue, 5 Aug 2008, Scott Wood wrote:

 Also, remove the ctrl variable in favor of passing the constants
 directly, and remove redundant (u8) casts.
 
 Signed-off-by: Scott Wood [EMAIL PROTECTED]
 ---
 This patch is untested, as I don't have the hardware.
 Applied to u-boot-nand-flash/testing.
 
  nand_spl/nand_boot.c |   50 
 --
  1 files changed, 20 insertions(+), 30 deletions(-)
 
 diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
 index 0f56ba5..81b4dfc 100644
 --- a/nand_spl/nand_boot.c
 +++ b/nand_spl/nand_boot.c
 @@ -37,7 +37,6 @@ static int nand_command(struct mtd_info *mtd, int block, 
 int page, int offs, u8
  {
   struct nand_chip *this = mtd-priv;
   int page_addr = page + block * CFG_NAND_PAGE_COUNT;
 - int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
  
   if (this-dev_ready)
   while (!this-dev_ready(mtd))
 @@ -46,18 +45,15 @@ static int nand_command(struct mtd_info *mtd, int block, 
 int page, int offs, u8
   CFG_NAND_READ_DELAY;
  
   /* Begin command latch cycle */
 - this-cmd_ctrl(mtd, cmd, ctrl);
 + this-cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);

[snip]

See? you do the same! You replace short lowercase variable with long 
uppercase macros:-) But I like this change, as well as mine - it makes it 
easier to follow the sources. I'll test your patch later - as soon as I 
get access to the hardware... Probably, tomorrow.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH 0/7 v2] SMDK6400 support

[Guennadi Liakhovetski]

Hi,

this is version 2 of the smdk6400 patch series. I hope, I took care of all
comments, apart of these ones:

On Thu, 31 Jul 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:

  +#ifdef CONFIG_NAND_SPL
  +static u_char nand_read_byte(struct mtd_info *mtd)
  +{
  +   struct nand_chip *this = mtd-priv;
 add an empty line
  +   return readb(this-IO_ADDR_R);
  +}
  +
  +static void nand_write_byte(struct mtd_info *mtd, u_char byte)
  +{
  +   struct nand_chip *this = mtd-priv;
 add an empty line
  +   writeb(byte, this-IO_ADDR_W);
  +}

Sorry, looks like a matter of taste to me. There are also very few lines 
over 80 characters left, but fixing them would look too awkward...

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH 1/7 v2] Add definition for the AM29LV800BB AMD NOR-flash

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/jedec_flash.c |   17 +
 1 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 9845e93..020647a 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -234,6 +234,23 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x1,7),
}
},
+   {
+   .mfr_id = MANUFACTURER_AMD,
+   .dev_id = AM29LV800BB,
+   .name   = AMD AM29LV800BB,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x04000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x1, 15),
+   }
+   },
 #endif
 };
 
-- 
1.5.4


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[U-Boot-Users] [PATCH 2/7 v2] NAND_CMD_READOOB is not supported by all chips, read OOB with the page instead

[Guennadi Liakhovetski]

I _think_ this should work with all NAND chips. Otherwise we might have to 
introduce a configuration variable.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 nand_spl/nand_boot.c |   61 +
 1 files changed, 31 insertions(+), 30 deletions(-)

diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 563a80b..78eaf75 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -128,21 +128,6 @@ static int nand_command(struct mtd_info *mtd, int block, 
int page, int offs, u8
 }
 #endif
 
-static int nand_is_bad_block(struct mtd_info *mtd, int block)
-{
-   struct nand_chip *this = mtd-priv;
-
-   nand_command(mtd, block, 0, CFG_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
-
-   /*
-* Read one byte
-*/
-   if (this-read_byte(mtd) != 0xff)
-   return 1;
-
-   return 0;
-}
-
 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar 
*dst)
 {
struct nand_chip *this = mtd-priv;
@@ -150,8 +135,6 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
u_char *ecc_code;
u_char *oob_data;
int i;
-   int eccsize = CFG_NAND_ECCSIZE;
-   int eccbytes = CFG_NAND_ECCBYTES;
int eccsteps = CFG_NAND_ECCSTEPS;
uint8_t *p = dst;
int stat;
@@ -163,11 +146,11 @@ static int nand_read_page(struct mtd_info *mtd, int 
block, int page, uchar *dst)
 */
ecc_calc = (u_char *)(CFG_SDRAM_BASE + 0x1);
ecc_code = ecc_calc + 0x100;
-   oob_data = ecc_calc + 0x200;
+   oob_data = p + CFG_NAND_PAGE_SIZE; /* Append OOB to the page data */
 
-   for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps; eccsteps--, i += CFG_NAND_ECCBYTES, p += 
CFG_NAND_ECCSIZE) {
this-enable_hwecc(mtd, NAND_ECC_READ);
-   this-read_buf(mtd, p, eccsize);
+   this-read_buf(mtd, p, CFG_NAND_ECCSIZE);
this-calculate_ecc(mtd, p, ecc_calc[i]);
}
this-read_buf(mtd, oob_data, CFG_NAND_OOBSIZE);
@@ -179,7 +162,7 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
eccsteps = CFG_NAND_ECCSTEPS;
p = dst;
 
-   for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps; eccsteps--, i += CFG_NAND_ECCBYTES, p += 
CFG_NAND_ECCSIZE) {
/* No chance to do something with the possible error message
 * from correct_data(). We just hope that all possible errors
 * are corrected by this routine.
@@ -195,6 +178,7 @@ static int nand_load(struct mtd_info *mtd, int offs, int 
uboot_size, uchar *dst)
int block;
int blockcopy_count;
int page;
+   unsigned read = 0;
 
/*
 * offs has to be aligned to a block address!
@@ -202,18 +186,29 @@ static int nand_load(struct mtd_info *mtd, int offs, int 
uboot_size, uchar *dst)
block = offs / CFG_NAND_BLOCK_SIZE;
blockcopy_count = 0;
 
-   while (blockcopy_count  (uboot_size / CFG_NAND_BLOCK_SIZE)) {
-   if (!nand_is_bad_block(mtd, block)) {
-   /*
-* Skip bad blocks
-*/
-   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
-   nand_read_page(mtd, block, page, dst);
-   dst += CFG_NAND_PAGE_SIZE;
+   while (blockcopy_count  ((uboot_size + CFG_NAND_BLOCK_SIZE - 1) / 
CFG_NAND_BLOCK_SIZE)) {
+   /*
+* Skip bad blocks
+*/
+   int badblock = 0;
+   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
+   nand_read_page(mtd, block, page, dst);
+   if ((!page
+#ifdef CFG_NAND_BBT_2NDPAGE
+|| page == 1
+#endif
+   )  dst[CFG_NAND_PAGE_SIZE] != 0xff) {
+   badblock = 1;
+   break;
}
+   /* Overwrite skipped pages */
+   if (read = offs)
+   dst += CFG_NAND_PAGE_SIZE;
+   read += CFG_NAND_PAGE_SIZE;
+   }
 
+   if (!badblock)
blockcopy_count++;
-   }
 
block++;
}
@@ -241,12 +236,18 @@ void nand_boot(void)
nand_chip.dev_ready = NULL; /* preset to NULL */
board_nand_init(nand_chip);
 
+   if (nand_chip.select_chip)
+   nand_chip.select_chip(nand_info, 0);
+
/*
 * Load U-Boot image from NAND into RAM
 */
ret = nand_load(nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
(uchar *)CFG_NAND_U_BOOT_DST);
 
+   if (nand_chip.select_chip

[U-Boot-Users] [PATCH 4/7 v2] USB: Add support for OHCI controller on s3c6400

[Guennadi Liakhovetski]

Notice: USB on s3c6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 cpu/arm1176/s3c64xx/Makefile |1 +
 cpu/arm1176/s3c64xx/usb.c|   45 ++
 drivers/usb/usb_ohci.c   |1 +
 3 files changed, 47 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm1176/s3c64xx/usb.c

diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile
index 66ac4aa..8cee691 100644
--- a/cpu/arm1176/s3c64xx/Makefile
+++ b/cpu/arm1176/s3c64xx/Makefile
@@ -27,6 +27,7 @@ LIB   = $(obj)lib$(SOC).a
 
 COBJS-y= interrupts.o
 COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
+COBJS-$(CONFIG_USB_OHCI_NEW) += usb.o
 
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
 
diff --git a/cpu/arm1176/s3c64xx/usb.c b/cpu/arm1176/s3c64xx/usb.c
new file mode 100644
index 000..274a4ed
--- /dev/null
+++ b/cpu/arm1176/s3c64xx/usb.c
@@ -0,0 +1,45 @@
+/*
+ * URB OHCI HCD (Host Controller Driver) initialization for USB on the S3C64XX.
+ *
+ * Copyright (C) 2008,
+ * Guennadi Liakhovetski, DENX Software Engineering [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include s3c6400.h
+
+int usb_cpu_init(void)
+{
+   OTHERS_REG |= 0x1;
+   return 0;
+}
+
+int usb_cpu_stop(void)
+{
+   OTHERS_REG = ~0x1;
+   return 0;
+}
+
+void usb_cpu_init_fail(void)
+{
+   OTHERS_REG = ~0x1;
+}
diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c
index fd60edb..0bfa4d7 100644
--- a/drivers/usb/usb_ohci.c
+++ b/drivers/usb/usb_ohci.c
@@ -69,6 +69,7 @@
 #if defined(CONFIG_ARM920T) || \
 defined(CONFIG_S3C2400) || \
 defined(CONFIG_S3C2410) || \
+defined(CONFIG_S3C6400) || \
 defined(CONFIG_440EP) || \
 defined(CONFIG_PCI_OHCI) || \
 defined(CONFIG_MPC5200) || \
-- 
1.5.4


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[U-Boot-Users] [PATCH 5/7 v2] serial: add s3c64xx serial driver

[Guennadi Liakhovetski]

Ported from u-boot-1.1.6 driver by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/serial/Makefile  |1 +
 drivers/serial/s3c64xx.c |  186 ++
 2 files changed, 187 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/s3c64xx.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index c9e797e..2a11ae5 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -30,6 +30,7 @@ COBJS-y += mcfuart.o
 COBJS-y += ns9750_serial.o
 COBJS-y += ns16550.o
 COBJS-y += s3c4510b_uart.o
+COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
 COBJS-y += serial.o
 COBJS-y += serial_max3100.o
 COBJS-y += serial_pl010.o
diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c
new file mode 100644
index 000..1763bc3
--- /dev/null
+++ b/drivers/serial/s3c64xx.c
@@ -0,0 +1,186 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include common.h
+
+#include s3c6400.h
+
+#ifdef CONFIG_SERIAL1
+#define UART_NRS3C64XX_UART0
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C64XX_UART1
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C64XX_UART2
+
+#else
+#error Bad: you didn't configure serial ...
+#endif
+
+#define barrier() asm volatile( ::: memory)
+
+/* See table in 31.6.11 */
+static const int udivslot[] = {
+   0,
+   0x0080,
+   0x0808,
+   0x0888,
+   0x,
+   0x4924,
+   0x4a52,
+   0x54aa,
+   0x,
+   0xd555,
+   0xd5d5,
+   0xddd5,
+   0x,
+   0xdfdd,
+   0xdfdf,
+   0xffdf,
+};
+
+void serial_setbrg(void)
+{
+   DECLARE_GLOBAL_DATA_PTR;
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+   u32 reg, pclk_ratio = get_PCLK() / gd-baudrate;
+   int i;
+
+   /* PCLK / (16 * baudrate) - 1 */
+   reg = pclk_ratio / 16 - 1;
+   i = pclk_ratio - (reg + 1) * 16;
+
+   uart-UBRDIV = reg;
+   uart-UDIVSLOT = udivslot[i];
+
+   for (i = 0; i  100; i++)
+   barrier();
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ *
+ */
+int serial_init(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* reset and enable FIFOs, set triggers to the maximum */
+   uart-UFCON = 0xff;
+   uart-UMCON = 0;
+   /* 8N1 */
+   uart-ULCON = 3;
+   /* No interrupts, no DMA, pure polling */
+   uart-UCON = 5;
+
+   serial_setbrg();
+
+   return 0;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+int serial_getc(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* wait for character to arrive */
+   while (!(uart-UTRSTAT  0x1));
+
+   return uart-URXH  0xff;
+}
+
+#ifdef CONFIG_HWFLOW
+static int hwflow = 0; /* turned off by default */
+int hwflow_onoff(int on)
+{
+   switch (on) {
+   case 1:
+   hwflow = 1; /* turn on */
+   break;
+   case -1:
+   hwflow = 0; /* turn off */
+   break;
+   }
+   return hwflow;
+}
+#endif
+
+#ifdef CONFIG_MODEM_SUPPORT
+static int be_quiet;
+void disable_putc(void)
+{
+   be_quiet = 1;
+}
+
+void enable_putc(void)
+{
+   be_quiet = 0;
+}
+#endif
+
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc(const char c)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+#ifdef CONFIG_MODEM_SUPPORT
+   if (be_quiet)
+   return;
+#endif
+
+   /* wait for room in the tx FIFO */
+   while (!(uart-UTRSTAT  0x2));
+
+#ifdef CONFIG_HWFLOW
+   /* Wait for CTS up */
+   while (hwflow  !(uart-UMSTAT  0x1));
+#endif
+
+   uart-UTXH = c;
+
+   /* If \n, also do \r */
+   if (c == '\n')
+   serial_putc('\r');
+}
+
+/*
+ * Test whether a character is in the RX buffer
+ */
+int serial_tstc(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   return

[U-Boot-Users] [PATCH 6/7 v2] NAND: add NAND driver for s3c64xx

[Guennadi Liakhovetski]

Ported from u-boot-1.1.6 driver by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/nand/Makefile  |1 +
 drivers/mtd/nand/s3c64xx.c |  307 
 2 files changed, 308 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/s3c64xx.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 7bd22a0..236cf03 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -33,6 +33,7 @@ COBJS-y += nand_bbt.o
 COBJS-y += nand_util.o
 
 COBJS-y += fsl_upm.o
+COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
new file mode 100644
index 000..f2211f7
--- /dev/null
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -0,0 +1,307 @@
+/*
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * Implementation for U-Boot 1.1.6 by Samsung
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#include nand.h
+#include s3c6400.h
+
+#include asm/io.h
+
+#ifdef CONFIG_NAND_SPL
+#define printf(arg...) do {} while (0)
+#endif
+
+/* Nand flash definition values by jsgood */
+#ifdef S3C_NAND_DEBUG
+/*
+ * Function to print out oob buffer for debugging
+ * Written by jsgood
+ */
+static void print_oob(const char *header, struct mtd_info *mtd)
+{
+   int i;
+   struct nand_chip *chip = mtd-priv;
+
+   printf(%s:\t, header);
+
+   for(i = 0; i  64; i++)
+   printf(%02x , chip-oob_poi[i]);
+
+   printf(\n);
+}
+#endif /* S3C_NAND_DEBUG */
+
+#ifdef CONFIG_NAND_SPL
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+   struct nand_chip *this = mtd-priv;
+   return readb(this-IO_ADDR_R);
+}
+
+static void nand_write_byte(struct mtd_info *mtd, u_char byte)
+{
+   struct nand_chip *this = mtd-priv;
+   writeb(byte, this-IO_ADDR_W);
+}
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+   int i;
+   struct nand_chip *this = mtd-priv;
+
+   for (i = 0; i  len; i++)
+   buf[i] = readb(this-IO_ADDR_R);
+}
+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   int ctrl = readl(NFCONT);
+
+   switch (chip) {
+   case -1:
+   ctrl |= 6;
+   break;
+   case 0:
+   ctrl = ~2;
+   break;
+   case 1:
+   ctrl = ~4;
+   break;
+   default:
+   return;
+   }
+
+   writel(ctrl, NFCONT);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ * Written by jsgood
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+   struct nand_chip *this = mtd-priv;
+
+   switch (cmd) {
+   case NAND_CTL_SETCLE:
+   this-IO_ADDR_W = (void __iomem *)NFCMMD;
+   break;
+   case NAND_CTL_CLRCLE:
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   break;
+   case NAND_CTL_SETALE:
+   this-IO_ADDR_W = (void __iomem *)NFADDR;
+   break;
+   case NAND_CTL_CLRALE:
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   break;
+   case NAND_CTL_SETNCE:
+   s3c_nand_select_chip(mtd, 0);
+   break;
+   case NAND_CTL_CLRNCE:
+   s3c_nand_select_chip(mtd, -1);
+   break;
+   }
+}
+
+/*
+ * Function for checking device ready pin
+ * Written by jsgood
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   while (!(readl(NFSTAT)  NFSTAT_RnB)) {}
+   return 1;
+}
+
+#ifdef CFG_S3C_NAND_HWECC
+/*
+ * This function is called before encoding ecc codes to ready ecc engine.
+ * Written by jsgood
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   u_long nfcont, nfconf;
+
+   /*
+* The original driver used 4-bit ECC for new MLC chips, i.e., for
+* those with non-zero ID[3][3:2], which anyway only holds for ST
+* (Numonyx) chips
+*/
+   nfconf = readl(NFCONF)  ~NFCONF_ECC_4BIT

[U-Boot-Users] [PATCH 7/7 v2] ARM: Add support for S3C6400 based SMDK6400 board

[Guennadi Liakhovetski]

SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl 
driver for it too. The board can also boot from the NOR flash, but due to 
hardware limitations it can only address 64KiB on it, which is not enough 
for U-Boot. Ported from u-boot-1.1.6 version by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 MAKEALL|1 +
 Makefile   |   17 ++
 board/samsung/smdk6400/Makefile|   54 +
 board/samsung/smdk6400/config.mk   |   30 +++
 board/samsung/smdk6400/lowlevel_init.S |  316 
 board/samsung/smdk6400/smdk6400.c  |  130 
 board/samsung/smdk6400/u-boot-nand.lds |   62 ++
 include/configs/smdk6400.h |  304 ++
 nand_spl/board/samsung/smdk6400/Makefile   |  106 ++
 nand_spl/board/samsung/smdk6400/config.mk  |   40 
 nand_spl/board/samsung/smdk6400/u-boot.lds |   61 ++
 11 files changed, 1121 insertions(+), 0 deletions(-)
 create mode 100644 board/samsung/smdk6400/Makefile
 create mode 100644 board/samsung/smdk6400/config.mk
 create mode 100644 board/samsung/smdk6400/lowlevel_init.S
 create mode 100644 board/samsung/smdk6400/smdk6400.c
 create mode 100644 board/samsung/smdk6400/u-boot-nand.lds
 create mode 100644 include/configs/smdk6400.h
 create mode 100644 nand_spl/board/samsung/smdk6400/Makefile
 create mode 100644 nand_spl/board/samsung/smdk6400/config.mk
 create mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds

diff --git a/MAKEALL b/MAKEALL
index ee83cca..a3ed47d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -515,6 +515,7 @@ LIST_ARM11=\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   smdk6400\
 
 
 #
diff --git a/Makefile b/Makefile
index b104617..0c5b8a6 100644
--- a/Makefile
+++ b/Makefile
@@ -2677,6 +2677,23 @@ mx31ads_config   : unconfig
 omap2420h4_config  : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
+#
+## ARM1176 Systems
+#
+smdk6400_noUSB_config  \
+smdk6400_config:   unconfig
+   @mkdir -p $(obj)include $(obj)board/samsung/smdk6400
+   @mkdir -p $(obj)nand_spl/board/samsung/smdk6400
+   @echo #define CONFIG_NAND_U_BOOT  $(obj)include/config.h
+   @if [ -z $(findstring smdk6400_noUSB_config,$@) ]; then   
\
+   echo RAM_TEXT = 0x57e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx; 
\
+   else
\
+   echo RAM_TEXT = 0xc7e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung 
s3c64xx;   \
+   fi
+   @echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
+
 #
 # i386
 #
diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile
new file mode 100644
index 000..d35dc8b
--- /dev/null
+++ b/board/samsung/smdk6400/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# (C) Copyright 2008
+# Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := smdk6400.o
+SOBJS  := lowlevel_init.o
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(AR) crv $@ $(OBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+#.depend:  Makefile $(SOBJS:.o=.S

[U-Boot-Users] [PATCH 0/7 v3] SMDK6400 support

[Guennadi Liakhovetski]

Version 3: now all lines over 80 characters are gone.  And a couple more 
checkpatch warnings with them.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]


-
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[U-Boot-Users] [PATCH 1/7 v3] Add definition for the AM29LV800BB AMD NOR-flash

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/jedec_flash.c |   17 +
 1 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 9845e93..020647a 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -234,6 +234,23 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x1,7),
}
},
+   {
+   .mfr_id = MANUFACTURER_AMD,
+   .dev_id = AM29LV800BB,
+   .name   = AMD AM29LV800BB,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x04000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x1, 15),
+   }
+   },
 #endif
 };
 
-- 
1.5.4


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[U-Boot-Users] [PATCH 2/7 v3] NAND_CMD_READOOB is not supported by all chips, read OOB with the page instead

[Guennadi Liakhovetski]

I _think_ this should work with all NAND chips. Otherwise we might have to 
introduce a configuration variable.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 nand_spl/nand_boot.c |   64 ++---
 1 files changed, 34 insertions(+), 30 deletions(-)

diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 563a80b..0de4c4b 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -128,21 +128,6 @@ static int nand_command(struct mtd_info *mtd, int block, 
int page, int offs, u8
 }
 #endif
 
-static int nand_is_bad_block(struct mtd_info *mtd, int block)
-{
-   struct nand_chip *this = mtd-priv;
-
-   nand_command(mtd, block, 0, CFG_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
-
-   /*
-* Read one byte
-*/
-   if (this-read_byte(mtd) != 0xff)
-   return 1;
-
-   return 0;
-}
-
 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar 
*dst)
 {
struct nand_chip *this = mtd-priv;
@@ -150,8 +135,6 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
u_char *ecc_code;
u_char *oob_data;
int i;
-   int eccsize = CFG_NAND_ECCSIZE;
-   int eccbytes = CFG_NAND_ECCBYTES;
int eccsteps = CFG_NAND_ECCSTEPS;
uint8_t *p = dst;
int stat;
@@ -163,11 +146,12 @@ static int nand_read_page(struct mtd_info *mtd, int 
block, int page, uchar *dst)
 */
ecc_calc = (u_char *)(CFG_SDRAM_BASE + 0x1);
ecc_code = ecc_calc + 0x100;
-   oob_data = ecc_calc + 0x200;
+   oob_data = p + CFG_NAND_PAGE_SIZE; /* Append OOB to the page data */
 
-   for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps;
+eccsteps--, i += CFG_NAND_ECCBYTES, p += CFG_NAND_ECCSIZE) {
this-enable_hwecc(mtd, NAND_ECC_READ);
-   this-read_buf(mtd, p, eccsize);
+   this-read_buf(mtd, p, CFG_NAND_ECCSIZE);
this-calculate_ecc(mtd, p, ecc_calc[i]);
}
this-read_buf(mtd, oob_data, CFG_NAND_OOBSIZE);
@@ -179,7 +163,8 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
eccsteps = CFG_NAND_ECCSTEPS;
p = dst;
 
-   for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps;
+eccsteps--, i += CFG_NAND_ECCBYTES, p += CFG_NAND_ECCSIZE) {
/* No chance to do something with the possible error message
 * from correct_data(). We just hope that all possible errors
 * are corrected by this routine.
@@ -195,6 +180,7 @@ static int nand_load(struct mtd_info *mtd, int offs, int 
uboot_size, uchar *dst)
int block;
int blockcopy_count;
int page;
+   unsigned read = 0;
 
/*
 * offs has to be aligned to a block address!
@@ -202,18 +188,30 @@ static int nand_load(struct mtd_info *mtd, int offs, int 
uboot_size, uchar *dst)
block = offs / CFG_NAND_BLOCK_SIZE;
blockcopy_count = 0;
 
-   while (blockcopy_count  (uboot_size / CFG_NAND_BLOCK_SIZE)) {
-   if (!nand_is_bad_block(mtd, block)) {
-   /*
-* Skip bad blocks
-*/
-   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
-   nand_read_page(mtd, block, page, dst);
-   dst += CFG_NAND_PAGE_SIZE;
+   while (blockcopy_count  ((uboot_size + CFG_NAND_BLOCK_SIZE - 1) /
+ CFG_NAND_BLOCK_SIZE)) {
+   /*
+* Skip bad blocks
+*/
+   int badblock = 0;
+   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
+   nand_read_page(mtd, block, page, dst);
+   if ((!page
+#ifdef CFG_NAND_BBT_2NDPAGE
+|| page == 1
+#endif
+   )  dst[CFG_NAND_PAGE_SIZE] != 0xff) {
+   badblock = 1;
+   break;
}
+   /* Overwrite skipped pages */
+   if (read = offs)
+   dst += CFG_NAND_PAGE_SIZE;
+   read += CFG_NAND_PAGE_SIZE;
+   }
 
+   if (!badblock)
blockcopy_count++;
-   }
 
block++;
}
@@ -241,12 +239,18 @@ void nand_boot(void)
nand_chip.dev_ready = NULL; /* preset to NULL */
board_nand_init(nand_chip);
 
+   if (nand_chip.select_chip)
+   nand_chip.select_chip(nand_info, 0);
+
/*
 * Load U-Boot image from NAND into RAM
 */
ret = nand_load(nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
(uchar

[U-Boot-Users] [PATCH 4/7 v3] USB: Add support for OHCI controller on s3c6400

[Guennadi Liakhovetski]

Notice: USB on s3c6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 cpu/arm1176/s3c64xx/Makefile |1 +
 cpu/arm1176/s3c64xx/usb.c|   45 ++
 drivers/usb/usb_ohci.c   |1 +
 3 files changed, 47 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm1176/s3c64xx/usb.c

diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile
index fa4ee3f..4ab1811 100644
--- a/cpu/arm1176/s3c64xx/Makefile
+++ b/cpu/arm1176/s3c64xx/Makefile
@@ -30,6 +30,7 @@ LIB   = $(obj)lib$(SOC).a
 
 COBJS-y= interrupts.o
 COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
+COBJS-$(CONFIG_USB_OHCI_NEW) += usb.o
 
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
 
diff --git a/cpu/arm1176/s3c64xx/usb.c b/cpu/arm1176/s3c64xx/usb.c
new file mode 100644
index 000..274a4ed
--- /dev/null
+++ b/cpu/arm1176/s3c64xx/usb.c
@@ -0,0 +1,45 @@
+/*
+ * URB OHCI HCD (Host Controller Driver) initialization for USB on the S3C64XX.
+ *
+ * Copyright (C) 2008,
+ * Guennadi Liakhovetski, DENX Software Engineering [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include s3c6400.h
+
+int usb_cpu_init(void)
+{
+   OTHERS_REG |= 0x1;
+   return 0;
+}
+
+int usb_cpu_stop(void)
+{
+   OTHERS_REG = ~0x1;
+   return 0;
+}
+
+void usb_cpu_init_fail(void)
+{
+   OTHERS_REG = ~0x1;
+}
diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c
index fd60edb..0bfa4d7 100644
--- a/drivers/usb/usb_ohci.c
+++ b/drivers/usb/usb_ohci.c
@@ -69,6 +69,7 @@
 #if defined(CONFIG_ARM920T) || \
 defined(CONFIG_S3C2400) || \
 defined(CONFIG_S3C2410) || \
+defined(CONFIG_S3C6400) || \
 defined(CONFIG_440EP) || \
 defined(CONFIG_PCI_OHCI) || \
 defined(CONFIG_MPC5200) || \
-- 
1.5.4


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[U-Boot-Users] [PATCH 5/7 v3] serial: add s3c64xx serial driver

[Guennadi Liakhovetski]

Ported from u-boot-1.1.6 driver by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---

Also added my copyright to the driver.

 drivers/serial/Makefile  |1 +
 drivers/serial/s3c64xx.c |  189 ++
 2 files changed, 190 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/s3c64xx.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index c9e797e..2a11ae5 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -30,6 +30,7 @@ COBJS-y += mcfuart.o
 COBJS-y += ns9750_serial.o
 COBJS-y += ns16550.o
 COBJS-y += s3c4510b_uart.o
+COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
 COBJS-y += serial.o
 COBJS-y += serial_max3100.o
 COBJS-y += serial_pl010.o
diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c
new file mode 100644
index 000..9580909
--- /dev/null
+++ b/drivers/serial/s3c64xx.c
@@ -0,0 +1,189 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include common.h
+
+#include s3c6400.h
+
+#ifdef CONFIG_SERIAL1
+#define UART_NRS3C64XX_UART0
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C64XX_UART1
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C64XX_UART2
+
+#else
+#error Bad: you didn't configure serial ...
+#endif
+
+#define barrier() asm volatile( ::: memory)
+
+/* See table in 31.6.11 */
+static const int udivslot[] = {
+   0,
+   0x0080,
+   0x0808,
+   0x0888,
+   0x,
+   0x4924,
+   0x4a52,
+   0x54aa,
+   0x,
+   0xd555,
+   0xd5d5,
+   0xddd5,
+   0x,
+   0xdfdd,
+   0xdfdf,
+   0xffdf,
+};
+
+void serial_setbrg(void)
+{
+   DECLARE_GLOBAL_DATA_PTR;
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+   u32 reg, pclk_ratio = get_PCLK() / gd-baudrate;
+   int i;
+
+   /* PCLK / (16 * baudrate) - 1 */
+   reg = pclk_ratio / 16 - 1;
+   i = pclk_ratio - (reg + 1) * 16;
+
+   uart-UBRDIV = reg;
+   uart-UDIVSLOT = udivslot[i];
+
+   for (i = 0; i  100; i++)
+   barrier();
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ *
+ */
+int serial_init(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* reset and enable FIFOs, set triggers to the maximum */
+   uart-UFCON = 0xff;
+   uart-UMCON = 0;
+   /* 8N1 */
+   uart-ULCON = 3;
+   /* No interrupts, no DMA, pure polling */
+   uart-UCON = 5;
+
+   serial_setbrg();
+
+   return 0;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+int serial_getc(void)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+   /* wait for character to arrive */
+   while (!(uart-UTRSTAT  0x1));
+
+   return uart-URXH  0xff;
+}
+
+#ifdef CONFIG_HWFLOW
+static int hwflow; /* turned off by default */
+int hwflow_onoff(int on)
+{
+   switch (on) {
+   case 1:
+   hwflow = 1; /* turn on */
+   break;
+   case -1:
+   hwflow = 0; /* turn off */
+   break;
+   }
+   return hwflow;
+}
+#endif
+
+#ifdef CONFIG_MODEM_SUPPORT
+static int be_quiet;
+void disable_putc(void)
+{
+   be_quiet = 1;
+}
+
+void enable_putc(void)
+{
+   be_quiet = 0;
+}
+#endif
+
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc(const char c)
+{
+   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+
+#ifdef CONFIG_MODEM_SUPPORT
+   if (be_quiet)
+   return;
+#endif
+
+   /* wait for room in the tx FIFO */
+   while (!(uart-UTRSTAT  0x2));
+
+#ifdef CONFIG_HWFLOW
+   /* Wait for CTS up */
+   while (hwflow  !(uart-UMSTAT  0x1));
+#endif
+
+   uart-UTXH = c;
+
+   /* If \n, also do \r */
+   if (c == '\n')
+   serial_putc('\r');
+}
+
+/*
+ * Test whether

[U-Boot-Users] [PATCH 6/7 v3] NAND: add NAND driver for s3c64xx

[Guennadi Liakhovetski]

Ported from u-boot-1.1.6 driver by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/nand/Makefile  |1 +
 drivers/mtd/nand/s3c64xx.c |  307 
 2 files changed, 308 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/s3c64xx.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 7bd22a0..236cf03 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -33,6 +33,7 @@ COBJS-y += nand_bbt.o
 COBJS-y += nand_util.o
 
 COBJS-y += fsl_upm.o
+COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
new file mode 100644
index 000..162ec26
--- /dev/null
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -0,0 +1,307 @@
+/*
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * Implementation for U-Boot 1.1.6 by Samsung
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#include nand.h
+#include s3c6400.h
+
+#include asm/io.h
+
+#ifdef CONFIG_NAND_SPL
+#define printf(arg...) do {} while (0)
+#endif
+
+/* Nand flash definition values by jsgood */
+#ifdef S3C_NAND_DEBUG
+/*
+ * Function to print out oob buffer for debugging
+ * Written by jsgood
+ */
+static void print_oob(const char *header, struct mtd_info *mtd)
+{
+   int i;
+   struct nand_chip *chip = mtd-priv;
+
+   printf(%s:\t, header);
+
+   for (i = 0; i  64; i++)
+   printf(%02x , chip-oob_poi[i]);
+
+   printf(\n);
+}
+#endif /* S3C_NAND_DEBUG */
+
+#ifdef CONFIG_NAND_SPL
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+   struct nand_chip *this = mtd-priv;
+   return readb(this-IO_ADDR_R);
+}
+
+static void nand_write_byte(struct mtd_info *mtd, u_char byte)
+{
+   struct nand_chip *this = mtd-priv;
+   writeb(byte, this-IO_ADDR_W);
+}
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+   int i;
+   struct nand_chip *this = mtd-priv;
+
+   for (i = 0; i  len; i++)
+   buf[i] = readb(this-IO_ADDR_R);
+}
+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   int ctrl = readl(NFCONT);
+
+   switch (chip) {
+   case -1:
+   ctrl |= 6;
+   break;
+   case 0:
+   ctrl = ~2;
+   break;
+   case 1:
+   ctrl = ~4;
+   break;
+   default:
+   return;
+   }
+
+   writel(ctrl, NFCONT);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ * Written by jsgood
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+   struct nand_chip *this = mtd-priv;
+
+   switch (cmd) {
+   case NAND_CTL_SETCLE:
+   this-IO_ADDR_W = (void __iomem *)NFCMMD;
+   break;
+   case NAND_CTL_CLRCLE:
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   break;
+   case NAND_CTL_SETALE:
+   this-IO_ADDR_W = (void __iomem *)NFADDR;
+   break;
+   case NAND_CTL_CLRALE:
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   break;
+   case NAND_CTL_SETNCE:
+   s3c_nand_select_chip(mtd, 0);
+   break;
+   case NAND_CTL_CLRNCE:
+   s3c_nand_select_chip(mtd, -1);
+   break;
+   }
+}
+
+/*
+ * Function for checking device ready pin
+ * Written by jsgood
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   while (!(readl(NFSTAT)  NFSTAT_RnB)) {}
+   return 1;
+}
+
+#ifdef CFG_S3C_NAND_HWECC
+/*
+ * This function is called before encoding ecc codes to ready ecc engine.
+ * Written by jsgood
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   u_long nfcont, nfconf;
+
+   /*
+* The original driver used 4-bit ECC for new MLC chips, i.e., for
+* those with non-zero ID[3][3:2], which anyway only holds for ST
+* (Numonyx) chips
+*/
+   nfconf = readl(NFCONF)  ~NFCONF_ECC_4BIT

Re: [U-Boot-Users] [PATCH 7/7 v3] ARM: Add support for S3C6400 based SMDK6400 board

[Guennadi Liakhovetski]

This is just to apologise for not CC-ing the ARM-maintainer in the 
original post. I did forward him the patch afterwards, sorry.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH 4/7 v3] USB: Add support for OHCI controller on s3c6400

[Guennadi Liakhovetski]

On Mon, 4 Aug 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:

  diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c
  index fd60edb..0bfa4d7 100644
  --- a/drivers/usb/usb_ohci.c
  +++ b/drivers/usb/usb_ohci.c
  @@ -69,6 +69,7 @@
   #if defined(CONFIG_ARM920T) || \
   defined(CONFIG_S3C2400) || \
   defined(CONFIG_S3C2410) || \
  +defined(CONFIG_S3C6400) || \
   defined(CONFIG_440EP) || \
   defined(CONFIG_PCI_OHCI) || \
   defined(CONFIG_MPC5200) || \
 
 Can we start to avoid 10km if defined in the code?
 
 Maybe we can find an other way do it?

Sure, I think, the USB-custodian will be glad to see patches.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

-
This SF.Net email is sponsored by the Moblin Your Move Developer's challenge
Build the coolest Linux based applications with Moblin SDK  win great prizes
Grand prize is a trip for two to an Open Source event anywhere in the world
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Re: [U-Boot-Users] [PATCH 5/7 v3] serial: add s3c64xx serial driver

[Guennadi Liakhovetski]

On Mon, 4 Aug 2008, Jean-Christophe PLAGNIOL-VILLARD wrote:

 On 14:45 Mon 04 Aug , Guennadi Liakhovetski wrote:
  Ported from u-boot-1.1.6 driver by Samsung.
  
  Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
  ---
  
  Also added my copyright to the driver.
  
   drivers/serial/Makefile  |1 +
   drivers/serial/s3c64xx.c |  189 
  ++
   2 files changed, 190 insertions(+), 0 deletions(-)
   create mode 100644 drivers/serial/s3c64xx.c
  
  diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
  index c9e797e..2a11ae5 100644
  --- a/drivers/serial/Makefile
  +++ b/drivers/serial/Makefile
  @@ -30,6 +30,7 @@ COBJS-y += mcfuart.o
   COBJS-y += ns9750_serial.o
   COBJS-y += ns16550.o
   COBJS-y += s3c4510b_uart.o
  +COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
   COBJS-y += serial.o
   COBJS-y += serial_max3100.o
   COBJS-y += serial_pl010.o
 I've send a patch that break it.
 
 Could you rebase it on the current Wolfgang tree HEAD?

Ok, will have a look.

  +/* See table in 31.6.11 */
  +static const int udivslot[] = {
  +   0,
  +   0x0080,
  +   0x0808,
  +   0x0888,
  +   0x,
  +   0x4924,
  +   0x4a52,
  +   0x54aa,
  +   0x,
  +   0xd555,
  +   0xd5d5,
  +   0xddd5,
  +   0x,
  +   0xdfdd,
  +   0xdfdf,
  +   0xffdf,
  +};
 Can we have something more readable?

No. This are recommended values as mentioned in the comment to the table 
referenced above.

  +void serial_setbrg(void)
  +{
  +   DECLARE_GLOBAL_DATA_PTR;
  +   s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
  +   u32 reg, pclk_ratio = get_PCLK() / gd-baudrate;
 why not
   u32 reg;
   u32 pclk_ratio = get_PCLK() / gd-baudrate;

There is more than one way to do it.

  +   int i;
  +
  +   /* PCLK / (16 * baudrate) - 1 */
  +   reg = pclk_ratio / 16 - 1;
  +   i = pclk_ratio - (reg + 1) * 16;
 =
   i = pclk_ratio - (pclk_ratio / 16 - 1 + 1) * 16;
 =
   i = pclk_ratio - (pclk_ratio / 16 ) * 16;
 =
   i = pclk_ratio - pclk_ratio;
 =
   i = 0;

Please, think again. This is integer arithmetics, not analysis.

  +
  +   uart-UBRDIV = reg;
  +   uart-UDIVSLOT = udivslot[i];
 base on the cose
   uart-UDIVSLOT = udivslot[0];

See above.

  +static int hwflow; /* turned off by default */
 why not?
 static int hwflow = 0;/* turned off by default */

Because static are always initialised to 0, and, in fact, checkpatch.pl 
produces warnings on these, and rightfully so.

  +static int be_quiet;
 why not?
 static int be_quiet = 0;

See above.

Thanks for your comments
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH 6/7] NAND: add NAND driver for s3c64xx

[Guennadi Liakhovetski]

On Thu, 31 Jul 2008, Wolfgang Denk wrote:

  --- /dev/null
  +++ b/drivers/mtd/nand/s3c64xx.c
  @@ -0,0 +1,315 @@
  +/*
  + * (C) Copyright 2006 DENX Software Engineering
 
 Please add your name here.

I will add my copyright in a couple of files, but I would rather not add 
it to Makefiles. Below I quote an earlier post on this list (funnily, I 
wasn't able to get it in sourceforge's archive...), which addresses 
Copyrights in Makefiles. To me it sounds reasonable, because in my example 
I really added very little IP to it, almost exclusively copy-paste from 
other Makefiles. What I learned, is one may never delete copyrights from 
files, ones they are there, that's why I preserved yours - that's how this 
file was in Samsung's version. But I don't think my Copyright there will 
serve any good purpose.

  +/*
  + * Function to print out oob buffer for debugging
  + * Written by jsgood
 
 Then jsgood should be mentioned in the (C) lines?

Is it allowed to add other peaople's copyright without their consent?

I am working on the rest comments... cleaning up others' mess.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

###
### QUOTED MAIL ###
###

From [EMAIL PROTECTED] Wed Jul  9 14:11:51 2008
Date: Wed, 09 Jul 2008 08:09:10 -0400
From: Jerry Van Baren [EMAIL PROTECTED]
To: Guennadi Liakhovetski [EMAIL PROTECTED]
Cc: Jens Gehrlein [EMAIL PROTECTED], u-boot-users@lists.sourceforge.net
Subject: Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with 
i.MX31 processor

Guennadi Liakhovetski wrote:
 On Tue, 8 Jul 2008, Jens Gehrlein wrote:
 
  diff --git a/board/tqc/tqma31/Makefile b/board/tqc/tqma31/Makefile
  new file mode 100644
  index 000..f7e17c8
  --- /dev/null
  +++ b/board/tqc/tqma31/Makefile
  @@ -0,0 +1,48 @@
  +#
  +# Copyright (C) 2008, Guennadi Liakhovetski [EMAIL PROTECTED]
  +# Copyright (C) 2008, Jens Gehrlein [EMAIL PROTECTED]
 
 Thanks for the credit, but, although IANAL, I think, one does not _have_ to
 preserve the copyright of the original file when it gets copied to a new one.
 Otherwise most open-source files would have a vry long list of
 Copyrights:-) Am I right?
 
 Thanks
 Guennadi

IANAL, but I play one on Groklaw sometimes, much to PJ's chagrin. ;-)

This is a squishy area.  It is dependent on what of the original work survives
the modification and whether the surviving pieces are copyrightable.  It also
depends on what country you are contemplating suing in.

http://en.wikipedia.org/wiki/Limitations_and_exceptions_to_copyright

Things that must be done in certain ways are not copyrightable, so Makefiles are
pretty marginal to start with IMHO.

http://en.wikipedia.org/wiki/Threshold_of_originality

My opinion is to leave the original copyright notice in there and err on the
side of preserving reasonable copyright notices.  The lawyers will be happy to
tell us that we did it wrong if it ever came to a lawsuit, and I would prefer
that they tell us that we had a useless copyright notice in the file rather than
tell us that we should have had a notice but didn't...

Best regards,
gvb


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[U-Boot-Users] [PATCH] Uncompressed images loaded to their start address shall set load_end too

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 common/cmd_bootm.c |5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 4040a69..7ad04b9 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -251,10 +251,9 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char 
*argv[])
 
memmove_wd ((void *)load_start,
   (void *)os_data, os_len, CHUNKSZ);
-
-   load_end = load_start + os_len;
-   puts(OK\n);
}
+   load_end = load_start + os_len;
+   puts(OK\n);
break;
case IH_COMP_GZIP:
printf (   Uncompressing %s ... , type_name);

-- 
1.5.4

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[U-Boot-Users] [PATCH] NAND: Do not write or read a whole block if it is larger than the environment

[Guennadi Liakhovetski]

Environment can be smaller than NAND block size, do not need to read a whole
block and minimum for writing is one page. Also remove an unused variable.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 common/env_nand.c |   18 +-
 1 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/common/env_nand.c b/common/env_nand.c
index 104f085..2a80bef 100644
--- a/common/env_nand.c
+++ b/common/env_nand.c
@@ -159,22 +159,23 @@ int writeenv(size_t offset, u_char *buf)
 {
size_t end = offset + CFG_ENV_RANGE;
size_t amount_saved = 0;
-   size_t blocksize;
+   size_t blocksize, len;
 
u_char *char_ptr;
 
blocksize = nand_info[0].erasesize;
+   len = min(blocksize, CFG_ENV_RANGE);
 
while (amount_saved  CFG_ENV_SIZE  offset  end) {
if (nand_block_isbad(nand_info[0], offset)) {
offset += blocksize;
} else {
char_ptr = buf[amount_saved];
-   if (nand_write(nand_info[0], offset, blocksize,
+   if (nand_write(nand_info[0], offset, len,
char_ptr))
return 1;
offset += blocksize;
-   amount_saved += blocksize;
+   amount_saved += len;
}
}
if (amount_saved != CFG_ENV_SIZE)
@@ -261,21 +262,22 @@ int readenv (size_t offset, u_char * buf)
 {
size_t end = offset + CFG_ENV_RANGE;
size_t amount_loaded = 0;
-   size_t blocksize;
+   size_t blocksize, len;
 
u_char *char_ptr;
 
blocksize = nand_info[0].erasesize;
+   len = min(blocksize, CFG_ENV_RANGE);
 
while (amount_loaded  CFG_ENV_SIZE  offset  end) {
if (nand_block_isbad(nand_info[0], offset)) {
offset += blocksize;
} else {
char_ptr = buf[amount_loaded];
-   if (nand_read(nand_info[0], offset, blocksize, 
char_ptr))
+   if (nand_read(nand_info[0], offset, len, char_ptr))
return 1;
offset += blocksize;
-   amount_loaded += blocksize;
+   amount_loaded += len;
}
}
if (amount_loaded != CFG_ENV_SIZE)
@@ -345,12 +347,10 @@ void env_relocate_spec (void)
 void env_relocate_spec (void)
 {
 #if !defined(ENV_IS_EMBEDDED)
-   size_t total;
int ret;
 
-   total = CFG_ENV_SIZE;
ret = readenv(CFG_ENV_OFFSET, (u_char *) env_ptr);
-   if (ret || total != CFG_ENV_SIZE)
+   if (ret)
return use_default();
 
if (crc32(0, env_ptr-data, ENV_SIZE) != env_ptr-crc)

-- 
1.5.4


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[U-Boot-Users] [PATCH] NAND: Coding-style fixes

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/nand/nand_base.c |   33 +
 1 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 6416d15..49bf51d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -596,7 +596,7 @@ static void nand_command (struct mtd_info *mtd, unsigned 
command, int column, in
/*
 * program and erase have their own busy handlers
 * status and sequential in needs no delay
-   */
+*/
switch (command) {
 
case NAND_CMD_PAGEPROG:
@@ -621,7 +621,7 @@ static void nand_command (struct mtd_info *mtd, unsigned 
command, int column, in
/*
 * If we don't have access to the busy pin, we apply the given
 * command delay
-   */
+*/
if (!this-dev_ready) {
udelay (this-chip_delay);
return;
@@ -690,7 +690,7 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned 
command, int column,
/*
 * program and erase have their own busy handlers
 * status and sequential in needs no delay
-   */
+*/
switch (command) {
 
case NAND_CMD_CACHEDPROG:
@@ -726,7 +726,7 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned 
command, int column,
/*
 * If we don't have access to the busy pin, we apply the given
 * command delay
-   */
+*/
if (!this-dev_ready) {
udelay (this-chip_delay);
return;
@@ -758,7 +758,7 @@ static void nand_get_device (struct nand_chip *this, struct 
mtd_info *mtd, int n
 
/*
 * Grab the lock and see if the device is available
-   */
+*/
 retry:
/* Hardware controller shared among independend devices */
if (this-controller) {
@@ -1070,7 +1070,7 @@ static int nand_verify_pages (struct mtd_info *mtd, 
struct nand_chip *this, int
 * is marked as NOAUTOINCR by the board driver.
 * Do this also before returning, so the chip is
 * ready for the next command.
-   */
+*/
if (!this-dev_ready)
udelay (this-chip_delay);
else
@@ -1153,13 +1153,13 @@ static int nand_read_ecc (struct mtd_info *mtd, loff_t 
from, size_t len,
}
 
/* Grab the lock and see if the device is available */
-   nand_get_device (this, mtd ,FL_READING);
+   nand_get_device (this, mtd, FL_READING);
 
/* use userspace supplied oobinfo, if zero */
if (oobsel == NULL)
oobsel = mtd-oobinfo;
 
-   /* Autoplace of oob data ? Use the default placement scheme */
+   /* Autoplace of oob data? Use the default placement scheme */
if (oobsel-useecc == MTD_NANDECC_AUTOPLACE)
oobsel = this-autooob;
 
@@ -1346,7 +1346,7 @@ static int nand_read_ecc (struct mtd_info *mtd, loff_t 
from, size_t len,
 * Do this before the AUTOINCR check, so no problems
 * arise if a chip which does auto increment
 * is marked as NOAUTOINCR by the board driver.
-   */
+*/
if (!this-dev_ready)
udelay (this-chip_delay);
else
@@ -1369,7 +1369,7 @@ static int nand_read_ecc (struct mtd_info *mtd, loff_t 
from, size_t len,
}
/* Check, if the chip supports auto page increment
 * or if we have hit a block boundary.
-   */
+*/
if (!NAND_CANAUTOINCR(this) || !(page  blockcheck))
sndcmd = 1;
}
@@ -1446,7 +1446,7 @@ static int nand_read_oob (struct mtd_info *mtd, loff_t 
from, size_t len, size_t
 * Do this before the AUTOINCR check, so no problems
 * arise if a chip which does auto increment
 * is marked as NOAUTOINCR by the board driver.
-   */
+*/
if (!this-dev_ready)
udelay (this-chip_delay);
else
@@ -1466,7 +1466,7 @@ static int nand_read_oob (struct mtd_info *mtd, loff_t 
from, size_t len, size_t
 
/* Check, if the chip supports auto page increment
 * or if we have hit a block boundary.
-   */
+*/
if (!NAND_CANAUTOINCR(this) || !(page  blockcheck)) {
/* For subsequent page reads set offset to 0 */
this-cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page 
 this-pagemask);
@@ -1731,7 +1731,7 @@ static int nand_write_ecc (struct

[U-Boot-Users] [PATCH 1/6] Add definition for the AM29LV800BB AMD NOR-flash

[Guennadi Liakhovetski]

This will be needed for SMDK6400

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/jedec_flash.c |   17 +
 1 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 9845e93..020647a 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -234,6 +234,23 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x1,7),
}
},
+   {
+   .mfr_id = MANUFACTURER_AMD,
+   .dev_id = AM29LV800BB,
+   .name   = AMD AM29LV800BB,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x04000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x1, 15),
+   }
+   },
 #endif
 };
 
-- 
1.5.4


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[U-Boot-Users] [PATCH 2/6] NAND_CMD_READOOB is not supported by all chips, read OOB with the page instead

[Guennadi Liakhovetski]

This lets SMDK6400 use the NAND flash chip from Micron for booting.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 nand_spl/nand_boot.c |   61 +
 1 files changed, 31 insertions(+), 30 deletions(-)

diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 563a80b..78eaf75 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -128,21 +128,6 @@ static int nand_command(struct mtd_info *mtd, int block, 
int page, int offs, u8
 }
 #endif
 
-static int nand_is_bad_block(struct mtd_info *mtd, int block)
-{
-   struct nand_chip *this = mtd-priv;
-
-   nand_command(mtd, block, 0, CFG_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
-
-   /*
-* Read one byte
-*/
-   if (this-read_byte(mtd) != 0xff)
-   return 1;
-
-   return 0;
-}
-
 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar 
*dst)
 {
struct nand_chip *this = mtd-priv;
@@ -150,8 +135,6 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
u_char *ecc_code;
u_char *oob_data;
int i;
-   int eccsize = CFG_NAND_ECCSIZE;
-   int eccbytes = CFG_NAND_ECCBYTES;
int eccsteps = CFG_NAND_ECCSTEPS;
uint8_t *p = dst;
int stat;
@@ -163,11 +146,11 @@ static int nand_read_page(struct mtd_info *mtd, int 
block, int page, uchar *dst)
 */
ecc_calc = (u_char *)(CFG_SDRAM_BASE + 0x1);
ecc_code = ecc_calc + 0x100;
-   oob_data = ecc_calc + 0x200;
+   oob_data = p + CFG_NAND_PAGE_SIZE; /* Append OOB to the page data */
 
-   for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps; eccsteps--, i += CFG_NAND_ECCBYTES, p += 
CFG_NAND_ECCSIZE) {
this-enable_hwecc(mtd, NAND_ECC_READ);
-   this-read_buf(mtd, p, eccsize);
+   this-read_buf(mtd, p, CFG_NAND_ECCSIZE);
this-calculate_ecc(mtd, p, ecc_calc[i]);
}
this-read_buf(mtd, oob_data, CFG_NAND_OOBSIZE);
@@ -179,7 +162,7 @@ static int nand_read_page(struct mtd_info *mtd, int block, 
int page, uchar *dst)
eccsteps = CFG_NAND_ECCSTEPS;
p = dst;
 
-   for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+   for (i = 0; eccsteps; eccsteps--, i += CFG_NAND_ECCBYTES, p += 
CFG_NAND_ECCSIZE) {
/* No chance to do something with the possible error message
 * from correct_data(). We just hope that all possible errors
 * are corrected by this routine.
@@ -195,6 +178,7 @@ static int nand_load(struct mtd_info *mtd, int offs, int 
uboot_size, uchar *dst)
int block;
int blockcopy_count;
int page;
+   unsigned read = 0;
 
/*
 * offs has to be aligned to a block address!
@@ -202,18 +186,29 @@ static int nand_load(struct mtd_info *mtd, int offs, int 
uboot_size, uchar *dst)
block = offs / CFG_NAND_BLOCK_SIZE;
blockcopy_count = 0;
 
-   while (blockcopy_count  (uboot_size / CFG_NAND_BLOCK_SIZE)) {
-   if (!nand_is_bad_block(mtd, block)) {
-   /*
-* Skip bad blocks
-*/
-   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
-   nand_read_page(mtd, block, page, dst);
-   dst += CFG_NAND_PAGE_SIZE;
+   while (blockcopy_count  ((uboot_size + CFG_NAND_BLOCK_SIZE - 1) / 
CFG_NAND_BLOCK_SIZE)) {
+   /*
+* Skip bad blocks
+*/
+   int badblock = 0;
+   for (page = 0; page  CFG_NAND_PAGE_COUNT; page++) {
+   nand_read_page(mtd, block, page, dst);
+   if ((!page
+#ifdef CFG_NAND_BBT_2NDPAGE
+|| page == 1
+#endif
+   )  dst[CFG_NAND_PAGE_SIZE] != 0xff) {
+   badblock = 1;
+   break;
}
+   /* Overwrite skipped pages */
+   if (read = offs)
+   dst += CFG_NAND_PAGE_SIZE;
+   read += CFG_NAND_PAGE_SIZE;
+   }
 
+   if (!badblock)
blockcopy_count++;
-   }
 
block++;
}
@@ -241,12 +236,18 @@ void nand_boot(void)
nand_chip.dev_ready = NULL; /* preset to NULL */
board_nand_init(nand_chip);
 
+   if (nand_chip.select_chip)
+   nand_chip.select_chip(nand_info, 0);
+
/*
 * Load U-Boot image from NAND into RAM
 */
ret = nand_load(nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
(uchar *)CFG_NAND_U_BOOT_DST);
 
+   if (nand_chip.select_chip)
+   nand_chip.select_chip

[U-Boot-Users] [PATCH 4/7] USB: Add support for OHCI controller on s3c6400

[Guennadi Liakhovetski]

Notice: USB on s3c6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 cpu/arm1176/s3c64xx/Makefile |1 +
 cpu/arm1176/s3c64xx/usb.c|   44 ++
 drivers/usb/usb_ohci.c   |1 +
 3 files changed, 46 insertions(+), 0 deletions(-)
 create mode 100644 cpu/arm1176/s3c64xx/usb.c

diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile
index 92373d8..0a1201d 100644
--- a/cpu/arm1176/s3c64xx/Makefile
+++ b/cpu/arm1176/s3c64xx/Makefile
@@ -28,6 +28,7 @@ LIB   = $(obj)lib$(SOC).a
 OBJS   = interrupts.o
 #OBJS  = nand_cp.o serial.o usb_ohci.o interrupts.o nand.o
 COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
+COBJS-$(CONFIG_USB_OHCI_NEW) += usb.o
 
 OBJS   += $(COBJS-y)
 
diff --git a/cpu/arm1176/s3c64xx/usb.c b/cpu/arm1176/s3c64xx/usb.c
new file mode 100644
index 000..f9dbc5e
--- /dev/null
+++ b/cpu/arm1176/s3c64xx/usb.c
@@ -0,0 +1,44 @@
+/*
+ * URB OHCI HCD (Host Controller Driver) initialization for USB on the S3C64XX.
+ *
+ * Copyright (C) 2008, Guennadi Liakhovetski, DENX Software Engineering 
[EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include s3c6400.h
+
+int usb_cpu_init(void)
+{
+   OTHERS_REG |= 0x1;
+   return 0;
+}
+
+int usb_cpu_stop(void)
+{
+   OTHERS_REG = ~0x1;
+   return 0;
+}
+
+void usb_cpu_init_fail(void)
+{
+   OTHERS_REG = ~0x1;
+}
diff --git a/drivers/usb/usb_ohci.c b/drivers/usb/usb_ohci.c
index fd60edb..94549a8 100644
--- a/drivers/usb/usb_ohci.c
+++ b/drivers/usb/usb_ohci.c
@@ -67,6 +67,7 @@
 #endif
 
 #if defined(CONFIG_ARM920T) || \
+defined(CONFIG_S3C6400) || \
 defined(CONFIG_S3C2400) || \
 defined(CONFIG_S3C2410) || \
 defined(CONFIG_440EP) || \
-- 
1.5.4


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[U-Boot-Users] [PATCH 5/7] serial: add s3c64xx serial driver

[Guennadi Liakhovetski]

Ported from u-boot-1.1.6 driver by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/serial/Makefile  |1 +
 drivers/serial/s3c64xx.c |  189 ++
 2 files changed, 190 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/s3c64xx.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index c9e797e..70fe638 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -36,6 +36,7 @@ COBJS-y += serial_pl010.o
 COBJS-y += serial_pl011.o
 COBJS-y += serial_xuartlite.o
 COBJS-y += serial_sh.o
+COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
 COBJS-y += usbtty.o
 
 COBJS  := $(COBJS-y)
diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c
new file mode 100644
index 000..d7e9d01
--- /dev/null
+++ b/drivers/serial/s3c64xx.c
@@ -0,0 +1,189 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include common.h
+
+#include s3c6400.h
+
+#ifdef CONFIG_SERIAL1
+#define UART_NRS3C64XX_UART0
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C64XX_UART1
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C64XX_UART2
+
+#else
+#error Bad: you didn't configure serial ...
+#endif
+
+#define barrier() asm volatile( ::: memory)
+
+/* See table in 31.6.11 */
+static const int udivslot[] = {
+   0,
+   0x0080,
+   0x0808,
+   0x0888,
+   0x,
+   0x4924,
+   0x4a52,
+   0x54aa,
+   0x,
+   0xd555,
+   0xd5d5,
+   0xddd5,
+   0x,
+   0xdfdd,
+   0xdfdf,
+   0xffdf,
+};
+
+void serial_setbrg(void)
+{
+   DECLARE_GLOBAL_DATA_PTR;
+   S3C64XX_UART *const uart = S3C64XX_GetBase_UART(UART_NR);
+   u32 reg, pclk_ratio = get_PCLK() / gd-baudrate;
+   int i;
+
+   /* PCLK / (16 * baudrate) - 1 */
+   reg = pclk_ratio / 16 - 1;
+   i = pclk_ratio - (reg + 1) * 16;
+
+   uart-UBRDIV = reg;
+   uart-UDIVSLOT = udivslot[i];
+
+   for (i = 0; i  100; i++)
+   barrier();
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ *
+ */
+int serial_init(void)
+{
+   S3C64XX_UART *const uart = S3C64XX_GetBase_UART(UART_NR);
+
+   /* reset and enable FIFOs, set triggers to the maximum */
+   uart-UFCON = 0xff;
+   uart-UMCON = 0;
+   /* 8N1 */
+   uart-ULCON = 3;
+   /* No interrupts, no DMA, pure polling */
+   uart-UCON = 5;
+
+   serial_setbrg();
+
+   return 0;
+}
+
+/*
+ * Read a single byte from the serial port. Returns 1 on success, 0
+ * otherwise. When the function is succesfull, the character read is
+ * written into its argument c.
+ */
+int serial_getc(void)
+{
+   S3C64XX_UART *const uart = S3C64XX_GetBase_UART(UART_NR);
+
+   /* wait for character to arrive */
+   while (!(uart-UTRSTAT  0x1));
+
+   return uart-URXH  0xff;
+}
+
+#ifdef CONFIG_HWFLOW
+static int hwflow = 0; /* turned off by default */
+int hwflow_onoff(int on)
+{
+   switch (on) {
+   case 0:
+   default:
+   break;  /* return current */
+   case 1:
+   hwflow = 1; /* turn on */
+   break;
+   case -1:
+   hwflow = 0; /* turn off */
+   break;
+   }
+   return hwflow;
+}
+#endif
+
+#ifdef CONFIG_MODEM_SUPPORT
+static int be_quiet;
+void disable_putc(void)
+{
+   be_quiet = 1;
+}
+
+void enable_putc(void)
+{
+   be_quiet = 0;
+}
+#endif
+
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc(const char c)
+{
+   S3C64XX_UART *const uart = S3C64XX_GetBase_UART(UART_NR);
+
+#ifdef CONFIG_MODEM_SUPPORT
+   if (be_quiet)
+   return;
+#endif
+
+   /* wait for room in the tx FIFO */
+   while (!(uart-UTRSTAT  0x2));
+
+#ifdef CONFIG_HWFLOW
+   /* Wait for CTS up */
+   while (hwflow  !(uart-UMSTAT  0x1));
+#endif
+
+   uart-UTXH = c;
+
+   /* If \n, also do \r */
+   if (c == '\n')
+   serial_putc('\r');
+}
+
+/*
+ * Test whether a character is in the RX buffer
+ */
+int serial_tstc(void)
+{
+   S3C64XX_UART

[U-Boot-Users] [PATCH 6/7] NAND: add NAND driver for s3c64xx

[Guennadi Liakhovetski]

Ported from u-boot-1.1.6 driver by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 drivers/mtd/nand/Makefile  |1 +
 drivers/mtd/nand/s3c64xx.c |  373 
 2 files changed, 374 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/s3c64xx.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 7bd22a0..236cf03 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -33,6 +33,7 @@ COBJS-y += nand_bbt.o
 COBJS-y += nand_util.o
 
 COBJS-y += fsl_upm.o
+COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
new file mode 100644
index 000..49d3440
--- /dev/null
+++ b/drivers/mtd/nand/s3c64xx.c
@@ -0,0 +1,315 @@
+/*
+ * (C) Copyright 2006 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#include nand.h
+#include s3c6400.h
+
+#include asm/io.h
+
+#ifdef CONFIG_NAND_SPL
+#define printf(arg...) do {} while (0)
+#endif
+
+/* Nand flash definition values by jsgood */
+#define S3C_NAND_CFG_HWECC
+#undef S3C_NAND_DEBUG
+
+#ifdef S3C_NAND_DEBUG
+/*
+ * Function to print out oob buffer for debugging
+ * Written by jsgood
+ */
+static void print_oob(const char *header, struct mtd_info *mtd)
+{
+   int i;
+   struct nand_chip *chip = mtd-priv;
+
+   printf(%s:\t, header);
+
+   for(i = 0; i  64; i++)
+   printf(%02x , chip-oob_poi[i]);
+
+   printf(\n);
+}
+#endif /* S3C_NAND_DEBUG */
+
+#ifdef CONFIG_NAND_SPL
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+   struct nand_chip *this = mtd-priv;
+   return readb(this-IO_ADDR_R);
+}
+
+static void nand_write_byte(struct mtd_info *mtd, u_char byte)
+{
+   struct nand_chip *this = mtd-priv;
+   writeb(byte, this-IO_ADDR_W);
+}
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+   int i;
+   struct nand_chip *this = mtd-priv;
+
+   for (i = 0; i  len; i++)
+   buf[i] = readb(this-IO_ADDR_R);
+}
+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   int ctrl = readl(NFCONT);
+
+   switch (chip) {
+   case -1:
+   ctrl |= 6;
+   break;
+   case 0:
+   ctrl = ~2;
+   break;
+   case 1:
+   ctrl = ~4;
+   break;
+   default:
+   return;
+   }
+
+   writel(ctrl, NFCONT);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ * Written by jsgood
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+   struct nand_chip *this = mtd-priv;
+
+   switch (cmd) {
+   case NAND_CTL_SETCLE:
+   this-IO_ADDR_W = (void __iomem *)NFCMMD;
+   break;
+   case NAND_CTL_CLRCLE:
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   break;
+   case NAND_CTL_SETALE:
+   this-IO_ADDR_W = (void __iomem *)NFADDR;
+   break;
+   case NAND_CTL_CLRALE:
+   this-IO_ADDR_W = (void __iomem *)NFDATA;
+   break;
+   case NAND_CTL_SETNCE:
+   s3c_nand_select_chip(mtd, 0);
+   break;
+   case NAND_CTL_CLRNCE:
+   s3c_nand_select_chip(mtd, -1);
+   break;
+   }
+}
+
+/*
+ * Function for checking device ready pin
+ * Written by jsgood
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   while (!(readl(NFSTAT)  NFSTAT_RnB)) {}
+   return 1;
+}
+
+#ifdef S3C_NAND_CFG_HWECC
+/*
+ * This function is called before encoding ecc codes to ready ecc engine.
+ * Written by jsgood
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   u_long nfcont, nfconf;
+
+   /*
+* The original driver used 4-bit ECC for new MLC chips, i.e., for
+* those with non-zero ID[3][3:2], which anyway only holds for ST
+* (Numonyx) chips
+*/
+   nfconf = readl(NFCONF)  ~NFCONF_ECC_4BIT;
+
+   writel(nfconf, NFCONF);
+
+   /* Initialize  unlock */
+   nfcont = readl(NFCONT

[U-Boot-Users] [PATCH 7/7] ARM: Add support for S3C6400 based SMDK6400 board

[Guennadi Liakhovetski]

This board can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. SMDK6400 can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough for
U-Boot. Ported from u-boot-1.1.6 version by Samsung.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 MAKEALL|1
 Makefile   |   17 +
 board/samsung/smdk6400/Makefile|   51 +
 board/samsung/smdk6400/config.mk   |   27 +++
 board/samsung/smdk6400/lowlevel_init.S |  315 ++
 board/samsung/smdk6400/smdk6400.c  |  178 +++
 board/samsung/smdk6400/u-boot-nand.lds |   60 +
 include/configs/smdk6400.h |  338 
 nand_spl/board/samsung/smdk6400/Makefile   |  103 +
 nand_spl/board/samsung/smdk6400/config.mk  |   40 
 nand_spl/board/samsung/smdk6400/u-boot.lds |   58 +
 11 files changed, 1188 insertions(+), 0 deletions(-)
 create mode 100644 board/samsung/smdk6400/Makefile
 create mode 100644 board/samsung/smdk6400/config.mk
 create mode 100644 board/samsung/smdk6400/lowlevel_init.S
 create mode 100644 board/samsung/smdk6400/smdk6400.c
 create mode 100644 board/samsung/smdk6400/u-boot-nand.lds
 create mode 100644 include/configs/smdk6400.h
 create mode 100644 nand_spl/board/samsung/smdk6400/Makefile
 create mode 100644 nand_spl/board/samsung/smdk6400/config.mk
 create mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds

diff --git a/MAKEALL b/MAKEALL
index ee83cca..a3ed47d 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -515,6 +515,7 @@ LIST_ARM11=\
imx31_litekit   \
imx31_phycore   \
mx31ads \
+   smdk6400\
 
 
 #
diff --git a/Makefile b/Makefile
index b104617..0c5b8a6 100644
--- a/Makefile
+++ b/Makefile
@@ -2677,6 +2677,23 @@ mx31ads_config   : unconfig
 omap2420h4_config  : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
+#
+## ARM1176 Systems
+#
+smdk6400_noUSB_config  \
+smdk6400_config:   unconfig
+   @mkdir -p $(obj)include $(obj)board/samsung/smdk6400
+   @mkdir -p $(obj)nand_spl/board/samsung/smdk6400
+   @echo #define CONFIG_NAND_U_BOOT  $(obj)include/config.h
+   @if [ -z $(findstring smdk6400_noUSB_config,$@) ]; then   
\
+   echo RAM_TEXT = 0x57e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_config=) arm arm1176 smdk6400 samsung s3c64xx; 
\
+   else
\
+   echo RAM_TEXT = 0xc7e0  
$(obj)board/samsung/smdk6400/config.tmp;\
+   $(MKCONFIG) $(@:_noUSB_config=) arm arm1176 smdk6400 samsung 
s3c64xx;   \
+   fi
+   @echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
+
 #
 # i386
 #
diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile
new file mode 100644
index 000..1200e45
--- /dev/null
+++ b/board/samsung/smdk6400/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= lib$(BOARD).a
+
+OBJS   := smdk6400.o
+#OBJS  := smdk6400.o flash.o
+SOBJS  := lowlevel_init.o
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) crv $@ $(SOBJS) $(OBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak .depend
+
+#
+
+.depend:   Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+   $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c)  $@
+
+# defines $(obj).depend target
+include

Re: [U-Boot-Users] [PATCH {1,2}`s/6/7/`] patch counting

[Guennadi Liakhovetski]

Sorry, these were of course 7 patches. Can resend the first two if needed.

Thanks  
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

-
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Re: [U-Boot-Users] Test - Please ignore

[Guennadi Liakhovetski]

On Wed, 30 Jul 2008, Wolfgang Denk wrote:

 Dear Ken,
 
 in message [EMAIL PROTECTED] you wrote:
  
  You missed my point.  I suspect that the mailing list server is not
  sending me messages when it sees that my address is also in a To
  or CC header.  I verified the U-Boot-Users mailman configuration
  for my account twice that I should be sent a copy of all mailing
  list messages, regardless of whether or not my address appears in
  a To or CC header (see 1st paragraph quoted above).
 
 Let's try it out, then. Hide is off here.

Sorry for not ignoring, I had the same feature with my account at the 
previous employer. The thing is, that these messages come with the same 
message ID, and some mail servers, trying to comply to some RFC let only 
one message with every specific ID through. As a matter of fact this is a 
wrong interpretation of the RFC, more important is, that a mail-server 
must accept every message, i.e., must not impose any rules upon 
mail-validity. Or something like this anyway.

Ignore if this is not your problem.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer

-
This SF.Net email is sponsored by the Moblin Your Move Developer's challenge
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Grand prize is a trip for two to an Open Source event anywhere in the world
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[U-Boot-Users] [PATCH, RFC] NAND: Scan 2nd page for badblock markers

[Guennadi Liakhovetski]

A datasheet from Micron says:

The factory identifies invalid blocks before shipping by programming data 
other than FFh (x8) or h (x16) into the first spare location (column 
address 2,048 for x8 devices, or column address 1,024 for x16 devices) of 
the first or second page of each bad block.

Which means one should scan the 2nd page too.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---

I don't know if this actually happens, whether the manufacturer actually 
ever writes markers to the second page, but that's what the documentation 
says. In fact, we anyway then throw options away in nand_memory_bbt() at 
least for RAM-based BBT. So, don't know if this is really useful. Feel 
free to drop.

diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 7363490..1a0779a 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -77,14 +77,19 @@ struct nand_flash_dev nand_flash_ids[] = {
{NAND 128MiB 3,3V 16-bit, 0xC1, 0, 128, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
 
/* 2 Gigabit */
-   {NAND 256MiB 1,8V 8-bit,  0xAA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-   {NAND 256MiB 3,3V 8-bit,  0xDA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-   {NAND 256MiB 1,8V 16-bit, 0xBA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
-   {NAND 256MiB 3,3V 16-bit, 0xCA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+   {NAND 256MiB 1,8V 8-bit,  0xAA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR |
+NAND_BBT_SCAN2NDPAGE},
+   {NAND 256MiB 3,3V 8-bit,  0xDA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR |
+NAND_BBT_SCAN2NDPAGE},
+   {NAND 256MiB 1,8V 16-bit, 0xBA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR |
+NAND_BBT_SCAN2NDPAGE},
+   {NAND 256MiB 3,3V 16-bit, 0xCA, 0, 256, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR |
+NAND_BBT_SCAN2NDPAGE},
 
/* 4 Gigabit */
{NAND 512MiB 1,8V 8-bit,  0xAC, 0, 512, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
-   {NAND 512MiB 3,3V 8-bit,  0xDC, 0, 512, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+   {NAND 512MiB 3,3V 8-bit,  0xDC, 0, 512, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR |
+NAND_BBT_SCAN2NDPAGE},
{NAND 512MiB 1,8V 16-bit, 0xBC, 0, 512, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
{NAND 512MiB 3,3V 16-bit, 0xCC, 0, 512, 0, 
NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
 

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[U-Boot-Users] CFG_CLKS_IN_HZ unused

[Guennadi Liakhovetski]

Hi,

a grep for CFG_CLKS_IN_HZ over a recent U-Boot snapshot revealed 76 hits, 
but all under include/configs, most with #undef and a couple #define's. 
And not a single use of it. Are there plans to use this macro or should it 
be cleaned up?

Thanks
Guennadi
---
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Re: [U-Boot-Users] [PATCH 04/10 v2] [ARM] TQMA31: add new board with i.MX31 processor

[Guennadi Liakhovetski]

On Wed, 9 Jul 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
 
   +# Copyright (C) 2008, Guennadi Liakhovetski [EMAIL PROTECTED]
   +# Copyright (C) 2008, Jens Gehrlein [EMAIL PROTECTED]
  
  Thanks for the credit, but, although IANAL, I think, one does not _have_ 
  to preserve the copyright of the original file when it gets copied to a 
 
 Yes, of course you do. If you copy code, you *must* honour existing
 copyrights and have not any right to remove these.

hm, starting from how many lines of code? Copy-paste is one of the main 
programming technics, as we all know:-) If you copy one line, you don't 
have to transfer all copyrights over, do you?

Thanks
Guennadi
---
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[U-Boot-Users] U-Boot NAND driver for s3c6400

[Guennadi Liakhovetski]

Hi Harald, all

do you or anyone else know, if there is a s3c6400 NAND driver available 
somewhere for a recent U-Boot version (not OneNAND)? Preferably with 
booting from NAND support?

Thanks
Guennadi
---
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Freelance Open-Source Software Developer

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Re: [U-Boot-Users] [RFC/PATCH 2/6] SPI API improvements

[Guennadi Liakhovetski]

On Fri, 16 May 2008, Haavard Skinnemoen wrote:

 From: Haavard Skinnemoen [EMAIL PROTECTED]
 
 This patch gets rid of the spi_chipsel table and adds a handful of new
 functions that makes the SPI layer cleaner and more flexible.

Ok, this looks good to me now. And it works too. Just one question:

 diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
 index 35b1b8b..b6e1501 100644
 --- a/drivers/rtc/mc13783-rtc.c
 +++ b/drivers/rtc/mc13783-rtc.c
 @@ -24,34 +24,50 @@
  #include rtc.h
  #include spi.h
  
 +static struct spi_slave *slave;
 +
  int rtc_get(struct rtc_time *rtc)
  {
   u32 day1, day2, time;
   u32 reg;
   int err, tim, i = 0;
  
 - spi_select(1, 0, SPI_MODE_2 | SPI_CS_HIGH);
 + if (!slave) {
 + /* FIXME: Verify the max SCK rate */
 + slave = spi_setup_slave(1, 0, 100,
 + SPI_MODE_2 | SPI_CS_HIGH);
 + if (!slave)
 + return -1;
 + }
 +
 + if (spi_claim_bus(slave))
 + return -1;
  
   do {
   reg = 0x2c00;
 - err = spi_xfer(0, 32, (uchar *)reg, (uchar *)day1);
 + err = spi_xfer(slave, 32, (uchar *)reg, (uchar *)day1,
 + SPI_XFER_BEGIN | SPI_XFER_END);
  
   if (err)
   return err;
  
   reg = 0x2800;
 - err = spi_xfer(0, 32, (uchar *)reg, (uchar *)time);
 + err = spi_xfer(slave, 32, (uchar *)reg, (uchar *)time,
 + SPI_XFER_BEGIN | SPI_XFER_END);
  
   if (err)
   return err;
  
   reg = 0x2c00;
 - err = spi_xfer(0, 32, (uchar *)reg, (uchar *)day2);
 + err = spi_xfer(slave, 32, (uchar *)reg, (uchar *)day2,
 + SPI_XFER_BEGIN | SPI_XFER_END);

Here... We perform 3 transfers on SPI one after another, and every time we 
do SPI_XFER_BEGIN | SPI_XFER_EN... Doesn't this defeat the whole purpose 
of these flags? Would it be bad, if we did

   reg = 0x2c00;
 - err = spi_xfer(0, 32, (uchar *)reg, (uchar *)day1);
 + err = spi_xfer(slave, 32, (uchar *)reg, (uchar *)day1,
 + SPI_XFER_BEGIN);
 - 
 - if (err)
 - return err;
  
   reg = 0x2800;
 - err = spi_xfer(0, 32, (uchar *)reg, (uchar *)time);
 + err |= spi_xfer(slave, 32, (uchar *)reg, (uchar *)time, 0);
 - 
 - if (err)
 - return err;
  
   reg = 0x2c00;
 - err = spi_xfer(0, 32, (uchar *)reg, (uchar *)day2);
 + err |= spi_xfer(slave, 32, (uchar *)reg, (uchar *)day2,
 + SPI_XFER_END);
  
   if (err)
   return err;

? The worst that can happen with this, is that the first or the second 
transfer return an error, and we go on with one or two more transfers 
instead of aborting immediately. Can this have any negative effects?

 @@ -65,16 +81,31 @@ void rtc_set(struct rtc_time *rtc)
  {
   u32 time, day, reg;
  
 + if (!slave) {
 + /* FIXME: Verify the max SCK rate */
 + slave = spi_setup_slave(1, 0, 100,
 + SPI_MODE_2 | SPI_CS_HIGH);
 + if (!slave)
 + return;
 + }
 +
   time = mktime(rtc-tm_year, rtc-tm_mon, rtc-tm_mday,
 rtc-tm_hour, rtc-tm_min, rtc-tm_sec);
   day = time / 86400;
   time %= 86400;
  
 + if (spi_claim_bus(slave))
 + return;
 +
   reg = 0x2c00 | day | 0x8000;
 - spi_xfer(0, 32, (uchar *)reg, (uchar *)day);
 + spi_xfer(slave, 32, (uchar *)reg, (uchar *)day,
 + SPI_XFER_BEGIN | SPI_XFER_END);
  
   reg = 0x2800 | time | 0x8000;
 - spi_xfer(0, 32, (uchar *)reg, (uchar *)time);
 + spi_xfer(slave, 32, (uchar *)reg, (uchar *)time,
 + SPI_XFER_BEGIN | SPI_XFER_END);
 +
 + spi_release_bus(slave);
  }
  
  void rtc_reset(void)

Here error is not checked at all... So, it should be no problem doing only 
SPI_XFER_BEGIN in the first xfer and only SPI_XFER_END in the second one.

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Guennadi Liakhovetski]

On Wed, 14 May 2008, Jens Gehrlein wrote:

 Apart from that, verify that your console=
  command line parameter is correct, your machine ID matches, and that you
  don't have a jtag debugger like bdi2000 connected when you're trying to
  boot.
 
 I have the same problem on our board: I don't see the console outputs if the
 BDI2000 cable is connected to the target, although the BDI is in mode reset
 run. Do have an idea why?

No, I don't know why, but that's exactly why I've mentioned it above - I 
had the same problem here and I spent about half a day trying to figure 
out why it didn't boot.

Thanks
Guennadi
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Re: [U-Boot-Users] [RFC/PATCH] SPI API improvements

[Guennadi Liakhovetski]

 struct spi_slave 
hardware-specific. I hoped it would be standard, and contain a void * to 
hardware-specific part. Or, better yet, be embeddable in hardware-specific 
object, so drivers then would use container_of to get to their data and 
wouldn't need to malloc 2 structs. But, as you say, it is not an operating 
system, so, let's see what others say.

After all above are fixed, and I can at least compile it again:-), I'll 
test it on hardware.

I only reviewed the parts I'd written or changed myself.

Thanks
Guennadi
---
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Re: [U-Boot-Users] [RFC/PATCH] SPI API improvements

[Guennadi Liakhovetski]

On Tue, 13 May 2008, Haavard Skinnemoen wrote:

 On Tue, 13 May 2008 13:20:22 +0200 (CEST)
 Guennadi Liakhovetski [EMAIL PROTECTED] wrote:
 
   + /* FIXME: Make these parameters configurable */
   + slave = spi_setup_slave(0, device, 100, SPI_MODE_0);
  
  Until it is configurable (I think, you mean at runtime), please use the 
  CONFIG_MXC_SPI_IFACE macro, otherwise it will be useless on mx31ads.
 
 Do you really think platform-specific macros are appropriate here?
 
 But yeah, I did mean at runtime. If we're going to support multiple
 busses, we need to expose that at the user interface level too.

Appropriate or not from the esthetic PoV, I don't see another chance to 
make it useful - either make it run-time configurable either via command 
parameters, or environment varables, ot at least compile-time, so 
platforms could specify something meaningful there. BTW, same holds for 
the flags. So, I'd do

#ifndef CONFIG_MXC_SPI_IFACE
#define CONFIG_MXC_SPI_IFACE 0
#endif
#ifndef CONFIG_MXC_SPI_MODE
#define CONFIG_MXC_SPI_MODE SPI_MODE_0
#endif

slave = spi_setup_slave(CONFIG_MXC_SPI_IFACE, device, 100, 
CONFIG_MXC_SPI_MODE);

Without these sspi is useless on mx31ads.

   diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
   index 35b1b8b..5a1ef4f 100644
   --- a/drivers/rtc/mc13783-rtc.c
   +++ b/drivers/rtc/mc13783-rtc.c
   @@ -24,13 +24,24 @@
#include rtc.h
#include spi.h

   +static struct spi_slave *slave;
   +
  
  In do_spi() you use a local variable, allocate a slave, claim the bus, 
  xfer data, release the bus and free the slave on each call, which is also 
  nice. Whereas, for example, in this driver you use a static variable, 
  allocate a slave for it once, and, naturally, never free it. This is at 
  least inconsistent, IMHO.
 
 I don't think it's inconsistent...they're very different users. While
 this RTC driver will normally only ever see one slave, do_spi() needs
 to be able to communicate with whatever device the user tells it to,
 which may be different from one call to the next.

Ok, sorry, you're right.

   -/*
   - * The function call pointer type used to drive the chip select.
   - */
   -typedef void (*spi_chipsel_type)(int cs);
   +/* SPI transfer flags */
   +#define SPI_XFER_BEGIN   0x01/* Assert CS before 
   transfer */
   +#define SPI_XFER_END 0x02/* Deassert CS after 
   transfer */

   +/* Driver-specific SPI slave data */
   +struct spi_slave;
  
  Well, I am a bit upset you decided to make struct spi_slave 
  hardware-specific. I hoped it would be standard, and contain a void * to 
  hardware-specific part. Or, better yet, be embeddable in hardware-specific 
  object, so drivers then would use container_of to get to their data and 
  wouldn't need to malloc 2 structs. But, as you say, it is not an operating 
  system, so, let's see what others say.
 
 Instead of being upset, could you tell me what kind of information such
 a hardware-independent spi_slave struct should have, and why it might be
 useful outside the controller driver?

Well, I just don't like different things being called with the same 
name:-)

  After all above are fixed, and I can at least compile it again:-), I'll 
  test it on hardware.
 
 With the below patch, it compiles on imx31_litekit at least.

and it works too - rtc works, sspi works with above modifications and 
setting

#define CONFIG_MXC_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)  /* Default SPI 
mode */

in mx31ads.h

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
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Re: [U-Boot-Users] i.MX31: question about CFG_HZ and CKIL

[Guennadi Liakhovetski]

On Wed, 7 May 2008, Jens Gehrlein wrote:

 in the i.MX31 processor reference manual they mention a 32 kHz clock as 
 input for several timers and controllers. Sometimes it's called 
 ipg_clk_32k. But the documentation does not clearly state, that this 
 clock actually is the CKIL.
 
 As far as I could derive from the ADS schematics the CKIL is feeded with 
 32768 Hz instead of 32000 Hz. On our board we use 32768 Hz either.

MCIMX31RM Rev 2.3, section 3.4.4.1.1:

quote
The i.MX31 and i.MX31L processors can use either a 32 kHz, 32.768 kHz or a 
38.4 kHz crystal as the external low frequency source. Throughout this 
chapter, the low frequency crystal is referred to as the 32 kHz crystal, 
even though this can refer to the 32.768 or 38.4 kHz values.
/quote

So, so far it is allowed to use a 32768 crystal.

 If CKIL is the above mentioned 32 kHz clock, the resulting deviation in 
 the timers is only about 2.4% as long as CFG_HZ in mx31ads.h is 32000 
 Hz. Although it works with the current definition, I'd like to know your 
 opinions, whether it is necessary to adjust this value.

Further, it depends on the CLKSS signal, which on i.MX31ADS is connected 
to JP22, whether CKIL is used as the reference clock. Unless you override 
this choise later in software.

In any case, I think, you are right. I'll submit a patch for mx31ads 
shortly, then you'll see what you could change for your platform too.

Thanks
Guennadi
---
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[U-Boot-Users] [PATCH] mx31ads: fix 32kHz clock handling

[Guennadi Liakhovetski]

According to schematics and to RedBoot sources, the MX31ADS uses a 32768Hz 
oscillator as a SKIL source. Fix previously wrongly assumed 32000Hz value. 
Also fix a typo when verifying a jumper configuration. While at it, make 
two needlessly global functions static.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/board/mx31ads/lowlevel_init.S b/board/mx31ads/lowlevel_init.S
index 099a7ca..e166058 100644
--- a/board/mx31ads/lowlevel_init.S
+++ b/board/mx31ads/lowlevel_init.S
@@ -220,7 +220,7 @@ lowlevel_init:
mov r1, #CS4_BASE
ldrhr1, [r1, #0x2]
/* Is 27MHz switch set? */
-   andsr1, r1, #0x16
+   andsr1, r1, #0x10
 
/* 532-133-66.5 */
ldr r0, =CCM_BASE
diff --git a/cpu/arm1136/mx31/generic.c b/cpu/arm1136/mx31/generic.c
index 16b2cf1..29c08c1 100644
--- a/cpu/arm1136/mx31/generic.c
+++ b/cpu/arm1136/mx31/generic.c
@@ -39,7 +39,7 @@ static u32 mx31_decode_pll(u32 reg, u32 infreq)
(mfd * pd))  10;
 }
 
-u32 mx31_get_mpl_dpdgck_clk(void)
+static u32 mx31_get_mpl_dpdgck_clk(void)
 {
u32 infreq;
 
@@ -51,7 +51,7 @@ u32 mx31_get_mpl_dpdgck_clk(void)
return mx31_decode_pll(__REG(CCM_MPCTL), infreq);
 }
 
-u32 mx31_get_mcu_main_clk(void)
+static u32 mx31_get_mcu_main_clk(void)
 {
/* For now we assume mpl_dpdgck_clk == mcu_main_clk
 * which should be correct for most boards
diff --git a/include/asm-arm/arch-mx31/mx31.h b/include/asm-arm/arch-mx31/mx31.h
index f89a401..0552c27 100644
--- a/include/asm-arm/arch-mx31/mx31.h
+++ b/include/asm-arm/arch-mx31/mx31.h
@@ -24,9 +24,7 @@
 #ifndef __ASM_ARCH_MX31_H
 #define __ASM_ARCH_MX31_H
 
-u32 mx31_get_mpl_dpdgck_clk(void);
-u32 mx31_get_mcu_main_clk(void);
-u32 mx31_get_ipg_clk(void);
-void mx31_gpio_mux(unsigned long mode);
+extern u32 mx31_get_ipg_clk(void);
+extern void mx31_gpio_mux(unsigned long mode);
 
 #endif /* __ASM_ARCH_MX31_H */
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 7614b95..2ea48a6 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -28,7 +28,7 @@
 #define CONFIG_ARM1136 1   /* This is an arm1136 CPU core 
*/
 #define CONFIG_MX311   /* in a mx31 */
 #define CONFIG_MX31_HCLK_FREQ  2600/* RedBoot says 26MHz */
-#define CONFIG_MX31_CLK32  32000
+#define CONFIG_MX31_CLK32  32768
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
@@ -139,7 +139,7 @@
 
 #define CFG_LOAD_ADDR  CONFIG_LOADADDR
 
-#define CFG_HZ 32000
+#define CFG_HZ CONFIG_MX31_CLK32 /* use 32kHz clock as source 
*/
 
 #define CONFIG_CMDLINE_EDITING 1
 

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Re: [U-Boot-Users] [PATCH v2 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

On Thu, 8 May 2008, Haavard Skinnemoen wrote:

 Wolfgang Denk [EMAIL PROTECTED] wrote:
  In message [EMAIL PROTECTED] you wrote:
   This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
   only implemented and tested on i.MX31, can with a modified register layout
   and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
   controllers too.
   
   Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
   
   ---
   
   Changes since v1: fix a copy-paste error
   
README|5 +
drivers/spi/Makefile  |1 +
drivers/spi/mxc_spi.c |  166 
   +
include/asm-arm/arch-mx31/mx31-regs.h |7 +-
include/spi.h |   16 +++-
5 files changed, 193 insertions(+), 2 deletions(-)
create mode 100644 drivers/spi/mxc_spi.c
  
  Applied, thanks.
 
 Oh great. We can do API changes without even mentioning it in the
 change log now?

Right, sorry, should have mentioned it. Although, the API change is one 
added function spi_select(), which you do not have to implement. So, I 
don't think I have broken anything.

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
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Re: [U-Boot-Users] [PATCH v2 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

On Thu, 8 May 2008, Haavard Skinnemoen wrote:

 Guennadi Liakhovetski [EMAIL PROTECTED] wrote:
   Oh great. We can do API changes without even mentioning it in the
   change log now?  
  
  Right, sorry, should have mentioned it. Although, the API change is one 
  added function spi_select(), which you do not have to implement. So, I 
  don't think I have broken anything.
 
 The problem is that it is completely undocumented, and it appears to
 have a lot of overlap with the spi_setup() function I proposed several
 times a while back.
 
 Besides, it's only optional up to the point where drivers start using
 it...and the mc13783-rtc driver does appear to be using it, so it isn't
 really optional anymore. And I suspect lots of other drivers really
 _do_ need this kind of thing, which is why I proposed the spi_setup()
 interface to begin with. You can always get around this by adding
 tweaks to the board/cpu/driver code for your particular setup, but I
 think very few drivers work as expected out of the box on a new board
 or platform. So I don't think an interface like this _should_ be
 optional.
 
 Therefore, I'm going to remove it in the next version of my patchset.
 If you can tell me how it's supposed to work, I can try to minimize the
 breakage.

Would be better if we could avoid any breakage completely, please.

I added this function, because 1) the current spi_xfer() doesn't support 
multiple SPI busses, and 2) is not particularly friendly when the SPI 
controller itself controls chipselects. As far as I can see your new 
proposed API doesn't solve the former of these problems either. One could 
get around this problem by numbering all chipselects on all busses 
through, but that would be too ugly. So, the spi_select does just that - 
selects a bus and a device to talk to. Of course this is racy, but as long 
as there's no multitasking, it should be ok.

As you certainly noticed while working on your API improvements, the 
current API is very unflexible. But as I didn't have resources to rework 
it completely and change multiple existing drivers, I chose the lesser 
evil - added an auxiliary function.

Wouldn't an API like

struct spi_slave *spi_attach(int bus, int cs); /* also does init */
int spi_xfer(struct spi_slave *slave, bitlen, dout, din);
void spi_detach(struct spi_slave *slave);

(approximately) be better?

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot-Users] [PATCH v2 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

On Thu, 8 May 2008, Haavard Skinnemoen wrote:

 Guennadi Liakhovetski [EMAIL PROTECTED] wrote:
  On Thu, 8 May 2008, Haavard Skinnemoen wrote:
  
   But I have to say I like the idea about passing a spi_slave
   handle around...
   
   How about something like this?
   
   /*
* Set up communication parameters for a SPI slave. This doesn't
* necessarily enable the controller.
*/
   struct spi_slave *spi_create_slave(int bus, int cs, unsigned int
 max_hz, unsigned int mode);
  
  Don't quite like the create name. To me it sounds like we just create a 
  slave object for you, do what you want with it. Whereas, I was thinking 
  about an attach method, where the host driver adds the slave pointer to 
  its driver list, possibly initializes the hardware, and can always verify 
  whether the slave pointer it is handed in by one of further method is 
  indeed one of the drivers on the list.
 
 Ok. spi_setup_slave()? spi_init_slave()? I'm not a huge fan of attach
 since it implies that some global state changes. It should be perfectly
 acceptable for a driver to simply initialize a spi_slave struct and
 return it, without updating any internal lists or hardware state.

Ok, let's go for spi_setup_slave then:-)

   /*
* Get exclusive access to the SPI bus for communicating with the given
* slave. Returns a negative value if the bus is busy (drivers may omit
* such checks if they don't want the extra code/data overhead.)
*/
   int spi_claim_bus(struct spi_slave *slave);
  
  Is this needed? Getting the spi_slave handle you gain exclusive access to 
  the spi device, but claiming the whole bus? Drivers may be lazy releasing 
  the chip-select between transfers, but are there cases where you _really_ 
  must have exclusive access to the bus or cannot release the cs?
 
 For some controllers, I believe claiming/releasing the bus explicitly
 makes a lot of sense. For example, the SPI controller on AT91 and AVR32
 allows you to select a given slave by writing to a register, and then
 start transferring data, toggling chip selects as needed.
 
 If a driver is sloppy with the chip select control, it's buggy. Many
 SPI devices have very strict (and often strange) requirements about
 when the chip select should be asserted and when it should not.
 
 I think a claim/release interface is the best way to ensure that a
 device driver can do multiple transfers more or less atomically (i.e.
 without releasing the chip select and without having any traffic on the
 bus in between) in a flexible way.

Is it compulsory then to claim / release a bus or not? Looks like it is 
not from your description above. But - even if you don't claim a bus for 
exclusive access, you still have to release it, right? Otherwise, if 
someone has setup a slave without claiming the bus, noone will ever be 
able to claim it afterwards? Because you shouldn't be able to claim it as 
long as there are even non-exclusive users on the bus? Actually, what's 
the mode variable in the setup method for? Maybe we could just use it to 
configure exclusive / non-exclusive access? Then you get a simple API like

slave = spi_setup_slave(host, dev, hz, 0 /*| SPI_ACCESS_EXCLUSIVE */);
if (!slave)
return;
/* Now you MUST release the slave / host */
spi_xfer();
...
spi_release();

And you get access to the bus if there are no exclusive users, and you get 
exclusive access, only if there are no users currently at all.

   /*
* Release the SPI bus. This may disable the controller and/or put it
* in low-power mode
*/
   void spi_release_bus(struct spi_slave *slave);
   
   /*
* Transfer data on the SPI bus.
*
* flags can be a combination of any of the following bits:
*   SPI_XFER_BEGIN: Assert CS before starting the transfer
*   SPI_XFER_END: Deassert CS after the transfer
*/
   int spi_xfer(struct spi_slave *slave, int bitlen, const void *dout,
 void *din, unsigned long flags);
  
  See above - would anything break if we just deassert the cs between 
  transfers?
 
 Yes.
 
 We've had so many chipselect-related problems in Linux that it's
 not even funny. Controllers, drivers, devices, everything seems to be
 making assumptions about how the chip select is supposed to behave -- I
 think we should at least try not to make any assumptions on the
 interface level.
 
 Maybe we can do it in a different way, but simply saying that the chip
 select should be deasserted between transfers is broken.

What do we do, if there are several non-exclusive users on a bus, and one 
of them doesn't release its cs between transfers? Return an error to 
others if they try to communicate at this time?

Looks like most of this API implementation is hardware independent, and 
should go into an spi.c?

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142

Re: [U-Boot-Users] [PATCH v2 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

On Thu, 8 May 2008, Haavard Skinnemoen wrote:

 Guennadi Liakhovetski [EMAIL PROTECTED] wrote:
 
  slave = spi_setup_slave(host, dev, hz, 0 /*| SPI_ACCESS_EXCLUSIVE */);
  if (!slave)
  return;
  /* Now you MUST release the slave / host */
  spi_xfer();
  ...
  spi_release();
 
 I think you should set up a slave exactly once before starting to
 communicate with it. Once you've done that, you just execute sequences
 of
 
 spi_claim_bus(slave);
 spi_xfer(slave, ...);
 /* possibly more transfers */
 spi_release_bus(slave);
 
 We could also define commonly-used canned sequences, like spi_w8r8()
 (write 8 bits, read 8 bits).

Ok, I see what you mean now. But then we need another function - an 
opposite to spi_setup, to free any allocated RAM, etc. I thought this was 
going to happen in release_bus, but after this explanation this doesn't 
seem to be the case.

So, just add an spi_free(), and, as a counterpart to it, an spi_init() 
might sound better than spi_setup:-)

  And you get access to the bus if there are no exclusive users, and you get 
  exclusive access, only if there are no users currently at all.
 
 I don't see how having multiple active users on the bus at the same
 time can possibly make any sense...once you start a transfer, you
 better make sure nobody else is doing a transfer at the same time since
 you're using the same MOSI/MISO/SCK lines...

No, not active. Multiple users having set up different slaves. But not 
communicating simultaneously:-)

  Looks like most of this API implementation is hardware independent, and 
  should go into an spi.c?
 
 Not really...what claiming the bus really means is highly hardware
 dependent. And SPI slave setup is mostly about decoding
 hardware-independent parameters like SCK rate and mode bits into
 hardware register values. But any convenience wrappers like spi_w8r8()
 probably belongs somewhere hardware-independent.

I thought, like (pseudocode)

static struct spi_host busses[SPI_BUSSES];

struct spi_slave *spi_init()
{
list_for_each_entry(slave, busses[bus].slaves, list) {
if (slave-device == device)
return (struct spi_slave *)-EBUSY;
}
slave = malloc();
slave-bus = bus;
slave-device = device;
ret = busses[bus].init(slave);
if (ret) {
free(slave);
return (struct spi_slave *)ret;
}
return slave;
}

int spi_xfer()
{
list_for_each_entry(ix, busses[bus].slaves, list) {
if (ix == slave)
break;
}
if (ix != slave)
return -EINVAL;

if (slave-bus-busy)
return -EBUSY;

return slave-bus-xfer();
}

...and so on, which is all quite hardware-independent.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH v2 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

On Thu, 8 May 2008, Haavard Skinnemoen wrote:

  I thought, like (pseudocode)
  
  static struct spi_host busses[SPI_BUSSES];
  
  struct spi_slave *spi_init()
  {
  list_for_each_entry(slave, busses[bus].slaves, list) {
  if (slave-device == device)
  return (struct spi_slave *)-EBUSY;
  }
  slave = malloc();
  slave-bus = bus;
  slave-device = device;
  ret = busses[bus].init(slave);
  if (ret) {
  free(slave);
  return (struct spi_slave *)ret;
  }
  return slave;
  }
 
  int spi_xfer()
  {
  list_for_each_entry(ix, busses[bus].slaves, list) {
  if (ix == slave)
  break;
  }
  if (ix != slave)
  return -EINVAL;
  
  if (slave-bus-busy)
  return -EBUSY;
  
  return slave-bus-xfer();
  }
 
 I was thinking about something much simpler:
 
 struct spi_slave *spi_init_slave(bus, cs, max_hz, mode)
 {
   slave = malloc();
   slave-regs = get_spi_controller_base_address(bus);
   slave-mode_reg = get_suitable_settings_for(cs, max_hz, mode);
   return slave;
 }
 
 int spi_xfer(slave, ...)
 {
   __raw_writel(slave-mode_reg, slave-regs + SPI_MR);
   if (flags  SPI_XFER_BEGIN)
   assert_chip_select();
 
   do_the_actual_spi_transfer();
 
   if (flags  SPI_XFER_END)
   deassert_chip_select();
 
   return whatever;
 }
 
 Of course, your solution will work with multiple, different SPI
 controllers while mine won't, but is that really necessary?
 
 Your solution comes with more error checking as well, which might be a
 good thing, but since it comes with a cost of additional memory and
 flash footprint, I think it should be optional. Maybe we could provide
 some library functions to simplify the drivers that want this?

I see. Well, I don't have a strong preference. So, either we need more 
votes, or the one who implements it decides:-)

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH v2 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

On Thu, 8 May 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
  
 Of course, your solution will work with multiple, different SPI
 controllers while mine won't, but is that really necessary?
 
 Your solution comes with more error checking as well, which might be a
 good thing, but since it comes with a cost of additional memory and
 flash footprint, I think it should be optional. Maybe we could provide
 some library functions to simplify the drivers that want this?

I see. Well, I don't have a strong preference. So, either we need more 
votes, or the one who implements it decides:-)
   
   That was two pros - did I miss any cons ?
  
  I think, those were two pros - but for two somewhat different solutions.
 
 Oops?
 
 your solution will work with multiple, different SPI controllers and
 Your solution comes with more error checking as well
 seem to me as if it were 2 x pro for your code.
 
 Am I missing something?

Haavard also named disadvantages of my proposal - like larger storage and 
memory footprint, higher complexity, etc. And as he is going to implement 
it, I think, he has the final say on this - until we see the code at 
least:-) He also has more experience with SPI than I. Of course, I feel a 
bit uncomfartable building restrictions in directly during design, like 
inability to use different SPI controllers, but I cannot estimate how 
probable it is, that we ever have to deal with this in U-Boot.

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH] net: add 16 bit support for smc911x

[Guennadi Liakhovetski]

On Tue, 29 Apr 2008, Jens Gehrlein wrote:

 Hi Ben, Magnus,
 
 here is my patch to enable 2x16 bit accesses to the LAN9x1x.
 I still not have a HW, so may I ask you to test it and, if applicable,
 fix the code?
 
 Best Regards,
 Jens
 
 ---
 
  drivers/net/smc911x.c |   17 -
  1 files changed, 16 insertions(+), 1 deletions(-)
 
 
 diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
 index d22c889..841a64d 100644
 --- a/drivers/net/smc911x.c
 +++ b/drivers/net/smc911x.c
 @@ -30,6 +30,8 @@
  #include net.h
  #include miiphy.h
  
 +#define CONFIG_DRIVER_SMC911X_16_BIT 1
 +

Looks like an obvious thing - you'll remove this define from the patch for 
final submission, right?

Thanks
Guennadi
---
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[U-Boot-Users] [PATCH] mx31ads: fix loadaddr environment variable define

[Guennadi Liakhovetski]

Arithmetic expressions do not get evaluated under stringification.
Thanks to Felix Radensky for reporting.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

On Sun, 27 Apr 2008, Felix Radensky wrote:

 I've installed 1.3.3-rc1 on i.MX31ADS evaluation board
 and encountered several problems
 
 1. loadaddr environment variable (as reported by printenv)
is defined as
 
   loadaddr=(0x8000 + 0x80)
 
This results in image loaded at address 0x0, and boot gets stuck.
Redefining loadaddr as 0x8080 fixes the problem.

Thanks for reporting, patch below. Feel free to add your Acked- or 
Tested-by.

 2. dhcp command is undefined, only bootp is available.

It wasn't needed in the environment the configuration has been programmed 
for. Patches are welcome:-)

Thanks
Guennadi

 include/configs/mx31ads.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 5286e1f..301afd5 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -87,7 +87,7 @@
 #define CONFIG_NETMASK 255.255.255.0
 #define CONFIG_IPADDR  192.168.23.168
 #define CONFIG_SERVERIP192.168.23.2
-#define CONFIG_LOADADDR(CSD0_BASE + 0x80)  /* loadaddr env 
var */
+#define CONFIG_LOADADDR0x8080  /* loadaddr env var */
 
 #defineCONFIG_EXTRA_ENV_SETTINGS   
\
netdev=eth0\0 \
-- 
1.5.4


 
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[U-Boot-Users] [PATCH v2] mx31ads: fix loadaddr environment variable define

[Guennadi Liakhovetski]

Arithmetic expressions do not get evaluated under stringification. Remove 
default network configuration, add DHCP command support. Thanks to Felix 
Radensky for reporting.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

On Sun, 27 Apr 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
 
   2. dhcp command is undefined, only bootp is available.
  
  It wasn't needed in the environment the configuration has been programmed 
  for. Patches are welcome:-)
 
 Please add it. It's default...

Hm, but it isn't in

#include config_cmd_default.h

?

  diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
  index 5286e1f..301afd5 100644
  --- a/include/configs/mx31ads.h
  +++ b/include/configs/mx31ads.h
  @@ -87,7 +87,7 @@
   #define CONFIG_NETMASK 255.255.255.0
   #define CONFIG_IPADDR  192.168.23.168
   #define CONFIG_SERVERIP192.168.23.2
  -#define CONFIG_LOADADDR(CSD0_BASE + 0x80)  /* loadaddr env 
  var */
  +#define CONFIG_LOADADDR0x8080  /* loadaddr env var */
 
 And while we are at it: Please remove all these default network
 settings. I don't like these at all.

Is this one better?

diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 5286e1f..7614b95 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -79,15 +79,13 @@
 #include config_cmd_default.h
 
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
 #define CONFIG_CMD_SPI
 #define CONFIG_CMD_DATE
 
 #define CONFIG_BOOTDELAY   3
 
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR  192.168.23.168
-#define CONFIG_SERVERIP192.168.23.2
-#define CONFIG_LOADADDR(CSD0_BASE + 0x80)  /* loadaddr env 
var */
+#define CONFIG_LOADADDR0x8080  /* loadaddr env var */
 
 #defineCONFIG_EXTRA_ENV_SETTINGS   
\
netdev=eth0\0 \

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Re: [U-Boot-Users] [PATCH 3/3] MX31ADS environment variable update, spi and rtc support

[Guennadi Liakhovetski]

On Fri, 18 Apr 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
  Update MX31ADS default environment to better match the flash layout and 
  the memory map, support SPI and RTC.
  
  Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
  
  ---
  
  diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c
 
 This doesn't apply at all:
 
 Applying MX31ADS environment variable update, spi and rtc support
 error: board/mx31ads/mx31ads.c: does not exist in index
 error: include/configs/mx31ads.h: does not exist in index

Wolfgang, please excuse me if I am missing something obvious. But the 
above two errors seem to suggest, that the basis mx31ads patch is missing 
in this tree. And an MX31ADS ... update shall certainly be applied on 
the top of that one. To be precise, this is what should be applied first:

[PATCH v3 7/7] Support for the MX31ADS evaluation board from Freescale

Could you please verify that it has indeed been applied to your tree?...

Thanks
Guennadi
---
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DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot-Users] [PATCH 1/2 v2] Additional PCI IDs for IDE and network controllers

[Guennadi Liakhovetski]

These PCI IDs are required by the Linkstation platforms.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/include/pci_ids.h b/include/pci_ids.h
index 5481fff..61c2203 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1472,6 +1472,8 @@
 #define PCI_DEVICE_ID_ITE_IT8172G  0x8172
 #define PCI_DEVICE_ID_ITE_IT8172G_AUDIO 0x0801
 #define PCI_DEVICE_ID_ITE_IT8181   0x8181
+#define PCI_DEVICE_ID_ITE_8211 0x8211
+#define PCI_DEVICE_ID_ITE_8212 0x8212
 #define PCI_DEVICE_ID_ITE_8872 0x8872
 
 #define PCI_DEVICE_ID_ITE_IT8330G_00xe886
@@ -2073,3 +2075,6 @@
 #define PCI_DEVICE_ID_MPC8641  0x7010
 #define PCI_DEVICE_ID_MPC8641D 0x7011
 #define PCI_DEVICE_ID_MPC8610  0x7018
+
+#define PCI_VENDOR_ID_ADMTEK   0x1317
+#define PCI_DEVICE_ID_ADMTEK_AN983B0x0985

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Re: [U-Boot-Users] [PATCH v2 3/7] add an i2c driver for mx31

[Guennadi Liakhovetski]

On Tue, 15 Apr 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
   
   Aren't we just moving the #ifdef hell from one place to another?
  
  Wouldn't it be logical to assume, that if CONFIG_I2C_MXC is defined, 
  CONFIG_HARD_I2C is meant too? So, we could just put in i2c.h
 
 Well, what exactly is CONFIG_I2C_MXC supposed to mean? Sorry for
 asking, but I cannot find it documented anywhere (hint! hint! This
 needs to be fixed!). I tend to believe that in it's current form it's
 redundant, meaning that we have both CONFIG_CMD_I2C and CONFIG_MX31.

Ok, looking at examples, e.g., at cpu/mpc824x/drivers/i2c/i2c.c, it looks 
like u-boot presumes, that a system may only want to use one (hardware) 
i2c driver. I don't understand why this restriction is made, but if we 
want to keep it, we could just drop CONFIG_I2C_MXC and just use 
CONFIG_HARD_I2C. As for redundancy - that's exactly the reason why I don't 
think it is redundant. I can imagine an i.MX31 based system with another 
hardware i2c controller, wanting to use the external one and not needing 
the built-in one.

My preference would be to let CONFIG_I2C_MXC mean use the mxc_i2c.c 
driver for I2C controllers like those on i.MX* / MXC SoCs from Freescale, 
similar to how i2c host drivers under drivers/i2c use their (also not 
always documented) config options:

CONFIG_TSI108_I2C, CONFIG_DRIVER_OMAP24XX_I2C, CONFIG_DRIVER_OMAP1510_I2C

and they just define both the hartdware-specific config and 
CONFIG_HARD_I2C in their *_config.h, but check only for the specific one 
in the .c file. So, shall I just remove the ifdef from .c, add

OBJS-$(CONFIG_I2C_MXC) += ...

to the Makefile and add it to the README?

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far 
only implemented and tested on i.MX31, can with a modified register layout 
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI 
controllers too.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/README b/README
index 0a04d73..4556e87 100644
--- a/README
+++ b/README
@@ -1406,6 +1407,11 @@ The following options need to be configured:
Currently supported on some MPC8xxx processors.  For an
example, see include/configs/mpc8349emds.h.
 
+   CONFIG_MXC_SPI
+
+   Enables the driver for the SPI controllers on i.MX and MXC
+   SoCs. Currently only i.MX31 is supported.
+
 - FPGA Support: CONFIG_FPGA
 
Enables FPGA subsystem.
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 0b7a2df..bc8a104 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB:= $(obj)libspi.a
 
 COBJS-y += mpc8xxx_spi.o
+COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
new file mode 100644
index 000..da1a9e3
--- /dev/null
+++ b/drivers/spi/mxc_spi.c
@@ -0,0 +1,166 @@
+/*
+ * Copyright (C) 2008 Sascha Hauer, Pengutronix 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include spi.h
+#include asm/io.h
+
+#ifdef CONFIG_MX27
+/* i.MX27 has a completely wrong register layout and register definitions in 
the
+ * datasheet, the correct one is in the Freescale's Linux driver */
+
+#error i.MX27 CSPI not supported due to drastic differences in register 
definisions \
+See linux mxc_spi driver from Freescale for details.
+
+#else
+
+#define MXC_CSPIRXDATA 0x00
+#define MXC_CSPITXDATA 0x04
+#define MXC_CSPICTRL   0x08
+#define MXC_CSPIINT0x0C
+#define MXC_CSPIDMA0x10
+#define MXC_CSPISTAT   0x14
+#define MXC_CSPIPERIOD 0x18
+#define MXC_CSPITEST   0x1C
+#define MXC_CSPIRESET  0x00
+
+#define MXC_CSPICTRL_EN(1  0)
+#define MXC_CSPICTRL_MODE  (1  1)
+#define MXC_CSPICTRL_XCH   (1  2)
+#define MXC_CSPICTRL_SMC   (1  3)
+#define MXC_CSPICTRL_POL   (1  4)
+#define MXC_CSPICTRL_PHA   (1  5)
+#define MXC_CSPICTRL_SSCTL (1  6)
+#define MXC_CSPICTRL_SSPOL (1  7)
+#define MXC_CSPICTRL_CHIPSELECT(x) (((x)  0x3)  24)
+#define MXC_CSPICTRL_BITCOUNT(x)   (((x)  0x1f)  8)
+#define MXC_CSPICTRL_DATARATE(x)   (((x)  0x7)  16)
+
+#define MXC_CSPIPERIOD_32KHZ   (1  15)
+
+static unsigned long spi_bases[] = {
+   0x43fa4000,
+   0x5001,
+   0x53f84000,
+};
+
+static unsigned long spi_base;
+
+#endif
+
+spi_chipsel_type spi_chipsel[] = {
+   (spi_chipsel_type)0,
+   (spi_chipsel_type)1,
+   (spi_chipsel_type)2,
+   (spi_chipsel_type)3,
+};
+int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+
+static inline u32 reg_read(unsigned long addr)
+{
+   return *(volatile unsigned long*)addr;
+}
+
+static inline void reg_write(unsigned long addr, u32 val)
+{
+   *(volatile unsigned long*)addr = val;
+}
+
+static u32 spi_xchg_single(u32 data, int bitlen)
+{
+
+   unsigned int cfg_reg = reg_read(spi_base + MXC_CSPICTRL);
+
+   if (MXC_CSPICTRL_BITCOUNT(bitlen - 1) != (cfg_reg  
MXC_CSPICTRL_BITCOUNT(31))) {
+   cfg_reg = (cfg_reg  ~MXC_CSPICTRL_BITCOUNT(31)) |
+   MXC_CSPICTRL_BITCOUNT(bitlen - 1);
+   reg_write(spi_base + MXC_CSPICTRL, cfg_reg);
+   }
+
+   reg_write(spi_base + MXC_CSPITXDATA, data);
+
+   cfg_reg |= MXC_CSPICTRL_XCH;
+
+   reg_write(spi_base + MXC_CSPICTRL, cfg_reg);
+
+   while (reg_read(spi_base + MXC_CSPICTRL)  MXC_CSPICTRL_XCH)
+   ;
+
+   return reg_read(spi_base + MXC_CSPIRXDATA);
+}
+
+int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
+{
+   int n_blks = (bitlen + 31) / 32;
+   u32 *out_l, *in_l;
+   int i;
+
+   if ((int)dout  3 || (int)din  3) {
+   printf(Error: unaligned buffers in: %p, out: %p\n, din, dout);
+   return 1

[U-Boot-Users] [PATCH 2/3] RTC driver for MC13783

[Guennadi Liakhovetski]

MC13783 is a multifunction IS with an SPI interface to the host. This 
driver handles the RTC controller in this chip.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/README b/README
index 0a04d73..4556e87 100644
--- a/README
+++ b/README
@@ -689,6 +689,7 @@ The following options need to be configured:
CONFIG_RTC_DS164x   - use Dallas DS164x RTC
CONFIG_RTC_ISL1208  - use Intersil ISL1208 RTC
CONFIG_RTC_MAX6900  - use Maxim, Inc. MAX6900 RTC
+   CONFIG_RTC_MC13783  - use MC13783 RTC
 
Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 800ab99..2e0c118 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -45,6 +45,7 @@ COBJS-y += m41t60.o
 COBJS-$(CONFIG_RTC_M41T62) += m41t62.o
 COBJS-y += m48t35ax.o
 COBJS-y += max6900.o
+COBJS-$(CONFIG_RTC_MC13783) += mc13783-rtc.o
 COBJS-y += mc146818.o
 COBJS-y += mcfrtc.o
 COBJS-y += mk48t59.o
diff --git a/drivers/rtc/mc13783-rtc.c b/drivers/rtc/mc13783-rtc.c
new file mode 100644
index 000..35b1b8b
--- /dev/null
+++ b/drivers/rtc/mc13783-rtc.c
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include rtc.h
+#include spi.h
+
+int rtc_get(struct rtc_time *rtc)
+{
+   u32 day1, day2, time;
+   u32 reg;
+   int err, tim, i = 0;
+
+   spi_select(1, 0, SPI_MODE_2 | SPI_CS_HIGH);
+
+   do {
+   reg = 0x2c00;
+   err = spi_xfer(0, 32, (uchar *)reg, (uchar *)day1);
+
+   if (err)
+   return err;
+
+   reg = 0x2800;
+   err = spi_xfer(0, 32, (uchar *)reg, (uchar *)time);
+
+   if (err)
+   return err;
+
+   reg = 0x2c00;
+   err = spi_xfer(0, 32, (uchar *)reg, (uchar *)day2);
+
+   if (err)
+   return err;
+   } while (day1 != day2  i++  3);
+
+   tim = day1 * 86400 + time;
+   to_tm(tim, rtc);
+
+   rtc-tm_yday = 0;
+   rtc-tm_isdst = 0;
+
+   return 0;
+}
+
+void rtc_set(struct rtc_time *rtc)
+{
+   u32 time, day, reg;
+
+   time = mktime(rtc-tm_year, rtc-tm_mon, rtc-tm_mday,
+ rtc-tm_hour, rtc-tm_min, rtc-tm_sec);
+   day = time / 86400;
+   time %= 86400;
+
+   reg = 0x2c00 | day | 0x8000;
+   spi_xfer(0, 32, (uchar *)reg, (uchar *)day);
+
+   reg = 0x2800 | time | 0x8000;
+   spi_xfer(0, 32, (uchar *)reg, (uchar *)time);
+}
+
+void rtc_reset(void)
+{
+}

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[U-Boot-Users] [PATCH 3/3] MX31ADS environment variable update, spi and rtc support

[Guennadi Liakhovetski]

Update MX31ADS default environment to better match the flash layout and 
the memory map, support SPI and RTC.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c
index 5a7d8c9..a75cc2d 100644
--- a/board/mx31ads/mx31ads.c
+++ b/board/mx31ads/mx31ads.c
@@ -57,6 +57,18 @@ int board_init (void)
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
 
+   /* SPI2 */
+   mx31_gpio_mux((MUX_CTL_FUNC  8) | MUX_CTL_CSPI2_SS2);
+   mx31_gpio_mux((MUX_CTL_FUNC  8) | MUX_CTL_CSPI2_SCLK);
+   mx31_gpio_mux((MUX_CTL_FUNC  8) | MUX_CTL_CSPI2_SPI_RDY);
+   mx31_gpio_mux((MUX_CTL_FUNC  8) | MUX_CTL_CSPI2_MOSI);
+   mx31_gpio_mux((MUX_CTL_FUNC  8) | MUX_CTL_CSPI2_MISO);
+   mx31_gpio_mux((MUX_CTL_FUNC  8) | MUX_CTL_CSPI2_SS0);
+   mx31_gpio_mux((MUX_CTL_FUNC  8) | MUX_CTL_CSPI2_SS1);
+
+   /* start SPI2 clock */
+   __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3  4);
+
/* PBC setup */
/* Enable UART transceivers also reset the Ethernet/external UART */
readw(CS4_BASE + 4);
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 78e2545..5286e1f 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -51,7 +51,7 @@
  * Size of malloc() pool
  */
 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
-#define CFG_GBL_DATA_SIZE  128  /* size in bytes reserved for initial data 
*/
+#define CFG_GBL_DATA_SIZE  128 /* size in bytes reserved for initial 
data */
 
 /*
  * Hardware drivers
@@ -60,6 +60,12 @@
 #define CONFIG_MX31_UART   1
 #define CFG_MX31_UART1 1
 
+#define CONFIG_HARD_SPI1
+#define CONFIG_MXC_SPI 1
+#define CONFIG_MXC_SPI_IFACE   1   /* Default SPI interface number */
+
+#define CONFIG_RTC_MC13783 1
+
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX  1
@@ -73,20 +79,33 @@
 #include config_cmd_default.h
 
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
 
 #define CONFIG_BOOTDELAY   3
 
 #define CONFIG_NETMASK 255.255.255.0
 #define CONFIG_IPADDR  192.168.23.168
 #define CONFIG_SERVERIP192.168.23.2
-
-#defineCONFIG_EXTRA_ENV_SETTINGS   
\
-   bootargs_base=setenv bootargs console=ttymxc0,115200\0
\
-   bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp 
nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0  \
-   bootcmd=run bootcmd_net\0 
\
-   bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 
0x8000 uImage-mx31; bootm\0 \
-   prg_uboot=tftpboot 0x8000 u-boot-mx31ads.bin; protect off 
0xa000 0xa001; erase 0xa000 0xa001; cp.b 0x8000 0xa000 
$(filesize)\0
-
+#define CONFIG_LOADADDR(CSD0_BASE + 0x80)  /* loadaddr env 
var */
+
+#defineCONFIG_EXTRA_ENV_SETTINGS   
\
+   netdev=eth0\0 \
+   uboot_addr=0xa000\0   \
+   uboot=mx31ads/u-boot.bin\0\
+   kernel=mx31ads/uImage\0   \
+   nfsroot=/opt/eldk/arm\0   \
+   bootargs_base=setenv bootargs console=ttymxc0,115200\0\
+   bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs\
+   ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0   \
+   bootcmd=run bootcmd_net\0 \
+   bootcmd_net=run bootargs_base bootargs_nfs;   \
+   tftpboot ${loadaddr} ${kernel}; bootm\0   \
+   prg_uboot=tftpboot ${loadaddr} ${uboot};  \
+   protect off ${uboot_addr} 0xa003; \
+   erase ${uboot_addr} 0xa003;   \
+   cp.b ${loadaddr} ${uboot_addr} ${filesize};   \
+   setenv filesize; saveenv\0
 
 #define CONFIG_DRIVER_CS8900   1
 #define CS8900_BASE0xb4020300
@@ -120,7 +139,7 @@
 
 #undef CFG_CLKS_IN_HZ  /* everything, incl board info, in Hz */
 
-#define CFG_LOAD_ADDR  CSD0_BASE   /* default load address */
+#define CFG_LOAD_ADDR  CONFIG_LOADADDR
 
 #define CFG_HZ 32000
 

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[U-Boot-Users] [PATCH v2 1/3] New i.MX31 SPI driver

[Guennadi Liakhovetski]

This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
only implemented and tested on i.MX31, can with a modified register layout
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
controllers too.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

Changes since v1: fix a copy-paste error

 README|5 +
 drivers/spi/Makefile  |1 +
 drivers/spi/mxc_spi.c |  166 +
 include/asm-arm/arch-mx31/mx31-regs.h |7 +-
 include/spi.h |   16 +++-
 5 files changed, 193 insertions(+), 2 deletions(-)
 create mode 100644 drivers/spi/mxc_spi.c

diff --git a/README b/README
index 7c16345..d201b92 100644
--- a/README
+++ b/README
@@ -1414,6 +1414,11 @@ The following options need to be configured:
Currently supported on some MPC8xxx processors.  For an
example, see include/configs/mpc8349emds.h.
 
+   CONFIG_MXC_SPI
+
+   Enables the driver for the SPI controllers on i.MX and MXC
+   SoCs. Currently only i.MX31 is supported.
+
 - FPGA Support: CONFIG_FPGA
 
Enables FPGA subsystem.
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 0b7a2df..bc8a104 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB:= $(obj)libspi.a
 
 COBJS-y += mpc8xxx_spi.o
+COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
new file mode 100644
index 000..b2e3ab9
--- /dev/null
+++ b/drivers/spi/mxc_spi.c
@@ -0,0 +1,166 @@
+/*
+ * Copyright (C) 2008, Guennadi Liakhovetski [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include spi.h
+#include asm/io.h
+
+#ifdef CONFIG_MX27
+/* i.MX27 has a completely wrong register layout and register definitions in 
the
+ * datasheet, the correct one is in the Freescale's Linux driver */
+
+#error i.MX27 CSPI not supported due to drastic differences in register 
definisions \
+See linux mxc_spi driver from Freescale for details.
+
+#else
+
+#define MXC_CSPIRXDATA 0x00
+#define MXC_CSPITXDATA 0x04
+#define MXC_CSPICTRL   0x08
+#define MXC_CSPIINT0x0C
+#define MXC_CSPIDMA0x10
+#define MXC_CSPISTAT   0x14
+#define MXC_CSPIPERIOD 0x18
+#define MXC_CSPITEST   0x1C
+#define MXC_CSPIRESET  0x00
+
+#define MXC_CSPICTRL_EN(1  0)
+#define MXC_CSPICTRL_MODE  (1  1)
+#define MXC_CSPICTRL_XCH   (1  2)
+#define MXC_CSPICTRL_SMC   (1  3)
+#define MXC_CSPICTRL_POL   (1  4)
+#define MXC_CSPICTRL_PHA   (1  5)
+#define MXC_CSPICTRL_SSCTL (1  6)
+#define MXC_CSPICTRL_SSPOL (1  7)
+#define MXC_CSPICTRL_CHIPSELECT(x) (((x)  0x3)  24)
+#define MXC_CSPICTRL_BITCOUNT(x)   (((x)  0x1f)  8)
+#define MXC_CSPICTRL_DATARATE(x)   (((x)  0x7)  16)
+
+#define MXC_CSPIPERIOD_32KHZ   (1  15)
+
+static unsigned long spi_bases[] = {
+   0x43fa4000,
+   0x5001,
+   0x53f84000,
+};
+
+static unsigned long spi_base;
+
+#endif
+
+spi_chipsel_type spi_chipsel[] = {
+   (spi_chipsel_type)0,
+   (spi_chipsel_type)1,
+   (spi_chipsel_type)2,
+   (spi_chipsel_type)3,
+};
+int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+
+static inline u32 reg_read(unsigned long addr)
+{
+   return *(volatile unsigned long*)addr;
+}
+
+static inline void reg_write(unsigned long addr, u32 val)
+{
+   *(volatile unsigned long*)addr = val;
+}
+
+static u32 spi_xchg_single(u32 data, int bitlen)
+{
+
+   unsigned int cfg_reg = reg_read(spi_base + MXC_CSPICTRL);
+
+   if (MXC_CSPICTRL_BITCOUNT(bitlen - 1) != (cfg_reg  
MXC_CSPICTRL_BITCOUNT(31))) {
+   cfg_reg = (cfg_reg  ~MXC_CSPICTRL_BITCOUNT(31)) |
+   MXC_CSPICTRL_BITCOUNT(bitlen - 1);
+   reg_write(spi_base + MXC_CSPICTRL, cfg_reg);
+   }
+
+   reg_write(spi_base + MXC_CSPITXDATA, data);
+
+   cfg_reg |= MXC_CSPICTRL_XCH;
+
+   reg_write(spi_base + MXC_CSPICTRL, cfg_reg);
+
+   while (reg_read(spi_base + MXC_CSPICTRL

[U-Boot-Users] [PATCH v3 7/7] Support for the MX31ADS evaluation board from Freescale

[Guennadi Liakhovetski]

This patch adds support for the MX31ADS evaluation board from Freescale, 
initialization code is copied from RedBoot sources, also provided by 
Freescale.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---


On Mon, 14 Apr 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
  This patch adds support for the MX31ADS evaluation board from Freescale, 
  initialization code is copied from RedBoot sources, also provided by 
  Freescale.
  
  Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
 
 Cannot apply this one:
 
 Applying Support for the MX31ADS evaluation board from Freescale
 error: patch failed: include/asm-arm/arch-mx31/mx31-regs.h:133
 error: include/asm-arm/arch-mx31/mx31-regs.h: patch does not apply

Ok, you probably applied previous patches, specifically the 2/7 with the 
--whitespace=fix option, then the last empty line had been removed, and 
now the patch doesn't apply cleanly any more. Below is a version without 
that empty line.

 fatal: mode change for board/imx31_litekit/config.mk, which is not in
 current HEAD

No idea where this could come from. You did try to apply this patch after 
the litekit, didn't you? Then the file should already be there. Anyway, I 
tried with your current tree and the patch below, and it seems to work 
now, please try.

Thanks
Guennadi

Changes since v2: merge with upstream

 MAKEALL |1 +
 Makefile|3 +
 board/mx31ads/Makefile  |   47 +
 board/{imx31_litekit = mx31ads}/config.mk  |0 
 board/mx31ads/lowlevel_init.S   |  281 +++
 board/mx31ads/mx31ads.c |   95 +
 board/{imx31_litekit = mx31ads}/u-boot.lds |0 
 include/asm-arm/arch-mx31/mx31-regs.h   |   14 ++
 include/configs/mx31ads.h   |  157 +++
 9 files changed, 598 insertions(+), 0 deletions(-)
 create mode 100644 board/mx31ads/Makefile
 copy board/{imx31_litekit = mx31ads}/config.mk (100%)
 create mode 100644 board/mx31ads/lowlevel_init.S
 create mode 100644 board/mx31ads/mx31ads.c
 copy board/{imx31_litekit = mx31ads}/u-boot.lds (100%)
 create mode 100644 include/configs/mx31ads.h

diff --git a/MAKEALL b/MAKEALL
index 0ca866f..d192ed2 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -504,6 +504,7 @@ LIST_ARM11=\
apollon \
imx31_litekit   \
imx31_phycore   \
+   mx31ads \
 
 
 #
diff --git a/Makefile b/Makefile
index b3cbb20..207f5bc 100644
--- a/Makefile
+++ b/Makefile
@@ -2601,6 +2601,9 @@ imx31_litekit_config  : unconfig
 imx31_phycore_config   : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31
 
+mx31ads_config : unconfig
+   @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
+
 #
 # i386
 #
diff --git a/board/mx31ads/Makefile b/board/mx31ads/Makefile
new file mode 100644
index 000..dfadd96
--- /dev/null
+++ b/board/mx31ads/Makefile
@@ -0,0 +1,47 @@
+#
+# Copyright (C) 2008, Guennadi Liakhovetski [EMAIL PROTECTED]
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS  := mx31ads.o
+SOBJS  := lowlevel_init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak .depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/imx31_litekit/config.mk b/board/mx31ads/config.mk
similarity index 100%
copy from board/imx31_litekit/config.mk
copy to board/mx31ads/config.mk
diff --git a/board/mx31ads/lowlevel_init.S b/board/mx31ads/lowlevel_init.S
new file mode 100644
index 000

Re: [U-Boot-Users] [PATCH v2 3/7] add an i2c driver for mx31

[Guennadi Liakhovetski]

On Mon, 14 Apr 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
 
   +#if defined(CONFIG_HARD_I2C)  defined (CONFIG_I2C_MXC)
  Please stop to define this here, move it the Makefile
 
 Hm... While I agree with the simple standard case of a single
 #ifdef, I'm not so 100% sure it is a good thing to add such complex
 expressions to the Makefile.
 
 Aren't we just moving the #ifdef hell from one place to another?

Wouldn't it be logical to assume, that if CONFIG_I2C_MXC is defined, 
CONFIG_HARD_I2C is meant too? So, we could just put in i2c.h

#ifdef CONFIG_I2C_MXC
#define CONFIG_HARD_I2C
#endif

And then use the simple

OBJC-$(CONFIG_I2C_MXC) += ...

Incremental patch?

in the Makefile? I personally do prefer when unneeded .c files do not get 
compiled at all, rather than compiled to 0-byte big objects. Makes the 
build process and the resulting tree look cleaner, and the image a bit 
smaller.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Guennadi Liakhovetski]

On Sun, 13 Apr 2008, Fabio Estevam wrote:

 Now I generated uImage correctly and it boots fine.

Good

 Have you ever tried to boot U-boot from NAND
 (K9K1G08U0B) on the i.MX31ADS? 

No, I have not.

Thanks
Guennadi
---
Guennadi Liakhovetski

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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Guennadi Liakhovetski]

On Fri, 11 Apr 2008, Fabio Estevam wrote:

 I am using U-boot 1.3.2 with the MX31ADS patches
 posted by Guennadi Liakhovetski.
 
 I would like to load the zImage kernel from Freescale
 Linux BSP via TFTP and mount the rootfs via NFS.

You nead a uImage. Just use the same kernel sources and do make uImage 
instead of zImage.

 Does anyone have an example for doing this? I am not
 sure what address should I use to load the kernel into
 RAM.

Load it to 0x8080. You can also try the patch below, which will give 
you a better default environment, it shall be submitted to the list soon.

Thanks
Guennadi
---
Guennadi Liakhovetski

[PATCH] mx31ads: Fix default environment

Fix wrong load address in RAM, undefined environment variables,
make the default environment more usable.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 include/configs/mx31ads.h |   25 ++---
 1 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 78e2545..3ad3883 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -80,13 +80,24 @@
 #define CONFIG_IPADDR  192.168.23.168
 #define CONFIG_SERVERIP192.168.23.2
 
-#defineCONFIG_EXTRA_ENV_SETTINGS   
\
-   bootargs_base=setenv bootargs console=ttymxc0,115200\0
\
-   bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp 
nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0  \
-   bootcmd=run bootcmd_net\0 
\
-   bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 
0x8000 uImage-mx31; bootm\0 \
-   prg_uboot=tftpboot 0x8000 u-boot-mx31ads.bin; protect off 
0xa000 0xa001; erase 0xa000 0xa001; cp.b 0x8000 0xa000 
$(filesize)\0
-
+#defineCONFIG_EXTRA_ENV_SETTINGS   
\
+   netdev=eth0\0 \
+   load_addr=0x8080\0\
+   uboot_addr=0xa000\0   \
+   uboot=mx31ads/u-boot.bin\0\
+   kernel=mx31ads/uImage\0   \
+   nfsroot=/opt/eldk/arm\0   \
+   bootargs_base=setenv bootargs console=ttymxc0,115200\0\
+   bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs\
+   ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0   \
+   bootcmd=run bootcmd_net\0 \
+   bootcmd_net=run bootargs_base bootargs_nfs;   \
+   tftpboot ${load_addr} ${kernel}; bootm\0  \
+   prg_uboot=tftpboot ${load_addr} ${uboot}; \
+   protect off ${uboot_addr} 0xa003; \
+   erase ${uboot_addr} 0xa003;   \
+   cp.b ${load_addr} ${uboot_addr} ${filesize};  \
+   setenv filesize; saveenv\0
 
 #define CONFIG_DRIVER_CS8900   1
 #define CS8900_BASE0xb4020300
-- 
1.5.4


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Re: [U-Boot-Users] Loading a kernel on MX31ADS using U-boot

[Guennadi Liakhovetski]

On Sat, 12 Apr 2008, Fabio Estevam wrote:

 I tried to load the kernel at 0x8080, but this is
 what I get:
 Hit any key to stop autoboot:  0
 = run bootargs_base bootargs_nfs
 = tftp 8080 uImage
 TFTP from server 10.29.244.101; our IP address is
 10.29.244.102
 Filename 'uImage'.
 Load address: 0x8080
 Loading:
 #
  ###
 done
 Bytes transferred = 1339152 (146f10 hex)
 = bootm
 ## Booting image at 8080 ...
Image Name:   Linux-2.6.22
Image Type:   ARM Linux Kernel Image (uncompressed)
Data Size:1339088 Bytes =  1.3 MB
Load Address: 80008000
Entry Point:  80008000
Verifying Checksum ... OK
 OK
 
 Starting kernel ...
 
 Uncompressing
 Linux.
 ... done, booting the
 kernel.
 (then it freezes)
   
 I generated uImage manually by doing:
 ./mkimage -A arm -O linux -T kernel -C none -a
 0x80008000 -e 0x80008000 -n 'Linux-2.6.22' -d zImage
 uImage
 
 Used 0x80008000 to match the value of ZRELADDR in
 /arch/arm/mach-mx3/Makefile.boot from Freescale Linux
 BSP.

I'll just assume your uImage is correct - although I don't understand why 
you don't just do make uImage. Apart from that, verify that your console= 
command line parameter is correct, your machine ID matches, and that you 
don't have a jtag debugger like bdi2000 connected when you're trying to 
boot.

Thanks
Guennadi
---
Guennadi Liakhovetski

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Re: [U-Boot-Users] FW: [GIT PULL] Please pull u-boot-arm

[Guennadi Liakhovetski]

Peter, please, do NOT drop addressees from CC.

On Fri, 11 Apr 2008, Peter Pearse wrote:

  I find I have to manually edit the mails I get from my 
  (company mandated) mail client.
  
  My process is
  
  a) Save mail
  b) Manually edit to remove extraneous/incorrect data and formatting
  c) Run mail thru linux kernel/scripts/checkpatch.pl until acceptable
  d) Run git-am, correcting the patch until applies without 
  output other than re whitespace. 
  
  On the code my patch corrections e.g. for line length might 
  differ from those applied by someone else.

To which of the above corrections does this hunk belong:

diff --git a/board/mx31ads/Makefile b/board/mx31ads/Makefile
index dfadd96..c854e05 100644
--- a/board/mx31ads/Makefile
+++ b/board/mx31ads/Makefile
@@ -1,18 +1,14 @@
 #
+# (C) Copyright 2000-2008
 # Copyright (C) 2008, Guennadi Liakhovetski [EMAIL PROTECTED]
 #
+# See file CREDITS for list of people who contributed to this
+# project.
+#
 # This program is free software; you can redistribute it and/or
 # modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundatio; either version 2 of
-# published by the Free Software Foundation; either version 2 of

Especially the last line?

Thanks
Guennadi
---
Guennadi Liakhovetski

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Re: [U-Boot-Users] [GIT PULL] Please pull u-boot-arm

[Guennadi Liakhovetski]

On Fri, 11 Apr 2008, Peter Pearse wrote:

  -Original Message-
  From: Magnus Lilja [mailto:[EMAIL PROTECTED] 
  Sent: 10 April 2008 12:53
  To: Wolfgang Denk
  Cc: Peter Pearse; Guennadi Liakhovetski; 
  u-boot-users@lists.sourceforge.net
  Subject: Re: [U-Boot-Users] [GIT PULL] Please pull u-boot-arm
  
I would expect, that the state of the current repository 
  represents  
   what we get after applying Sascha's and Guennadi's patches (in the  
   correct versions and order). Howver, the current tree looks 
  totally  
   different to me.
  
  There are some vital differences between the current git 
  trees (both the ARM tree and the main tree) and the tree one 
  gets after applying the patches manually (from the posts here 
  on the list).
  
 
 Thanks Magnus
 
   I see that in correcting the formats of the patches I have neglected
 to
 correct the line counts for new files, thus losing the final lines of the
 file.
 
 Applying your patch now

Sorry, do I understand it right, that you are going to keep your patches 
as you have committed them and now apply this patch from Magnus on the 
top? If yes, I don't think this is a correct decision. I think, you should 
revert your commits and re-apply the original unchanged patches.

Thanks
Guennadi
---
Guennadi Liakhovetski

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Re: [U-Boot-Users] [GIT PULL] Please pull u-boot-arm

[Guennadi Liakhovetski]

On Fri, 11 Apr 2008, Wolfgang Denk wrote:

 In message [EMAIL PROTECTED] you wrote:
  
  Sorry, do I understand it right, that you are going to keep your patches 
  as you have committed them and now apply this patch from Magnus on the 
  top? If yes, I don't think this is a correct decision. I think, you should 
  revert your commits and re-apply the original unchanged patches.
 
 I agree with Guennadi. The only solution is to throw away the current
 state of the repository, and restart from the state  before  all  the
 corrupted patches were applied, adding clean, unmodified patches this
 time.

Actually, I think, even Peter should not reset his tree, but revert just 
as well as you are going to do it: his tree is publically accessible too, 
and if he resets his tree, it will become unclear, where respective 
commits from the central tree come from.

 As for the public U-Boot repository, where such a manipulation cannot
 be done easily, I think I would like to revert the commits in
 question, i. e. this list of commits:
 
   066bebd6353e33af3adefc3404560871699e9961
   7a837b7310166ae8fc8b8d66d7ef01b60a80f9d6
   c88ae20580b2b01487b4cdcc8b2a113f551aee36
   a147e56f03871bba4f05058d5e04ce7deb010b04
   d6674e0e2a6a1f033945f78838566210d3f28c95
   8c8463cce44d849e37744749b32d38e1dfb12e50
   c98b47ad24b2d91f41c09a3d62d7f70ad84f4b7d
   8bf69d81782619187933a605f1a95ee1d069478d
   8c16cb0d3b971f46fbe77c072664c0f2dcd4471d
   a574a73852a527779234e73e17e7597fd8128882
   1377b5583a48021d983e1fd565f7d40c89e84d63
   1704dc20917b4f71e373e2c888497ee666d40380
 
 Comments welcome.

Right, so, I think, Peter should do the same.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH] net: make ARP timeout configurable

[Guennadi Liakhovetski]

Currently the timeout waiting for an ARP reply is hard set to 5 seconds. 
On i.MX31ADS due to a hardware strangeness up to four first IP packets 
to the boards get lost, which typically are ARP replies. By configuring 
the timeout to a lower value we significantly improve the first network 
transfer time on this board. The timeout is specified in deciseconds, 
because it has to be converted to hardware ticks, and CFG_HZ ranges from 
900 to 2700 on different boards.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/README b/README
index a9663a3..9249064 100644
--- a/README
+++ b/README
@@ -1547,6 +1547,10 @@ The following options need to be configured:
before giving up the operation. If not defined, a
default value of 5 is used.
 
+   CONFIG_ARP_TIMEOUT
+
+   Timeout waiting for an ARP reply in deciseconds.
+
 - Command Interpreter:
CONFIG_AUTO_COMPLETE
 
diff --git a/net/net.c b/net/net.c
index 44feee2..2128bd4 100644
--- a/net/net.c
+++ b/net/net.c
@@ -94,11 +94,16 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define ARP_TIMEOUT5UL /* Seconds before trying ARP 
again */
+#ifndefCONFIG_ARP_TIMEOUT
+# define ARP_TIMEOUT   50UL/* Deciseconds before trying ARP again 
*/
+#else
+# define ARP_TIMEOUT   CONFIG_ARP_TIMEOUT
+#endif
+
 #ifndefCONFIG_NET_RETRY_COUNT
-# define ARP_TIMEOUT_COUNT 5   /* # of timeouts before giving 
up  */
+# define ARP_TIMEOUT_COUNT 5   /* # of timeouts before giving up  */
 #else
-# define ARP_TIMEOUT_COUNT  (CONFIG_NET_RETRY_COUNT)
+# define ARP_TIMEOUT_COUNT CONFIG_NET_RETRY_COUNT
 #endif
 
 #if 0
@@ -129,7 +134,7 @@ uchar   NetOurEther[6]; /* Our ethernet 
address */
 uchar  NetServerEther[6] = /* Boot server enet address 
*/
{ 0, 0, 0, 0, 0, 0 };
 IPaddr_t   NetOurIP;   /* Our IP addr (0 = unknown)
*/
-IPaddr_t   NetServerIP;/* Our IP addr (0 = unknown)
*/
+IPaddr_t   NetServerIP;/* Server IP addr (0 = unknown) 
*/
 volatile uchar *NetRxPkt;  /* Current receive packet   
*/
 intNetRxPktLen;/* Current rx packet length 
*/
 unsigned   NetIPID;/* IP packet ID 
*/
@@ -253,7 +258,7 @@ void ArpTimeoutCheck(void)
t = get_timer(0);
 
/* check for arp timeout */
-   if ((t - NetArpWaitTimerStart)  ARP_TIMEOUT * CFG_HZ) {
+   if ((t - NetArpWaitTimerStart)  ARP_TIMEOUT * CFG_HZ / 10) {
NetArpWaitTry++;
 
if (NetArpWaitTry = ARP_TIMEOUT_COUNT) {
@@ -494,7 +499,7 @@ restart:
 *  Check the ethernet for a new packet.  The ethernet
 *  receive routine will process it.
 */
-   eth_rx();
+   eth_rx();
 
/*
 *  Abort if ctrl-c was pressed.

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[U-Boot-Users] [PATCH] cfi_flash: Support buffered writes on non-standard Spansion NOR flash

[Guennadi Liakhovetski]

Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit 
series require different addresses for buffered write commands. Define a 
configuration option to support buffered writes on those chips. A more 
elegant solution would be to automatically detect those chips by parsing 
their CFI records, but that would require introduction of a fixup table 
into the cfi_flash driver.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/README b/README
index a9663a3..9249064 100644
--- a/README
+++ b/README
@@ -2014,6 +2018,13 @@ Configuration Settings:
This option also enables the building of the cfi_flash driver
in the drivers directory
 
+- CFG_FLASH_USE_BUFFER_WRITE
+   Use buffered writes to flash.
+
+- CONFIG_FLASH_SPANSION_S29WS_N
+   s29ws-n MirrorBit flash has non-standard addresses for buffered
+   write commands.
+
 - CFG_FLASH_QUIET_TEST
If this option is defined, the common CFI flash doesn't
print it's warning upon not recognized FLASH banks. This
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index f04c72d..d7f73cb 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -828,25 +828,29 @@ static int flash_write_cfibuffer (flash_info_t * info, 
ulong dest, uchar * cp,
void *dst = map_physmem(dest, len, MAP_NOCACHE);
void *dst2 = dst;
int flag = 0;
+   uint offset = 0;
+   unsigned int shift;
 
switch (info-portwidth) {
case FLASH_CFI_8BIT:
-   cnt = len;
+   shift = 0;
break;
case FLASH_CFI_16BIT:
-   cnt = len  1;
+   shift = 1;
break;
case FLASH_CFI_32BIT:
-   cnt = len  2;
+   shift = 2;
break;
case FLASH_CFI_64BIT:
-   cnt = len  3;
+   shift = 3;
break;
default:
retcode = ERR_INVAL;
goto out_unmap;
}
 
+   cnt = len  shift;
+
while ((cnt--  0)  (flag == 0)) {
switch (info-portwidth) {
case FLASH_CFI_8BIT:
@@ -890,23 +894,7 @@ static int flash_write_cfibuffer (flash_info_t * info, 
ulong dest, uchar * cp,
if (retcode == ERR_OK) {
/* reduce the number of loops by the width of
 * the port */
-   switch (info-portwidth) {
-   case FLASH_CFI_8BIT:
-   cnt = len;
-   break;
-   case FLASH_CFI_16BIT:
-   cnt = len  1;
-   break;
-   case FLASH_CFI_32BIT:
-   cnt = len  2;
-   break;
-   case FLASH_CFI_64BIT:
-   cnt = len  3;
-   break;
-   default:
-   retcode = ERR_INVAL;
-   goto out_unmap;
-   }
+   cnt = len  shift;
flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
while (cnt--  0) {
switch (info-portwidth) {
@@ -943,36 +931,34 @@ static int flash_write_cfibuffer (flash_info_t * info, 
ulong dest, uchar * cp,
case CFI_CMDSET_AMD_STANDARD:
case CFI_CMDSET_AMD_EXTENDED:
flash_unlock_seq(info,0);
-   flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
+
+#ifdef CONFIG_FLASH_SPANSION_S29WS_N
+   offset = ((unsigned long)dst - info-start[sector])  shift;
+#endif
+   flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
+   cnt = len  shift;
+   flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
 
switch (info-portwidth) {
case FLASH_CFI_8BIT:
-   cnt = len;
-   flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
while (cnt--  0) {
flash_write8(flash_read8(src), dst);
src += 1, dst += 1;
}
break;
case FLASH_CFI_16BIT:
-   cnt = len  1;
-   flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
while (cnt--  0) {
flash_write16(flash_read16(src), dst);
src += 2, dst += 2;
}
break;
case FLASH_CFI_32BIT:
-   cnt = len  2;
-   flash_write_cmd (info, sector, 0,  (uchar) cnt - 1

[U-Boot-Users] [PATCH] MX31ADS network and flash updates

[Guennadi Liakhovetski]

This patch depends on the previous two patches, introducing the 
CONFIG_FLASH_SPANSION_S29WS_N and CONFIG_ARP_TIMEOUT configuration 
options. It allows U-Boot to use buffered writes to the Spansion NOR flash 
installed on this board, and eliminates long delays in network transfers 
after the board startup.

Also modify flash layout to embed main and redundant environment blocks in 
the U-Boot image.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c
index 7c50c02..5a7d8c9 100644
--- a/board/mx31ads/mx31ads.c
+++ b/board/mx31ads/mx31ads.c
@@ -38,18 +38,18 @@ int dram_init (void)
 int board_init (void)
 {
int i;
-#if 0
+
/* CS0: Nor Flash */
/*
-* These are values from the RedBoot sources by Freescale. However,
-* under U-Boot with this configuration 32-bit accesses don't work,
-* lower 16 bits of data are read twice for each 32-bit read.
+* CS0L and CS0A values are from the RedBoot sources by Freescale
+* and are also equal to those used by Sascha Hauer for the Phytec
+* i.MX31 board. CS0U is just a slightly optimized hardware default:
+* the only non-zero field Wait State Control is set to half the
+* default value.
 */
-   __REG(CSCR_U(0)) = 0x23524E80;
-   __REG(CSCR_L(0)) = 0x1D03; /* WRAP bit (1) is suspicious here, but
-   * disabling it doesn't help either */
+   __REG(CSCR_U(0)) = 0x0f00;
+   __REG(CSCR_L(0)) = 0x1D03;
__REG(CSCR_A(0)) = 0x00720900;
-#endif
 
/* setup pins for UART1 */
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
diff --git a/board/mx31ads/u-boot.lds b/board/mx31ads/u-boot.lds
index 1460adc..49713d4 100644
--- a/board/mx31ads/u-boot.lds
+++ b/board/mx31ads/u-boot.lds
@@ -34,7 +34,18 @@ SECTIONS
. = ALIGN(4);
.text  :
{
- cpu/arm1136/start.o   (.text)
+ /* WARNING - the following is hand-optimized to fit within*/
+ /* the sector layout of our flash chips!  XXX FIXME XXX   */
+
+ cpu/arm1136/start.o   (.text)
+ board/mx31ads/libmx31ads.a(.text)
+ lib_arm/libarm.a  (.text)
+ net/libnet.a  (.text)
+ drivers/mtd/libmtd.a  (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o(.text)
+
  *(.text)
}
 
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 77a9a83..9b72c89 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -72,7 +72,6 @@
 
 #include config_cmd_default.h
 
-#define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
 
 #define CONFIG_BOOTDELAY   3
@@ -91,7 +90,19 @@
 
 #define CONFIG_DRIVER_CS8900   1
 #define CS8900_BASE0xb4020300
-#define CS8900_BUS16   1   /* the Linux driver does accesses as 
shorts */
+#define CS8900_BUS16   1   /* follow the Linux driver */
+
+/*
+ * The MX31ADS board seems to have a hardware peculiarity confirmed under
+ * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
+ * controller inverted. The controller is capable of detecting and correcting
+ * this, but it needs 4 network packets for that. Which means, at startup, you
+ * will not receive answers to the first 4 packest, unless there have been some
+ * broadcasts on the network, or your board is on a hub. Reducing the ARP
+ * timeout from default 5 seconds to 200ms we speed up the initial TFTP
+ * transfer, should the user wish one, significantly.
+ */
+#define CONFIG_ARP_TIMEOUT 2UL
 
 /*
  * Miscellaneous configurable options
@@ -100,7 +111,7 @@
 #define CFG_PROMPT = 
 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
 /* Print Buffer Size */
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_MAXARGS16  /* max number of command args */
 #define CFG_BARGSIZE   CFG_CBSIZE  /* Boot Argument Buffer Size */
 
@@ -136,25 +147,29 @@
 #define CFG_MAX_FLASH_BANKS1   /* max number of memory banks */
 #define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one 
chip */
 #define CFG_MONITOR_BASE   CFG_FLASH_BASE  /* Monitor at beginning of 
flash */
-#define CFG_MONITOR_LEN(128 * 1024)/* Reserve 128KiB */
+#define CFG_MONITOR_LEN(256 * 1024)/* Reserve 256KiB */
 
 #defineCFG_ENV_IS_IN_FLASH 1
 #define CFG_ENV_SECT_SIZE  (32 * 1024)
 #define CFG_ENV_SIZE   CFG_ENV_SECT_SIZE
+
+/* Address and size of Redundant Environment Sector*/
+#define CFG_ENV_OFFSET_REDUND  (CFG_ENV_OFFSET + CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUNDCFG_ENV_SIZE
+
 /* S29WS256N NOR flash has 4 32KiB small

[U-Boot-Users] [PATCH] minor cs8900 driver clean up

[Guennadi Liakhovetski]

Remove a redundant register definition, clean up some coding style 
violations.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c
index 55ef346..458b517 100644
--- a/drivers/net/cs8900.c
+++ b/drivers/net/cs8900.c
@@ -65,14 +65,14 @@ static unsigned short get_reg_init_bus (int regno)
c = CS8900_BUS16_0;
 
CS8900_PPTR = regno;
-   return (unsigned short) CS8900_PDATA;
+   return CS8900_PDATA;
 }
 #endif
 
 static unsigned short get_reg (int regno)
 {
CS8900_PPTR = regno;
-   return (unsigned short) CS8900_PDATA;
+   return CS8900_PDATA;
 }
 
 
@@ -131,7 +131,7 @@ void cs8900_get_enetaddr (uchar * addr)
if (get_reg_init_bus (PP_ChipID) != 0x630e)
return;
eth_reset ();
-   if ((get_reg (PP_SelfST)  (PP_SelfSTAT_EEPROM | 
PP_SelfSTAT_EEPROM_OK)) ==
+   if ((get_reg (PP_SelfSTAT)  (PP_SelfSTAT_EEPROM | 
PP_SelfSTAT_EEPROM_OK)) ==
(PP_SelfSTAT_EEPROM | PP_SelfSTAT_EEPROM_OK)) {
 
/* Load the MAC from EEPROM */
@@ -168,7 +168,6 @@ void cs8900_get_enetaddr (uchar * addr)
debug (### Set environment from HW MAC addr = 
\%s\\n, ethaddr);
setenv (ethaddr, ethaddr);
}
-
}
 }
 
@@ -183,7 +182,6 @@ void eth_halt (void)
 
 int eth_init (bd_t * bd)
 {
-
/* verify chip id */
if (get_reg_init_bus (PP_ChipID) != 0x630e) {
printf (CS8900 Ethernet chip not found?!\n);
@@ -201,7 +199,7 @@ int eth_init (bd_t * bd)
 }
 
 /* Get a data block via Ethernet */
-extern int eth_rx (void)
+int eth_rx (void)
 {
int i;
unsigned short rxlen;
@@ -233,7 +231,7 @@ extern int eth_rx (void)
 }
 
 /* Send a data block via Ethernet. */
-extern int eth_send (volatile void *packet, int length)
+int eth_send (volatile void *packet, int length)
 {
volatile unsigned short *addr;
int tmo;
@@ -281,7 +279,8 @@ retry:
 
 static void cs8900_e2prom_ready(void)
 {
-   while(get_reg(PP_SelfST)  SI_BUSY);
+   while (get_reg(PP_SelfSTAT)  SI_BUSY)
+   ;
 }
 
 /***/
diff --git a/drivers/net/cs8900.h b/drivers/net/cs8900.h
index f886d10..f9c32dd 100644
--- a/drivers/net/cs8900.h
+++ b/drivers/net/cs8900.h
@@ -243,7 +243,6 @@
 
 /* EEPROM Kram */
 #define SI_BUSY 0x0100
-#define PP_SelfST 0x0136   /*  Self State register */
 #define PP_EECMD 0x0040/*  NVR Interface Command register */
 #define PP_EEData 0x0042   /*  NVR Interface Data Register */
 #define EEPROM_WRITE_EN0x00F0

-
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[U-Boot-Users] [PATCH] Clean up smsc911x driver

[Guennadi Liakhovetski]

Replace direct register address derefencing with accessor functions. 
Restrict explicitly 32-bit bus-width, extend affected configurations 
respectively.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

Sascha, please test.

diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index c332189..c17dcf4 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -30,321 +30,332 @@
 #include net.h
 #include miiphy.h
 
-#define mdelay(n)   udelay((n)*1000)
+#ifdef CONFIG_DRIVER_SMC911X_32_BIT
+static inline u32 reg_read(u32 addr)
+{
+   return *(volatile u32*)addr;
+}
+static inline void reg_write(u32 addr, u32 val)
+{
+   *(volatile u32*)addr = val;
+}
+#else
+#error SMC911X: Only 32-bit bus is supported
+#endif
 
-#define __REG(x) (*((volatile u32 *)(x)))
+#define mdelay(n)   udelay((n)*1000)
 
 /* Below are the register offsets and bit definitions
  * of the Lan911x memory space
  */
-#define RX_DATA_FIFO__REG(CONFIG_DRIVER_SMC911X_BASE + 0x00)
-
-#define TX_DATA_FIFO__REG(CONFIG_DRIVER_SMC911X_BASE + 0x20)
-#defineTX_CMD_A_INT_ON_COMP(0x8000)
-#defineTX_CMD_A_INT_BUF_END_ALGN   (0x0300)
-#defineTX_CMD_A_INT_4_BYTE_ALGN(0x)
-#defineTX_CMD_A_INT_16_BYTE_ALGN   (0x0100)
-#defineTX_CMD_A_INT_32_BYTE_ALGN   (0x0200)
-#defineTX_CMD_A_INT_DATA_OFFSET(0x001F)
-#defineTX_CMD_A_INT_FIRST_SEG  (0x2000)
-#defineTX_CMD_A_INT_LAST_SEG   (0x1000)
-#defineTX_CMD_A_BUF_SIZE   (0x07FF)
-#defineTX_CMD_B_PKT_TAG(0x)
-#defineTX_CMD_B_ADD_CRC_DISABLE(0x2000)
-#defineTX_CMD_B_DISABLE_PADDING(0x1000)
-#defineTX_CMD_B_PKT_BYTE_LENGTH(0x07FF)
-
-#define RX_STATUS_FIFO __REG(CONFIG_DRIVER_SMC911X_BASE + 0x40)
-#defineRX_STS_PKT_LEN  (0x3FFF)
-#defineRX_STS_ES   (0x8000)
-#defineRX_STS_BCST (0x2000)
-#defineRX_STS_LEN_ERR  (0x1000)
-#defineRX_STS_RUNT_ERR (0x0800)
-#defineRX_STS_MCAST(0x0400)
-#defineRX_STS_TOO_LONG (0x0080)
-#defineRX_STS_COLL (0x0040)
-#defineRX_STS_ETH_TYPE (0x0020)
-#defineRX_STS_WDOG_TMT (0x0010)
-#defineRX_STS_MII_ERR  (0x0008)
-#defineRX_STS_DRIBBLING(0x0004)
-#defineRX_STS_CRC_ERR  (0x0002)
-#define RX_STATUS_FIFO_PEEK__REG(CONFIG_DRIVER_SMC911X_BASE + 0x44)
-#define TX_STATUS_FIFO __REG(CONFIG_DRIVER_SMC911X_BASE + 0x48)
-#defineTX_STS_TAG  (0x)
-#defineTX_STS_ES   (0x8000)
-#defineTX_STS_LOC  (0x0800)
-#defineTX_STS_NO_CARR  (0x0400)
-#defineTX_STS_LATE_COLL(0x0200)
-#defineTX_STS_MANY_COLL(0x0100)
-#defineTX_STS_COLL_CNT (0x0078)
-#defineTX_STS_MANY_DEFER   (0x0004)
-#defineTX_STS_UNDERRUN (0x0002)
-#defineTX_STS_DEFERRED (0x0001)
-#define TX_STATUS_FIFO_PEEK__REG(CONFIG_DRIVER_SMC911X_BASE + 0x4C)
-#define ID_REV __REG(CONFIG_DRIVER_SMC911X_BASE + 0x50)
-#defineID_REV_CHIP_ID  (0x)  /* RO */
-#defineID_REV_REV_ID   (0x)  /* RO */
-
-#define INT_CFG__REG(CONFIG_DRIVER_SMC911X_BASE + 0x54)
-#defineINT_CFG_INT_DEAS(0xFF00)  /* R/W */
-#defineINT_CFG_INT_DEAS_CLR(0x4000)
-#defineINT_CFG_INT_DEAS_STS(0x2000)
-#defineINT_CFG_IRQ_INT (0x1000)  /* RO */
-#defineINT_CFG_IRQ_EN  (0x0100)  /* R/W */
-#defineINT_CFG_IRQ_POL (0x0010)  /* R/W 
Not Affected by SW Reset */
-#defineINT_CFG_IRQ_TYPE(0x0001)  /* R/W 
Not Affected by SW Reset */
-
-#define INT_STS__REG(CONFIG_DRIVER_SMC911X_BASE + 0x58)
-#defineINT_STS_SW_INT  (0x8000)  /* R/WC */
-#defineINT_STS_TXSTOP_INT

Re: [U-Boot-Users] [PATCH] Clean up smsc911x driver

[Guennadi Liakhovetski]

On Thu, 3 Apr 2008, Ben Warren wrote:

 Guennadi Liakhovetski wrote:
  Replace direct register address derefencing with accessor functions.
  Restrict explicitly 32-bit bus-width, extend affected configurations
  respectively.
  

 Much better!  Thanks for doing all this work.  The only problem is that you're
 providing it relative to another patch that hasn't been accepted.

Well, the merge window is closed, so, I cannot send in any more new 
features. Whereas if we consider this as a fix - maybe it would be 
possible?

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

-
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Re: [U-Boot-Users] [PATCH] net: make ARP timeout configurable

[Guennadi Liakhovetski]

On Thu, 3 Apr 2008, Ben Warren wrote:

 Hi Guennadi,
 
 Guennadi Liakhovetski wrote:
  Currently the timeout waiting for an ARP reply is hard set to 5 seconds. On
  i.MX31ADS due to a hardware strangeness up to four first IP packets to the
  boards get lost, which typically are ARP replies. By configuring the timeout
  to a lower value we significantly improve the first network transfer time on
  this board. The timeout is specified in deciseconds, because it has to be
  converted to hardware ticks, and CFG_HZ ranges from 900 to 2700 on
  different boards.
  
 I like this, but let's stick to SI units please, probably ms.  This isn't an
 important enough calculation to worry about precision, only overflow, so just
 make sure you handle order of operations properly and it should be fine.  If
 I'm not thinking this through properly, which is entirely possible, make the
 code do a /100 to get into ds rather than asking the user to provide it.  I'm
 concerned that people will say ***WTF is a decisecond!***

Ok, expect a new version shortly.

  @@ -253,7 +258,7 @@ void ArpTimeoutCheck(void)
  t = get_timer(0);
  /* check for arp timeout */
  -   if ((t - NetArpWaitTimerStart)  ARP_TIMEOUT * CFG_HZ) {
  +   if ((t - NetArpWaitTimerStart)  ARP_TIMEOUT * CFG_HZ / 10) {
  NetArpWaitTry++;
  if (NetArpWaitTry = ARP_TIMEOUT_COUNT) {
  @@ -494,7 +499,7 @@ restart:
   *  Check the ethernet for a new packet.  The ethernet
   *  receive routine will process it.
   */
  -   eth_rx();
  +   eth_rx();

 Not sure why you did this.  Is it indented from the if() once applied?

It is not under an if - it is another hunk.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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[U-Boot-Users] [PATCH v2] MX31ADS network and flash updates

[Guennadi Liakhovetski]

This patch depends on the previous two patches, introducing the 
CONFIG_FLASH_SPANSION_S29WS_N and CONFIG_ARP_TIMEOUT configuration 
options. It allows U-Boot to use buffered writes to the Spansion NOR flash 
installed on this board, and eliminates long delays in network transfers 
after the board startup.

Also modify flash layout to embed main and redundant environment blocks in 
the U-Boot image.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

Changes since v1: now specifying CONFIG_ARP_TIMEOUT in milliseconds

diff --git a/board/mx31ads/mx31ads.c b/board/mx31ads/mx31ads.c
index 7c50c02..5a7d8c9 100644
--- a/board/mx31ads/mx31ads.c
+++ b/board/mx31ads/mx31ads.c
@@ -38,18 +38,18 @@ int dram_init (void)
 int board_init (void)
 {
int i;
-#if 0
+
/* CS0: Nor Flash */
/*
-* These are values from the RedBoot sources by Freescale. However,
-* under U-Boot with this configuration 32-bit accesses don't work,
-* lower 16 bits of data are read twice for each 32-bit read.
+* CS0L and CS0A values are from the RedBoot sources by Freescale
+* and are also equal to those used by Sascha Hauer for the Phytec
+* i.MX31 board. CS0U is just a slightly optimized hardware default:
+* the only non-zero field Wait State Control is set to half the
+* default value.
 */
-   __REG(CSCR_U(0)) = 0x23524E80;
-   __REG(CSCR_L(0)) = 0x1D03; /* WRAP bit (1) is suspicious here, but
-   * disabling it doesn't help either */
+   __REG(CSCR_U(0)) = 0x0f00;
+   __REG(CSCR_L(0)) = 0x1D03;
__REG(CSCR_A(0)) = 0x00720900;
-#endif
 
/* setup pins for UART1 */
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
diff --git a/board/mx31ads/u-boot.lds b/board/mx31ads/u-boot.lds
index 1460adc..49713d4 100644
--- a/board/mx31ads/u-boot.lds
+++ b/board/mx31ads/u-boot.lds
@@ -34,7 +34,18 @@ SECTIONS
. = ALIGN(4);
.text  :
{
- cpu/arm1136/start.o   (.text)
+ /* WARNING - the following is hand-optimized to fit within*/
+ /* the sector layout of our flash chips!  XXX FIXME XXX   */
+
+ cpu/arm1136/start.o   (.text)
+ board/mx31ads/libmx31ads.a(.text)
+ lib_arm/libarm.a  (.text)
+ net/libnet.a  (.text)
+ drivers/mtd/libmtd.a  (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o(.text)
+
  *(.text)
}
 
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 77a9a83..9b72c89 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -72,7 +72,6 @@
 
 #include config_cmd_default.h
 
-#define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
 
 #define CONFIG_BOOTDELAY   3
@@ -91,7 +90,19 @@
 
 #define CONFIG_DRIVER_CS8900   1
 #define CS8900_BASE0xb4020300
-#define CS8900_BUS16   1   /* the Linux driver does accesses as 
shorts */
+#define CS8900_BUS16   1   /* follow the Linux driver */
+
+/*
+ * The MX31ADS board seems to have a hardware peculiarity confirmed under
+ * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
+ * controller inverted. The controller is capable of detecting and correcting
+ * this, but it needs 4 network packets for that. Which means, at startup, you
+ * will not receive answers to the first 4 packest, unless there have been some
+ * broadcasts on the network, or your board is on a hub. Reducing the ARP
+ * timeout from default 5 seconds to 200ms we speed up the initial TFTP
+ * transfer, should the user wish one, significantly.
+ */
+#define CONFIG_ARP_TIMEOUT 200UL
 
 /*
  * Miscellaneous configurable options
@@ -100,7 +111,7 @@
 #define CFG_PROMPT = 
 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
 /* Print Buffer Size */
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_MAXARGS16  /* max number of command args */
 #define CFG_BARGSIZE   CFG_CBSIZE  /* Boot Argument Buffer Size */
 
@@ -136,25 +147,29 @@
 #define CFG_MAX_FLASH_BANKS1   /* max number of memory banks */
 #define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one 
chip */
 #define CFG_MONITOR_BASE   CFG_FLASH_BASE  /* Monitor at beginning of 
flash */
-#define CFG_MONITOR_LEN(128 * 1024)/* Reserve 128KiB */
+#define CFG_MONITOR_LEN(256 * 1024)/* Reserve 256KiB */
 
 #defineCFG_ENV_IS_IN_FLASH 1
 #define CFG_ENV_SECT_SIZE  (32 * 1024)
 #define CFG_ENV_SIZE   CFG_ENV_SECT_SIZE
+
+/* Address and size of Redundant Environment Sector*/
+#define CFG_ENV_OFFSET_REDUND  (CFG_ENV_OFFSET + CFG_ENV_SIZE)
+#define

[U-Boot-Users] [PATCH v2] net: make ARP timeout configurable

[Guennadi Liakhovetski]

Currently the timeout waiting for an ARP reply is hard set to 5 seconds. 
On i.MX31ADS due to a hardware strangeness up to four first IP packets 
to the boards get lost, which typically are ARP replies. By configuring 
the timeout to a lower value we significantly improve the first network 
transfer time on this board. The timeout is specified in milliseconds, 
later internally it is converted to deciseconds, because it has to be 
converted to hardware ticks, and CFG_HZ ranges from 900 to 2700 on 
different boards.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

diff --git a/README b/README
index a9663a3..9249064 100644
--- a/README
+++ b/README
@@ -1547,6 +1547,10 @@ The following options need to be configured:
before giving up the operation. If not defined, a
default value of 5 is used.
 
+   CONFIG_ARP_TIMEOUT
+
+   Timeout waiting for an ARP reply in milliseconds.
+
 - Command Interpreter:
CONFIG_AUTO_COMPLETE
 
diff --git a/net/net.c b/net/net.c
index 44feee2..2128bd4 100644
--- a/net/net.c
+++ b/net/net.c
@@ -94,11 +94,22 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define ARP_TIMEOUT5UL /* Seconds before trying ARP 
again */
+#ifndefCONFIG_ARP_TIMEOUT
+# define ARP_TIMEOUT   50UL/* Deciseconds before trying ARP again 
*/
+#elif (CONFIG_ARP_TIMEOUT  100)
+# error Due to possible overflow CONFIG_ARP_TIMEOUT must be greater than 
100ms
+#else
+# if (CONFIG_ARP_TIMEOUT % 100)
+#  warning Supported ARP_TIMEOUT precision is 100ms
+# endif
+# define ARP_TIMEOUT   (CONFIG_ARP_TIMEOUT / 100)
+#endif
+
+
 #ifndefCONFIG_NET_RETRY_COUNT
-# define ARP_TIMEOUT_COUNT 5   /* # of timeouts before giving 
up  */
+# define ARP_TIMEOUT_COUNT 5   /* # of timeouts before giving up  */
 #else
-# define ARP_TIMEOUT_COUNT  (CONFIG_NET_RETRY_COUNT)
+# define ARP_TIMEOUT_COUNT CONFIG_NET_RETRY_COUNT
 #endif
 
 #if 0
@@ -129,7 +140,7 @@ uchar   NetOurEther[6]; /* Our ethernet 
address */
 uchar  NetServerEther[6] = /* Boot server enet address 
*/
{ 0, 0, 0, 0, 0, 0 };
 IPaddr_t   NetOurIP;   /* Our IP addr (0 = unknown)
*/
-IPaddr_t   NetServerIP;/* Our IP addr (0 = unknown)
*/
+IPaddr_t   NetServerIP;/* Server IP addr (0 = unknown) 
*/
 volatile uchar *NetRxPkt;  /* Current receive packet   
*/
 intNetRxPktLen;/* Current rx packet length 
*/
 unsigned   NetIPID;/* IP packet ID 
*/
@@ -253,7 +264,7 @@ void ArpTimeoutCheck(void)
t = get_timer(0);
 
/* check for arp timeout */
-   if ((t - NetArpWaitTimerStart)  ARP_TIMEOUT * CFG_HZ) {
+   if ((t - NetArpWaitTimerStart)  ARP_TIMEOUT * CFG_HZ / 10) {
NetArpWaitTry++;
 
if (NetArpWaitTry = ARP_TIMEOUT_COUNT) {
@@ -494,7 +505,7 @@ restart:
 *  Check the ethernet for a new packet.  The ethernet
 *  receive routine will process it.
 */
-   eth_rx();
+   eth_rx();
 
/*
 *  Abort if ctrl-c was pressed.

-
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Re: [U-Boot-Users] [PATCH] Clean up smsc911x driver

[Guennadi Liakhovetski]

On Thu, 3 Apr 2008, Ben Warren wrote:

 I know the timetable says the merge window is closed, but there hasn't been
 any type of announcement and history tells me that there's probably still
 time.  I have some things I'd still like to get in if possible, but only WD
 can say for sure, of course.

He has:

* Now talking on #u-boot
* Topic for #u-boot is: Merge Window for 1.3.3 is over - only bug fixes 
accepted now.
* Topic for #u-boot set by wdenk at Tue Apr  1 10:27:53 2008

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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Re: [U-Boot-Users] [PATCH] Clean up smsc911x driver

[Guennadi Liakhovetski]

On Thu, 3 Apr 2008, Ben Warren wrote:

 Wolfgang Denk wrote:
 
  Oh, there has been an announcement:
 
  Topic for #u-boot: Merge Window for 1.3.3 is over - only bug fixes accepted 
  now.
  Topic for #u-boot set by wdenk at 2008-04-01 10:27:53

  ^^^

 OK, where do you announce these things, so I can be sure to notice next 
 time?  I'm not trying to be a smart-ass, but am really curious.

i.e. #u-boot IRC channel on irc.freenode.net.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

-
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[U-Boot-Users] [PATCH 1/2] Additional PCI IDs for IDE and network controllers

[Guennadi Liakhovetski]

These PCI IDs are required by the Linkstation platforms.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

Sorry for a last minute submission... Woould be good to get this and the 
following patch in for 1.3.3. Haven't found a PCI custodian, so, CC-ing 
Wolfgang.

 include/pci_ids.h |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/include/pci_ids.h b/include/pci_ids.h
index 3b10452..638d3d8 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1472,6 +1472,8 @@
 #define PCI_DEVICE_ID_ITE_IT8172G  0x8172
 #define PCI_DEVICE_ID_ITE_IT8172G_AUDIO 0x0801
 #define PCI_DEVICE_ID_ITE_IT8181   0x8181
+#define PCI_DEVICE_ID_ITE_8211 0x8211
+#define PCI_DEVICE_ID_ITE_8212 0x8212
 #define PCI_DEVICE_ID_ITE_8872 0x8872
 
 #define PCI_DEVICE_ID_ITE_IT8330G_00xe886
@@ -2073,3 +2075,5 @@
 #define PCI_DEVICE_ID_MPC8641D 0x7011
 #define PCI_DEVICE_ID_MPC8610  0x7018
 
+#define PCI_VENDOR_ID_ADMTEK   0x1317
+#define PCI_DEVICE_ID_ADMTEK_AN983B0x985
-- 
1.5.4


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[U-Boot-Users] [PATCH 2/2] Support for LinkStation / KuroBox HD and HG PPC models

[Guennadi Liakhovetski]

This patch is based on the port by Mihai Georgian (see linkstation.c for 
Copyright information) and implements support for LinkStation / KuroBox HD 
and HG PPC models from Buffalo Technology, whereby HD is deactivated at 
the moment, pending network driver fixing.

Notice to users: this is pretty much a barebone port. Support for network 
on HG models is already in the U-Boot mainline, but you might also want 
patches to switch fan / phy modes depending on the negotiated ethernet 
parameters. This patch also doesn't support console switching, booting EM 
mode, Buffalo specific ext2 magic number. So, if you want to use any of 
those, you need additional patches. Otherwise this patche provides a fully 
functional u-boot with a network console on your system.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

---

As the comment in the Makefile states, HD is disabled at the moment due to 
a problem with the network driver, which has to be investigated further, 
as hardware availability and time permit.

 MAKEALL |1 +
 Makefile|   12 ++
 board/linkstation/Makefile  |   40 +++
 board/linkstation/avr.c |  293 ++
 board/linkstation/config.mk |   50 
 board/linkstation/hwctl.c   |  135 +++
 board/linkstation/ide.c |   99 
 board/linkstation/linkstation.c |  130 ++
 include/configs/linkstation.h   |  509 +++
 9 files changed, 1267 insertions(+), 0 deletions(-)
 create mode 100644 board/linkstation/Makefile
 create mode 100644 board/linkstation/avr.c
 create mode 100644 board/linkstation/config.mk
 create mode 100644 board/linkstation/hwctl.c
 create mode 100644 board/linkstation/ide.c
 create mode 100644 board/linkstation/linkstation.c
 create mode 100644 include/configs/linkstation.h

diff --git a/MAKEALL b/MAKEALL
index 0e1c0cb..9110a4a 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -256,6 +256,7 @@ LIST_824x= \
debris  \
eXalion \
HIDDEN_DRAGON   \
+   linkstation_HGLAN   \
MOUSSE  \
MUSENKI \
MVBLUE  \
diff --git a/Makefile b/Makefile
index d6a0299..f41a422 100644
--- a/Makefile
+++ b/Makefile
@@ -1481,6 +1481,18 @@ HIDDEN_DRAGON_config: unconfig
 kvme080_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x kvme080 etin
 
+# HDLAN is broken ATM. Should be fixed as soon as hardware is available and as
+# time permits.
+#linkstation_HDLAN_config \
+# Remove this line when HDLAN is fixed
+linkstation_HGLAN_config: unconfig
+   @mkdir -p $(obj)include
+   @case $@ in \
+   *HGLAN*) echo #define CONFIG_HGLAN 1 $(obj)include/config.h; 
;; \
+   *HDLAN*) echo #define CONFIG_HLAN 1 $(obj)include/config.h; 
;; \
+   esac
+   @$(MKCONFIG) -n $@ -a linkstation ppc mpc824x linkstation
+
 MOUSSE_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x mousse
 
diff --git a/board/linkstation/Makefile b/board/linkstation/Makefile
new file mode 100644
index 000..57c84de
--- /dev/null
+++ b/board/linkstation/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= lib$(BOARD).a
+
+OBJS   = $(BOARD).o ide.o hwctl.o avr.o
+
+$(LIB):.depend $(OBJS) $(SOBJS)
+   $(AR) crv $@ $(OBJS) $(SOBJS)
+
+#
+
+.depend:   Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+   $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c)  $@
+
+sinclude .depend
+
+#
diff --git a/board/linkstation/avr.c b/board/linkstation/avr.c
new file mode 100644
index 000..68bc545
--- /dev/null
+++ b/board/linkstation/avr.c
@@ -0,0 +1,293 @@
+/*
+ * avr.c
+ *
+ * AVR functions
+ *
+ * Copyright (C) 2006 Mihai Georgian [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software

Re: [U-Boot-Users] [PATCH v2 1/7] Separate omap24xx specific code from arm1136

[Guennadi Liakhovetski]

On Sat, 29 Mar 2008, Peter Pearse wrote:

  -Original Message-
  From: Guennadi Liakhovetski [mailto:[EMAIL PROTECTED] 
  +
  +/* macro to read the 32 bit timer */
  +#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+TCRR))
 
 I'm assuming you have no objection to me patching this to 
 
 #define READ_TIMER (*((volatile ulong *)(CFG_TIMERBASE+TCRR)))
 
 to get apollon  omap2420h4 to build with arm-linux-gcc (GCC) 4.0.0 (DENX
 ELDK 4.0 4.0.0) .

Fine with me, although, strange that it is needed... But if it is - no 
problem.

 Then I can submit for merge tomorrow (Sunday)

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.

DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [EMAIL PROTECTED]

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