Re: [PATCH 4/4] drm/amd/powerplay: not change uvd/vce block's state when initialize/resume

Well I'll submit my patches momentarily and if Rex hasn't pushed his by then I'll push mine. Tom From: Deucher, Alexander Sent: Thursday, July 28, 2016 10:17 To: StDenis, Tom; Zhu, Rex; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH 4/4] drm/amd/powerplay

Re: [PATCH 4/4] drm/amd/powerplay: Prevent UVD powerdown before init

a bit and re-send the whole lot sometime today. Tom From: Zhu, Rex Sent: Thursday, July 28, 2016 03:43 To: Alex Deucher; Tom St Denis Cc: StDenis, Tom; amd-gfx list Subject: RE: [PATCH 4/4] drm/amd/powerplay: Prevent UVD powerdown before init From: amd-gfx

Re: [PATCH 1/4] drm/amd/amdgpu: Cleanup register access in VCE v3

11:41 To: 'Tom St Denis'; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: RE: [PATCH 1/4] drm/amd/amdgpu: Cleanup register access in VCE v3 > -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Tom St Denis > Sent: Thursda

Re: [PATCH 2/6] drm/amd/amdgpu: Fix VCE CG order and resume defaults

was gated. With the logic the way it is when the core is active I see many of the clocks throttle as they should. Tom From: Deucher, Alexander Sent: Wednesday, August 3, 2016 12:28 To: 'Tom St Denis'; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: RE: [PATC

Re: [PATCH 4/6] drm/amd/amdgpu: Move VCE bypass after MGCG test

: StDenis, Tom Subject: RE: [PATCH 4/6] drm/amd/amdgpu: Move VCE bypass after MGCG test > -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Tom St Denis > Sent: Wednesday, August 03, 2016 11:52 AM > To: amd-gfx@lists.freedesktop.or

Re: radeon VS amdgpu: _afmt_init() behavior if kzalloc fails

From: Alexandre Demers <alexandre.f.dem...@gmail.com> Sent: Friday, August 12, 2016 13:39 To: StDenis, Tom; Freedesktop - AMD-gfx Cc: Alexander Deucher Subject: Re: radeon VS amdgpu: _afmt_init() behavior if kzalloc fails Hi again, I'm talking about modifying radeon's side to mimic am

Re: [PATCH] drm/amd/amdgpu: Add more config data for debugfs

md-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: [PATCH] drm/amd/amdgpu: Add more config data for debugfs Adds rev_id as well as cg/pg flags to help debug runtime. Signed-off-by: Tom St Denis <tom.stde...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 ++- 1 file changed,

Re: [PATCH 0/8] shadow page table support V5 ---> shadow bo support

Why not be consistent and add a DRM_ERROR on all paths that include an error? e.g. instead of if (r) goto error_free; Throw a DRM_ERROR("") in there. Tom From: amd-gfx on behalf of Christian König

slowpath warning on Tonga

I just happened to notice this on my Tonga. It's otherwise operating fine. For ref, it's attached to a HDMI KVM which eventually makes it way to a DVI-D monitor. [ 28.579561] [ cut here ] [ 28.579613] WARNING: CPU: 4 PID: 1276 at

Re: [RFC]: More robust build sys for UMR

(I'm not saying NAK I'm simply asking for my own edification). Thanks, Tom From: Edward O'Callaghan <funfunc...@folklore1984.net> Sent: Saturday, February 4, 2017 23:59 To: amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: [RFC]: More robust build s

Re: [RFC]: More robust build sys for UMR

rg> on behalf of StDenis, Tom <tom.stde...@amd.com> Sent: Sunday, February 5, 2017 09:55 To: Bas Nieuwenhuizen; amd-gfx@lists.freedesktop.org Subject: Re: [RFC]: More robust build sys for UMR Hi Bas, What would be a good way to work around the paths though? Is there a pkg config fo

Re: [RFC]: More robust build sys for UMR

; Sent: Sunday, February 5, 2017 11:11 To: StDenis, Tom; Edward O'Callaghan; amd-gfx@lists.freedesktop.org Subject: Re: [RFC]: More robust build sys for UMR Hey Tom, It's great to see umr make it to the public. I've given it a quick spin and it is pretty awesome, although I don't have muc

Re: [PATCH] Autodetect libdrm path (v2)

that to the README. Tom From: Emil Velikov <emil.l.veli...@gmail.com> Sent: Monday, February 6, 2017 15:18 To: Tom St Denis Cc: amd-gfx mailing list; StDenis, Tom Subject: Re: [PATCH] Autodetect libdrm path (v2) Hi Tom, On 5 February 2017 at 22:24, Tom St

Re: [PATCH] Autodetect libdrm path (v2)

[] Tom From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of StDenis, Tom <tom.stde...@amd.com> Sent: Monday, February 6, 2017 16:33 To: Emil Velikov; Tom St Denis Cc: amd-gfx mailing list Subject: Re: [PATCH] Autodetect libdrm path (

Re: [PATCH] autodetect path to libdrm

ead. Tom From: Andres Rodriguez <andre...@gmail.com> Sent: Sunday, February 5, 2017 16:26 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH] autodetect path to libdrm Hey Tom, Overall in cmake calling pkg_check_modules() directly is us

Re: [PATCH] Autodetect libdrm path (v2)

Thanks. Pushed it. Tom From: Andres Rodriguez <andre...@gmail.com> Sent: Sunday, February 5, 2017 17:28 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH] Autodetect libdrm path (v2) Reviewed-by: Andres Rodriguez

Re: [PATCH 4/6] drm/amdgpu: implement PRT for GFX6

Minor nit: the comment says v8 [] The changes to the GFX6/7/8 look reasonable though only question is you read from mmVM_PRT_CNTL and then write to mmVM_CONTEXT1_CNTL . Is that expected? Tom From: amd-gfx on behalf

Re: [PATCH 4/6] drm/amdgpu: implement PRT for GFX6

Hi Christian, I have SI,CI,VI gear in my office if you have a unit test to try it with. Cheers, Tom From: Christian König <deathsim...@vodafone.de> Sent: Monday, January 30, 2017 09:14 To: StDenis, Tom; b...@basnieuwenhuizen.nl; airl...@gmail.com Cc: a

Re: [PATCH 2/2] drm/amdgpu: fix 64bit shift for CZ

Works on my CZ system: Ack-by: Tom St Denis From: amd-gfx on behalf of Christian König Sent: Tuesday, January 24, 2017 09:09 To: amd-gfx@lists.freedesktop.org Subject:

Re: [PATCH] drm/amd/amdgpu: Add PCI info to gca_config debugfs

I am grabbing revision. Unless there's some other PCI revision value I'm missing :-) Tom From: Alex Deucher <alexdeuc...@gmail.com> Sent: Wednesday, January 18, 2017 13:40 To: Tom St Denis Cc: amd-gfx list; StDenis, Tom Subject: Re: [PATCH] drm/amd/

Re: [PATCH] drm/amd/amdgpu: Add PCI info to gca_config debugfs

Coo, pushed to staging. Tom From: Deucher, Alexander Sent: Wednesday, January 18, 2017 13:47 To: StDenis, Tom; Alex Deucher Cc: amd-gfx list Subject: RE: [PATCH] drm/amd/amdgpu: Add PCI info to gca_config debugfs Whoops, sorry, I glanced quickly and thought

Re: [PATCH v2 xserver 3/5] modesetting: move common page flip handle to pageflip.c

Sorry, disregard. The pointer doesn't point inside the struct. That part of the patch is fine. Tom From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of StDenis, Tom <tom.stde...@amd.com> Sent: Friday, August 19, 2016 07:30 To: Yu,

Re: [PATCH v2 xserver 3/5] modesetting: move common page flip handle to pageflip.c

In ms_pageflip_free() you cannot free the parent structure before freeing things it points to. That's undefined behaviour. Tom From: amd-gfx on behalf of Qiang Yu Sent: Friday, August 19, 2016 08:50

Re: [PATCH 3/3] drm/amd/amdgpu: Various tidy ups for gfx6

The "adev" variable must be in scope when using the RREG32/WREG32 (and derivatives) macros. Tom From: Edward O'Callaghan <funfunc...@folklore1984.net> Sent: Thursday, September 1, 2016 23:22 To: Tom St Denis; amd-gfx@lists.freedesktop.org

Re: [PATCH 7/7] drm/amd/amdgpu: Comment out currently unused SI DPM struct

Hi Alex, Would love to but unfortunately I don't have a tahiti_le (or any SI) part to test it on. Cheers, Tom From: Deucher, Alexander Sent: Wednesday, September 7, 2016 10:45 To: 'Tom St Denis'; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: RE

Re: [PATCH] drm/amd/amdgpu: Remove double lock from gfx v6

/2016-September/002042.html Tom From: Christian König <deathsim...@vodafone.de> Sent: Wednesday, September 7, 2016 08:33 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH] drm/amd/amdgpu: Remove double lock from gfx

Re: [PATCH] drm/amdgpu/si/dpm: fix swapped ck enable

Yup, that looks better. My apologies. Guess that's the downside of having assertions for enable and disable in the same driver. Reviewed-by: Tom St Denis From: amd-gfx on behalf of Alex Deucher

Re: [PATCH] drm/amd/amdgpu: Add sensors debugfs support

: Christian König <deathsim...@vodafone.de> Sent: Thursday, September 15, 2016 09:29 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH] drm/amd/amdgpu: Add sensors debugfs support Am 15.09.2016 um 15:22 schrieb Tom St Denis: > This patch adds a callback to

Re: [PATCH] drm/amd/amdgpu: Add sensors debugfs support

, 2016 11:10 To: StDenis, Tom; Christian König; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH] drm/amd/amdgpu: Add sensors debugfs support FWIW, temperature and fan are already exposed via standard hwmon interfaces. It might be better to use standard interfaces for some of these things

use-after-free in libdrm

Attached image of scan-view's report. Basically the variable "sem" is free'ed but then used as sem->next in the for loop. Should use safe version of macro. Tom ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org

Re: Issue with amd-staging-4.7 on rx480

(with the 5dw patch reverted) on the tip of stg-4.7. I have yet to test a polaris asic though... Tom From: Jeremy Newton <alexjn...@gmail.com> Sent: Thursday, October 6, 2016 10:07 To: StDenis, Tom Cc: amd-gfx@lists.freedesktop.org Subject: Re: Issue wi

Re: Issue with amd-staging-4.7 on rx480

If I read this correctly you reverted the commit which enables UVD PG on Tonga? I can't see how that impacts Polaris at all. If I had to guess it's a dGPU state issue. I've had on occasion to resort to cold reboots to bisect the kernel because the GPU firmware can get into states that

Re: [PATCH 2/6] drm/amdgpu: add info ioctl query for vce clock info

Shouldn't there be a version bump if you're adding a new command to the ioctl? Tom From: amd-gfx on behalf of Alex Deucher Sent: Friday, October 7, 2016 14:28 To: amd-gfx@lists.freedesktop.org;

ack/nack on sensors patches please

Hi all, Edward reviewed them but I'd like an AMD'er RB/ACK/NAK as well on the updated series I posted last week please. https://lists.freedesktop.org/archives/amd-gfx/2016-September/002359.html Thanks, Tom ___ amd-gfx mailing list

Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)

Hi Alex, Would you prefer I re-write #1 to avoid churn in the tree? Cheers, Tom From: Alex Deucher <alexdeuc...@gmail.com> Sent: Monday, September 19, 2016 11:53 To: Tom St Denis Cc: amd-gfx list; StDenis, Tom Subject: Re: [PATCH 1/2] drm/amd/powerpla

Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)

Yup. I misread your comment thinking there was another datastructure you'd rather I put the callback in. Cheers, Tom From: Deucher, Alexander Sent: Monday, September 19, 2016 11:55 To: StDenis, Tom; Alex Deucher Cc: amd-gfx list Subject: RE: [PATCH 1/2] drm

Re: [PATCH] drm/amdgpu/dce6: fix off by one in interrupt setup

Looks correct and consistent with the other DCE drivers. Reviewed-by: Tom St Denis From: amd-gfx on behalf of Alex Deucher Sent: Monday, September 19, 2016 12:15 To:

Re: Add read_sensor() support for fiji/tonga/iceland/polaris10

Thanks. I'm thinking I might merge this with Patch #1 from the other series just to make life easier for everyone. Tom From: amd-gfx on behalf of Edward O'Callaghan Sent: Friday, September

Re: tidy'ing up cz_hwmgr.c

and is clearer to read. Tom From: Christian König <deathsim...@vodafone.de> Sent: Thursday, August 18, 2016 11:17 To: StDenis, Tom; amd-gfx list Subject: Re: tidy'ing up cz_hwmgr.c Has a [1] array at the tail which is then kzalloc'ed with N-1 entries. Shouldn't tha

Re: tidy'ing up cz_hwmgr.c

really clear that it's correct from a first reading and in theory would be better with [0]. Tom From: Alex Deucher <alexdeuc...@gmail.com> Sent: Thursday, August 18, 2016 11:33 To: StDenis, Tom Cc: Christian König; amd-gfx list Subject: Re: tidy'ing up cz

Re: tidy'ing up cz_hwmgr.c

not strongly motivated to change it just caught my attention. Cheers, Tom From: Deucher, Alexander Sent: Thursday, August 18, 2016 11:50 To: StDenis, Tom; Alex Deucher Cc: Christian König; amd-gfx list Subject: RE: tidy'ing up cz_hwmgr.c IIRC, zero sized

Re: tidy'ing up cz_hwmgr.c

on behalf of Christian König <deathsim...@vodafone.de> Sent: Thursday, August 18, 2016 12:07 To: StDenis, Tom; Deucher, Alexander Cc: amd-gfx list Subject: Re: tidy'ing up cz_hwmgr.c Either way like I said I'm not strongly motivated to change it just caught my attention. Well if you ha

Errant return in Carrizo SMU code

In the function static int cz_check_fw_load_finish(struct pp_smumgr *smumgr, uint32_t firmware); On line 198 of powerplay/smumgr/cz_smumgr.c there is an unconditional return in the middle of the function. Is that an error or is the code after it truly dead code? Tom

Re: [PATCH] drm/amd/powerplay: Fix CZ SMU firmware load check (v4)

Thanks. I like v4 better because it prints a message if the initial load op fails. I'll push that. Tom From: Deucher, Alexander Sent: Friday, August 26, 2016 11:15 To: 'Tom St Denis'; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: RE: [PATCH] drm

Re: [PATCH 2/2] drm/amdkfd: Decode bit fields in 'cik_ih_ring_entry' directly

Better would be to add them to a bitmask header and then use REG_GET_FIELD() so it's nice and clean looking. Tom From: amd-gfx on behalf of Christian König Sent: Tuesday, September 27, 2016

Re: [PATCH 8/9] drm/amdgpu:wptr poll address of gfx8 is needed

Hmm, I wonder if this fix CP power gating issues ... on Carrizo/Stoney... From: amd-gfx on behalf of Monk Liu Sent: Wednesday, September 28, 2016 04:36 To: amd-gfx@lists.freedesktop.org Cc: Min, Frank

Re: [PATCH] drm/amdgpu: fix addr handling in amdgpu_vm_bo_update_mapping

I'm reading through the amdgpu_vm.c to try and see if the patch is correct but I'm not that familiar with the VM side of things. It seems to boil down to calling params->func() with a new dst value of NULL but that's where I'm stopped at the moment since I don't know what func() is. Nothing

Re: Enable UVD PG for SMU7 and turn on for Tonga

Thanks. I'll try it on FIJI next. Hopefully MGCG isn't needed for at least basic tile power control. Tom From: amd-gfx on behalf of Deucher, Alexander Sent: Friday, September 30, 2016 11:10

Re: amdgpu: ratelimit on vm faults to avoid spaming console

Could we provide fault information through a ring buffer and a debugfs or drm ioctl interface? Tom From: amd-gfx on behalf of Alex Deucher Sent: Monday, November 7, 2016 13:35 To: Edward

Re: [PATCH 4/5] drm/amdgpu: refine uvd 6.0 clock gate feature.

Kinda buried trying to sort out the gfx6 boot failure but if someone can just email as an attachment the 5 patches I'll test them on my Stoney system (my CZ system is being used by the Tahiti board...) Tom From: amd-gfx

Re: [PATCH 1/3] drm/amd/amdgpu: Add wave reader to debugfs

From: Nicolai Hähnle <nhaeh...@gmail.com> Sent: Friday, October 14, 2016 03:25 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH 1/3] drm/amd/amdgpu: Add wave reader to debugfs On 11.10.2016 21:18, Tom St Denis wrote: >

Re: [PATCH] amdgpu: Fix failing boot after support for third vce ring

Does your tree have 2f3d686d0ee95332d169c7b6788bb2d9f5ad 780605db12c52f2c22d4d2cc05ceb7d2a9d55579 in it? Those are fixes for when the third ring were added. Tom From: amd-gfx on behalf of Ernst Sjöstrand

Re: [PATCH] amdgpu: Fix failing boot after support for third vce ring

manages them. Tom From: Ernst Sjöstrand <ern...@gmail.com> Sent: Friday, October 14, 2016 09:20 To: StDenis, Tom Cc: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH] amdgpu: Fix failing boot after support for third vce ring Means the drm pull request f

Re: [PATCH 1/3] drm/amd/amdgpu: Add wave reader to debugfs

Hi Alex, Sounds like a plan since I want to add a few fields anyways. Tom From: Deucher, Alexander Sent: Friday, October 14, 2016 09:33 To: StDenis, Tom; Nicolai Hähnle Cc: amd-gfx@lists.freedesktop.org Subject: RE: [PATCH 1/3] drm/amd/amdgpu: Add wave reader

Re: [PATCH] amdgpu: Fix failing boot after support for third vce ring

From: Ernst Sjöstrand <ern...@gmail.com> Sent: Friday, October 14, 2016 09:05 To: StDenis, Tom Cc: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH] amdgpu: Fix failing boot after support for third vce ring Yes, the 6f0359ff73076483902de0c17f9649bf55651e2a I'm referring to is th

Re: [PATCH] amdgpu: Fix failing boot after support for third vce ring

es shortly [] Tom From: Ernst Sjöstrand <ern...@gmail.com> Sent: Friday, October 14, 2016 09:15 To: StDenis, Tom Cc: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH] amdgpu: Fix failing boot after support for third vce ring I'm testing both drm-next-4.9 and

Re: [PATCH] drm/amdgpu: explicitly set pg_flags for ST

Reviewed-by: Tom St Denis From: amd-gfx on behalf of Alex Deucher Sent: Wednesday, October 19, 2016 13:10 To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject:

Re: [PATCH] drm/amdgpu: refine cz uvd clock gate logic.

I just tried it on my Carrizo this morning (after sending out the dce6 patch) and everything seems peachy. Tom From: amd-gfx on behalf of Deucher, Alexander Sent: Monday, November 14, 2016

Re: [PATCH 4/4] drm/amdgpu: used cached gca values for vi_read_register

dd0 M drivers From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of StDenis, Tom <tom.stde...@amd.com> Sent: Tuesday, October 11, 2016 09:20 To: Andy Furniss; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: Re: [PATCH 4/4] drm/

Re: [PATCH 4/4] drm/amdgpu: used cached gca values for vi_read_register

tDenis, Tom; amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: Re: [PATCH 4/4] drm/amdgpu: used cached gca values for vi_read_register StDenis, Tom wrote: > Actually NAK that, I don't have the cache patch internally. So my Tonga > crash is something else. Yes, seems the boot

Re: [PATCH 4/4] drm/amdgpu: used cached gca values for vi_read_register

Actually NAK that, I don't have the cache patch internally. So my Tonga crash is something else. Tom From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of StDenis, Tom <tom.stde...@amd.com> Sent: Tuesday, October 11, 2016 08:11 To:

Re: [PATCH] drm/amd/amdgpu: Allow broadcast on debugfs read (v2)

From: Christian König <deathsim...@vodafone.de> Sent: Tuesday, October 11, 2016 08:30 To: StDenis, Tom; Michel Dänzer Cc: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH] drm/amd/amdgpu: Allow broadcast on debugfs read (v2) I briefly remember reading in some hardware doc that this actual

Re: [PATCH 8/8] drm/amdgpu: move align_mask and nop into ring funcs as well

It dies on my Tonga just FYI (save you some trouble). Tom From: amd-gfx on behalf of Christian König Sent: Tuesday, October 11, 2016 09:26 To: Andy Furniss; amd-gfx@lists.freedesktop.org

Re: [PATCH] drm/amdgpu: fix broken VCE startup in phys mode

Yup, with it I get a normal modprobe. Can add my Ack-By: Tom St Denis From: amd-gfx on behalf of Christian König Sent: Tuesday, October 11, 2016 13:33 To:

Re: [PATCH] drm/radeon/si_dpm: Limit clocks on HD86xx part

Hi Alex, No problem I'll submit that tomorrow morning. Cheers, Tom From: Deucher, Alexander Sent: Thursday, October 13, 2016 15:19 To: 'Tom St Denis'; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: RE: [PATCH] drm/radeon/si_dpm: Limit clocks

Re: [PATCH] drm/amd/amdgpu: Allow broadcast on debugfs read (v2)

ant to and furthermore I'm already using the write debugfs content (to debug waveforms). Tom From: Michel Dänzer <michel.daen...@mailbox.org> Sent: Tuesday, October 11, 2016 20:34 To: StDenis, Tom; Christian König Cc: amd-gfx@lists.freedesktop.org Subject:

Re: GPR read support via debugfs (v2)

Hi Alex, I'll wait on pushing it until I hear back from one of them. Cheers, Tom From: Alex Deucher <alexdeuc...@gmail.com> Sent: Wednesday, December 7, 2016 12:32 To: StDenis, Tom Cc: Edward O'Callaghan; amd-gfx@lists.freedesktop.org Subject: Re: GP

Re: GPR read support via debugfs (v2)

Thanks. Could use a RB/NAK from Christian or Alex when they get the time :-) Tom From: amd-gfx on behalf of Edward O'Callaghan Sent: Tuesday, December 6, 2016 17:15 To: Tom St Denis;

Re: [PATCH 1/3] drm/amd/amdgpu: Add debugfs support for reading GPRs

unc...@folklore1984.net> Sent: Monday, December 5, 2016 14:59 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH 1/3] drm/amd/amdgpu: Add debugfs support for reading GPRs Hi Tom, On 12/06/2016 05:36 AM, Tom St Denis wrote: > Implemented for SGPRs for GFX v8

Re: [PATCH] drm/amd/amdgpu: De-numberify golden SI registers

commit to the amd-temp-soc15 branch. Cheers, Tom From: Wentland, Harry Sent: Friday, December 16, 2016 10:02 To: Tom St Denis; amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: Re: [PATCH] drm/amd/amdgpu: De-numberify golden SI registers Nice. Do you have

Re: [PATCH 2/2] drm/amdgpu: Report VDDC and MVDD over pp_dpm{sclk,mclk}

It'd be nicer to move these into the PP_SENSORS framework and then print them from pm_info. But other than that I don't have any strong objections to these patches. Tom From: amd-gfx on behalf of Donny Yang

Re: [PATCH] drm/amdgpu: fix typo of CGTS

Reviewed-by: Tom St Denis <tom.stde...@amd.com> From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of Huang Rui <ray.hu...@amd.com> Sent: Tuesday, January 10, 2017 21:30 To: amd-gfx@lists.freedesktop.org Cc: StDenis, Tom; Huang, R

amdgpu_pm_info small nit

Hi Ray, Small nit but I saw this in the output + {AMD_CG_SUPPORT_GFX_CGTS, "Graphics Coarse Grain Tree Shader Light Sleep"}, + {AMD_CG_SUPPORT_GFX_CGTS_LS, "Graphics Coarse Grain Tree Shader Light Sleep"}, The first you probably want to remove "Light Sleep" from otherwise the

Re: [PATCH] drm/amdgpu: refine pg code for gfx_v8.

Hi Rex, Given how often we diagnose problems by disabling PG/CG I'd have to offer my NAK to this patch since it prevents me from disabling PG via the command line. Any reason you want to make it permanently enabled? Tom From: amd-gfx

Re: [PART1 PATCH 0/8] Introduce a method to get clock gating status dynamically

Some of them are part of AON tiles but are unstable during PM switches. That's why the debugfs mmio entry supports a PM lock. So they might be readable while powered off but unstable if the firmware is in the middle of a PM switch. Tom From: amd-gfx

Re: [PATCH] drm/amdgpu: refine vce3.0 initialize.

Just a heads up there is a CG/PG regression. On the tip of 4.7 I can encode with cg/pg disabled but with it enabled it locks up. I'll try to bisect. Tom From: amd-gfx on behalf of Deucher, Alexander

Re: [PATCH] drm/amdgpu: refine vce3.0 initialize.

On my Carrizo, I have to NAK since monitoring the clocks I see GFX and VCE pegged high on a setup with a staging kernel . Doing a test signal encode I see 1000 fences/sec being handled and GFX_POWER throttles (not idle or full) . I don't see VCE load from SRBM_STATUS2 though ... Something

Re: [PATCH] drm/amdgpu: refine vce3.0 initialize.

__ From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> on behalf of StDenis, Tom <tom.stde...@amd.com> Sent: Monday, January 9, 2017 11:58 To: Deucher, Alexander; Zhu, Rex; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH] drm/amdgpu: refine vce3.0 initialize. Just a head

Re: [PART1 PATCH v3 7/8] drm/amdgpu: add get clockgating_state method for uvd v5

It was added late last year so that debugfs mmio could read vce/uvd registers without triggering a race condition between transitions. Cheers, Tom From: Koenig, Christian Sent: Friday, January 6, 2017 08:45 To: StDenis, Tom; Huang, Ray; Deucher, Alexander

Re: [PART1 PATCH v3 7/8] drm/amdgpu: add get clockgating_state method for uvd v5

There's already the adev->pm.mutex which is held while gating/ungating blocks. There's no need for a second mutex right? Tom From: amd-gfx on behalf of Christian König Sent: Friday, January

Re: [PATCH 18/19] drm/amdgpu: Disable GFX PG on CZ

setup I can install/run to test it? Or is simply loading a KFD merged/rebased kernel enough to cause the hang (and thus I guess a bisect doesn't make sense). Cheers, Tom From: Kuehling, Felix Sent: Friday, August 11, 2017 20:40 To: StDenis, Tom; amd-gfx

Re: [PATCH umr] top vram add visible vram usage info

Hi Qiang, Sorry I must have missed that. I'll try it out first thing in the morning (Markham time). If it's all good I'll add a Rb and push it out. Cheers, Tom From: Yu, Qiang Sent: Monday, July 10, 2017 22:07 To: amd-gfx@lists.freedesktop.org; StDenis

Re: [PATCH 2/2] drm/amdgpu: Clear active for HIQ in RLC_CP_SCHEDULER

You could use WREG32_FIELD15 to drop 3 lines into one. Tom From: amd-gfx on behalf of Shaoyun Liu Sent: Wednesday, July 19, 2017 16:26 To: amd-gfx@lists.freedesktop.org Cc: Liu, Shaoyun

Re: remove ttm trace and add iova debugfs (v2)

Should add I was able to read/write system memory mapped by amdgpu with these patches in place on my polaris10 device (with iommu enabled of course). From: amd-gfx on behalf of Tom St Denis

Re: [PATCH 02/30] drm/amd/display: Remove dead enable_plane function definition and call

I tried the latest drm-next as of this morning and still had gfx corruption. I added you to the watchers list for a JIRA ticket I opened about this. Cheers, Tom From: Wentland, Harry Sent: Thursday, December 14, 2017 10:41 To: StDenis, Tom; amd-gfx

Re: vcn regression on raven1

on the public copy of the tree it's not there https://cgit.freedesktop.org/~agd5f/linux/tree/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c?h=amd-staging-drm-next#n1110 Cheers, Tom From: Zhang, Jerry Sent: Tuesday, May 1, 2018 20:52 To: StDenis, Tom; Deucher

Re: vcn regression on raven1

I pull from gerrit. I'm just pointing out that it's not on drm-next upstream either. It may have been missed in a rebase or something. Tom From: Zhang, Jerry Sent: Tuesday, May 1, 2018 21:07 To: StDenis, Tom; Deucher, Alexander Cc: Koenig, Christian

Re: vcn regression on raven1

Hi Jerry, So far as I know this wasn't included on the tip of drm-next. I hit this this morning in my semi-regular pull/build/test cycle. Was this missed in a recent rebase? Tom From: Zhang, Jerry Sent: Tuesday, May 1, 2018 20:43 To: StDenis, Tom

Re: vcn regression on raven1

, May 1, 2018 21:39 To: StDenis, Tom; Deucher, Alexander Cc: Koenig, Christian; amd-gfx@lists.freedesktop.org Subject: Re: vcn regression on raven1 Hi Tom, Do you mean you cannot find the patch from gerrit/amd-staging-dkms-next either? I do find it. the tip of gerrit/amd-staging-drm-next

Re: [PATCH 5/5] drm/amdgpu: replace iova debugfs file with iomem

I haven't tried the patch but just like to point out this breaks umr :-) I'll have to craft something on Monday to support this and iova in parallel until the iova kernels are realistically EOL'ed. On the other hand I support this idea since it eliminates the need for an fmem hack. So much

iomem debugfs patches

Hi Christian, I've been running with the last two patches from the ttm changes (that included your iomem patch with my write method addition) for a while now. Through piglit, various GL games, with both normal and restricted VRAM without ill effect. Is there anything else that might be

Re: regression on RV1

; > Alex > > > *From:* amd-gfx on behalf of > Deucher, Alexander > *Sent:* Wednesday, October 17, 2018 12:15:21 PM > *To:* StDenis, Tom; Koenig, Christian; amd-gfx mailing list > *Cc:* Huang, Ray > *Subject:* Re: regression on RV1 > > IIRC, APUs do not have a pagin

[PATCH] drm/amd/amdgpu: Don't use paging functions on APU

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 46 -- 1 file changed, 28 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 33a62d5a4949..b7f6db39d357 100644 ---

regression on RV1

This commit: commit 6cbd074831a423e0d30b386fc056d6c2c3559147 (HEAD, refs/bisect/bad) Author: Christian König Date: Mon Oct 8 14:38:22 2018 +0200 drm/amdgpu: activate paging queue on SDMA v4 Implement all the necessary stuff to get those extra rings working. Signed-off-by:

Re: After Vega 56/64 GPU hang I unable reboot system

On 2018-12-20 9:06 a.m., Tom St Denis wrote: > On 2018-12-20 6:45 a.m., Mikhail Gavrilov wrote: >> On Thu, 20 Dec 2018 at 16:17, StDenis, Tom wrote: >>> >>> Well yup the kernel is not letting you open the files: >>> >>> >>> As sudo/root

Re: After Vega 56/64 GPU hang I unable reboot system

On 2018-12-20 9:08 a.m., Tom St Denis wrote: > On 2018-12-20 9:06 a.m., Tom St Denis wrote: >> On 2018-12-20 6:45 a.m., Mikhail Gavrilov wrote: >>> On Thu, 20 Dec 2018 at 16:17, StDenis, Tom wrote: >>>> >>>> Well yup the kernel is not letting you open

Re: After Vega 56/64 GPU hang I unable reboot system

On 2018-12-20 6:45 a.m., Mikhail Gavrilov wrote: > On Thu, 20 Dec 2018 at 16:17, StDenis, Tom wrote: >> >> Well yup the kernel is not letting you open the files: >> >> >> As sudo/root you should be able to open these files with umr. What >> happens i

Re: After Vega 56/64 GPU hang I unable reboot system

On 2018-12-20 11:07 a.m., Mikhail Gavrilov wrote: > On Thu, 20 Dec 2018 at 19:19, StDenis, Tom wrote: >> >> Ya I was right. With a plain build I can access the files just fine. >> >> >> >> I did manage to get into a weird shell where I couldn't cat >

Re: After Vega 56/64 GPU hang I unable reboot system

On 2018-12-19 4:21 p.m., Mikhail Gavrilov wrote: > I see that backtrace in my previous message are borked. > I place backtrace in text file for more comfort reading in this message. The backtrace points to the segfault in umr caused when it fails to read the file. We want to know why it can't

regression in ttm

This commit causes a regression on my Carrizo running piglit (dmesg attached) commit 5786b66c9e3b7b18f3c24566e70cae450969cb14 Refs: v4.20-rc3-498-g5786b66c9e3b Author: Christian König AuthorDate: Mon Sep 24 13:35:53 2018 +0200 Commit: Christian König CommitDate: Tue Dec 4 10:22:22 2018

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