Unsigned Binary Formats

If I have a 4-byte signed binary number (i.e., up to 2147483647), I can convert it to packed format as follows. LR2,BIN4 CVD R2,PWORK8 How would I convert a 4-byte --un--signed binary number (such as an RBA, up to 4294967295) to packed format? If you need a reason, I'm

Re: Unsigned Binary Formats

Dave, I'd suggest you clear the high-order word of R2 then use CVDG. Would that work for you? Kind regards, Abe Kornelis === Op 19/01/2022 om 18:32 schreef Dave Clark: > If I have a 4-byte signed binary number (i.e., up to 2147483647), > I can convert it to packed format as

64-bit registers (was: Unsigned Binary Formats)

"IBM Mainframe Assembler List" wrote on 01/19/2022 01:00:07 PM: > I'd suggest you clear the high-order word of R2 then use CVDG. > > Would that work for you? OK, that brings up a question that I have not had to address before this. Up till now I've used odd-even register pairs for

Re: 64-bit registers (was: Unsigned Binary Formats)

Old nstructions that take register pairs in A24 and A31, e.g., CLCL, still take register pairs in A64. Lots of instructions only operate on bits 32-63 even in A64. The Grandé instructions operate on bits 0-63 even in A24 and A31. So it very much depends on which instruction you're referring to.

Re: Unsigned Binary Formats

Insert the unsigned 4 byte value in the right half of a zeroed 64-bit register and use CVDG.  There is also a CVBG. On 2022-01-19 12:32 p.m., Dave Clark wrote: If I have a 4-byte signed binary number (i.e., up to 2147483647), I can convert it to packed format as follows. LR2,BIN4

Re: Unsigned Binary Formats

Off the top of my head: SGR R2,R2 ICM R2,b'',bin4 CVDG R2,PWORK16 Tony Thigpen Dave Clark wrote on 1/19/22 12:32 PM: If I have a 4-byte signed binary number (i.e., up to 2147483647), I can convert it to packed format as follows. LR2,BIN4 CVD R2,PWORK8 How

Re: 64-bit registers (was: Unsigned Binary Formats)

Basically, yes. Some instructions always use all 64-bis of the register. However others, like LA are addressing mode sensitive. Robert Ngan DXC Luxoft -Original Message- From: IBM Mainframe Assembler List On Behalf Of Dave Clark Sent: Wednesday, January 19, 2022 12:45 To:

Re: 64-bit registers (was: Unsigned Binary Formats)

"IBM Mainframe Assembler List" wrote on 01/19/2022 02:16:55 PM: > Um yeah... for approximately 21 years. > > sas Well those of us constantly on older hardware and told to code in COBOL most of the time don't get to play as often with the newer assembler stuff. ;-b Sincerely,

Re: Unsigned Binary Formats

You can also swap out the first two instructions below with... LLGF R2,bin4 -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Tony Thigpen Sent: Wednesday, January 19, 2022 12:50 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject:

Re: Unsigned Binary Formats

Assuming you eventually want the value to be in character format, the COBOL compiler doc says that with the appropriate ARCH() level, it'll generate DFP instructions to do this instead of using CVD/UNPK so I assume DFP is faster, and you can use: CDLFTR FP00,0,R02,0 Convert

Re: 64-bit registers (was: Unsigned Binary Formats)

Um yeah... for approximately 21 years. sas On Wed, Jan 19, 2022 at 1:45 PM Dave Clark wrote: > "IBM Mainframe Assembler List" wrote on > 01/19/2022 01:00:07 PM: > > I'd suggest you clear the high-order word of R2 then use CVDG. > > > > Would that work for you? > > OK, that brings up a

Re: 64-bit registers (was: Unsigned Binary Formats)

That is correct. All GP registers are actually 64 bits wide and 32-bit instructions use the lower half only. To use all 64 bits use the "Grande" version of the 32-bit instructions (most are suffixed with "G"). There are also instructions that affect only the upper 32-bit halves of the GP

Re: 64-bit registers (was: Unsigned Binary Formats)

That's correct.  Your greater the 4-byte arithmetic just got easier! If you use them in an assembler subroutine, you should save the the incoming 64-bit register and restore it on the way out.  There are details about only saving the high half and it not being necessary for certain registers, but

Re: 64-bit registers (was: Unsigned Binary Formats)

The Principles of Operation -- a reasonably current one -- is your friend. Charles -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Steve Smith Sent: Wednesday, January 19, 2022 11:17 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU

Re: Unsigned Binary Formats

> How would I convert a 4-byte --un--signed binary number (such as > an RBA, up to 4294967295) to packed format? LLGF R2,BIN4 CVD R2,PWORK8 is the obvious way, but you can also use DFP or SIMD instructions. > Thus, although I know how I would convert a signed zoned number >

Re: Unsigned Binary Formats

Is register 2 considered volatile for the 64 bit high half? If not, then how do you know if the macro user will preserve and restore the register? -Original Message- From: IBM Mainframe Assembler List On Behalf Of Dave Clark Sent: Wednesday, January 19, 2022 3:48 PM To:

Re: Saving Caller's 64-bit Regsiters (was: Unsigned Binary Formats)

Several recent threads I think on IBM-MAIN. You could try searching the archives. Also the MVS Assembler Services Guide (I think) has a long, detailed discussion. One of the similar manuals if not that one. Charles -Original Message- From: IBM Mainframe Assembler List

Re: Saving Caller's 64-bit Regsiters (was: Unsigned Binary Formats)

There are several ways, depending on the interface to your routine. z/OS 2.5 MVS Programming: Assembler Services Guide, SA23-1368-50, , Chapter 2 Linkage Conventions describes some of the

Re: Unsigned Binary Formats

"IBM Mainframe Assembler List" wrote on 01/19/2022 12:58:23 PM: > You can also swap out the first two instructions below with... > > LLGF R2,bin4 OK, I have created a generic subroutine that always converts 64-bit register 2 to a left-justified, separate-left-signed, zoned number

Saving Caller's 64-bit Regsiters (was: Unsigned Binary Formats)

"IBM Mainframe Assembler List" wrote on 01/19/2022 05:12:36 PM: > Is register 2 considered volatile for the 64 bit high half? > > If not, then how do you know if the macro user will preserve and > restore the register? There is no macro, but I think I get your point. Although

Re: Saving Caller's 64-bit Regsiters (was: Unsigned Binary Formats)

Sorry, when you said subroutine I thought you were creating a macro. I think that you're required to preserve the high halves of GPR 2-14, i.e. you can't mess with them without restoring. But you can change R0, R1, and R15 without restoring. This is from the Assembler Services Guide.

Re: Saving Caller's 64-bit Regsiters (was: Unsigned Binary Formats)

At program entry: STMH 2,14,your-high-halves-save-area13 fullwords for 2-14 high halves At program exit: LMH 2,14, your-high-halves-save-area HTH Peter -Original Message- From: IBM Mainframe Assembler List On Behalf Of Dave Clark Sent: Wednesday, January 19, 2022 5:21 PM To:

Re: Unsigned Binary Formats

I strongly recommend sticking to standard linkage conventions, e.g., R1 pointing to a PLIST that points to the binary and decimal fields. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 From: IBM Mainframe Assembler List