One of the guys on TI E2E who's team is looking into this issue for their
custom board, noted some things from the console log on TI E2E. I've
pasted that here. I'm not sure if this rings a bell to anyone or provides
additional insight as to DDR3 timing, etc.
"
.
.
My colleague went ba
Thanks Robert!
Will try to keep everyone updated on here or reference developments on the
"parallel" E2E thread.
Regards, jeff
On Friday, March 23, 2018 at 9:40:13 AM UTC-5, RobertCNelson wrote:
>
> On Fri, Mar 23, 2018 at 9:30 AM, Jeff Andich > wrote:
> > Hey Robert,
> >
> > The EEPROM
On Fri, Mar 23, 2018 at 9:30 AM, Jeff Andich wrote:
> Hey Robert,
>
> The EEPROM is mostly board ID, serial number, and Ethernet MAC addresses
> right? There isn't anything which is DRAM-specific in EEPROM, right?
>
> My understanding is the EEPROM contains the board ID which u-boot-spl and
> u-b
Hi Jeff,
On Fri, Mar 23, 2018 at 9:25 AM, Jeff Andich wrote:
> Hey Robert,
>
> The EEPROM is mostly board ID, serial number, and Ethernet MAC addresses
> right? There isn't anything which is DRAM-specific in EEPROM, right?
>
> My understanding is the EEPROM contains the board ID which u-boot-spl
Hey Robert,
The EEPROM is mostly board ID, serial number, and Ethernet MAC addresses
right? There isn't anything which is DRAM-specific in EEPROM, right?
My understanding is the EEPROM contains the board ID which u-boot-spl and
u-boot use to customize the configurations for each specific boa
Hey Robert,
The EEPROM is mostly board ID, serial number, and Ethernet MAC addresses
right? There isn't anything which is DRAM-specific in EEPROM, right?
My understanding is the EEPROM contains the board ID which u-boot-spl and
u-boot use to customize the configurations for each specific boa
Hi Robert,
We've copied the 572x EVM, reva3 schematic as closely as possible, but then
added some peripherals.
Our custom board is utilizing 4, Micron, MT41K256 512 MiB DDR3 chips for
DDR3. I believe this is on Gerald's BOM for the BB-X15.
Right now our EEPROM is blank. My strategy, for th
On Tue, Mar 20, 2018 at 7:23 PM, Jeff Andich wrote:
> I cross posted in the TI E2E thread referenced below, since someone else
> encountered this issue.
>
> One thing which comes to mind is, even though our custom board is based on
> the BB-X15/572xEVM, I have not yet "tuned"/re-computed the IO de
I cross posted in the TI E2E thread referenced below, since someone else
encountered this issue.
One thing which comes to mind is, even though our custom board is based on
the BB-X15/572xEVM, I have not yet "tuned"/re-computed the IO delays for
u-boot-spl for our custom board. Rather, I'm re-us
Note: I also "piggybacked"/ "pork bellied" this issue onto the TI E2E
thread referenced above, but disclosing the fact that I'm running a
beagleboard distro I.P.V. the TI SDK.
Thanks and FYI,
On Tuesday, March 20, 2018 at 11:09:31 AM UTC-5, Jeff Andich wrote:
>
>
> Hi,
>
> We just got our re-w
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