[beagleboard] Re: Trying to run the ADC from the PRU

2016-09-23 Thread TJF 


Am Freitag, 23. September 2016 18:11:57 UTC+2 schrieb Phil:
>
> A question though: Under what circumstances would the ADC not start?
>

Thunderstorm, lightning, cosmic rays, ... hardware damage. I don't know.

In any case it's better to stop with an error message, than configuring a 
subsystem that isn't running.

Regards

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[beagleboard] Re: Trying to run the ADC from the PRU

2016-09-23 Thread Phil 
Thanks, good catch! A question though: Under what circumstances would the 
ADC not start? I've been running the ADC now and have not had a startup 
fail.

On Friday, September 23, 2016 at 7:57:06 AM UTC-5, TJF wrote:
>
> Hi Phil!
>
> Your code is incomplete. The error handling is missing, for the case that 
> the ADC subsystem doesn't come up. Your code just continues.
>
> Am Mittwoch, 21. September 2016 18:13:59 UTC+2 schrieb Phil:
>>
>> *PRU Code*
>> //
>> // Enable and/or turn on hardware
>> // Code in this section must be ordered as listed for proper
>> // hardware startup.
>>
>> // Enable OCP
>> lbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4
>> clr r0, 4
>> sbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4
>>
>> // Enable ADC clock, wait for ADC module to start before 
>> proceeding
>> mov r0, CM_WKUP_base + CM_WKUP_ADC_TSC_CLKCTRL
>> mov r1, 2
>> sbbor1, r0, 0, 4
>> mov r1, 0   // clear timeout counter
>> AdcWait:
>> LBBOr0, adc_base, ADC_REVISION, 4   // load ADC REVISION
>> QBNEAdcUp, r0, 0// exit if ADC is running
>> ADD r1, r1, 1   // increase timeout 
>> counter
>> QBGEAdcWait, r1.b1, 16  // if no timeout -> wait
>> AdcUp:
>>
>> //
>>
>
> But it needs something like
>
> ...
>
> QBGEAdcWait, r1.b1, 16  // if no timeout -> wait
>
> SBCOr1, DRam, 0, 4  // store timeout counter 
> in DRam
> HALT// stop PRU, since ADC 
> isn't ready
> AdcUp:
> ...
>
> Regards
>  
>

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[beagleboard] Re: Trying to run the ADC from the PRU

2016-09-23 Thread TJF 
Hi Phil!

Your code is incomplete. The error handling is missing, for the case that 
the ADC subsystem doesn't come up. Your code just continues.

Am Mittwoch, 21. September 2016 18:13:59 UTC+2 schrieb Phil:
>
> *PRU Code*
> //
> // Enable and/or turn on hardware
> // Code in this section must be ordered as listed for proper
> // hardware startup.
>
> // Enable OCP
> lbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4
> clr r0, 4
> sbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4
>
> // Enable ADC clock, wait for ADC module to start before proceeding
> mov r0, CM_WKUP_base + CM_WKUP_ADC_TSC_CLKCTRL
> mov r1, 2
> sbbor1, r0, 0, 4
> mov r1, 0   // clear timeout counter
> AdcWait:
> LBBOr0, adc_base, ADC_REVISION, 4   // load ADC REVISION
> QBNEAdcUp, r0, 0// exit if ADC is running
> ADD r1, r1, 1   // increase timeout counter
> QBGEAdcWait, r1.b1, 16  // if no timeout -> wait
> AdcUp:
>
> //
>

But it needs something like

...

QBGEAdcWait, r1.b1, 16  // if no timeout -> wait

SBCOr1, DRam, 0, 4  // store timeout counter in 
DRam
HALT// stop PRU, since ADC 
isn't ready
AdcUp:
...

Regards
 

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Re: [beagleboard] Re: Trying to run the ADC from the PRU

2016-09-21 Thread William Hermans 
>
> The only device tree overlay I needed is what I have below; no need to
> load the BB-ADC overlay.
>

Right, technically, you do not need an overlay, and you do not need any
driver modules either. As directly twiddling the ADC module registers, you
essentially are creating your own driver.

Now, with that said, it could be eventually you'll end up using the
overlays, and setting up the ADC in userspace using the iio driver. But
both ways have it's pluses and minuses. I'm sure you can make the
determination for yourself.

On Wed, Sep 21, 2016 at 9:13 AM, Phil  wrote:

> Alright, I finally got this working, thanks to both William and TJF. In
> the end, my problem boils down to coding sloppiness on my part, as well as
> being constantly interrupted with other tasks. After spending a solid block
> of uninterrupted time doing some careful testing, the following code
> snippets are what I found to work. The only device tree overlay I needed is
> what I have below; no need to load the BB-ADC overlay.
>
> *PRU Code*
> //
> // Enable and/or turn on hardware
> // Code in this section must be ordered as listed for proper
> // hardware startup.
>
> // Enable OCP
> lbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4
> clr r0, 4
> sbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4
>
> // Enable ADC clock, wait for ADC module to start before proceeding
> mov r0, CM_WKUP_base + CM_WKUP_ADC_TSC_CLKCTRL
> mov r1, 2
> sbbor1, r0, 0, 4
> mov r1, 0   // clear timeout counter
> AdcWait:
> LBBOr0, adc_base, ADC_REVISION, 4   // load ADC REVISION
> QBNEAdcUp, r0, 0// exit if ADC is running
> ADD r1, r1, 1   // increase timeout counter
> QBGEAdcWait, r1.b1, 16  // if no timeout -> wait
> AdcUp:
>
> //
>
> *Device Tree* *Overlay*
> /dts-v1/;
> /plugin/;
>
> /{
> compatible = "ti,beaglebone", "ti,beaglebone-black";
> part-number = "pru_enable";
> version = "00A0";
>
> /* This overlay uses the following resources */
> exclusive-use =
> "pru0",
>
> "P9.29",// GPIO3[15]fet_off
> "P9.30",// GPIO3[16]fet_on
> "P9.31";// GPIO3[14]triac
>
> fragment@0 {
> target = <_pinmux>;
> __overlay__ {
> pru_pins: pinmux_pru_pins {
> pinctrl-single,pins = <
> 0x190 0x05  // P9_31 $PINS=100 pr1_pru0_pru_r30_0 mode 5
> output pulldown
> 0x194 0x05  // P9_29 $PINS=101 pr1_pru0_pru_r30_1 mode 5
> output pulldown
> 0x198 0x05  // P9_30 $PINS=102 pr1_pru0_pru_r30_2 mode 5
> output pulldown
> >;
> };
> };
> };
>
> fragment@2 { // Enable the PRUSS
> target = <>;
> __overlay__ {
> status = "okay";
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
>
> dig_pru_pins {
> pin-names = "FET_OFF","FET_ON","TRIAC" ;
> gpios = < 14 0// P9.31
>   15 0// P9.29
>   16 0>;  // P9.30
> };
> };
> };
>
> };
>
> --
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> .
>
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[beagleboard] Re: Trying to run the ADC from the PRU

2016-09-21 Thread Phil 
Alright, I finally got this working, thanks to both William and TJF. In the 
end, my problem boils down to coding sloppiness on my part, as well as 
being constantly interrupted with other tasks. After spending a solid block 
of uninterrupted time doing some careful testing, the following code 
snippets are what I found to work. The only device tree overlay I needed is 
what I have below; no need to load the BB-ADC overlay.

*PRU Code*
//
// Enable and/or turn on hardware
// Code in this section must be ordered as listed for proper
// hardware startup.

// Enable OCP
lbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4
clr r0, 4
sbcor0, PRU_ICSS_CFG_base, PRU_CFG_SYSCFG, 4

// Enable ADC clock, wait for ADC module to start before proceeding
mov r0, CM_WKUP_base + CM_WKUP_ADC_TSC_CLKCTRL
mov r1, 2
sbbor1, r0, 0, 4
mov r1, 0   // clear timeout counter
AdcWait:
LBBOr0, adc_base, ADC_REVISION, 4   // load ADC REVISION
QBNEAdcUp, r0, 0// exit if ADC is running
ADD r1, r1, 1   // increase timeout counter
QBGEAdcWait, r1.b1, 16  // if no timeout -> wait
AdcUp:

//

*Device Tree* *Overlay*
/dts-v1/;
/plugin/;

/{
compatible = "ti,beaglebone", "ti,beaglebone-black";
part-number = "pru_enable";
version = "00A0";

/* This overlay uses the following resources */
exclusive-use =
"pru0",

"P9.29",// GPIO3[15]fet_off
"P9.30",// GPIO3[16]fet_on
"P9.31";// GPIO3[14]triac

fragment@0 {
target = <_pinmux>;
__overlay__ {
pru_pins: pinmux_pru_pins {
pinctrl-single,pins = <
0x190 0x05  // P9_31 $PINS=100 pr1_pru0_pru_r30_0 mode 5 
output pulldown
0x194 0x05  // P9_29 $PINS=101 pr1_pru0_pru_r30_1 mode 5 
output pulldown
0x198 0x05  // P9_30 $PINS=102 pr1_pru0_pru_r30_2 mode 5 
output pulldown
>;
};
};
};

fragment@2 { // Enable the PRUSS
target = <>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <_pins>;

dig_pru_pins {
pin-names = "FET_OFF","FET_ON","TRIAC" ;
gpios = < 14 0// P9.31
  15 0// P9.29
  16 0>;  // P9.30
};
};
};

};

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[beagleboard] Re: Trying to run the ADC from the PRU

2016-09-17 Thread TJF 

Am Donnerstag, 15. September 2016 23:26:24 UTC+2 schrieb Phil:
>
> (1) I know this because I tried reading the ADC REVISION register using 
> the PRU and got zero as a result.
>

It takes some cycles before the ADC is up and running. Check the ID 
register several times. In libpruio it works similar to this snippet (find 
original code in file pruio_adc.p):

  LDI  r2, 0b10 // load clock demand value
  MOV  r1, 0x44E004BC   // load CM_WKUP_ADC_TSC_CLKCTRL address
  SBBO r2, r1, 0, 1 // write clock register
  LDI  r5, 0// clear timeout counter
  MOV  r3, 0x44E0D000   // load ADC address
AdcWait:
  LBBO r0, r3,  0, 4// load ADC REVISION
  QBNE AdcCopy, r0, 0   // if ADC is up -> copy config
  ADD  r5, r5, 1// increase timeout counter
  QBGE AdcWait, r5.b1, 16   // if no timeout -> wait

AdcCopy:

Regards
 

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[beagleboard] Re: Trying to run the ADC from the PRU

2016-09-08 Thread TJF 
Hi Phil!

After boot the ADC subsystem is disabled by default. You have to enable the 
CM_WKUP_ADC_TSC_CLKCTRL register in the CONTROL MODULE before you can use 
it:

mov  r0, 0x44E004BC
mov  r1, 2
sbbo r1, r0, 0, 4

Place this snippet after OCP enbled and before any ADC register access.

Regards

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[beagleboard] Re: Trying to run the ADC from the PRU

2016-09-08 Thread TJF 
Hi Phil!

After boot the ADC subsystem is disabled by default. You have to enable the 
CM_WKUP_ADC_TSC_CLKCTRL register in the CONTROL MODULE before you can use 
it:

mov  r0, 0x44E004BC
mov  r1, 2
sbbo r1, r0, 0, 4

Place this snippet after OCP enabled and before any ADC register access.

Regards

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