Hi, Dan
Thanks for you help. I'll try the first solution as you mentioned.
Cheers!
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ZHANG Laiyu
Phone(China) 010-88233078
Cellphone(China) 13681385567
E-mail:zhan...@ihep.ac.cn
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hi zhang laiyu,
here are three things you could try:
1) send your adc samples into a short fifo,
then feed five of the 12 bit ADC samples at a time (instead of four
samples) from the fifo into each 64 bit word feeding the 10Gbe block.
do this for the first 103 fpga clocks out of 128, then
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