[PATCH] D69620: Add AIX assembler support

2019-11-16 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:28
+  const char *LinkingOutput) const {
+  claimNoWarnArgs(Args);
+  ArgStringList CmdArgs;

The definition of `claimNoWarnArgs` is to suppress warnings for some options if 
they are unused, can you explain a little bit about how did you figure out that 
we don't want warnings for those?

Some context of `claimNoWarnArgs`:

```
// Claim options we don't want to warn if they are unused. We do this for
// options that build systems might add but are unused when assembling or only
// running the preprocessor for example.
void tools::claimNoWarnArgs(const ArgList ) {
  // Don't warn about unused -f(no-)?lto.  This can happen when we're
  // preprocessing, precompiling or assembling.
  Args.ClaimAllArgs(options::OPT_flto_EQ);
  Args.ClaimAllArgs(options::OPT_flto);
  Args.ClaimAllArgs(options::OPT_fno_lto);
}
```




Comment at: clang/lib/Driver/ToolChains/AIX.cpp:45
+  // Acccept any mixture of instructions.
+  CmdArgs.push_back("-many");
+

GCC invokes system assembler also with options `-mpwr4` and `-u`, I think you 
need to verify that do we need those? And as far as I can recall, `-mpwr4` is 
to pick up new version AIX instruction set, and `-u` is to suppress warning for 
undefined symbols. 90% sure that we need `-mpwr4`(I could be wrong), but not 
sure about `-u`.



Comment at: clang/lib/Driver/ToolChains/AIX.h:26
+
+  bool hasIntegratedCPP() const override { return false; }
+

I saw a lot of other target also set `hasIntegratedCPP()` as false, but I 
didn't find any explanation in documentation, so I am curious that what this is 
about?


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

2019-10-22 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:35
+  // Only support 32 and 64 bit
+  if (!IsArch32Bit && !IsArch64Bit)
+llvm_unreachable("Unsupported bit width value");

stevewan wrote:
> jasonliu wrote:
> > Xiangling_L wrote:
> > > Is there any reason to use llvm_unreachable here? I think we should use  
> > > 'assertion' instead here:
> > > 
> > > ```
> > > assert((IsArch32Bit || IsArch64Bit) && "...");
> > > ```
> > IsArch64Bit used only in the assertion could cause warning when the 
> > assertion is turned off. 
> Jason has provided a good point why `llvm_unreachable` was preferred here. 
> Other than that, I believe the two are fairly interchangeable in this 
> particular case. That said, I'm leaning towards keeping `llvm_unreachable`, 
> but definitely add more comment if you have good reasons for using `assert`. 
> Thanks!
Jason is right, I am fine with keeping `llvm_unreachable`.



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:44
+  } else {
+assert(Output.isNothing() && "Invalid output.");
+  }

Glad to know the build without assertion on would not be affected by this. I 
just have slight preference that we don't have this blank block in our product 
code when the assertion is off. Is that better we put this assertion before 
`if` block, and do something like this;

```
assert((Output.isFilename() || Output.isNothing()) && "Invalid output.");

if (Output.isFilename()) {
CmdArgs.push_back("-o");
CmdArgs.push_back(Output.getFilename());
  } 
```


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

2019-10-08 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:35
+  // Only support 32 and 64 bit
+  if (!IsArch32Bit && !IsArch64Bit)
+llvm_unreachable("Unsupported bit width value");

Is there any reason to use llvm_unreachable here? I think we should use  
'assertion' instead here:

```
assert((IsArch32Bit || IsArch64Bit) && "...");
```



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:54
+  } else {
+assert(Output.isNothing() && "Invalid output.");
+  }

I am not sure, if we compile with assertion off, does this extra 'else' {} have 
any side effect?



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:70
+
+  if (!Args.hasArg(options::OPT_nostdlib)) {
+const char *crt0 = nullptr;

line 38 and line 70 use the same query, should they be put together? Or is 
there any exact order we should follow to push args into 'CmdArgs'?



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:93
+  if (!Args.hasArg(options::OPT_nostdlib, options::OPT_nodefaultlibs)) {
+// Support POSIX threads if "-pthreads" or 
+// "-pthread" is present

One line of comment can be <= 80 characters.



Comment at: clang/lib/Driver/ToolChains/AIX.h:33
+const char *LinkingOutput) const override;
+};
+} // end namespace aix

An extra blank line preferred below.



Comment at: clang/lib/Driver/ToolChains/AIX.h:43
+  const llvm::opt::ArgList );
+  ~AIX() override;
+

Since we are not doing anything special in AIX toolchain destructor, seems like 
we don't need to override it?


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[PATCH] D68340: Add AIX toolchain and basic linker functionality

2019-10-08 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:38
+
+  if (!Args.hasArg(options::OPT_nostdlib)) {
+CmdArgs.push_back("-e");

Test with Clangtana on terran, when no '-nostdlib' specified, since '-e' & 
'__start' are the default behavior for AIX system linker, so there are no 
explicitly '-e' & '__start' found on linker input commanline, so I am wondering 
do we need to explicitly add them to 'CmdArgs'?



Comment at: clang/lib/Driver/ToolChains/AIX.cpp:47
+  else
+CmdArgs.push_back("-bso");
+

Ditto. Since by default, AIX linker is dynamically linked, '-bso' is implicitly 
set on AIX system linker when testing with Clangtana, so do we need to 
explicitly set '-bso' in LLVM?


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[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-13 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 244476.
Xiangling_L marked 4 inline comments as done.
Xiangling_L added a comment.

Adjust ABI name to `XL`;
Simplify the testcase;


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Files:
  clang/include/clang/Basic/TargetCXXABI.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- /dev/null
+++ clang/test/CodeGen/static-init.cpp
@@ -0,0 +1,12 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+
+struct test {
+  test();
+  ~test();
+} t;
+
+// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -516,6 +516,16 @@
   }
   bool canCallMismatchedFunctionType() const override { return false; }
 };
+
+class XLCXXABI final : public ItaniumCXXABI {
+public:
+  explicit XLCXXABI(CodeGen::CodeGenModule )
+  : ItaniumCXXABI(CGM) {}
+
+  void registerGlobalDtor(CodeGenFunction , const VarDecl ,
+  llvm::FunctionCallee dtor,
+  llvm::Constant *addr) override;
+};
 }
 
 CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule ) {
@@ -546,6 +556,9 @@
   case TargetCXXABI::WebAssembly:
 return new WebAssemblyCXXABI(CGM);
 
+  case TargetCXXABI::XL:
+return new XLCXXABI(CGM);
+
   case TargetCXXABI::GenericItanium:
 if (CGM.getContext().getTargetInfo().getTriple().getArch()
 == llvm::Triple::le32) {
@@ -4407,3 +4420,11 @@
 NormalCleanup, cast(CGF.CurrentFuncletPad));
   ItaniumCXXABI::emitBeginCatch(CGF, C);
 }
+
+/// Register a global destructor as best as we know how.
+void XLCXXABI::registerGlobalDtor(CodeGenFunction , const VarDecl ,
+  llvm::FunctionCallee dtor,
+  llvm::Constant *addr) {
+  llvm::report_fatal_error("Static initialization has not been implemented on"
+   " XL ABI yet.");
+}
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -83,6 +83,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL:
 return CreateItaniumCXXABI(CGM);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(CGM);
Index: clang/lib/Basic/Targets/OSTargets.h
===
--- clang/lib/Basic/Targets/OSTargets.h
+++ clang/lib/Basic/Targets/OSTargets.h
@@ -706,6 +706,8 @@
 public:
   AIXTargetInfo(const llvm::Triple , const TargetOptions )
   : OSTargetInfo(Triple, Opts) {
+this->TheCXXABI.set(TargetCXXABI::XL);
+
 if (this->PointerWidth == 64) {
   this->WCharType = this->UnsignedInt;
 } else {
Index: clang/lib/AST/ASTContext.cpp
===
--- clang/lib/AST/ASTContext.cpp
+++ clang/lib/AST/ASTContext.cpp
@@ -874,6 +874,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL:
 return CreateItaniumCXXABI(*this);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(*this);
@@ -10251,6 +10252,7 @@
   case TargetCXXABI::iOS64:
   case TargetCXXABI::WebAssembly:
   case TargetCXXABI::WatchOS:
+  case TargetCXXABI::XL:
 return ItaniumMangleContext::create(*this, getDiagnostics());
   case TargetCXXABI::Microsoft:
 return MicrosoftMangleContext::create(*this, getDiagnostics());
Index: clang/include/clang/Basic/TargetCXXABI.h
===
--- clang/include/clang/Basic/TargetCXXABI.h
+++ clang/include/clang/Basic/TargetCXXABI.h
@@ -109,6 +109,12 @@
 ///   - constructors and destructors return 'this', as in ARM.
 Fuchsia,
 
+/// The XL ABI is a modified version of the Itanium ABI.
+///
+/// The relevant changes from the Itanium ABI are:
+///   - static initialization is adjusted to use sinit and sterm functions;
+XL,
+
 /// The Microsoft ABI is the ABI used by Microsoft Visual Studio (and
 /// compatible compilers).
 ///
@@ -148,6 +154,7 @@
 case WatchOS:
 case GenericMIPS:
 case WebAssembly:
+case XL:
   return true;
 
 case Microsoft:
@@ -168,6 +175,7 @@
   

[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-02-28 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 247355.
Xiangling_L added a comment.

Rebase on the latest master branch.


Repository:
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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #3
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #3
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: warning: 'constructor' attribute argument not supported:
+// CHECK: int foo() __attribute__((constructor(180)));
+ 
+// CHECK: warning: 'destructor' attribute argument not supported:
+// check: int bar() __attribute__((destructor(180)));
+
+// CHECK: warning: 'init_priority' attribute argument not supported:
+// CHECK: __attribute__ ((init_priority (2000)))
+
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -6819,7 +6819,11 @@
 handlePassObjectSizeAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported)
+  << AL << "";
+else
+  handleConstructorAttr(S, D, AL);
 break;
   case ParsedAttr::AT_CXX11NoReturn:
 handleSimpleAttribute(S, D, AL);
@@ -6828,7 +6832,11 @@
 handleDeprecatedAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Destructor:
-handleDestructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  

[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-02-28 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 247360.
Xiangling_L added a comment.

Clean the formatting issues;


Repository:
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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #3
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #3
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: warning: 'constructor' attribute argument not supported:
+// CHECK: int foo() __attribute__((constructor(180)));
+
+// CHECK: warning: 'destructor' attribute argument not supported:
+// check: int bar() __attribute__((destructor(180)));
+
+// CHECK: warning: 'init_priority' attribute argument not supported:
+// CHECK: __attribute__ ((init_priority (2000)))
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -6819,7 +6819,11 @@
 handlePassObjectSizeAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported)
+  << AL << "";
+else
+  handleConstructorAttr(S, D, AL);
 break;
   case ParsedAttr::AT_CXX11NoReturn:
 handleSimpleAttribute(S, D, AL);
@@ -6828,7 +6832,11 @@
 handleDeprecatedAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Destructor:
-handleDestructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), 

[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-03-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 248571.
Xiangling_L marked 2 inline comments as done.
Xiangling_L added a comment.

Fix the formatting issue;
Address the 1st round reviews;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74166/new/

https://reviews.llvm.org/D74166

Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #3
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #3
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: warning: 'constructor' attribute argument not supported:
+// CHECK: int foo() __attribute__((constructor(180)));
+
+// CHECK: warning: 'destructor' attribute argument not supported:
+// check: int bar() __attribute__((destructor(180)));
+
+// CHECK: warning: 'init_priority' attribute argument not supported:
+// CHECK: __attribute__ ((init_priority (2000)))
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -6821,7 +6821,10 @@
 handlePassObjectSizeAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported) << AL << "";
+else
+  handleConstructorAttr(S, D, AL);
 break;
   case ParsedAttr::AT_CXX11NoReturn:
 handleSimpleAttribute(S, D, AL);
@@ -6830,7 +6833,10 @@
 handleDeprecatedAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Destructor:
-handleDestructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  

[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-24 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8bee52bdb54a: [AIX][Frontend] C++ ABI customizations for AIX 
boilerplate (authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74015/new/

https://reviews.llvm.org/D74015

Files:
  clang/include/clang/Basic/TargetCXXABI.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- /dev/null
+++ clang/test/CodeGen/static-init.cpp
@@ -0,0 +1,12 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+
+struct test {
+  test();
+  ~test();
+} t;
+
+// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -516,6 +516,16 @@
   }
   bool canCallMismatchedFunctionType() const override { return false; }
 };
+
+class XLCXXABI final : public ItaniumCXXABI {
+public:
+  explicit XLCXXABI(CodeGen::CodeGenModule )
+  : ItaniumCXXABI(CGM) {}
+
+  void registerGlobalDtor(CodeGenFunction , const VarDecl ,
+  llvm::FunctionCallee dtor,
+  llvm::Constant *addr) override;
+};
 }
 
 CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule ) {
@@ -546,6 +556,9 @@
   case TargetCXXABI::WebAssembly:
 return new WebAssemblyCXXABI(CGM);
 
+  case TargetCXXABI::XL:
+return new XLCXXABI(CGM);
+
   case TargetCXXABI::GenericItanium:
 if (CGM.getContext().getTargetInfo().getTriple().getArch()
 == llvm::Triple::le32) {
@@ -4407,3 +4420,11 @@
 NormalCleanup, cast(CGF.CurrentFuncletPad));
   ItaniumCXXABI::emitBeginCatch(CGF, C);
 }
+
+/// Register a global destructor as best as we know how.
+void XLCXXABI::registerGlobalDtor(CodeGenFunction , const VarDecl ,
+  llvm::FunctionCallee dtor,
+  llvm::Constant *addr) {
+  llvm::report_fatal_error("Static initialization has not been implemented on"
+   " XL ABI yet.");
+}
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -83,6 +83,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL:
 return CreateItaniumCXXABI(CGM);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(CGM);
Index: clang/lib/Basic/Targets/OSTargets.h
===
--- clang/lib/Basic/Targets/OSTargets.h
+++ clang/lib/Basic/Targets/OSTargets.h
@@ -706,6 +706,8 @@
 public:
   AIXTargetInfo(const llvm::Triple , const TargetOptions )
   : OSTargetInfo(Triple, Opts) {
+this->TheCXXABI.set(TargetCXXABI::XL);
+
 if (this->PointerWidth == 64) {
   this->WCharType = this->UnsignedInt;
 } else {
Index: clang/lib/AST/ASTContext.cpp
===
--- clang/lib/AST/ASTContext.cpp
+++ clang/lib/AST/ASTContext.cpp
@@ -874,6 +874,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL:
 return CreateItaniumCXXABI(*this);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(*this);
@@ -10253,6 +10254,7 @@
   case TargetCXXABI::iOS64:
   case TargetCXXABI::WebAssembly:
   case TargetCXXABI::WatchOS:
+  case TargetCXXABI::XL:
 return ItaniumMangleContext::create(*this, getDiagnostics());
   case TargetCXXABI::Microsoft:
 return MicrosoftMangleContext::create(*this, getDiagnostics());
Index: clang/include/clang/Basic/TargetCXXABI.h
===
--- clang/include/clang/Basic/TargetCXXABI.h
+++ clang/include/clang/Basic/TargetCXXABI.h
@@ -109,6 +109,13 @@
 ///   - constructors and destructors return 'this', as in ARM.
 Fuchsia,
 
+/// The XL ABI is the ABI used by IBM xlclang compiler and is a modified
+/// version of the Itanium ABI.
+///
+/// The relevant changes from the Itanium ABI are:
+///   - static initialization is adjusted to use sinit and sterm functions;
+XL,
+
 /// The Microsoft ABI is the ABI used by Microsoft Visual Studio (and
 /// compatible compilers).
 ///
@@ -148,6 +155,7 @@
 case WatchOS:
 case 

[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-02-26 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

ping.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74166/new/

https://reviews.llvm.org/D74166



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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-02-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, cebowleratibm, 
yusra.syeda, sfertile, jasonliu, xingxue, hfinkel.
Xiangling_L added a project: LLVM.
Herald added subscribers: llvm-commits, cfe-commits, dexonsmith.
Herald added a project: clang.
Xiangling_L added a parent revision: D74015: [AIX][Frontend] C++ ABI 
customizations for AIX boilerplate.
Xiangling_L planned changes to this revision.

Importantly, this patch provides context and shows where things are going of 
static init of AIX in LLVM. And hope it would help reviewers with its parent 
patch:  D74015 .

- Provides no piroirity supoort && disables/ignores three priority related 
attributes: init_priority, ctor attr, dtor attr;
  - '-qunique' in XLC compiler equivalent behavior of emitting sinit and sterm 
functions name using `getUniqueModuleId()` function in LLVM;
  - Add a simple testcase to emit IR sample with sinit8000, srterm, and 
sterm8000


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74166

Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp
  llvm/include/llvm/ADT/Triple.h

Index: llvm/include/llvm/ADT/Triple.h
===
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -743,7 +743,7 @@
 
   /// Tests whether the target supports comdat
   bool supportsCOMDAT() const {
-return !isOSBinFormatMachO();
+return !isOSBinFormatMachO() && !isOSBinFormatXCOFF();
   }
 
   /// Tests whether the target uses emulated TLS as default.
Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,8 +1,9 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: 2>&1 | FileCheck %s
 class test {
int a;
 public:
@@ -12,5 +13,47 @@
 
 test t(1);
 
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ei(%class.test* @t, i32 1)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%class.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #2
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #2
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
 
-; CHECK: error in backend: Static initialization has not been fully implemented on XL_Clang ABI yet.
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int 

[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-04 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, cebowleratibm, 
yusra.syeda, sfertile, jasonliu, xingxue.
Xiangling_L added a project: LLVM.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This PR enables **XL_Clang** C++ ABI in frontend AST to IR codegen. And it is 
driven by static init work. The current kind in Clang by default is Generic 
Itanium, which has different behavior on static init with Clangtana on AIX.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D74015

Files:
  clang/include/clang/Basic/TargetCXXABI.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- /dev/null
+++ clang/test/CodeGen/static-init.cpp
@@ -0,0 +1,16 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+test t(1);
+
+
+; CHECK: error in backend: Static initialization has not been fully implemented on XL_Clang ABI yet.
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -516,6 +516,16 @@
   }
   bool canCallMismatchedFunctionType() const override { return false; }
 };
+
+class XLClangCXXABI final : public ItaniumCXXABI {
+public:
+  explicit XLClangCXXABI(CodeGen::CodeGenModule )
+  : ItaniumCXXABI(CGM) {}
+
+  void registerGlobalDtor(CodeGenFunction , const VarDecl ,
+  llvm::FunctionCallee dtor,
+  llvm::Constant *addr) override;
+};
 }
 
 CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule ) {
@@ -546,6 +556,9 @@
   case TargetCXXABI::WebAssembly:
 return new WebAssemblyCXXABI(CGM);
 
+  case TargetCXXABI::XL_Clang:
+return new XLClangCXXABI(CGM);
+
   case TargetCXXABI::GenericItanium:
 if (CGM.getContext().getTargetInfo().getTriple().getArch()
 == llvm::Triple::le32) {
@@ -4407,3 +4420,11 @@
 NormalCleanup, cast(CGF.CurrentFuncletPad));
   ItaniumCXXABI::emitBeginCatch(CGF, C);
 }
+
+/// Register a global destructor as best as we know how.
+void XLClangCXXABI::registerGlobalDtor(CodeGenFunction , const VarDecl ,
+   llvm::FunctionCallee dtor,
+   llvm::Constant *addr) {
+  llvm::report_fatal_error("Static initialization has not been fully"
+   " implemented on XL_Clang ABI yet.");
+}
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -83,6 +83,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL_Clang:
 return CreateItaniumCXXABI(CGM);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(CGM);
Index: clang/lib/Basic/Targets/OSTargets.h
===
--- clang/lib/Basic/Targets/OSTargets.h
+++ clang/lib/Basic/Targets/OSTargets.h
@@ -706,6 +706,8 @@
 public:
   AIXTargetInfo(const llvm::Triple , const TargetOptions )
   : OSTargetInfo(Triple, Opts) {
+this->TheCXXABI.set(TargetCXXABI::XL_Clang);
+
 if (this->PointerWidth == 64) {
   this->WCharType = this->UnsignedInt;
 } else {
Index: clang/lib/AST/ASTContext.cpp
===
--- clang/lib/AST/ASTContext.cpp
+++ clang/lib/AST/ASTContext.cpp
@@ -874,6 +874,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL_Clang:
 return CreateItaniumCXXABI(*this);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(*this);
@@ -10251,6 +10252,7 @@
   case TargetCXXABI::iOS64:
   case TargetCXXABI::WebAssembly:
   case TargetCXXABI::WatchOS:
+  case TargetCXXABI::XL_Clang:
 return ItaniumMangleContext::create(*this, getDiagnostics());
   case TargetCXXABI::Microsoft:
 return MicrosoftMangleContext::create(*this, getDiagnostics());
Index: clang/include/clang/Basic/TargetCXXABI.h
===
--- clang/include/clang/Basic/TargetCXXABI.h
+++ clang/include/clang/Basic/TargetCXXABI.h
@@ -109,6 +109,12 @@
 ///   - constructors and destructors return 'this', as in ARM.
 Fuchsia,
 
+/// The XL_Clang ABI is a modified version of the Itanium ABI.
+///
+

[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-18 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

In D74015#1880847 , @cebowleratibm 
wrote:

> From my perspective, the only issue holding this up is settling on the name.  
> I'd like to hammer that out and get this committed.


It looks everyone agrees on `XL` so far. As for your other suggestion `IBMXL`, 
if your intention is to clarify this ABI is IBM product specific, I think a 
good practice we can do is to leave a comment when we defined it as Microsoft 
does.


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[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-14 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 3 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:520
+
+class XLCXXABI final : public ItaniumCXXABI {
+public:

sfertile wrote:
> Xiangling_L wrote:
> > sfertile wrote:
> > > Here would be a good place to add a comment to indicate that XL has 
> > > several C++ ABIs, but this represents the one used in 'xlClang++'.
> > You mean we have legacy XLC and XLClang++ ABI? But for static init, they 
> > have same implementation. So it's not a must to point it out. 
> > 
> > And also AFAIK, `static init` is the only thing we will differ from Generic 
> > Itanium ABI in the frontend, so basically it's the only thing we will add 
> > in this ABI.
> > 
> > I am okay with either way with a little concern that legacy XLC user may 
> > wonder is there any difference of static init implementation between XLC 
> > and XLClang++ ABI if we add the comment.
> Sorry, I had a matching comment on the 'XL' enum, but I must have deleted it 
> accidentally before submitting. I said I agreed with using just 'XL' since 
> there is only one XL C++ ABI implemented in Clang we don't have to worry 
> about differentiating between the 'legacy' XL and the C++11 XL ABIs. If you 
> did want to clarify then adding a comment here would be the only thing I 
> suggest.
I see. Thank you for your clarification.


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[PATCH] D74631: [clang][XCOFF] Indicate that XCOFF does not support COMDATs

2020-02-14 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

In D74631#1876995 , @sfertile wrote:

>




> Will we report an error somewhere in the backend if we encounter a COMDAT?

I hit this when I was doing my static init patch as well:  `error in backend: 
COMDAT not yet supported by AIX.`


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-02-21 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 245929.
Xiangling_L edited the summary of this revision.
Xiangling_L added a comment.

Update the testcase;


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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #3
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #3
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: warning: 'constructor' attribute argument not supported:
+// CHECK: int foo() __attribute__((constructor(180)));
+ 
+// CHECK: warning: 'destructor' attribute argument not supported:
+// check: int bar() __attribute__((destructor(180)));
+
+// CHECK: warning: 'init_priority' attribute argument not supported:
+// CHECK: __attribute__ ((init_priority (2000)))
+
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -6819,7 +6819,11 @@
 handlePassObjectSizeAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported)
+  << AL << "";
+else
+  handleConstructorAttr(S, D, AL);
 break;
   case ParsedAttr::AT_CXX11NoReturn:
 handleSimpleAttribute(S, D, AL);
@@ -6828,7 +6832,11 @@
 handleDeprecatedAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Destructor:
-handleDestructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), 

[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-02-21 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 245879.
Xiangling_L added a comment.

Rebase to incorparate `XL` C++ ABI name && comdat changes;


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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ei(%class.test* @t, i32 1)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%class.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #2
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #2
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: warning: 'constructor' attribute argument not supported:
+// CHECK: int foo() __attribute__((constructor(180)));
+ 
+// CHECK: warning: 'destructor' attribute argument not supported:
+// check: int bar() __attribute__((destructor(180)));
+
+// CHECK: warning: 'init_priority' attribute argument not supported:
+// CHECK: __attribute__ ((init_priority (2000)))
+
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -6819,7 +6819,11 @@
 handlePassObjectSizeAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported)
+  << AL << "";
+else
+  handleConstructorAttr(S, D, AL);
 break;
   case ParsedAttr::AT_CXX11NoReturn:
 handleSimpleAttribute(S, D, AL);
@@ -6828,7 +6832,11 @@
 handleDeprecatedAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Destructor:
-handleDestructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  

[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-21 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 245844.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Update the comment about ABI description;


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Files:
  clang/include/clang/Basic/TargetCXXABI.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/Basic/Targets/OSTargets.h
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- /dev/null
+++ clang/test/CodeGen/static-init.cpp
@@ -0,0 +1,12 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
+// RUN: 2>&1 | FileCheck %s
+
+struct test {
+  test();
+  ~test();
+} t;
+
+// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -516,6 +516,16 @@
   }
   bool canCallMismatchedFunctionType() const override { return false; }
 };
+
+class XLCXXABI final : public ItaniumCXXABI {
+public:
+  explicit XLCXXABI(CodeGen::CodeGenModule )
+  : ItaniumCXXABI(CGM) {}
+
+  void registerGlobalDtor(CodeGenFunction , const VarDecl ,
+  llvm::FunctionCallee dtor,
+  llvm::Constant *addr) override;
+};
 }
 
 CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule ) {
@@ -546,6 +556,9 @@
   case TargetCXXABI::WebAssembly:
 return new WebAssemblyCXXABI(CGM);
 
+  case TargetCXXABI::XL:
+return new XLCXXABI(CGM);
+
   case TargetCXXABI::GenericItanium:
 if (CGM.getContext().getTargetInfo().getTriple().getArch()
 == llvm::Triple::le32) {
@@ -4407,3 +4420,11 @@
 NormalCleanup, cast(CGF.CurrentFuncletPad));
   ItaniumCXXABI::emitBeginCatch(CGF, C);
 }
+
+/// Register a global destructor as best as we know how.
+void XLCXXABI::registerGlobalDtor(CodeGenFunction , const VarDecl ,
+  llvm::FunctionCallee dtor,
+  llvm::Constant *addr) {
+  llvm::report_fatal_error("Static initialization has not been implemented on"
+   " XL ABI yet.");
+}
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -83,6 +83,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL:
 return CreateItaniumCXXABI(CGM);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(CGM);
Index: clang/lib/Basic/Targets/OSTargets.h
===
--- clang/lib/Basic/Targets/OSTargets.h
+++ clang/lib/Basic/Targets/OSTargets.h
@@ -706,6 +706,8 @@
 public:
   AIXTargetInfo(const llvm::Triple , const TargetOptions )
   : OSTargetInfo(Triple, Opts) {
+this->TheCXXABI.set(TargetCXXABI::XL);
+
 if (this->PointerWidth == 64) {
   this->WCharType = this->UnsignedInt;
 } else {
Index: clang/lib/AST/ASTContext.cpp
===
--- clang/lib/AST/ASTContext.cpp
+++ clang/lib/AST/ASTContext.cpp
@@ -874,6 +874,7 @@
   case TargetCXXABI::GenericMIPS:
   case TargetCXXABI::GenericItanium:
   case TargetCXXABI::WebAssembly:
+  case TargetCXXABI::XL:
 return CreateItaniumCXXABI(*this);
   case TargetCXXABI::Microsoft:
 return CreateMicrosoftCXXABI(*this);
@@ -10253,6 +10254,7 @@
   case TargetCXXABI::iOS64:
   case TargetCXXABI::WebAssembly:
   case TargetCXXABI::WatchOS:
+  case TargetCXXABI::XL:
 return ItaniumMangleContext::create(*this, getDiagnostics());
   case TargetCXXABI::Microsoft:
 return MicrosoftMangleContext::create(*this, getDiagnostics());
Index: clang/include/clang/Basic/TargetCXXABI.h
===
--- clang/include/clang/Basic/TargetCXXABI.h
+++ clang/include/clang/Basic/TargetCXXABI.h
@@ -109,6 +109,13 @@
 ///   - constructors and destructors return 'this', as in ARM.
 Fuchsia,
 
+/// The XL ABI is the ABI used by IBM xlclang compiler and is a modified
+/// version of the Itanium ABI.
+///
+/// The relevant changes from the Itanium ABI are:
+///   - static initialization is adjusted to use sinit and sterm functions;
+XL,
+
 /// The Microsoft ABI is the ABI used by Microsoft Visual Studio (and
 /// compatible compilers).
 ///
@@ -148,6 +155,7 @@
 case WatchOS:
 case GenericMIPS:
 case 

[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-13 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 3 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:520
+
+class XLCXXABI final : public ItaniumCXXABI {
+public:

sfertile wrote:
> Here would be a good place to add a comment to indicate that XL has several 
> C++ ABIs, but this represents the one used in 'xlClang++'.
You mean we have legacy XLC and XLClang++ ABI? But for static init, they have 
same implementation. So it's not a must to point it out. 

And also AFAIK, `static init` is the only thing we will differ from Generic 
Itanium ABI in the frontend, so basically it's the only thing we will add in 
this ABI.

I am okay with either way with a little concern that legacy XLC user may wonder 
is there any difference of static init implementation between XLC and XLClang++ 
ABI if we add the comment.


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[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-18 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

ping.


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[PATCH] D74015: [AIX][Frontend] C++ ABI customizations for AIX boilerplate

2020-02-11 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 4 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/include/clang/Basic/TargetCXXABI.h:116
+///   - static initialization is adjusted to use sinit and sterm functions;
+XL_Clang,
+

daltenty wrote:
> Why the underscore in the name? This is a bit inconsistent with both the LLVM 
> naming convention here and the name as it appears in other sources.
There are various AIX ABI. So to distinguish the one we are implementing, we 
choose `XL` and `Clang` as two parts of the abi name. 
`XL` - not g++;
`Clang` - it's a  ABI implemented in Clang;

And also `XLClang` is misleading because it represents our AIX XL C/C++ 
compiler itself externally.



Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:520
+
+class XLClangCXXABI final : public ItaniumCXXABI {
+public:

stevewan wrote:
> The class name here is inconsistent with how our ABI kind was called 
> previously, as David pointed out. Maybe rename the ABI kind `XLClang`? 
I understand you concerns, and please see my replies above.


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-03-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 4 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/CGDeclCXX.cpp:283
   llvm::FunctionCallee atexit =
-  CGM.CreateRuntimeFunction(atexitTy, "atexit", llvm::AttributeList(),
-/*Local=*/true);
+  CGM.CreateRuntimeFunction(atexitTy, "atexit", llvm::AttributeList());
   if (llvm::Function *atexitFn = dyn_cast(atexit.getCallee()))

sfertile wrote:
> The default value for `Local` is false, was this change intentional? If so 
> why is it needed?
Thanks for pointing this out. I believe this is a bug. I was supposed to only 
let `Local` in `unregisterGlobalDtorWithUnAtExit` as default value `false`. 
Because it is only used in relation to Windows. 





Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:531
+
+  bool isCXXGlobalInitAndDtorFuncInternal() const override { return false; }
+

yusra.syeda wrote:
> Perhaps adding a check to see if the OS is AIX before setting linkage to 
> external will be useful here.
Since we are already under the context that `XLCXXABI` is an AIX C++ ABI, I 
kinda feel it's a duplication to add OS check.


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[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

2020-04-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/test/CodeGen/aix-vararg.c:15
+
+  // 32BIT:   define void @aix_varg(i32 %a, ...) #0 {
+  // 32BIT-NEXT:  entry:

`#0`, `#1`[the last three lines] are redundant, could you clean them up?


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-04-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 255456.
Xiangling_L added a comment.

Rebase on the latest master branch;


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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #3
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #3
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: warning: 'constructor' attribute argument not supported:
+// CHECK: int foo() __attribute__((constructor(180)));
+
+// CHECK: warning: 'destructor' attribute argument not supported:
+// check: int bar() __attribute__((destructor(180)));
+
+// CHECK: warning: 'init_priority' attribute argument not supported:
+// CHECK: __attribute__ ((init_priority (2000)))
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -6876,13 +6876,19 @@
 handlePassObjectSizeAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported) << AL << "";
+else
+  handleConstructorAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Deprecated:
 handleDeprecatedAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Destructor:
-handleDestructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported) << AL << "";
+else
+  

[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

2020-04-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4205
+
+class PPCAIX32TargetCodeGenInfo : public TargetCodeGenInfo {
+public:

I have a question here. AIX32 falls into PPC32 target, so why we don't inherit 
from `PPC32TargetCodeGenInfo` instead?



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4210
+
+  int getDwarfEHStackPointer(CodeGen::CodeGenModule ) const override {
+return 1; // r1 is the dedicated stack pointer

Is `getDwarfEHStackPointer` necessary to be correct for vararg of AIX to work[I 
guess possibly not]? If not, should it fall into Dwarf related patch rather 
than in this one? BTW, if your `PPCAIX32TargetCodeGenInfo` inherits from 
`PPC32TargetCodeGenInfo` instead as I mentioned above, then it would be 
naturally correct.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4447
+CodeGen::CodeGenFunction , llvm::Value *Address) const {
+  return true;
+}

As simple as this function is, does it make sense to move the body of `return 
true` into the class definition?


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[PATCH] D78563: [AIX] Port power alignment rules to clang

2020-04-21 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: jasonliu, hubert.reinterpretcast, sfertile.
Xiangling_L added a project: LLVM.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Address the following aspects of power alignment rules:

- Implemented double/long double alignment when not first struct member
- A double member in union is always treated as the first member, and should 
not use special alignment rule
- Fixed the alignment issue caused by virtual function
- Applied AIX Alignment rule when layout base class
- Fixed AIX layout for zero sized bitfield followed by double


Repository:
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https://reviews.llvm.org/D78563

Files:
  clang/include/clang/AST/RecordLayout.h
  clang/lib/AST/RecordLayout.cpp
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-virtual-function-alignment.cpp

Index: clang/test/Layout/aix-virtual-function-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-virtual-function-alignment.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck \
+// RUN: --check-prefix=CHECK32 %s
+
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc64-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck \
+// RUN: --check-prefix=CHECK64 %s
+
+struct A {
+  virtual void boo() {}
+};
+
+struct B {
+  bool b;
+  A a;
+};
+
+int i = sizeof(B);
+
+// CHECK32:  *** Dumping AST Record Layout
+// CHECK32-NEXT:  0 | struct A
+// CHECK32-NEXT:  0 |   (A vtable pointer)
+// CHECK32-NEXT:| [sizeof=4, dsize=4, align=4,
+// CHECK32-NEXT:|  nvsize=4, nvalign=4]
+
+// CHECK32:  *** Dumping AST Record Layout
+// CHECK32-NEXT:  0 | struct B
+// CHECK32-NEXT:  0 |   _Bool b
+// CHECK32-NEXT:  4 |   struct A a
+// CHECK32-NEXT:  4 | (A vtable pointer)
+// CHECK32-NEXT:| [sizeof=8, dsize=8, align=4,
+// CHECK32-NEXT:|  nvsize=8, nvalign=4]
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct A
+// CHECK64-NEXT:  0 |   (A vtable pointer)
+// CHECK64-NEXT:| [sizeof=8, dsize=8, align=8,
+// CHECK64-NEXT:|  nvsize=8, nvalign=8]
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct B
+// CHECK64-NEXT:  0 |   _Bool b
+// CHECK64-NEXT:  8 |   struct A a
+// CHECK64-NEXT:  8 | (A vtable pointer)
+// CHECK64-NEXT:| [sizeof=16, dsize=16, align=8,
+// CHECK64-NEXT:|  nvsize=16, nvalign=8]
Index: clang/test/Layout/aix-double-struct-member.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-double-struct-member.cpp
@@ -0,0 +1,136 @@
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck %s
+
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc64-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck %s
+
+namespace test1 {
+// Test double alignment when it is/is not the first struct member.
+struct D {
+  double d1;
+  int i1;
+};
+
+struct DoubleFirst {
+  struct D d2;
+  int i2;
+};
+
+struct IntFirst {
+  int i3;
+  struct D d3;
+};
+
+int a = sizeof(DoubleFirst);
+int b = sizeof(IntFirst);
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test1::D
+// CHECK-NEXT: 0 |   double d1
+// CHECK-NEXT: 8 |   int i1
+// CHECK-NEXT:   | [sizeof=16, dsize=16, align=8,
+// CHECK-NEXT:   |  nvsize=16, nvalign=8]
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test1::DoubleFirst
+// CHECK-NEXT: 0 |   struct test1::D d2
+// CHECK-NEXT: 0 | double d1
+// CHECK-NEXT: 8 | int i1
+// CHECK-NEXT:16 |   int i2
+// CHECK-NEXT:   | [sizeof=24, dsize=24, align=8,
+// CHECK-NEXT:   |  nvsize=24, nvalign=8]
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test1::IntFirst
+// CHECK-NEXT: 0 |   int i3
+// CHECK-NEXT: 4 |   struct test1::D d3
+// CHECK-NEXT: 4 | double d1
+// CHECK-NEXT:12 | int i1
+// CHECK-NEXT:   | [sizeof=20, dsize=20, align=4,
+// CHECK-NEXT:   |  nvsize=20, nvalign=4]
+}; // namespace test1
+
+namespace test2 {
+// Test AIX layout for zero sized bitfield followed by double.
+struct Double {
+  int : 0;
+  double d;
+};
+
+int a = sizeof(Double);
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test2::Double
+// CHECK-NEXT:   0:- |   int
+// CHECK-NEXT: 0 |   double d
+// CHECK-NEXT:   | 

[PATCH] D76360: [PPC][AIX] Emit correct Vaarg for 32BIT-AIX in clang

2020-04-09 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4205
+
+class PPCAIX32TargetCodeGenInfo : public TargetCodeGenInfo {
+public:

sfertile wrote:
> Xiangling_L wrote:
> > I have a question here. AIX32 falls into PPC32 target, so why we don't 
> > inherit from `PPC32TargetCodeGenInfo` instead?
> Do we need a separate AIX specific class? We are implementing 2 functions, 1 
> of which is the same implementation as its `PPC32TargetCodeGenInfo` 
> counterpart. If we have access to the triple, we can  return true when the OS 
> is AIX in `PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable`. With the 
> implementations being nearly identical (and after enabling 
> DwarfEHRegSizeTable they will be identical) I think we are better to not add 
> a new class if we can avoid it.
Not adding a new class makes sense to me if we are sure that 
`DwarfEHRegSizeTable` will be identical/viable for AIX.


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[PATCH] D78563: [AIX] Port power alignment rules to clang

2020-04-23 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 259559.
Xiangling_L marked 5 inline comments as done.
Xiangling_L added a comment.

Adjust some comments style;
Add more testcases;


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Files:
  clang/include/clang/AST/RecordLayout.h
  clang/lib/AST/RecordLayout.cpp
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-virtual-function-alignment.cpp

Index: clang/test/Layout/aix-virtual-function-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-virtual-function-alignment.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck \
+// RUN: --check-prefix=CHECK32 %s
+
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc64-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck \
+// RUN: --check-prefix=CHECK64 %s
+
+struct A {
+  virtual void boo() {}
+};
+
+struct B {
+  bool b;
+  A a;
+};
+
+int i = sizeof(B);
+
+// CHECK32:  *** Dumping AST Record Layout
+// CHECK32-NEXT:  0 | struct A
+// CHECK32-NEXT:  0 |   (A vtable pointer)
+// CHECK32-NEXT:| [sizeof=4, dsize=4, align=4,
+// CHECK32-NEXT:|  nvsize=4, nvalign=4]
+
+// CHECK32:  *** Dumping AST Record Layout
+// CHECK32-NEXT:  0 | struct B
+// CHECK32-NEXT:  0 |   _Bool b
+// CHECK32-NEXT:  4 |   struct A a
+// CHECK32-NEXT:  4 | (A vtable pointer)
+// CHECK32-NEXT:| [sizeof=8, dsize=8, align=4,
+// CHECK32-NEXT:|  nvsize=8, nvalign=4]
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct A
+// CHECK64-NEXT:  0 |   (A vtable pointer)
+// CHECK64-NEXT:| [sizeof=8, dsize=8, align=8,
+// CHECK64-NEXT:|  nvsize=8, nvalign=8]
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct B
+// CHECK64-NEXT:  0 |   _Bool b
+// CHECK64-NEXT:  8 |   struct A a
+// CHECK64-NEXT:  8 | (A vtable pointer)
+// CHECK64-NEXT:| [sizeof=16, dsize=16, align=8,
+// CHECK64-NEXT:|  nvsize=16, nvalign=8]
Index: clang/test/Layout/aix-double-struct-member.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-double-struct-member.cpp
@@ -0,0 +1,282 @@
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck %s
+
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc64-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck %s
+
+namespace test1 {
+// Test double alignment when it is/is not the first struct member.
+struct D {
+  double d1;
+  int i1;
+};
+
+struct DoubleFirst {
+  struct D d2;
+  int i2;
+};
+
+struct IntFirst {
+  int i3;
+  struct D d3;
+};
+
+int a = sizeof(DoubleFirst);
+int b = sizeof(IntFirst);
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test1::D
+// CHECK-NEXT: 0 |   double d1
+// CHECK-NEXT: 8 |   int i1
+// CHECK-NEXT:   | [sizeof=16, dsize=16, align=8,
+// CHECK-NEXT:   |  nvsize=16, nvalign=8]
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test1::DoubleFirst
+// CHECK-NEXT: 0 |   struct test1::D d2
+// CHECK-NEXT: 0 | double d1
+// CHECK-NEXT: 8 | int i1
+// CHECK-NEXT:16 |   int i2
+// CHECK-NEXT:   | [sizeof=24, dsize=24, align=8,
+// CHECK-NEXT:   |  nvsize=24, nvalign=8]
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test1::IntFirst
+// CHECK-NEXT: 0 |   int i3
+// CHECK-NEXT: 4 |   struct test1::D d3
+// CHECK-NEXT: 4 | double d1
+// CHECK-NEXT:12 | int i1
+// CHECK-NEXT:   | [sizeof=20, dsize=20, align=4,
+// CHECK-NEXT:   |  nvsize=20, nvalign=4]
+}; // namespace test1
+
+namespace test2 {
+// Test AIX layout for zero sized bitfield followed by double.
+struct Double {
+  int : 0;
+  double d;
+};
+
+int a = sizeof(Double);
+
+// CHECK: *** Dumping AST Record Layout
+// CHECK-NEXT: 0 | struct test2::Double
+// CHECK-NEXT:   0:- |   int
+// CHECK-NEXT: 0 |   double d
+// CHECK-NEXT:   | [sizeof=8, dsize=8, align=4,
+// CHECK-NEXT:   |  nvsize=8, nvalign=4]
+}; // namespace test2
+
+namespace test3 {
+// Test the alignment of a double member in union.
+union A {
+  int *b;
+  double d;
+};
+
+struct UnionStruct {
+  union A a;
+  int i;
+};
+
+int a = sizeof(UnionStruct);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | union 

[PATCH] D78563: [AIX] Port power alignment rules to clang

2020-04-27 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L abandoned this revision.
Xiangling_L added a comment.

Current implementation conflicts with  __AlignOf  behavior as we discussed in 
[RFC] Adding AIX power alignment rule in clang front end 
(http://lists.llvm.org/pipermail/cfe-dev/2020-April/065324.html) . Drop this 
revision and a new implementation will be put on Phabricator when it's ready.


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-05-01 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 261602.
Xiangling_L added a comment.
Herald added a reviewer: aaron.ballman.

Fix a minor issue


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*) #3
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*) #3
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-priority-attribute.cpp
@@ -0,0 +1,26 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | \
+// RUN: FileCheck %s
+
+int foo() __attribute__((constructor(180)));
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: warning: 'constructor' attribute argument not supported:
+// CHECK: int foo() __attribute__((constructor(180)));
+
+// CHECK: warning: 'destructor' attribute argument not supported:
+// check: int bar() __attribute__((destructor(180)));
+
+// CHECK: warning: 'init_priority' attribute argument not supported:
+// CHECK: __attribute__ ((init_priority (2000)))
Index: clang/lib/Sema/SemaDeclAttr.cpp
===
--- clang/lib/Sema/SemaDeclAttr.cpp
+++ clang/lib/Sema/SemaDeclAttr.cpp
@@ -6895,13 +6895,19 @@
 handlePassObjectSizeAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported) << AL << "";
+else
+  handleConstructorAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Deprecated:
 handleDeprecatedAttr(S, D, AL);
 break;
   case ParsedAttr::AT_Destructor:
-handleDestructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported) << AL << 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-04 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4179
+  // This is calculated from the LLVM and GCC tables and verified
+  // against gcc output.  AFAIK all ABIs use the same encoding.
+

Minor comment about comment style:
Though I noticed that "AFAIK all ABIs use the same encoding." is from original 
code, could we adjust it to something like "All PPC ABIs use the same encoding."



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4194
+
+  // 64-76 are various 4-byte or 8-byte special-purpose registers:
+  // 64: mq

s/64-76/64-67?



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

This method uses the ABI alignment of the given aggregate type which I think is 
not ideal due to our AIX special alignment rule. We need to use preferred 
alignment in this case.
Btw also I think it's not necessary for you to rebase your patch on the power 
alignment patch, I can refresh the testcase when I am dealing with that one.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4336
+if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
+  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
+

Same comment like above.



Comment at: clang/test/CodeGen/aix-vaargs.c:3
+// REQUIRES: asserts
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | FileCheck 
%s --check-prefixes=AIX-COM,AIX-M32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | 
FileCheck %s --check-prefixes=AIX-COM,AIX-M64

Consistent with other testcases to use `AIX32/AIX64`?



Comment at: clang/test/CodeGen/ppc32-and-aix-struct-return.c:8
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc-unknown-linux \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX

Do you mean to check AIX or SVR4?



Comment at: clang/test/CodeGen/ppc32-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck 
%s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];

Minor comment:
Would `PPC32SVR4` compared to `PPC32` make the checking content clearer since 
PPC32 actually includes AIX target?



Comment at: clang/test/CodeGen/ppc64-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | 
FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];

Same comment as above.
s/PPC64/PPC64SVR4?


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-12 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4684
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

jasonliu wrote:
> Xiangling_L wrote:
> > I noticed that in patch https://reviews.llvm.org/D76360, Zarko added a 
> > check to emit an error for using this option within cc1. But in your patch, 
> > this option only emit error when invoked by the driver. Does that mean we 
> > are pretty sure this option is doing what we want on AIX?
> Are you able to set this CodeGen option when it is disabled in the 
> Frontend/CompilerInvocation.cpp?
I would say if you disable it in this function 
`PPC32TargetCodeGenInfo::isStructReturnInRegABI`, neither driver and FE can 
invoke it. However, in your patch, the option is disabled only in the driver, 
that means you can still invoke it with clang_cc1.



Comment at: clang/test/CodeGen/aix-vector.c:11
+}
+

Please remove the extra blank line


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-05-13 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 263843.
Xiangling_L added a comment.

Fix a minor issue in the testcase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74166/new/

https://reviews.llvm.org/D74166

Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*)
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*)
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -0,0 +1,16 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: fatal error: error in backend: 'init_priority' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-destructor-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+test t(1);
+
+// CHECK: fatal error: error in backend: 'destructor' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-constructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-constructor-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+int 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

jasonliu wrote:
> Xiangling_L wrote:
> > This method uses the ABI alignment of the given aggregate type which I 
> > think is not ideal due to our AIX special alignment rule. We need to use 
> > preferred alignment in this case.
> > Btw also I think it's not necessary for you to rebase your patch on the 
> > power alignment patch, I can refresh the testcase when I am dealing with 
> > that one.
> As it is right now in master, there is no difference between natural 
> alignment and preferred alignment for AIX. The tentative direction is to use 
> preferred alignment to record the actual alignment on AIX, but it is not 
> finalized yet. I would rather leave this part of the work for the patch 
> that's going to implement the power alignment rule for AIX.
`getNaturalAlignIndirect` uses ABI align which is for sure not correct on AIX 
target for Aggregate types. What we want is the actual alignment here.

So I am not sure if we want to take `getNaturalAlignIndirect` for granted even 
if we know it's not correct semantically.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

Xiangling_L wrote:
> jasonliu wrote:
> > Xiangling_L wrote:
> > > This method uses the ABI alignment of the given aggregate type which I 
> > > think is not ideal due to our AIX special alignment rule. We need to use 
> > > preferred alignment in this case.
> > > Btw also I think it's not necessary for you to rebase your patch on the 
> > > power alignment patch, I can refresh the testcase when I am dealing with 
> > > that one.
> > As it is right now in master, there is no difference between natural 
> > alignment and preferred alignment for AIX. The tentative direction is to 
> > use preferred alignment to record the actual alignment on AIX, but it is 
> > not finalized yet. I would rather leave this part of the work for the patch 
> > that's going to implement the power alignment rule for AIX.
> `getNaturalAlignIndirect` uses ABI align which is for sure not correct on AIX 
> target for Aggregate types. What we want is the actual alignment here.
> 
> So I am not sure if we want to take `getNaturalAlignIndirect` for granted 
> even if we know it's not correct semantically.
Comment update:
For the power alignment patch, after some investigation, to test IR alignment 
value for struct as argument and return type, it should base on this ABI patch. 

So I agree that we can rely on power alignment patch later to update this part.


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[PATCH] D79719: [AIX] Implement AIX special alignment rule about double/long double

2020-05-11 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, sfertile, 
cebowleratibm.
Xiangling_L added a project: LLVM.
Herald added subscribers: cfe-commits, kbarton, nemanjai.
Herald added a project: clang.

Implement AIX special alignment rule by recursively checking if the
'real' first member is a double/long double. If yes, then this member
should be naturally aligned to 8 rather than 4.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D79719

Files:
  clang/include/clang/AST/ASTContext.h
  clang/include/clang/AST/RecordLayout.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/AST/RecordLayout.cpp
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Basic/Targets/PPC.h
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-no-unique-address-with-double.cpp
  clang/test/Layout/aix-virtual-function-and-base-with-double.cpp

Index: clang/test/Layout/aix-virtual-function-and-base-with-double.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-virtual-function-and-base-with-double.cpp
@@ -0,0 +1,112 @@
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck \
+// RUN: --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc64-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | FileCheck \
+// RUN: --check-prefixes=CHECK,CHECK64 %s
+
+namespace test1 {
+struct A {
+  double d1;
+  virtual void boo() {}
+};
+
+struct B {
+  double d2;
+  A a;
+};
+
+struct C : public A {
+  double d3;
+};
+
+int i = sizeof(B);
+int j = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:0 | struct test1::A
+// CHECK-NEXT:0 |   (A vtable pointer)
+// CHECK32-NEXT:  4 |   double d1
+// CHECK32-NEXT:| [sizeof=12, dsize=12, align=4,
+// CHECK32-NEXT:|  nvsize=12, nvalign=4]
+// CHECK64-NEXT:  8 |   double d1
+// CHECK64-NEXT:| [sizeof=16, dsize=16, align=8,
+// CHECK64-NEXT:|  nvsize=16, nvalign=8]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:0 | struct test1::B
+// CHECK-NEXT:0 |   double d2
+// CHECK-NEXT:8 |   struct test1::A a
+// CHECK-NEXT:8 | (A vtable pointer)
+// CHECK32-NEXT: 12 | double d1
+// CHECK32-NEXT:| [sizeof=24, dsize=20, align=8,
+// CHECK32-NEXT:|  nvsize=20, nvalign=8]
+// CHECK64-NEXT: 16 | double d1
+// CHECK64-NEXT:| [sizeof=24, dsize=24, align=8,
+// CHECK64-NEXT:|  nvsize=24, nvalign=8]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:0 | struct test1::C
+// CHECK-NEXT:0 |   struct test1::A (primary base)
+// CHECK-NEXT:0 | (A vtable pointer)
+// CHECK32-NEXT:  4 | double d1
+// CHECK32-NEXT: 12 |   double d3
+// CHECK32-NEXT:| [sizeof=20, dsize=20, align=4,
+// CHECK32-NEXT:|  nvsize=20, nvalign=4]
+// CHECK64-NEXT:  8 | double d1
+// CHECK64-NEXT: 16 |   double d3
+// CHECK64-NEXT:| [sizeof=24, dsize=24, align=8,
+// CHECK64-NEXT:|  nvsize=24, nvalign=8]
+
+}; // namespace test1
+
+namespace test2 {
+struct A {
+  long long l1;
+};
+
+struct B : public virtual A {
+  double d2;
+};
+
+#pragma pack(2)
+struct C : public virtual A {
+  double __attribute__((aligned(4))) d3;
+};
+
+int i = sizeof(B);
+int j = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:0 | struct test2::A
+// CHECK-NEXT:0 |   long long l1
+// CHECK-NEXT:  | [sizeof=8, dsize=8, align=8,
+// CHECK-NEXT:  |  nvsize=8, nvalign=8]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:0 | struct test2::B
+// CHECK-NEXT:0 |   (B vtable pointer)
+// CHECK32-NEXT:  4 |   double d2
+// CHECK64-NEXT:  8 |   double d2
+// CHECK-NEXT:   16 |   struct test2::A (virtual base)
+// CHECK-NEXT:   16 | long long l1
+// CHECK-NEXT:  | [sizeof=24, dsize=24, align=8,
+// CHECK32-NEXT:|  nvsize=12, nvalign=4]
+// CHECK64-NEXT:|  nvsize=16, nvalign=8]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:0 | struct test2::C
+// CHECK-NEXT:0 |   (C vtable pointer)
+// CHECK32-NEXT:  4 |   double d3
+// CHECK32-NEXT: 12 |   struct test2::A (virtual base)
+// CHECK32-NEXT: 12 | long long l1
+// CHECK32-NEXT:| [sizeof=20, dsize=20, align=2,
+// CHECK32-NEXT:|  nvsize=12, nvalign=2]
+// CHECK64-NEXT:  8 |   double d3
+// CHECK64-NEXT: 16 |   struct test2::A (virtual base)
+// CHECK64-NEXT: 16 | long long l1
+// CHECK64-NEXT: 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-13 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1300
   OPT_maix_struct_return, OPT_msvr4_struct_return)) {
+// TODO: We might want to consider enabling these options on AIX in the
+// future.

Since we disable them in FE, should we remove the one in driver?



Comment at: clang/test/Frontend/aix-unsupported.c:10
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option

One thing I am not so sure about is that for these two options 
`-maix-struct-return`,  `-msvr4-struct-return`, do we need to update the 
`ClangCommandLineReference.rst` since we emit diags `unsupported option 
'-maix-struct-return' for target 'powerpc-unknown-aix'`


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-05-14 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 264009.
Xiangling_L added a comment.

Clean `clang-tidy` warnings and `clang-format` errors


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*)
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*)
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -0,0 +1,16 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+class test {
+  int a;
+public:
+  test(int c) {a = c;}
+  ~test() {a = 0;}
+};
+
+__attribute__((init_priority(2000)))
+test t(1);
+
+// CHECK: fatal error: error in backend: 'init_priority' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-destructor-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+int bar() __attribute__((destructor(180)));
+
+class test {
+  int a;
+public:
+  test(int c) {a = c;}
+  ~test() {a = 0;}
+};
+
+test t(1);
+
+// CHECK: fatal error: error in backend: 'destructor' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-constructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-constructor-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-14 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L accepted this revision.
Xiangling_L added a comment.
This revision is now accepted and ready to land.

LGTM with a minor comment:
You may want to add a `TODO` or `FIXME` at `clang/lib/CodeGen/TargetInfo.cpp: 
4496` and `clang/lib/CodeGen/TargetInfo.cpp:4418` like:

  //FIXME:
  Correct the aggregate type alignment when it contains a double/long double as 
its first member.


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-05-12 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 7 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/CGDeclCXX.cpp:691
   AddGlobalDtor(Fn);
+  CXXGlobalDtors.clear();
 }

ZarkoCA wrote:
> I may be missing something but why do we need this now, as opposed to not 
> needing it before? Why didn't we need to clear the CXXGlobalDtors after 
> emitting the function function before?
No, you didn't miss anything here. I just followed what 
`EmitCXXGlobalInitFunc()` does, which is to clear the std::vecotr once we are 
certain it's useless.



Comment at: clang/lib/Sema/SemaDeclAttr.cpp:6898
   case ParsedAttr::AT_Constructor:
-handleConstructorAttr(S, D, AL);
+if (S.Context.getTargetInfo().getTriple().isOSAIX())
+  S.Diag(AL.getLoc(), diag::warn_attribute_type_not_supported) << AL << "";

aaron.ballman wrote:
> This change (and the others like it) should be done within Attr.td and not 
> exposed here. You should make these attributes target-specific.
> 
> You should also update AttrDocs.td for these attributes to document that 
> they're not supported on AIX.
Thanks for your comments. As I mentioned in the below testcase, those three 
attributes actually will be supported by the follow-up patches for AIX.  I will 
update them to `report_fatal_error` instead.



Comment at: clang/test/CodeGen/aix-priority-attribute.cpp:1-4
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 | 
\
+// RUN: FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s 2>&1 
| \
+// RUN: FileCheck %s

aaron.ballman wrote:
> I think this test file should live in SemaCXX instead, as this is not testing 
> the codegen behavior, but testing the semantic checking behavior.
Actually we will support those three attributes in the future, so the warning 
are placeholders waiting for the future upgrade where we do want to check the 
codegen results. 

I agree the warnings here are confusing, I will update them with 
report_fatal_error.


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-05-12 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 263499.
Xiangling_L marked 3 inline comments as done.
Xiangling_L added a comment.

Updated the warnings to `report_fatal_error`;
Update the testcases;


Repository:
  rL LLVM

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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd, i8* null }]
+// CHECK: define dso_local void @__cxx_global_var_init() {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__dtor_t() {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*)
+
+// CHECK: define dso_local void @__cxx_global_var_destruct_t() {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*)
+
+// CHECK: define dso_local void @__sinit8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_b2e4830f1c9d2d063e5ea946868f3bfd() {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -0,0 +1,16 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+__attribute__ ((init_priority (2000)))
+test t(1);
+
+// CHECK: fatal error: error in backend: 'init_priority' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-destructor-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+int bar() __attribute__((destructor(180)));
+
+class test {
+   int a;
+public:
+test(int c) {a = c;}
+~test() {a = 0;}
+};
+
+test t(1);
+
+// CHECK: fatal error: error in backend: 'destructor' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-constructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-constructor-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:1547
 
   // Otherwise, if the type contains an SSE vector type, the alignment is 16.
+  if (Align >= 16 && (isSIMDVectorType(getContext(), Ty) ||

Also update the comment?



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4365
+
+  Ty = useFirstFieldIfTransparentUnion(Ty);
+

As in doc says [[ 
https://www.ibm.com/support/knowledgecenter/SSGH2K_13.1.0/com.ibm.xlc131.aix.doc/language_ref/type_attr_transp_union.html
 | The transparent_union type attribute ]]:
 `float _Complex, double _Complex or vector types can be members of a 
transparent union, but they cannot be the first member. `  That means the first 
field still could be something like Integral Complex etc., which falls into the 
category `isAnyComplexType`.

So I guess `Ty = useFirstFieldIfTransparentUnion(Ty);` should be at the first 
line.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4374
+CharUnits ABIAlign = getParamTypeAlignment(Ty);
+CharUnits TyAlign = getContext().getTypeAlignInChars(Ty);
+

If we want to be consistent with other part of alignment implementation, 
`getContext().getTypeAlignInChars(Ty)` gives `ABIAlign`. I would suggest we 
name `ABIAlign` here to something like `CCAlign` or `ArgumentAlign`.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4684
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

I noticed that in patch https://reviews.llvm.org/D76360, Zarko added a check to 
emit an error for using this option within cc1. But in your patch, this option 
only emit error when invoked by the driver. Does that mean we are pretty sure 
this option is doing what we want on AIX?


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[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-05-19 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 264926.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Fix the linkage types;
Adjust the formatting;
Update the testcase;


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_6a64b8be19fb12e74feab8a7a858f83b, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_6a64b8be19fb12e74feab8a7a858f83b, i8* null }]
+// CHECK: define internal void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*)
+
+// CHECK: define internal void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*)
+
+// CHECK: define dso_local void @__sinit8000_clang_6a64b8be19fb12e74feab8a7a858f83b() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_6a64b8be19fb12e74feab8a7a858f83b() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+class test {
+  int a;
+
+public:
+  test(int c) { a = c; }
+  ~test() { a = 0; }
+};
+
+__attribute__((init_priority(2000)))
+test t(1);
+
+// CHECK: fatal error: error in backend: 'init_priority' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-destructor-attribute.cpp
@@ -0,0 +1,18 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+int bar() __attribute__((destructor(180)));
+
+class test {
+  int a;
+
+public:
+  test(int c) { a = c; }
+  ~test() { a = 0; }
+};
+
+test t(1);
+
+// CHECK: fatal error: error in backend: 'destructor' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-constructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-constructor-attribute.cpp
@@ -0,0 +1,18 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple 

[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-03 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

ping.


Repository:
  rG LLVM Github Monorepo

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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-09-02 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: jasonliu, hubert.reinterpretcast.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

1.[bool, char, short] bitfields have the same alignment as unsigned int
2.Adjust alignment on typedef field decls/honor align attribute
3.Fix alignment for scoped enum class
4.Long long bitfield has 4bytes alignment and StorageUnitSize under 32 bit 
compile mode
5.Emit error for oversized bitfield under 32bit mode


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D87029

Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/test/Layout/aix-bitfield-alignment.cpp
  clang/test/Layout/aix-oversized-bitfield.cpp

Index: clang/test/Layout/aix-oversized-bitfield.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-oversized-bitfield.cpp
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+struct A
+{
+long long l : 64; // expected-error{{width of bit-field 'l' (64 bits) exceeds size of its type (32 bits)}}
+};
+
+int a = sizeof(A);
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct A
+// CHECK64-NEXT: 0:0-63 |   long long l
+// CHECK64-NEXT:| [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64-NEXT:|  nvsize=8, nvalign=8, preferrednvalign=8]
Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,94 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only  -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:  0:3-4 |   unsigned char c
+// CHECK-NEXT: 0:5-10 |   unsigned short s
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int 
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:   | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:   |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:   | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:   |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+typedef __attribute__((aligned(32))) short mySHORT;
+struct D {
+  char c : 8;
+  mySHORT : 0;
+};
+
+int d = sizeof(D);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct D
+// CHECK-NEXT:  0:0-7 |   char c
+// CHECK-NEXT:   32:- |   mySHORT
+// CHECK-NEXT:| [sizeof=32, dsize=32, align=32, preferredalign=32,
+// CHECK-NEXT:|  nvsize=32, nvalign=32, preferrednvalign=32]
+
+enum class Bool : bool { False = 0,
+ True = 1 };
+
+struct E {
+  Bool b : 1;
+};
+
+int e = sizeof(E);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct E
+// CHECK-NEXT:  0:0-0 |   enum Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -16443,7 +16443,22 @@
 

[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-08 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

In D86790#2255371 , @jyknight wrote:

> Do you have open questions on whether some callsites passing "false" here, 
> should be switched to true? Given what's here, I would say that it definitely 
> does not makes sense to add this parameter everywhere.

Basically, the places where I changed to `true /* NeedsPreferredAlignment */` 
are ones I'd like reviewers to see if the switch is correct.




Comment at: clang/lib/CodeGen/CGAtomic.cpp:814
+  std::tie(sizeChars, alignChars) = getContext().getTypeInfoInChars(
+  AtomicTy, true /* NeedsPreferredAlignment */);
   uint64_t Size = sizeChars.getQuantity();

jyknight wrote:
> This is wrong.
Can you explain a bit why it's wrong?


Repository:
  rG LLVM Github Monorepo

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[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

2020-09-15 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: jasonliu, hubert.reinterpretcast, efriedma, 
jyknight, rnk, rsmith, aaron.ballman.
Herald added subscribers: cfe-commits, dang.
Herald added a project: clang.
Xiangling_L requested review of this revision.

1. Implementing the natural align for AIX
2. Sort out pragma pack stack effect
3. Add -faix-pragma-stack option to enable AIX pragma stack effect


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Serialization/ASTReader.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,212 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

2020-09-15 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 291950.
Xiangling_L added a comment.

Removed redundant header file include;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,212 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test5
+
+namespace test6 {
+#pragma align(natural)
+#pragma pack(0)// expected-error {{expected #pragma pack parameter to be '1', 

[PATCH] D89064: [AIX] Disable two itanium alignment LIT testcases

2020-10-08 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: daltenty, hubert.reinterpretcast, stevewan.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

AIX has different layout dumping format from other itanium abis.
And for these two cases, AIX already/will create AIX version.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D89064

Files:
  clang/test/Layout/itanium-pack-and-align.cpp
  clang/test/Layout/itanium-union-bitfield.cpp


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -emit-llvm-only -triple %itanium_abi_triple 
-fdump-record-layouts %s 2>/dev/null \
 // RUN:| FileCheck %s
 
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm-only 
-fdump-record-layouts %s \
 // RUN:| FileCheck %s
 


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -emit-llvm-only -triple %itanium_abi_triple -fdump-record-layouts %s 2>/dev/null \
 // RUN:| FileCheck %s
 
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -1,3 +1,4 @@
+// UNSUPPORTED: aix
 // RUN: %clang_cc1 -triple %itanium_abi_triple -emit-llvm-only -fdump-record-layouts %s \
 // RUN:| FileCheck %s
 
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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-10-08 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 296972.
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

Remove emit errors for oversized long long bitfield and related testcase;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87029/new/

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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/test/Layout/aix-bitfield-alignment.cpp

Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,217 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:  0:3-4 |   unsigned char c
+// CHECK-NEXT: 0:5-10 |   unsigned short s
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:   | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:   |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:   | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:   |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:| [sizeof=5, dsize=5, align=1, preferredalign=1,
+// CHECK-NEXT:|  nvsize=5, nvalign=1, preferrednvalign=1]
+
+#pragma pack(4)
+struct C2 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma pack(pop)
+
+int c2 = sizeof(C2);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C2
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=4]
+
+typedef __attribute__((aligned(32))) short mySHORT;
+struct D {
+  char c : 8;
+  mySHORT : 0;
+};
+
+int d = sizeof(D);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct D
+// CHECK-NEXT:  0:0-7 |   char c
+// CHECK-NEXT:   32:- |   mySHORT
+// CHECK-NEXT:| [sizeof=32, dsize=32, align=32, preferredalign=32,
+// CHECK-NEXT:|  nvsize=32, nvalign=32, preferrednvalign=32]
+
+typedef __attribute__((aligned(32))) long myLONG;
+struct D1 {
+  char c : 8;
+  myLONG : 0;
+};
+
+int d1 = sizeof(D1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct D1
+// CHECK-NEXT:  0:0-7 |   char c
+// CHECK-NEXT:   32:- |   myLONG
+// 

[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-10-07 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked an inline comment as done.
Xiangling_L added inline comments.



Comment at: clang/lib/Sema/SemaDecl.cpp:16447
+
+bool AIXBitfieldViolation = false;
+if (const BuiltinType *BTy = FieldTy.getTypePtr()->getAs()) {

sfertile wrote:
> Xiangling_L wrote:
> > sfertile wrote:
> > > Can  this change can be split out into its own patch? If it can i would 
> > > suggest doing so.
> > I was expecting our buildbot can pick up all bitfield related changes at 
> > one time. Also if we split this out, that means we either need to wait for 
> > this second part to land first or need to add more LIT to oversized long 
> > long to the first part, which then needs to be removed whenever this second 
> > part land. It seems we are complicating the patch. Can you give me your 
> > rationale about why we want to split out this part?
> > I was expecting our buildbot can pick up all bitfield related changes at 
> > one time.
> IIUC `clang/test/Layout/aix-oversized-bitfield.cpp` works with just this 
> change and isn't dependent on D87702. Its disjoint from the other changes in 
> this patch, and packaging it into a commit with unrelated changes even if 
> they are on the same theme is not beneficial. Its better to have those run 
> through the build bot (or be bisectable) as distinct changes.
> 
> > Also if we split this out, that means we either need to wait for this 
> > second part to land first or need to add more LIT to oversized long long to 
> > the first part, which then needs to be removed whenever this second part 
> > land.  It seems we are complicating the patch.
> 
> I don't understand why it would need to wait or require extra testing to be 
> added. Its a diagnostic and your lit test shows the error for 32-bit (where 
> we want it emitted)  and expected layout for 64-bit. The whole point of 
> splitting it out is that its simple,does exactly one thing, is testable on 
> its own,  and we don't need the context of the other changes packaged with it 
> to properly review it. I am asking to split it out because I see it as making 
> this easier to review and commit.
Sure, I will split this patch into two as you suggested. By `either need to 
wait for this second part to land first or need to add more LIT `, I thought we 
would like to also add test coverage and later remove it for oversize bitfield. 
Since `StorageUnitSize > 32 && 
Context.getTargetInfo().getTriple().isArch32Bit()` does affect how oversize 
bitfield get laid out on AIX. But I guess it's more convenient to just split 
this patch as you suggested.


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[PATCH] D89064: [AIX] Support two itanium alignment LIT testcases for AIX using regex

2020-10-13 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4c10d6508f54: [AIX] Support two itanium alignment LIT 
testcases for AIX using regex (authored by Xiangling_L).

Changed prior to commit:
  https://reviews.llvm.org/D89064?vs=297848=297950#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89064/new/

https://reviews.llvm.org/D89064

Files:
  clang/test/Layout/itanium-pack-and-align.cpp
  clang/test/Layout/itanium-union-bitfield.cpp


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)?}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)?}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)?}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)?}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)?}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)?}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)?}}]
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[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

2020-10-13 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 8 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/include/clang/Basic/LangOptions.def:340
 
+LANGOPT(AIXPragmaPack, 1, 0, "AIX #pragma pack handling")
+

jasonliu wrote:
> Not sure if AIXPragmaPack is the best name here. 
> It's more like IBM xl pragma pack handling on AIX.
> Would it be better if we name it `XLPragmaPackOnAIX`?
Just a record of the offline discussion: `XLPragmaPack` is sufficient here, 
following the convention of how we named our C++ ABI on AIX as XLABI.



Comment at: clang/include/clang/Sema/Sema.h:493
+  PackNumber(M == Packed ? 1
+ : (M == Mac68k ? Mac68kAlignmentSentinel
+: UninitPackVal)),

jasonliu wrote:
> I think one of the idea is to use `enum Mode::Mac68k` to replace the need of 
> Mac68kAlignmentSentinel.
> Is there any reason that you would still need PackNumber to contain 
> `Mac68kAlignmentSentinel`?
AIX and other targets have different ways to compare if two `CurrentValue` 
equal. Other targets use only `PackNumber ` while AIX use both align mode and 
PackNumber. So this sentinel `Mac68kAlignmentSentinel` is added to support this.



Comment at: clang/include/clang/Sema/Sema.h:515
+bool operator==(AlignPackInfo Info) const {
+  return AlignMode == Info.AlignMode && PackNumber == Info.PackNumber;
+}

jasonliu wrote:
> Xiangling_L wrote:
> > jasonliu wrote:
> > > This could return true when `PackAttr` in AlignPackInfo are not the same. 
> > > Wouldn't that cause an issue?
> > (1) You mean we have two `AlignPackInfo` with same AlignMode and 
> > PackNumber, but one is PackAttr and the other one is AlignAttr?
> > The example I can think of is:
> > 
> > 
> > ```
> > a)#pragma align(packed)
> >   #pragma pack(1)   //AlignMode = Packed, PackNumber = 1
> > 
> > b) #pragma align(packed)  //AlignMode = Packed, PackNumber = 1
> > ```
> > 
> > But I don't think we have any issue in this case. Before and after my 
> > patch, a == b.
> > Please let me know any other cases concerning you if any.
> > 
> > (2) However, your concerns leads me to think of another case, where 
> > behavior changes with my patch.
> > 
> > ```
> > a) 
> > #pragma align(natural)
> > #pragma pack(1)   /AlignMode = Native,  PackNumber = 1
> > 
> > b)
> > #pragma align(packed) ///AlignMode = Packed, PackNumber = 1
> > 
> > ```
> > Without this patch, a == b for other targets.
> > And I suppose a != b for AIX.
> > 
> In your first example, if I understand correctly,
> a) would return true for IsPackAttr()
> b) would return false for IsPackAttr()
> and yet a == b ?
> I think that's confusing. 
> 
> Any reason why you don't want to just compare all the data members to make 
> sure they are all equal?
Yes, it's confusing but your understanding is correct. For other targets, they 
actually only use `PackNumber` to compare if two CurrentValue equal.



Comment at: clang/lib/Sema/SemaAttr.cpp:367
+  // AIX pragma pack does not support identifier syntax.
+  if (getLangOpts().AIXPragmaPack && !SlotLabel.empty()) {
+Diag(PragmaLoc, diag::warn_pragma_pack_identifer_not_supported);

jasonliu wrote:
> Although IBM xl compiler does not support this form, do we see a harm for us 
> to support this form in clang on AIX?
> Also, if this is indeed not desired to support, we could move this check to 
> the top of this function for an early return. 
We may consider supporting this form in the future, but I don't think we need 
to cover it in this patch. And we don't support it by passing `StringRef()` 
instead, so we still need to wait for a `Info` constructed for us.



Comment at: clang/lib/Sema/SemaAttr.cpp:403
   // Warn about modified alignment after #includes.
   if (PrevPackState.CurrentValue != PackStack.CurrentValue) {
 Diag(IncludeLoc, diag::warn_pragma_pack_modified_after_include);

jasonliu wrote:
> Xiangling_L wrote:
> > jasonliu wrote:
> > > Since we changed the PackStack for it to contain AlignPackInfo instead of 
> > > unsigned. 
> > > This stack no longer only contains Pack information. So we need to 
> > > rethink about how this diagnostic and the one follows should work.
> > > i.e. What's the purpose of these diagnostic? Is it still only for pragma 
> > > pack report? If so, what we are doing here is not correct, since the 
> > > `CurrentValue` could be different, not because of the pragma pack change, 
> > > but because of the pragma align change.
> > > If it's not only for pragma pack any more, but also intend to detect the 
> > > pragma align interaction, then possibly function name and diagnostic 
> > > needs some modification, as they don't match the intent any more.
> > Thanks for pointing this out. I agree that what we are doing here is not 
> > correct. 
> > The original 

[PATCH] D88659: [FE]Split SuitableAlign into two parts

2020-10-15 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

ping.


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[PATCH] D88676: [PPC][AIX] Add vector callee saved registers for AIX extended vector ABI and add clang and llvm option

2020-10-15 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

I am wondering can we split the option related changes to a separate patch for 
reviews? That would make current patch a bit easier to review and faster to be 
committed as two small pieces.

If it's possible, I am thinking we can try to split it up to the following two 
pieces:

1. Add option in the frontend and backend to be able to turn on extended vector 
ABI
2. Do the frame lowing in the backend




Comment at: clang/docs/ClangCommandLineReference.rst:2868
 
+Specify usage of volatile and nonvolatile vector registers, the extended 
vector ABI on AIX (AIX only).  The default AIX vector ABI is not yet supported. 
+

1. I am not sure if it's a good idea to put the supporting status also in the 
option description here. It looks a bit strange to me.

2. I would suggest something similar like this for the option description:


```
Only supported on AIX. Specifies whether to use both volatile and nonvolatile 
vector registers or volatile vector registers only. Defaults to `-mnovecnvol` 
when Altivec is enabled. 
```

3. We missed a `-` before `mnovecnvol`.



Comment at: clang/include/clang/Basic/DiagnosticDriverKinds.td:531
+def err_aix_default_altivec_abi : Error<
+  "The default Altivec ABI on AIX is not yet supported, use the extended ABI 
option '-mvecnvol'">;
+

I would suggest:

```
The default Altivec ABI on AIX is not yet supported, use '-mvecnvol' for the 
extended Altivec ABI 
```



Comment at: clang/test/CodeGen/altivec.c:1
 // RUN: %clang_cc1 -target-feature +altivec -triple powerpc-unknown-unknown 
-emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -target-feature +altivec -mvecnvol -triple 
powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s

Can we also test how the driver react to these two options? It would serve as 
the LIT coverage for the code change in `clang/lib/Driver/ToolChains/Clang.cpp`.



Comment at: llvm/include/llvm/Target/TargetOptions.h:177
+/// volatile vector registers which is the default setting on AIX.
+unsigned AIXExtendedAltivecABI = 0;
+

Can we also use bitfield to indicate true and false here? The default value set 
to be `false` in ctor already, so we don't need assign `0` to it here.

```
unsigned AIXExtendedAltivecABI : 1;
```


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[PATCH] D88659: [FE]Split SuitableAlign into two parts

2020-10-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

In D88659#2306403 , @jyknight wrote:

> Hm, to start with, the current state of this confuses me.
>
> In GCC, the preprocessor macro `__BIGGEST_ALIGNMENT__` was supposed to expose 
> the alignment used by `__attribute__((aligned))` (no arg specified), as well 
> the alignment used for alloca. However, this is no longer the case on x86: 
> `BIGGEST_ALIGNMENT` is 512bits with avx-512 enabled, 256bits with avx 
> enabled, and otherwise 128bits. Alloca follows this too. But, 
> `__attribute__((aligned))` was fixed at 128bit alignment, regardless of AVX 
> being enabled, in order to not break ABI compatibility with structs using 
> that. On other architectures, the 3 values seem to be always the same.
>
> In clang, we similarly have (before this patch) both 
> DefaultAlignForAttributeAligned (used for ``attribute((aligned))`), and 
> SuitableAlign (used for the predefined `__BIGGEST_ALIGNMENT__` and alignment 
> for alloca). But these values are different on very many 
> architectures...which I think is probably wrong. Furthermore, SuitableAlign 
> isn't being adjusted to be suitable for vectors, like it is in gcc, which 
> _also_ seems wrong. Looks like there's actually an earlier patch to fix that 
> which was never merged: https://reviews.llvm.org/D39313
>
> So, anyways -- back to this patch: On AIX PPC, you want alloca to align to 
> 128bits, `__attribute__((aligned))` to align to 128bits (aka 8 bytes), but 
> `__BIGGEST_ALIGNMENT__` to only be 4?
>
> That seems pretty weird, and probably wrong?

As you mentioned, without this patch, `SuitableAlign` is used for the 
predefined `__BIGGEST_ALIGNMENT__` and alignment for alloca. But on AIX, the 
__BIGGEST_ALIGNMENT__ should be 8bytes,  alloca and `__attribute__((aligned))`  
should align to 16bytes considering vector types which have to be aligned to 
16bytes, that's why we want to split `SuitableAlign`.


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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-10-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/Sema/SemaDecl.cpp:16447
+
+bool AIXBitfieldViolation = false;
+if (const BuiltinType *BTy = FieldTy.getTypePtr()->getAs()) {

sfertile wrote:
> Can  this change can be split out into its own patch? If it can i would 
> suggest doing so.
I was expecting our buildbot can pick up all bitfield related changes at one 
time. Also if we split this out, that means we either need to wait for this 
second part to land first or need to add more LIT to oversized long long to the 
first part, which then needs to be removed whenever this second part land. It 
seems we are complicating the patch. Can you give me your rationale about why 
we want to split out this part?


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[PATCH] D89684: [AIX] Add mvecnvol and mnovecnvol options to enable the AIX extended and default vector ABIs.

2020-10-19 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/docs/ClangCommandLineReference.rst:2868
 
+Only supported On AIX. Specify usage of volatile and nonvolatile vector 
registers, the extended vector ABI on AIX. Defaults to '-mnovecnvol' when 
Altivec is enabled.
+

s/On/on;




Comment at: clang/lib/CodeGen/BackendUtil.cpp:532
   Options.EmitCallSiteInfo = CodeGenOpts.EmitCallSiteInfo;
+  Options.AIXExtendedAltivecABI = CodeGenOpts.AIXExtendedAltivecABI;
   Options.ValueTrackingVariableLocations =

The ABI specifies `When the option to use nonvolatile vector registers is 
enalbed. the compilation environment must also predefine __EXTABI__`. I didn't 
see this. Should we also cover this in this patch?



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4571
   }
 
+  if (Arg *A =

On clang, when we do: 
`clang -target powerpc-ibm-aix-xcoff -maltivec -S -emit-llvm test_faltivec.c`,  
clang driver passes `-target-cpu pwr4` as default arch to frontend without 
issuing any error.

However, with XL, we have: 
`"-qaltivec" is not compatible with "-qarch=pwr4". "-qnoaltivec" is being set.` 
 The same error will be issued if `pwr5` is used as well. 

So I suppose for AIX in clang, when user use `-maltivec` without specifying 
arch level, we can do:
1)  by default pass `-target-cpu pwr6` to frontend 
or  2) issue error for "-qarch=pwr4"+ enable altivec
or 3) issue error for `-qacrh = pwr4` + diable altivec like XL does?

Also we should emit error when user use `-maltivec` with -mcpu=pwr5.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4579
+
+bool haveMaltivec = false;
+

I would suggest `s/haveMaltivec/HasAltivec` to be consistent with other places 
where if altivec enabled is tested.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4581
+
+for (const Arg *A : Args) {
+  auto optID = A->getOption().getID();

Any reason why we cannot use `Args.getLastArg` here for `OPT_maltivec` as well?



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4591
+
+if (A->getOption().matches(options::OPT_mnovecnvol) && haveMaltivec)
+  D.Diag(diag::err_aix_default_altivec_abi);

Since we are defaulting to default altivec ABI, so I think the logic here 
should be if (HasAltivec && !Args.getLastArg(options::OPT_mvecnvol)), then we 
emit `D.Diag(diag::err_aix_default_altivec_abi)` error?



Comment at: clang/test/CodeGen/altivec.c:53
 }
+
+// AIX-ERROR:  error: The default Altivec ABI on AIX is not yet supported, use 
'-mvecnvol' for the extended Altivec ABI

Could we also add a testcase to test `-mvecnvol/-mnovecnvol` are AIX only 
options?


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[PATCH] D88659: [FE]Split SuitableAlign into two parts

2020-10-19 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

Hi @jyknight , are you okay with us changing the "definition" of SuitableAlign 
without sending a note to the mailing list?


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[PATCH] D89064: [AIX] Disable two itanium alignment LIT testcases

2020-10-09 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added a comment.

In D89064#2320133 , 
@hubert.reinterpretcast wrote:

> Can we use a regex to make this also work in AIX?

Sure we can also do that. May I ask is that because we prefer letting AIX 
support as many LIT testcases as possible?


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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-10-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 296497.
Xiangling_L marked 4 inline comments as done.
Xiangling_L added a comment.

- Fixed the bug of getting underlying type of enum;
- Fixed the bug to respect align attribute;
- Add more testcases;


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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/test/Layout/aix-bitfield-alignment.cpp
  clang/test/Layout/aix-oversized-bitfield.cpp

Index: clang/test/Layout/aix-oversized-bitfield.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-oversized-bitfield.cpp
@@ -0,0 +1,21 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify -x c++ %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+struct A {
+  long long l : 64; // expected-error{{width of bit-field 'l' (64 bits) exceeds size of its type (32 bits)}}
+};
+
+int a = sizeof(A);
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct A
+// CHECK64-NEXT: 0:0-63 |   long long l
+// CHECK64-NEXT:| [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64-NEXT:|  nvsize=8, nvalign=8, preferrednvalign=8]
Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,217 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:  0:3-4 |   unsigned char c
+// CHECK-NEXT: 0:5-10 |   unsigned short s
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:   | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:   |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:   | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:   |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:| [sizeof=5, dsize=5, align=1, preferredalign=1,
+// CHECK-NEXT:|  nvsize=5, nvalign=1, preferrednvalign=1]
+
+#pragma pack(4)
+struct C2 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma pack(pop)
+
+int c2 = 

[PATCH] D89064: [AIX] Disable two itanium alignment LIT testcases

2020-10-13 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 297848.
Xiangling_L added a comment.

Use regex to match AIX layout dumping format.


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Files:
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  clang/test/Layout/itanium-union-bitfield.cpp


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)*}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)*}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( 
preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]


Index: clang/test/Layout/itanium-union-bitfield.cpp
===
--- clang/test/Layout/itanium-union-bitfield.cpp
+++ clang/test/Layout/itanium-union-bitfield.cpp
@@ -18,12 +18,11 @@
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT: 0 | union A
 // CHECK-NEXT: 0:0-2 |   int f1
-// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4
-// CHECK-NEXT:   |  nvsize=1, nvalign=4]
+// CHECK-NEXT:   | [sizeof=4, dsize=1, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:   |  nvsize=1, nvalign=4{{(, preferrednvalign=4)*}}]
 
 // CHECK:*** Dumping AST Record Layout
 // CHECK-NEXT:  0 | union B
 // CHECK-NEXT: 0:0-34 |   char f1
-// CHECK-NEXT:| [sizeof=8, dsize=5, align=4
-// CHECK-NEXT:|  nvsize=5, nvalign=4]
-
+// CHECK-NEXT:| [sizeof=8, dsize=5, align=4{{(, preferredalign=4,)*}}
+// CHECK-NEXT:|  nvsize=5, nvalign=4{{(, preferrednvalign=4)*}}]
Index: clang/test/Layout/itanium-pack-and-align.cpp
===
--- clang/test/Layout/itanium-pack-and-align.cpp
+++ clang/test/Layout/itanium-pack-and-align.cpp
@@ -16,11 +16,11 @@
 // CHECK:  0 | struct T
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]
 
 // CHECK:  0 | struct S
 // CHECK-NEXT:  0 |   char x
 // CHECK-NEXT:  1 |   int y
-// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,
-// CHECK-NEXT:|  nvsize=8, nvalign=8]
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=8,{{( preferredalign=8,)*}}
+// CHECK-NEXT:|  nvsize=8, nvalign=8{{(, preferrednvalign=8)*}}]
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[PATCH] D89684: [AIX] Add mvecnvol and mnovecnvol options to enable the AIX extended and default vector ABIs.

2020-10-19 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.
Herald added a subscriber: dexonsmith.



Comment at: llvm/lib/CodeGen/CommandFlags.cpp:489
 Options.FloatABIType = getFloatABIForCalls();
+  Options.AIXExtendedAltivecABI = getAIXExtendedAltivecABI();
   Options.NoZerosInBSS = getDontPlaceZerosInBSS();

Should we also check `-vecnvol` option is used for AIX only somewhere?



Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6927
+  !State.getMachineFunction().getTarget().Options.AIXExtendedAltivecABI)
+report_fatal_error("the default Altivec AIX ABI is not yet supported.");
+

minor:
remove '.'



Comment at: llvm/test/CodeGen/PowerPC/aix-AppendingLinkage.ll:4
 
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff < 
\
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -vecnvol -mtriple 
powerpc64-ibm-aix-xcoff < \
 ; RUN: %s | FileCheck %s

May I ask why would we want to add -vecnvol for those testcases? As I noticed, 
they don't need altivec feature enabled.


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[PATCH] D88260: [NFC][FE] Replace TypeSize with StorageUnitSize

2020-09-24 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: jasonliu, hubert.reinterpretcast, efriedma.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

On some targets like AIX, last bitfield size is not always equal to last 
bitfield type size. Some bitfield like bool will have the same alignment as 
[unsigned]. So we'd like to use a more general term `StorageUnit` to replace 
`type` in this field.

This patch serves as a parent patch for us to add AIX bitfield related 
alignment rules in : https://reviews.llvm.org/D87029.


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Files:
  clang/lib/AST/RecordLayoutBuilder.cpp

Index: clang/lib/AST/RecordLayoutBuilder.cpp
===
--- clang/lib/AST/RecordLayoutBuilder.cpp
+++ clang/lib/AST/RecordLayoutBuilder.cpp
@@ -622,9 +622,10 @@
   /// an adjacent bitfield if necessary.  The unit in question is usually
   /// a byte, but larger units are used if IsMsStruct.
   unsigned char UnfilledBitsInLastUnit;
-  /// LastBitfieldTypeSize - If IsMsStruct, represents the size of the type
-  /// of the previous field if it was a bitfield.
-  unsigned char LastBitfieldTypeSize;
+
+  /// LastBitfieldStorageUnitSize - If IsMsStruct, represents the size of the
+  /// storage unit of the previous field if it was a bitfield.
+  unsigned char LastBitfieldStorageUnitSize;
 
   /// MaxFieldAlignment - The maximum allowed field alignment. This is set by
   /// #pragma pack.
@@ -693,7 +694,7 @@
 UnadjustedAlignment(CharUnits::One()), UseExternalLayout(false),
 InferAlignment(false), Packed(false), IsUnion(false),
 IsMac68kAlign(false), IsMsStruct(false), UnfilledBitsInLastUnit(0),
-LastBitfieldTypeSize(0), MaxFieldAlignment(CharUnits::Zero()),
+LastBitfieldStorageUnitSize(0), MaxFieldAlignment(CharUnits::Zero()),
 DataSize(0), NonVirtualSize(CharUnits::Zero()),
 NonVirtualAlignment(CharUnits::One()),
 PreferredNVAlignment(CharUnits::One()),
@@ -708,7 +709,7 @@
 
   void LayoutFields(const RecordDecl *D);
   void LayoutField(const FieldDecl *D, bool InsertExtraPadding);
-  void LayoutWideBitField(uint64_t FieldSize, uint64_t TypeSize,
+  void LayoutWideBitField(uint64_t FieldSize, uint64_t StorageUnitSize,
   bool FieldPacked, const FieldDecl *D);
   void LayoutBitField(const FieldDecl *D);
 
@@ -1451,7 +1452,7 @@
 }
 
 void ItaniumRecordLayoutBuilder::LayoutWideBitField(uint64_t FieldSize,
-uint64_t TypeSize,
+uint64_t StorageUnitSize,
 bool FieldPacked,
 const FieldDecl *D) {
   assert(Context.getLangOpts().CPlusPlus &&
@@ -1481,7 +1482,7 @@
 
   // We're not going to use any of the unfilled bits in the last byte.
   UnfilledBitsInLastUnit = 0;
-  LastBitfieldTypeSize = 0;
+  LastBitfieldStorageUnitSize = 0;
 
   uint64_t FieldOffset;
   uint64_t UnpaddedFieldOffset = getDataSizeInBits() - UnfilledBitsInLastUnit;
@@ -1520,7 +1521,7 @@
   bool FieldPacked = Packed || D->hasAttr();
   uint64_t FieldSize = D->getBitWidthValue(Context);
   TypeInfo FieldInfo = Context.getTypeInfo(D->getType());
-  uint64_t TypeSize = FieldInfo.Width;
+  uint64_t StorageUnitSize = FieldInfo.Width;
   unsigned FieldAlign = FieldInfo.Align;
 
   // UnfilledBitsInLastUnit is the difference between the end of the
@@ -1529,7 +1530,7 @@
   // first bit offset available for non-bitfields).  The current data
   // size in bits is always a multiple of the char size; additionally,
   // for ms_struct records it's also a multiple of the
-  // LastBitfieldTypeSize (if set).
+  // LastBitfieldStorageUnitSize (if set).
 
   // The struct-layout algorithm is dictated by the platform ABI,
   // which in principle could use almost any rules it likes.  In
@@ -1583,26 +1584,26 @@
   // First, some simple bookkeeping to perform for ms_struct structs.
   if (IsMsStruct) {
 // The field alignment for integer types is always the size.
-FieldAlign = TypeSize;
+FieldAlign = StorageUnitSize;
 
 // If the previous field was not a bitfield, or was a bitfield
 // with a different storage unit size, or if this field doesn't fit into
 // the current storage unit, we're done with that storage unit.
-if (LastBitfieldTypeSize != TypeSize ||
+if (LastBitfieldStorageUnitSize != StorageUnitSize ||
 UnfilledBitsInLastUnit < FieldSize) {
   // Also, ignore zero-length bitfields after non-bitfields.
-  if (!LastBitfieldTypeSize && !FieldSize)
+  if (!LastBitfieldStorageUnitSize && !FieldSize)
 FieldAlign = 1;
 
   UnfilledBitsInLastUnit = 0;
-  LastBitfieldTypeSize = 0;
+  LastBitfieldStorageUnitSize = 0;
 }
   }
 
   // If 

[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-09-24 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 294157.
Xiangling_L added a comment.

Rebased on the NFC patch;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87029/new/

https://reviews.llvm.org/D87029

Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/test/Layout/aix-bitfield-alignment.cpp
  clang/test/Layout/aix-oversized-bitfield.cpp

Index: clang/test/Layout/aix-oversized-bitfield.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-oversized-bitfield.cpp
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+struct A
+{
+long long l : 64; // expected-error{{width of bit-field 'l' (64 bits) exceeds size of its type (32 bits)}}
+};
+
+int a = sizeof(A);
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct A
+// CHECK64-NEXT: 0:0-63 |   long long l
+// CHECK64-NEXT:| [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64-NEXT:|  nvsize=8, nvalign=8, preferrednvalign=8]
Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,146 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -faix-pragma-pack -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:  0:3-4 |   unsigned char c
+// CHECK-NEXT: 0:5-10 |   unsigned short s
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int 
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:   | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:   |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:   | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:   |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+#pragma align(packed)
+struct C1 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma align(reset)
+
+int c1 = sizeof(C1);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C1
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:| [sizeof=5, dsize=5, align=1, preferredalign=1,
+// CHECK-NEXT:|  nvsize=5, nvalign=1, preferrednvalign=1]
+
+#pragma pack(4)
+struct C2 {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+#pragma pack(pop)
+
+int c2 = sizeof(C2);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C2
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK-NEXT:  3:1-8 |   unsigned long a7
+// CHECK-NEXT:

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

2020-09-23 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 293846.
Xiangling_L marked 3 inline comments as done.
Xiangling_L added a comment.

Addressed the comments;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test5
+
+namespace test6 {
+#pragma align(natural)

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

2020-09-23 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 9 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/include/clang/Sema/Sema.h:488
+AlignPackInfo(AlignPackInfo::Mode M, int Num, bool IsAIX)
+: PackAttr(true), AlignMode(M), PackNumber(Num), AIXStack(IsAIX) {}
+

jasonliu wrote:
> I noticed PackNumber is an unsigned char and we are passing an int type into 
> it.
> Could we add an assertion in the constructor to make sure Num would never be 
> something that's going to get truncated when it converts to an unsigned char?
I think the warning/error `expected #pragma pack parameter to be '1', '2', '4', 
'8', or '16'` have already guaranteed that for us? Or maybe using `unsigned 
int` makes people more comfortable?



Comment at: clang/include/clang/Sema/Sema.h:515
+bool operator==(AlignPackInfo Info) const {
+  return AlignMode == Info.AlignMode && PackNumber == Info.PackNumber;
+}

jasonliu wrote:
> This could return true when `PackAttr` in AlignPackInfo are not the same. 
> Wouldn't that cause an issue?
(1) You mean we have two `AlignPackInfo` with same AlignMode and PackNumber, 
but one is PackAttr and the other one is AlignAttr?
The example I can think of is:


```
a)#pragma align(packed)
  #pragma pack(1)   //AlignMode = Packed, PackNumber = 1

b) #pragma align(packed)  //AlignMode = Packed, PackNumber = 1
```

But I don't think we have any issue in this case. Before and after my patch, a 
== b.
Please let me know any other cases concerning you if any.

(2) However, your concerns leads me to think of another case, where behavior 
changes with my patch.

```
a) 
#pragma align(natural)
#pragma pack(1)   /AlignMode = Native,  PackNumber = 1

b)
#pragma align(packed) ///AlignMode = Packed, PackNumber = 1

```
Without this patch, a == b for other targets.
And I suppose a != b for AIX.




Comment at: clang/lib/Sema/SemaAttr.cpp:403
   // Warn about modified alignment after #includes.
   if (PrevPackState.CurrentValue != PackStack.CurrentValue) {
 Diag(IncludeLoc, diag::warn_pragma_pack_modified_after_include);

jasonliu wrote:
> Since we changed the PackStack for it to contain AlignPackInfo instead of 
> unsigned. 
> This stack no longer only contains Pack information. So we need to rethink 
> about how this diagnostic and the one follows should work.
> i.e. What's the purpose of these diagnostic? Is it still only for pragma pack 
> report? If so, what we are doing here is not correct, since the 
> `CurrentValue` could be different, not because of the pragma pack change, but 
> because of the pragma align change.
> If it's not only for pragma pack any more, but also intend to detect the 
> pragma align interaction, then possibly function name and diagnostic needs 
> some modification, as they don't match the intent any more.
Thanks for pointing this out. I agree that what we are doing here is not 
correct. 
The original commit[45b40147117668ce65bff4f6a240bdae4ad4bf7d] message shows:

```
This commit adds a new -Wpragma-pack warning. It warns in the following 
cases:

- When a translation unit is missing terminating #pragma pack (pop) 
directives.
- When entering an included file if the current alignment value as 
determined
  by '#pragma pack' directives is different from the default alignment 
value.
- When leaving an included file that changed the state of the current 
alignment
  value.
```

So it looks these warnings are used only for `pragma pack`.


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[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-09-24 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked an inline comment as done.
Xiangling_L added a comment.

In D87029#2285398 , @jasonliu wrote:

> I think it would help the review if we could put the NFC portion(e.g. 
> TypeSize -> StorageUnitSize) to a new patch, and give some rationale about 
> the NFC change.

Sure, will do.


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[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-24 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 294116.
Xiangling_L added a comment.

Updated the comments;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86790/new/

https://reviews.llvm.org/D86790

Files:
  clang/include/clang/AST/ASTContext.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/CodeGen/CGExprCXX.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/aix-alignment.c
  clang/test/CodeGenCXX/aix-alignment.cpp

Index: clang/test/CodeGenCXX/aix-alignment.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-alignment.cpp
@@ -0,0 +1,30 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN: -emit-llvm -o - -x c++ %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN: -emit-llvm -o - %s -x c++| \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+struct B {
+  double d;
+  ~B() {}
+};
+
+// AIX32: %call = call noalias nonnull i8* @_Znam(i32 8)
+// AIX64: %call = call noalias nonnull i8* @_Znam(i64 8)
+B *allocBp() { return new B[0]; }
+
+typedef struct D {
+  double d;
+  int i;
+
+  ~D(){};
+} D;
+
+// AIX: define void @_Z3foo1D(%struct.D* noalias sret align 4 %agg.result, %struct.D* %x)
+// AIX:   %1 = bitcast %struct.D* %agg.result to i8*
+// AIX:   %2 = bitcast %struct.D* %x to i8*
+// AIX32  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %2, i32 16, i1 false)
+// AIX64: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 %2, i64 16, i1 false)
+D foo(D x) { return x; }
Index: clang/test/CodeGen/aix-alignment.c
===
--- /dev/null
+++ clang/test/CodeGen/aix-alignment.c
@@ -0,0 +1,41 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+// AIX: @d = global double 0.00e+00, align 8
+double d;
+
+typedef struct {
+  double d;
+  int i;
+} StructDouble;
+
+// AIX: @d1 = global %struct.StructDouble zeroinitializer, align 8
+StructDouble d1;
+
+// AIX: double @retDouble(double %x)
+// AIX: %x.addr = alloca double, align 8
+// AIX: store double %x, double* %x.addr, align 8
+// AIX: load double, double* %x.addr, align 8
+// AIX: ret double %0
+double retDouble(double x) { return x; }
+
+// AIX32: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 4 %x)
+// AIX64: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 8 %x)
+// AIX: %0 = bitcast %struct.StructDouble* %agg.result to i8*
+// AIX: %1 = bitcast %struct.StructDouble* %x to i8*
+// AIX32:   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
+// AIX64:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 8 %1, i64 16, i1 false)
+StructDouble bar(StructDouble x) { return x; }
+
+// AIX:   define void @foo(double* %out, double* %in)
+// AIX32:   %0 = load double*, double** %in.addr, align 4
+// AIX64:   %0 = load double*, double** %in.addr, align 8
+// AIX: %1 = load double, double* %0, align 4
+// AIX: %mul = fmul double %1, 2.00e+00
+// AIX32:   %2 = load double*, double** %out.addr, align 4
+// AIX64:   %2 = load double*, double** %out.addr, align 8
+// AIX: store double %mul, double* %2, align 4
+void foo(double *out, double *in) { *out = *in * 2; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -4512,8 +4512,6 @@
   if (RetTy->isVoidType())
 return ABIArgInfo::getIgnore();
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   if (isAggregateTypeForABI(RetTy))
 return getNaturalAlignIndirect(RetTy);
 
@@ -4530,8 +4528,6 @@
   if (Ty->isVectorType())
 llvm::report_fatal_error("vector type is not supported on AIX yet");
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   if (isAggregateTypeForABI(Ty)) {
 // Records with non-trivial destructors/copy-constructors should not be
 // passed by value.
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -2111,7 +2111,7 @@
   // The array cookie is a size_t; pad that up to the element alignment.
   // The cookie is actually right-justified in that space.
   return std::max(CharUnits::fromQuantity(CGM.SizeSizeInBytes),
-  

[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-22 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4539
 CharUnits CCAlign = getParamTypeAlignment(Ty);
 CharUnits TyAlign = getContext().getTypeAlignInChars(Ty);
 

jasonliu wrote:
> Question: 
> It looks like getNaturalAlignIndirect and getTypeAlignInChars here are all 
> returning ABI alignment.
> But according to the comments, we should use a preferred alignment when it's 
> a complete object. Isn't this complete object? Or I'm missing something?
@jyknight Could you shine a light on this? Personally, I would agree that we 
have complete objects here, so preferred alignment should be used. And if that 
is true, changes should be applied on all other target within this file?


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[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-22 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 293561.
Xiangling_L marked 16 inline comments as done.
Xiangling_L added a comment.

Addressed the comments;


CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/AST/ASTContext.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/CodeGen/CGExprCXX.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/aix-alignment.c
  clang/test/CodeGenCXX/aix-alignment.cpp

Index: clang/test/CodeGenCXX/aix-alignment.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-alignment.cpp
@@ -0,0 +1,30 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN: -emit-llvm -o - -x c++ %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN: -emit-llvm -o - %s -x c++| \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+struct B {
+  double d;
+  ~B() {}
+};
+
+// AIX32: %call = call noalias nonnull i8* @_Znam(i32 8)
+// AIX64: %call = call noalias nonnull i8* @_Znam(i64 8)
+B *allocBp() { return new B[0]; }
+
+typedef struct D {
+  double d;
+  int i;
+
+  ~D(){};
+} D;
+
+// AIX: define void @_Z3foo1D(%struct.D* noalias sret align 4 %agg.result, %struct.D* %x)
+// AIX:   %1 = bitcast %struct.D* %agg.result to i8*
+// AIX:   %2 = bitcast %struct.D* %x to i8*
+// AIX32  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %2, i32 16, i1 false)
+// AIX64: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 %2, i64 16, i1 false)
+D foo(D x) { return x; }
Index: clang/test/CodeGen/aix-alignment.c
===
--- /dev/null
+++ clang/test/CodeGen/aix-alignment.c
@@ -0,0 +1,41 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+// AIX: @d = global double 0.00e+00, align 8
+double d;
+
+typedef struct {
+  double d;
+  int i;
+} StructDouble;
+
+// AIX: @d1 = global %struct.StructDouble zeroinitializer, align 8
+StructDouble d1;
+
+// AIX: double @retDouble(double %x)
+// AIX: %x.addr = alloca double, align 8
+// AIX: store double %x, double* %x.addr, align 8
+// AIX: load double, double* %x.addr, align 8
+// AIX: ret double %0
+double retDouble(double x) { return x; }
+
+// AIX32: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 4 %x)
+// AIX64: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 8 %x)
+// AIX: %0 = bitcast %struct.StructDouble* %agg.result to i8*
+// AIX: %1 = bitcast %struct.StructDouble* %x to i8*
+// AIX32:   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
+// AIX64:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 8 %1, i64 16, i1 false)
+StructDouble bar(StructDouble x) { return x; }
+
+// AIX:   define void @foo(double* %out, double* %in)
+// AIX32:   %0 = load double*, double** %in.addr, align 4
+// AIX64:   %0 = load double*, double** %in.addr, align 8
+// AIX: %1 = load double, double* %0, align 4
+// AIX: %mul = fmul double %1, 2.00e+00
+// AIX32:   %2 = load double*, double** %out.addr, align 4
+// AIX64:   %2 = load double*, double** %out.addr, align 8
+// AIX: store double %mul, double* %2, align 4
+void foo(double *out, double *in) { *out = *in * 2; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -4512,8 +4512,6 @@
   if (RetTy->isVoidType())
 return ABIArgInfo::getIgnore();
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   if (isAggregateTypeForABI(RetTy))
 return getNaturalAlignIndirect(RetTy);
 
@@ -4530,8 +4528,6 @@
   if (Ty->isVectorType())
 llvm::report_fatal_error("vector type is not supported on AIX yet");
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   if (isAggregateTypeForABI(Ty)) {
 // Records with non-trivial destructors/copy-constructors should not be
 // passed by value.
Index: clang/lib/CodeGen/ItaniumCXXABI.cpp
===
--- clang/lib/CodeGen/ItaniumCXXABI.cpp
+++ clang/lib/CodeGen/ItaniumCXXABI.cpp
@@ -2111,7 +2111,7 @@
   // The array cookie is a size_t; pad that up to the element alignment.
   // The cookie is actually right-justified in that space.
   return 

[PATCH] D88659: [FE]Split SuitableAlign into two parts

2020-10-01 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, zarko, Jason, jyknight, 
efriedma.
Herald added subscribers: cfe-commits, luismarques, apazos, sameer.abuasal, 
pzheng, s.egerton, lenary, Jim, jocewei, PkmX, the_o, brucehoult, 
MartinMosbeck, rogfer01, atanasyan, edward-jones, zzheng, jrtc27, niosHD, 
sabuasal, simoncook, johnrusso, rbar, asb, fedor.sergeev, kbarton, 
jgravelle-google, sbc100, nemanjai, sdardis, dylanmckay, dschuff.
Herald added a project: clang.
Xiangling_L requested review of this revision.
Herald added subscribers: MaskRay, aheejin.

There are only two places where "SuitableAlign" is used:

- calculate 'BIGGEST_ALIGNMENT' macro
- alignment for 'Alloca' Inst

On some targets, like AIX, the two value are not equal. So we split 
`SuitableAlign` into two parts to meet the needs.

One is 'GuanranteedAlign'[?any better name] which is used to calculate 
'BIGGEST_ALIGNMENT' and represent fundamental alignment requirement; the other 
one is still 'SuitableAlign' used to calculate alignment for 'Alloca' Inst.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88659

Files:
  clang/include/clang/Basic/TargetInfo.h
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/ARC.h
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/AVR.h
  clang/lib/Basic/Targets/MSP430.h
  clang/lib/Basic/Targets/Mips.h
  clang/lib/Basic/Targets/PPC.h
  clang/lib/Basic/Targets/RISCV.h
  clang/lib/Basic/Targets/Sparc.h
  clang/lib/Basic/Targets/TCE.h
  clang/lib/Basic/Targets/WebAssembly.h
  clang/lib/Basic/Targets/X86.h
  clang/lib/Basic/Targets/XCore.h
  clang/lib/Frontend/InitPreprocessor.cpp
  clang/test/CodeGen/aix_alloca_align.c

Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,22 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN: FileCheck -check-prefix 32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN: FileCheck -check-prefix 64BIT %s
+
+typedef long unsigned int size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+  int *ptr2 = (int *)alloca(sizeof(int) * 9);
+  double *ptr3 = (double *)alloca(sizeof(double) * 9);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 32BIT: %1 = alloca i8, i32 36, align 16
+// 32BIT: %3 = alloca i8, i32 72, align 16
+
+// 64BIT: %0 = alloca i8, i64 9, align 16
+// 64BIT: %1 = alloca i8, i64 36, align 16
+// 64BIT: %3 = alloca i8, i64 72, align 16
Index: clang/lib/Frontend/InitPreprocessor.cpp
===
--- clang/lib/Frontend/InitPreprocessor.cpp
+++ clang/lib/Frontend/InitPreprocessor.cpp
@@ -882,7 +882,7 @@
 
   // Define __BIGGEST_ALIGNMENT__ to be compatible with gcc.
   Builder.defineMacro("__BIGGEST_ALIGNMENT__",
-  Twine(TI.getSuitableAlign() / TI.getCharWidth()) );
+  Twine(TI.getGuaranteedAlign() / TI.getCharWidth()));
 
   if (!LangOpts.CharIsSigned)
 Builder.defineMacro("__CHAR_UNSIGNED__");
Index: clang/lib/Basic/Targets/XCore.h
===
--- clang/lib/Basic/Targets/XCore.h
+++ clang/lib/Basic/Targets/XCore.h
@@ -29,7 +29,7 @@
   : TargetInfo(Triple) {
 NoAsmVariants = true;
 LongLongAlign = 32;
-SuitableAlign = 32;
+GuaranteedAlign = SuitableAlign = 32;
 DoubleAlign = LongDoubleAlign = 32;
 SizeType = UnsignedInt;
 PtrDiffType = SignedInt;
Index: clang/lib/Basic/Targets/X86.h
===
--- clang/lib/Basic/Targets/X86.h
+++ clang/lib/Basic/Targets/X86.h
@@ -381,7 +381,7 @@
 DoubleAlign = LongLongAlign = 32;
 LongDoubleWidth = 96;
 LongDoubleAlign = 32;
-SuitableAlign = 128;
+GuaranteedAlign = SuitableAlign = 128;
 resetDataLayout(Triple.isOSBinFormatMachO() ?
 "e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-"
 "f80:32-n8:16:32-S128" :
@@ -481,7 +481,7 @@
   : DarwinTargetInfo(Triple, Opts) {
 LongDoubleWidth = 128;
 LongDoubleAlign = 128;
-SuitableAlign = 128;
+GuaranteedAlign = SuitableAlign = 128;
 MaxVectorAlign = 256;
 // The watchOS simulator uses the builtin bool type for Objective-C.
 llvm::Triple T = llvm::Triple(Triple);
@@ -655,7 +655,7 @@
 LongDoubleAlign = 128;
 LargeArrayMinWidth = 128;
 LargeArrayAlign = 128;
-SuitableAlign = 128;
+GuaranteedAlign = SuitableAlign = 128;
 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
 PtrDiffType = IsX32 ? SignedInt : SignedLong;
 IntPtrType = IsX32 ? SignedInt : SignedLong;
@@ -893,7 +893,7 @@
 public:
   AndroidX86_32TargetInfo(const 

[PATCH] D88260: [NFC][FE] Replace TypeSize with StorageUnitSize

2020-09-30 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG944691f0b7fa: [NFC][FE] Replace TypeSize with 
StorageUnitSize (authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88260/new/

https://reviews.llvm.org/D88260

Files:
  clang/lib/AST/RecordLayoutBuilder.cpp

Index: clang/lib/AST/RecordLayoutBuilder.cpp
===
--- clang/lib/AST/RecordLayoutBuilder.cpp
+++ clang/lib/AST/RecordLayoutBuilder.cpp
@@ -622,9 +622,10 @@
   /// an adjacent bitfield if necessary.  The unit in question is usually
   /// a byte, but larger units are used if IsMsStruct.
   unsigned char UnfilledBitsInLastUnit;
-  /// LastBitfieldTypeSize - If IsMsStruct, represents the size of the type
-  /// of the previous field if it was a bitfield.
-  unsigned char LastBitfieldTypeSize;
+
+  /// LastBitfieldStorageUnitSize - If IsMsStruct, represents the size of the
+  /// storage unit of the previous field if it was a bitfield.
+  unsigned char LastBitfieldStorageUnitSize;
 
   /// MaxFieldAlignment - The maximum allowed field alignment. This is set by
   /// #pragma pack.
@@ -693,7 +694,7 @@
 UnadjustedAlignment(CharUnits::One()), UseExternalLayout(false),
 InferAlignment(false), Packed(false), IsUnion(false),
 IsMac68kAlign(false), IsMsStruct(false), UnfilledBitsInLastUnit(0),
-LastBitfieldTypeSize(0), MaxFieldAlignment(CharUnits::Zero()),
+LastBitfieldStorageUnitSize(0), MaxFieldAlignment(CharUnits::Zero()),
 DataSize(0), NonVirtualSize(CharUnits::Zero()),
 NonVirtualAlignment(CharUnits::One()),
 PreferredNVAlignment(CharUnits::One()),
@@ -708,7 +709,7 @@
 
   void LayoutFields(const RecordDecl *D);
   void LayoutField(const FieldDecl *D, bool InsertExtraPadding);
-  void LayoutWideBitField(uint64_t FieldSize, uint64_t TypeSize,
+  void LayoutWideBitField(uint64_t FieldSize, uint64_t StorageUnitSize,
   bool FieldPacked, const FieldDecl *D);
   void LayoutBitField(const FieldDecl *D);
 
@@ -1451,7 +1452,7 @@
 }
 
 void ItaniumRecordLayoutBuilder::LayoutWideBitField(uint64_t FieldSize,
-uint64_t TypeSize,
+uint64_t StorageUnitSize,
 bool FieldPacked,
 const FieldDecl *D) {
   assert(Context.getLangOpts().CPlusPlus &&
@@ -1481,7 +1482,7 @@
 
   // We're not going to use any of the unfilled bits in the last byte.
   UnfilledBitsInLastUnit = 0;
-  LastBitfieldTypeSize = 0;
+  LastBitfieldStorageUnitSize = 0;
 
   uint64_t FieldOffset;
   uint64_t UnpaddedFieldOffset = getDataSizeInBits() - UnfilledBitsInLastUnit;
@@ -1520,7 +1521,7 @@
   bool FieldPacked = Packed || D->hasAttr();
   uint64_t FieldSize = D->getBitWidthValue(Context);
   TypeInfo FieldInfo = Context.getTypeInfo(D->getType());
-  uint64_t TypeSize = FieldInfo.Width;
+  uint64_t StorageUnitSize = FieldInfo.Width;
   unsigned FieldAlign = FieldInfo.Align;
 
   // UnfilledBitsInLastUnit is the difference between the end of the
@@ -1529,7 +1530,7 @@
   // first bit offset available for non-bitfields).  The current data
   // size in bits is always a multiple of the char size; additionally,
   // for ms_struct records it's also a multiple of the
-  // LastBitfieldTypeSize (if set).
+  // LastBitfieldStorageUnitSize (if set).
 
   // The struct-layout algorithm is dictated by the platform ABI,
   // which in principle could use almost any rules it likes.  In
@@ -1583,26 +1584,26 @@
   // First, some simple bookkeeping to perform for ms_struct structs.
   if (IsMsStruct) {
 // The field alignment for integer types is always the size.
-FieldAlign = TypeSize;
+FieldAlign = StorageUnitSize;
 
 // If the previous field was not a bitfield, or was a bitfield
 // with a different storage unit size, or if this field doesn't fit into
 // the current storage unit, we're done with that storage unit.
-if (LastBitfieldTypeSize != TypeSize ||
+if (LastBitfieldStorageUnitSize != StorageUnitSize ||
 UnfilledBitsInLastUnit < FieldSize) {
   // Also, ignore zero-length bitfields after non-bitfields.
-  if (!LastBitfieldTypeSize && !FieldSize)
+  if (!LastBitfieldStorageUnitSize && !FieldSize)
 FieldAlign = 1;
 
   UnfilledBitsInLastUnit = 0;
-  LastBitfieldTypeSize = 0;
+  LastBitfieldStorageUnitSize = 0;
 }
   }
 
   // If the field is wider than its declared type, it follows
   // different rules in all cases.
-  if (FieldSize > TypeSize) {
-LayoutWideBitField(FieldSize, TypeSize, FieldPacked, D);
+  if (FieldSize > StorageUnitSize) {
+LayoutWideBitField(FieldSize, StorageUnitSize, FieldPacked, D);
 return;
   }
 
@@ -1686,7 +1687,7 @@
 // Compute the real 

[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-30 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3a7487f903e2: [FE] Use preferred alignment instead of ABI 
alignment for complete object when… (authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86790/new/

https://reviews.llvm.org/D86790

Files:
  clang/include/clang/AST/ASTContext.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/CodeGen/CGExprCXX.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/aix-alignment.c
  clang/test/CodeGenCXX/aix-alignment.cpp

Index: clang/test/CodeGenCXX/aix-alignment.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-alignment.cpp
@@ -0,0 +1,40 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN: -emit-llvm -o - -x c++ %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN: -emit-llvm -o - %s -x c++| \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+struct B {
+  double d;
+  ~B() {}
+};
+
+// AIX32: %call = call noalias nonnull i8* @_Znam(i32 8)
+// AIX64: %call = call noalias nonnull i8* @_Znam(i64 8)
+B *allocBp() { return new B[0]; }
+
+// AIX-LABEL: delete.notnull:
+// AIX32: %0 = bitcast %struct.B* %call to i8*
+// AIX32: %1 = getelementptr inbounds i8, i8* %0, i32 -8
+// AIX32: %2 = getelementptr inbounds i8, i8* %1, i32 4
+// AIX32: %3 = bitcast i8* %2 to i32*
+// AIX64: %0 = bitcast %struct.B* %call to i8*
+// AIX64: %1 = getelementptr inbounds i8, i8* %0, i64 -8
+// AIX64: %2 = bitcast i8* %1 to i64*
+void bar() { delete[] allocBp(); }
+
+typedef struct D {
+  double d;
+  int i;
+
+  ~D(){};
+} D;
+
+// AIX: define void @_Z3foo1D(%struct.D* noalias sret align 4 %agg.result, %struct.D* %x)
+// AIX:   %1 = bitcast %struct.D* %agg.result to i8*
+// AIX:   %2 = bitcast %struct.D* %x to i8*
+// AIX32  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %2, i32 16, i1 false)
+// AIX64: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 %2, i64 16, i1 false)
+D foo(D x) { return x; }
Index: clang/test/CodeGen/aix-alignment.c
===
--- /dev/null
+++ clang/test/CodeGen/aix-alignment.c
@@ -0,0 +1,41 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+// AIX: @d = global double 0.00e+00, align 8
+double d;
+
+typedef struct {
+  double d;
+  int i;
+} StructDouble;
+
+// AIX: @d1 = global %struct.StructDouble zeroinitializer, align 8
+StructDouble d1;
+
+// AIX: double @retDouble(double %x)
+// AIX: %x.addr = alloca double, align 8
+// AIX: store double %x, double* %x.addr, align 8
+// AIX: load double, double* %x.addr, align 8
+// AIX: ret double %0
+double retDouble(double x) { return x; }
+
+// AIX32: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 4 %x)
+// AIX64: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 8 %x)
+// AIX: %0 = bitcast %struct.StructDouble* %agg.result to i8*
+// AIX: %1 = bitcast %struct.StructDouble* %x to i8*
+// AIX32:   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
+// AIX64:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 8 %1, i64 16, i1 false)
+StructDouble bar(StructDouble x) { return x; }
+
+// AIX:   define void @foo(double* %out, double* %in)
+// AIX32:   %0 = load double*, double** %in.addr, align 4
+// AIX64:   %0 = load double*, double** %in.addr, align 8
+// AIX: %1 = load double, double* %0, align 4
+// AIX: %mul = fmul double %1, 2.00e+00
+// AIX32:   %2 = load double*, double** %out.addr, align 4
+// AIX64:   %2 = load double*, double** %out.addr, align 8
+// AIX: store double %mul, double* %2, align 4
+void foo(double *out, double *in) { *out = *in * 2; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -4512,8 +4512,6 @@
   if (RetTy->isVoidType())
 return ABIArgInfo::getIgnore();
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   if (isAggregateTypeForABI(RetTy))
 return getNaturalAlignIndirect(RetTy);
 
@@ -4530,8 +4528,6 @@
   if (Ty->isVectorType())
 llvm::report_fatal_error("vector type is not supported on AIX yet");
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   

[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-28 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 294787.
Xiangling_L added a comment.

Add delete[] function to the testcase;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86790/new/

https://reviews.llvm.org/D86790

Files:
  clang/include/clang/AST/ASTContext.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/CodeGen/CGExprCXX.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/aix-alignment.c
  clang/test/CodeGenCXX/aix-alignment.cpp

Index: clang/test/CodeGenCXX/aix-alignment.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-alignment.cpp
@@ -0,0 +1,40 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN: -emit-llvm -o - -x c++ %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN: -emit-llvm -o - %s -x c++| \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+struct B {
+  double d;
+  ~B() {}
+};
+
+// AIX32: %call = call noalias nonnull i8* @_Znam(i32 8)
+// AIX64: %call = call noalias nonnull i8* @_Znam(i64 8)
+B *allocBp() { return new B[0]; }
+
+// AIX-LABEL: delete.notnull:
+// AIX32: %0 = bitcast %struct.B* %call to i8*
+// AIX32: %1 = getelementptr inbounds i8, i8* %0, i32 -8
+// AIX32: %2 = getelementptr inbounds i8, i8* %1, i32 4
+// AIX32: %3 = bitcast i8* %2 to i32*
+// AIX64: %0 = bitcast %struct.B* %call to i8*
+// AIX64: %1 = getelementptr inbounds i8, i8* %0, i64 -8
+// AIX64: %2 = bitcast i8* %1 to i64*
+void bar() { delete[] allocBp(); }
+
+typedef struct D {
+  double d;
+  int i;
+
+  ~D(){};
+} D;
+
+// AIX: define void @_Z3foo1D(%struct.D* noalias sret align 4 %agg.result, %struct.D* %x)
+// AIX:   %1 = bitcast %struct.D* %agg.result to i8*
+// AIX:   %2 = bitcast %struct.D* %x to i8*
+// AIX32  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %2, i32 16, i1 false)
+// AIX64: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 %2, i64 16, i1 false)
+D foo(D x) { return x; }
Index: clang/test/CodeGen/aix-alignment.c
===
--- /dev/null
+++ clang/test/CodeGen/aix-alignment.c
@@ -0,0 +1,41 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+// AIX: @d = global double 0.00e+00, align 8
+double d;
+
+typedef struct {
+  double d;
+  int i;
+} StructDouble;
+
+// AIX: @d1 = global %struct.StructDouble zeroinitializer, align 8
+StructDouble d1;
+
+// AIX: double @retDouble(double %x)
+// AIX: %x.addr = alloca double, align 8
+// AIX: store double %x, double* %x.addr, align 8
+// AIX: load double, double* %x.addr, align 8
+// AIX: ret double %0
+double retDouble(double x) { return x; }
+
+// AIX32: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 4 %x)
+// AIX64: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 8 %x)
+// AIX: %0 = bitcast %struct.StructDouble* %agg.result to i8*
+// AIX: %1 = bitcast %struct.StructDouble* %x to i8*
+// AIX32:   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
+// AIX64:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 8 %1, i64 16, i1 false)
+StructDouble bar(StructDouble x) { return x; }
+
+// AIX:   define void @foo(double* %out, double* %in)
+// AIX32:   %0 = load double*, double** %in.addr, align 4
+// AIX64:   %0 = load double*, double** %in.addr, align 8
+// AIX: %1 = load double, double* %0, align 4
+// AIX: %mul = fmul double %1, 2.00e+00
+// AIX32:   %2 = load double*, double** %out.addr, align 4
+// AIX64:   %2 = load double*, double** %out.addr, align 8
+// AIX: store double %mul, double* %2, align 4
+void foo(double *out, double *in) { *out = *in * 2; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -4512,8 +4512,6 @@
   if (RetTy->isVoidType())
 return ABIArgInfo::getIgnore();
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   if (isAggregateTypeForABI(RetTy))
 return getNaturalAlignIndirect(RetTy);
 
@@ -4530,8 +4528,6 @@
   if (Ty->isVectorType())
 llvm::report_fatal_error("vector type is not supported on AIX yet");
 
-  // TODO:  Evaluate if AIX power alignment rule would have an impact on the
-  // alignment here.
   if (isAggregateTypeForABI(Ty)) {
 // Records with non-trivial destructors/copy-constructors should not be
 // passed by 

[PATCH] D87702: [Frontend] Add pragma align natural and sort out pragma pack stack effect

2020-09-17 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 292533.
Xiangling_L added a comment.

Fix the PragmaStack is empty assertion failure when we do: #pragma pack(2) then 
#pragma align(reset)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87702/new/

https://reviews.llvm.org/D87702

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/LangOptions.def
  clang/include/clang/Driver/Options.td
  clang/include/clang/Sema/Sema.h
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaAttr.cpp
  clang/lib/Serialization/ASTReader.cpp
  clang/lib/Serialization/ASTWriter.cpp
  clang/test/Driver/aix-pragma-pack.c
  clang/test/Layout/aix-double-struct-member.cpp
  clang/test/Layout/aix-power-natural-interaction.cpp
  clang/test/Sema/aix-pragma-pack-and-align.c

Index: clang/test/Sema/aix-pragma-pack-and-align.c
===
--- /dev/null
+++ clang/test/Sema/aix-pragma-pack-and-align.c
@@ -0,0 +1,231 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -faix-pragma-pack -verify -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck %s
+
+namespace test1 {
+#pragma align(natural)
+#pragma pack(4)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma pack()
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 4}}
+#pragma pack(pop)
+#pragma pack(show) // expected-warning {{value of #pragma pack(show) == 8}}
+struct B {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test1::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test1
+
+namespace test2 {
+#pragma align(natural)
+#pragma pack(2)
+struct A {
+  int i;
+  double d;
+};
+
+int a = sizeof(A);
+#pragma align(reset)
+
+struct B {
+  int i;
+  double d;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=2, preferredalign=2,
+// CHECK-NEXT:|  nvsize=12, nvalign=2, preferrednvalign=2]
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test2::B
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test2
+
+namespace test3 {
+#pragma pack(2)
+#pragma align(natural)
+struct A {
+  double d;
+};
+#pragma align(reset)
+#pragma pack(pop)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test3::A
+// CHECK-NEXT:  0 |   double d
+// CHECK-NEXT:| [sizeof=8, dsize=8, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=8, nvalign=4, preferrednvalign=8]
+
+} // namespace test3
+
+namespace test4 {
+#pragma pack(2)
+#pragma align(natural)
+#pragma pack(pop)
+
+struct A {
+  int i;
+  double d;
+} a;
+#pragma align(reset)
+#pragma pack(pop)
+
+int i = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test4::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  8 |   double d
+// CHECK-NEXT:| [sizeof=16, dsize=16, align=4, preferredalign=8,
+// CHECK-NEXT:|  nvsize=16, nvalign=4, preferrednvalign=8]
+
+} // namespace test4
+
+namespace test5 {
+#pragma align(power)
+#pragma align(natural)
+#pragma pack(2)
+#pragma align(reset)
+struct A {
+  int i;
+  double d;
+};
+#pragma align(reset)
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct test5::A
+// CHECK-NEXT:  0 |   int i
+// CHECK-NEXT:  4 |   double d
+// CHECK-NEXT:| [sizeof=12, dsize=12, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=12, nvalign=4, preferrednvalign=4]
+
+} // namespace test5
+
+namespace test6 

[PATCH] D87029: [AIX] Implement AIX special bitfield related alignment rules

2020-09-17 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 292537.
Xiangling_L added a comment.

Rebased on the pragma/pack patch;
Added packed related testcase for bitfield;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87029/new/

https://reviews.llvm.org/D87029

Files:
  clang/lib/AST/RecordLayoutBuilder.cpp
  clang/lib/Sema/SemaDecl.cpp
  clang/test/Layout/aix-bitfield-alignment.cpp
  clang/test/Layout/aix-oversized-bitfield.cpp

Index: clang/test/Layout/aix-oversized-bitfield.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-oversized-bitfield.cpp
@@ -0,0 +1,18 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fsyntax-only -verify %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+
+struct A
+{
+long long l : 64; // expected-error{{width of bit-field 'l' (64 bits) exceeds size of its type (32 bits)}}
+};
+
+int a = sizeof(A);
+
+// CHECK64:  *** Dumping AST Record Layout
+// CHECK64-NEXT:  0 | struct A
+// CHECK64-NEXT: 0:0-63 |   long long l
+// CHECK64-NEXT:| [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64-NEXT:|  nvsize=8, nvalign=8, preferrednvalign=8]
Index: clang/test/Layout/aix-bitfield-alignment.cpp
===
--- /dev/null
+++ clang/test/Layout/aix-bitfield-alignment.cpp
@@ -0,0 +1,94 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only  -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -fdump-record-layouts \
+// RUN: -fsyntax-only -x c++ %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+struct A {
+  bool b : 3;
+  unsigned char c : 2;
+  unsigned short s : 6;
+};
+
+int a = sizeof(A);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct A
+// CHECK-NEXT:  0:0-2 |   _Bool b
+// CHECK-NEXT:  0:3-4 |   unsigned char c
+// CHECK-NEXT: 0:5-10 |   unsigned short s
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct B {
+  char c;
+  int : 0;
+};
+
+int b = sizeof(B);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct B
+// CHECK-NEXT:  0 |   char c
+// CHECK-NEXT:4:- |   int 
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
+
+struct C {
+  signed int a1 : 6;
+  signed char a2 : 4;
+  short int a3 : 2;
+  int a4 : 2;
+  signed long a5 : 5;
+  long long int a6 : 6;
+  unsigned long a7 : 8;
+};
+
+int c = sizeof(C);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct C
+// CHECK-NEXT:  0:0-5 |   int a1
+// CHECK-NEXT:  0:6-9 |   signed char a2
+// CHECK-NEXT:  1:2-3 |   short a3
+// CHECK-NEXT:  1:4-5 |   int a4
+// CHECK-NEXT: 1:6-10 |   long a5
+// CHECK-NEXT:  2:3-8 |   long long a6
+// CHECK32: 4:0-7 |   unsigned long a7
+// CHECK32:   | [sizeof=8, dsize=8, align=4, preferredalign=4,
+// CHECK32:   |  nvsize=8, nvalign=4, preferrednvalign=4]
+// CHECK64: 3:1-8 |   unsigned long a7
+// CHECK64:   | [sizeof=8, dsize=8, align=8, preferredalign=8,
+// CHECK64:   |  nvsize=8, nvalign=8, preferrednvalign=8]
+
+typedef __attribute__((aligned(32))) short mySHORT;
+struct D {
+  char c : 8;
+  mySHORT : 0;
+};
+
+int d = sizeof(D);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct D
+// CHECK-NEXT:  0:0-7 |   char c
+// CHECK-NEXT:   32:- |   mySHORT
+// CHECK-NEXT:| [sizeof=32, dsize=32, align=32, preferredalign=32,
+// CHECK-NEXT:|  nvsize=32, nvalign=32, preferrednvalign=32]
+
+enum class Bool : bool { False = 0,
+ True = 1 };
+
+struct E {
+  Bool b : 1;
+};
+
+int e = sizeof(E);
+
+// CHECK:  *** Dumping AST Record Layout
+// CHECK-NEXT:  0 | struct E
+// CHECK-NEXT:  0:0-0 |   enum Bool b
+// CHECK-NEXT:| [sizeof=4, dsize=4, align=4, preferredalign=4,
+// CHECK-NEXT:|  nvsize=4, nvalign=4, preferrednvalign=4]
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -16443,7 +16443,22 @@
 bool MSBitfieldViolation =
 Value.ugt(TypeStorageSize) &&
 (IsMsStruct || Context.getTargetInfo().getCXXABI().isMicrosoft());
-if (CStdConstraintViolation || MSBitfieldViolation) {
+
+bool AIXBitfieldViolation = false;
+if (const BuiltinType *BTy = FieldTy.getTypePtr()->getAs()) {
+  if ((BTy->getKind() == 

[PATCH] D74166: [AIX][Frontend] Static init implementation for AIX considering no priority

2020-05-25 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 266087.
Xiangling_L added a comment.

Adjust  `mangleDynamicDestructor`;
Add assertion and FIXME for getUniqueModuleId


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74166/new/

https://reviews.llvm.org/D74166

Files:
  clang/include/clang/AST/Mangle.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/CodeGen/CGCXXABI.h
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/test/CodeGen/aix-constructor-attribute.cpp
  clang/test/CodeGen/aix-destructor-attribute.cpp
  clang/test/CodeGen/aix-init-priority-attribute.cpp
  clang/test/CodeGen/static-init.cpp

Index: clang/test/CodeGen/static-init.cpp
===
--- clang/test/CodeGen/static-init.cpp
+++ clang/test/CodeGen/static-init.cpp
@@ -1,12 +1,55 @@
-// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
-// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ %s \
-// RUN: -o /dev/null 2>&1 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ < %s \
+// RUN: | FileCheck %s
 
 struct test {
   test();
   ~test();
 } t;
 
-// CHECK: error in backend: Static initialization has not been implemented on XL ABI yet.
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_6a64b8be19fb12e74feab8a7a858f83b, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_6a64b8be19fb12e74feab8a7a858f83b, i8* null }]
+// CHECK: define internal void @__cxx_global_var_init() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testC1Ev(%struct.test* @t)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor_t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__dtor_t() #0 {
+// CHECK: entry:
+// CHECK:   call void @_ZN4testD1Ev(%struct.test* @t)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*)
+
+// CHECK: define internal void @__cxx_global_var_destruct_t() #0 {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor_t)
+// CHECK:   %guard.hasSrterm = icmp eq i32 %0, 0
+// CHECK:   br i1 %guard.hasSrterm, label %destruct.check, label %destruct.end
+
+// CHECK: destruct.check:
+// CHECK:   call void @__dtor_t()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*)
+
+// CHECK: define dso_local void @__sinit8000_clang_6a64b8be19fb12e74feab8a7a858f83b() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_init()
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define dso_local void @__sterm8000_clang_6a64b8be19fb12e74feab8a7a858f83b() #0 {
+// CHECK: entry:
+// CHECK:   call void @__cxx_global_var_destruct_t()
+// CHECK:   ret void
+// CHECK: }
Index: clang/test/CodeGen/aix-init-priority-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-init-priority-attribute.cpp
@@ -0,0 +1,17 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+class test {
+  int a;
+
+public:
+  test(int c) { a = c; }
+  ~test() { a = 0; }
+};
+
+__attribute__((init_priority(2000)))
+test t(1);
+
+// CHECK: fatal error: error in backend: 'init_priority' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-destructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-destructor-attribute.cpp
@@ -0,0 +1,18 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+
+int bar() __attribute__((destructor(180)));
+
+class test {
+  int a;
+
+public:
+  test(int c) { a = c; }
+  ~test() { a = 0; }
+};
+
+test t(1);
+
+// CHECK: fatal error: error in backend: 'destructor' attribute unsupported on AIX yet
Index: clang/test/CodeGen/aix-constructor-attribute.cpp
===
--- /dev/null
+++ clang/test/CodeGen/aix-constructor-attribute.cpp
@@ -0,0 +1,18 @@
+// RUN: not %clang_cc1 -triple powerpc-ibm-aix-xcoff -x c++ -emit-llvm < %s \
+// RUN: 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-ibm-aix-xcoff -x c++ -emit-llvm < 

[PATCH] D86790: [FE] Use preferred alignment instead of ABI alignment for complete object when applicable

2020-09-16 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 292207.
Xiangling_L added a comment.

Use default argument;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86790/new/

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Files:
  clang/include/clang/AST/ASTContext.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/CodeGen/CGExprCXX.cpp
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
  clang/test/CodeGen/aix-alignment.c
  clang/test/CodeGenCXX/aix-alignment.cpp

Index: clang/test/CodeGenCXX/aix-alignment.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-alignment.cpp
@@ -0,0 +1,30 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN: -emit-llvm -o - -x c++ %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN: -emit-llvm -o - %s -x c++| \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+struct B {
+  double d;
+  ~B() {}
+};
+
+// AIX32: %call = call noalias nonnull i8* @_Znam(i32 8)
+// AIX64: %call = call noalias nonnull i8* @_Znam(i64 8)
+B *allocBp() { return new B[0]; }
+
+typedef struct D {
+  double d;
+  int i;
+
+  ~D(){};
+} D;
+
+// AIX: define void @_Z3foo1D(%struct.D* noalias sret align 4 %agg.result, %struct.D* %x)
+// AIX:   %1 = bitcast %struct.D* %agg.result to i8*
+// AIX:   %2 = bitcast %struct.D* %x to i8*
+// AIX32  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %2, i32 16, i1 false)
+// AIX64: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %1, i8* align 4 %2, i64 16, i1 false)
+D foo(D x) { return x; }
Index: clang/test/CodeGen/aix-alignment.c
===
--- /dev/null
+++ clang/test/CodeGen/aix-alignment.c
@@ -0,0 +1,41 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | \
+// RUN:   FileCheck %s --check-prefixes=AIX,AIX64
+
+// AIX: @d = global double 0.00e+00, align 8
+double d;
+
+typedef struct {
+  double d;
+  int i;
+} StructDouble;
+
+// AIX: @d1 = global %struct.StructDouble zeroinitializer, align 8
+StructDouble d1;
+
+// AIX: double @retDouble(double %x)
+// AIX: %x.addr = alloca double, align 8
+// AIX: store double %x, double* %x.addr, align 8
+// AIX: load double, double* %x.addr, align 8
+// AIX: ret double %0
+double retDouble(double x) { return x; }
+
+// AIX32: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 4 %x)
+// AIX64: define void @bar(%struct.StructDouble* noalias sret align 4 %agg.result, %struct.StructDouble* byval(%struct.StructDouble) align 8 %x)
+// AIX: %0 = bitcast %struct.StructDouble* %agg.result to i8*
+// AIX: %1 = bitcast %struct.StructDouble* %x to i8*
+// AIX32:   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
+// AIX64:   call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 8 %1, i64 16, i1 false)
+StructDouble bar(StructDouble x) { return x; }
+
+// AIX:   define void @foo(double* %out, double* %in)
+// AIX32:   %0 = load double*, double** %in.addr, align 4
+// AIX64:   %0 = load double*, double** %in.addr, align 8
+// AIX: %1 = load double, double* %0, align 4
+// AIX: %mul = fmul double %1, 2.00e+00
+// AIX32:   %2 = load double*, double** %out.addr, align 4
+// AIX64:   %2 = load double*, double** %out.addr, align 8
+// AIX: store double %mul, double* %2, align 4
+void foo(double *out, double *in) { *out = *in * 2; }
Index: clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
===
--- clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
+++ clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
@@ -248,8 +248,8 @@
   FieldInfo RetVal;
   RetVal.Field = FD;
   auto  = FD->getASTContext();
-  std::tie(RetVal.Size, RetVal.Align) =
-  Ctx.getTypeInfoInChars(FD->getType());
+  std::tie(RetVal.Size, RetVal.Align) = Ctx.getTypeInfoInChars(
+  FD->getType(), true /* NeedsPreferredAlignment */);
   assert(llvm::isPowerOf2_64(RetVal.Align.getQuantity()));
   if (auto Max = FD->getMaxAlignment())
 RetVal.Align = std::max(Ctx.toCharUnitsFromBits(Max), RetVal.Align);
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -349,7 +349,8 @@
 ///
 /// \param IsIndirect - Values of this type are passed indirectly.
 /// \param ValueInfo - The size and alignment of this type, generally
-///   computed with getContext().getTypeInfoInChars(ValueTy).
+///   computed with 

[PATCH] D89910: [AIX] Let alloca return 16 bytes alignment

2020-10-21 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, ZarkoCA.
Herald added subscribers: cfe-commits, dexonsmith, kbarton, nemanjai.
Herald added a project: clang.
Xiangling_L requested review of this revision.

On AIX, to support vector types, which should always be 16bytes aligned, we set 
`alloca` to return 16 bytes aligned memory space.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D89910

Files:
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/aix_alloca_align.c


Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 64BIT %s
+
+typedef long unsigned int size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 64BIT: %0 = alloca i8, i64 9, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();


Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck -check-prefix 64BIT %s
+
+typedef long unsigned int size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 64BIT: %0 = alloca i8, i64 9, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
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[PATCH] D89897: [AIX] Emit error for -G option on AIX

2020-10-21 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked an inline comment as done.
Xiangling_L added inline comments.



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4924
 
+  if (RawTriple.isOSAIX())
+if (Arg *A = Args.getLastArg(options::OPT_G)) {

jasonliu wrote:
> Question: When do we query `RawTriple`, and when we should query `Triple`?
`RawTriple` in this function means the triple you passed in or the default one.

`Triple` in this function means `a ToolChain's effective triple`.
An effective triple is:

> the Clang triple to use for this target, which may take into account the 
> command line arguments. For example, on Darwin the -mmacosx-version-min= 
> command line argument (which
> sets the deployment target) determines the version in the triple passed to 
> Clang.

So I feel, if there is no special condition we need to consider, we just use 
`RawTriple`.




Repository:
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[PATCH] D88659: [FE]Split SuitableAlign into two parts

2020-10-20 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 299404.
Xiangling_L added a comment.
Herald added a subscriber: dexonsmith.

Edit the definition of `SuitableAlign`;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88659/new/

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Files:
  clang/include/clang/Basic/TargetInfo.h


Index: clang/include/clang/Basic/TargetInfo.h
===
--- clang/include/clang/Basic/TargetInfo.h
+++ clang/include/clang/Basic/TargetInfo.h
@@ -581,8 +581,9 @@
   /// Determine whether constrained floating point is supported on this target.
   virtual bool hasStrictFP() const { return HasStrictFP; }
 
-  /// Return the alignment that is suitable for storing any
-  /// object with a fundamental alignment requirement.
+  /// Return the alignment that is the largest alignment ever used for any
+  /// scalar/SIMD data type on the target machine you are compiling for
+  /// (including types with an extended alignment requirement).
   unsigned getSuitableAlign() const { return SuitableAlign; }
 
   /// Return the default alignment for __attribute__((aligned)) on


Index: clang/include/clang/Basic/TargetInfo.h
===
--- clang/include/clang/Basic/TargetInfo.h
+++ clang/include/clang/Basic/TargetInfo.h
@@ -581,8 +581,9 @@
   /// Determine whether constrained floating point is supported on this target.
   virtual bool hasStrictFP() const { return HasStrictFP; }
 
-  /// Return the alignment that is suitable for storing any
-  /// object with a fundamental alignment requirement.
+  /// Return the alignment that is the largest alignment ever used for any
+  /// scalar/SIMD data type on the target machine you are compiling for
+  /// (including types with an extended alignment requirement).
   unsigned getSuitableAlign() const { return SuitableAlign; }
 
   /// Return the default alignment for __attribute__((aligned)) on
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[PATCH] D90063: [AIX] Also error on -G for link-only step

2020-10-23 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 300391.
Xiangling_L added a comment.

Fixed the duplication in the testcase;


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90063/new/

https://reviews.llvm.org/D90063

Files:
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/Inputs/aix_ppc_tree/dummy0.o
  clang/test/Driver/aix-err-options.c


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | 
\
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 
-// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK32: error: unsupported option '-G' for target 'powerpc-ibm-aix-xcoff'
 // CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,11 +4958,6 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
-  if (RawTriple.isOSAIX())
-if (Arg *A = Args.getLastArg(options::OPT_G))
-  D.Diag(diag::err_drv_unsupported_opt_for_target)
-  << A->getSpelling() << RawTriple.str();
-
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
Index: clang/lib/Driver/Driver.cpp
===
--- clang/lib/Driver/Driver.cpp
+++ clang/lib/Driver/Driver.cpp
@@ -3876,9 +3876,15 @@
 }
   }
 
+  const llvm::Triple  = C.getDefaultToolChain().getTriple();
+  if (RawTriple.isOSAIX())
+if (Arg *A = C.getArgs().getLastArg(options::OPT_G))
+  Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   // Collect the list of architectures.
   llvm::StringSet<> ArchNames;
-  if (C.getDefaultToolChain().getTriple().isOSBinFormatMachO())
+  if (RawTriple.isOSBinFormatMachO())
 for (const Arg *A : C.getArgs())
   if (A->getOption().matches(options::OPT_arch))
 ArchNames.insert(A->getValue());


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target 

[PATCH] D89910: [AIX] Let alloca return 16 bytes alignment

2020-10-23 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG05bef88eb3ec: [AIX] Let alloca return 16 bytes alignment 
(authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/lib/Basic/Targets/PPC.h
  clang/test/CodeGen/aix_alloca_align.c
  clang/test/Preprocessor/init-ppc.c
  clang/test/Preprocessor/init-ppc64.c


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+  char *ptr2 = (char *)alloca(sizeof(char) * 32);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 32BIT: %1 = alloca i8, i32 32, align 16
+
+// 64BIT: %0 = alloca i8, i64 9, align 16
+// 64BIT: %1 = alloca i8, i64 32, align 16
Index: clang/lib/Basic/Targets/PPC.h
===
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -370,7 +370,6 @@
   SizeType = UnsignedLong;
   PtrDiffType = SignedLong;
   IntPtrType = SignedLong;
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();
@@ -409,7 +408,6 @@
 if (Triple.isOSAIX()) {
   // TODO: Set appropriate ABI for AIX platform.
   DataLayout = "E-m:a-i64:64-n32:64";
-  SuitableAlign = 64;
   LongDoubleWidth = 64;
   LongDoubleAlign = DoubleAlign = 32;
   LongDoubleFormat = ::APFloat::IEEEdouble();


Index: clang/test/Preprocessor/init-ppc64.c
===
--- clang/test/Preprocessor/init-ppc64.c
+++ clang/test/Preprocessor/init-ppc64.c
@@ -666,7 +666,7 @@
 // PPC64-AIX:#define _LP64 1
 // PPC64-AIX:#define _POWER 1
 // PPC64-AIX:#define __64BIT__ 1
-// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC64-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC64-AIX:#define __BIG_ENDIAN__ 1
 // PPC64-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC64-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/Preprocessor/init-ppc.c
===
--- clang/test/Preprocessor/init-ppc.c
+++ clang/test/Preprocessor/init-ppc.c
@@ -398,7 +398,7 @@
 // PPC-AIX:#define _LONG_LONG 1
 // PPC-AIX-NOT:#define _LP64 1
 // PPC-AIX:#define _POWER 1
-// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 8
+// PPC-AIX:#define __BIGGEST_ALIGNMENT__ 16
 // PPC-AIX:#define __BIG_ENDIAN__ 1
 // PPC-AIX:#define __BYTE_ORDER__ __ORDER_BIG_ENDIAN__
 // PPC-AIX:#define __CHAR16_TYPE__ unsigned short
Index: clang/test/CodeGen/aix_alloca_align.c
===
--- /dev/null
+++ clang/test/CodeGen/aix_alloca_align.c
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple=powerpc-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=32BIT %s
+
+// RUN: %clang_cc1 -triple=powerpc64-ibm-aix-xcoff -S -emit-llvm < %s | \
+// RUN:   FileCheck --check-prefix=64BIT %s
+
+typedef __SIZE_TYPE__ size_t;
+extern void *alloca(size_t __size) __attribute__((__nothrow__));
+
+void foo() {
+  char *ptr1 = (char *)alloca(sizeof(char) * 9);
+  char *ptr2 = (char *)alloca(sizeof(char) * 32);
+}
+
+// 32BIT: %0 = alloca i8, i32 9, align 16
+// 32BIT: %1 = alloca i8, i32 32, align 16
+
+// 64BIT: %0 = alloca i8, i64 9, align 16
+// 64BIT: 

[PATCH] D90063: [AIX] Also error on -G for link-only step

2020-10-23 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, daltenty, jasonliu.
Herald added subscribers: cfe-commits, kbarton, nemanjai.
Herald added a project: clang.
Xiangling_L requested review of this revision.

The change in [[ https://reviews.llvm.org/D89897 | [AIX] Emit error for -G 
option on AIX ]] didn't issue an error for link-only steps. The patch fixes 
that problem and also update related testcases.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90063

Files:
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/Inputs/aix_ppc_tree/dummy0.o
  clang/test/Driver/aix-err-options.c


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | 
\
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 
-// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK32: error: unsupported option '-G' for target 'powerpc-ibm-aix-xcoff'
 // CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,11 +4958,6 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
-  if (RawTriple.isOSAIX())
-if (Arg *A = Args.getLastArg(options::OPT_G))
-  D.Diag(diag::err_drv_unsupported_opt_for_target)
-  << A->getSpelling() << RawTriple.str();
-
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
Index: clang/lib/Driver/Driver.cpp
===
--- clang/lib/Driver/Driver.cpp
+++ clang/lib/Driver/Driver.cpp
@@ -3876,9 +3876,15 @@
 }
   }
 
+  const llvm::Triple  = C.getDefaultToolChain().getTriple();
+  if (RawTriple.isOSAIX())
+if (Arg *A = C.getArgs().getLastArg(options::OPT_G))
+  Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   // Collect the list of architectures.
   llvm::StringSet<> ArchNames;
-  if (C.getDefaultToolChain().getTriple().isOSBinFormatMachO())
+  if (RawTriple.isOSBinFormatMachO())
 for (const Arg *A : C.getArgs())
   if (A->getOption().matches(options::OPT_arch))
 ArchNames.insert(A->getValue());


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck 

[PATCH] D90063: [AIX] Also error on -G for link-only step

2020-10-26 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3d4aebbb9d99: [AIX] Also error on -G for link-only step 
(authored by Xiangling_L).

Changed prior to commit:
  https://reviews.llvm.org/D90063?vs=300391=300782#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90063/new/

https://reviews.llvm.org/D90063

Files:
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/aix-err-options.c


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | 
\
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target powerpc64-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s 
| \
 // RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 
-// CHECK32: error: unsupported option '-G' for target 'powerpc32-ibm-aix-xcoff'
+// CHECK32: error: unsupported option '-G' for target 'powerpc-ibm-aix-xcoff'
 // CHECK64: error: unsupported option '-G' for target 'powerpc64-ibm-aix-xcoff'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -4958,11 +4958,6 @@
   if (D.CCGenDiagnostics)
 CmdArgs.push_back("-disable-pragma-debug-crash");
 
-  if (RawTriple.isOSAIX())
-if (Arg *A = Args.getLastArg(options::OPT_G))
-  D.Diag(diag::err_drv_unsupported_opt_for_target)
-  << A->getSpelling() << RawTriple.str();
-
   bool UseSeparateSections = isUseSeparateSections(Triple);
 
   if (Args.hasFlag(options::OPT_ffunction_sections,
Index: clang/lib/Driver/Driver.cpp
===
--- clang/lib/Driver/Driver.cpp
+++ clang/lib/Driver/Driver.cpp
@@ -3888,9 +3888,15 @@
 }
   }
 
+  const llvm::Triple  = C.getDefaultToolChain().getTriple();
+  if (RawTriple.isOSAIX())
+if (Arg *A = C.getArgs().getLastArg(options::OPT_G))
+  Diag(diag::err_drv_unsupported_opt_for_target)
+  << A->getSpelling() << RawTriple.str();
+
   // Collect the list of architectures.
   llvm::StringSet<> ArchNames;
-  if (C.getDefaultToolChain().getTriple().isOSBinFormatMachO())
+  if (RawTriple.isOSBinFormatMachO())
 for (const Arg *A : C.getArgs())
   if (A->getOption().matches(options::OPT_arch))
 ArchNames.insert(A->getValue());


Index: clang/test/Driver/aix-err-options.c
===
--- clang/test/Driver/aix-err-options.c
+++ clang/test/Driver/aix-err-options.c
@@ -1,7 +1,28 @@
-// RUN: %clang -target powerpc32-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
 // RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -S -emit-llvm -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -c \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.s -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+// RUN: %clang -target powerpc-ibm-aix-xcoff -### -o dummy.so \
+// RUN: %S/Inputs/aix_ppc_tree/dummy0.o -G 0 2>&1 | \
+// RUN:   FileCheck --check-prefix=CHECK32 %s
+
+// RUN: %clang -target powerpc64-ibm-aix-xcoff -### -E -G 0 2>&1 %s | \
+// RUN:   FileCheck --check-prefix=CHECK64 %s
 // RUN: %clang -target 

[PATCH] D90187: [NFC] Remove max_align.c LIT testcase

2020-10-26 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, daltenty.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

Since we fixed the definition of `SuitableAlign` here: 
https://reviews.llvm.org/D88659, `max_align_t` and `__BIGGEST_ALIGNMENT__` 
should not be same always.

The original testcase was added here: https://reviews.llvm.org/D59048


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90187

Files:
  clang/test/Headers/max_align.c


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");
___
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[PATCH] D90187: [NFC] Remove max_align.c LIT testcase

2020-10-26 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG357715ce97d0: [NFC] Remove max_align.c LIT testcase 
(authored by Xiangling_L).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90187/new/

https://reviews.llvm.org/D90187

Files:
  clang/test/Headers/max_align.c


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");


Index: clang/test/Headers/max_align.c
===
--- clang/test/Headers/max_align.c
+++ /dev/null
@@ -1,12 +0,0 @@
-// RUN: %clang_cc1 -fsyntax-only -std=c11 -verify %s
-// expected-no-diagnostics
-
-// XFAIL: windows-, i686
-
-#ifndef __BIGGEST_ALIGNMENT__
-#error __BIGGEST_ALIGNMENT__ not defined
-#endif
-
-#include 
-
-_Static_assert(__BIGGEST_ALIGNMENT__ == _Alignof(max_align_t), "");
___
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[PATCH] D84880: [AIX] Temporarily disable IncrementalProcessingTest partially

2020-07-29 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: daltenty, jasonliu, stevewan, 
hubert.reinterpretcast.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.
Xiangling_L requested review of this revision.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D84880

Files:
  clang/unittests/CodeGen/IncrementalProcessingTest.cpp


Index: clang/unittests/CodeGen/IncrementalProcessingTest.cpp
===
--- clang/unittests/CodeGen/IncrementalProcessingTest.cpp
+++ clang/unittests/CodeGen/IncrementalProcessingTest.cpp
@@ -159,6 +159,11 @@
 // First code should not end up in second module:
 ASSERT_FALSE(M[2]->getFunction("funcForProg1"));
 
+// TODO: Remove this after the static initialization frontend 
implementation
+// is recovered on AIX.
+if (compiler.getTarget().getTriple().isOSAIX())
+  return;
+
 // Make sure global inits exist and are unique:
 const Function* GlobalInit1 = getGlobalInit(*M[1]);
 ASSERT_TRUE(GlobalInit1);


Index: clang/unittests/CodeGen/IncrementalProcessingTest.cpp
===
--- clang/unittests/CodeGen/IncrementalProcessingTest.cpp
+++ clang/unittests/CodeGen/IncrementalProcessingTest.cpp
@@ -159,6 +159,11 @@
 // First code should not end up in second module:
 ASSERT_FALSE(M[2]->getFunction("funcForProg1"));
 
+// TODO: Remove this after the static initialization frontend implementation
+// is recovered on AIX.
+if (compiler.getTarget().getTriple().isOSAIX())
+  return;
+
 // Make sure global inits exist and are unique:
 const Function* GlobalInit1 = getGlobalInit(*M[1]);
 ASSERT_TRUE(GlobalInit1);
___
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[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 283712.
Xiangling_L marked an inline comment as done.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84534/new/

https://reviews.llvm.org/D84534

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/aix-static-init-debug-info.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
  clang/test/CodeGenCXX/aix-static-init.cpp
  clang/unittests/CodeGen/IncrementalProcessingTest.cpp
  llvm/include/llvm/CodeGen/AsmPrinter.h
  llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll

Index: llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
@@ -0,0 +1,10 @@
+; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 655, void ()* @foo, i8* null }]
+
+define void @foo() {
+  ret void
+}
+
+// CHECK: LLVM ERROR: prioritized sinit and sterm functions are not yet supported
Index: llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
@@ -0,0 +1,7 @@
+; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
+@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @bar, i8* null }]
+
+// CHECK: LLVM ERROR: cannot produce a unique identifier for this module based on strong external symbols
Index: llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
@@ -0,0 +1,12 @@
+; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@v = global i8 0
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* @v}]
+
+define void @foo() {
+  ret void
+}
+
+// CHECK: LLVM ERROR: associated data of XXStructor list is not yet supported on AIX
Index: llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
@@ -0,0 +1,60 @@
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+
+@llvm.global_ctors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init1, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @init2, i8* null }]
+@llvm.global_dtors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @destruct1, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @destruct2, i8* null }]
+
+define i32 @extFunc() {
+entry:
+  ret i32 3
+}
+
+define internal void @init1() {
+  ret void
+}
+
+define internal void @destruct1() {
+  ret void
+}
+
+define internal void @init2() {
+  ret void
+}
+
+define internal void @destruct2() {
+  ret void
+}
+
+; CHECK:   .lglobl	init1[DS]
+; CHECK:   .lglobl	.init1
+; CHECK:   .csect init1[DS]
+; CHECK: __sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_0: # @init1
+; CHECK: .init1:
+; CHECK: .__sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_0:
+; CHECK:   .lglobl	destruct1[DS]
+; CHECK:   .lglobl	.destruct1
+; CHECK:   .csect destruct1[DS]
+; CHECK: __sterm8000_clang_ac404299654d2af7eae71e75c17f7c9b_0: # @destruct1
+; CHECK: .destruct1:
+; CHECK: .__sterm8000_clang_ac404299654d2af7eae71e75c17f7c9b_0:
+; CHECK:   .lglobl	init2[DS]
+; CHECK:   .lglobl	.init2
+; CHECK:   .csect init2[DS]
+; CHECK: __sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_1: # @init2
+; CHECK: .init2:
+; CHECK: .__sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_1:
+; CHECK:   .lglobl	destruct2[DS]
+; CHECK:   .lglobl	.destruct2
+; CHECK:   .csect destruct2[DS]
+; CHECK: 

[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 3 inline comments as done.
Xiangling_L added inline comments.



Comment at: llvm/include/llvm/CodeGen/AsmPrinter.h:466
+
+  bool preprocessStructorList(const DataLayout , const Constant *List,
+  SmallVector );

jasonliu wrote:
> Xiangling_L wrote:
> > jasonliu wrote:
> > > Xiangling_L wrote:
> > > > jasonliu wrote:
> > > > > A doxygen comment describe what this function does, and what its 
> > > > > return value means, and mention `Structors` is an output argument.
> > > > > By looking at what this function does, it seems `buildStructorList` 
> > > > > is a better name.
> > > > I meant to and should've named this function to 
> > > > `preprocessXXStructorList`, let me know if you still prefer 
> > > > `buildStructorList`. And if you do, since the underneath of 
> > > > `SmallVector` is a variable-sized array, maybe we should try 
> > > > `buildSortedStructorArray`?
> > > `preprocess` sounds like we are already having a XXStructorList and now 
> > > we try to do something on it. 
> > > But right now, we are actually passing in an empty StructorList/Array and 
> > > build it from scratch. So I would still prefer the name of `build` in it.
> > > I don't mind changing to a more accurate name as you suggested. 
> > I think we do have a `XXStructorList` here which is the initializer of 
> > `llvm.gloal_ctors`or `llvm.gloal_dtors` array? The usage of this term is  
> > consistent with other spots.
> My understanding is that before we enter this `preprocessXXStructorList`, we 
> do not have a list of XXStructor. We only have a list of `Constant`. This 
> functions turns a list of `Constant` to a list of `XXStructor`. 
Just leave a record here, as we discussed offline, we agree that the meaning of 
term `XXStructorList` is `the initializer of `llvm.gloal_ctors` or 
`llvm.gloal_dtors` array. So I will keep using `preprocessXXStructorList` as 
the function name.


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[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-06 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 5 inline comments as done.
Xiangling_L added inline comments.



Comment at: llvm/include/llvm/CodeGen/AsmPrinter.h:466
+
+  bool preprocessStructorList(const DataLayout , const Constant *List,
+  SmallVector );

jasonliu wrote:
> Xiangling_L wrote:
> > jasonliu wrote:
> > > A doxygen comment describe what this function does, and what its return 
> > > value means, and mention `Structors` is an output argument.
> > > By looking at what this function does, it seems `buildStructorList` is a 
> > > better name.
> > I meant to and should've named this function to `preprocessXXStructorList`, 
> > let me know if you still prefer `buildStructorList`. And if you do, since 
> > the underneath of `SmallVector` is a variable-sized array, maybe we should 
> > try `buildSortedStructorArray`?
> `preprocess` sounds like we are already having a XXStructorList and now we 
> try to do something on it. 
> But right now, we are actually passing in an empty StructorList/Array and 
> build it from scratch. So I would still prefer the name of `build` in it.
> I don't mind changing to a more accurate name as you suggested. 
I think we do have a `XXStructorList` here which is the initializer of 
`llvm.gloal_ctors`or `llvm.gloal_dtors` array? The usage of this term is  
consistent with other spots.



Comment at: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:2107
+  if (!isa(List))
+return false;
 

jasonliu wrote:
> Return of boolean seems unnecessary. 
> Callee could check the size of the Structors to decide if they want an early 
> return or not (or in this particular case, the for loop would just do nothing 
> and no need for extra condition if you don't mind the call to 
> getPointerPrefAlignment or assign to 0 to Index)?
> So we could just return void for this function?
Yeah, we could do that. But it looks a boolean return value makes the code flow 
natural. And if any target does want to control the early return in the future, 
it's flexbile for them to do that. I am wondering is there any big difference 
between bool and void return value for this function? 


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[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-10 Thread Xiangling Liao via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG6ef801aa6bc0: [AIX] Static init frontend recovery and 
backend support (authored by Xiangling_L).

Changed prior to commit:
  https://reviews.llvm.org/D84534?vs=283712=284355#toc

Repository:
  rG LLVM Github Monorepo

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Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/aix-static-init-debug-info.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
  clang/test/CodeGenCXX/aix-static-init.cpp
  clang/unittests/CodeGen/IncrementalProcessingTest.cpp
  llvm/include/llvm/CodeGen/AsmPrinter.h
  llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll

Index: llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
@@ -0,0 +1,10 @@
+; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 655, void ()* @foo, i8* null }]
+
+define void @foo() {
+  ret void
+}
+
+; CHECK: LLVM ERROR: prioritized sinit and sterm functions are not yet supported
Index: llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
@@ -0,0 +1,10 @@
+; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff %s 2>&1 | FileCheck %s
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
+
+define internal void @foo() {
+  ret void
+}
+
+; CHECK: LLVM ERROR: cannot produce a unique identifier for this module based on strong external symbols
Index: llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
@@ -0,0 +1,12 @@
+; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@v = global i8 0
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* @v}]
+
+define void @foo() {
+  ret void
+}
+
+; CHECK: LLVM ERROR: associated data of XXStructor list is not yet supported on AIX
Index: llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
@@ -0,0 +1,60 @@
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+
+@llvm.global_ctors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init1, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @init2, i8* null }]
+@llvm.global_dtors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @destruct1, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @destruct2, i8* null }]
+
+define i32 @extFunc() {
+entry:
+  ret i32 3
+}
+
+define internal void @init1() {
+  ret void
+}
+
+define internal void @destruct1() {
+  ret void
+}
+
+define internal void @init2() {
+  ret void
+}
+
+define internal void @destruct2() {
+  ret void
+}
+
+; CHECK:   .lglobl	init1[DS]
+; CHECK:   .lglobl	.init1
+; CHECK:   .csect init1[DS]
+; CHECK: __sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_0: # @init1
+; CHECK: .init1:
+; CHECK: .__sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_0:
+; CHECK:   .lglobl	destruct1[DS]
+; CHECK:   .lglobl	.destruct1
+; CHECK:   .csect destruct1[DS]
+; CHECK: __sterm8000_clang_ac404299654d2af7eae71e75c17f7c9b_0: # @destruct1
+; CHECK: .destruct1:
+; CHECK: .__sterm8000_clang_ac404299654d2af7eae71e75c17f7c9b_0:
+; CHECK:   .lglobl	init2[DS]
+; CHECK:   .lglobl	.init2
+; CHECK:   .csect init2[DS]
+; CHECK: __sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_1: # @init2
+; CHECK: .init2:
+; CHECK: 

[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-04 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1865
+if (isSpecialLLVMGlobalArrayForStaticInit()) {
+  if (GlobalUniqueModuleId.empty()) {
+GlobalUniqueModuleId = getUniqueModuleId();

jasonliu wrote:
> We will need to move this part of the if statement to the overrided 
> `emitXXStructorList` as well. (If we think overriding `emitXXStructorList` 
> and calling `emitSpecialLLVMGlobal ` directly is a good idea.)
`getUniqueModuleId` takes `Module` as a parameter, if we want to invoke this 
function inside of `emitXXStructorList` through `emitSpecialLLVMGlobal`, we 
have to change the interface of them, which seems not ideal.


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[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-04 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 6 inline comments as done.
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/CodeGenModule.h:1058
+  /// Add an sterm finalizer to its own llvm.global_dtors entry.
+  void AddCXXStermFinalizerToGlobalDtor(llvm::Function *StermFinalizer,
+int Priority) {

jasonliu wrote:
> This wrapper seems redundant. Calling ` AddGlobalDtor(StermFinalizer, 
> Priority);` directly from the callee side already convey what we are trying 
> to achieve here. 
I added this wrapper function to keep the symmetry between `AddGlobalCtor` and 
`AddGlobalDtor`. They are private functions within `CodeGenModule` class. And I 
feel it's kinda weird to only move `AddGlobalDtor` to a public function.



Comment at: clang/lib/CodeGen/ItaniumCXXABI.cpp:4602
+llvm::report_fatal_error(
+"prioritized __sinit and __sterm functions are not yet supported");
+  else if (isTemplateInstantiation(D.getTemplateSpecializationKind()) ||

jasonliu wrote:
> Could we trigger this error? If so, could we have a test for it? 
I should've put an assertion here. The init priority attribute has been 
disabled on AIX in the previous patch.



Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1874
+  }
+  emitSpecialLLVMGlobal();
+  continue;

jasonliu wrote:
> Have some suggestion on structure backend code change:
> 
> 1. Remove `isSpecialLLVMGlobalArrayForStaticInit` and 
> `isSpecialLLVMGlobalArrayToSkip`, and call `emitSpecialLLVMGlobal` directly 
> instead. This would handle all the `llvm.` variable for us. We would need do 
> early return for names start with `llvm.` in emitGlobalVariable as well, 
> since they are all handled here.
> 
> 2. We could override emitXXStructorList because how XCOFF handle the list is 
> vastly different than the other target. We could make the common part(i.e. 
> processing and sorting) a utility function, say "preprocessStructorList".
> 
> 3. It's not necessary to use the same name `emitXXStructor` if the interface 
> is different. It might not provide much help when we kinda know no other 
> target is going to use this interface. So we could turn it into a lambda 
> inside of the overrided emitXXStructorList, or simply no need for a new 
> function because the logic is fairly straightforward.
> 
1. As we discussed offline, we would leave the handling of `llvm.used` and 
`llvm.metadata` later and don't include them in the scope of this patch.


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[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked 7 inline comments as done.
Xiangling_L added inline comments.



Comment at: llvm/include/llvm/CodeGen/AsmPrinter.h:466
+
+  bool preprocessStructorList(const DataLayout , const Constant *List,
+  SmallVector );

jasonliu wrote:
> A doxygen comment describe what this function does, and what its return value 
> means, and mention `Structors` is an output argument.
> By looking at what this function does, it seems `buildStructorList` is a 
> better name.
I meant to and should've named this function to `preprocessXXStructorList`, let 
me know if you still prefer `buildStructorList`. And if you do, since the 
underneath of `SmallVector` is a variable-sized array, maybe we should try 
`buildSortedStructorArray`?



Comment at: llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll:6
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, 
void ()*, i8* } { i32 65535, void ()* @foo, i8* @v}]
+

jasonliu wrote:
> Adding this test case would looks like we already decided how to handle .ref 
> in clang and llvm. But in fact, we haven't. I would prefer not having this 
> test.
As we discussed offline, I would adjust the error message instead.


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[PATCH] D84534: [AIX] Static init frontend recovery and backend support

2020-08-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L updated this revision to Diff 283396.
Xiangling_L marked 2 inline comments as done.
Xiangling_L added a comment.

Added descriptions for struct and functions;
Addressed other comments;


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Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/lib/CodeGen/CodeGenModule.h
  clang/lib/CodeGen/ItaniumCXXABI.cpp
  clang/test/CodeGenCXX/aix-static-init-debug-info.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
  clang/test/CodeGenCXX/aix-static-init.cpp
  clang/unittests/CodeGen/IncrementalProcessingTest.cpp
  llvm/include/llvm/CodeGen/AsmPrinter.h
  llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
  llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll

Index: llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
@@ -0,0 +1,10 @@
+; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 655, void ()* @foo, i8* null }]
+
+define void @foo() {
+  ret void
+}
+
+// CHECK: LLVM ERROR: prioritized sinit and sterm functions are not yet supported
Index: llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-no-unique-module-id.ll
@@ -0,0 +1,7 @@
+; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
+@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @bar, i8* null }]
+
+// CHECK: LLVM ERROR: cannot produce a unique identifier for this module based on strong external symbols
Index: llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-key-object.ll
@@ -0,0 +1,12 @@
+; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+
+@v = global i8 0
+
+@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* @v}]
+
+define void @foo() {
+  ret void
+}
+
+// CHECK: LLVM ERROR: associated data of XXStructor list is not yet supported on AIX
Index: llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
===
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/aix-static-init-default-priority.ll
@@ -0,0 +1,60 @@
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+
+@llvm.global_ctors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @init1, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @init2, i8* null }]
+@llvm.global_dtors = appending global [2 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @destruct1, i8* null }, { i32, void ()*, i8* } { i32 65535, void ()* @destruct2, i8* null }]
+
+define i32 @extFunc() {
+entry:
+  ret i32 3
+}
+
+define internal void @init1() {
+  ret void
+}
+
+define internal void @destruct1() {
+  ret void
+}
+
+define internal void @init2() {
+  ret void
+}
+
+define internal void @destruct2() {
+  ret void
+}
+
+; CHECK:   .lglobl	init1[DS]
+; CHECK:   .lglobl	.init1
+; CHECK:   .csect init1[DS]
+; CHECK: __sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_0: # @init1
+; CHECK: .init1:
+; CHECK: .__sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_0:
+; CHECK:   .lglobl	destruct1[DS]
+; CHECK:   .lglobl	.destruct1
+; CHECK:   .csect destruct1[DS]
+; CHECK: __sterm8000_clang_ac404299654d2af7eae71e75c17f7c9b_0: # @destruct1
+; CHECK: .destruct1:
+; CHECK: .__sterm8000_clang_ac404299654d2af7eae71e75c17f7c9b_0:
+; CHECK:   .lglobl	init2[DS]
+; CHECK:   .lglobl	.init2
+; CHECK:   .csect init2[DS]
+; CHECK: __sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_1: # @init2
+; CHECK: .init2:
+; CHECK: .__sinit8000_clang_ac404299654d2af7eae71e75c17f7c9b_1:
+; CHECK:   .lglobl	

[PATCH] D85191: [AST] Get field size in chars rather than bits in RecordLayoutBuilder.

2020-08-04 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/AST/RecordLayoutBuilder.cpp:1841
   auto setDeclInfo = [&](bool IsIncompleteArrayType) {
-TypeInfo TI = Context.getTypeInfo(D->getType());
-FieldAlign = Context.toCharUnitsFromBits(TI.Align);
+auto TI = Context.getTypeInfoInChars(D->getType());
+FieldAlign = TI.second;

In most cases, `getTypeInfoInChars` invokes `getTypeInfo` underneath. So to 
make people be careful about this, I would suggest to leave a comment 
explaining/claiming we have to call `getTypeInfoInChars` here. And also maybe 
adding a testcase to guard the scenario you were talking about would be helpful 
to prevent someone to use `getTypeInfo` here in the future.


Repository:
  rG LLVM Github Monorepo

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[PATCH] D82806: [AIX] Static init support for template specialization and inline variable

2020-06-29 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L created this revision.
Xiangling_L added reviewers: hubert.reinterpretcast, jasonliu, yusra.syeda, 
ZarkoCA, sfertile.
Herald added subscribers: cfe-commits, jfb.
Herald added a project: clang.

This is a follow-up patch of D74166 .

This patch adds static init support for template specialization kinds that were 
left out by D74166  [implicit instantiation, 
explicit instantiation definition] and inline variable.

Also.it adds a test for explicit specialization TSK.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D82806

Files:
  clang/lib/CodeGen/CGDeclCXX.cpp
  clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp

Index: clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
===
--- /dev/null
+++ clang/test/CodeGenCXX/aix-static-init-temp-spec-and-inline-var.cpp
@@ -0,0 +1,238 @@
+// RUN: %clang_cc1 -triple powerpc-ibm-aix-xcoff -S -emit-llvm -x c++ \
+// RUN: -std=c++2a < %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK32 %s
+
+// RUN: %clang_cc1 -triple powerpc64-ibm-aix-xcoff -S -emit-llvm -x c++ \
+// RUN: -std=c++2a < %s | \
+// RUN:   FileCheck --check-prefixes=CHECK,CHECK64 %s
+
+namespace test1 {
+  struct Test1 {
+Test1(int) {}
+~Test1() {}
+  };
+
+  Test1 t0 = 2;
+  template  Test1 t1 = 2;
+  inline Test1 t2 = 2;
+
+  void foo() {
+(void) ;
+  }
+} // namespace test1
+
+namespace test2 {
+  template 
+  struct A {
+A() {}
+~A() {}
+static A instance;
+  };
+
+  template  A A::instance;
+  template A<> A<>::instance;
+
+  A () { 
+A *a = new A;
+return *a;
+  }
+  template<> A A::instance = bar();
+} // namespace test2
+
+// CHECK: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sinit8000_clang_32add9385a76444cd9d0fab0fb83307b, i8* null }]
+// CHECK: @llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @__sterm8000_clang_32add9385a76444cd9d0fab0fb83307b, i8* null }]
+
+// CHECK: define internal void @__cxx_global_var_init() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK32: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* @_ZN5test12t0E, i32 2)
+// CHECK64: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* @_ZN5test12t0E, i32 signext 2)
+// CHECK:   %0 = call i32 @atexit(void ()* @__dtor__ZN5test12t0E)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__dtor__ZN5test12t0E() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @_ZN5test15Test1D1Ev(%"struct.test1::Test1"* @_ZN5test12t0E)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @atexit(void ()*)
+
+// CHECK: define internal void @__finalize__ZN5test12t0E() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor__ZN5test12t0E)
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// CHECK: destruct.call:
+// CHECK:   call void @__dtor__ZN5test12t0E()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+ //CHECK:   ret void
+// CHECK: }
+
+// CHECK: declare i32 @unatexit(void ()*)
+
+// CHECK: define internal void @__cxx_global_var_init.1() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = load atomic i8, i8* bitcast (i64* @_ZGVN5test12t2E to i8*) acquire
+// CHECK:   %guard.uninitialized = icmp eq i8 %0, 0
+// CHECK:   br i1 %guard.uninitialized, label %init.check, label %init.end
+
+// CHECK: init.check:
+ //CHECK:   %1 = call i32 @__cxa_guard_acquire(i64* @_ZGVN5test12t2E)
+// CHECK:   %tobool = icmp ne i32 %1, 0
+// CHECK:   br i1 %tobool, label %init, label %init.end
+
+// CHECK: init:
+// CHECK32: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* @_ZN5test12t2E, i32 2)
+// CHECK64: call void @_ZN5test15Test1C1Ei(%"struct.test1::Test1"* @_ZN5test12t2E, i32 signext 2)
+// CHECK:   %2 = call i32 @atexit(void ()* @__dtor__ZN5test12t2E)
+// CHECK:   call void @__cxa_guard_release(i64* @_ZGVN5test12t2E)
+// CHECK:   br label %init.end
+
+// CHECK: init.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__dtor__ZN5test12t2E() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   call void @_ZN5test15Test1D1Ev(%"struct.test1::Test1"* @_ZN5test12t2E)
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void @__finalize__ZN5test12t2E() [[ATTR:#[0-9]+]] {
+// CHECK: entry:
+// CHECK:   %0 = call i32 @unatexit(void ()* @__dtor__ZN5test12t2E)
+// CHECK:   %needs_destruct = icmp eq i32 %0, 0
+// CHECK:   br i1 %needs_destruct, label %destruct.call, label %destruct.end
+
+// CHECK: destruct.call:
+// CHECK:   call void @__dtor__ZN5test12t2E()
+// CHECK:   br label %destruct.end
+
+// CHECK: destruct.end:
+// CHECK:   ret void
+// CHECK: }
+
+// CHECK: define internal void 

[PATCH] D79719: [AIX] Implement AIX special alignment rule about double/long double

2020-07-02 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L marked an inline comment as done.
Xiangling_L added inline comments.



Comment at: clang/test/Layout/aix-double-struct-member.cpp:1
+// RUN: %clang_cc1 -emit-llvm-only -triple powerpc-ibm-aix-xcoff \
+// RUN: -fdump-record-layouts -fsyntax-only %s 2>/dev/null | \

hubert.reinterpretcast wrote:
> I am concerned that none of the tests actually create an instance of the 
> classes under test and check the alignment (or related adjustments) in the 
> IR. That is, we set up the preferred alignment value but don't check that we 
> use it where we should.
> 
> As it is, it seems array new/delete has problems:
> ```
> #include 
> extern "C" void *calloc(decltype(sizeof 0), decltype(sizeof 0));
> extern "C" void free(void *);
> extern "C" int printf(const char *, ...);
> 
> extern void *allocated_ptr;
> extern decltype(sizeof 0) allocated_size;
> struct B {
>   double d;
>   ~B() {}
>   static void *operator new[](decltype(sizeof 0) sz);
>   static void operator delete[](void *p, decltype(sizeof 0) sz);
> };
> B *allocBp();
> 
> #ifdef ALLOCBP
> void *allocated_ptr;
> decltype(sizeof 0) allocated_size;
> void *B::operator new[](decltype(sizeof 0) sz) {
>   void *alloc = calloc(1u, allocated_size = sz);
>   printf("%p: %s\n", alloc, __PRETTY_FUNCTION__);
>   printf("%zu\n", sz);
>   return allocated_ptr = alloc;
> }
> void B::operator delete[](void *p, decltype(sizeof 0) sz) {
>   printf("%p: %s\n", p, __PRETTY_FUNCTION__);
>   printf("%zu\n", sz);
>   assert(sz == allocated_size);
>   assert(p == allocated_ptr);
>   free(p);
> }
> B *allocBp() { return new B[2]; }
> #endif
> 
> #ifdef MAIN
> int main(void) { delete[] allocBp(); }
> #endif
> ```
> 
> The `xlclang++` invocation from XL C/C++ generates padding before the 32-bit 
> `new[]` cookie. I'm not seeing that padding with this patch.
Thank. I will create more practical testcases as you mentioned in your concern. 
And regarding to `padding before the 32-bit new[] cookie` issue, I am wondering 
is that part of `power` alignment rule or what rules do we follow to generate 
this kind of padding?


Repository:
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https://reviews.llvm.org/D79719



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