[coreboot] Re: Call for testing: Weird behavior of the EC on Thinkpad X230s

, Persmule ‐‐‐ Original Message ‐‐‐ On Thursday, July 16, 2020 5:10 PM, Angel Pons wrote: > Hi Persmule, > > On Thu, Jul 16, 2020 at 5:02 PM Persmule persm...@hardenedlinux.org wrote: > > > Hi Angel Pons, > > ‐‐‐ Original Message ‐‐‐ > > On Thursday

[coreboot] Re: Call for testing: Weird behavior of the EC on Thinkpad X230s

Hi Angel Pons, ‐‐‐ Original Message ‐‐‐ On Thursday, July 16, 2020 2:47 PM, Angel Pons wrote: > > I suspect that reusing the H8 EC code for the xx30 series Thinkpads is > a source of bugs. There isn't any H8 EC on those mainboards anymore, > the EC was replaced with a completely

[coreboot] Call for testing: Weird behavior of the EC on Thinkpad X230s

by blocking the Pin with a small piece of insulating tape. Since I have experienced only one X230s, I cannot tell which one is the real case. Could ye help me to confirm and/or improve this if ye have a chance to access your own Thinkpad X230s? Regards, Persmule Distribution Kernel version

[coreboot] Re: simplest fmap for minimal vboot deployment

And if so, NV storage seems not required any more under schemes without RW slot. Best regards, Persmule ‐‐‐ Original Message ‐‐‐ On Monday, August 19, 2019 7:57 AM, Persmule wrote: > Thanks. Though I would rather push a change ( > https://review.coreboot.org/c/coreboot/+

[coreboot] Re: simplest fmap for minimal vboot deployment

Thanks Micha, The exemplar fmd you linked is very close to the simplest scheme I imagine. I may be going to work on the build system, in order to generate such fmd automatically in the future, since there is a Kconfig variable CBFS_SIZE which actually stands for the size of SI_BIOS section,

[coreboot] Re: simplest fmap for minimal vboot deployment

Hi Michal, On Wednesday, August 7, 2019 10:06 AM, Michal Zygowski wrote: > Here is an > example:https://github.com/coreboot/coreboot/blob/master/src/mainboard/lenovo/x220/vboot-rwa.fmd > > Vboot is responsible for firmware verification (checks firmware signature > blocks). The TPM

[coreboot] simplest fmap for minimal vboot deployment

Hi all, I found the typical fmap for a coreboot build using vboot (e.g. those for chromeos) is quite complex, at least with two RW sections containing CBFS, but I only want to use vboot to perform TPM measurement (like what head does with a patched coreboot), so the simple scheme with a single

[coreboot] Re: Locking coreboot against internal flashing

在 2019/2/17 下午5:02, Nico Huber 写道: > When you are sure that you want a lock, you still have to decide what > kind of lock. And that depends on what you actually want to protect > against (e.g. online attack by a compromised OS) and how much flexi- > bility you are willing to sacrifice (e.g. online

[coreboot] Re: Locking coreboot against internal flashing

在 2019/2/17 下午5:02, Nico Huber 写道: > When you are sure that you want a lock, you still have to decide what > kind of lock. And that depends on what you actually want to protect > against (e.g. online attack by a compromised OS) and how much flexi- > bility you are willing to sacrifice (e.g. online

Re: [coreboot] Issue report

Hi all, Later I noticed that it is reported from #coreboot that linux needs "acpi=noirq" to boot properly 在 2018年03月01日 18:08, Persmule 写道: > > Hi Heymans, > > Today I performed a test on my x230, which shows that commit > d2d2aef6a3222af909183fb96dc7bc908fac3cd4 ( >

Re: [coreboot] Berlin Meeting 21. Sep Thursday @afra_berlin

It is, and it could be used to program wson-8 chip on board. I have heard that some x230 do come with wson-8 chips. Martin Kepplinger 于 2017 年 9 月 20 日 星期三 写道: > On 2017-09-18 05:47, Persmule wrote: > > 在 2017年09月18日 10:45, diffusae via coreboot 写道: > >> On 18.09.2017 04:35,

Re: [coreboot] Berlin Meeting 21. Sep Thursday @afra_berlin

在 2017年09月18日 10:45, diffusae via coreboot 写道: > On 18.09.2017 04:35, Alexander Couzens wrote: >> On Mon, 18 Sep 2017 02:17:56 + >> Persmule <persm...@gmail.com> wrote: >> >>> Why solder is needed? X230 is in-system >>> programmable with even a

Re: [coreboot] Berlin Meeting 21. Sep Thursday @afra_berlin

在 2017年09月18日 10:45, diffusae via coreboot 写道: > On 18.09.2017 04:35, Alexander Couzens wrote: >> On Mon, 18 Sep 2017 02:17:56 + >> Persmule <persm...@gmail.com> wrote: >> >>> Why solder is needed? X230 is in-system >>> programmable with even a

Re: [coreboot] Berlin Meeting 21. Sep Thursday @afra_berlin

Why solder is needed? X230 is in-system programmable with even a ch341a. Alexander Couzens 于 2017 年 9 月 18 日 星期一 写道: > > We can also desolder your spi chip, programm it and put it back. But > that's also a way I wouldn't recommend doing to often. > > Best, > lynxis > -- > Alexander Couzens >

Re: [coreboot] Question about finalization of SMM

Hi all, I have just finished a fix for it and pushed as https://review.coreboot.org/#/c/21129/ . The test result against an x230 with fixed coreboot is attached. Best regards, Persmule 在 2017年08月18日 16:52, Nico Huber 写道: > On 18.08.2017 09:20, Shawn wrote: >> On Tue, Aug 15, 2017 a

[coreboot] Question about finalization of SMM

MI APM_CNT is expected to be triggered with APM_CNT == APM_CNT_FINALIZE, and which component of the system (e.g. coreboot, payload, or os kernel) is responsible for the triggering? Thanks. Persmule [*] running module: chipsec.modules.memconf

[coreboot] Question about finalization of SMM

t. I would like to ask, that when does the smm is expected to be finalized, and which component of the system (e.g. coreboot, payload, or os kernel) is responsible for that? Thanks. Persmule [*] running module: chipsec.modules.memconf

Re: [coreboot] Lenovo X220t variants with SMD-Flash-ROMs

, and finally replace it with a soic-8 chip. There is an article mentioned wson-8 chips: https://www.coreboot.org/Board:lenovo/t430s Persmule 在 2017年08月06日 00:01, Philipp Stanner 写道: > Hi list, > > I don't know if it's common yet (the wiki article doesn't mention it) > but today

Re: [coreboot] Can you please send me your Intel ME firmware dump?

Hi, I could never send you anything extracted from MY flash chip, in order not to violate copyright and similar laws, but I could help you to resolve issues you met when dumping your own flash chip. Could you describe your issues about spi flash dumping? Persmule 在 2017年06月11日 19:09, Umang

Re: [coreboot] X200s: Are the WXGA+ (1440x900) screens supported?

Hi Daniel, Briefly saying, yes. This is a log generated on an x200s with wxga+ screen, and native graphic init works with no problem: https://review.coreboot.org/cgit/board-status.git/tree/lenovo/x200/4.6-122-ga7092750b2/2017-05-14T03_08_55Z Persmule 在 2017年05月21日 18:20, Daniel Kulesz via

Re: [coreboot] Remote security exploit in all 2008+ Intel platforms

We could just remove or cleanse the ME to seal this loophole. 在 2017年05月02日 00:13, Sam Kuper 写道: > On 01/05/2017, Shawn wrote: >> https://semiaccurate.com/2017/05/01/remote-security-exploit-2008-intel-platforms/ > The piece states, "on

Re: [coreboot] [RFH] Please test current code on your devices before coreboot 4.6 release

Thanks Patrick, Currently I have resolved this by using grub payload directly. Persmule 在 2017年04月28日 00:54, Patrick Rudolph 写道: > Hi Persmule, > I did some tests on thinkpad T430. > I disabled SeaBios CONFIG_TCGBIOS and was able to communicate with TPM > in GNU Linux, did a self t

[coreboot] BIOS region alignment on ivybridge platforms.

should be aligned to 64KiB (0x1) on ivybridges. Sandybridges do not have such limitation. Persmule -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [RFH] Please test current code on your devices before coreboot 4.6 release

a little on x230. Persmule 在 2017年04月14日 07:48, Paul Menzel via coreboot 写道: > Dear coreboot folks, > > > coreboot 4.6 is planned to be released on Monday, so please take ten > minutes, and build the current master branch for your board, flash it, > boot it, and upload the status t

[coreboot] Some weird phenomina related to suspension on my x230 with coreboot and cleansed ME.

s DONE. I guess it may be related to the MRC cache. Persmule signature.asc Description: OpenPGP digital signature -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [RFH] Please test current code on your devices before coreboot 4.6 release

sata 5 and 6 as Esata on its back and dock. Persmule 在 2017年04月14日 07:48, Paul Menzel via coreboot 写道: > Dear coreboot folks, > > > coreboot 4.6 is planned to be released on Monday, so please take ten > minutes, and build the current master branch for your board, flash it, > b

Re: [coreboot] ThinkPad X230 with working truncated ME and 11 MB space for payload

No. I set both ENABLE_VMX and SET_VMX_LOCK_BIT. And there is no weird reports from kvm. Persmule 在 2017年04月16日 20:27, Marek Behun 写道: > Hello persmule, > I am now using coreboot master with ME cleaned to 96 KiB, as you said. > There is only one thing: sometimes when booting the kern

Re: [coreboot] ThinkPad X230 with working truncated ME and 11 MB space for payload

The ethernet controller DOES work. Everything is fine, except the 3~5 minutes first boot, as well as those I reported in the initial email yesterday. 在 2017年04月15日 22:52, Marek Behun 写道: > Will the ethernet controller work? > > On Sat, 15 Apr 2017 21:55:52 +0800 > persmule <per

Re: [coreboot] ThinkPad X230 with working truncated ME and 11 MB space for payload

be BUP nad ROMP, all other modules are free to cleanse. Try again, please, for your own freedom and security, and report your results on https://github.com/corna/me_cleaner/issues/3 Persmule. 在 2017年04月15日 20:13, Marek Behun 写道: > I have just now managed to flash my X230 with ME truncated to 828

Re: [coreboot] [RFH] Please test current code on your devices before coreboot 4.6 release

Marek, Your could check the newist me_cleaner (https://github.com/corna/me_cleaner/). I will attach my flash layout file to ease your hacking. Persmule 在 2017年04月14日 22:59, Marek Behun 写道: >> The ME region has been cleansed and shrinked to minimal size with >> me_cleaner (0ac4b4bfd)

Re: [coreboot] [RFH] Please test current code on your devices before coreboot 4.6 release

在 2017年04月14日 07:48, Paul Menzel via coreboot 写道: > And if you notice a regression, please send a message to the list or > create an issue in the issue tracker [1]. > On a0729d9a56, if the first boot after flash is done on dock 433615W

Re: [coreboot] Power supply and X220

Hi Matt, Mail to al...@fripost.org and CC to coreboot@coreboot.org, please, otherwise Albin may not be able to receive our mails, as he seems not subscribed into the mailing list. Best regards, Persmule 在 2017年03月22日 13:07

Re: [coreboot] Power supply and X220

Hi again, I have not used serial to control the BBB, but use SSH over usbnet. Besides, I did not connect the external power to pin 3, but the dedicated power plug seat (The black one with a "5V" sticker). Cheers,

Re: [coreboot] Power supply and X220

regards, Persmule 在 2017年03月21日 18:55, Albin 写道: Dear Persmule, First, thank you for your work on free software. I'm following your guide[1] to replace Bios on my Thinkpad X220 with a neutralized coreboot using a BBB rev. C and an ATX power

[coreboot] We need a place to hold the knowledge about the Manageability Engine.

to hold such knowledge. Is it possible and convenient to set up a place inside coreboot's wiki, as a substitude of me.bios.io? Persmule signature.asc Description: OpenPGP digital signature -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman

[coreboot] x200s' nvram will reset to default value if last boot is a normal boot of debian.

lue, I may have to write those value to cmos.default, enable STATIC_OPTION_TABLE, and then build them into the image. The problem should be inside the Debian user land. Do you guys have any clue how to locate it? Best regards, Persmule # This image was built using coreboot 4.5-843-g404f8ef420 CON

[coreboot] Using laptop's ME on desktop.

, in situations where discrete graphic cards are feasible or headless usage, this scheme may be useful, as more space is left for CBFS. Persmule. -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Neutralizing ME firmware

.org/wiki/Digital_Millennium_Copyright_Act>-supporters. Regard, Persmule 在 2016年11月30日 00:27, Lee Whitney 写道: > > Hi Persmule, > > > In case you didn't see it, your article was well received on HN (link > below). > > > Also I made an offer in the comments, good anytime if you come through > Te

Re: [coreboot] More experiments with disabling the ME

who hate the despicable ME blob, even on a board with no coreboot available. Persmule 在 2016年11月19日 00:24, Nicola Corna 写道: Hi Persmule, for the ME in the board status repo I used a ME image extracted from a Chromebook C710 BIOS dump, you can find

Re: [coreboot] More experiments with disabling the ME

that the ME in board-status is 3MiB smaller than mine. Persmule 在 2016年11月14日 21:06, Nicola Corna 写道: >> Hi Federico,You guys seem to have successfully built a usable >> coreboot image for >> x220. Could you share its revision and config file? >> I have never built &

Re: [coreboot] More experiments with disabling the ME

Hi Federico, You guys seem to have successfully built a usable coreboot image for x220. Could you share its revision and config file? I have never built such usable image till now. Besides, is script file me_cleaner.py downloadable somewhere? Persmule. 在 2016年11月12日 22:41, Federico Amedeo Izzo

Re: [coreboot] More experiments with disabling the ME

Hi everybody, After a manual shutdown and repower, the integrated NIC is functional again. Has similar phenominon been observed yet? 在 2016年11月11日 17:02, Persmule 写道: Hi everybody, * Sandy Bridge accepts an Intel ME

Re: [coreboot] More experiments with disabling the ME

Hi everybody, > * Sandy Bridge accepts an Intel ME firmware with just the FTPR partition, > both > with and without a valid FPT (the partition table of the Intel ME image). > The system doesn't power off after 30 minutes, and the ME reports a > successful initialization (see

[coreboot] Necessary information to gather in order to start porting for new candidate platforms (This time a DFI-CA331-NR).

eboot.org/Developer_Manual#Supporting_a_new_board_with_the_same_cpu_family.2C_chipset_but_different_superIO>/. What further information should be gathered before I start porting? Best Regard. Persmule [0.00] Linux version 4.6.3-pmagic64 (root@Darkstar) (gcc version 4.8.2 (GCC) ) #1 SM

[coreboot] Necessary information to gather in order to start porting for new candidate platforms (This time a DFI-CA331-NR).

but different superIO. What further information should be gathered before I start porting? Best Regard. Persmule [0.00] Linux version 4.6.3-pmagic64 (root@Darkstar) (gcc version 4.8.2 (GCC) ) #1 SMP Mon Jun 27 11:17:29 CDT 2016 [0.00] Command line

Re: [coreboot] How to protect binary in flash chip? OTP?

ill become impossible if copy protection is applied. As you have said, the problem seems only lying between you and some hardware vendors. I suggest you not let it harm end users of your code. Please forgive my arrogence, but please, do not harm end users. On Fri May  6 12:17:51 2016 Persm

Re: [coreboot] How to protect binary in flash chip? OTP?

Sorry for my rudeness, but I do not believe copy protection, or any form of immoral Digital Restriction Management is able to be a solution to count products. On Fri May  6 11:39:54 2016 Zheng Bao wrote: > I don't protect my source. I gave the source to customers. I

Re: [coreboot] How to protect binary in flash chip? OTP?

Don't you feel ashamed to ask coreboot, a free firmware project, for copy protection techiques? On Fri May  6 08:45:51 2016 Zheng Bao wrote: > Hi, All, > Is there any way to protect the binary image in flash chip from being > copied? Once the customers gets the image,

[coreboot] Target candidate: Dell Latitude E4300

image, which will be sent to you soon, too. Regards, Persmule. flashrom v0.9.7-r1852 on Linux 4.3.0-1-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.3.1, GCC 5.2.1 20151010, little endian Command line (2 args): /usr/sbin

[coreboot] coreboot candidate: Dell Latitude E4300

/T, for it (at least mine) even lacks a ME. Because the succeed for GS45 in X200S/T, I think it's a good porting target for coreboot. It would also be an instant libreboot port, once in coreboot, being GS45. What does the community think about this? Worth it? Regards, Persmule. signature.asc