Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/21/2018 07:35 AM, Youness Alaoui wrote: > Hi Piotr, Hi Youness, > > Great, I'm glad the ucode was indeed the issue, and that I was > lucky enough to spot it. I think it doesn't get added correctly > because the path might be wrong ?

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

Hi Piotr, Great, I'm glad the ucode was indeed the issue, and that I was lucky enough to spot it. I think it doesn't get added correctly because the path might be wrong ? unless you put the ucode bin file in the root directory of coreboot, then it might not find it, or maybe it's another option

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/18/2018 07:53 PM, Youness Alaoui wrote: > Hi Piotr, Hi Youness, > Here's my librem13v2 info as reported by coreboot : CPU: Intel(R) > Core(TM) i7-6500U CPU @ 2.50GHz CPU: ID 406e3, Skylake D0, ucode: > 00c1 CPU: AES supported, TXT NOT

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

Great Youness. I guess you got the point it might be ucode. Sent from my iPhone > On 18-May-2018, at 11:23 PM, Youness Alaoui > wrote: > > coreboot : -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

Hi Piotr, The Librems use the FSP 2.0 for SKL because I was told (I can't remember by who, but I think it was on coreboot IRC channel) that the FSP 2.0 works for both Skylake and Kabylake and that FSP 2.0 was better supported within coreboot than FSP 1.1. We had the Librems use FSP 1.1 before,

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

Hello Piotr, On 17.05.2018 18:20, Banik, Subrata wrote: >>> FSP2.0, I'm following Librem Purism options since they seem to boot the >>> same SoC. They use KabyLake FSP obtained by get_blobss.sh [1], if you >>> think this is incorrect then I would like to know why, because it may >>> mean that

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

>> FSP2.0, I'm following Librem Purism options since they seem to boot the same >> SoC. They use KabyLake FSP obtained by get_blobss.sh [1], if you think this >> is incorrect then I would like to know why, because it may mean that Pursim >> code is also incorrect from Intel point of view. SKL

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

If its a SKL platform then I would prefer to get SKL fsp as those were tested configuration. I would also recommend you to reach out Intel customer facing team to let you out here. Sent from my iPhone > On 18-May-2018, at 7:14 PM, Piotr Król wrote: > > -BEGIN PGP

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

Piotr Król, I have submitted a patch today to overcome some AP timeout issue. https://review.coreboot.org/#/c/coreboot/+/26286/ Can you please pick this, and see if you are still seeing timeout issue or not. I would also interested to know about the number of core you have on your system. I

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

Can you please check few more things and please help to clarify some details. 1. Is this kind of regression ? because we are not seeing this issue. 2. I believe its FSP1.1 selection in Kconfig, please confirm ? 3. Please check if BIOS_RESET_CPL is already set prior to setting 0x121 MSR

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

Please find my answer inline. Thanks, Subrata -Original Message- From: Piotr Król [mailto:piotr.k...@3mdeb.com] Sent: Thursday, May 17, 2018 5:38 PM To: Banik, Subrata Cc: coreboot@coreboot.org Subject: Re: Exception on Skylake after enabling ACPI timer

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA512 On 05/17/2018 06:20 PM, Banik, Subrata wrote: Hi Subrata, >>> FSP2.0, I'm following Librem Purism options since they seem to >>> boot the same SoC. They use KabyLake FSP obtained by >>> get_blobss.sh [1], if you think this is incorrect then I

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/17/2018 06:08 PM, Piotr Król wrote: Hi Subrata, > >> 3. Please check if BIOS_RESET_CPL is already set prior to >> setting 0x121 MSR Refer to code enable_bios_reset_cpl > > Will do that and get back with result. BIOS_RESET_CPL was not

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/17/2018 05:21 PM, Banik, Subrata wrote: Hi Subrata, > Can you please check few more things and please help to clarify > some details. > > 1. Is this kind of regression ? because we are not seeing this > issue. Can't tell that it is first

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/17/2018 02:11 PM, Banik, Subrata wrote: Subrata, > > [Subrata] this specific issue, we haven't seen on any KBL/SKL > system we have. I can double confirm this value tomorrow. For now, > please try to check if increasing timeout is helping

Re: [coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/17/2018 01:51 PM, Banik, Subrata wrote: > Piotr Król, Hi Subrata, > > I have submitted a patch today to overcome some AP timeout issue. > > https://review.coreboot.org/#/c/coreboot/+/26286/ > > Can you please pick this, and see if you

[coreboot] Exception on Skylake after enabling ACPI timer emulation

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi Surbata, I'm trying to enable i7-6500 custom hardware and facing exception when boot flow hit enable_pm_timer_emulation which you submitted in Feb 2017. Stack look like that: Enable ACPI Timer Emulation via MSR 0x121 CPU Index 0 - APIC 0