Hi
There is a bug in the DWARF DIE class whIch crashes covoar and returns a -9. I
have a fix but I have no computer access to finishes the changes and push the
fix. I hope to be back sometime next week. I am sorry about this.
Chris
> On 21 Jul 2018, at 10:19 am, Vijay Kumar Banerjee
>
On Fri, Jul 20, 2018, 10:08 PM Joel Sherrill wrote:
>
>
> On Fri, Jul 20, 2018 at 9:14 AM, Gedare Bloom wrote:
>
>> On Thu, Jul 19, 2018 at 6:29 PM, Vijay Kumar Banerjee
>> wrote:
>> > Hello,
>> >
>> > I used the following command
>> >
>> >
>> >
On Fri, Jul 20, 2018 at 9:14 AM, Gedare Bloom wrote:
> On Thu, Jul 19, 2018 at 6:29 PM, Vijay Kumar Banerjee
> wrote:
> > Hello,
> >
> > I used the following command
> >
> >
> > $HOME/development/rtems/test/rtems-tools/tester/rtems-test \
> >
On Fri, Jul 20, 2018, 9:19 PM Gedare Bloom wrote:
> On Fri, Jul 20, 2018 at 11:43 AM, Vijay Kumar Banerjee
> wrote:
> > On 20 July 2018 at 19:44, Gedare Bloom wrote:
> >>
> >> On Thu, Jul 19, 2018 at 6:29 PM, Vijay Kumar Banerjee
> >> wrote:
> >> > Hello,
> >> >
> >> > I used the following
On Fri, Jul 20, 2018 at 11:46 AM, Sebastian Huber
wrote:
> - Am 20. Jul 2018 um 16:28 schrieb Gedare Bloom ged...@rtems.org:
>
>> I want to reiterate my comment that some ISAs have valid instructions
>> with an encoding of all zeroes. Off the top of my head, MIPS32 of all
>> 0s is the
I will replace this Newlib version with the snapshot from today. It should fix
the 16-bit issues.
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
On Fri, Jul 20, 2018 at 11:43 AM, Vijay Kumar Banerjee
wrote:
> On 20 July 2018 at 19:44, Gedare Bloom wrote:
>>
>> On Thu, Jul 19, 2018 at 6:29 PM, Vijay Kumar Banerjee
>> wrote:
>> > Hello,
>> >
>> > I used the following command
>> >
>> >
>> >
- Am 20. Jul 2018 um 16:28 schrieb Gedare Bloom ged...@rtems.org:
> I want to reiterate my comment that some ISAs have valid instructions
> with an encoding of all zeroes. Off the top of my head, MIPS32 of all
> 0s is the encoding for sll $0, $0, 0, which is a nop.
Yes, I added some special
On 20 July 2018 at 19:44, Gedare Bloom wrote:
> On Thu, Jul 19, 2018 at 6:29 PM, Vijay Kumar Banerjee
> wrote:
> > Hello,
> >
> > I used the following command
> >
> >
> > $HOME/development/rtems/test/rtems-tools/tester/rtems-test \
> >
- Am 20. Jul 2018 um 17:35 schrieb joel j...@rtems.org:
> On Fri, Jul 20, 2018 at 10:22 AM, Amaan Cheval
> wrote:
>
>> On Fri, Jul 20, 2018 at 12:18 AM, Joel Sherrill wrote:
[...]
>> - How our GCC toolchains implicitly have "-lrtemsbsp -lrtemscpu" for
>> when -qrtems is used[1]
>>
>>
On Fri, Jul 20, 2018 at 10:22 AM, Amaan Cheval
wrote:
> On Fri, Jul 20, 2018 at 12:18 AM, Joel Sherrill wrote:
> >
> >
> > On Thu, Jul 19, 2018 at 1:37 PM, Sebastian Huber
> > wrote:
> >>
> >>
> >>
> >> - Am 19. Jul 2018 um 17:03 schrieb joel j...@rtems.org:
> >>
> >> > On Thu, Jul 19,
On Fri, Jul 20, 2018 at 12:18 AM, Joel Sherrill wrote:
>
>
> On Thu, Jul 19, 2018 at 1:37 PM, Sebastian Huber
> wrote:
>>
>>
>>
>> - Am 19. Jul 2018 um 17:03 schrieb joel j...@rtems.org:
>>
>> > On Thu, Jul 19, 2018 at 8:49 AM, Gedare Bloom wrote:
>> >
>> >> For now we don't need to
I want to reiterate my comment that some ISAs have valid instructions
with an encoding of all zeroes. Off the top of my head, MIPS32 of all
0s is the encoding for sll $0, $0, 0, which is a nop.
I am not too sure about the purpose of the test anymore, as if an
illegal instruction exception occurs,
This seems fine to me.
On Fri, Jul 20, 2018 at 2:53 AM, Sebastian Huber
wrote:
> This helps to reduce the use of architecture-specific defines throughout
> the code base.
> ---
> cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 5 +
>
On 20/07/18 15:39, Joel Sherrill wrote:
There is an odd warning about chown having an absolute path. Any idea
what's up with your environment?
This always shows up on openSUSE.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47
On 20/07/18 16:19, Gedare Bloom wrote:
I guess this just follows the pattern used for binutils/gdb on same
targets. Seems fine to me.
Yes, this is copy and paste form some lines above.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49
I guess this just follows the pattern used for binutils/gdb on same
targets. Seems fine to me.
On Fri, Jul 20, 2018 at 4:53 AM, Sebastian Huber
wrote:
> ---
> source-builder/config/gcc-common-1.cfg | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
Probably not too many. I believe most popular 16-bit targets these
days are AVR/Arduino type that have their own libc and development
ecosystem.
I think we made a decision to deprecate/abandon 16-bit support some time ago...
On Fri, Jul 20, 2018 at 7:10 AM, Sebastian Huber
wrote:
> How many
On Thu, Jul 19, 2018 at 6:29 PM, Vijay Kumar Banerjee
wrote:
> Hello,
>
> I used the following command
>
>
> $HOME/development/rtems/test/rtems-tools/tester/rtems-test \
> --rtems-tools=$HOME/development/rtems/5 --log=coverage_analysis.log \
> --no-clean --coverage=score
Hello,
is the x86_64 patch still necessary for Binutils 2.31.1?
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on
How many 16-bit Newlib users are there?
https://sourceware.org/ml/newlib/2018/msg00550.html
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP
---
source-builder/config/gcc-common-1.cfg | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/source-builder/config/gcc-common-1.cfg
b/source-builder/config/gcc-common-1.cfg
index 03d84bc..b432fdf 100644
--- a/source-builder/config/gcc-common-1.cfg
+++
Update #3342.
Update #3343.
Update #3452.
---
rtems/config/5/rtems-default.bset | 2 +-
rtems/config/5/rtems-epiphany.bset | 2 +-
rtems/config/5/rtems-m32c.bset | 2 +-
rtems/config/5/rtems-or1k.bset | 2 +-
---
rtems/config/5/rtems-default.bset| 2 +-
rtems/config/5/rtems-epiphany.bset | 2 +-
rtems/config/5/rtems-m32c.bset | 2 +-
rtems/config/5/rtems-or1k.bset | 2 +-
rtems/config/5/rtems-riscv32.bset| 2 +-
The context validation support functions _CPU_Context_validate() and
_CPU_Context_volatile_clobber() are used only by one test program
(spcontext01). Move the function declarations to the CPU port
implementation header file.
---
cpukit/score/cpu/arm/include/rtems/score/cpu.h | 4 ---
This helps to reduce the use of architecture-specific defines throughout
the code base.
---
cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 5 +
cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h | 5 +
cpukit/score/cpu/epiphany/include/rtems/score/cpuimpl.h | 5 +
On some architectures/simulators it is difficult to provoke an
exception with misaligned or illegal data loads. Use an illegal
instruction instead.
Update #3433.
---
cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h | 5 +
cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h | 5
27 matches
Mail list logo
