On Thu, 12 Apr 2012, Hans Rosenfeld wrote:
I was hoping to investigate GCC's bdver1 output (which does try to
address L1 instruction cache issues) on Illumos but I discovered that
Illumos is not currently capable of executing this code (illegal
instruction).
Did you test this with the latest
On Fri, Apr 13, 2012 at 08:57:21AM -0500, Bob Friesenhahn wrote:
On Thu, 12 Apr 2012, Hans Rosenfeld wrote:
I was hoping to investigate GCC's bdver1 output (which does try to
address L1 instruction cache issues) on Illumos but I discovered that
Illumos is not currently capable of executing
On Fri, 13 Apr 2012, Hans Rosenfeld wrote:
These messages appear in 'cpustat -h' output on Opteron 62XX:
CPU performance counter interface: AMD Family 15h (unsupported)
See BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h
Processors. (Note that this pcbe does not explicitly
As a follow-up to this discussion, one reason why my application shows
that locks are held for a long time is that it currently only uses
simple mutex locks. It should also be using condition variables to
handle the case of waiting for work to do (rather than access
locking).
Regardless,
