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From: Thierry Reding
OpenBSD wants to reuse this file but needs the license to be more
permissive.
Acked-by: Alban Bedel
Acked-by: Daniel Vetter
Signed-off-by: Thierry Reding
---
include/linux/hdmi.h | 21 ++---
1 file changed, 18 insertions(+), 3
Hi Jerome,
yeah that's what we have already planned for the IOCTLs anyway.
The main question currently is rather how we do the fence representation
and synchronization between different engines.
For fences I think we can agree to use 64bit values (maybe plus engine
index) for internal
From: Mark yao
This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao
---
Changes in v2:
- rename "lcdc" to "vop"
- add vop reset
- add iommu node
- add port for display-subsystem
Changes in v3: None
Changes in v4: None
Changes in v5:
From: Mark yao
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao
---
Changes in v2:
- add DRM master device node to list all display nodes that comprise
the graphics subsystem.
Changes in v3: None
Changes in v4: None
From: Mark yao
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark Yao
Signed-off-by: Daniel Kurtz
Acked-by: Daniel Vetter
Reviewed-by: Rob Clark
---
Changes in v2:
- use the component framework to defer main drm driver probe
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices. Future patches will add additional encoders/connectors,
such as eDP, HDMI.
The basic "crtc" for rockchip is a "VOP" - Video Output Processor.
the vop devices found on Rockchip rk3288 Soc, rk3288 soc have two
On Mon, Sep 22, 2014 at 12:11:54PM +0200, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Mon, Sep 22, 2014 at 11:00:56AM +0200, Lucas Stach wrote:
> > Am Freitag, den 19.09.2014, 15:53 -0400 schrieb Sean Paul:
> > > Per NVidia, this clock rate should be around 70MHz in
> > > order
On 2014?10?08? 12:23, Mark Yao wrote:
> From: Mark yao
>
> This patch adds the basic structure of a DRM Driver for Rockchip Socs.
>
> Signed-off-by: Mark Yao
> Signed-off-by: Daniel Kurtz
> Acked-by: Daniel Vetter
> Reviewed-by: Rob Clark
> ---
> Changes in v2:
> - use the component framework
While the DMA channel is running, it is not allowed to change anything
but the inactive (double) buffer base address, so resizing a plane or
changing to a frame buffer with different pixel format is not possible.
Signed-off-by: Philipp Zabel
---
drivers/staging/imx-drm/ipuv3-plane.c | 15
This allows to update the buffer base address while the DMA
channel is running. It is needed to flip the frame buffer of
an active plane.
Signed-off-by: Philipp Zabel
---
Changes since v2:
- Rebased onto 7d2691da901d (gpu: ipu-v3: Add ipu-cpmem unit)
---
drivers/staging/imx-drm/ipuv3-plane.c |
Setting the stride can only be done on inactive channels, while
the buffer base address can also be updated for running channels
using the hardware double buffering feature.
Signed-off-by: Philipp Zabel
---
Changes since v2:
- Rebased onto 7d2691da901d (gpu: ipu-v3: Add ipu-cpmem unit)
---
For the overlay plane scanning out a framebuffer with an alpha component,
enable the DP local alpha feature on the partial plane.
Signed-off-by: Philipp Zabel
---
drivers/staging/imx-drm/ipuv3-plane.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git
The IC register offset is at +0x2 relative to the control module
registers on all IPUv3 versions. This patch fixes wrong values for
i.MX51 and i.MX53.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
:(
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On Wed, Oct 08, 2014 at 10:45:48AM +0100, Chris Wilson wrote:
> On Wed, Oct 08, 2014 at 11:16:38AM +0200, Daniel Vetter wrote:
> > On Tue, Oct 7, 2014 at 3:13 PM, Chris Wilson
> > wrote:
> > > The implmentation is simple in the extreme: we only want to wait for
> > > events if the device was
1 bytes
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-10.3 which contains the commit
mentioned in comment 0.
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On 01/10/2014 16:53, Boris Brezillon :
> From: Boris BREZILLON
>
> The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
> at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
> controller device.
>
> This display controller supports at least one primary plane
https://bugzilla.kernel.org/show_bug.cgi?id=85421
--- Comment #2 from Hin-Tak Leung ---
The patches listed above don't fix the problem. Had another GPU lock-up while
just switching window from an upload file dialog in firefox (another bugzilla
else) to a terminal to change permission of the file
https://bugzilla.kernel.org/show_bug.cgi?id=84981
--- Comment #4 from Apostolos B. ---
This and the previous happened while watching YT videos but it might be
unrelated.
Oct 08 15:23:27 mainland kernel: general protection fault: [#1] PREEMPT
SMP
Oct 08 15:23:27 mainland kernel: Modules
From: Mark yao
This adds binding documentation for Rockchip SoC VOP driver.
Signed-off-by: Mark Yao
---
Changes in v2:
- rename "lcdc" to "vop"
- add vop reset
- add iommu node
- add port for display-subsystem
Changes in v3: None
Changes in v4: None
Changes in v5:
From: Mark yao
This add a display subsystem comprise the all display interface nodes.
Signed-off-by: Mark Yao
---
Changes in v2:
- add DRM master device node to list all display nodes that comprise
the graphics subsystem.
Changes in v3: None
Changes in v4: None
From: Mark yao
This patch adds the basic structure of a DRM Driver for Rockchip Socs.
Signed-off-by: Mark Yao
Signed-off-by: Daniel Kurtz
Acked-by: Daniel Vetter
Reviewed-by: Rob Clark
---
Changes in v2:
- use the component framework to defer main drm driver probe
This a series of patches is a DRM Driver for Rockchip Socs, add support
for vop devices. Future patches will add additional encoders/connectors,
such as eDP, HDMI.
The basic "crtc" for rockchip is a "VOP" - Video Output Processor.
the vop devices found on Rockchip rk3288 Soc, rk3288 soc have two
On 2014? 10? 08? 11:57, Vivek Gautam wrote:
> Hi,
>
>
> On Mon, Sep 15, 2014 at 6:43 PM, Vivek Gautam
> wrote:
>> Now that we have moved to generic phy based bindings,
>> we don't need to have any code related to older dptx-phy.
>> Nobody is using this dptx-phy anymore, so removing the
>>
Hi,
So if i do not start the discussion now it might be already too late. Given
plan to converge open source driver and closed source driver to use a single
common kernel driver and that this would be a new kernel driver. This is an
opportunity to fix some of the radeon design issues (at least
Make drm_mode_add_fb() call drm_mode_add_fb2() after converting its
args to the new internal format, instead of duplicating code.
Also picks up a lot more error checking, which the legacy modes
should pass after being converted to the new format.
Signed-off-by: Chuck Ebbert
---
drm_crtc.c |
Fix:
ioclt -> ioctl in comment
wrong variable name in debug message
Signed-off-by: Chuck Ebbert
---
--- drivers/gpu/drm/drm_crtc.c.orig 2014-10-08 11:29:50.948406186 -0500
+++ drivers/gpu/drm/drm_crtc.c 2014-10-08 11:30:55.781479300 -0500
@@ -2913,7 +2913,7 @@
Make drm_mode_add_fb() call drm_mode_add_fb2() after converting its
args to the new internal format, instead of duplicating code.
Also picks up a lot more error checking, which the legacy modes
should pass after being converted to the new format.
Signed-off-by: Chuck Ebbert
---
drm_crtc.c |
On Tue, Oct 7, 2014 at 3:13 PM, Chris Wilson
wrote:
> The implmentation is simple in the extreme: we only want to wait for
> events if the device was opened in blocking mode, otherwise we grab what
> is available and report an error if there was none.
>
> Signed-off-by: Chris Wilson
> Cc:
On Mon, Oct 6, 2014 at 2:25 PM, Lauri Peltonen wrote:
>> Also, the problem is that to actually push android stuff out of staging
>> you need a use-case in upstream, which means an open-source gpu driver.
>> There's not a lot of companies who have both that and ship android, and
>> definitely not
On Tue, Oct 07, 2014 at 06:01:10PM +0300, Ville Syrj?l? wrote:
> On Tue, Oct 07, 2014 at 05:47:52PM +0300, Ville Syrj?l? wrote:
> > On Wed, Sep 24, 2014 at 02:20:25PM -0300, Gustavo Padovan wrote:
> > > From: Gustavo Padovan
> > >
> > > Move check inside intel_crtc_cursor_set_obj() to
> > >
On Wed, Oct 08, 2014 at 11:16:38AM +0200, Daniel Vetter wrote:
> On Tue, Oct 7, 2014 at 3:13 PM, Chris Wilson
> wrote:
> > The implmentation is simple in the extreme: we only want to wait for
> > events if the device was opened in blocking mode, otherwise we grab what
> > is available and report
On 2014? 10? 08? 00:28, Inki Dae wrote:
>
> Sorry for late.
>
> On 2014? 10? 07? 21:27, Andrzej Hajda wrote:
>> Hi Inki,
>>
>> Gently ping.
>>
>> Andrzej
>>
>>
>> On 09/19/2014 02:57 PM, Andrzej Hajda wrote:
>>> Initialization of vblank with MAX_CRTC caused attempts
>>> to disabling vblanks for
vel/attachments/20141008/68637e0b/attachment.html>
y to keep.
Regards
-?ark
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ease
> file another report about that.
No, so it seems like it's make that fails to update that for me unless I have
distcleaned.
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that can happen is
that we need to change the binding at some point, in which case we may
have to special-case early drivers, but I really don't think that's as
much of an issue as everybody seems to think.
This series has been floating around for months because we're being
overly prudent to accept a binding that /may/ turn out to not be generic
enough.
Thierry
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On Wed, Oct 8, 2014 at 8:11 AM, Peter De Schrijver
wrote:
> On Mon, Sep 22, 2014 at 12:11:54PM +0200, Thierry Reding wrote:
>> * PGP Signed by an unknown key
>>
>> On Mon, Sep 22, 2014 at 11:00:56AM +0200, Lucas Stach wrote:
>> > Am Freitag, den 19.09.2014, 15:53 -0400 schrieb Sean Paul:
>> > >
uot;
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Hi,
CC'ing Kukjin,
my bad, missed him while sending the patch. :-(
On Wed, Oct 8, 2014 at 8:27 AM, Vivek Gautam
wrote:
> Hi,
>
>
> On Mon, Sep 15, 2014 at 6:43 PM, Vivek Gautam
> wrote:
>> Now that we have moved to generic phy based bindings,
>> we don't need to have any code related to
Hi,
CC'ing Kukjin,
my bad, missed him while sending the patch. :-(
On Mon, Sep 15, 2014 at 6:43 PM, Vivek Gautam
wrote:
> DP PHY now require pmu-system-controller to handle PMU register
> to control PHY's power isolation. Adding the same to dp-phy
> node.
>
> Signed-off-by: Vivek Gautam
> Cc:
Hi,
On Mon, Sep 15, 2014 at 6:43 PM, Vivek Gautam
wrote:
> Now that we have moved to generic phy based bindings,
> we don't need to have any code related to older dptx-phy.
> Nobody is using this dptx-phy anymore, so removing the
> same.
>
> Signed-off-by: Vivek Gautam
> Cc: Jingoo Han
> ---
es/dri-devel/attachments/20141008/1d732ca8/attachment.html>
bug.
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use:
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the bug.
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r the bug.
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ing this mail because:
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Reviewed-by: Y.C. Chen
-Original Message-
From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
Sent: Tuesday, October 07, 2014 4:05 PM
To: Dave Airlie
Cc: dri-devel at lists.freedesktop.org; YC Chen
Subject: [PATCH] drm/ast: Fix HW cursor image
The translation from the X
e:
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for the bug.
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Sorry for late.
On 2014? 10? 07? 21:27, Andrzej Hajda wrote:
> Hi Inki,
>
> Gently ping.
>
> Andrzej
>
>
> On 09/19/2014 02:57 PM, Andrzej Hajda wrote:
>> Initialization of vblank with MAX_CRTC caused attempts
>> to disabling vblanks for non-existing crtcs in case
>> drm used fewer crtcs.
encoder object isn't used anymore so remove it.
Signed-off-by: Inki Dae
---
drivers/gpu/drm/exynos/exynos_drm_vidi.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index 9395e85..50faf91 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=84662
--- Comment #23 from Andy Furniss ---
(In reply to Andy Furniss from comment #13)
> (In reply to Michel D?nzer from comment #12)
> > Created attachment 107391 [details] [review] [review]
> > Make Mesa behave as if the kernel was older
> > The
https://bugs.freedesktop.org/show_bug.cgi?id=84662
--- Comment #22 from Andy Furniss ---
(In reply to Alexandre Demers from comment #21)
> > So currently a bit confused - as reported by Christoph in the other bug, it
> > is possible to have good with vanilla mesa/kernel, but apparently for me
I've just been discussing how this relates to rk29xx on #etnaviv. I
looked through the patch and it's good to see it's not limited to
supporting Mali GPUs. I see no reason this wouldn't be compatible
with etna_viv for rk29xx (or future Rockchip designs with alternative
GPUs) as long as the
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