Re: [PATCH v2 1/2] drm/bridge: Add Cadence DSI driver

On 06/06/2017 03:50 PM, Boris Brezillon wrote: Hi Archit, On Sun, 4 Jun 2017 00:20:06 +0530 Archit Taneja wrote: + +#define DPHY_CFG0 0x1b0 +#define DPHY_C_RSTBBIT(20) +#define DPHY_D_RSTB(x) ((x) << 16)

Re: [PATCH v2 2/2] dt-bindings: drm/bridge: Document Cadence DSI bridge bindings

On 06/06/2017 06:28 PM, Tomi Valkeinen wrote: On 06/06/17 15:48, Boris Brezillon wrote: Okay. Thanks for the clarification. Can you confirm that this version is correct? dsi@xxx { #address-cells = <1>; #size-cells = <0>; ports {

syncobj wait patch

I'm going to push the syncobj and sync_file interaction patches into drm-next, but I think this patch still needs a few more trips on the merry go round. I've decided to read Daniel's ioctl guide, use sec/nsec, and convert to timespec internally then use timespec as much as possible. Dave.

[PATCH] drm/syncobj: add sync obj wait interface. (v5)

From: Dave Airlie This interface will allow sync object to be used to back Vulkan fences. This API is pretty much the vulkan fence waiting API, and I've ported the code from amdgpu. v2: accept relative timeout, pass remaining time back to userspace. v3: return to absolute

Re: [PATCH] drm/mediatek: fixup error memory reallocation

On Mon, 2017-06-12 at 15:15 +0800, YT Shen wrote: > Previous patch (c5f228ef6c drm/mediatek: add *driver_data for different > hardware settings) calls devm_kfree() and then devm_kzalloc() to > reallocate color module data structure. But this reallocation cannnot > guarantee the new address is

linux-next: manual merge of the drm tree with the drm-intel-fixes tree

Hi Dave, Today's linux-next merge of the drm tree got a conflict in: drivers/gpu/drm/i915/intel_pm.c between commit: 1c2d6bbf0433 ("drm/i915: Fix SKL+ watermarks for 90/270 rotation") from the drm-intel-fixes tree and commit: 7084b50bdd8f ("drm/i915/skl+: calculate pixel_rate &

linux-next: manual merge of the drm tree with the drm-intel-fixes tree

Hi Dave, Today's linux-next merge of the drm tree got a conflict in: drivers/gpu/drm/i915/intel_display.c between commit: 9a775e0308b5 ("drm/i915: Fix scaling check for 90/270 degree plane rotation") from the drm-intel-fixes tree and commit: c2c446ad2943 ("drm: Add DRM_MODE_ROTATE_ and

Re: [PATCH v2] staging: vboxvideo: Add vboxvideo to drivers/staging

13.06.2017 15:59, Greg Kroah-Hartman wrote: > On Tue, Jun 13, 2017 at 03:45:14PM +0200, Michael Thayer wrote: >> 13.06.2017 14:48, Greg Kroah-Hartman wrote: >> [Discussion of vboxvideo coding style.] >>> Once your code is accepted into the main kernel tree, why would you >>> continue to work in an

Re: [PATCH v2 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

于 2017年6月13日 GMT+08:00 下午3:44:32, Maxime Ripard 写到: >On Sun, Jun 11, 2017 at 02:43:42PM +0800, icen...@aosc.io wrote: >> 在 2017-06-07 17:38，Maxime Ripard 写道： >> > On Mon, Jun 05, 2017 at 12:01:45AM +0800, Icenowy Zheng wrote: >> > > Allwinner H3 features a TV

[PATCH v2 00/22] Tegra DRM fixes

The major changes of the V2 are: - Dropped "drm/tegra: Check whether page belongs to BO in tegra_bo_kmap()" patch as it is not needed with the checks performed by 'submit' IOCTL. - Dropped "drm/tegra: Remove module ownership from the tegra_fb_ops", turned out it is not needed. Thanks

[PATCH] drm/msm: Separate locking of buffer resources from struct_mutex

Buffer object specific resources like pages, domains, sg list need not be protected with struct_mutex. They can be protected with a buffer object level lock. This simplifies locking and makes it easier to avoid potential recursive locking scenarios for SVM involving mmap_sem and struct_mutex. This

[PATCH v2 02/22] drm/tegra: Correct idr_alloc() minimum id

The client ID 0 is reserved by the host1x/cdma to mark the timeout timer work as already been scheduled and context ID is used as the clients one. This fixes spurious CDMA timeouts. Fixes: bdd2f9cd10eb ("drm/tegra: Don't leak kernel pointer to userspace") Signed-off-by: Dmitry Osipenko

Re: [PATCH] drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY

Hi Laurent, Sorry for the late reply! On 10-06-2017 09:50, Laurent Pinchart wrote: > Hi Jose, > > On Friday 09 Jun 2017 13:53:12 Jose Abreu wrote: >> On 09-06-2017 12:04, Jose Abreu wrote: >>> Currently HDMI 2.0 PHYs do not have a default configuration function. >>> >>> As these PHYs have the

Re: [PATCH 07/22] drm/tegra: Remove module ownership from the tegra_fb_ops

On 13.06.2017 18:07, Thierry Reding wrote: > On Tue, Jun 13, 2017 at 05:00:28PM +0300, Dmitry Osipenko wrote: >> On 13.06.2017 16:43, Thierry Reding wrote: >>> On Tue, May 23, 2017 at 03:14:22AM +0300, Dmitry Osipenko wrote: The framebuffers console fbcon_startup() increments the tegra_drm

[PATCH v2 03/22] drm/tegra: Check for malformed offsets and sizes in the 'submit' IOCTL

If commands buffer claims a number of words that is higher than its BO can fit, a kernel OOPS will be fired on the out-of-bounds BO access. This was triggered by an opentegra Xorg driver that erroneously pushed too many commands to the pushbuf. The CDMA commands buffer address is 4 bytes aligned,

[PATCH v2 12/22] gpu: host1x: Correct host1x_job_pin() error handling

In case of relocations / waitchecks patching failure the jobs pins stay referenced till DRM file get closed, wasting memory. Add the missed unpinning. Signed-off-by: Dmitry Osipenko Reviewed-by: Erik Faye-Lund Reviewed-by: Mikko Perttunen

Re: [PATCH 08/22] drm/tegra: dc: Drop the reset asserts to workaround a bug

On 13.06.2017 16:45, Thierry Reding wrote: > On Tue, May 23, 2017 at 03:14:23AM +0300, Dmitry Osipenko wrote: >> Commit 33a8eb8 ("Implement runtime PM") introduced HW reset control. It >> causes a hang on Tegra20 if both display controllers are utilized (RGB >> panel and HDMI). The TRM suggests

Re: [PATCH v2 03/11] drm: sun4i: ignore swapped mixer<->tcon connection for DE2

On Tue, Jun 13, 2017 at 5:43 PM, Maxime Ripard wrote: > On Sat, Jun 10, 2017 at 10:57:28PM +0800, icen...@aosc.io wrote: >> 在 2017-06-09 22:46，Maxime Ripard 写道： >> > On Thu, Jun 08, 2017 at 01:01:53PM +0800, icen...@aosc.io wrote: >> > > 在 2017-06-07 22:38，Maxime

Re: [PATCH 07/22] drm/tegra: Remove module ownership from the tegra_fb_ops

On 13.06.2017 16:43, Thierry Reding wrote: > On Tue, May 23, 2017 at 03:14:22AM +0300, Dmitry Osipenko wrote: >> The framebuffers console fbcon_startup() increments the tegra_drm module >> 'use' refcount via try_module_get(), causing an interlock of the DRM subsys >> and the tegra_drm modules. In

[PATCH v2 08/22] drm/tegra: dc: Disable plane if it is invisible

On Tegra20 if plane has width or height equal to 0, it will be infinitely wide or tall. Let's disable the plane if it is invisible on atomic state committing to fix the issue. The Rockchip DRM driver does the same. Signed-off-by: Dmitry Osipenko --- drivers/gpu/drm/tegra/dc.c

Re: [PATCH v2] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

Hi Maxime, On 13 June 2017 at 21:15, Maxime Ripard wrote: > On Mon, Jun 12, 2017 at 03:52:35PM +1000, Jonathan Liu wrote: >> The drm_get_edid function should be used instead of drm_do_get_edid by >> exposing the DDC bus as an I2C adapter. Implement this for

[PATCH v2 05/22] drm/tegra: Check syncpoint ID in the 'submit' IOCTL

In case of invalid syncpoint ID, the host1x_syncpt_get() returns NULL and none of its users perform a check of the returned pointer later. Let's bail out until it's too late. Signed-off-by: Dmitry Osipenko Reviewed-by: Mikko Perttunen ---

Re: [PATCH 1/3] drm/nouveau/tegra: Skip manual unpowergating when not necessary

On 13.06.2017 01:52, Ben Skeggs wrote: On 06/09/2017 10:25 PM, Mikko Perttunen wrote: On Tegra186, powergating is handled by the BPMP power domain provider and the "legacy" powergating API is not available. Therefore skip these calls if we are attached to a power domain. Thanks Mikko, Taken

[PATCH v2 11/22] gpu: host1x: Initialize firewall class to the jobs one

The commands stream is prepended by the jobs class on the CDMA submission, so that explicitly setting a module class in the commands stream isn't necessary. The firewall initializes its class to 0 and the command stream that doesn't explicitly specify the class effectively bypasses the firewall.

Color lookup support for the atmel-hlcdc driver

Hi! I need color lookup support for the atmel-hlcdc driver, and had a peek at the code. I also looked at the drivers/gpu/drm/stm driver and came up with the below diff. It compiles, but I have not booted it for the simple reason that I can't imagine it will work. Sure, the code fills the clut

[PATCH v2 01/22] drm/tegra: Fix lockup on a use of staging API

Commit bdd2f9cd ("Don't leak kernel pointer to userspace") added a mutex around staging IOCTL's, some of those mutexes are taken twice. Fixes: bdd2f9cd10eb ("drm/tegra: Don't leak kernel pointer to userspace") Signed-off-by: Dmitry Osipenko Reviewed-by: Mikko Perttunen

Re: [PATCH 13/22] gpu: host1x: Do not leak BO's phys address to userspace

On 05/23/2017 03:14 AM, Dmitry Osipenko wrote: Do gathers coping before patching them, so the original gathers are left untouched. That's not as bad as leaking a kernel addresses, but still doesn't feel right. Signed-off-by: Dmitry Osipenko --- drivers/gpu/host1x/job.c | 44

[PATCH v2 10/22] Revert "iommu/tegra: gart: Do not register with bus"

The GART driver was disabled because it was picked by as an IOMMU provider for the DRM driver on Tegra20, which is not the purpose of the GART. Now DRM driver avoids to use IOMMU on Tegra20, so the GART driver can be re-enabled. Potentially there are interesting use cases of the GART for Tegra20,

[PATCH v2 22/22] gpu: host1x: At first try a non-blocking allocation for the gather copy

The blocking gather copy allocation is a major performance downside of the Host1x firewall, it may take hundreds milliseconds which is unacceptable for the real-time graphics operations. Let's try a non-blocking allocation first as a least invasive solution, it makes opentegra (Xorg driver)

[PATCH v2 09/22] drm/tegra: Don't use IOMMU on Tegra20

There is no IOMMU on Tegra20, instead a GART would be picked as an IOMMU provider. Signed-off-by: Dmitry Osipenko Acked-by: Joerg Roedel --- drivers/gpu/drm/tegra/drm.c | 3 ++- drivers/gpu/host1x/dev.c| 3 ++- 2 files changed, 4 insertions(+), 2

[PATCH v2 18/22] gpu: host1x: Check waits in the firewall

Check waits in the firewall in a way it is done for relocations. Signed-off-by: Dmitry Osipenko Reviewed-by: Mikko Perttunen --- drivers/gpu/host1x/job.c | 36 ++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff

[PATCH v2 21/22] gpu: host1x: Refactor channel allocation code

From: Mikko Perttunen This is largely a rewrite of the Host1x channel allocation code, bringing several changes: - The previous code could deadlock due to an interaction between the 'reflock' mutex and CDMA timeout handling. This gets rid of the mutex. - Support for

[PATCH v2 16/22] gpu: host1x: Forbid unrelated SETCLASS opcode in the firewall

Several channels could be made to write the same unit concurrently via the SETCLASS opcode, trusting userspace is a bad idea. It should be possible to drop the per-client channel reservation and add a per-unit locking by inserting MLOCK's to the command stream to re-allow the SETCLASS opcode, but

[PATCH v2 04/22] drm/tegra: Correct copying of waitchecks and disable them in the 'submit' IOCTL

The waitchecks along with multiple syncpoints per submit are not ready for use yet, let's forbid them for now. Signed-off-by: Dmitry Osipenko Reviewed-by: Mikko Perttunen --- drivers/gpu/drm/tegra/drm.c | 60 ++---

[PATCH v2 20/22] gpu: host1x: Remove unused host1x_cdma_stop() definition

There is no host1x_cdma_stop() in the code, let's remove its definition from the header file. Signed-off-by: Dmitry Osipenko Reviewed-by: Erik Faye-Lund Reviewed-by: Mikko Perttunen --- drivers/gpu/host1x/cdma.h | 1 - 1 file

Re: [PATCH 16/22] gpu: host1x: Forbid unrelated SETCLASS opcode in the firewall

On 13.06.2017 17:06, Thierry Reding wrote: > On Tue, May 23, 2017 at 02:39:33AM +0200, Erik Faye-Lund wrote: >> On Tue, May 23, 2017 at 2:14 AM, Dmitry Osipenko wrote: >>> Several channels could be made to write the same unit concurrently via the >>> SETCLASS opcode, trusting

Re: [PATCH v2] staging: vboxvideo: Add vboxvideo to drivers/staging

13.06.2017 14:48, Greg Kroah-Hartman wrote: [Discussion of vboxvideo coding style.] > Once your code is accepted into the main kernel tree, why would you > continue to work in an out-of-tree repo anyway? That's ripe for > disaster, what's keeping you from just working with the in-tree version?

[PATCH v2 17/22] gpu: host1x: Correct swapped arguments in the is_addr_reg() definition

Arguments of the .is_addr_reg() are swapped in the definition of the function, that is quite confusing. Signed-off-by: Dmitry Osipenko Reviewed-by: Erik Faye-Lund Reviewed-by: Mikko Perttunen --- include/linux/host1x.h | 2 +- 1

[PATCH 1/1] drm/mgag200: Fix to always set HiPri for G200e4

From: Mathieu Larouche - Changed the HiPri value for G200e4 to always be 0. - Added Bandwith limitation to block resolution above 1920x1200x60Hz --- drivers/gpu/drm/mgag200/mgag200_mode.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git

[PATCH v2 14/22] gpu: host1x: Forbid relocation address shifting in the firewall

Incorrectly shifted relocation address will cause a lower memory corruption and likely a hang on a write or a read of an arbitrary data in case of IOMMU absent. As of now there is no use for the address shifting (at least on Tegra20) and adding a proper shifting / sizes validation is much more

Re: [PATCH v2] staging: vboxvideo: Add vboxvideo to drivers/staging

12.06.2017 18:03, Greg Kroah-Hartman wrote: > On Mon, Jun 12, 2017 at 05:40:21PM +0200, Hans de Goede wrote: >> Hi, >> >> On 12-06-17 13:44, Greg Kroah-Hartman wrote: >>> On Mon, Jun 12, 2017 at 12:07:41PM +0200, Hans de Goede wrote: > The most important thing is for the driver to be atomic if

Re: [PATCH 13/22] gpu: host1x: Do not leak BO's phys address to userspace

On 06/13/2017 09:21 PM, Dmitry Osipenko wrote: On 13.06.2017 20:31, Mikko Perttunen wrote: On 05/23/2017 03:14 AM, Dmitry Osipenko wrote: Do gathers coping before patching them, so the original gathers are left untouched. That's not as bad as leaking a kernel addresses, but still doesn't

Re: [PATCH 13/22] gpu: host1x: Do not leak BO's phys address to userspace

On 13.06.2017 22:03, Mikko Perttunen wrote: > > > On 06/13/2017 09:21 PM, Dmitry Osipenko wrote: >> On 13.06.2017 20:31, Mikko Perttunen wrote: >>> On 05/23/2017 03:14 AM, Dmitry Osipenko wrote: Do gathers coping before patching them, so the original gathers are left untouched. That's

[PATCH v2 15/22] gpu: host1x: Forbid RESTART opcode in the firewall

The RESTART opcode terminates the gather and restarts the CDMA fetching from a specified word << 2 relative to the CDMA start address. That shouldn't be allowed to be done by userspace. Signed-off-by: Dmitry Osipenko Reviewed-by: Erik Faye-Lund

[PATCH v2 06/22] drm/tegra: dc: Avoid reset asserts on Tegra20

Commit 33a8eb8 ("Implement runtime PM") introduced HW reset control. It causes a hang on Tegra20 if both display controllers are utilized (RGB panel and HDMI). The TRM suggests that each display controller has its own reset control, apparently it is not correct. Fixes: 33a8eb8d40ee ("drm/tegra:

[PATCH v2 13/22] gpu: host1x: Do not leak BO's phys address to userspace

Perform gathers coping before patching them, so that original gathers are left untouched. That's not as bad as leaking kernel addresses, but still doesn't feel right. Signed-off-by: Dmitry Osipenko Reviewed-by: Mikko Perttunen ---

[PATCH v2 19/22] gpu: host1x: Remove unused 'struct host1x_cmdbuf'

The struct host1x_cmdbuf is unused, let's remove it. Signed-off-by: Dmitry Osipenko Reviewed-by: Erik Faye-Lund Reviewed-by: Mikko Perttunen --- drivers/gpu/host1x/job.h | 7 --- 1 file changed, 7 deletions(-) diff --git

Re: [PATCH 13/22] gpu: host1x: Do not leak BO's phys address to userspace

On 13.06.2017 20:31, Mikko Perttunen wrote: > On 05/23/2017 03:14 AM, Dmitry Osipenko wrote: >> Do gathers coping before patching them, so the original gathers are left >> untouched. That's not as bad as leaking a kernel addresses, but still >> doesn't feel right. >> >> Signed-off-by: Dmitry

[PATCH v2 07/22] drm/tegra: dc: Apply clipping to the plane

On Tegra20 an overlay plane should be clipped, otherwise its output is distorted once plane crosses display boundary. Signed-off-by: Dmitry Osipenko --- drivers/gpu/drm/tegra/dc.c | 29 + 1 file changed, 21 insertions(+), 8 deletions(-) diff --git

Re: [PATCH] drm: adv7511_audio: Add .get_dai_id callback to map port number to dai id

On Tue, Jun 13, 2017 at 02:59:49PM -0700, John Stultz wrote: > ALSA SoC needs to know connected DAI ID for probing. Using > the new audio-card-graph approach, ports/endpoints are used > to describe how the links are connected. Unfortunately, since Unless someone objects in the next week or so I

[Bug 101368] Nouveau regression GT218M in Kernel 4.11 Won't Boot

https://bugs.freedesktop.org/show_bug.cgi?id=101368 Ilia Mirkin changed: What|Removed |Added QA Contact|

Re: [PATCH] drm/msm: Separate locking of buffer resources from struct_mutex

On Tue, Jun 13, 2017 at 6:52 PM, Sushmita Susheelendra wrote: > Buffer object specific resources like pages, domains, sg list > need not be protected with struct_mutex. They can be protected > with a buffer object level lock. This simplifies locking and > makes it easier

[radeon-alex:raven 340/1060] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:556:16: note: in expansion of macro 'do_div'

tree: git://people.freedesktop.org/~agd5f/linux.git raven head: c6ee08eda872bc7ac60ed0ba82a5d85e696a894c commit: a1146cea5877c42e10858082cf9018fd63165a92 [340/1060] drm/amdgpu: handle CPU access for split VRAM buffers (v2) config: parisc-allyesconfig (attached as .config) compiler:

[Bug 101415] Error running clBLAS clblas-client: unsupported call to function mem_fence

https://bugs.freedesktop.org/show_bug.cgi?id=101415 Bug ID: 101415 Summary: Error running clBLAS clblas-client: unsupported call to function mem_fence Product: Mesa Version: 17.1 Hardware: x86-64 (AMD64)

Re: [PATCH] drm: adv7511_audio: Add .get_dai_id callback to map port number to dai id

On Tue, Jun 13, 2017 at 2:59 PM, John Stultz wrote: > ALSA SoC needs to know connected DAI ID for probing. Using > the new audio-card-graph approach, ports/endpoints are used > to describe how the links are connected. Unfortunately, since > ports/endpoints are used as well

[PATCH] drm: adv7511_audio: Add .get_dai_id callback to map port number to dai id

ALSA SoC needs to know connected DAI ID for probing. Using the new audio-card-graph approach, ports/endpoints are used to describe how the links are connected. Unfortunately, since ports/endpoints are used as well for video linkages, there are some issues mixing the port ids to the two (video and

[Bug 101368] Nouveau regression GT218M in Kernel 4.11 Won't Boot

https://bugs.freedesktop.org/show_bug.cgi?id=101368 --- Comment #7 from Ilia Mirkin --- Interesting. Dies in PMU preinit somewhere, which in turn calls nkvm_pmu_reset. I don't see an obvious reason for that to die except ... if PTIMER is somehow off? The only difference is

[radeon-alex:amd-staging-4.11 1374/1377] drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_debug.c:335:15: error: 'union bw_context' has no member named 'dcn'; did you mean 'dce'?

tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-4.11 head: ee1356406141af842dcd7f689749fced30185cf4 commit: 42376247f5e6b8f95e70ae9caa8b1d799a836448 [1374/1377] drm/amd/display: add bw logging for dcn config: ia64-allmodconfig (attached as .config) compiler: ia64-linux-gcc

[Bug 101368] Nouveau regression GT218M in Kernel 4.11 Won't Boot

https://bugs.freedesktop.org/show_bug.cgi?id=101368 --- Comment #6 from Ben Steel --- Created attachment 131935 --> https://bugs.freedesktop.org/attachment.cgi?id=131935=edit dmesg with debug=trace Thanks for your efforts. Boot with patched driver

Re: [PATCH 6/6] drm/msm: remove address-space id

On Tue, Jun 13, 2017 at 02:49:48PM -0400, Rob Clark wrote: > Now that the msm_gem supports an arbitrary number of vma's, we no longer > need to assign an id (index) to each address space. So rip out the > associated code. > > Signed-off-by: Rob Clark Acked-by: Jordan

Re: [PATCH 5/6] drm/msm: support for an arbitrary number of address spaces

On Tue, Jun 13, 2017 at 02:49:47PM -0400, Rob Clark wrote: > It means we have to do a list traversal where we once had an index into > a table. But the list will normally have one or two entries. > > Signed-off-by: Rob Clark I dig the rename - makes more sense. Acked-by:

Re: [PATCH 4/6] drm/msm: refactor how we handle vram carveout buffers

On Tue, Jun 13, 2017 at 02:49:46PM -0400, Rob Clark wrote: > Pull some of the logic out into msm_gem_new() (since we don't need to > care about the imported-bo case), and don't defer allocating pages. The > latter is generally a good idea, since if we are using VRAM carveout to > allocate

Re: [PATCH 3/6] drm/msm: pass address-space to _get_iova() and friends

On Tue, Jun 13, 2017 at 02:49:45PM -0400, Rob Clark wrote: > No functional change, that will come later. But this will make it > easier to deal with dynamically created address spaces (ie. per- > process pagetables for gpu). > > Signed-off-by: Rob Clark Acked-by: Jordan

Re: [PATCH 2/6] drm/msm/mdp4+5: move aspace/id to base class

On Tue, Jun 13, 2017 at 02:49:44PM -0400, Rob Clark wrote: > Before we can shift to passing the address-space object to _get_iova(), > we need to fix a few places (dsi+fbdev) that were hard-coding the adress nit - adress -> address. Otherwise, Acked-By: Jordan Crouse >

Re: [PATCH 1/6] drm/msm/mdp5: kill pipe_lock

On Tue, Jun 13, 2017 at 02:49:43PM -0400, Rob Clark wrote: > It serves no purpose, things should be sufficiently synchronized already > by atomic framework. And it is somewhat awkward to be holding a spinlock > when msm_gem_iova() is going to start needing to grab a mutex. > > Signed-off-by: Rob

[PATCH 5/6] drm/msm: support for an arbitrary number of address spaces

It means we have to do a list traversal where we once had an index into a table. But the list will normally have one or two entries. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gem.c | 138 +- drivers/gpu/drm/msm/msm_gem.h |

[PATCH 2/6] drm/msm/mdp4+5: move aspace/id to base class

Before we can shift to passing the address-space object to _get_iova(), we need to fix a few places (dsi+fbdev) that were hard-coding the adress space id. That gets somewhat easier if we just move these to the kms base class. Prep work for next patch. Signed-off-by: Rob Clark

[PATCH 4/6] drm/msm: refactor how we handle vram carveout buffers

Pull some of the logic out into msm_gem_new() (since we don't need to care about the imported-bo case), and don't defer allocating pages. The latter is generally a good idea, since if we are using VRAM carveout to allocate contiguous buffers (ie. no IOMMU), the allocation is more likely to fail.

[PATCH 0/6] drm/msm: support arbitrary number of vma's per gem bo

A step towards having per-process pagetables, we need to be able to map a given buffer into multiple address spaces. This is similar to Jordan's "drm/msm: get an iova from the address space instead of an id" patch, except split up into smaller steps, and fixing some issues with the non-IOMMU

[PATCH 6/6] drm/msm: remove address-space id

Now that the msm_gem supports an arbitrary number of vma's, we no longer need to assign an id (index) to each address space. So rip out the associated code. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 7 ---

[PATCH 1/6] drm/msm/mdp5: kill pipe_lock

It serves no purpose, things should be sufficiently synchronized already by atomic framework. And it is somewhat awkward to be holding a spinlock when msm_gem_iova() is going to start needing to grab a mutex. Signed-off-by: Rob Clark ---

[PATCH 3/6] drm/msm: pass address-space to _get_iova() and friends

No functional change, that will come later. But this will make it easier to deal with dynamically created address spaces (ie. per- process pagetables for gpu). Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8

Re: [PATCH v2] staging: vboxvideo: Add vboxvideo to drivers/staging

On Tue, Jun 13, 2017 at 01:50:16PM +0200, Michael Thayer wrote: > 12.06.2017 18:03, Greg Kroah-Hartman wrote: > > On Mon, Jun 12, 2017 at 05:40:21PM +0200, Hans de Goede wrote: > >> Hi, > >> > >> On 12-06-17 13:44, Greg Kroah-Hartman wrote: > >>> On Mon, Jun 12, 2017 at 12:07:41PM +0200, Hans de

Re: [PATCH 5/7] drm/vc4: Add support for the TXP (transposer) block

Brian Starkey writes: > Hi Boris, > > Sorry lost track of this thread. > > > On Tue, Jun 06, 2017 at 09:13:00PM +0200, Boris Brezillon wrote: >>Hi Brian, >> >>Le Mon, 5 Jun 2017 12:25:50 +0100, >>Brian Starkey a écrit : >> >>> Hi Boris, >>> >>> I

[Bug 196037] Installing Nvidia driver causes fan to run at full speed

https://bugzilla.kernel.org/show_bug.cgi?id=196037 --- Comment #4 from Len Brown (l...@kernel.org) --- > It's absolutely ridiculous. I think the word you are searching for us "unsupported". -- You are receiving this mail because: You are watching the assignee of the bug.

[Bug 101325] UE4Editor crash after pressing "play" with radeon southern island card (7850 HD)

https://bugs.freedesktop.org/show_bug.cgi?id=101325 --- Comment #10 from Julien Isorce --- Hi Luke, I can reproduce the ring stalled issue using your apitrace 100% of the time. In apitrace output I could notice: warning: extension `GL_EXT_gpu_shader4' unsupported in

[Bug 196037] Installing Nvidia driver causes fan to run at full speed

https://bugzilla.kernel.org/show_bug.cgi?id=196037 --- Comment #3 from Mansoor Ahmed (m89...@outlook.com) --- Contacting Nvidia did little help. It just resolved my problem, but still the bug is there. www.devtalk.nvidia.com was the only solution I got. When Nivida was contacted officially they

Re: [PATCH 2/2] drm/vc4: Add get/set tiling ioctls.

Daniel Stone writes: > Hi Eric, > > On 8 June 2017 at 01:13, Eric Anholt wrote: >> This allows mesa to set the tiling format for a BO and have that >> tiling format be respected by mesa on the other side of an >> import/export (and by vc4 scanout in the

Re: [PATCH v2] staging: vboxvideo: Add vboxvideo to drivers/staging

On Tue, Jun 13, 2017 at 05:00:15PM +0200, Michael Thayer wrote: > 13.06.2017 15:59, Greg Kroah-Hartman wrote: > > On Tue, Jun 13, 2017 at 03:45:14PM +0200, Michael Thayer wrote: > >> 13.06.2017 14:48, Greg Kroah-Hartman wrote: > >> [Discussion of vboxvideo coding style.] > >>> Once your code is

Re: Color lookup support for the atmel-hlcdc driver

Hi Peter, On Tue, 13 Jun 2017 16:34:25 +0200 Peter Rosin wrote: > Hi! > > I need color lookup support for the atmel-hlcdc driver, and had a peek > at the code. I also looked at the drivers/gpu/drm/stm driver and came > up with the below diff. It compiles, but I have not booted

Re: [PATCH] drm/panel: Add driver for Seiko 43WVF1G panel

Thierry/Rob, On Mon, May 8, 2017 at 10:54 AM, Fabio Estevam wrote: > On Tue, Apr 25, 2017 at 1:18 PM, Marco Franchi wrote: >> Add driver for Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480) >> TFT with Touch-Panel. >> >> Datasheet available at: >>

Re: [PATCH 07/22] drm/tegra: Remove module ownership from the tegra_fb_ops

On Tue, Jun 13, 2017 at 05:00:28PM +0300, Dmitry Osipenko wrote: > On 13.06.2017 16:43, Thierry Reding wrote: > > On Tue, May 23, 2017 at 03:14:22AM +0300, Dmitry Osipenko wrote: > >> The framebuffers console fbcon_startup() increments the tegra_drm module > >> 'use' refcount via try_module_get(),

Re: [PATCH 08/22] drm/tegra: dc: Drop the reset asserts to workaround a bug

On Tue, Jun 13, 2017 at 05:18:37PM +0300, Dmitry Osipenko wrote: > On 13.06.2017 16:45, Thierry Reding wrote: > > On Tue, May 23, 2017 at 03:14:23AM +0300, Dmitry Osipenko wrote: > >> Commit 33a8eb8 ("Implement runtime PM") introduced HW reset control. It > >> causes a hang on Tegra20 if both

Re: [PATCH] drm/msm: fix locking inconsistency for gpu->hw_init()

On Tue, Jun 13, 2017 at 09:23:45AM -0400, Rob Clark wrote: > Most, but not all, paths where calling the with struct_mutex held. The > fast-path in msm_gem_get_iova() (plus some sub-code-paths that only run > the first time) was masking this issue. > > So lets just always hold struct_mutex for

Re: [PATCH libdrm v8] amdgpu: move asic id table to a separate file

On Tue, Jun 13, 2017 at 5:45 AM, Michel Dänzer wrote: > From: Xiaojie Yuan > > v2: fix an off by one error and leading white spaces > v3: use thread safe strtok_r(); initialize len before calling getline(); > change printf() to drmMsg(); add initial

Re: [PATCH 16/22] gpu: host1x: Forbid unrelated SETCLASS opcode in the firewall

On Tue, May 23, 2017 at 02:39:33AM +0200, Erik Faye-Lund wrote: > On Tue, May 23, 2017 at 2:14 AM, Dmitry Osipenko wrote: > > Several channels could be made to write the same unit concurrently via the > > SETCLASS opcode, trusting userspace is a bad idea. It should be possible

Re: [PATCH v2] staging: vboxvideo: Add vboxvideo to drivers/staging

On Tue, Jun 13, 2017 at 03:45:14PM +0200, Michael Thayer wrote: > 13.06.2017 14:48, Greg Kroah-Hartman wrote: > [Discussion of vboxvideo coding style.] > > Once your code is accepted into the main kernel tree, why would you > > continue to work in an out-of-tree repo anyway? That's ripe for > >

[PATCH][drm-next] drm/i915/cnl: make function cnl_ddi_dp_set_dpll_hw_state static

From: Colin Ian King The function cnl_ddi_dp_set_dpll_hw_state does not need to be in global scope, so make it static. Cleans up sparse warning: "symbol 'cnl_ddi_dp_set_dpll_hw_state' was not declared. Should it be static?" Signed-off-by: Colin Ian King

Re: [PATCH 08/22] drm/tegra: dc: Drop the reset asserts to workaround a bug

On Tue, May 23, 2017 at 03:14:23AM +0300, Dmitry Osipenko wrote: > Commit 33a8eb8 ("Implement runtime PM") introduced HW reset control. It > causes a hang on Tegra20 if both display controllers are utilized (RGB > panel and HDMI). The TRM suggests that each display controller has its own > reset

Re: [PATCH 07/22] drm/tegra: Remove module ownership from the tegra_fb_ops

On Tue, May 23, 2017 at 03:14:22AM +0300, Dmitry Osipenko wrote: > The framebuffers console fbcon_startup() increments the tegra_drm module > 'use' refcount via try_module_get(), causing an interlock of the DRM subsys > and the tegra_drm modules. In result, the tegra_drm module can't be unloaded >

[Bug 99851] [drm:.r600_ring_test [radeon]] *ERROR* radeon: ring 0 test failed (scratch(0x8504)=0xCAFEDEAD)

https://bugs.freedesktop.org/show_bug.cgi?id=99851 --- Comment #49 from intermedi...@hotmail.com --- Hi Michel, can be, i have many kernel traces on Qoriq machine from latest kernels but for what i see look like a qman issue . i dont know if qman have something related

[PATCH] drm/msm: fix locking inconsistency for gpu->hw_init()

Most, but not all, paths where calling the with struct_mutex held. The fast-path in msm_gem_get_iova() (plus some sub-code-paths that only run the first time) was masking this issue. So lets just always hold struct_mutex for hw_init(). And sprinkle some WARN_ON()'s and might_lock() to avoid

[Bug 101387] amdgpu display corruption and hang on AMD A10-9620P

https://bugs.freedesktop.org/show_bug.cgi?id=101387 --- Comment #7 from Carlo Caione --- Just to be clear. I have already verified that the address of and ctx->ps are the same, so this is definitely something we want to fix somehow. -- You are receiving this mail because:

Re: [PATCH v2] staging: vboxvideo: Add vboxvideo to drivers/staging

On Tue, Jun 13, 2017 at 01:50:16PM +0200, Michael Thayer wrote: > 12.06.2017 18:03, Greg Kroah-Hartman wrote: > > On Mon, Jun 12, 2017 at 05:40:21PM +0200, Hans de Goede wrote: > >> Hi, > >> > >> On 12-06-17 13:44, Greg Kroah-Hartman wrote: > >>> On Mon, Jun 12, 2017 at 12:07:41PM +0200, Hans de

Re: [PATCH 01/44] firmware/ivc: use dma_mapping_error

On Thu, Jun 08, 2017 at 03:25:26PM +0200, Christoph Hellwig wrote: > DMA_ERROR_CODE is not supposed to be used by drivers. > > Signed-off-by: Christoph Hellwig > --- > drivers/firmware/tegra/ivc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Acked-by: Thierry Reding

[Bug 100070] Rocket League: grass gets rendered incorrectly

https://bugs.freedesktop.org/show_bug.cgi?id=100070 --- Comment #3 from Gregor Münch --- Thanks for your response, I will try to provide the trace by the end of the week. Im just curious, since Plagman can give you the steam key and the problem also exists on RX470 / RX480

[Bug 101387] amdgpu display corruption and hang on AMD A10-9620P

https://bugs.freedesktop.org/show_bug.cgi?id=101387 --- Comment #6 from Carlo Caione --- Uhm, probably I have found something. In amdgpu_atombios_crtc_powergate_init() we are declaring ENABLE_DISP_POWER_GATING_PARAMETERS_V2_1 args; so that args is basically a 32byte struct.

Re: [PATCH v2] drm/sun4i: hdmi: Implement I2C adapter for A10s DDC bus

On Mon, Jun 12, 2017 at 03:52:35PM +1000, Jonathan Liu wrote: > The drm_get_edid function should be used instead of drm_do_get_edid by > exposing the DDC bus as an I2C adapter. Implement this for A10s. > > Signed-off-by: Jonathan Liu Your commit log should explain *why* that

Re: [PATCH 5/7] drm/vc4: Add support for the TXP (transposer) block

Hi Boris, Sorry lost track of this thread. On Tue, Jun 06, 2017 at 09:13:00PM +0200, Boris Brezillon wrote: Hi Brian, Le Mon, 5 Jun 2017 12:25:50 +0100, Brian Starkey a écrit : Hi Boris, I can't speak for the HW-specific details, but the writeback part looks pretty

Re: [PATCH] drm/exynos/dsi: Remove error handling for bridge_node DT parsing

On 06/13/2017 06:25 PM, Inki Dae wrote: 2017년 06월 09일 18:23에 Hoegeun Kwon 이(가) 쓴 글: The bridge_node is unnecessary between FIMD and DSIM. If don't remove error handling, it will not work between FIMD and DSIM. So remove error handling. Please make sure to describe why bridge_node is

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