On 05/31/2018 11:25 PM, Boris Ostrovsky wrote:
On 05/31/2018 10:41 AM, Oleksandr Andrushchenko wrote:
On 05/31/2018 08:51 AM, Oleksandr Andrushchenko wrote:
On 05/31/2018 04:46 AM, Boris Ostrovsky wrote:
On 05/25/2018 11:33 AM, Oleksandr Andrushchenko wrote:
Oleksandr Andrushchenko (8):
On Fri, Jun 1, 2018 at 2:04 AM, Keith Packard wrote:
> Eric Anholt writes:
>
>> Just wait for all tasks to complete when any object is freed? That's
>> going to be bad for performance. Or are you saying that you already
>> have the connection between the task and its objects (and, if so, why
On Fri, Jun 1, 2018 at 1:51 AM, Eric Anholt wrote:
> Qiang Yu writes:
>
It is OK if evil user free/unmap the buffer when task is not done
in my implementation. It will generate a MMU fault in that case and kernel
driver will do recovery.
So does the Ctrl+C case, if
https://bugs.freedesktop.org/show_bug.cgi?id=106763
Carlos Licea changed:
What|Removed |Added
Summary|thunderbolt 3-way split |thunderbolt 3-way split
https://bugs.freedesktop.org/show_bug.cgi?id=106763
Bug ID: 106763
Summary: thunderbolt 3-way split corruption
Product: Mesa
Version: 18.0
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity:
https://bugs.freedesktop.org/show_bug.cgi?id=106225
--- Comment #31 from Francisco Pina Martins ---
I have used [this
PKGBUILD](https://aur.archlinux.org/cgit/aur.git/tree/PKGBUILD?h=linux-amd-staging-drm-next-git)
to build the kernel.
Albeit considering the version number it looks more like
https://bugs.freedesktop.org/show_bug.cgi?id=105425
--- Comment #76 from MirceaKitsune ---
(In reply to iive from comment #75)
That's what I feared too: I know Mesa depends on a lot of other libraries
(including LLVM) and you can't mix old and new versions between them. This is
my primary
On Wed, May 30, 2018 at 12:41 PM, Colin King wrote:
> From: Colin Ian King
>
> The comparison with the number of elements in array df_v3_7_channel_number
> is off-by-one and can produce an array out-of-bounds read if
> fb_channel_number is equal to the number of elements of the array. Fix
> this
Hi Dave,
Fixes for 4.18. Highlights:
- Improve DC/powerplay interface to allow additional power savings on vega
- DP 1.4 compliance fixes
- Various vega20 fixes
- Fix for DC scale ratios
- Per vm bo fixes
- Scheduler dependency corner case fix
- Misc bug fixes
The following changes since commit
Hi Dave,
Two last minute DC fixes for 4.17. A fix for underscan on fiji and
a fix for gamma settings getting after dpms.
The following changes since commit 0e333751cff1dd7383be15372960a1be6e2b4e47:
Merge tag 'drm-misc-fixes-2018-05-30' of
git://anongit.freedesktop.org/drm/drm-misc into
Eric Anholt writes:
> Just wait for all tasks to complete when any object is freed? That's
> going to be bad for performance. Or are you saying that you already
> have the connection between the task and its objects (and, if so, why
> aren't you just doing refcounting correctly through that
On 30/05/18 15:06, Thierry Reding wrote:
From: Thierry Reding
Depending on the kernel configuration, early ARM architecture setup code
may have attached the GPU to a DMA/IOMMU mapping that transparently uses
the IOMMU to back the DMA API. Tegra requires special handling for IOMMU
backed
On 30/05/18 15:06, Thierry Reding wrote:
From: Thierry Reding
Instead of setting the DMA ops pointer to NULL, set the correct,
non-IOMMU ops depending on the device's coherency setting.
It looks like it's probably been 4 or 5 years since that became subtly
wrong by virtue of the landscape
Qiang Yu writes:
>>>
>>> It is OK if evil user free/unmap the buffer when task is not done
>>> in my implementation. It will generate a MMU fault in that case and kernel
>>> driver will do recovery.
>>>
>>> So does the Ctrl+C case, if don't deal with it, just get some noisy MMU
>>> fault warning
https://bugzilla.kernel.org/show_bug.cgi?id=86351
--- Comment #33 from Christian Birchinger (jo...@netswarm.net) ---
Seems like the issue was only gone because i've also played a video. With only
the desktop open on the HDMI screen audio is still broken.
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From: Michel Dänzer
So that it can be referenced from e.g. DOC comments.
Signed-off-by: Michel Dänzer
---
Documentation/gpu/drm-mm.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst
index 96ebcc2a7b41..21b6b72a9ba8 100644
---
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
Documentation/gpu/amdgpu.rst | 14 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c | 119 ++
2 files changed, 133 insertions(+)
diff --git a/Documentation/gpu/amdgpu.rst b/Documentation/gpu/amdgpu.rst
index
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
Documentation/gpu/amdgpu.rst | 6 ++
Documentation/gpu/drivers.rst | 1 +
2 files changed, 7 insertions(+)
create mode 100644 Documentation/gpu/amdgpu.rst
diff --git a/Documentation/gpu/amdgpu.rst b/Documentation/gpu/amdgpu.rst
new
> +#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
> + if (dev->archdata.mapping) {
> + struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
> +
> + arm_iommu_detach_device(dev);
> + arm_iommu_release_mapping(mapping);
> + }
> +#endif
Having this
Hi Lowry,
Small drive-by suggestion. Haven't checked if others have pointed it
out previously :-\
On 30 May 2018 at 12:23, Lowry Li wrote:
> +/**
> + * drm_plane_create_blend_mode_property - create a new blend mode property
> + * @plane: drm plane
> + * @supported_modes: bitmask of supported
On 05/31/2018 08:51 AM, Oleksandr Andrushchenko wrote:
On 05/31/2018 04:46 AM, Boris Ostrovsky wrote:
On 05/25/2018 11:33 AM, Oleksandr Andrushchenko wrote:
Oleksandr Andrushchenko (8):
xen/grant-table: Make set/clear page private code shared
xen/balloon: Move common memory
On 05/31/2018 08:55 AM, Oleksandr Andrushchenko wrote:
On 05/31/2018 02:10 AM, Dongwon Kim wrote:
On Fri, May 25, 2018 at 06:33:29PM +0300, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
1. Create a dma-buf from grant references provided by the foreign
domain. By default
On 05/31/2018 10:51 AM, Oleksandr Andrushchenko wrote:
On 05/30/2018 10:24 PM, Boris Ostrovsky wrote:
On 05/30/2018 01:46 PM, Oleksandr Andrushchenko wrote:
On 05/30/2018 06:54 PM, Boris Ostrovsky wrote:
BTW, I also think you can further simplify
xenmem_reservation_va_mapping_* routines by
On Thu, May 31, 2018 at 04:01:51PM +0530, Sharat Masetty wrote:
> This patch adds a simple helper function to help write 64 bit payloads
> to the ringbuffer.
>
> Signed-off-by: Sharat Masetty
> ---
> drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12
>
On Thu, May 31, 2018 at 12:52:03PM +0530, Sharat Masetty wrote:
> This is needed for hardware revisions which do not rely on the generic
> suspend, resume handlers for power management.
>
> Signed-off-by: Sharat Masetty
> ---
> drivers/gpu/drm/msm/msm_gpu.c | 23 +++
>
>>
>> It is OK if evil user free/unmap the buffer when task is not done
>> in my implementation. It will generate a MMU fault in that case and kernel
>> driver will do recovery.
>>
>> So does the Ctrl+C case, if don't deal with it, just get some noisy MMU
>> fault warning and a HW reset recovery.
https://bugs.freedesktop.org/show_bug.cgi?id=106757
--- Comment #2 from Michael Arnold ---
Created attachment 139888
--> https://bugs.freedesktop.org/attachment.cgi?id=139888=edit
Qt Application renders correctly under Wayland
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https://bugs.freedesktop.org/show_bug.cgi?id=106757
--- Comment #1 from Michael Arnold ---
Created attachment 139887
--> https://bugs.freedesktop.org/attachment.cgi?id=139887=edit
Qt Application renders incorrectly under XWayland
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https://bugs.freedesktop.org/show_bug.cgi?id=106757
Bug ID: 106757
Summary: Qt's QOpenGLWidget renders a blank screen under
XWayland
Product: Mesa
Version: 18.0
Hardware: x86-64 (AMD64)
OS: Linux (All)
On 31/05/2018 01:26, Rodrigo Vivi wrote:
> On Wed, May 30, 2018 at 06:29:36PM +0300, Ville Syrjälä wrote:
>> On Thu, May 24, 2018 at 11:57:17AM +0200, Neil Armstrong wrote:
>>> This patchs adds the cec_notifier feature to the intel_hdmi part
>>> of the i915 DRM driver. It uses the HDMI DRM
On 30/05/2018 17:29, Ville Syrjälä wrote:
> On Thu, May 24, 2018 at 11:57:17AM +0200, Neil Armstrong wrote:
>> This patchs adds the cec_notifier feature to the intel_hdmi part
>> of the i915 DRM driver. It uses the HDMI DRM connector name to differentiate
>> between each HDMI ports.
>> The changes
https://bugs.freedesktop.org/show_bug.cgi?id=106718
--- Comment #19 from Alex Deucher ---
on the kernel command line in grub.
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Hello Maxime Ripard,
The patch 65f7fa3a3fcb: "drm/sun4i: backend: Check for the number of
alpha planes" from Jun 26, 2017, leads to the following static
checker warning:
drivers/gpu/drm/sun4i/sun4i_backend.c:486 sun4i_backend_atomic_check()
error: 'plane_state' dereferencing
https://bugs.freedesktop.org/show_bug.cgi?id=106446
--- Comment #3 from tempel.jul...@gmail.com ---
Maybe the artifacts with 75Hz are related to my problem I have with 75Hz WQHD
via DL-DVI?
https://bugs.freedesktop.org/show_bug.cgi?id=105300
However, with 72Hz and amdgpu.dc=0, my desktop is
https://bugs.freedesktop.org/show_bug.cgi?id=105425
--- Comment #75 from i...@yahoo.com ---
(In reply to MirceaKitsune from comment #73)
> (In reply to iive from comment #72)
>
> I've thought about testing an older version of Mesa too. Especially since,
> from what I can vaguely remember,
On Mon, Apr 09, 2018 at 11:22:29AM +0200, Maxime Ripard wrote:
> Hi Rob,
>
> On Tue, Apr 03, 2018 at 11:03:30AM -0500, Rob Herring wrote:
> > On Tue, Apr 3, 2018 at 8:29 AM, Maxime Ripard
> > wrote:
> > > Hi,
> > >
> > > We've had for quite some time to hack around in our drivers to take into
>
On 31/05/18 15:41, Tomi Valkeinen wrote:
> Hi,
>
> This is a new DRM driver for Texas Instruments' Keystone K2G SoC. K2G has DSS6
> IP, which is related to the OMAP DSS IPs handled by the omapdrm driver. While
> on higher level the DSS6 resembles the older DSS versions, the registers and
> the
Add DSS node to k2g.dtsi.
Signed-off-by: Tomi Valkeinen
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/keystone-k2g.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi
b/arch/arm/boot/dts/keystone-k2g.dtsi
index
This patch adds a new DRM driver for Texas Instruments DSS6 IP used on
Texas Instruments Keystone K2G SoC. The DSS6 IP is a major change to the
older DSS IP versions, which are supported by the omapdrm driver, and
while on higher level the DSS6 resembles the older DSS versions, the
registers and
Hi,
This is a new DRM driver for Texas Instruments' Keystone K2G SoC. K2G has DSS6
IP, which is related to the OMAP DSS IPs handled by the omapdrm driver. While
on higher level the DSS6 resembles the older DSS versions, the registers and
the internal pipelines differ a lot.
DSS6 IP on K2G is a
From: Peter Ujfalusi
The sync in some panels needs to be driven by different edge of the pixel
clock compared to data. This is reflected by the
DISPLAY_FLAGS_SYNC_(POS|NEG)EDGE in videmode flags.
Add similar similar definitions for bus_flags and convert the sync drive
edge via
K2G EVM has an SiI902x HDMI encoder on the board, and a separately
purchasable LCD which can be attached to the board. Only one of these
displays can be used at a time, and two dip-switches need to be changed
when switching to another display.
The HDMI support is added to the base k2g-evm.dts
Add support for newhaven,nhd-4.3-480272ef-atxl to panel-simple.
Signed-off-by: Tomi Valkeinen
Cc: Thierry Reding
---
.../panel/newhaven,nhd-4.3-480272ef-atxl.txt | 7 +
drivers/gpu/drm/panel/panel-simple.c | 29 +++
2 files changed, 36 insertions(+)
create mode
Add DT bindings for Texas Instruments K2G SoC Display Subsystem. The DSS
is quite simple, with a single plane and a single output.
Signed-off-by: Tomi Valkeinen
Cc: devicet...@vger.kernel.org
---
.../devicetree/bindings/display/ti/ti,k2g-dss.txt | 15 +++
1 file changed, 15
On 2018-05-30 22:00, Jordan Crouse wrote:
On Wed, May 30, 2018 at 08:19:47PM +0530, Rajesh Yadav wrote:
dpu_io_util.h is moved from standard include path
to driver folder, correct the include path in code.
Signed-off-by: Rajesh Yadav
If the previous patch doesn't compile without this fix
This patch adds a simple helper function to help write 64 bit payloads
to the ringbuffer.
Signed-off-by: Sharat Masetty
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12
drivers/gpu/drm/msm/adreno/a5xx_power.c | 3 +--
drivers/gpu/drm/msm/msm_ringbuffer.h| 6 ++
3 files
On Wed, May 30, 2018 at 10:40:40AM -0400, Sean Paul wrote:
> On Wed, May 30, 2018 at 07:23:52PM +0800, Lowry Li wrote:
> > Hi,
> >
> > This serie aims at adding the support for pixel blend modes represent the
> > alpha blending equation selection in the driver. It also introduces to use
> > it in
On Wed, May 30, 2018 at 02:34:33PM +0100, Brian Starkey wrote:
> Hi Lowry,
>
> On Wed, May 30, 2018 at 07:23:54PM +0800, Lowry Li wrote:
> >Check the pixel blending mode and plane alpha value when
> >do the plane_check. Mali DP supports blending the current plane
> >with the background either
On Thu, May 31, 2018 at 11:36:47AM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Op 30-05-18 om 13:23 schreef Lowry Li:
> > Pixel blend modes represent the alpha blending equation
> > selection, describing how the pixels from the current
> > plane are composited with the background.
> >
> > Add a
Hi,
Thank you for the review.
On Wed, May 30, 2018 at 11:22:27PM +0300, Ville Syrjälä wrote:
> On Wed, May 30, 2018 at 06:30:52PM +0100, Alexandru Gheorghe wrote:
> > drm_private_state has a back pointer to the drm_atomic_state,
> > however that was not initialized in
devfreq framework requires the drivers to provide busy time estimations.
The GPU driver relies on the hardware performance counters for the busy time
estimations, but different hardware revisions have counters which can be
sourced from different clocks. So the busy time estimation will be target
This is needed for hardware revisions which do not rely on the generic
suspend, resume handlers for power management.
Signed-off-by: Sharat Masetty
---
drivers/gpu/drm/msm/msm_gpu.c | 23 +++
drivers/gpu/drm/msm/msm_gpu.h | 2 ++
2 files changed, 17 insertions(+), 8
Call the devfreq_remove_device() API to remove the GPU devfreq instance
during GPU driver cleanup.
Signed-off-by: Sharat Masetty
---
drivers/gpu/drm/msm/msm_gpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c
index
Devfreq turns on and starts recommending power level as soon as it is
initialized. The GPU is still not powered on by the time the devfreq
init happens and this leads to problems on GPU's where register access
is needed to get/set power levels. So we start suspended and only restart
devfreq when
This series re-factors the devfreq code a bit in preparation for the upcoming
A6x related devfreq changes. The code applies cleanly on 4.17 and has been
verified on DB820C.
V2: Addressed code review comments from Jordan Crouse.
V3: Added a new patch for devfreq cleanup.
Sharat Masetty (4):
Hey,
Op 30-05-18 om 13:23 schreef Lowry Li:
> Pixel blend modes represent the alpha blending equation
> selection, describing how the pixels from the current
> plane are composited with the background.
>
> Add a pixel_blend_mode to drm_plane_state and a
> blend_mode_property to drm_plane, and
On Thu, May 24, 2018 at 03:01:09PM -0700, Chen-Yu Tsai wrote:
> >> > > + if (tcon->quirks->needs_tcon_top) {
> >> > > + struct device_node *np;
> >> > > +
> >> > > + np = of_parse_phandle(dev->of_node, "allwinner,tcon-top", 0);
> >> > > + if (np) {
> >> > > +
Am Dienstag, den 29.05.2018, 14:34 +0200 schrieb Daniel Vetter:
> On Tue, May 29, 2018 at 11:08 AM, Lucas Stach wrote:
> > Am Dienstag, den 29.05.2018, 10:20 +0200 schrieb Daniel Vetter:
> > > On Fri, May 25, 2018 at 03:42:54PM +0200, Lucas Stach wrote:
> > > > The intention of the existing code
https://bugs.freedesktop.org/show_bug.cgi?id=106718
--- Comment #18 from Pixie ---
Where would I enter that?
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Hi Dave,
Finally got my send-mail script sorted out. A few bugfixes for drm-next.
drm-misc-next-fixes-2018-05-31:
drm-misc-next-fixes for v4.18:
Driver changes:
- Plug small memory leak in vc4. (anholt)
- Depend on MMU in v3d. (arnd)
The following changes since commit
https://bugs.freedesktop.org/show_bug.cgi?id=106735
Michel Dänzer changed:
What|Removed |Added
Attachment #139861|text/x-log |text/plain
mime type|
https://bugs.freedesktop.org/show_bug.cgi?id=106735
Michel Dänzer changed:
What|Removed |Added
Attachment #139862|text/x-log |text/plain
mime type|
On Wed, May 30, 2018 at 03:42:59AM +0300, Haneen Mohammed wrote:
> This patch add checks for NULL drm_[connector/crtc/plane]_helper_funcs
> pointers before derefrencing the variable to avoid NULL pointer
> dereference and make the helper functions optional in the following
> cases:
>
> 1) when
On 05/30/2018 10:24 PM, Boris Ostrovsky wrote:
On 05/30/2018 01:46 PM, Oleksandr Andrushchenko wrote:
On 05/30/2018 06:54 PM, Boris Ostrovsky wrote:
BTW, I also think you can further simplify
xenmem_reservation_va_mapping_* routines by bailing out right away if
https://bugs.freedesktop.org/show_bug.cgi?id=106718
Michel Dänzer changed:
What|Removed |Added
CC||harry.wentl...@amd.com
--- Comment #17
On 05/29/2018 10:49 AM, Daniel Vetter wrote:
On Tue, May 29, 2018 at 10:09:57AM +0300, Oleksandr Andrushchenko wrote:
On 05/29/2018 10:02 AM, Daniel Vetter wrote:
On Tue, May 22, 2018 at 05:13:04PM +0300, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
When unplugging a
On Tue, May 29, 2018 at 12:03:24PM +0300, Haneen Mohammed wrote:
> On Tue, May 29, 2018 at 10:03:53AM +0200, Daniel Vetter wrote:
> > On Fri, May 25, 2018 at 05:20:08AM +0300, Haneen Mohammed wrote:
> > > This patch add checks for NULL drm_[connector/crtc/plane]_helper_funcs
> > > pointers before
When adding support for peripheral out bridges, the "bridge" name
becomes imprecise as it refers to a different device than the
"out_bridge".
Signed-off-by: Maciej Purski
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff
Hi all,
this patchset is a next attempt to add the tc358764 driver.
The previous one can be found here:
https://lists.freedesktop.org/archives/dri-devel/2014-February/053705.html
Back then, TC358764 was added as a panel driver.
The bridge is supposed to be a DSI peripheral. Currently
From: Andrzej Hajda
The patch adds bridge and panel nodes.
It adds also DSI properties specific for arndale board and
regulators required by the bridge.
Signed-off-by: Andrzej Hajda
Signed-off-by: Maciej Purski
---
arch/arm/boot/dts/exynos5250-arndale.dts | 61
On Mon, May 21, 2018 at 06:23:58PM +0530, Ramalingam C wrote:
> Implements the HDMI adaptation specific HDCP2.2 operations.
>
> Basically these are DDC read and write for authenticating through
> HDCP2.2 messages.
>
> v2:
> Rebased.
> v3:
> No Changes.
> v4:
> No more special handling of
devfreq framework requires the drivers to provide busy time estimations.
The GPU driver relies on the hardware performance counters for the busy time
estimations, but different hardware revisions have counters which can be
sourced from different clocks. So the busy time estimation will be target
On Mon, 2018-05-28 at 15:20 +0200, Heiko Stuebner wrote:
> This still tries to address the hang seen by Ezequiel Garcia on rk3288.
>
> As Tomasz noted, trying to count enablement can run into concurrency
> issues, so instead we'll just check if the vop is runtime-enabled
> to see if it could be
On 05/30/2018 01:46 PM, Oleksandr Andrushchenko wrote:
> On 05/30/2018 06:54 PM, Boris Ostrovsky wrote:
>>
>>
>> BTW, I also think you can further simplify
>> xenmem_reservation_va_mapping_* routines by bailing out right away if
>> xen_feature(XENFEAT_auto_translated_physmap). In fact, you might
On 05/30/2018 02:34 AM, Oleksandr Andrushchenko wrote:
> On 05/29/2018 10:10 PM, Boris Ostrovsky wrote:
>> On 05/25/2018 11:33 AM, Oleksandr Andrushchenko wrote:
>> +/**
>> + * gnttab_dma_free_pages - free DMAable pages
>> + * @args: arguments to the function
>> + */
>> +int
From: Andrzej Hajda
The patch adds bindings to Toshiba DSI/LVDS bridge TC358764.
Bindings describe power supplies, reset gpio and video interfaces.
Signed-off-by: Andrzej Hajda
Signed-off-by: Maciej Purski
---
.../bindings/display/bridge/toshiba,tc358764.txt | 37 ++
1
On 05/25/2018 11:33 AM, Oleksandr Andrushchenko wrote:
Oleksandr Andrushchenko (8):
xen/grant-table: Make set/clear page private code shared
xen/balloon: Move common memory reservation routines to a module
xen/grant-table: Allow allocating buffers suitable for DMA
xen/gntdev:
Devfreq turns on and starts recommending power level as soon as it is
initialized. The GPU is still not powered on by the time the devfreq
init happens and this leads to problems on GPU's where register access
is needed to get/set power levels. So we start suspended and only restart
devfreq when
In order to allow bridge drivers to use DSI transfers in their
pre_enable callbacks, pm_runtime_get_sync() should be performed before
exynos_dsi_enable(). DSIM_STATE_ENABLED flag now should not guard
from calling dsi_host_transfer() before enabling.
Signed-off-by: Maciej Purski
---
From: Andrzej Hajda
The patch adds common part of DSI node for Exynos5250 platforms
and a required mipi-phy node.
Signed-off-by: Andrzej Hajda
Signed-off-by: Maciej Purski
---
arch/arm/boot/dts/exynos5250.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
On Thu, May 24, 2018 at 12:25 AM, Souptick Joarder wrote:
> Use new return type vm_fault_t for fault handler. For
> now, this is just documenting that the function returns
> a VM_FAULT value rather than an errno. Once all instances
> are converted, vm_fault_t will become a distinct type.
>
>
The current implementation assumes that the only possible peripheral
device for DSIM is a panel. Using an output bridge should also be
possible.
If an output bridge in available, don't create a new connector.
Instead add bridge to DSIM encdoer in dsi_host_attach().
Signed-off-by: Maciej Purski
On 05/30/2018 01:49 PM, Oleksandr Andrushchenko wrote:
> On 05/30/2018 06:20 PM, Boris Ostrovsky wrote:
>> On 05/30/2018 02:34 AM, Oleksandr Andrushchenko wrote:
>>> On 05/29/2018 10:10 PM, Boris Ostrovsky wrote:
On 05/25/2018 11:33 AM, Oleksandr Andrushchenko wrote:
+/**
+ *
This series re-factors the devfreq code a bit in preparation for the upcoming
A6x related devfreq changes. The code applies cleanly on 4.17 and has been
verified on DB820C.
V2: Addressed code review comments from Jordan Crouse.
Sharat Masetty (3):
drm/msm: suspend devfreq on init
drm/msm:
As DSIM can now have a bridge connected as a peripheral, it should be
possible to successfully enable exynos_dsi, when there is no panel
provided.
Signed-off-by: Maciej Purski
---
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 26 --
1 file changed, 12 insertions(+), 14
This is needed for hardware revisions which do not rely on the generic
suspend, resume handlers for power management.
Signed-off-by: Sharat Masetty
---
drivers/gpu/drm/msm/msm_gpu.c | 23 +++
drivers/gpu/drm/msm/msm_gpu.h | 2 ++
2 files changed, 17 insertions(+), 8
From: Andrzej Hajda
The patch adds bindings to BOE HV070-WSA WSVGA panel.
Bindings are compatible with simple panel bindings.
Signed-off-by: Andrzej Hajda
Signed-off-by: Maciej Purski
---
.../devicetree/bindings/display/panel/boe,hv070wsa-100.txt | 7 +++
1 file changed, 7
On 05/30/2018 04:29 AM, Oleksandr Andrushchenko wrote:
> On 05/29/2018 11:03 PM, Boris Ostrovsky wrote:
>> On 05/29/2018 02:22 PM, Oleksandr Andrushchenko wrote:
>>> On 05/29/2018 09:04 PM, Boris Ostrovsky wrote:
On 05/25/2018 11:33 AM, Oleksandr Andrushchenko wrote:
@@ -463,11 +457,6 @@
From: Andrzej Hajda
The patch adds support for BOE HV070WSA-100 WSVGA 7.01 inch panel
in panel-simple driver. The panel is used in Exynos5250-arndale boards.
Signed-off-by: Andrzej Hajda
Signed-off-by: Maciej Purski
---
drivers/gpu/drm/panel/panel-simple.c | 25 +
1
From: Andrzej Hajda
Add a drm_bridge driver for the Toshiba TC358764 DSI to LVDS bridge.
Signed-off-by: Andrzej Hajda
Signed-off-by: Maciej Purski
---
drivers/gpu/drm/bridge/Kconfig| 9 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/tc358764.c | 547
On Mon, May 21, 2018 at 06:23:57PM +0530, Ramalingam C wrote:
> Implements the DP adaptation specific HDCP2.2 functions.
>
> These functions perform the DPCD read and write for communicating the
> HDCP2.2 auth message back and forth.
>
> Note: Chris Wilson suggested alternate method for waiting
Am 30.05.2018 um 21:54 schrieb Andrey Grodzovsky:
Dying process might be blocked from receiving any more signals
so avoid using it.
Also retire enity->fini_status and just check the SW queue,
if it's not empty do the fallback cleanup.
Also handle entity->last_scheduled == NULL use case which
https://bugzilla.kernel.org/show_bug.cgi?id=86351
--- Comment #32 from letha...@gmail.com ---
It's still not ok for me with rx550 on a core2duo.
The HBR audio now starts playing to the audio receiver thanks to the fix.
But the sound is "flickering", it improves a lot by maximizing the audio
On Mon, May 21, 2018 at 06:23:44PM +0530, Ramalingam C wrote:
> Implements the enable and disable functions for HDCP2.2 encryption
> of the PORT.
>
> v2:
> intel_wait_for_register is used instead of wait_for. [Chris Wilson]
> v3:
> No Changes.
> v4:
> Debug msg is added for timeout at
On Mon, May 21, 2018 at 06:23:41PM +0530, Ramalingam C wrote:
> Adds the wrapper for all mei hdcp2.2 service functions.
>
> v2:
> Rebased.
> v3:
> cldev is moved from mei_hdcp_data to hdcp.
> v4:
> %s/hdcp2_store_paring_info/hdcp2_store_pairing_info
>
> Signed-off-by: Ramalingam C
This
Hi,
On Wednesday 30 May 2018 05:45 PM, Maciej Purski wrote:
From: Andrzej Hajda
Add a drm_bridge driver for the Toshiba TC358764 DSI to LVDS bridge.
Signed-off-by: Andrzej Hajda
Signed-off-by: Maciej Purski
---
drivers/gpu/drm/bridge/Kconfig| 9 +
drivers/gpu/drm/bridge/Makefile
From: Venkateswara Rao Mandela
Description of DRA7 Errata i932:
In rare circumstances DPLL_VIDEO1 and DPLL_VIDEO2 PLL's may not lock on
the first attempt during DSS initialization. When this occurs, a
subsequent attempt to relock the PLL will result in PLL successfully
locking.
This patch does
On Thu, May 31, 2018 at 12:49 AM, Arnd Bergmann wrote:
> drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c: In function 'hdmi_probe_of':
> drivers/video/fbdev/omap2/omapfb/dss/hdmi5.c:584:2: error: implicit
> declaration of function 'of_node_put'; did you mean 'node_set'?
>
From: Ong Hean Loong
Driver for Intel FPGA Video and Image Processing Suite Frame Buffer II.
The driver only supports the Intel Arria10 devkit and its variants.
This driver can be either loaded staticlly or in modules.
The OF device tree binding is located at:
From: Ong Hean Loong
Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants
Signed-off-by: Ong, Hean Loong
---
arch/arm/configs/socfpga_defconfig |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git
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