>
> On Thu, Dec 06, 2018 at 07:53:10AM -0500, Frediano Ziglio wrote:
> > >
> > > On Thu, Dec 06, 2018 at 05:59:25AM -0500, Frediano Ziglio wrote:
> > > > >
> > > > > Just use qxl_num_crtc directly everywhere instead of using
> > > > > qdev->monitors_config->max_allowed. Drops pointless
On Tue, Nov 27, 2018 at 04:13:11PM +0530, Ramalingam C wrote:
> Implements the HDMI adaptation specific HDCP2.2 operations.
>
> Basically these are DDC read and write for authenticating through
> HDCP2.2 messages.
>
> v2:
> Rebased.
> v3:
> No Changes.
> v4:
> No more special handling of
On Wed, Dec 05, 2018 at 01:50:44PM -0600, Rob Herring wrote:
> Convert string compares of DT node names to use of_node_name_eq helper
> instead. This removes direct access to the node name pointer.
>
> For instances using of_node_cmp, this has the side effect of now using
> case sensitive
On Tue, Nov 27, 2018 at 04:13:10PM +0530, Ramalingam C wrote:
> Implements the DP adaptation specific HDCP2.2 functions.
>
> These functions perform the DPCD read and write for communicating the
> HDCP2.2 auth message back and forth.
>
> v2:
> wait for cp_irq is merged with this patch.
On Thu, Dec 06, 2018 at 07:53:10AM -0500, Frediano Ziglio wrote:
> >
> > On Thu, Dec 06, 2018 at 05:59:25AM -0500, Frediano Ziglio wrote:
> > > >
> > > > Just use qxl_num_crtc directly everywhere instead of using
> > > > qdev->monitors_config->max_allowed. Drops pointless indirection
> > > >
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
PMIC.
On some CHT devices this fixes the LCD panel not lighting up when it was
not initialized by the GOP, because an external monitor was plugged in and
the GOP initialized only the external monitor.
Signed-off-by: Hans
Add support for PMIC mipi sequences using the new
intel_soc_pmic_exec_mipi_pmic_seq_element function.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/intel_dsi_vbt.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c
DSI LCD panels describe an initialization sequence in the Video BIOS
Tables using so called MIPI sequences. One possible element in these
sequences is a PMIC specific element of 15 bytes.
Although this is not really an ACPI opregion, the ACPI opregion code is the
closest thing we have. We need to
On Tue, Nov 27, 2018 at 04:13:09PM +0530, Ramalingam C wrote:
> On DP HDCP1.4 and 2.2, when CP_IRQ is received, start the link
> integrity check for the HDCP version that is enabled.
>
> v2:
> Rebased. Function name is changed.
> v3:
> No Changes.
> v4:
> No Changes.
> v5:
> No Changes.
>
On Tue, Nov 27, 2018 at 04:13:08PM +0530, Ramalingam C wrote:
> When repeater notifies a downstream topology change, this patch
> reauthenticate the repeater alone without disabling the hdcp
> encryption. If that fails then complete reauthentication is executed.
>
> v2:
> Rebased.
> v3:
> No
On Thu, Dec 06, 2018 at 02:27:21PM +0100, Daniel Vetter wrote:
> On Tue, Nov 27, 2018 at 04:13:07PM +0530, Ramalingam C wrote:
> > Implements the link integrity check once in 500mSec.
> >
> > Once encryption is enabled, an ongoing Link Integrity Check is
> > performed by the HDCP Receiver to
Hi,
I'm still unable to enable DPM with my R7 360, AMDGPU driver, Linux 4.19.7
kernel. Dmesg log is attached, showing that it is correctly using PCIE gen2
speeds.
Cheers,
Chris
On Sat, 24 Nov 2018 at 13:12, Chris Rankin wrote:
> Hi, thanks for the reply.
>
> That patch doesn't solve my issue,
On Tue, Nov 27, 2018 at 04:13:07PM +0530, Ramalingam C wrote:
> Implements the link integrity check once in 500mSec.
>
> Once encryption is enabled, an ongoing Link Integrity Check is
> performed by the HDCP Receiver to check that cipher synchronization
> is maintained between the HDCP
>
> On Thu, Dec 06, 2018 at 05:59:25AM -0500, Frediano Ziglio wrote:
> > >
> > > Just use qxl_num_crtc directly everywhere instead of using
> > > qdev->monitors_config->max_allowed. Drops pointless indirection
> > > and also is less confusing.
> > >
> >
> > To me is MORE confusing, why
Hi Luis,
On 04/12/2018 20:47, Luis Chamberlain wrote:
> On Mon, Dec 03, 2018 at 03:48:15PM -0800, Brendan Higgins wrote:
>> On Thu, Nov 29, 2018 at 5:54 AM Kieran Bingham
>> wrote:
>>>
>>> Hi Brendan,
>>>
>>> Thanks again for this series!
>>>
>>> On 28/11/2018 19:36, Brendan Higgins wrote:
On Thu, 2018-12-06 at 12:52 +0100, Michel Dänzer wrote:
> In contrast to the 2b case, the pr_debug output isn't visible by default
> with 1b, so the latter doesn't fit "always produce output" either.
I think you are mistaken here.
Adding #define DEBUG as Chris did enables pr_debug output
and is
Hi Brendan,
On 03/12/2018 23:53, Brendan Higgins wrote:
> On Thu, Nov 29, 2018 at 7:45 PM Luis Chamberlain wrote:
>>
>> On Thu, Nov 29, 2018 at 01:56:37PM +, Kieran Bingham wrote:
>>> Hi Brendan,
>>>
>>> Please excuse the top posting, but I'm replying here as I'm following
>>> the section
https://bugs.freedesktop.org/show_bug.cgi?id=108892
--- Comment #5 from sunnany...@huawei.com ---
(In reply to Zheng Luo from comment #2)
> (In reply to Christian König from comment #1)
> > What kernel version is this? Please also try with the latest.
>
> I'm using 4.19.4-arch1-1-ARCH. Should I
https://bugs.freedesktop.org/show_bug.cgi?id=108892
--- Comment #4 from sunnany...@huawei.com ---
Is there any new progress in this issue? I had the same problem.
--
You are receiving this mail because:
You are the assignee for the bug.___
dri-devel
On 2018-12-06 12:41 p.m., Joe Perches wrote:
> On Thu, 2018-12-06 at 10:23 +0100, Michel Dänzer wrote:
>> On 2018-12-06 3:51 a.m., Joe Perches wrote:
>>> On Thu, 2018-12-06 at 10:40 +0800, Zhang, Jerry(Junwei) wrote:
On 12/6/18 12:56 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
On Thu, Dec 06, 2018 at 05:59:25AM -0500, Frediano Ziglio wrote:
> >
> > Just use qxl_num_crtc directly everywhere instead of using
> > qdev->monitors_config->max_allowed. Drops pointless indirection
> > and also is less confusing.
> >
>
> To me is MORE confusing, why comparing number of
On Thu, 2018-12-06 at 10:23 +0100, Michel Dänzer wrote:
> On 2018-12-06 3:51 a.m., Joe Perches wrote:
> > On Thu, 2018-12-06 at 10:40 +0800, Zhang, Jerry(Junwei) wrote:
> > > On 12/6/18 12:56 AM, Michel Dänzer wrote:
> > > > From: Michel Dänzer
> > > >
> > > > The following cases are possible
On 2018-12-06 10:57 a.m., Christian König wrote:
> This patch caused trouble because of not handled corner cases during
> memory pressure.
>
> The extra overhead of checking if we have enough space doesn't worth the
> trouble, so just revert it.
>
> This reverts commit
On Thu, Dec 06, 2018 at 05:55:58AM -0500, Frediano Ziglio wrote:
>
> > qxl surfaces (used for framebuffers and gem objects) can live in both
> > VRAM and PRIV ttm domains. Update placement setup to include both. Put
> > PRIV first in the list so it is preferred, so VRAM will have more room
> >
Hi Inki,
On 06.12.2018 10:38, Andrzej Hajda wrote:
> Hi Inki,
>
> This small patchset adds dynamic zpos support for DECON and FIMD.
> It was tested on tm2 and trats2.
I have realized that this patchset interferes with Christoph's exynos
plane patches for fimd and decon, but in
Hi Jonathan,
Il 06/12/2018 08:29, Jonathan Liu ha scritto:
Hi Giulio,
On Thu, 15 Feb 2018 at 17:54, Giulio Benetti
wrote:
Differently from other Lcd signals, HSYNC and VSYNC signals
result inverted if their bits are cleared to 0.
Invert their settings of IO_POL register.
Signed-off-by:
>
> Just use qxl_num_crtc directly everywhere instead of using
> qdev->monitors_config->max_allowed. Drops pointless indirection
> and also is less confusing.
>
To me is MORE confusing, why comparing number of something with
another number? Previously code was comparing number of monitors
with
> qxl surfaces (used for framebuffers and gem objects) can live in both
> VRAM and PRIV ttm domains. Update placement setup to include both. Put
> PRIV first in the list so it is preferred, so VRAM will have more room
> for objects which must be allocated there.
>
> Signed-off-by: Gerd
qxl surfaces (used for framebuffers and gem objects) can live in both
VRAM and PRIV ttm domains. Update placement setup to include both. Put
PRIV first in the list so it is preferred, so VRAM will have more room
for objects which must be allocated there.
Signed-off-by: Gerd Hoffmann
---
The shadow bo is used as qxl surface, so allocate it as
QXL_GEM_DOMAIN_SURFACE. Should usually be allocated in
PRIV ttm domain then, so this reduces VRAM memory pressure.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/qxl/qxl_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Move some allocations from VRAM to PRIV domain, to reduce VRAM memory
pressure. Should help especially with wayland, which uses dumb gem
buffers.
Gerd Hoffmann (3):
drm/qxl: allow both PRIV and VRAM placement for QXL_GEM_DOMAIN_SURFACE
drm/qxl: use QXL_GEM_DOMAIN_SURFACE for shadow bo.
dumb buffers are used as qxl surfaces, so allocate them as
QXL_GEM_DOMAIN_SURFACE. Should usually be allocated in
PRIV ttm domain then, so this reduces VRAM memory pressure.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/qxl/qxl_dumb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Tue, Nov 27, 2018 at 04:13:06PM +0530, Ramalingam C wrote:
> Implements the HDCP2.2 repeaters authentication steps such as verifying
> the downstream topology and sending stream management information.
>
> v2:
> Rebased.
> v3:
> No Changes.
> v4:
> -EINVAL is returned for topology error
On Tue, Nov 27, 2018 at 04:13:04PM +0530, Ramalingam C wrote:
> Considering that HDCP2.2 is more secure than HDCP1.4, When a setup
> supports HDCP2.2 and HDCP1.4, HDCP2.2 will be enabled.
>
> When HDCP2.2 enabling fails and HDCP1.4 is supported, HDCP1.4 is
> enabled.
>
> This change implements a
Just use qxl_num_crtc directly everywhere instead of using
qdev->monitors_config->max_allowed. Drops pointless indirection
and also is less confusing.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/qxl/qxl_display.c | 21 +
1 file changed, 9 insertions(+), 12 deletions(-)
On Tue, Nov 27, 2018 at 04:13:03PM +0530, Ramalingam C wrote:
> Defining the mei-i915 interface functions and initialization of
> the interface.
>
> Signed-off-by: Ramalingam C
> Signed-off-by: Tomas Winkler
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 +
> drivers/gpu/drm/i915/intel_drv.h
On Tue, Nov 27, 2018 at 04:13:02PM +0530, Ramalingam C wrote:
> Add the HDCP2.2 initialization to the existing HDCP1.4 stack.
With the comments below addressed the commit message is a bit untrue,
since this just wires up a basic hdcp2_supported flag in a few places.
Please make that clear.
>
>
https://bugs.freedesktop.org/show_bug.cgi?id=104520
John M. changed:
What|Removed |Added
CC||alt.ya-5e0t...@yopmail.com
--- Comment #23
This patch caused trouble because of not handled corner cases during
memory pressure.
The extra overhead of checking if we have enough space doesn't worth the
trouble, so just revert it.
This reverts commit 5786b66c9e3b7b18f3c24566e70cae450969cb14 and
commit
On 2018-12-06 10:49 a.m., Christian König wrote:
> Am 06.12.18 um 10:39 schrieb Zhang, Jerry(Junwei):
>> On 12/6/18 5:33 PM, Koenig, Christian wrote:
>>> Am 06.12.18 um 10:09 schrieb Michel Dänzer:
On 2018-12-06 3:43 a.m., Zhang, Jerry(Junwei) wrote:
> On 12/6/18 12:56 AM, Michel Dänzer
On 2018-12-06 10:38 a.m., Michel Dänzer wrote:
> On 2018-12-06 10:33 a.m., Koenig, Christian wrote:
>> Am 06.12.18 um 10:09 schrieb Michel Dänzer:
>>> On 2018-12-06 3:43 a.m., Zhang, Jerry(Junwei) wrote:
On 12/6/18 12:56 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> All the
Hi Morimoto-san,
On Tuesday, 27 November 2018 02:44:58 EET Kuninori Morimoto wrote:
> Hi Laurent
>
> Sorry for super late response.
> I got opinion from BSP team about this patch.
No worries. My reply is late too I'm afraid :-S
> > On selected SoCs, the DU can use the clock output by the LVDS
Am 06.12.18 um 10:39 schrieb Zhang, Jerry(Junwei):
On 12/6/18 5:33 PM, Koenig, Christian wrote:
Am 06.12.18 um 10:09 schrieb Michel Dänzer:
On 2018-12-06 3:43 a.m., Zhang, Jerry(Junwei) wrote:
On 12/6/18 12:56 AM, Michel Dänzer wrote:
From: Michel Dänzer
All the output is related, so it
Hi Dave,
Final pull request for -next targeting v4.21.
Most of the changes are small and all over the place, so I didn't enumerate
them all.
drm-misc-next-2018-12-06:
Final changes to drm-misc-next for v4.21:
UAPI Changes:
Core Changes:
- Add dma_fence_get_stub to dma-buf, and use it in
On 12/6/18 5:33 PM, Koenig, Christian wrote:
Am 06.12.18 um 10:09 schrieb Michel Dänzer:
On 2018-12-06 3:43 a.m., Zhang, Jerry(Junwei) wrote:
On 12/6/18 12:56 AM, Michel Dänzer wrote:
From: Michel Dänzer
All the output is related, so it should all be printed the same way.
Some of it was
DECON has fixed hardware window order. To implement dynamic zpos
normalized_zpos of active plane has to be connected to window number, and
remaining windows have to be disabled.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 23 +--
1 file
Hardware window disabling is performed in multiple places. Creating
helper for it simplifies the code and prepares it for further improvements.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 23 +++
1 file changed, 11 insertions(+), 12
Hi Inki,
This small patchset adds dynamic zpos support for DECON and FIMD.
It was tested on tm2 and trats2.
Regards
Andrzej
Andrzej Hajda (3):
drm/exynos/decon5433: add dynamic zpos support
drm/exynos/fimd: create local helper for disabling hardware window
drm/exynos/fimd: add dynamic
FIMD has fixed hardware window order. To implement dynamic zpos
normalized_zpos of active plane has to be connected to window number, and
remaining windows have to be disabled.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 21 -
1 file changed,
On 2018-12-06 10:33 a.m., Koenig, Christian wrote:
> Am 06.12.18 um 10:09 schrieb Michel Dänzer:
>> On 2018-12-06 3:43 a.m., Zhang, Jerry(Junwei) wrote:
>>> On 12/6/18 12:56 AM, Michel Dänzer wrote:
From: Michel Dänzer
All the output is related, so it should all be printed the same
Implement finding the right timeline point in drm_syncobj_find_fence.
v2: return -EINVAL when the point is not submitted yet.
v3: fix reference counting bug, add flags handling as well
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 43
From: Chunming Zhou
points array is one-to-one match with syncobjs array.
v2:
add seperate ioctl for timeline point wait, otherwise break uapi.
v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
v4:
rebase
v5:
add
Lockless container implementation similar to a dma_fence_array, but with
only two elements per node and automatic garbage collection.
v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
drop prev reference during garbage collection if it's not a chain fence.
v3:
From: Chunming Zhou
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 90f474f98b6e..316bfc1a6a75 100644
---
From: Chunming Zhou
user mode can query timeline payload.
v2: check return value of copy_to_user
v3: handle querying entry by entry
v4: rebase on new chain container, simplify interface
Signed-off-by: Chunming Zhou
Cc: Daniel Rakos
Cc: Jason Ekstrand
Cc: Bas Nieuwenhuizen
Cc: Dave Airlie
From: Chunming Zhou
syncobj wait/signal operation is appending in command submission.
v2: separate to two kinds in/out_deps functions
Signed-off-by: Chunming Zhou
Cc: Daniel Rakos
Cc: Jason Ekstrand
Cc: Bas Nieuwenhuizen
Cc: Dave Airlie
Cc: Christian König
Cc: Chris Wilson
---
This completes "drm/syncobj: Drop add/remove_callback from driver
interface" and cleans up the implementation a bit.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 91 ++-
include/drm/drm_syncobj.h | 21 --
2 files changed,
Use the dma_fence_chain object to create a timeline of fence objects
instead of just replacing the existing fence.
v2: rebase and cleanup
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 37 +
include/drm/drm_syncobj.h | 5 +
2
For a lot of use cases we need 64bit sequence numbers. Currently drivers
overload the dma_fence structure to store the additional bits.
Stop doing that and make the sequence number in the dma_fence always
64bit.
For compatibility with hardware which can do only 32bit sequences the
comparisons in
Am 06.12.18 um 10:09 schrieb Michel Dänzer:
> On 2018-12-06 3:43 a.m., Zhang, Jerry(Junwei) wrote:
>> On 12/6/18 12:56 AM, Michel Dänzer wrote:
>>> From: Michel Dänzer
>>>
>>> All the output is related, so it should all be printed the same way.
>>> Some of it was using pr_debug, but some of it
In this patch, a list for icl specific pixel formats is created
in which Y210, Y212 and Y216 pixel formats are added along with
legacy pixel formats for primary and sprite plane.
v3: since support for planar formats on ICL was getting totally
skipped, added support for the same in
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
v3: no change
v4: rebase
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h
v3: case handling checking INTEL_GEN(dev_priv) < 11 added for these 3
new pixel formats (juha)
v4: rebase
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 9 +
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed, 12
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies 32bit.
Y210: Valid data occupies MSB 10 bits.
LSB 6 bits are filled with zeroes.
Y212: Valid data occupies MSB 12
These patches enable packed format YUV422-Y210, Y212 and Y216
for 10, 12 and 16 bit respectively for ICL.
For user space component IGT
IGT needs libraries for Pixman and Cairo to support more than 8bpc.
Work going on from Maarten Lankhorst.
v2: addressed review comments of mahesh and alexandru
This is a note to let you know that I've just added the patch titled
drm/meson: Fix OOB memory accesses in meson_viu_set_osd_lut()
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch
This is a note to let you know that I've just added the patch titled
drm/meson: Enable fast_io in meson_dw_hdmi_regmap_config
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
Quoting Michel Dänzer (2018-12-06 09:21:40)
> On 2018-12-06 10:12 a.m., Chris Wilson wrote:
> > Quoting Zhang, Jerry(Junwei) (2018-12-06 02:40:42)
> >> On 12/6/18 12:56 AM, Michel Dänzer wrote:
> >>> From: Michel Dänzer
> >>>
> >>> The following cases are possible for pr_debug():
> >>>
> >>> 1.
On 2018-12-06 3:51 a.m., Joe Perches wrote:
> On Thu, 2018-12-06 at 10:40 +0800, Zhang, Jerry(Junwei) wrote:
>> On 12/6/18 12:56 AM, Michel Dänzer wrote:
>>> From: Michel Dänzer
>>>
>>> The following cases are possible for pr_debug():
>>>
>>> 1. CONFIG_DYNAMIC_DEBUG disabled
>>> a) DEBUG not
Fix the skip for kms_color/gamma subtest
Test requirement not met in function run_tests_for_pipe, file kms_color.c:858:
Test requirement: igt_pipe_obj_has_prop(>display.pipes[p],
IGT_CRTC_DEGAMMA_LUT_SIZE)
Subtest pipe-A-gamma: SKIP
Test requirement not met in function run_tests_for_pipe, file
On 2018-12-06 10:12 a.m., Chris Wilson wrote:
> Quoting Zhang, Jerry(Junwei) (2018-12-06 02:40:42)
>> On 12/6/18 12:56 AM, Michel Dänzer wrote:
>>> From: Michel Dänzer
>>>
>>> The following cases are possible for pr_debug():
>>>
>>> 1. CONFIG_DYNAMIC_DEBUG disabled
>>> a) DEBUG not defined:
Quoting Zhang, Jerry(Junwei) (2018-12-06 02:40:42)
> On 12/6/18 12:56 AM, Michel Dänzer wrote:
> > From: Michel Dänzer
> >
> > The following cases are possible for pr_debug():
> >
> > 1. CONFIG_DYNAMIC_DEBUG disabled
> > a) DEBUG not defined: pr_debug() translates to no_printk(...), i.e.
> >
On 2018-12-06 3:43 a.m., Zhang, Jerry(Junwei) wrote:
> On 12/6/18 12:56 AM, Michel Dänzer wrote:
>> From: Michel Dänzer
>>
>> All the output is related, so it should all be printed the same way.
>> Some of it was using pr_debug, but some of it appeared in dmesg by
>> default. The caller should
This is a note to let you know that I've just added the patch titled
drm/meson: Fix OOB memory accesses in meson_viu_set_osd_lut()
to the 4.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch
This is a note to let you know that I've just added the patch titled
drm/meson: Enable fast_io in meson_dw_hdmi_regmap_config
to the 4.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
Hi Ville,
Thank you for the review.
On 05-12-18 22:25, Ville Syrjälä wrote:
On Wed, Dec 05, 2018 at 10:03:09PM +0100, Hans de Goede wrote:
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove
PMIC.
On some CHT devices this fixes the LCD panel not lighting up when it was
On Wed, Dec 05, 2018 at 05:14:39PM +0530, Ramalingam C wrote:
> Couple of more HDCP1.4 fixes on
> - Key load process for CFL
> - Encryption status change time
> - debug log addition
> - active platform coverage
>
> v1 and v2 went into old series
Signed-off-by: James (Qian) Wang
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 254b7b267731..9e44c2c2e234 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1132,6 +1132,14 @@ S: Supported
F: drivers/gpu/drm/arm/
F:
komeda_framebuffer is for extending drm_framebuffer to add komeda own
attributes and komeda specific fb handling.
Signed-off-by: James (Qian) Wang
---
drivers/gpu/drm/arm/display/komeda/Makefile | 3 +-
.../arm/display/komeda/komeda_framebuffer.c | 165 ++
On 12/4/18 10:01 PM, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20181204:
>
on i386:
ld: drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.o: in function
`wait_for_scl_high_sw':
dce_i2c_sw.c:(.text+0x2f3): undefined reference to `__bad_udelay'
ld:
1. Added a brief definition of komeda_dev/pipeline/component, this change
didn't add the detailed component features and capabilities, which will
be added in the following changes.
2. Corresponding resources discovery and initialzation functions.
Signed-off-by: James (Qian) Wang
---
Add DT bindings documentation for the ARM display processor D71 and later
IPs.
Signed-off-by: James (Qian) Wang
---
.../bindings/display/arm/arm,komeda.txt | 87 +++
1 file changed, 87 insertions(+)
create mode 100644
From: Enric Balletbo i Serra
Add support to async updates of cursors by using the new atomic
interface for that.
Signed-off-by: Enric Balletbo i Serra
[updated for upstream]
Signed-off-by: Helen Koike
---
Hello,
This is the forth version of the async-plane update suport to the
Rockchip
On Tue, Dec 4, 2018 at 5:49 AM Rob Herring wrote:
>
> On Tue, Dec 4, 2018 at 5:40 AM Frank Rowand wrote:
> >
> > Hi Brendan, Rob,
> >
> > Pulling a comment from way back in the v1 patch thread:
> >
> > On 10/17/18 3:22 PM, Brendan Higgins wrote:
> > > On Wed, Oct 17, 2018 at 10:49 AM wrote:
> >
Hi Ville
On 11/27/18 11:34 AM, Ville Syrjälä wrote:
> On Fri, Nov 23, 2018 at 07:53:26PM -0200, Helen Koike wrote:
>> Allow userspace to identify if the driver supports async update.
>
> And what exactly is an "async update"?
I agree we are lacking docs on this, I'll send in the next version as
Hi Jordan,
Thanks for the patch!
On 11/29/18 19:26, Jordan Crouse wrote:
> Try to get the interconnect path for the GPU and vote for the maximum
> bandwidth to support all frequencies. This is needed for performance.
> Later we will want to scale the bandwidth based on the frequency to
> also
From: ayaka
The Windows 2/3 or a RGB UI layer is a high performance flexibly
plane. It is too waste to use it as a cursor plane.
I have verified this patch with weston git version, I am not
sure whether X would meet with this patch. As the previous
author is gone, I can't confirm this problem
komeda_format_caps is for describing ARM display specific features and
limitations of a specific format, and format_caps will be linked into
_framebuffer like a extension of _format_info.
And komed_format_caps_table will be initialized before the enum_resources,
since the layer features
Parse DT and initialize corresponding dev/pipeline attributes.
Signed-off-by: James (Qian) Wang
---
.../gpu/drm/arm/display/komeda/komeda_dev.c | 74 +++
.../gpu/drm/arm/display/komeda/komeda_dev.h | 3 +
.../drm/arm/display/komeda/komeda_pipeline.c | 4 +
Add komeda_kms abstracton to attach komeda_dev to DRM-KMS
CRTC: according to the komeda_pipeline
PLANE: according to komeda_layer (layer input pipeline)
PRIVATE_OBJS: komeda_pipeline/component all will be treat as private_objs
komeda_kms is for connecting DRM-KMS and komeda_dev, like
Implement a simple wrapper for platform module to build komeda to module,
Also add a very simple D71 layer code to show how to discover a product.
Komeda driver direct bind the product ENTRY function xxx_identity to DT
compatible name like:
d71_product = {
.product_id =
On Tue, Dec 4, 2018 at 2:58 AM Frank Rowand wrote:
>
> Hi Brendan,
>
> On 11/28/18 11:36 AM, Brendan Higgins wrote:
> > Split out a couple of test cases that these features in base.c from the
> > unittest.c monolith. The intention is that we will eventually split out
> > all test cases and group
On 12/05/2018 10:30 AM, kernel test robot wrote:
> FYI, we noticed the following commit (built with gcc-7):
>
> commit: 19717e78a04d51512cf0e7b9b09c61f06b2af071 ("[PATCH V2] mm: Replace all
> open encodings for NUMA_NO_NODE")
> url:
>
On Tue, Dec 4, 2018 at 5:41 AM Rob Herring wrote:
>
> On Mon, Dec 3, 2018 at 6:14 PM Brendan Higgins
> wrote:
> >
> > On Thu, Nov 29, 2018 at 4:40 PM Randy Dunlap wrote:
> > >
> > > On 11/28/18 12:56 PM, Rob Herring wrote:
> > > >> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
> > > >>
On 30/11/2018 03:14, Luis Chamberlain wrote:
On Wed, Nov 28, 2018 at 11:36:18AM -0800, Brendan Higgins wrote:
+#define module_test(module) \
+ static int module_kunit_init##module(void) \
+ { \
+ return kunit_run_tests(); \
+ } \
+
On Tue, Nov 20, 2018 at 09:58:41AM +0100, Maxime Ripard wrote:
> On Mon, Nov 19, 2018 at 10:26:38AM +, Russell King - ARM Linux wrote:
> > On Mon, Nov 19, 2018 at 09:19:34AM +0100, Maxime Ripard wrote:
> > > Hi,
> > >
> > > On Fri, Nov 16, 2018 at 07:18:29PM +0200, Priit Laes wrote:
> > > >
On 05/12/2018 14:45, Arnd Bergmann wrote:
On Wed, Dec 5, 2018 at 2:42 PM Anton Ivanov
wrote:
On 30/11/2018 03:14, Luis Chamberlain wrote:
On Wed, Nov 28, 2018 at 11:36:18AM -0800, Brendan Higgins wrote:
Then for the UML stuff, I think if we *really* accept that UML will
always be a viable
On Wed, 2018-12-05 at 17:01 +0530, Anshuman Khandual wrote:
>
> On 12/05/2018 02:56 AM, Lubomir Rintel wrote:
> > On Mon, 2018-11-26 at 17:56 +0530, Anshuman Khandual wrote:
> > > At present there are multiple places where invalid node number is encoded
> > > as -1. Even though implicitly
Hi Laurent,
On Tue, Dec 04, 2018 at 06:57:10PM +0200, Laurent Pinchart wrote:
> Hi Simon,
>
> Could you please consider taking this patch in your tree ? It's independent
> from the rest of the series.
sure, applied for v4.21.
>
> On Sunday, 25 November 2018 16:40:30 EET Laurent Pinchart
On 12/05/2018 02:56 AM, Lubomir Rintel wrote:
> On Mon, 2018-11-26 at 17:56 +0530, Anshuman Khandual wrote:
>> At present there are multiple places where invalid node number is encoded
>> as -1. Even though implicitly understood it is always better to have macros
>> in there. Replace these open
101 - 200 of 204 matches
Mail list logo
