https://bugzilla.kernel.org/show_bug.cgi?id=202533
--- Comment #7 from Ilia Mirkin (imir...@alum.mit.edu) ---
You could try loading nouveau... or removing the configuration that is
preventing it from loading...
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--- Comment #6 from acollie...@gmail.com ---
Anything else I can try to do?
On Sat, Feb 9, 2019 at 12:57 PM wrote:
> https://bugzilla.kernel.org/show_bug.cgi?id=202533
>
> --- Comment #5 from Ilia Mirkin (imir...@alum.mit.edu) ---
> Doesn't
https://bugs.freedesktop.org/show_bug.cgi?id=108854
--- Comment #12 from Tom Seewald ---
(In reply to Alex Deucher from comment #11)
> The reset was actually successful. The problem is, userspace components
> need to be aware of the reset and recreate their contexts. As a workaround,
> you can
tree: git://anongit.freedesktop.org/drm/drm-tip drm-tip
head: d4794b009ccd1ef8816e15c833f07ab696911a8d
commit: bd6ee5d2d2032416ba36ec6c24bf513f4ff0d338 [2/8] Merge remote-tracking
branch 'drm-misc/drm-misc-next' into drm-tip
config: x86_64-randconfig-s5-02041749 (attached as .config)
https://bugs.freedesktop.org/show_bug.cgi?id=105733
--- Comment #72 from castor_fou ---
I tried comment 64 suggestion: ivrs_ioapic[4]=00:14.0 ivrs_ioapic[5]=00:00.2
After 2 days without any hang, I've just got one.
I am desperate about this problem, it has happened only since 18.04 upgrade. I
https://bugzilla.kernel.org/show_bug.cgi?id=201273
--- Comment #34 from quirin.blae...@freenet.de ---
git pull failed.
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c: needs merge
drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c: needs merge
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c: needs merge
https://bugzilla.kernel.org/show_bug.cgi?id=202533
--- Comment #5 from Ilia Mirkin (imir...@alum.mit.edu) ---
Doesn't seem like nouveau is loaded at all. Probably related to not being able
to get anything to come up on those screens...
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--- Comment #33 from quirin.blae...@freenet.de ---
Bug is still alive. amd-staging-drm-next
8202c53d8f8e1045b8d1ec2db9401618b8889614
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Hi,
On Fri, Jan 11, 2019 at 05:51:20AM +0200, Laurent Pinchart wrote:
> Panels are now supported through the drm_panel infrastructure, remove
> the omapdrm-specific driver.
>
> Signed-off-by: Laurent Pinchart
> Reviewed-by: Sebastian Reichel
> ---
Tested-by: Sebastian Reichel
-- Sebastian
Hi,
On Fri, Jan 11, 2019 at 05:50:35AM +0200, Laurent Pinchart wrote:
> From: Tomi Valkeinen
>
> Since commit b4935e3a3cfa ("drm/omap: Store bus flags in the
> omap_dss_device structure") video mode flags are managed by the omapdss
> (and later omapdrm) core based on bus flags stored in
Hi,
On Fri, Jan 11, 2019 at 05:51:16AM +0200, Laurent Pinchart wrote:
> Hook up drm_bridge support in the omapdrm driver. Despite the recent
> extensive preparation work, this is a rather intrusive change, as the
> management of outputs needs to be adapted through the driver to handle
> both
Hi,
On Fri, Jan 11, 2019 at 05:50:34AM +0200, Laurent Pinchart wrote:
> From: Tomi Valkeinen
>
> Commit edb715dffdee ("drm/omap: dss: dsi: Move initialization code from
> bind to probe") moved the of_platform_populate() call from dsi_bind() to
> dsi_probe(), but failed to move the corresponding
Hi,
On Fri, Jan 11, 2019 at 03:34:19AM +0200, Laurent Pinchart wrote:
> Hi Sebastian,
>
> On Thursday, 20 December 2018 14:17:27 EET Sebastian Reichel wrote:
> > Hi,
> >
> > On Mon, Dec 10, 2018 at 03:06:17AM +0200, Laurent Pinchart wrote:
> > > This patch series hooks up support for drm_bridge
Hi,
On Fri, Jan 11, 2019 at 05:51:19AM +0200, Laurent Pinchart wrote:
> Those components are supported by the drm_bridge infrastructure, remove
> the omapdrm-specific driver.
>
> Signed-off-by: Laurent Pinchart
> Reviewed-by: Sebastian Reichel
> ---
Tested-by: Sebastian Reichel
-- Sebastian
Hi,
On Fri, Jan 11, 2019 at 05:51:18AM +0200, Laurent Pinchart wrote:
> The omapdss driver patches DT at runtime to prepend an "omapdss," prefix
> to the compatible string of all encoders, panels and connectors. This
> mechanism ensures they get bound to the omapdss-specific drivers instead
> of
Hi,
On Fri, Jan 11, 2019 at 05:50:32AM +0200, Laurent Pinchart wrote:
> The mode_valid_path() function validates the mode it receives without
> ever modifying it. Constify the mode pointer argument to make that
> explicit.
>
> Signed-off-by: Laurent Pinchart
> Reviewed-by: Ville Syrjälä
> ---
Hi,
On Fri, Jan 11, 2019 at 05:51:17AM +0200, Laurent Pinchart wrote:
> Hook up drm_panel support in the omapdrm driver. The change is
> relatively simply as the way has been paved by drm_bridge support
> already. In addition to looking up, attaching to and detaching from the
> panel, we only
Hi,
On Fri, Jan 11, 2019 at 05:51:00AM +0200, Laurent Pinchart wrote:
> The omap_dss_device .check_timings() and .set_timings() operations
> operate on struct videomode, while the DRM API operates on struct
> drm_display_mode. This forces conversion from to videomode in the
> callers. While
Hi,
On Fri, Jan 11, 2019 at 05:51:16AM +0200, Laurent Pinchart wrote:
> Hook up drm_bridge support in the omapdrm driver. Despite the recent
> extensive preparation work, this is a rather intrusive change, as the
> management of outputs needs to be adapted through the driver to handle
> both
Hi,
On Fri, Jan 11, 2019 at 05:50:31AM +0200, Laurent Pinchart wrote:
> Hello,
>
> This patch series consolidates the three pending series for the omapdrm and
> tfp410 drivers that all together implement drm_bridge and drm_panel support
> for omapdrm.
>
> The series starts with four patches not
From: Tomi Valkeinen
[ Upstream commit 4d9d54a730434cc068dd3515ba6116697196f77b ]
PHY_2LANE bit is always set in DP_PHY_CTRL, breaking 1 lane use.
Set PHY_2LANE only when 2 lanes are used.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Tomi Valkeinen
[ Upstream commit 7923e09c7a766e2d58de7fc395bb84c18e5bc625 ]
The H and V syncs of the DP output are always set to active high. This
patch fixes the syncs by configuring them according to the videomode.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
From: Takashi Iwai
[ Upstream commit 118780066e30c34de3d9349710b51780bfa0ba83 ]
When a fan is controlled via linear fallback without cstate, we
shouldn't stop polling. Otherwise it won't be adjusted again and
keeps running at an initial crazy pace.
Fixes: 800efb4c2857
From: Ilia Mirkin
[ Upstream commit a5176a4cb85bb6213daadf691097cf411da35df2 ]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108980
Signed-off-by: Ilia Mirkin
Signed-off-by: Ben Skeggs
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/nouveau/nvkm/engine/falcon.c | 7 +--
1 file
From: Tomi Valkeinen
[ Upstream commit 51b9e62eb6950c762162ab7eb8390990179be067 ]
The current driver accepts any videomode with pclk < 154MHz. This is not
correct, as with 1 lane and/or 1.62Mbps speed not all videomodes can be
supported.
Add code to reject modes that require more bandwidth
From: Tomi Valkeinen
[ Upstream commit 51b9e62eb6950c762162ab7eb8390990179be067 ]
The current driver accepts any videomode with pclk < 154MHz. This is not
correct, as with 1 lane and/or 1.62Mbps speed not all videomodes can be
supported.
Add code to reject modes that require more bandwidth
From: Tomi Valkeinen
[ Upstream commit adf4109896bbee27fd2ac3b48d22d6a0062fe517 ]
DP1_SRCCTRL register and PHY_2LANE field did not have matching defines.
Add these.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Tomi Valkeinen
[ Upstream commit 7923e09c7a766e2d58de7fc395bb84c18e5bc625 ]
The H and V syncs of the DP output are always set to active high. This
patch fixes the syncs by configuring them according to the videomode.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
From: Jim Qu
[ Upstream commit 0c6c8125582714e1fd3544983eba3d750db0f5b8 ]
effect asics: VEGA10 and VEGA12
Signed-off-by: Jim Qu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++-
1 file changed, 2
From: Tomi Valkeinen
[ Upstream commit 9a63bd6fe1b5590ffa42ae2ed22ee21363293e31 ]
Initially DP0_SRCCTRL is set to a static value which includes
DP0_SRCCTRL_LANES_2 and DP0_SRCCTRL_BW27, even when only 1 lane of
1.62Gbps speed is used. DP1_SRCCTRL is configured to a magic number.
This patch
From: Tomi Valkeinen
[ Upstream commit 51b9e62eb6950c762162ab7eb8390990179be067 ]
The current driver accepts any videomode with pclk < 154MHz. This is not
correct, as with 1 lane and/or 1.62Mbps speed not all videomodes can be
supported.
Add code to reject modes that require more bandwidth
From: Tomi Valkeinen
[ Upstream commit 7923e09c7a766e2d58de7fc395bb84c18e5bc625 ]
The H and V syncs of the DP output are always set to active high. This
patch fixes the syncs by configuring them according to the videomode.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
From: Tomi Valkeinen
[ Upstream commit adf4109896bbee27fd2ac3b48d22d6a0062fe517 ]
DP1_SRCCTRL register and PHY_2LANE field did not have matching defines.
Add these.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Takashi Iwai
[ Upstream commit 118780066e30c34de3d9349710b51780bfa0ba83 ]
When a fan is controlled via linear fallback without cstate, we
shouldn't stop polling. Otherwise it won't be adjusted again and
keeps running at an initial crazy pace.
Fixes: 800efb4c2857
From: Ilia Mirkin
[ Upstream commit a5176a4cb85bb6213daadf691097cf411da35df2 ]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108980
Signed-off-by: Ilia Mirkin
Signed-off-by: Ben Skeggs
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/nouveau/nvkm/engine/falcon.c | 7 +--
1 file
From: Tomi Valkeinen
[ Upstream commit 4d9d54a730434cc068dd3515ba6116697196f77b ]
PHY_2LANE bit is always set in DP_PHY_CTRL, breaking 1 lane use.
Set PHY_2LANE only when 2 lanes are used.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Tomi Valkeinen
[ Upstream commit 9a63bd6fe1b5590ffa42ae2ed22ee21363293e31 ]
Initially DP0_SRCCTRL is set to a static value which includes
DP0_SRCCTRL_LANES_2 and DP0_SRCCTRL_BW27, even when only 1 lane of
1.62Gbps speed is used. DP1_SRCCTRL is configured to a magic number.
This patch
From: Tomi Valkeinen
[ Upstream commit 4d9d54a730434cc068dd3515ba6116697196f77b ]
PHY_2LANE bit is always set in DP_PHY_CTRL, breaking 1 lane use.
Set PHY_2LANE only when 2 lanes are used.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Tomi Valkeinen
[ Upstream commit adf4109896bbee27fd2ac3b48d22d6a0062fe517 ]
DP1_SRCCTRL register and PHY_2LANE field did not have matching defines.
Add these.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Tomi Valkeinen
[ Upstream commit 9a63bd6fe1b5590ffa42ae2ed22ee21363293e31 ]
Initially DP0_SRCCTRL is set to a static value which includes
DP0_SRCCTRL_LANES_2 and DP0_SRCCTRL_BW27, even when only 1 lane of
1.62Gbps speed is used. DP1_SRCCTRL is configured to a magic number.
This patch
From: Emily Deng
[ Upstream commit b8cf66182eddb22e9c7539821ed6eecdb4f86d1a ]
The pfvf exchange need be in exclusive mode. And add pfvf exchange in gpu
reset.
Signed-off-by: Emily Deng
Reviewed-By: Xiangliang Yu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: Tomi Valkeinen
[ Upstream commit 51b9e62eb6950c762162ab7eb8390990179be067 ]
The current driver accepts any videomode with pclk < 154MHz. This is not
correct, as with 1 lane and/or 1.62Mbps speed not all videomodes can be
supported.
Add code to reject modes that require more bandwidth
From: Tomi Valkeinen
[ Upstream commit 7923e09c7a766e2d58de7fc395bb84c18e5bc625 ]
The H and V syncs of the DP output are always set to active high. This
patch fixes the syncs by configuring them according to the videomode.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
From: Tomi Valkeinen
[ Upstream commit 4842379cbe6e851de914a7132f76f4e200b9a98b ]
tc358767 driver does not set DRM bus_flags, even if it does configures
the polarity settings into its registers. This means that the DPI source
can't configure the polarities correctly.
Add sync flags
From: Jim Qu
[ Upstream commit 0c6c8125582714e1fd3544983eba3d750db0f5b8 ]
effect asics: VEGA10 and VEGA12
Signed-off-by: Jim Qu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++-
1 file changed, 2
From: Tao Zhou
[ Upstream commit 3e958fe67720b37d04ab8ef81b9d507a56a09bbc ]
Fix CPDMA hang in PRT mode for both VEGA10 and VEGA20
Signed-off-by: Tao Zhou
Tested-by: Yukun.Li
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: Tomi Valkeinen
[ Upstream commit 4842379cbe6e851de914a7132f76f4e200b9a98b ]
tc358767 driver does not set DRM bus_flags, even if it does configures
the polarity settings into its registers. This means that the DPI source
can't configure the polarities correctly.
Add sync flags
From: Ilia Mirkin
[ Upstream commit a5176a4cb85bb6213daadf691097cf411da35df2 ]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108980
Signed-off-by: Ilia Mirkin
Signed-off-by: Ben Skeggs
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/nouveau/nvkm/engine/falcon.c | 7 +--
1 file
From: Christian König
[ Upstream commit 1c1eba86339c8517814863bc7dd21e2661a84e77 ]
We hit a problem with IOMMU with that. Disable until we have time to
debug further.
Signed-off-by: Christian König
Reviewed-by: Michel Dänzer
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
From: Takashi Iwai
[ Upstream commit 118780066e30c34de3d9349710b51780bfa0ba83 ]
When a fan is controlled via linear fallback without cstate, we
shouldn't stop polling. Otherwise it won't be adjusted again and
keeps running at an initial crazy pace.
Fixes: 800efb4c2857
From: Tomi Valkeinen
[ Upstream commit adf4109896bbee27fd2ac3b48d22d6a0062fe517 ]
DP1_SRCCTRL register and PHY_2LANE field did not have matching defines.
Add these.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Tomi Valkeinen
[ Upstream commit 4d9d54a730434cc068dd3515ba6116697196f77b ]
PHY_2LANE bit is always set in DP_PHY_CTRL, breaking 1 lane use.
Set PHY_2LANE only when 2 lanes are used.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Andrzej Hajda
Signed-off-by: Andrzej Hajda
Link:
From: Tomi Valkeinen
[ Upstream commit 9a63bd6fe1b5590ffa42ae2ed22ee21363293e31 ]
Initially DP0_SRCCTRL is set to a static value which includes
DP0_SRCCTRL_LANES_2 and DP0_SRCCTRL_BW27, even when only 1 lane of
1.62Gbps speed is used. DP1_SRCCTRL is configured to a magic number.
This patch
https://bugzilla.kernel.org/show_bug.cgi?id=202533
--- Comment #4 from acollie...@gmail.com ---
Attached the logs, hopefully those help!
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https://bugzilla.kernel.org/show_bug.cgi?id=202533
--- Comment #3 from acollie...@gmail.com ---
Created attachment 281083
--> https://bugzilla.kernel.org/attachment.cgi?id=281083=edit
dmesg log
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--- Comment #2 from acollie...@gmail.com ---
Created attachment 281081
--> https://bugzilla.kernel.org/attachment.cgi?id=281081=edit
xorg log
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> Request ME FW to start the HDCP2.2 session for an intel port.
> Prepares payloads for command WIRED_INITIATE_HDCP2_SESSION and sends
> to ME FW.
>
> On Success, ME FW will start a HDCP2.2 session for the port and provides the
> content for HDCP2.2 AKE_Init message.
>
> v2: Rebased.
> v3:
>
On 2/8/19 4:20 PM, Tim Harvey wrote:
On Fri, Feb 8, 2019 at 11:28 AM Steve Longerbeam wrote:
if (inf == outf)
params = _csc_identity;
else if (inf == IPUV3_COLORSPACE_YUV)
- params = _csc_ycbcr2rgb_bt601;
+ params =
* Tomi Valkeinen [190208 09:11]:
> Looks fine to me and works on panda. I'll queue this to the next merge
> window (I presume no rush to get this into the current -rcs, it's a bit
> late).
OK good to hear panda works too, my panda is in my rack..
This one has been broken for a long time and
Simplify the selection of the Y'CbCr encoding matrices in init_csc().
A side-effect of this change is that init_csc() now allows YUV->YUV
using the identity matrix, intead of returning error.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-ic.c | 12
1 file changed, 4
Pass v4l2 encoding enum to the ipu_ic task init functions, and add
support for the BT.709 encoding and inverse encoding matrices.
Reported-by: Tim Harvey
Signed-off-by: Steve Longerbeam
---
Changes in v2:
- only return "Unsupported YCbCr encoding" error if inf != outf,
since if inf == outf,
On Tue, Dec 11, 2018 at 9:02 AM Anton Ivanov
wrote:
>
>
> On 12/11/18 2:41 PM, Steven Rostedt wrote:
> > On Tue, 11 Dec 2018 15:09:26 +0100
> > Petr Mladek wrote:
> >
> >>> We have liburcu already, which is good. The main sticking points are:
> >>>
> >>> - printk has started adding a lot of
On Thu, Dec 6, 2018 at 4:16 AM Kieran Bingham
wrote:
>
> Hi Brendan,
>
> On 03/12/2018 23:53, Brendan Higgins wrote:
> > On Thu, Nov 29, 2018 at 7:45 PM Luis Chamberlain wrote:
> >>
> >> On Thu, Nov 29, 2018 at 01:56:37PM +, Kieran Bingham wrote:
> >>> Hi Brendan,
> >>>
> >>> Please excuse
Simplify the selection of the Y'CbCr encoding matrices in init_csc().
A side-effect of this change is that init_csc() now allows YUV->YUV
using the identity matrix, intead of returning error.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-ic.c | 12
1 file changed, 4
From: Steve Longerbeam
Pass v4l2 encoding enum to the ipu_ic task init functions, and add
support for the BT.709 encoding and inverse encoding matrices.
Reported-by: Tim Harvey
Signed-off-by: Steve Longerbeam
---
Changes in v2:
- only return "Unsupported YCbCr encoding" error if inf != outf,
From: Steve Longerbeam
The ycbcr2rgb and inverse rgb2ycbcr matrices define the BT.601 encoding
coefficients, so rename them to indicate that. And add some comments
to make clear these are BT.601 coefficients encoding between YUV limited
range and RGB full range. The ic_csc_rgb2rgb matrix is just
The ycbcr2rgb and inverse rgb2ycbcr matrices define the BT.601 encoding
coefficients, so rename them to indicate that. And add some comments
to make clear these are BT.601 coefficients encoding between YUV limited
range and RGB full range. The ic_csc_rgb2rgb matrix is just an identity
matrix, so
Pass v4l2 encoding enum to the ipu_ic task init functions, and add
support for the BT.709 encoding and inverse encoding matrices.
Reported-by: Tim Harvey
Signed-off-by: Steve Longerbeam
---
Changes in v4:
- fix compile error.
Chnges in v3:
- none.
Changes in v2:
- only return "Unsupported YCbCr
On 2/8/19 8:24 AM, Tim Harvey wrote:
On Sun, Feb 3, 2019 at 11:48 AM Steve Longerbeam wrote:
Pass v4l2 encoding enum to the ipu_ic task init functions, and add
support for the BT.709 encoding and inverse encoding matrices.
Reported-by: Tim Harvey
Signed-off-by: Steve Longerbeam
---
Hi Guido
On Vi, 2019-02-08 at 12:40 +0100, Guido Günther wrote:
> Hi Robert,
> On Wed, Feb 06, 2019 at 03:28:07PM +, Robert Chiras wrote:
> >
> > Hi Guido,
> >
> > Thanks for picking this up. It's interesting to see that a lot has
> > changed in the PHY API and the phy can be now configured
On Thu, Feb 07, 2019 at 03:26:47PM -0700, Jason Gunthorpe wrote:
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
> b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
> index 31786b200afc47..e84f6aaee778f0 100644
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
> @@ -311,7 +311,13 @@ static
The ycbcr2rgb and inverse rgb2ycbcr matrices define the BT.601 encoding
coefficients, so rename them to indicate that. And add some comments
to make clear these are BT.601 coefficients encoding between YUV limited
range and RGB full range. The ic_csc_rgb2rgb matrix is just an identity
matrix, so
Simplify the selection of the Y'CbCr encoding matrices in init_csc().
A side-effect of this change is that init_csc() now allows YUV->YUV
using the identity matrix, intead of returning error.
Signed-off-by: Steve Longerbeam
---
drivers/gpu/ipu-v3/ipu-ic.c | 12
1 file changed, 4
https://bugzilla.kernel.org/show_bug.cgi?id=202537
--- Comment #1 from Bernd Steinhauser (li...@bernd-steinhauser.de) ---
Created attachment 281077
--> https://bugzilla.kernel.org/attachment.cgi?id=281077=edit
kernel messages
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https://bugzilla.kernel.org/show_bug.cgi?id=202537
Bug ID: 202537
Summary: amdgpu/DC failed to reserve new abo buffer before flip
Product: Drivers
Version: 2.5
Kernel Version: 4.20
Hardware: All
OS: Linux
https://bugs.freedesktop.org/show_bug.cgi?id=109598
--- Comment #2 from Sam Ravnborg ---
The command "gpg --keyserver subkeys.pgp.net --send-keys xxx"
failed.
Will try again later and update this bug when it succeeds
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--- Comment #1 from Sam Ravnborg ---
Created attachment 143349
--> https://bugs.freedesktop.org/attachment.cgi?id=143349=edit
ssh public key for s...@ravnborg.org
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https://bugs.freedesktop.org/show_bug.cgi?id=109598
Bug ID: 109598
Summary: New Account
Product: DRI
Version: unspecified
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priority: medium
https://bugs.freedesktop.org/show_bug.cgi?id=46711
--- Comment #24 from Luca ---
I have the problem each time I turn off my monitor and then later turn it back
on. The desktop does not come back.
The monitor is a samsung Samsung S34J55W.
# xrandr
Screen 0: minimum 320 x 200, current 3440 x
>
> On Sat, Feb 09, 2019 at 12:42:50PM +0530, Ramalingam C wrote:
> > From: Tomas Winkler
> >
> > Add icelake mei device id.
> >
> > Cc:
> > Signed-off-by: Tomas Winkler
> > Signed-off-by: Greg Kroah-Hartman
> > Cherry-picked from
> >
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